3739 uint32_t BuiltinID) {
3744 switch (BuiltinID) {
3745 case Builtin::BI__builtin_is_constant_evaluated:
3748 case Builtin::BI__builtin_assume:
3749 case Builtin::BI__assume:
3752 case Builtin::BI__builtin_strcmp:
3753 case Builtin::BIstrcmp:
3754 case Builtin::BI__builtin_strncmp:
3755 case Builtin::BIstrncmp:
3756 case Builtin::BI__builtin_wcsncmp:
3757 case Builtin::BIwcsncmp:
3758 case Builtin::BI__builtin_wcscmp:
3759 case Builtin::BIwcscmp:
3762 case Builtin::BI__builtin_strlen:
3763 case Builtin::BIstrlen:
3764 case Builtin::BI__builtin_wcslen:
3765 case Builtin::BIwcslen:
3768 case Builtin::BI__builtin_nan:
3769 case Builtin::BI__builtin_nanf:
3770 case Builtin::BI__builtin_nanl:
3771 case Builtin::BI__builtin_nanf16:
3772 case Builtin::BI__builtin_nanf128:
3775 case Builtin::BI__builtin_nans:
3776 case Builtin::BI__builtin_nansf:
3777 case Builtin::BI__builtin_nansl:
3778 case Builtin::BI__builtin_nansf16:
3779 case Builtin::BI__builtin_nansf128:
3782 case Builtin::BI__builtin_huge_val:
3783 case Builtin::BI__builtin_huge_valf:
3784 case Builtin::BI__builtin_huge_vall:
3785 case Builtin::BI__builtin_huge_valf16:
3786 case Builtin::BI__builtin_huge_valf128:
3787 case Builtin::BI__builtin_inf:
3788 case Builtin::BI__builtin_inff:
3789 case Builtin::BI__builtin_infl:
3790 case Builtin::BI__builtin_inff16:
3791 case Builtin::BI__builtin_inff128:
3794 case Builtin::BI__builtin_copysign:
3795 case Builtin::BI__builtin_copysignf:
3796 case Builtin::BI__builtin_copysignl:
3797 case Builtin::BI__builtin_copysignf128:
3800 case Builtin::BI__builtin_fmin:
3801 case Builtin::BI__builtin_fminf:
3802 case Builtin::BI__builtin_fminl:
3803 case Builtin::BI__builtin_fminf16:
3804 case Builtin::BI__builtin_fminf128:
3807 case Builtin::BI__builtin_fminimum_num:
3808 case Builtin::BI__builtin_fminimum_numf:
3809 case Builtin::BI__builtin_fminimum_numl:
3810 case Builtin::BI__builtin_fminimum_numf16:
3811 case Builtin::BI__builtin_fminimum_numf128:
3814 case Builtin::BI__builtin_fmax:
3815 case Builtin::BI__builtin_fmaxf:
3816 case Builtin::BI__builtin_fmaxl:
3817 case Builtin::BI__builtin_fmaxf16:
3818 case Builtin::BI__builtin_fmaxf128:
3821 case Builtin::BI__builtin_fmaximum_num:
3822 case Builtin::BI__builtin_fmaximum_numf:
3823 case Builtin::BI__builtin_fmaximum_numl:
3824 case Builtin::BI__builtin_fmaximum_numf16:
3825 case Builtin::BI__builtin_fmaximum_numf128:
3828 case Builtin::BI__builtin_isnan:
3831 case Builtin::BI__builtin_issignaling:
3834 case Builtin::BI__builtin_isinf:
3837 case Builtin::BI__builtin_isinf_sign:
3840 case Builtin::BI__builtin_isfinite:
3843 case Builtin::BI__builtin_isnormal:
3846 case Builtin::BI__builtin_issubnormal:
3849 case Builtin::BI__builtin_iszero:
3852 case Builtin::BI__builtin_signbit:
3853 case Builtin::BI__builtin_signbitf:
3854 case Builtin::BI__builtin_signbitl:
3857 case Builtin::BI__builtin_isgreater:
3858 case Builtin::BI__builtin_isgreaterequal:
3859 case Builtin::BI__builtin_isless:
3860 case Builtin::BI__builtin_islessequal:
3861 case Builtin::BI__builtin_islessgreater:
3862 case Builtin::BI__builtin_isunordered:
3865 case Builtin::BI__builtin_isfpclass:
3868 case Builtin::BI__builtin_fpclassify:
3871 case Builtin::BI__builtin_fabs:
3872 case Builtin::BI__builtin_fabsf:
3873 case Builtin::BI__builtin_fabsl:
3874 case Builtin::BI__builtin_fabsf128:
3877 case Builtin::BI__builtin_abs:
3878 case Builtin::BI__builtin_labs:
3879 case Builtin::BI__builtin_llabs:
3882 case Builtin::BI__builtin_popcount:
3883 case Builtin::BI__builtin_popcountl:
3884 case Builtin::BI__builtin_popcountll:
3885 case Builtin::BI__builtin_popcountg:
3886 case Builtin::BI__popcnt16:
3887 case Builtin::BI__popcnt:
3888 case Builtin::BI__popcnt64:
3891 case Builtin::BI__builtin_parity:
3892 case Builtin::BI__builtin_parityl:
3893 case Builtin::BI__builtin_parityll:
3896 return APInt(Val.getBitWidth(), Val.popcount() % 2);
3898 case Builtin::BI__builtin_clrsb:
3899 case Builtin::BI__builtin_clrsbl:
3900 case Builtin::BI__builtin_clrsbll:
3903 return APInt(Val.getBitWidth(),
3904 Val.getBitWidth() - Val.getSignificantBits());
3906 case Builtin::BI__builtin_bitreverse8:
3907 case Builtin::BI__builtin_bitreverse16:
3908 case Builtin::BI__builtin_bitreverse32:
3909 case Builtin::BI__builtin_bitreverse64:
3911 S, OpPC,
Call, [](
const APSInt &Val) {
return Val.reverseBits(); });
3913 case Builtin::BI__builtin_classify_type:
3916 case Builtin::BI__builtin_expect:
3917 case Builtin::BI__builtin_expect_with_probability:
3920 case Builtin::BI__builtin_rotateleft8:
3921 case Builtin::BI__builtin_rotateleft16:
3922 case Builtin::BI__builtin_rotateleft32:
3923 case Builtin::BI__builtin_rotateleft64:
3924 case Builtin::BI_rotl8:
3925 case Builtin::BI_rotl16:
3926 case Builtin::BI_rotl:
3927 case Builtin::BI_lrotl:
3928 case Builtin::BI_rotl64:
3931 return Value.rotl(Amount);
3934 case Builtin::BI__builtin_rotateright8:
3935 case Builtin::BI__builtin_rotateright16:
3936 case Builtin::BI__builtin_rotateright32:
3937 case Builtin::BI__builtin_rotateright64:
3938 case Builtin::BI_rotr8:
3939 case Builtin::BI_rotr16:
3940 case Builtin::BI_rotr:
3941 case Builtin::BI_lrotr:
3942 case Builtin::BI_rotr64:
3945 return Value.rotr(Amount);
3948 case Builtin::BI__builtin_ffs:
3949 case Builtin::BI__builtin_ffsl:
3950 case Builtin::BI__builtin_ffsll:
3953 return APInt(Val.getBitWidth(),
3954 Val.isZero() ? 0u : Val.countTrailingZeros() + 1u);
3957 case Builtin::BIaddressof:
3958 case Builtin::BI__addressof:
3959 case Builtin::BI__builtin_addressof:
3963 case Builtin::BIas_const:
3964 case Builtin::BIforward:
3965 case Builtin::BIforward_like:
3966 case Builtin::BImove:
3967 case Builtin::BImove_if_noexcept:
3971 case Builtin::BI__builtin_eh_return_data_regno:
3974 case Builtin::BI__builtin_launder:
3978 case Builtin::BI__builtin_add_overflow:
3979 case Builtin::BI__builtin_sub_overflow:
3980 case Builtin::BI__builtin_mul_overflow:
3981 case Builtin::BI__builtin_sadd_overflow:
3982 case Builtin::BI__builtin_uadd_overflow:
3983 case Builtin::BI__builtin_uaddl_overflow:
3984 case Builtin::BI__builtin_uaddll_overflow:
3985 case Builtin::BI__builtin_usub_overflow:
3986 case Builtin::BI__builtin_usubl_overflow:
3987 case Builtin::BI__builtin_usubll_overflow:
3988 case Builtin::BI__builtin_umul_overflow:
3989 case Builtin::BI__builtin_umull_overflow:
3990 case Builtin::BI__builtin_umulll_overflow:
3991 case Builtin::BI__builtin_saddl_overflow:
3992 case Builtin::BI__builtin_saddll_overflow:
3993 case Builtin::BI__builtin_ssub_overflow:
3994 case Builtin::BI__builtin_ssubl_overflow:
3995 case Builtin::BI__builtin_ssubll_overflow:
3996 case Builtin::BI__builtin_smul_overflow:
3997 case Builtin::BI__builtin_smull_overflow:
3998 case Builtin::BI__builtin_smulll_overflow:
4001 case Builtin::BI__builtin_addcb:
4002 case Builtin::BI__builtin_addcs:
4003 case Builtin::BI__builtin_addc:
4004 case Builtin::BI__builtin_addcl:
4005 case Builtin::BI__builtin_addcll:
4006 case Builtin::BI__builtin_subcb:
4007 case Builtin::BI__builtin_subcs:
4008 case Builtin::BI__builtin_subc:
4009 case Builtin::BI__builtin_subcl:
4010 case Builtin::BI__builtin_subcll:
4013 case Builtin::BI__builtin_clz:
4014 case Builtin::BI__builtin_clzl:
4015 case Builtin::BI__builtin_clzll:
4016 case Builtin::BI__builtin_clzs:
4017 case Builtin::BI__builtin_clzg:
4018 case Builtin::BI__lzcnt16:
4019 case Builtin::BI__lzcnt:
4020 case Builtin::BI__lzcnt64:
4023 case Builtin::BI__builtin_ctz:
4024 case Builtin::BI__builtin_ctzl:
4025 case Builtin::BI__builtin_ctzll:
4026 case Builtin::BI__builtin_ctzs:
4027 case Builtin::BI__builtin_ctzg:
4030 case Builtin::BI__builtin_elementwise_clzg:
4031 case Builtin::BI__builtin_elementwise_ctzg:
4034 case Builtin::BI__builtin_bswapg:
4035 case Builtin::BI__builtin_bswap16:
4036 case Builtin::BI__builtin_bswap32:
4037 case Builtin::BI__builtin_bswap64:
4040 case Builtin::BI__atomic_always_lock_free:
4041 case Builtin::BI__atomic_is_lock_free:
4044 case Builtin::BI__c11_atomic_is_lock_free:
4047 case Builtin::BI__builtin_complex:
4050 case Builtin::BI__builtin_is_aligned:
4051 case Builtin::BI__builtin_align_up:
4052 case Builtin::BI__builtin_align_down:
4055 case Builtin::BI__builtin_assume_aligned:
4058 case clang::X86::BI__builtin_ia32_bextr_u32:
4059 case clang::X86::BI__builtin_ia32_bextr_u64:
4060 case clang::X86::BI__builtin_ia32_bextri_u32:
4061 case clang::X86::BI__builtin_ia32_bextri_u64:
4064 unsigned BitWidth = Val.getBitWidth();
4065 uint64_t Shift = Idx.extractBitsAsZExtValue(8, 0);
4066 uint64_t Length = Idx.extractBitsAsZExtValue(8, 8);
4067 if (Length > BitWidth) {
4072 if (Length == 0 || Shift >= BitWidth)
4073 return APInt(BitWidth, 0);
4075 uint64_t
Result = Val.getZExtValue() >> Shift;
4076 Result &= llvm::maskTrailingOnes<uint64_t>(Length);
4080 case clang::X86::BI__builtin_ia32_bzhi_si:
4081 case clang::X86::BI__builtin_ia32_bzhi_di:
4084 unsigned BitWidth = Val.getBitWidth();
4085 uint64_t Index = Idx.extractBitsAsZExtValue(8, 0);
4088 if (Index < BitWidth)
4089 Result.clearHighBits(BitWidth - Index);
4094 case clang::X86::BI__builtin_ia32_ktestcqi:
4095 case clang::X86::BI__builtin_ia32_ktestchi:
4096 case clang::X86::BI__builtin_ia32_ktestcsi:
4097 case clang::X86::BI__builtin_ia32_ktestcdi:
4100 return APInt(
sizeof(
unsigned char) * 8, (~A & B) == 0);
4103 case clang::X86::BI__builtin_ia32_ktestzqi:
4104 case clang::X86::BI__builtin_ia32_ktestzhi:
4105 case clang::X86::BI__builtin_ia32_ktestzsi:
4106 case clang::X86::BI__builtin_ia32_ktestzdi:
4109 return APInt(
sizeof(
unsigned char) * 8, (A & B) == 0);
4112 case clang::X86::BI__builtin_ia32_kortestcqi:
4113 case clang::X86::BI__builtin_ia32_kortestchi:
4114 case clang::X86::BI__builtin_ia32_kortestcsi:
4115 case clang::X86::BI__builtin_ia32_kortestcdi:
4118 return APInt(
sizeof(
unsigned char) * 8, ~(A | B) == 0);
4121 case clang::X86::BI__builtin_ia32_kortestzqi:
4122 case clang::X86::BI__builtin_ia32_kortestzhi:
4123 case clang::X86::BI__builtin_ia32_kortestzsi:
4124 case clang::X86::BI__builtin_ia32_kortestzdi:
4127 return APInt(
sizeof(
unsigned char) * 8, (A | B) == 0);
4130 case clang::X86::BI__builtin_ia32_lzcnt_u16:
4131 case clang::X86::BI__builtin_ia32_lzcnt_u32:
4132 case clang::X86::BI__builtin_ia32_lzcnt_u64:
4135 return APInt(Src.getBitWidth(), Src.countLeadingZeros());
4138 case clang::X86::BI__builtin_ia32_tzcnt_u16:
4139 case clang::X86::BI__builtin_ia32_tzcnt_u32:
4140 case clang::X86::BI__builtin_ia32_tzcnt_u64:
4143 return APInt(Src.getBitWidth(), Src.countTrailingZeros());
4146 case clang::X86::BI__builtin_ia32_pdep_si:
4147 case clang::X86::BI__builtin_ia32_pdep_di:
4150 unsigned BitWidth = Val.getBitWidth();
4153 for (
unsigned I = 0, P = 0; I != BitWidth; ++I) {
4155 Result.setBitVal(I, Val[P++]);
4161 case clang::X86::BI__builtin_ia32_pext_si:
4162 case clang::X86::BI__builtin_ia32_pext_di:
4165 unsigned BitWidth = Val.getBitWidth();
4168 for (
unsigned I = 0, P = 0; I != BitWidth; ++I) {
4170 Result.setBitVal(P++, Val[I]);
4176 case clang::X86::BI__builtin_ia32_addcarryx_u32:
4177 case clang::X86::BI__builtin_ia32_addcarryx_u64:
4178 case clang::X86::BI__builtin_ia32_subborrow_u32:
4179 case clang::X86::BI__builtin_ia32_subborrow_u64:
4183 case Builtin::BI__builtin_os_log_format_buffer_size:
4186 case Builtin::BI__builtin_ptrauth_string_discriminator:
4189 case Builtin::BI__builtin_infer_alloc_token:
4192 case Builtin::BI__noop:
4196 case Builtin::BI__builtin_operator_new:
4199 case Builtin::BI__builtin_operator_delete:
4202 case Builtin::BI__arithmetic_fence:
4205 case Builtin::BI__builtin_reduce_add:
4206 case Builtin::BI__builtin_reduce_mul:
4207 case Builtin::BI__builtin_reduce_and:
4208 case Builtin::BI__builtin_reduce_or:
4209 case Builtin::BI__builtin_reduce_xor:
4210 case Builtin::BI__builtin_reduce_min:
4211 case Builtin::BI__builtin_reduce_max:
4214 case Builtin::BI__builtin_elementwise_popcount:
4215 case Builtin::BI__builtin_elementwise_bitreverse:
4219 case Builtin::BI__builtin_elementwise_abs:
4222 case Builtin::BI__builtin_memcpy:
4223 case Builtin::BImemcpy:
4224 case Builtin::BI__builtin_wmemcpy:
4225 case Builtin::BIwmemcpy:
4226 case Builtin::BI__builtin_memmove:
4227 case Builtin::BImemmove:
4228 case Builtin::BI__builtin_wmemmove:
4229 case Builtin::BIwmemmove:
4232 case Builtin::BI__builtin_memcmp:
4233 case Builtin::BImemcmp:
4234 case Builtin::BI__builtin_bcmp:
4235 case Builtin::BIbcmp:
4236 case Builtin::BI__builtin_wmemcmp:
4237 case Builtin::BIwmemcmp:
4240 case Builtin::BImemchr:
4241 case Builtin::BI__builtin_memchr:
4242 case Builtin::BIstrchr:
4243 case Builtin::BI__builtin_strchr:
4244 case Builtin::BIwmemchr:
4245 case Builtin::BI__builtin_wmemchr:
4246 case Builtin::BIwcschr:
4247 case Builtin::BI__builtin_wcschr:
4248 case Builtin::BI__builtin_char_memchr:
4251 case Builtin::BI__builtin_object_size:
4252 case Builtin::BI__builtin_dynamic_object_size:
4255 case Builtin::BI__builtin_is_within_lifetime:
4258 case Builtin::BI__builtin_elementwise_add_sat:
4261 return LHS.isSigned() ? LHS.sadd_sat(RHS) : LHS.uadd_sat(RHS);
4264 case Builtin::BI__builtin_elementwise_sub_sat:
4267 return LHS.isSigned() ? LHS.ssub_sat(RHS) : LHS.usub_sat(RHS);
4269 case X86::BI__builtin_ia32_extract128i256:
4270 case X86::BI__builtin_ia32_vextractf128_pd256:
4271 case X86::BI__builtin_ia32_vextractf128_ps256:
4272 case X86::BI__builtin_ia32_vextractf128_si256:
4275 case X86::BI__builtin_ia32_extractf32x4_256_mask:
4276 case X86::BI__builtin_ia32_extractf32x4_mask:
4277 case X86::BI__builtin_ia32_extractf32x8_mask:
4278 case X86::BI__builtin_ia32_extractf64x2_256_mask:
4279 case X86::BI__builtin_ia32_extractf64x2_512_mask:
4280 case X86::BI__builtin_ia32_extractf64x4_mask:
4281 case X86::BI__builtin_ia32_extracti32x4_256_mask:
4282 case X86::BI__builtin_ia32_extracti32x4_mask:
4283 case X86::BI__builtin_ia32_extracti32x8_mask:
4284 case X86::BI__builtin_ia32_extracti64x2_256_mask:
4285 case X86::BI__builtin_ia32_extracti64x2_512_mask:
4286 case X86::BI__builtin_ia32_extracti64x4_mask:
4289 case clang::X86::BI__builtin_ia32_pmulhrsw128:
4290 case clang::X86::BI__builtin_ia32_pmulhrsw256:
4291 case clang::X86::BI__builtin_ia32_pmulhrsw512:
4294 return (llvm::APIntOps::mulsExtended(LHS, RHS).ashr(14) + 1)
4295 .extractBits(16, 1);
4298 case clang::X86::BI__builtin_ia32_movmskps:
4299 case clang::X86::BI__builtin_ia32_movmskpd:
4300 case clang::X86::BI__builtin_ia32_pmovmskb128:
4301 case clang::X86::BI__builtin_ia32_pmovmskb256:
4302 case clang::X86::BI__builtin_ia32_movmskps256:
4303 case clang::X86::BI__builtin_ia32_movmskpd256: {
4307 case X86::BI__builtin_ia32_psignb128:
4308 case X86::BI__builtin_ia32_psignb256:
4309 case X86::BI__builtin_ia32_psignw128:
4310 case X86::BI__builtin_ia32_psignw256:
4311 case X86::BI__builtin_ia32_psignd128:
4312 case X86::BI__builtin_ia32_psignd256:
4316 return APInt::getZero(AElem.getBitWidth());
4317 if (BElem.isNegative())
4322 case clang::X86::BI__builtin_ia32_pavgb128:
4323 case clang::X86::BI__builtin_ia32_pavgw128:
4324 case clang::X86::BI__builtin_ia32_pavgb256:
4325 case clang::X86::BI__builtin_ia32_pavgw256:
4326 case clang::X86::BI__builtin_ia32_pavgb512:
4327 case clang::X86::BI__builtin_ia32_pavgw512:
4329 llvm::APIntOps::avgCeilU);
4331 case clang::X86::BI__builtin_ia32_pmaddubsw128:
4332 case clang::X86::BI__builtin_ia32_pmaddubsw256:
4333 case clang::X86::BI__builtin_ia32_pmaddubsw512:
4338 unsigned BitWidth = 2 * LoLHS.getBitWidth();
4339 return (LoLHS.zext(BitWidth) * LoRHS.sext(BitWidth))
4340 .sadd_sat((HiLHS.zext(BitWidth) * HiRHS.sext(BitWidth)));
4343 case clang::X86::BI__builtin_ia32_pmaddwd128:
4344 case clang::X86::BI__builtin_ia32_pmaddwd256:
4345 case clang::X86::BI__builtin_ia32_pmaddwd512:
4350 unsigned BitWidth = 2 * LoLHS.getBitWidth();
4351 return (LoLHS.sext(BitWidth) * LoRHS.sext(BitWidth)) +
4352 (HiLHS.sext(BitWidth) * HiRHS.sext(BitWidth));
4355 case clang::X86::BI__builtin_ia32_pmulhuw128:
4356 case clang::X86::BI__builtin_ia32_pmulhuw256:
4357 case clang::X86::BI__builtin_ia32_pmulhuw512:
4359 llvm::APIntOps::mulhu);
4361 case clang::X86::BI__builtin_ia32_pmulhw128:
4362 case clang::X86::BI__builtin_ia32_pmulhw256:
4363 case clang::X86::BI__builtin_ia32_pmulhw512:
4365 llvm::APIntOps::mulhs);
4367 case clang::X86::BI__builtin_ia32_psllv2di:
4368 case clang::X86::BI__builtin_ia32_psllv4di:
4369 case clang::X86::BI__builtin_ia32_psllv4si:
4370 case clang::X86::BI__builtin_ia32_psllv8di:
4371 case clang::X86::BI__builtin_ia32_psllv8hi:
4372 case clang::X86::BI__builtin_ia32_psllv8si:
4373 case clang::X86::BI__builtin_ia32_psllv16hi:
4374 case clang::X86::BI__builtin_ia32_psllv16si:
4375 case clang::X86::BI__builtin_ia32_psllv32hi:
4376 case clang::X86::BI__builtin_ia32_psllwi128:
4377 case clang::X86::BI__builtin_ia32_psllwi256:
4378 case clang::X86::BI__builtin_ia32_psllwi512:
4379 case clang::X86::BI__builtin_ia32_pslldi128:
4380 case clang::X86::BI__builtin_ia32_pslldi256:
4381 case clang::X86::BI__builtin_ia32_pslldi512:
4382 case clang::X86::BI__builtin_ia32_psllqi128:
4383 case clang::X86::BI__builtin_ia32_psllqi256:
4384 case clang::X86::BI__builtin_ia32_psllqi512:
4387 if (RHS.uge(LHS.getBitWidth())) {
4388 return APInt::getZero(LHS.getBitWidth());
4390 return LHS.shl(RHS.getZExtValue());
4393 case clang::X86::BI__builtin_ia32_psrav4si:
4394 case clang::X86::BI__builtin_ia32_psrav8di:
4395 case clang::X86::BI__builtin_ia32_psrav8hi:
4396 case clang::X86::BI__builtin_ia32_psrav8si:
4397 case clang::X86::BI__builtin_ia32_psrav16hi:
4398 case clang::X86::BI__builtin_ia32_psrav16si:
4399 case clang::X86::BI__builtin_ia32_psrav32hi:
4400 case clang::X86::BI__builtin_ia32_psravq128:
4401 case clang::X86::BI__builtin_ia32_psravq256:
4402 case clang::X86::BI__builtin_ia32_psrawi128:
4403 case clang::X86::BI__builtin_ia32_psrawi256:
4404 case clang::X86::BI__builtin_ia32_psrawi512:
4405 case clang::X86::BI__builtin_ia32_psradi128:
4406 case clang::X86::BI__builtin_ia32_psradi256:
4407 case clang::X86::BI__builtin_ia32_psradi512:
4408 case clang::X86::BI__builtin_ia32_psraqi128:
4409 case clang::X86::BI__builtin_ia32_psraqi256:
4410 case clang::X86::BI__builtin_ia32_psraqi512:
4413 if (RHS.uge(LHS.getBitWidth())) {
4414 return LHS.ashr(LHS.getBitWidth() - 1);
4416 return LHS.ashr(RHS.getZExtValue());
4419 case clang::X86::BI__builtin_ia32_psrlv2di:
4420 case clang::X86::BI__builtin_ia32_psrlv4di:
4421 case clang::X86::BI__builtin_ia32_psrlv4si:
4422 case clang::X86::BI__builtin_ia32_psrlv8di:
4423 case clang::X86::BI__builtin_ia32_psrlv8hi:
4424 case clang::X86::BI__builtin_ia32_psrlv8si:
4425 case clang::X86::BI__builtin_ia32_psrlv16hi:
4426 case clang::X86::BI__builtin_ia32_psrlv16si:
4427 case clang::X86::BI__builtin_ia32_psrlv32hi:
4428 case clang::X86::BI__builtin_ia32_psrlwi128:
4429 case clang::X86::BI__builtin_ia32_psrlwi256:
4430 case clang::X86::BI__builtin_ia32_psrlwi512:
4431 case clang::X86::BI__builtin_ia32_psrldi128:
4432 case clang::X86::BI__builtin_ia32_psrldi256:
4433 case clang::X86::BI__builtin_ia32_psrldi512:
4434 case clang::X86::BI__builtin_ia32_psrlqi128:
4435 case clang::X86::BI__builtin_ia32_psrlqi256:
4436 case clang::X86::BI__builtin_ia32_psrlqi512:
4439 if (RHS.uge(LHS.getBitWidth())) {
4440 return APInt::getZero(LHS.getBitWidth());
4442 return LHS.lshr(RHS.getZExtValue());
4444 case clang::X86::BI__builtin_ia32_packsswb128:
4445 case clang::X86::BI__builtin_ia32_packsswb256:
4446 case clang::X86::BI__builtin_ia32_packsswb512:
4447 case clang::X86::BI__builtin_ia32_packssdw128:
4448 case clang::X86::BI__builtin_ia32_packssdw256:
4449 case clang::X86::BI__builtin_ia32_packssdw512:
4451 return APInt(Src).truncSSat(Src.getBitWidth() / 2);
4453 case clang::X86::BI__builtin_ia32_packusdw128:
4454 case clang::X86::BI__builtin_ia32_packusdw256:
4455 case clang::X86::BI__builtin_ia32_packusdw512:
4456 case clang::X86::BI__builtin_ia32_packuswb128:
4457 case clang::X86::BI__builtin_ia32_packuswb256:
4458 case clang::X86::BI__builtin_ia32_packuswb512:
4460 unsigned DstBits = Src.getBitWidth() / 2;
4461 if (Src.isNegative())
4462 return APInt::getZero(DstBits);
4463 if (Src.isIntN(DstBits))
4464 return APInt(Src).trunc(DstBits);
4465 return APInt::getAllOnes(DstBits);
4468 case clang::X86::BI__builtin_ia32_selectss_128:
4469 case clang::X86::BI__builtin_ia32_selectsd_128:
4470 case clang::X86::BI__builtin_ia32_selectsh_128:
4471 case clang::X86::BI__builtin_ia32_selectsbf_128:
4473 case clang::X86::BI__builtin_ia32_vprotbi:
4474 case clang::X86::BI__builtin_ia32_vprotdi:
4475 case clang::X86::BI__builtin_ia32_vprotqi:
4476 case clang::X86::BI__builtin_ia32_vprotwi:
4477 case clang::X86::BI__builtin_ia32_prold128:
4478 case clang::X86::BI__builtin_ia32_prold256:
4479 case clang::X86::BI__builtin_ia32_prold512:
4480 case clang::X86::BI__builtin_ia32_prolq128:
4481 case clang::X86::BI__builtin_ia32_prolq256:
4482 case clang::X86::BI__builtin_ia32_prolq512:
4485 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotl(RHS); });
4487 case clang::X86::BI__builtin_ia32_prord128:
4488 case clang::X86::BI__builtin_ia32_prord256:
4489 case clang::X86::BI__builtin_ia32_prord512:
4490 case clang::X86::BI__builtin_ia32_prorq128:
4491 case clang::X86::BI__builtin_ia32_prorq256:
4492 case clang::X86::BI__builtin_ia32_prorq512:
4495 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotr(RHS); });
4497 case Builtin::BI__builtin_elementwise_max:
4498 case Builtin::BI__builtin_elementwise_min:
4501 case clang::X86::BI__builtin_ia32_phaddw128:
4502 case clang::X86::BI__builtin_ia32_phaddw256:
4503 case clang::X86::BI__builtin_ia32_phaddd128:
4504 case clang::X86::BI__builtin_ia32_phaddd256:
4507 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
4508 case clang::X86::BI__builtin_ia32_phaddsw128:
4509 case clang::X86::BI__builtin_ia32_phaddsw256:
4512 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.sadd_sat(RHS); });
4513 case clang::X86::BI__builtin_ia32_phsubw128:
4514 case clang::X86::BI__builtin_ia32_phsubw256:
4515 case clang::X86::BI__builtin_ia32_phsubd128:
4516 case clang::X86::BI__builtin_ia32_phsubd256:
4519 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS - RHS; });
4520 case clang::X86::BI__builtin_ia32_phsubsw128:
4521 case clang::X86::BI__builtin_ia32_phsubsw256:
4524 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.ssub_sat(RHS); });
4525 case clang::X86::BI__builtin_ia32_haddpd:
4526 case clang::X86::BI__builtin_ia32_haddps:
4527 case clang::X86::BI__builtin_ia32_haddpd256:
4528 case clang::X86::BI__builtin_ia32_haddps256:
4531 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
4536 case clang::X86::BI__builtin_ia32_hsubpd:
4537 case clang::X86::BI__builtin_ia32_hsubps:
4538 case clang::X86::BI__builtin_ia32_hsubpd256:
4539 case clang::X86::BI__builtin_ia32_hsubps256:
4542 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
4544 F.subtract(RHS, RM);
4547 case clang::X86::BI__builtin_ia32_addsubpd:
4548 case clang::X86::BI__builtin_ia32_addsubps:
4549 case clang::X86::BI__builtin_ia32_addsubpd256:
4550 case clang::X86::BI__builtin_ia32_addsubps256:
4553 case clang::X86::BI__builtin_ia32_pmuldq128:
4554 case clang::X86::BI__builtin_ia32_pmuldq256:
4555 case clang::X86::BI__builtin_ia32_pmuldq512:
4560 return llvm::APIntOps::mulsExtended(LoLHS, LoRHS);
4563 case clang::X86::BI__builtin_ia32_pmuludq128:
4564 case clang::X86::BI__builtin_ia32_pmuludq256:
4565 case clang::X86::BI__builtin_ia32_pmuludq512:
4570 return llvm::APIntOps::muluExtended(LoLHS, LoRHS);
4573 case Builtin::BI__builtin_elementwise_fma:
4577 llvm::RoundingMode RM) {
4579 F.fusedMultiplyAdd(Y, Z, RM);
4583 case X86::BI__builtin_ia32_vpmadd52luq128:
4584 case X86::BI__builtin_ia32_vpmadd52luq256:
4585 case X86::BI__builtin_ia32_vpmadd52luq512:
4588 return A + (B.trunc(52) *
C.trunc(52)).zext(64);
4590 case X86::BI__builtin_ia32_vpmadd52huq128:
4591 case X86::BI__builtin_ia32_vpmadd52huq256:
4592 case X86::BI__builtin_ia32_vpmadd52huq512:
4595 return A + llvm::APIntOps::mulhu(B.trunc(52),
C.trunc(52)).zext(64);
4598 case X86::BI__builtin_ia32_vpshldd128:
4599 case X86::BI__builtin_ia32_vpshldd256:
4600 case X86::BI__builtin_ia32_vpshldd512:
4601 case X86::BI__builtin_ia32_vpshldq128:
4602 case X86::BI__builtin_ia32_vpshldq256:
4603 case X86::BI__builtin_ia32_vpshldq512:
4604 case X86::BI__builtin_ia32_vpshldw128:
4605 case X86::BI__builtin_ia32_vpshldw256:
4606 case X86::BI__builtin_ia32_vpshldw512:
4610 return llvm::APIntOps::fshl(Hi, Lo, Amt);
4613 case X86::BI__builtin_ia32_vpshrdd128:
4614 case X86::BI__builtin_ia32_vpshrdd256:
4615 case X86::BI__builtin_ia32_vpshrdd512:
4616 case X86::BI__builtin_ia32_vpshrdq128:
4617 case X86::BI__builtin_ia32_vpshrdq256:
4618 case X86::BI__builtin_ia32_vpshrdq512:
4619 case X86::BI__builtin_ia32_vpshrdw128:
4620 case X86::BI__builtin_ia32_vpshrdw256:
4621 case X86::BI__builtin_ia32_vpshrdw512:
4626 return llvm::APIntOps::fshr(Hi, Lo, Amt);
4628 case X86::BI__builtin_ia32_vpconflictsi_128:
4629 case X86::BI__builtin_ia32_vpconflictsi_256:
4630 case X86::BI__builtin_ia32_vpconflictsi_512:
4631 case X86::BI__builtin_ia32_vpconflictdi_128:
4632 case X86::BI__builtin_ia32_vpconflictdi_256:
4633 case X86::BI__builtin_ia32_vpconflictdi_512:
4635 case clang::X86::BI__builtin_ia32_blendpd:
4636 case clang::X86::BI__builtin_ia32_blendpd256:
4637 case clang::X86::BI__builtin_ia32_blendps:
4638 case clang::X86::BI__builtin_ia32_blendps256:
4639 case clang::X86::BI__builtin_ia32_pblendw128:
4640 case clang::X86::BI__builtin_ia32_pblendw256:
4641 case clang::X86::BI__builtin_ia32_pblendd128:
4642 case clang::X86::BI__builtin_ia32_pblendd256:
4645 case clang::X86::BI__builtin_ia32_blendvpd:
4646 case clang::X86::BI__builtin_ia32_blendvpd256:
4647 case clang::X86::BI__builtin_ia32_blendvps:
4648 case clang::X86::BI__builtin_ia32_blendvps256:
4652 llvm::RoundingMode) {
return C.isNegative() ?
T : F; });
4654 case clang::X86::BI__builtin_ia32_pblendvb128:
4655 case clang::X86::BI__builtin_ia32_pblendvb256:
4658 return ((
APInt)
C).isNegative() ?
T : F;
4660 case X86::BI__builtin_ia32_ptestz128:
4661 case X86::BI__builtin_ia32_ptestz256:
4662 case X86::BI__builtin_ia32_vtestzps:
4663 case X86::BI__builtin_ia32_vtestzps256:
4664 case X86::BI__builtin_ia32_vtestzpd:
4665 case X86::BI__builtin_ia32_vtestzpd256:
4668 [](
const APInt &A,
const APInt &B) {
return (A & B) == 0; });
4669 case X86::BI__builtin_ia32_ptestc128:
4670 case X86::BI__builtin_ia32_ptestc256:
4671 case X86::BI__builtin_ia32_vtestcps:
4672 case X86::BI__builtin_ia32_vtestcps256:
4673 case X86::BI__builtin_ia32_vtestcpd:
4674 case X86::BI__builtin_ia32_vtestcpd256:
4677 [](
const APInt &A,
const APInt &B) {
return (~A & B) == 0; });
4678 case X86::BI__builtin_ia32_ptestnzc128:
4679 case X86::BI__builtin_ia32_ptestnzc256:
4680 case X86::BI__builtin_ia32_vtestnzcps:
4681 case X86::BI__builtin_ia32_vtestnzcps256:
4682 case X86::BI__builtin_ia32_vtestnzcpd:
4683 case X86::BI__builtin_ia32_vtestnzcpd256:
4686 return ((A & B) != 0) && ((~A & B) != 0);
4688 case X86::BI__builtin_ia32_selectb_128:
4689 case X86::BI__builtin_ia32_selectb_256:
4690 case X86::BI__builtin_ia32_selectb_512:
4691 case X86::BI__builtin_ia32_selectw_128:
4692 case X86::BI__builtin_ia32_selectw_256:
4693 case X86::BI__builtin_ia32_selectw_512:
4694 case X86::BI__builtin_ia32_selectd_128:
4695 case X86::BI__builtin_ia32_selectd_256:
4696 case X86::BI__builtin_ia32_selectd_512:
4697 case X86::BI__builtin_ia32_selectq_128:
4698 case X86::BI__builtin_ia32_selectq_256:
4699 case X86::BI__builtin_ia32_selectq_512:
4700 case X86::BI__builtin_ia32_selectph_128:
4701 case X86::BI__builtin_ia32_selectph_256:
4702 case X86::BI__builtin_ia32_selectph_512:
4703 case X86::BI__builtin_ia32_selectpbf_128:
4704 case X86::BI__builtin_ia32_selectpbf_256:
4705 case X86::BI__builtin_ia32_selectpbf_512:
4706 case X86::BI__builtin_ia32_selectps_128:
4707 case X86::BI__builtin_ia32_selectps_256:
4708 case X86::BI__builtin_ia32_selectps_512:
4709 case X86::BI__builtin_ia32_selectpd_128:
4710 case X86::BI__builtin_ia32_selectpd_256:
4711 case X86::BI__builtin_ia32_selectpd_512:
4714 case X86::BI__builtin_ia32_shufps:
4715 case X86::BI__builtin_ia32_shufps256:
4716 case X86::BI__builtin_ia32_shufps512:
4718 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
4719 unsigned NumElemPerLane = 4;
4720 unsigned NumSelectableElems = NumElemPerLane / 2;
4721 unsigned BitsPerElem = 2;
4722 unsigned IndexMask = 0x3;
4723 unsigned MaskBits = 8;
4724 unsigned Lane = DstIdx / NumElemPerLane;
4725 unsigned ElemInLane = DstIdx % NumElemPerLane;
4726 unsigned LaneOffset = Lane * NumElemPerLane;
4727 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
4728 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
4729 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
4730 return std::pair<unsigned, int>{SrcIdx,
4731 static_cast<int>(LaneOffset + Index)};
4733 case X86::BI__builtin_ia32_shufpd:
4734 case X86::BI__builtin_ia32_shufpd256:
4735 case X86::BI__builtin_ia32_shufpd512:
4737 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
4738 unsigned NumElemPerLane = 2;
4739 unsigned NumSelectableElems = NumElemPerLane / 2;
4740 unsigned BitsPerElem = 1;
4741 unsigned IndexMask = 0x1;
4742 unsigned MaskBits = 8;
4743 unsigned Lane = DstIdx / NumElemPerLane;
4744 unsigned ElemInLane = DstIdx % NumElemPerLane;
4745 unsigned LaneOffset = Lane * NumElemPerLane;
4746 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
4747 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
4748 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
4749 return std::pair<unsigned, int>{SrcIdx,
4750 static_cast<int>(LaneOffset + Index)};
4752 case X86::BI__builtin_ia32_insertps128:
4754 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Mask) {
4756 if ((Mask & (1 << DstIdx)) != 0) {
4757 return std::pair<unsigned, int>{0, -1};
4761 unsigned SrcElem = (Mask >> 6) & 0x3;
4762 unsigned DstElem = (Mask >> 4) & 0x3;
4763 if (DstIdx == DstElem) {
4765 return std::pair<unsigned, int>{1,
static_cast<int>(SrcElem)};
4768 return std::pair<unsigned, int>{0,
static_cast<int>(DstIdx)};
4771 case X86::BI__builtin_ia32_permvarsi256:
4772 case X86::BI__builtin_ia32_permvarsf256:
4773 case X86::BI__builtin_ia32_permvardf512:
4774 case X86::BI__builtin_ia32_permvardi512:
4775 case X86::BI__builtin_ia32_permvarhi128:
4777 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
4778 int Offset = ShuffleMask & 0x7;
4779 return std::pair<unsigned, int>{0, Offset};
4781 case X86::BI__builtin_ia32_permvarqi128:
4782 case X86::BI__builtin_ia32_permvarhi256:
4783 case X86::BI__builtin_ia32_permvarsi512:
4784 case X86::BI__builtin_ia32_permvarsf512:
4786 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
4787 int Offset = ShuffleMask & 0xF;
4788 return std::pair<unsigned, int>{0, Offset};
4790 case X86::BI__builtin_ia32_permvardi256:
4791 case X86::BI__builtin_ia32_permvardf256:
4793 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
4794 int Offset = ShuffleMask & 0x3;
4795 return std::pair<unsigned, int>{0, Offset};
4797 case X86::BI__builtin_ia32_permvarqi256:
4798 case X86::BI__builtin_ia32_permvarhi512:
4800 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
4801 int Offset = ShuffleMask & 0x1F;
4802 return std::pair<unsigned, int>{0, Offset};
4804 case X86::BI__builtin_ia32_permvarqi512:
4806 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
4807 int Offset = ShuffleMask & 0x3F;
4808 return std::pair<unsigned, int>{0, Offset};
4810 case X86::BI__builtin_ia32_vpermi2varq128:
4811 case X86::BI__builtin_ia32_vpermi2varpd128:
4813 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
4814 int Offset = ShuffleMask & 0x1;
4815 unsigned SrcIdx = (ShuffleMask >> 1) & 0x1;
4816 return std::pair<unsigned, int>{SrcIdx, Offset};
4818 case X86::BI__builtin_ia32_vpermi2vard128:
4819 case X86::BI__builtin_ia32_vpermi2varps128:
4820 case X86::BI__builtin_ia32_vpermi2varq256:
4821 case X86::BI__builtin_ia32_vpermi2varpd256:
4823 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
4824 int Offset = ShuffleMask & 0x3;
4825 unsigned SrcIdx = (ShuffleMask >> 2) & 0x1;
4826 return std::pair<unsigned, int>{SrcIdx, Offset};
4828 case X86::BI__builtin_ia32_vpermi2varhi128:
4829 case X86::BI__builtin_ia32_vpermi2vard256:
4830 case X86::BI__builtin_ia32_vpermi2varps256:
4831 case X86::BI__builtin_ia32_vpermi2varq512:
4832 case X86::BI__builtin_ia32_vpermi2varpd512:
4834 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
4835 int Offset = ShuffleMask & 0x7;
4836 unsigned SrcIdx = (ShuffleMask >> 3) & 0x1;
4837 return std::pair<unsigned, int>{SrcIdx, Offset};
4839 case X86::BI__builtin_ia32_vpermi2varqi128:
4840 case X86::BI__builtin_ia32_vpermi2varhi256:
4841 case X86::BI__builtin_ia32_vpermi2vard512:
4842 case X86::BI__builtin_ia32_vpermi2varps512:
4844 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
4845 int Offset = ShuffleMask & 0xF;
4846 unsigned SrcIdx = (ShuffleMask >> 4) & 0x1;
4847 return std::pair<unsigned, int>{SrcIdx, Offset};
4849 case X86::BI__builtin_ia32_vpermi2varqi256:
4850 case X86::BI__builtin_ia32_vpermi2varhi512:
4852 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
4853 int Offset = ShuffleMask & 0x1F;
4854 unsigned SrcIdx = (ShuffleMask >> 5) & 0x1;
4855 return std::pair<unsigned, int>{SrcIdx, Offset};
4857 case X86::BI__builtin_ia32_vpermi2varqi512:
4859 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
4860 int Offset = ShuffleMask & 0x3F;
4861 unsigned SrcIdx = (ShuffleMask >> 6) & 0x1;
4862 return std::pair<unsigned, int>{SrcIdx, Offset};
4864 case X86::BI__builtin_ia32_pshufb128:
4865 case X86::BI__builtin_ia32_pshufb256:
4866 case X86::BI__builtin_ia32_pshufb512:
4868 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
4869 uint8_t Ctlb =
static_cast<uint8_t
>(ShuffleMask);
4871 return std::make_pair(0, -1);
4873 unsigned LaneBase = (DstIdx / 16) * 16;
4874 unsigned SrcOffset = Ctlb & 0x0F;
4875 unsigned SrcIdx = LaneBase + SrcOffset;
4876 return std::make_pair(0,
static_cast<int>(SrcIdx));
4879 case X86::BI__builtin_ia32_pshuflw:
4880 case X86::BI__builtin_ia32_pshuflw256:
4881 case X86::BI__builtin_ia32_pshuflw512:
4883 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
4884 unsigned LaneBase = (DstIdx / 8) * 8;
4885 unsigned LaneIdx = DstIdx % 8;
4887 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
4888 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
4891 return std::make_pair(0,
static_cast<int>(DstIdx));
4894 case X86::BI__builtin_ia32_pshufhw:
4895 case X86::BI__builtin_ia32_pshufhw256:
4896 case X86::BI__builtin_ia32_pshufhw512:
4898 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
4899 unsigned LaneBase = (DstIdx / 8) * 8;
4900 unsigned LaneIdx = DstIdx % 8;
4902 unsigned Sel = (ShuffleMask >> (2 * (LaneIdx - 4))) & 0x3;
4903 return std::make_pair(0,
static_cast<int>(LaneBase + 4 + Sel));
4906 return std::make_pair(0,
static_cast<int>(DstIdx));
4909 case X86::BI__builtin_ia32_pshufd:
4910 case X86::BI__builtin_ia32_pshufd256:
4911 case X86::BI__builtin_ia32_pshufd512:
4912 case X86::BI__builtin_ia32_vpermilps:
4913 case X86::BI__builtin_ia32_vpermilps256:
4914 case X86::BI__builtin_ia32_vpermilps512:
4916 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
4917 unsigned LaneBase = (DstIdx / 4) * 4;
4918 unsigned LaneIdx = DstIdx % 4;
4919 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
4920 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
4923 case X86::BI__builtin_ia32_vpermilvarpd:
4924 case X86::BI__builtin_ia32_vpermilvarpd256:
4925 case X86::BI__builtin_ia32_vpermilvarpd512:
4927 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
4928 unsigned NumElemPerLane = 2;
4929 unsigned Lane = DstIdx / NumElemPerLane;
4930 unsigned Offset = ShuffleMask & 0b10 ? 1 : 0;
4931 return std::make_pair(
4932 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
4935 case X86::BI__builtin_ia32_vpermilvarps:
4936 case X86::BI__builtin_ia32_vpermilvarps256:
4937 case X86::BI__builtin_ia32_vpermilvarps512:
4939 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
4940 unsigned NumElemPerLane = 4;
4941 unsigned Lane = DstIdx / NumElemPerLane;
4942 unsigned Offset = ShuffleMask & 0b11;
4943 return std::make_pair(
4944 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
4947 case X86::BI__builtin_ia32_vpermilpd:
4948 case X86::BI__builtin_ia32_vpermilpd256:
4949 case X86::BI__builtin_ia32_vpermilpd512:
4951 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Control) {
4952 unsigned NumElemPerLane = 2;
4953 unsigned BitsPerElem = 1;
4954 unsigned MaskBits = 8;
4955 unsigned IndexMask = 0x1;
4956 unsigned Lane = DstIdx / NumElemPerLane;
4957 unsigned LaneOffset = Lane * NumElemPerLane;
4958 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
4959 unsigned Index = (Control >> BitIndex) & IndexMask;
4960 return std::make_pair(0,
static_cast<int>(LaneOffset + Index));
4963 case X86::BI__builtin_ia32_vpmultishiftqb128:
4964 case X86::BI__builtin_ia32_vpmultishiftqb256:
4965 case X86::BI__builtin_ia32_vpmultishiftqb512:
4967 case X86::BI__builtin_ia32_kandqi:
4968 case X86::BI__builtin_ia32_kandhi:
4969 case X86::BI__builtin_ia32_kandsi:
4970 case X86::BI__builtin_ia32_kanddi:
4973 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS & RHS; });
4975 case X86::BI__builtin_ia32_kandnqi:
4976 case X86::BI__builtin_ia32_kandnhi:
4977 case X86::BI__builtin_ia32_kandnsi:
4978 case X86::BI__builtin_ia32_kandndi:
4981 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~LHS & RHS; });
4983 case X86::BI__builtin_ia32_korqi:
4984 case X86::BI__builtin_ia32_korhi:
4985 case X86::BI__builtin_ia32_korsi:
4986 case X86::BI__builtin_ia32_kordi:
4989 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS | RHS; });
4991 case X86::BI__builtin_ia32_kxnorqi:
4992 case X86::BI__builtin_ia32_kxnorhi:
4993 case X86::BI__builtin_ia32_kxnorsi:
4994 case X86::BI__builtin_ia32_kxnordi:
4997 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~(LHS ^ RHS); });
4999 case X86::BI__builtin_ia32_kxorqi:
5000 case X86::BI__builtin_ia32_kxorhi:
5001 case X86::BI__builtin_ia32_kxorsi:
5002 case X86::BI__builtin_ia32_kxordi:
5005 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS ^ RHS; });
5007 case X86::BI__builtin_ia32_knotqi:
5008 case X86::BI__builtin_ia32_knothi:
5009 case X86::BI__builtin_ia32_knotsi:
5010 case X86::BI__builtin_ia32_knotdi:
5012 S, OpPC,
Call, [](
const APSInt &Src) {
return ~Src; });
5014 case X86::BI__builtin_ia32_kaddqi:
5015 case X86::BI__builtin_ia32_kaddhi:
5016 case X86::BI__builtin_ia32_kaddsi:
5017 case X86::BI__builtin_ia32_kadddi:
5020 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
5022 case X86::BI__builtin_ia32_kunpckhi:
5023 case X86::BI__builtin_ia32_kunpckdi:
5024 case X86::BI__builtin_ia32_kunpcksi:
5029 unsigned BW = A.getBitWidth();
5030 return APSInt(A.trunc(BW / 2).concat(B.trunc(BW / 2)),
5034 case X86::BI__builtin_ia32_phminposuw128:
5037 case X86::BI__builtin_ia32_psraq128:
5038 case X86::BI__builtin_ia32_psraq256:
5039 case X86::BI__builtin_ia32_psraq512:
5040 case X86::BI__builtin_ia32_psrad128:
5041 case X86::BI__builtin_ia32_psrad256:
5042 case X86::BI__builtin_ia32_psrad512:
5043 case X86::BI__builtin_ia32_psraw128:
5044 case X86::BI__builtin_ia32_psraw256:
5045 case X86::BI__builtin_ia32_psraw512:
5048 [](
const APInt &Elt, uint64_t Count) {
return Elt.ashr(Count); },
5049 [](
const APInt &Elt,
unsigned Width) {
return Elt.ashr(Width - 1); });
5051 case X86::BI__builtin_ia32_psllq128:
5052 case X86::BI__builtin_ia32_psllq256:
5053 case X86::BI__builtin_ia32_psllq512:
5054 case X86::BI__builtin_ia32_pslld128:
5055 case X86::BI__builtin_ia32_pslld256:
5056 case X86::BI__builtin_ia32_pslld512:
5057 case X86::BI__builtin_ia32_psllw128:
5058 case X86::BI__builtin_ia32_psllw256:
5059 case X86::BI__builtin_ia32_psllw512:
5062 [](
const APInt &Elt, uint64_t Count) {
return Elt.shl(Count); },
5063 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
5065 case X86::BI__builtin_ia32_psrlq128:
5066 case X86::BI__builtin_ia32_psrlq256:
5067 case X86::BI__builtin_ia32_psrlq512:
5068 case X86::BI__builtin_ia32_psrld128:
5069 case X86::BI__builtin_ia32_psrld256:
5070 case X86::BI__builtin_ia32_psrld512:
5071 case X86::BI__builtin_ia32_psrlw128:
5072 case X86::BI__builtin_ia32_psrlw256:
5073 case X86::BI__builtin_ia32_psrlw512:
5076 [](
const APInt &Elt, uint64_t Count) {
return Elt.lshr(Count); },
5077 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
5079 case X86::BI__builtin_ia32_pternlogd128_mask:
5080 case X86::BI__builtin_ia32_pternlogd256_mask:
5081 case X86::BI__builtin_ia32_pternlogd512_mask:
5082 case X86::BI__builtin_ia32_pternlogq128_mask:
5083 case X86::BI__builtin_ia32_pternlogq256_mask:
5084 case X86::BI__builtin_ia32_pternlogq512_mask:
5086 case X86::BI__builtin_ia32_pternlogd128_maskz:
5087 case X86::BI__builtin_ia32_pternlogd256_maskz:
5088 case X86::BI__builtin_ia32_pternlogd512_maskz:
5089 case X86::BI__builtin_ia32_pternlogq128_maskz:
5090 case X86::BI__builtin_ia32_pternlogq256_maskz:
5091 case X86::BI__builtin_ia32_pternlogq512_maskz:
5093 case Builtin::BI__builtin_elementwise_fshl:
5095 llvm::APIntOps::fshl);
5096 case Builtin::BI__builtin_elementwise_fshr:
5098 llvm::APIntOps::fshr);
5100 case X86::BI__builtin_ia32_shuf_f32x4_256:
5101 case X86::BI__builtin_ia32_shuf_i32x4_256:
5102 case X86::BI__builtin_ia32_shuf_f64x2_256:
5103 case X86::BI__builtin_ia32_shuf_i64x2_256:
5104 case X86::BI__builtin_ia32_shuf_f32x4:
5105 case X86::BI__builtin_ia32_shuf_i32x4:
5106 case X86::BI__builtin_ia32_shuf_f64x2:
5107 case X86::BI__builtin_ia32_shuf_i64x2: {
5113 unsigned LaneBits = 128u;
5114 unsigned NumLanes = (NumElems * ElemBits) / LaneBits;
5115 unsigned NumElemsPerLane = LaneBits / ElemBits;
5119 [NumLanes, NumElemsPerLane](
unsigned DstIdx,
unsigned ShuffleMask) {
5121 unsigned BitsPerElem = NumLanes / 2;
5122 unsigned IndexMask = (1u << BitsPerElem) - 1;
5123 unsigned Lane = DstIdx / NumElemsPerLane;
5124 unsigned SrcIdx = (Lane < NumLanes / 2) ? 0 : 1;
5125 unsigned BitIdx = BitsPerElem * Lane;
5126 unsigned SrcLaneIdx = (ShuffleMask >> BitIdx) & IndexMask;
5127 unsigned ElemInLane = DstIdx % NumElemsPerLane;
5128 unsigned IdxToPick = SrcLaneIdx * NumElemsPerLane + ElemInLane;
5129 return std::pair<unsigned, int>{SrcIdx, IdxToPick};
5133 case X86::BI__builtin_ia32_insertf32x4_256:
5134 case X86::BI__builtin_ia32_inserti32x4_256:
5135 case X86::BI__builtin_ia32_insertf64x2_256:
5136 case X86::BI__builtin_ia32_inserti64x2_256:
5137 case X86::BI__builtin_ia32_insertf32x4:
5138 case X86::BI__builtin_ia32_inserti32x4:
5139 case X86::BI__builtin_ia32_insertf64x2_512:
5140 case X86::BI__builtin_ia32_inserti64x2_512:
5141 case X86::BI__builtin_ia32_insertf32x8:
5142 case X86::BI__builtin_ia32_inserti32x8:
5143 case X86::BI__builtin_ia32_insertf64x4:
5144 case X86::BI__builtin_ia32_inserti64x4:
5145 case X86::BI__builtin_ia32_vinsertf128_ps256:
5146 case X86::BI__builtin_ia32_vinsertf128_pd256:
5147 case X86::BI__builtin_ia32_vinsertf128_si256:
5148 case X86::BI__builtin_ia32_insert128i256:
5151 case clang::X86::BI__builtin_ia32_vcvtps2ph:
5152 case clang::X86::BI__builtin_ia32_vcvtps2ph256:
5155 case X86::BI__builtin_ia32_vec_ext_v4hi:
5156 case X86::BI__builtin_ia32_vec_ext_v16qi:
5157 case X86::BI__builtin_ia32_vec_ext_v8hi:
5158 case X86::BI__builtin_ia32_vec_ext_v4si:
5159 case X86::BI__builtin_ia32_vec_ext_v2di:
5160 case X86::BI__builtin_ia32_vec_ext_v32qi:
5161 case X86::BI__builtin_ia32_vec_ext_v16hi:
5162 case X86::BI__builtin_ia32_vec_ext_v8si:
5163 case X86::BI__builtin_ia32_vec_ext_v4di:
5164 case X86::BI__builtin_ia32_vec_ext_v4sf:
5167 case X86::BI__builtin_ia32_vec_set_v4hi:
5168 case X86::BI__builtin_ia32_vec_set_v16qi:
5169 case X86::BI__builtin_ia32_vec_set_v8hi:
5170 case X86::BI__builtin_ia32_vec_set_v4si:
5171 case X86::BI__builtin_ia32_vec_set_v2di:
5172 case X86::BI__builtin_ia32_vec_set_v32qi:
5173 case X86::BI__builtin_ia32_vec_set_v16hi:
5174 case X86::BI__builtin_ia32_vec_set_v8si:
5175 case X86::BI__builtin_ia32_vec_set_v4di:
5178 case X86::BI__builtin_ia32_cvtb2mask128:
5179 case X86::BI__builtin_ia32_cvtb2mask256:
5180 case X86::BI__builtin_ia32_cvtb2mask512:
5181 case X86::BI__builtin_ia32_cvtw2mask128:
5182 case X86::BI__builtin_ia32_cvtw2mask256:
5183 case X86::BI__builtin_ia32_cvtw2mask512:
5184 case X86::BI__builtin_ia32_cvtd2mask128:
5185 case X86::BI__builtin_ia32_cvtd2mask256:
5186 case X86::BI__builtin_ia32_cvtd2mask512:
5187 case X86::BI__builtin_ia32_cvtq2mask128:
5188 case X86::BI__builtin_ia32_cvtq2mask256:
5189 case X86::BI__builtin_ia32_cvtq2mask512:
5192 case X86::BI__builtin_ia32_cmpb128_mask:
5193 case X86::BI__builtin_ia32_cmpw128_mask:
5194 case X86::BI__builtin_ia32_cmpd128_mask:
5195 case X86::BI__builtin_ia32_cmpq128_mask:
5196 case X86::BI__builtin_ia32_cmpb256_mask:
5197 case X86::BI__builtin_ia32_cmpw256_mask:
5198 case X86::BI__builtin_ia32_cmpd256_mask:
5199 case X86::BI__builtin_ia32_cmpq256_mask:
5200 case X86::BI__builtin_ia32_cmpb512_mask:
5201 case X86::BI__builtin_ia32_cmpw512_mask:
5202 case X86::BI__builtin_ia32_cmpd512_mask:
5203 case X86::BI__builtin_ia32_cmpq512_mask:
5207 case X86::BI__builtin_ia32_ucmpb128_mask:
5208 case X86::BI__builtin_ia32_ucmpw128_mask:
5209 case X86::BI__builtin_ia32_ucmpd128_mask:
5210 case X86::BI__builtin_ia32_ucmpq128_mask:
5211 case X86::BI__builtin_ia32_ucmpb256_mask:
5212 case X86::BI__builtin_ia32_ucmpw256_mask:
5213 case X86::BI__builtin_ia32_ucmpd256_mask:
5214 case X86::BI__builtin_ia32_ucmpq256_mask:
5215 case X86::BI__builtin_ia32_ucmpb512_mask:
5216 case X86::BI__builtin_ia32_ucmpw512_mask:
5217 case X86::BI__builtin_ia32_ucmpd512_mask:
5218 case X86::BI__builtin_ia32_ucmpq512_mask:
5222 case X86::BI__builtin_ia32_vpshufbitqmb128_mask:
5223 case X86::BI__builtin_ia32_vpshufbitqmb256_mask:
5224 case X86::BI__builtin_ia32_vpshufbitqmb512_mask:
5227 case X86::BI__builtin_ia32_pslldqi128_byteshift:
5228 case X86::BI__builtin_ia32_pslldqi256_byteshift:
5229 case X86::BI__builtin_ia32_pslldqi512_byteshift:
5236 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
5237 unsigned LaneBase = (DstIdx / 16) * 16;
5238 unsigned LaneIdx = DstIdx % 16;
5239 if (LaneIdx < Shift)
5240 return std::make_pair(0, -1);
5242 return std::make_pair(0,
5243 static_cast<int>(LaneBase + LaneIdx - Shift));
5246 case X86::BI__builtin_ia32_psrldqi128_byteshift:
5247 case X86::BI__builtin_ia32_psrldqi256_byteshift:
5248 case X86::BI__builtin_ia32_psrldqi512_byteshift:
5255 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
5256 unsigned LaneBase = (DstIdx / 16) * 16;
5257 unsigned LaneIdx = DstIdx % 16;
5258 if (LaneIdx + Shift < 16)
5259 return std::make_pair(0,
5260 static_cast<int>(LaneBase + LaneIdx + Shift));
5262 return std::make_pair(0, -1);
5265 case X86::BI__builtin_ia32_palignr128:
5266 case X86::BI__builtin_ia32_palignr256:
5267 case X86::BI__builtin_ia32_palignr512:
5269 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Shift) {
5271 unsigned VecIdx = 1;
5274 int Lane = DstIdx / 16;
5275 int Offset = DstIdx % 16;
5278 unsigned ShiftedIdx = Offset + (Shift & 0xFF);
5279 if (ShiftedIdx < 16) {
5280 ElemIdx = ShiftedIdx + (Lane * 16);
5281 }
else if (ShiftedIdx < 32) {
5283 ElemIdx = (ShiftedIdx - 16) + (Lane * 16);
5286 return std::pair<unsigned, int>{VecIdx, ElemIdx};
5289 case X86::BI__builtin_ia32_alignd128:
5290 case X86::BI__builtin_ia32_alignd256:
5291 case X86::BI__builtin_ia32_alignd512:
5292 case X86::BI__builtin_ia32_alignq128:
5293 case X86::BI__builtin_ia32_alignq256:
5294 case X86::BI__builtin_ia32_alignq512: {
5295 unsigned NumElems =
Call->getType()->castAs<
VectorType>()->getNumElements();
5297 S, OpPC,
Call, [NumElems](
unsigned DstIdx,
unsigned Shift) {
5298 unsigned Imm = Shift & 0xFF;
5299 unsigned EffectiveShift = Imm & (NumElems - 1);
5300 unsigned SourcePos = DstIdx + EffectiveShift;
5301 unsigned VecIdx = SourcePos < NumElems ? 1u : 0u;
5302 unsigned ElemIdx = SourcePos & (NumElems - 1);
5303 return std::pair<unsigned, int>{VecIdx,
static_cast<int>(ElemIdx)};
5309 diag::note_invalid_subexpr_in_const_expr)
5315 llvm_unreachable(
"Unhandled builtin ID");