4254 uint32_t BuiltinID) {
4259 switch (BuiltinID) {
4260 case Builtin::BI__builtin_is_constant_evaluated:
4263 case Builtin::BI__builtin_assume:
4264 case Builtin::BI__assume:
4267 case Builtin::BI__builtin_strcmp:
4268 case Builtin::BIstrcmp:
4269 case Builtin::BI__builtin_strncmp:
4270 case Builtin::BIstrncmp:
4271 case Builtin::BI__builtin_wcsncmp:
4272 case Builtin::BIwcsncmp:
4273 case Builtin::BI__builtin_wcscmp:
4274 case Builtin::BIwcscmp:
4277 case Builtin::BI__builtin_strlen:
4278 case Builtin::BIstrlen:
4279 case Builtin::BI__builtin_wcslen:
4280 case Builtin::BIwcslen:
4283 case Builtin::BI__builtin_nan:
4284 case Builtin::BI__builtin_nanf:
4285 case Builtin::BI__builtin_nanl:
4286 case Builtin::BI__builtin_nanf16:
4287 case Builtin::BI__builtin_nanf128:
4290 case Builtin::BI__builtin_nans:
4291 case Builtin::BI__builtin_nansf:
4292 case Builtin::BI__builtin_nansl:
4293 case Builtin::BI__builtin_nansf16:
4294 case Builtin::BI__builtin_nansf128:
4297 case Builtin::BI__builtin_huge_val:
4298 case Builtin::BI__builtin_huge_valf:
4299 case Builtin::BI__builtin_huge_vall:
4300 case Builtin::BI__builtin_huge_valf16:
4301 case Builtin::BI__builtin_huge_valf128:
4302 case Builtin::BI__builtin_inf:
4303 case Builtin::BI__builtin_inff:
4304 case Builtin::BI__builtin_infl:
4305 case Builtin::BI__builtin_inff16:
4306 case Builtin::BI__builtin_inff128:
4309 case Builtin::BI__builtin_copysign:
4310 case Builtin::BI__builtin_copysignf:
4311 case Builtin::BI__builtin_copysignl:
4312 case Builtin::BI__builtin_copysignf128:
4315 case Builtin::BI__builtin_fmin:
4316 case Builtin::BI__builtin_fminf:
4317 case Builtin::BI__builtin_fminl:
4318 case Builtin::BI__builtin_fminf16:
4319 case Builtin::BI__builtin_fminf128:
4322 case Builtin::BI__builtin_fminimum_num:
4323 case Builtin::BI__builtin_fminimum_numf:
4324 case Builtin::BI__builtin_fminimum_numl:
4325 case Builtin::BI__builtin_fminimum_numf16:
4326 case Builtin::BI__builtin_fminimum_numf128:
4329 case Builtin::BI__builtin_fmax:
4330 case Builtin::BI__builtin_fmaxf:
4331 case Builtin::BI__builtin_fmaxl:
4332 case Builtin::BI__builtin_fmaxf16:
4333 case Builtin::BI__builtin_fmaxf128:
4336 case Builtin::BI__builtin_fmaximum_num:
4337 case Builtin::BI__builtin_fmaximum_numf:
4338 case Builtin::BI__builtin_fmaximum_numl:
4339 case Builtin::BI__builtin_fmaximum_numf16:
4340 case Builtin::BI__builtin_fmaximum_numf128:
4343 case Builtin::BI__builtin_isnan:
4346 case Builtin::BI__builtin_issignaling:
4349 case Builtin::BI__builtin_isinf:
4352 case Builtin::BI__builtin_isinf_sign:
4355 case Builtin::BI__builtin_isfinite:
4358 case Builtin::BI__builtin_isnormal:
4361 case Builtin::BI__builtin_issubnormal:
4364 case Builtin::BI__builtin_iszero:
4367 case Builtin::BI__builtin_signbit:
4368 case Builtin::BI__builtin_signbitf:
4369 case Builtin::BI__builtin_signbitl:
4372 case Builtin::BI__builtin_isgreater:
4373 case Builtin::BI__builtin_isgreaterequal:
4374 case Builtin::BI__builtin_isless:
4375 case Builtin::BI__builtin_islessequal:
4376 case Builtin::BI__builtin_islessgreater:
4377 case Builtin::BI__builtin_isunordered:
4380 case Builtin::BI__builtin_isfpclass:
4383 case Builtin::BI__builtin_fpclassify:
4386 case Builtin::BI__builtin_fabs:
4387 case Builtin::BI__builtin_fabsf:
4388 case Builtin::BI__builtin_fabsl:
4389 case Builtin::BI__builtin_fabsf128:
4392 case Builtin::BI__builtin_abs:
4393 case Builtin::BI__builtin_labs:
4394 case Builtin::BI__builtin_llabs:
4397 case Builtin::BI__builtin_popcount:
4398 case Builtin::BI__builtin_popcountl:
4399 case Builtin::BI__builtin_popcountll:
4400 case Builtin::BI__builtin_popcountg:
4401 case Builtin::BI__popcnt16:
4402 case Builtin::BI__popcnt:
4403 case Builtin::BI__popcnt64:
4406 case Builtin::BI__builtin_parity:
4407 case Builtin::BI__builtin_parityl:
4408 case Builtin::BI__builtin_parityll:
4411 return APInt(Val.getBitWidth(), Val.popcount() % 2);
4413 case Builtin::BI__builtin_clrsb:
4414 case Builtin::BI__builtin_clrsbl:
4415 case Builtin::BI__builtin_clrsbll:
4418 return APInt(Val.getBitWidth(),
4419 Val.getBitWidth() - Val.getSignificantBits());
4421 case Builtin::BI__builtin_bitreverseg:
4422 case Builtin::BI__builtin_bitreverse8:
4423 case Builtin::BI__builtin_bitreverse16:
4424 case Builtin::BI__builtin_bitreverse32:
4425 case Builtin::BI__builtin_bitreverse64:
4427 S, OpPC,
Call, [](
const APSInt &Val) {
return Val.reverseBits(); });
4429 case Builtin::BI__builtin_classify_type:
4432 case Builtin::BI__builtin_expect:
4433 case Builtin::BI__builtin_expect_with_probability:
4436 case Builtin::BI__builtin_rotateleft8:
4437 case Builtin::BI__builtin_rotateleft16:
4438 case Builtin::BI__builtin_rotateleft32:
4439 case Builtin::BI__builtin_rotateleft64:
4440 case Builtin::BI__builtin_stdc_rotate_left:
4441 case Builtin::BI_rotl8:
4442 case Builtin::BI_rotl16:
4443 case Builtin::BI_rotl:
4444 case Builtin::BI_lrotl:
4445 case Builtin::BI_rotl64:
4446 case Builtin::BI__builtin_rotateright8:
4447 case Builtin::BI__builtin_rotateright16:
4448 case Builtin::BI__builtin_rotateright32:
4449 case Builtin::BI__builtin_rotateright64:
4450 case Builtin::BI__builtin_stdc_rotate_right:
4451 case Builtin::BI_rotr8:
4452 case Builtin::BI_rotr16:
4453 case Builtin::BI_rotr:
4454 case Builtin::BI_lrotr:
4455 case Builtin::BI_rotr64: {
4458 switch (BuiltinID) {
4459 case Builtin::BI__builtin_rotateright8:
4460 case Builtin::BI__builtin_rotateright16:
4461 case Builtin::BI__builtin_rotateright32:
4462 case Builtin::BI__builtin_rotateright64:
4463 case Builtin::BI__builtin_stdc_rotate_right:
4464 case Builtin::BI_rotr8:
4465 case Builtin::BI_rotr16:
4466 case Builtin::BI_rotr:
4467 case Builtin::BI_lrotr:
4468 case Builtin::BI_rotr64:
4469 IsRotateRight =
true;
4472 IsRotateRight =
false;
4479 return IsRotateRight ?
Value.rotr(Amount.getZExtValue())
4480 :
Value.rotl(Amount.getZExtValue());
4484 case Builtin::BIstdc_leading_zeros_uc:
4485 case Builtin::BIstdc_leading_zeros_us:
4486 case Builtin::BIstdc_leading_zeros_ui:
4487 case Builtin::BIstdc_leading_zeros_ul:
4488 case Builtin::BIstdc_leading_zeros_ull:
4489 case Builtin::BIstdc_leading_zeros:
4490 case Builtin::BI__builtin_stdc_leading_zeros: {
4493 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4494 return APInt(ResWidth, Val.countl_zero());
4498 case Builtin::BIstdc_leading_ones_uc:
4499 case Builtin::BIstdc_leading_ones_us:
4500 case Builtin::BIstdc_leading_ones_ui:
4501 case Builtin::BIstdc_leading_ones_ul:
4502 case Builtin::BIstdc_leading_ones_ull:
4503 case Builtin::BIstdc_leading_ones:
4504 case Builtin::BI__builtin_stdc_leading_ones: {
4507 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4508 return APInt(ResWidth, Val.countl_one());
4512 case Builtin::BIstdc_trailing_zeros_uc:
4513 case Builtin::BIstdc_trailing_zeros_us:
4514 case Builtin::BIstdc_trailing_zeros_ui:
4515 case Builtin::BIstdc_trailing_zeros_ul:
4516 case Builtin::BIstdc_trailing_zeros_ull:
4517 case Builtin::BIstdc_trailing_zeros:
4518 case Builtin::BI__builtin_stdc_trailing_zeros: {
4521 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4522 return APInt(ResWidth, Val.countr_zero());
4526 case Builtin::BIstdc_trailing_ones_uc:
4527 case Builtin::BIstdc_trailing_ones_us:
4528 case Builtin::BIstdc_trailing_ones_ui:
4529 case Builtin::BIstdc_trailing_ones_ul:
4530 case Builtin::BIstdc_trailing_ones_ull:
4531 case Builtin::BIstdc_trailing_ones:
4532 case Builtin::BI__builtin_stdc_trailing_ones: {
4535 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4536 return APInt(ResWidth, Val.countr_one());
4540 case Builtin::BIstdc_first_leading_zero_uc:
4541 case Builtin::BIstdc_first_leading_zero_us:
4542 case Builtin::BIstdc_first_leading_zero_ui:
4543 case Builtin::BIstdc_first_leading_zero_ul:
4544 case Builtin::BIstdc_first_leading_zero_ull:
4545 case Builtin::BIstdc_first_leading_zero:
4546 case Builtin::BI__builtin_stdc_first_leading_zero: {
4549 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4550 return APInt(ResWidth, Val.isAllOnes() ? 0 : Val.countl_one() + 1);
4554 case Builtin::BIstdc_first_leading_one_uc:
4555 case Builtin::BIstdc_first_leading_one_us:
4556 case Builtin::BIstdc_first_leading_one_ui:
4557 case Builtin::BIstdc_first_leading_one_ul:
4558 case Builtin::BIstdc_first_leading_one_ull:
4559 case Builtin::BIstdc_first_leading_one:
4560 case Builtin::BI__builtin_stdc_first_leading_one: {
4563 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4564 return APInt(ResWidth, Val.isZero() ? 0 : Val.countl_zero() + 1);
4568 case Builtin::BIstdc_first_trailing_zero_uc:
4569 case Builtin::BIstdc_first_trailing_zero_us:
4570 case Builtin::BIstdc_first_trailing_zero_ui:
4571 case Builtin::BIstdc_first_trailing_zero_ul:
4572 case Builtin::BIstdc_first_trailing_zero_ull:
4573 case Builtin::BIstdc_first_trailing_zero:
4574 case Builtin::BI__builtin_stdc_first_trailing_zero: {
4577 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4578 return APInt(ResWidth, Val.isAllOnes() ? 0 : Val.countr_one() + 1);
4582 case Builtin::BIstdc_first_trailing_one_uc:
4583 case Builtin::BIstdc_first_trailing_one_us:
4584 case Builtin::BIstdc_first_trailing_one_ui:
4585 case Builtin::BIstdc_first_trailing_one_ul:
4586 case Builtin::BIstdc_first_trailing_one_ull:
4587 case Builtin::BIstdc_first_trailing_one:
4588 case Builtin::BI__builtin_stdc_first_trailing_one: {
4591 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4592 return APInt(ResWidth, Val.isZero() ? 0 : Val.countr_zero() + 1);
4596 case Builtin::BIstdc_count_zeros_uc:
4597 case Builtin::BIstdc_count_zeros_us:
4598 case Builtin::BIstdc_count_zeros_ui:
4599 case Builtin::BIstdc_count_zeros_ul:
4600 case Builtin::BIstdc_count_zeros_ull:
4601 case Builtin::BIstdc_count_zeros:
4602 case Builtin::BI__builtin_stdc_count_zeros: {
4605 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4606 unsigned BitWidth = Val.getBitWidth();
4607 return APInt(ResWidth, BitWidth - Val.popcount());
4611 case Builtin::BIstdc_count_ones_uc:
4612 case Builtin::BIstdc_count_ones_us:
4613 case Builtin::BIstdc_count_ones_ui:
4614 case Builtin::BIstdc_count_ones_ul:
4615 case Builtin::BIstdc_count_ones_ull:
4616 case Builtin::BIstdc_count_ones:
4617 case Builtin::BI__builtin_stdc_count_ones: {
4620 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4621 return APInt(ResWidth, Val.popcount());
4625 case Builtin::BIstdc_has_single_bit_uc:
4626 case Builtin::BIstdc_has_single_bit_us:
4627 case Builtin::BIstdc_has_single_bit_ui:
4628 case Builtin::BIstdc_has_single_bit_ul:
4629 case Builtin::BIstdc_has_single_bit_ull:
4630 case Builtin::BIstdc_has_single_bit:
4631 case Builtin::BI__builtin_stdc_has_single_bit: {
4634 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4635 return APInt(ResWidth, Val.popcount() == 1 ? 1 : 0);
4639 case Builtin::BIstdc_bit_width_uc:
4640 case Builtin::BIstdc_bit_width_us:
4641 case Builtin::BIstdc_bit_width_ui:
4642 case Builtin::BIstdc_bit_width_ul:
4643 case Builtin::BIstdc_bit_width_ull:
4644 case Builtin::BIstdc_bit_width:
4645 case Builtin::BI__builtin_stdc_bit_width: {
4648 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4649 unsigned BitWidth = Val.getBitWidth();
4650 return APInt(ResWidth, BitWidth - Val.countl_zero());
4654 case Builtin::BIstdc_bit_floor_uc:
4655 case Builtin::BIstdc_bit_floor_us:
4656 case Builtin::BIstdc_bit_floor_ui:
4657 case Builtin::BIstdc_bit_floor_ul:
4658 case Builtin::BIstdc_bit_floor_ull:
4659 case Builtin::BIstdc_bit_floor:
4660 case Builtin::BI__builtin_stdc_bit_floor:
4663 unsigned BitWidth = Val.getBitWidth();
4665 return APInt::getZero(BitWidth);
4666 return APInt::getOneBitSet(BitWidth,
4667 BitWidth - Val.countl_zero() - 1);
4670 case Builtin::BIstdc_bit_ceil_uc:
4671 case Builtin::BIstdc_bit_ceil_us:
4672 case Builtin::BIstdc_bit_ceil_ui:
4673 case Builtin::BIstdc_bit_ceil_ul:
4674 case Builtin::BIstdc_bit_ceil_ull:
4675 case Builtin::BIstdc_bit_ceil:
4676 case Builtin::BI__builtin_stdc_bit_ceil:
4679 unsigned BitWidth = Val.getBitWidth();
4681 return APInt(BitWidth, 1);
4683 APInt ValMinusOne =
V - 1;
4684 unsigned LeadingZeros = ValMinusOne.countl_zero();
4685 if (LeadingZeros == 0)
4686 return APInt(BitWidth, 0);
4687 return APInt::getOneBitSet(BitWidth, BitWidth - LeadingZeros);
4690 case Builtin::BI__builtin_ffs:
4691 case Builtin::BI__builtin_ffsl:
4692 case Builtin::BI__builtin_ffsll:
4695 return APInt(Val.getBitWidth(),
4696 Val.isZero() ? 0u : Val.countTrailingZeros() + 1u);
4699 case Builtin::BIaddressof:
4700 case Builtin::BI__addressof:
4701 case Builtin::BI__builtin_addressof:
4705 case Builtin::BIas_const:
4706 case Builtin::BIforward:
4707 case Builtin::BIforward_like:
4708 case Builtin::BImove:
4709 case Builtin::BImove_if_noexcept:
4713 case Builtin::BI__builtin_eh_return_data_regno:
4716 case Builtin::BI__builtin_launder:
4720 case Builtin::BI__builtin_add_overflow:
4721 case Builtin::BI__builtin_sub_overflow:
4722 case Builtin::BI__builtin_mul_overflow:
4723 case Builtin::BI__builtin_sadd_overflow:
4724 case Builtin::BI__builtin_uadd_overflow:
4725 case Builtin::BI__builtin_uaddl_overflow:
4726 case Builtin::BI__builtin_uaddll_overflow:
4727 case Builtin::BI__builtin_usub_overflow:
4728 case Builtin::BI__builtin_usubl_overflow:
4729 case Builtin::BI__builtin_usubll_overflow:
4730 case Builtin::BI__builtin_umul_overflow:
4731 case Builtin::BI__builtin_umull_overflow:
4732 case Builtin::BI__builtin_umulll_overflow:
4733 case Builtin::BI__builtin_saddl_overflow:
4734 case Builtin::BI__builtin_saddll_overflow:
4735 case Builtin::BI__builtin_ssub_overflow:
4736 case Builtin::BI__builtin_ssubl_overflow:
4737 case Builtin::BI__builtin_ssubll_overflow:
4738 case Builtin::BI__builtin_smul_overflow:
4739 case Builtin::BI__builtin_smull_overflow:
4740 case Builtin::BI__builtin_smulll_overflow:
4743 case Builtin::BI__builtin_addcb:
4744 case Builtin::BI__builtin_addcs:
4745 case Builtin::BI__builtin_addc:
4746 case Builtin::BI__builtin_addcl:
4747 case Builtin::BI__builtin_addcll:
4748 case Builtin::BI__builtin_subcb:
4749 case Builtin::BI__builtin_subcs:
4750 case Builtin::BI__builtin_subc:
4751 case Builtin::BI__builtin_subcl:
4752 case Builtin::BI__builtin_subcll:
4755 case Builtin::BI__builtin_clz:
4756 case Builtin::BI__builtin_clzl:
4757 case Builtin::BI__builtin_clzll:
4758 case Builtin::BI__builtin_clzs:
4759 case Builtin::BI__builtin_clzg:
4760 case Builtin::BI__lzcnt16:
4761 case Builtin::BI__lzcnt:
4762 case Builtin::BI__lzcnt64:
4765 case Builtin::BI__builtin_ctz:
4766 case Builtin::BI__builtin_ctzl:
4767 case Builtin::BI__builtin_ctzll:
4768 case Builtin::BI__builtin_ctzs:
4769 case Builtin::BI__builtin_ctzg:
4772 case Builtin::BI__builtin_elementwise_clzg:
4773 case Builtin::BI__builtin_elementwise_ctzg:
4776 case Builtin::BI__builtin_bswapg:
4777 case Builtin::BI__builtin_bswap16:
4778 case Builtin::BI__builtin_bswap32:
4779 case Builtin::BI__builtin_bswap64:
4782 case Builtin::BI__atomic_always_lock_free:
4783 case Builtin::BI__atomic_is_lock_free:
4786 case Builtin::BI__c11_atomic_is_lock_free:
4789 case Builtin::BI__builtin_complex:
4792 case Builtin::BI__builtin_is_aligned:
4793 case Builtin::BI__builtin_align_up:
4794 case Builtin::BI__builtin_align_down:
4797 case Builtin::BI__builtin_assume_aligned:
4800 case clang::X86::BI__builtin_ia32_crc32qi:
4802 case clang::X86::BI__builtin_ia32_crc32hi:
4804 case clang::X86::BI__builtin_ia32_crc32si:
4806 case clang::X86::BI__builtin_ia32_crc32di:
4809 case clang::X86::BI__builtin_ia32_bextr_u32:
4810 case clang::X86::BI__builtin_ia32_bextr_u64:
4811 case clang::X86::BI__builtin_ia32_bextri_u32:
4812 case clang::X86::BI__builtin_ia32_bextri_u64:
4815 unsigned BitWidth = Val.getBitWidth();
4816 uint64_t Shift = Idx.extractBitsAsZExtValue(8, 0);
4817 uint64_t Length = Idx.extractBitsAsZExtValue(8, 8);
4818 if (Length > BitWidth) {
4823 if (Length == 0 || Shift >= BitWidth)
4824 return APInt(BitWidth, 0);
4826 uint64_t
Result = Val.getZExtValue() >> Shift;
4827 Result &= llvm::maskTrailingOnes<uint64_t>(Length);
4831 case clang::X86::BI__builtin_ia32_bzhi_si:
4832 case clang::X86::BI__builtin_ia32_bzhi_di:
4835 unsigned BitWidth = Val.getBitWidth();
4836 uint64_t Index = Idx.extractBitsAsZExtValue(8, 0);
4839 if (Index < BitWidth)
4840 Result.clearHighBits(BitWidth - Index);
4845 case clang::X86::BI__builtin_ia32_ktestcqi:
4846 case clang::X86::BI__builtin_ia32_ktestchi:
4847 case clang::X86::BI__builtin_ia32_ktestcsi:
4848 case clang::X86::BI__builtin_ia32_ktestcdi:
4851 return APInt(
sizeof(
unsigned char) * 8, (~A & B) == 0);
4854 case clang::X86::BI__builtin_ia32_ktestzqi:
4855 case clang::X86::BI__builtin_ia32_ktestzhi:
4856 case clang::X86::BI__builtin_ia32_ktestzsi:
4857 case clang::X86::BI__builtin_ia32_ktestzdi:
4860 return APInt(
sizeof(
unsigned char) * 8, (A & B) == 0);
4863 case clang::X86::BI__builtin_ia32_kortestcqi:
4864 case clang::X86::BI__builtin_ia32_kortestchi:
4865 case clang::X86::BI__builtin_ia32_kortestcsi:
4866 case clang::X86::BI__builtin_ia32_kortestcdi:
4869 return APInt(
sizeof(
unsigned char) * 8, ~(A | B) == 0);
4872 case clang::X86::BI__builtin_ia32_kortestzqi:
4873 case clang::X86::BI__builtin_ia32_kortestzhi:
4874 case clang::X86::BI__builtin_ia32_kortestzsi:
4875 case clang::X86::BI__builtin_ia32_kortestzdi:
4878 return APInt(
sizeof(
unsigned char) * 8, (A | B) == 0);
4881 case clang::X86::BI__builtin_ia32_kshiftliqi:
4882 case clang::X86::BI__builtin_ia32_kshiftlihi:
4883 case clang::X86::BI__builtin_ia32_kshiftlisi:
4884 case clang::X86::BI__builtin_ia32_kshiftlidi:
4887 unsigned Amt = RHS.getZExtValue() & 0xFF;
4888 if (Amt >= LHS.getBitWidth())
4889 return APInt::getZero(LHS.getBitWidth());
4890 return LHS.shl(Amt);
4893 case clang::X86::BI__builtin_ia32_kshiftriqi:
4894 case clang::X86::BI__builtin_ia32_kshiftrihi:
4895 case clang::X86::BI__builtin_ia32_kshiftrisi:
4896 case clang::X86::BI__builtin_ia32_kshiftridi:
4899 unsigned Amt = RHS.getZExtValue() & 0xFF;
4900 if (Amt >= LHS.getBitWidth())
4901 return APInt::getZero(LHS.getBitWidth());
4902 return LHS.lshr(Amt);
4905 case clang::X86::BI__builtin_ia32_lzcnt_u16:
4906 case clang::X86::BI__builtin_ia32_lzcnt_u32:
4907 case clang::X86::BI__builtin_ia32_lzcnt_u64:
4910 return APInt(Src.getBitWidth(), Src.countLeadingZeros());
4913 case clang::X86::BI__builtin_ia32_tzcnt_u16:
4914 case clang::X86::BI__builtin_ia32_tzcnt_u32:
4915 case clang::X86::BI__builtin_ia32_tzcnt_u64:
4918 return APInt(Src.getBitWidth(), Src.countTrailingZeros());
4921 case clang::X86::BI__builtin_ia32_pdep_si:
4922 case clang::X86::BI__builtin_ia32_pdep_di:
4925 unsigned BitWidth = Val.getBitWidth();
4928 for (
unsigned I = 0, P = 0; I != BitWidth; ++I) {
4930 Result.setBitVal(I, Val[P++]);
4936 case clang::X86::BI__builtin_ia32_pext_si:
4937 case clang::X86::BI__builtin_ia32_pext_di:
4940 unsigned BitWidth = Val.getBitWidth();
4943 for (
unsigned I = 0, P = 0; I != BitWidth; ++I) {
4945 Result.setBitVal(P++, Val[I]);
4951 case clang::X86::BI__builtin_ia32_addcarryx_u32:
4952 case clang::X86::BI__builtin_ia32_addcarryx_u64:
4953 case clang::X86::BI__builtin_ia32_subborrow_u32:
4954 case clang::X86::BI__builtin_ia32_subborrow_u64:
4958 case Builtin::BI__builtin_os_log_format_buffer_size:
4961 case Builtin::BI__builtin_ptrauth_string_discriminator:
4964 case Builtin::BI__builtin_infer_alloc_token:
4967 case Builtin::BI__noop:
4971 case Builtin::BI__builtin_operator_new:
4974 case Builtin::BI__builtin_operator_delete:
4977 case Builtin::BI__arithmetic_fence:
4980 case Builtin::BI__builtin_reduce_add:
4981 case Builtin::BI__builtin_reduce_mul:
4982 case Builtin::BI__builtin_reduce_and:
4983 case Builtin::BI__builtin_reduce_or:
4984 case Builtin::BI__builtin_reduce_xor:
4985 case Builtin::BI__builtin_reduce_min:
4986 case Builtin::BI__builtin_reduce_max:
4989 case Builtin::BI__builtin_elementwise_popcount:
4992 return APInt(Src.getBitWidth(), Src.popcount());
4994 case Builtin::BI__builtin_elementwise_bitreverse:
4996 S, OpPC,
Call, [](
const APSInt &Src) {
return Src.reverseBits(); });
4998 case Builtin::BI__builtin_elementwise_abs:
5001 case Builtin::BI__builtin_memcpy:
5002 case Builtin::BImemcpy:
5003 case Builtin::BI__builtin_wmemcpy:
5004 case Builtin::BIwmemcpy:
5005 case Builtin::BI__builtin_memmove:
5006 case Builtin::BImemmove:
5007 case Builtin::BI__builtin_wmemmove:
5008 case Builtin::BIwmemmove:
5011 case Builtin::BI__builtin_memcmp:
5012 case Builtin::BImemcmp:
5013 case Builtin::BI__builtin_bcmp:
5014 case Builtin::BIbcmp:
5015 case Builtin::BI__builtin_wmemcmp:
5016 case Builtin::BIwmemcmp:
5019 case Builtin::BImemchr:
5020 case Builtin::BI__builtin_memchr:
5021 case Builtin::BIstrchr:
5022 case Builtin::BI__builtin_strchr:
5023 case Builtin::BIwmemchr:
5024 case Builtin::BI__builtin_wmemchr:
5025 case Builtin::BIwcschr:
5026 case Builtin::BI__builtin_wcschr:
5027 case Builtin::BI__builtin_char_memchr:
5030 case Builtin::BI__builtin_object_size:
5031 case Builtin::BI__builtin_dynamic_object_size:
5034 case Builtin::BI__builtin_is_within_lifetime:
5037 case Builtin::BI__builtin_elementwise_add_sat:
5040 return LHS.isSigned() ? LHS.sadd_sat(RHS) : LHS.uadd_sat(RHS);
5043 case Builtin::BI__builtin_elementwise_sub_sat:
5046 return LHS.isSigned() ? LHS.ssub_sat(RHS) : LHS.usub_sat(RHS);
5048 case X86::BI__builtin_ia32_extract128i256:
5049 case X86::BI__builtin_ia32_vextractf128_pd256:
5050 case X86::BI__builtin_ia32_vextractf128_ps256:
5051 case X86::BI__builtin_ia32_vextractf128_si256:
5054 case X86::BI__builtin_ia32_extractf32x4_256_mask:
5055 case X86::BI__builtin_ia32_extractf32x4_mask:
5056 case X86::BI__builtin_ia32_extractf32x8_mask:
5057 case X86::BI__builtin_ia32_extractf64x2_256_mask:
5058 case X86::BI__builtin_ia32_extractf64x2_512_mask:
5059 case X86::BI__builtin_ia32_extractf64x4_mask:
5060 case X86::BI__builtin_ia32_extracti32x4_256_mask:
5061 case X86::BI__builtin_ia32_extracti32x4_mask:
5062 case X86::BI__builtin_ia32_extracti32x8_mask:
5063 case X86::BI__builtin_ia32_extracti64x2_256_mask:
5064 case X86::BI__builtin_ia32_extracti64x2_512_mask:
5065 case X86::BI__builtin_ia32_extracti64x4_mask:
5068 case clang::X86::BI__builtin_ia32_pmulhrsw128:
5069 case clang::X86::BI__builtin_ia32_pmulhrsw256:
5070 case clang::X86::BI__builtin_ia32_pmulhrsw512:
5073 return (llvm::APIntOps::mulsExtended(LHS, RHS).ashr(14) + 1)
5074 .extractBits(16, 1);
5077 case clang::X86::BI__builtin_ia32_movmskps:
5078 case clang::X86::BI__builtin_ia32_movmskpd:
5079 case clang::X86::BI__builtin_ia32_pmovmskb128:
5080 case clang::X86::BI__builtin_ia32_pmovmskb256:
5081 case clang::X86::BI__builtin_ia32_movmskps256:
5082 case clang::X86::BI__builtin_ia32_movmskpd256: {
5086 case X86::BI__builtin_ia32_psignb128:
5087 case X86::BI__builtin_ia32_psignb256:
5088 case X86::BI__builtin_ia32_psignw128:
5089 case X86::BI__builtin_ia32_psignw256:
5090 case X86::BI__builtin_ia32_psignd128:
5091 case X86::BI__builtin_ia32_psignd256:
5095 return APInt::getZero(AElem.getBitWidth());
5096 if (BElem.isNegative())
5101 case clang::X86::BI__builtin_ia32_pavgb128:
5102 case clang::X86::BI__builtin_ia32_pavgw128:
5103 case clang::X86::BI__builtin_ia32_pavgb256:
5104 case clang::X86::BI__builtin_ia32_pavgw256:
5105 case clang::X86::BI__builtin_ia32_pavgb512:
5106 case clang::X86::BI__builtin_ia32_pavgw512:
5108 llvm::APIntOps::avgCeilU);
5110 case clang::X86::BI__builtin_ia32_pmaddubsw128:
5111 case clang::X86::BI__builtin_ia32_pmaddubsw256:
5112 case clang::X86::BI__builtin_ia32_pmaddubsw512:
5117 unsigned BitWidth = 2 * LoLHS.getBitWidth();
5118 return (LoLHS.zext(BitWidth) * LoRHS.sext(BitWidth))
5119 .sadd_sat((HiLHS.zext(BitWidth) * HiRHS.sext(BitWidth)));
5122 case clang::X86::BI__builtin_ia32_pmaddwd128:
5123 case clang::X86::BI__builtin_ia32_pmaddwd256:
5124 case clang::X86::BI__builtin_ia32_pmaddwd512:
5129 unsigned BitWidth = 2 * LoLHS.getBitWidth();
5130 return (LoLHS.sext(BitWidth) * LoRHS.sext(BitWidth)) +
5131 (HiLHS.sext(BitWidth) * HiRHS.sext(BitWidth));
5134 case clang::X86::BI__builtin_ia32_dbpsadbw128:
5135 case clang::X86::BI__builtin_ia32_dbpsadbw256:
5136 case clang::X86::BI__builtin_ia32_dbpsadbw512:
5139 case clang::X86::BI__builtin_ia32_pmulhuw128:
5140 case clang::X86::BI__builtin_ia32_pmulhuw256:
5141 case clang::X86::BI__builtin_ia32_pmulhuw512:
5143 llvm::APIntOps::mulhu);
5145 case clang::X86::BI__builtin_ia32_pmulhw128:
5146 case clang::X86::BI__builtin_ia32_pmulhw256:
5147 case clang::X86::BI__builtin_ia32_pmulhw512:
5149 llvm::APIntOps::mulhs);
5151 case clang::X86::BI__builtin_ia32_psllv2di:
5152 case clang::X86::BI__builtin_ia32_psllv4di:
5153 case clang::X86::BI__builtin_ia32_psllv4si:
5154 case clang::X86::BI__builtin_ia32_psllv8di:
5155 case clang::X86::BI__builtin_ia32_psllv8hi:
5156 case clang::X86::BI__builtin_ia32_psllv8si:
5157 case clang::X86::BI__builtin_ia32_psllv16hi:
5158 case clang::X86::BI__builtin_ia32_psllv16si:
5159 case clang::X86::BI__builtin_ia32_psllv32hi:
5160 case clang::X86::BI__builtin_ia32_psllwi128:
5161 case clang::X86::BI__builtin_ia32_psllwi256:
5162 case clang::X86::BI__builtin_ia32_psllwi512:
5163 case clang::X86::BI__builtin_ia32_pslldi128:
5164 case clang::X86::BI__builtin_ia32_pslldi256:
5165 case clang::X86::BI__builtin_ia32_pslldi512:
5166 case clang::X86::BI__builtin_ia32_psllqi128:
5167 case clang::X86::BI__builtin_ia32_psllqi256:
5168 case clang::X86::BI__builtin_ia32_psllqi512:
5171 if (RHS.uge(LHS.getBitWidth())) {
5172 return APInt::getZero(LHS.getBitWidth());
5174 return LHS.shl(RHS.getZExtValue());
5177 case clang::X86::BI__builtin_ia32_psrav4si:
5178 case clang::X86::BI__builtin_ia32_psrav8di:
5179 case clang::X86::BI__builtin_ia32_psrav8hi:
5180 case clang::X86::BI__builtin_ia32_psrav8si:
5181 case clang::X86::BI__builtin_ia32_psrav16hi:
5182 case clang::X86::BI__builtin_ia32_psrav16si:
5183 case clang::X86::BI__builtin_ia32_psrav32hi:
5184 case clang::X86::BI__builtin_ia32_psravq128:
5185 case clang::X86::BI__builtin_ia32_psravq256:
5186 case clang::X86::BI__builtin_ia32_psrawi128:
5187 case clang::X86::BI__builtin_ia32_psrawi256:
5188 case clang::X86::BI__builtin_ia32_psrawi512:
5189 case clang::X86::BI__builtin_ia32_psradi128:
5190 case clang::X86::BI__builtin_ia32_psradi256:
5191 case clang::X86::BI__builtin_ia32_psradi512:
5192 case clang::X86::BI__builtin_ia32_psraqi128:
5193 case clang::X86::BI__builtin_ia32_psraqi256:
5194 case clang::X86::BI__builtin_ia32_psraqi512:
5197 if (RHS.uge(LHS.getBitWidth())) {
5198 return LHS.ashr(LHS.getBitWidth() - 1);
5200 return LHS.ashr(RHS.getZExtValue());
5203 case clang::X86::BI__builtin_ia32_psrlv2di:
5204 case clang::X86::BI__builtin_ia32_psrlv4di:
5205 case clang::X86::BI__builtin_ia32_psrlv4si:
5206 case clang::X86::BI__builtin_ia32_psrlv8di:
5207 case clang::X86::BI__builtin_ia32_psrlv8hi:
5208 case clang::X86::BI__builtin_ia32_psrlv8si:
5209 case clang::X86::BI__builtin_ia32_psrlv16hi:
5210 case clang::X86::BI__builtin_ia32_psrlv16si:
5211 case clang::X86::BI__builtin_ia32_psrlv32hi:
5212 case clang::X86::BI__builtin_ia32_psrlwi128:
5213 case clang::X86::BI__builtin_ia32_psrlwi256:
5214 case clang::X86::BI__builtin_ia32_psrlwi512:
5215 case clang::X86::BI__builtin_ia32_psrldi128:
5216 case clang::X86::BI__builtin_ia32_psrldi256:
5217 case clang::X86::BI__builtin_ia32_psrldi512:
5218 case clang::X86::BI__builtin_ia32_psrlqi128:
5219 case clang::X86::BI__builtin_ia32_psrlqi256:
5220 case clang::X86::BI__builtin_ia32_psrlqi512:
5223 if (RHS.uge(LHS.getBitWidth())) {
5224 return APInt::getZero(LHS.getBitWidth());
5226 return LHS.lshr(RHS.getZExtValue());
5228 case clang::X86::BI__builtin_ia32_packsswb128:
5229 case clang::X86::BI__builtin_ia32_packsswb256:
5230 case clang::X86::BI__builtin_ia32_packsswb512:
5231 case clang::X86::BI__builtin_ia32_packssdw128:
5232 case clang::X86::BI__builtin_ia32_packssdw256:
5233 case clang::X86::BI__builtin_ia32_packssdw512:
5235 return APInt(Src).truncSSat(Src.getBitWidth() / 2);
5237 case clang::X86::BI__builtin_ia32_packusdw128:
5238 case clang::X86::BI__builtin_ia32_packusdw256:
5239 case clang::X86::BI__builtin_ia32_packusdw512:
5240 case clang::X86::BI__builtin_ia32_packuswb128:
5241 case clang::X86::BI__builtin_ia32_packuswb256:
5242 case clang::X86::BI__builtin_ia32_packuswb512:
5244 return APInt(Src).truncSSatU(Src.getBitWidth() / 2);
5247 case clang::X86::BI__builtin_ia32_selectss_128:
5248 case clang::X86::BI__builtin_ia32_selectsd_128:
5249 case clang::X86::BI__builtin_ia32_selectsh_128:
5250 case clang::X86::BI__builtin_ia32_selectsbf_128:
5252 case clang::X86::BI__builtin_ia32_vprotbi:
5253 case clang::X86::BI__builtin_ia32_vprotdi:
5254 case clang::X86::BI__builtin_ia32_vprotqi:
5255 case clang::X86::BI__builtin_ia32_vprotwi:
5256 case clang::X86::BI__builtin_ia32_prold128:
5257 case clang::X86::BI__builtin_ia32_prold256:
5258 case clang::X86::BI__builtin_ia32_prold512:
5259 case clang::X86::BI__builtin_ia32_prolq128:
5260 case clang::X86::BI__builtin_ia32_prolq256:
5261 case clang::X86::BI__builtin_ia32_prolq512:
5264 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotl(RHS); });
5266 case clang::X86::BI__builtin_ia32_prord128:
5267 case clang::X86::BI__builtin_ia32_prord256:
5268 case clang::X86::BI__builtin_ia32_prord512:
5269 case clang::X86::BI__builtin_ia32_prorq128:
5270 case clang::X86::BI__builtin_ia32_prorq256:
5271 case clang::X86::BI__builtin_ia32_prorq512:
5274 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotr(RHS); });
5276 case Builtin::BI__builtin_elementwise_max:
5277 case Builtin::BI__builtin_elementwise_min:
5280 case clang::X86::BI__builtin_ia32_phaddw128:
5281 case clang::X86::BI__builtin_ia32_phaddw256:
5282 case clang::X86::BI__builtin_ia32_phaddd128:
5283 case clang::X86::BI__builtin_ia32_phaddd256:
5286 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
5287 case clang::X86::BI__builtin_ia32_phaddsw128:
5288 case clang::X86::BI__builtin_ia32_phaddsw256:
5291 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.sadd_sat(RHS); });
5292 case clang::X86::BI__builtin_ia32_phsubw128:
5293 case clang::X86::BI__builtin_ia32_phsubw256:
5294 case clang::X86::BI__builtin_ia32_phsubd128:
5295 case clang::X86::BI__builtin_ia32_phsubd256:
5298 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS - RHS; });
5299 case clang::X86::BI__builtin_ia32_phsubsw128:
5300 case clang::X86::BI__builtin_ia32_phsubsw256:
5303 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.ssub_sat(RHS); });
5304 case clang::X86::BI__builtin_ia32_haddpd:
5305 case clang::X86::BI__builtin_ia32_haddps:
5306 case clang::X86::BI__builtin_ia32_haddpd256:
5307 case clang::X86::BI__builtin_ia32_haddps256:
5310 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
5315 case clang::X86::BI__builtin_ia32_hsubpd:
5316 case clang::X86::BI__builtin_ia32_hsubps:
5317 case clang::X86::BI__builtin_ia32_hsubpd256:
5318 case clang::X86::BI__builtin_ia32_hsubps256:
5321 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
5323 F.subtract(RHS, RM);
5326 case clang::X86::BI__builtin_ia32_addsubpd:
5327 case clang::X86::BI__builtin_ia32_addsubps:
5328 case clang::X86::BI__builtin_ia32_addsubpd256:
5329 case clang::X86::BI__builtin_ia32_addsubps256:
5332 case clang::X86::BI__builtin_ia32_pmuldq128:
5333 case clang::X86::BI__builtin_ia32_pmuldq256:
5334 case clang::X86::BI__builtin_ia32_pmuldq512:
5339 return llvm::APIntOps::mulsExtended(LoLHS, LoRHS);
5342 case clang::X86::BI__builtin_ia32_pmuludq128:
5343 case clang::X86::BI__builtin_ia32_pmuludq256:
5344 case clang::X86::BI__builtin_ia32_pmuludq512:
5349 return llvm::APIntOps::muluExtended(LoLHS, LoRHS);
5352 case clang::X86::BI__builtin_ia32_pclmulqdq128:
5353 case clang::X86::BI__builtin_ia32_pclmulqdq256:
5354 case clang::X86::BI__builtin_ia32_pclmulqdq512:
5357 case Builtin::BI__builtin_elementwise_fma:
5361 llvm::RoundingMode RM) {
5363 F.fusedMultiplyAdd(Y, Z, RM);
5367 case X86::BI__builtin_ia32_vpmadd52luq128:
5368 case X86::BI__builtin_ia32_vpmadd52luq256:
5369 case X86::BI__builtin_ia32_vpmadd52luq512:
5372 return A + (B.trunc(52) *
C.trunc(52)).zext(64);
5374 case X86::BI__builtin_ia32_vpmadd52huq128:
5375 case X86::BI__builtin_ia32_vpmadd52huq256:
5376 case X86::BI__builtin_ia32_vpmadd52huq512:
5379 return A + llvm::APIntOps::mulhu(B.trunc(52),
C.trunc(52)).zext(64);
5382 case X86::BI__builtin_ia32_vpshldd128:
5383 case X86::BI__builtin_ia32_vpshldd256:
5384 case X86::BI__builtin_ia32_vpshldd512:
5385 case X86::BI__builtin_ia32_vpshldq128:
5386 case X86::BI__builtin_ia32_vpshldq256:
5387 case X86::BI__builtin_ia32_vpshldq512:
5388 case X86::BI__builtin_ia32_vpshldw128:
5389 case X86::BI__builtin_ia32_vpshldw256:
5390 case X86::BI__builtin_ia32_vpshldw512:
5394 return llvm::APIntOps::fshl(Hi, Lo, Amt);
5397 case X86::BI__builtin_ia32_vpshrdd128:
5398 case X86::BI__builtin_ia32_vpshrdd256:
5399 case X86::BI__builtin_ia32_vpshrdd512:
5400 case X86::BI__builtin_ia32_vpshrdq128:
5401 case X86::BI__builtin_ia32_vpshrdq256:
5402 case X86::BI__builtin_ia32_vpshrdq512:
5403 case X86::BI__builtin_ia32_vpshrdw128:
5404 case X86::BI__builtin_ia32_vpshrdw256:
5405 case X86::BI__builtin_ia32_vpshrdw512:
5410 return llvm::APIntOps::fshr(Hi, Lo, Amt);
5412 case X86::BI__builtin_ia32_vpconflictsi_128:
5413 case X86::BI__builtin_ia32_vpconflictsi_256:
5414 case X86::BI__builtin_ia32_vpconflictsi_512:
5415 case X86::BI__builtin_ia32_vpconflictdi_128:
5416 case X86::BI__builtin_ia32_vpconflictdi_256:
5417 case X86::BI__builtin_ia32_vpconflictdi_512:
5419 case X86::BI__builtin_ia32_compressdf128_mask:
5420 case X86::BI__builtin_ia32_compressdf256_mask:
5421 case X86::BI__builtin_ia32_compressdf512_mask:
5422 case X86::BI__builtin_ia32_compressdi128_mask:
5423 case X86::BI__builtin_ia32_compressdi256_mask:
5424 case X86::BI__builtin_ia32_compressdi512_mask:
5425 case X86::BI__builtin_ia32_compresshi128_mask:
5426 case X86::BI__builtin_ia32_compresshi256_mask:
5427 case X86::BI__builtin_ia32_compresshi512_mask:
5428 case X86::BI__builtin_ia32_compressqi128_mask:
5429 case X86::BI__builtin_ia32_compressqi256_mask:
5430 case X86::BI__builtin_ia32_compressqi512_mask:
5431 case X86::BI__builtin_ia32_compresssf128_mask:
5432 case X86::BI__builtin_ia32_compresssf256_mask:
5433 case X86::BI__builtin_ia32_compresssf512_mask:
5434 case X86::BI__builtin_ia32_compresssi128_mask:
5435 case X86::BI__builtin_ia32_compresssi256_mask:
5436 case X86::BI__builtin_ia32_compresssi512_mask: {
5438 Call->getArg(0)->getType()->castAs<
VectorType>()->getNumElements();
5440 S, OpPC,
Call, [NumElems](
unsigned DstIdx,
const APInt &ShuffleMask) {
5441 APInt CompressMask = ShuffleMask.trunc(NumElems);
5442 if (DstIdx < CompressMask.popcount()) {
5443 while (DstIdx != 0) {
5444 CompressMask = CompressMask & (CompressMask - 1);
5447 return std::pair<unsigned, int>{
5448 0,
static_cast<int>(CompressMask.countr_zero())};
5450 return std::pair<unsigned, int>{1,
static_cast<int>(DstIdx)};
5453 case X86::BI__builtin_ia32_expanddf128_mask:
5454 case X86::BI__builtin_ia32_expanddf256_mask:
5455 case X86::BI__builtin_ia32_expanddf512_mask:
5456 case X86::BI__builtin_ia32_expanddi128_mask:
5457 case X86::BI__builtin_ia32_expanddi256_mask:
5458 case X86::BI__builtin_ia32_expanddi512_mask:
5459 case X86::BI__builtin_ia32_expandhi128_mask:
5460 case X86::BI__builtin_ia32_expandhi256_mask:
5461 case X86::BI__builtin_ia32_expandhi512_mask:
5462 case X86::BI__builtin_ia32_expandqi128_mask:
5463 case X86::BI__builtin_ia32_expandqi256_mask:
5464 case X86::BI__builtin_ia32_expandqi512_mask:
5465 case X86::BI__builtin_ia32_expandsf128_mask:
5466 case X86::BI__builtin_ia32_expandsf256_mask:
5467 case X86::BI__builtin_ia32_expandsf512_mask:
5468 case X86::BI__builtin_ia32_expandsi128_mask:
5469 case X86::BI__builtin_ia32_expandsi256_mask:
5470 case X86::BI__builtin_ia32_expandsi512_mask: {
5472 S, OpPC,
Call, [](
unsigned DstIdx,
const APInt &ShuffleMask) {
5475 APInt ExpandMask = ShuffleMask.trunc(DstIdx + 1);
5476 if (ExpandMask[DstIdx]) {
5477 int SrcIdx = ExpandMask.popcount() - 1;
5478 return std::pair<unsigned, int>{0, SrcIdx};
5480 return std::pair<unsigned, int>{1,
static_cast<int>(DstIdx)};
5483 case clang::X86::BI__builtin_ia32_blendpd:
5484 case clang::X86::BI__builtin_ia32_blendpd256:
5485 case clang::X86::BI__builtin_ia32_blendps:
5486 case clang::X86::BI__builtin_ia32_blendps256:
5487 case clang::X86::BI__builtin_ia32_pblendw128:
5488 case clang::X86::BI__builtin_ia32_pblendw256:
5489 case clang::X86::BI__builtin_ia32_pblendd128:
5490 case clang::X86::BI__builtin_ia32_pblendd256:
5492 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5494 unsigned MaskBit = (ShuffleMask >> (DstIdx % 8)) & 0x1;
5495 unsigned SrcVecIdx = MaskBit ? 1 : 0;
5496 return std::pair<unsigned, int>{SrcVecIdx,
static_cast<int>(DstIdx)};
5501 case clang::X86::BI__builtin_ia32_blendvpd:
5502 case clang::X86::BI__builtin_ia32_blendvpd256:
5503 case clang::X86::BI__builtin_ia32_blendvps:
5504 case clang::X86::BI__builtin_ia32_blendvps256:
5508 llvm::RoundingMode) {
return C.isNegative() ? T : F; });
5510 case clang::X86::BI__builtin_ia32_pblendvb128:
5511 case clang::X86::BI__builtin_ia32_pblendvb256:
5514 return ((
APInt)
C).isNegative() ? T : F;
5516 case X86::BI__builtin_ia32_ptestz128:
5517 case X86::BI__builtin_ia32_ptestz256:
5518 case X86::BI__builtin_ia32_vtestzps:
5519 case X86::BI__builtin_ia32_vtestzps256:
5520 case X86::BI__builtin_ia32_vtestzpd:
5521 case X86::BI__builtin_ia32_vtestzpd256:
5524 [](
const APInt &A,
const APInt &B) {
return (A & B) == 0; });
5525 case X86::BI__builtin_ia32_ptestc128:
5526 case X86::BI__builtin_ia32_ptestc256:
5527 case X86::BI__builtin_ia32_vtestcps:
5528 case X86::BI__builtin_ia32_vtestcps256:
5529 case X86::BI__builtin_ia32_vtestcpd:
5530 case X86::BI__builtin_ia32_vtestcpd256:
5533 [](
const APInt &A,
const APInt &B) {
return (~A & B) == 0; });
5534 case X86::BI__builtin_ia32_ptestnzc128:
5535 case X86::BI__builtin_ia32_ptestnzc256:
5536 case X86::BI__builtin_ia32_vtestnzcps:
5537 case X86::BI__builtin_ia32_vtestnzcps256:
5538 case X86::BI__builtin_ia32_vtestnzcpd:
5539 case X86::BI__builtin_ia32_vtestnzcpd256:
5542 return ((A & B) != 0) && ((~A & B) != 0);
5544 case X86::BI__builtin_ia32_selectb_128:
5545 case X86::BI__builtin_ia32_selectb_256:
5546 case X86::BI__builtin_ia32_selectb_512:
5547 case X86::BI__builtin_ia32_selectw_128:
5548 case X86::BI__builtin_ia32_selectw_256:
5549 case X86::BI__builtin_ia32_selectw_512:
5550 case X86::BI__builtin_ia32_selectd_128:
5551 case X86::BI__builtin_ia32_selectd_256:
5552 case X86::BI__builtin_ia32_selectd_512:
5553 case X86::BI__builtin_ia32_selectq_128:
5554 case X86::BI__builtin_ia32_selectq_256:
5555 case X86::BI__builtin_ia32_selectq_512:
5556 case X86::BI__builtin_ia32_selectph_128:
5557 case X86::BI__builtin_ia32_selectph_256:
5558 case X86::BI__builtin_ia32_selectph_512:
5559 case X86::BI__builtin_ia32_selectpbf_128:
5560 case X86::BI__builtin_ia32_selectpbf_256:
5561 case X86::BI__builtin_ia32_selectpbf_512:
5562 case X86::BI__builtin_ia32_selectps_128:
5563 case X86::BI__builtin_ia32_selectps_256:
5564 case X86::BI__builtin_ia32_selectps_512:
5565 case X86::BI__builtin_ia32_selectpd_128:
5566 case X86::BI__builtin_ia32_selectpd_256:
5567 case X86::BI__builtin_ia32_selectpd_512:
5570 case X86::BI__builtin_ia32_shufps:
5571 case X86::BI__builtin_ia32_shufps256:
5572 case X86::BI__builtin_ia32_shufps512:
5574 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5575 unsigned NumElemPerLane = 4;
5576 unsigned NumSelectableElems = NumElemPerLane / 2;
5577 unsigned BitsPerElem = 2;
5578 unsigned IndexMask = 0x3;
5579 unsigned MaskBits = 8;
5580 unsigned Lane = DstIdx / NumElemPerLane;
5581 unsigned ElemInLane = DstIdx % NumElemPerLane;
5582 unsigned LaneOffset = Lane * NumElemPerLane;
5583 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
5584 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5585 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
5586 return std::pair<unsigned, int>{SrcIdx,
5587 static_cast<int>(LaneOffset + Index)};
5589 case X86::BI__builtin_ia32_shufpd:
5590 case X86::BI__builtin_ia32_shufpd256:
5591 case X86::BI__builtin_ia32_shufpd512:
5593 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5594 unsigned NumElemPerLane = 2;
5595 unsigned NumSelectableElems = NumElemPerLane / 2;
5596 unsigned BitsPerElem = 1;
5597 unsigned IndexMask = 0x1;
5598 unsigned MaskBits = 8;
5599 unsigned Lane = DstIdx / NumElemPerLane;
5600 unsigned ElemInLane = DstIdx % NumElemPerLane;
5601 unsigned LaneOffset = Lane * NumElemPerLane;
5602 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
5603 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5604 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
5605 return std::pair<unsigned, int>{SrcIdx,
5606 static_cast<int>(LaneOffset + Index)};
5609 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v16qi:
5610 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v32qi:
5611 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v64qi:
5613 case X86::BI__builtin_ia32_vgf2p8affineqb_v16qi:
5614 case X86::BI__builtin_ia32_vgf2p8affineqb_v32qi:
5615 case X86::BI__builtin_ia32_vgf2p8affineqb_v64qi:
5618 case X86::BI__builtin_ia32_vgf2p8mulb_v16qi:
5619 case X86::BI__builtin_ia32_vgf2p8mulb_v32qi:
5620 case X86::BI__builtin_ia32_vgf2p8mulb_v64qi:
5623 case X86::BI__builtin_ia32_insertps128:
5625 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Mask) {
5627 if ((Mask & (1 << DstIdx)) != 0) {
5628 return std::pair<unsigned, int>{0, -1};
5632 unsigned SrcElem = (Mask >> 6) & 0x3;
5633 unsigned DstElem = (Mask >> 4) & 0x3;
5634 if (DstIdx == DstElem) {
5636 return std::pair<unsigned, int>{1,
static_cast<int>(SrcElem)};
5639 return std::pair<unsigned, int>{0,
static_cast<int>(DstIdx)};
5642 case X86::BI__builtin_ia32_permvarsi256:
5643 case X86::BI__builtin_ia32_permvarsf256:
5644 case X86::BI__builtin_ia32_permvardf512:
5645 case X86::BI__builtin_ia32_permvardi512:
5646 case X86::BI__builtin_ia32_permvarhi128:
5648 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5649 int Offset = ShuffleMask & 0x7;
5650 return std::pair<unsigned, int>{0, Offset};
5652 case X86::BI__builtin_ia32_permvarqi128:
5653 case X86::BI__builtin_ia32_permvarhi256:
5654 case X86::BI__builtin_ia32_permvarsi512:
5655 case X86::BI__builtin_ia32_permvarsf512:
5657 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5658 int Offset = ShuffleMask & 0xF;
5659 return std::pair<unsigned, int>{0, Offset};
5661 case X86::BI__builtin_ia32_permvardi256:
5662 case X86::BI__builtin_ia32_permvardf256:
5664 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5665 int Offset = ShuffleMask & 0x3;
5666 return std::pair<unsigned, int>{0, Offset};
5668 case X86::BI__builtin_ia32_permvarqi256:
5669 case X86::BI__builtin_ia32_permvarhi512:
5671 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5672 int Offset = ShuffleMask & 0x1F;
5673 return std::pair<unsigned, int>{0, Offset};
5675 case X86::BI__builtin_ia32_permvarqi512:
5677 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5678 int Offset = ShuffleMask & 0x3F;
5679 return std::pair<unsigned, int>{0, Offset};
5681 case X86::BI__builtin_ia32_vpermi2varq128:
5682 case X86::BI__builtin_ia32_vpermi2varpd128:
5684 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5685 int Offset = ShuffleMask & 0x1;
5686 unsigned SrcIdx = (ShuffleMask >> 1) & 0x1;
5687 return std::pair<unsigned, int>{SrcIdx, Offset};
5689 case X86::BI__builtin_ia32_vpermi2vard128:
5690 case X86::BI__builtin_ia32_vpermi2varps128:
5691 case X86::BI__builtin_ia32_vpermi2varq256:
5692 case X86::BI__builtin_ia32_vpermi2varpd256:
5694 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5695 int Offset = ShuffleMask & 0x3;
5696 unsigned SrcIdx = (ShuffleMask >> 2) & 0x1;
5697 return std::pair<unsigned, int>{SrcIdx, Offset};
5699 case X86::BI__builtin_ia32_vpermi2varhi128:
5700 case X86::BI__builtin_ia32_vpermi2vard256:
5701 case X86::BI__builtin_ia32_vpermi2varps256:
5702 case X86::BI__builtin_ia32_vpermi2varq512:
5703 case X86::BI__builtin_ia32_vpermi2varpd512:
5705 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5706 int Offset = ShuffleMask & 0x7;
5707 unsigned SrcIdx = (ShuffleMask >> 3) & 0x1;
5708 return std::pair<unsigned, int>{SrcIdx, Offset};
5710 case X86::BI__builtin_ia32_vpermi2varqi128:
5711 case X86::BI__builtin_ia32_vpermi2varhi256:
5712 case X86::BI__builtin_ia32_vpermi2vard512:
5713 case X86::BI__builtin_ia32_vpermi2varps512:
5715 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5716 int Offset = ShuffleMask & 0xF;
5717 unsigned SrcIdx = (ShuffleMask >> 4) & 0x1;
5718 return std::pair<unsigned, int>{SrcIdx, Offset};
5720 case X86::BI__builtin_ia32_vpermi2varqi256:
5721 case X86::BI__builtin_ia32_vpermi2varhi512:
5723 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5724 int Offset = ShuffleMask & 0x1F;
5725 unsigned SrcIdx = (ShuffleMask >> 5) & 0x1;
5726 return std::pair<unsigned, int>{SrcIdx, Offset};
5728 case X86::BI__builtin_ia32_vpermi2varqi512:
5730 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5731 int Offset = ShuffleMask & 0x3F;
5732 unsigned SrcIdx = (ShuffleMask >> 6) & 0x1;
5733 return std::pair<unsigned, int>{SrcIdx, Offset};
5735 case X86::BI__builtin_ia32_vperm2f128_pd256:
5736 case X86::BI__builtin_ia32_vperm2f128_ps256:
5737 case X86::BI__builtin_ia32_vperm2f128_si256:
5738 case X86::BI__builtin_ia32_permti256: {
5739 unsigned NumElements =
5740 Call->getArg(0)->getType()->castAs<
VectorType>()->getNumElements();
5741 unsigned PreservedBitsCnt = NumElements >> 2;
5744 [PreservedBitsCnt](
unsigned DstIdx,
unsigned ShuffleMask) {
5745 unsigned ControlBitsCnt = DstIdx >> PreservedBitsCnt << 2;
5746 unsigned ControlBits = ShuffleMask >> ControlBitsCnt;
5748 if (ControlBits & 0b1000)
5749 return std::make_pair(0u, -1);
5751 unsigned SrcVecIdx = (ControlBits & 0b10) >> 1;
5752 unsigned PreservedBitsMask = (1 << PreservedBitsCnt) - 1;
5753 int SrcIdx = ((ControlBits & 0b1) << PreservedBitsCnt) |
5754 (DstIdx & PreservedBitsMask);
5755 return std::make_pair(SrcVecIdx, SrcIdx);
5758 case X86::BI__builtin_ia32_pshufb128:
5759 case X86::BI__builtin_ia32_pshufb256:
5760 case X86::BI__builtin_ia32_pshufb512:
5762 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5763 uint8_t Ctlb =
static_cast<uint8_t
>(ShuffleMask);
5765 return std::make_pair(0, -1);
5767 unsigned LaneBase = (DstIdx / 16) * 16;
5768 unsigned SrcOffset = Ctlb & 0x0F;
5769 unsigned SrcIdx = LaneBase + SrcOffset;
5770 return std::make_pair(0,
static_cast<int>(SrcIdx));
5773 case X86::BI__builtin_ia32_pshuflw:
5774 case X86::BI__builtin_ia32_pshuflw256:
5775 case X86::BI__builtin_ia32_pshuflw512:
5777 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5778 unsigned LaneBase = (DstIdx / 8) * 8;
5779 unsigned LaneIdx = DstIdx % 8;
5781 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
5782 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
5785 return std::make_pair(0,
static_cast<int>(DstIdx));
5788 case X86::BI__builtin_ia32_pshufhw:
5789 case X86::BI__builtin_ia32_pshufhw256:
5790 case X86::BI__builtin_ia32_pshufhw512:
5792 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5793 unsigned LaneBase = (DstIdx / 8) * 8;
5794 unsigned LaneIdx = DstIdx % 8;
5796 unsigned Sel = (ShuffleMask >> (2 * (LaneIdx - 4))) & 0x3;
5797 return std::make_pair(0,
static_cast<int>(LaneBase + 4 + Sel));
5800 return std::make_pair(0,
static_cast<int>(DstIdx));
5803 case X86::BI__builtin_ia32_pshufd:
5804 case X86::BI__builtin_ia32_pshufd256:
5805 case X86::BI__builtin_ia32_pshufd512:
5806 case X86::BI__builtin_ia32_vpermilps:
5807 case X86::BI__builtin_ia32_vpermilps256:
5808 case X86::BI__builtin_ia32_vpermilps512:
5810 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5811 unsigned LaneBase = (DstIdx / 4) * 4;
5812 unsigned LaneIdx = DstIdx % 4;
5813 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
5814 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
5817 case X86::BI__builtin_ia32_vpermilvarpd:
5818 case X86::BI__builtin_ia32_vpermilvarpd256:
5819 case X86::BI__builtin_ia32_vpermilvarpd512:
5821 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5822 unsigned NumElemPerLane = 2;
5823 unsigned Lane = DstIdx / NumElemPerLane;
5824 unsigned Offset = ShuffleMask & 0b10 ? 1 : 0;
5825 return std::make_pair(
5826 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
5829 case X86::BI__builtin_ia32_vpermilvarps:
5830 case X86::BI__builtin_ia32_vpermilvarps256:
5831 case X86::BI__builtin_ia32_vpermilvarps512:
5833 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5834 unsigned NumElemPerLane = 4;
5835 unsigned Lane = DstIdx / NumElemPerLane;
5836 unsigned Offset = ShuffleMask & 0b11;
5837 return std::make_pair(
5838 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
5841 case X86::BI__builtin_ia32_vpermilpd:
5842 case X86::BI__builtin_ia32_vpermilpd256:
5843 case X86::BI__builtin_ia32_vpermilpd512:
5845 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Control) {
5846 unsigned NumElemPerLane = 2;
5847 unsigned BitsPerElem = 1;
5848 unsigned MaskBits = 8;
5849 unsigned IndexMask = 0x1;
5850 unsigned Lane = DstIdx / NumElemPerLane;
5851 unsigned LaneOffset = Lane * NumElemPerLane;
5852 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5853 unsigned Index = (Control >> BitIndex) & IndexMask;
5854 return std::make_pair(0,
static_cast<int>(LaneOffset + Index));
5857 case X86::BI__builtin_ia32_permdf256:
5858 case X86::BI__builtin_ia32_permdi256:
5860 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Control) {
5863 unsigned Index = (Control >> (2 * DstIdx)) & 0x3;
5864 return std::make_pair(0,
static_cast<int>(Index));
5867 case X86::BI__builtin_ia32_vpmultishiftqb128:
5868 case X86::BI__builtin_ia32_vpmultishiftqb256:
5869 case X86::BI__builtin_ia32_vpmultishiftqb512:
5871 case X86::BI__builtin_ia32_kandqi:
5872 case X86::BI__builtin_ia32_kandhi:
5873 case X86::BI__builtin_ia32_kandsi:
5874 case X86::BI__builtin_ia32_kanddi:
5877 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS & RHS; });
5879 case X86::BI__builtin_ia32_kandnqi:
5880 case X86::BI__builtin_ia32_kandnhi:
5881 case X86::BI__builtin_ia32_kandnsi:
5882 case X86::BI__builtin_ia32_kandndi:
5885 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~LHS & RHS; });
5887 case X86::BI__builtin_ia32_korqi:
5888 case X86::BI__builtin_ia32_korhi:
5889 case X86::BI__builtin_ia32_korsi:
5890 case X86::BI__builtin_ia32_kordi:
5893 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS | RHS; });
5895 case X86::BI__builtin_ia32_kxnorqi:
5896 case X86::BI__builtin_ia32_kxnorhi:
5897 case X86::BI__builtin_ia32_kxnorsi:
5898 case X86::BI__builtin_ia32_kxnordi:
5901 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~(LHS ^ RHS); });
5903 case X86::BI__builtin_ia32_kxorqi:
5904 case X86::BI__builtin_ia32_kxorhi:
5905 case X86::BI__builtin_ia32_kxorsi:
5906 case X86::BI__builtin_ia32_kxordi:
5909 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS ^ RHS; });
5911 case X86::BI__builtin_ia32_knotqi:
5912 case X86::BI__builtin_ia32_knothi:
5913 case X86::BI__builtin_ia32_knotsi:
5914 case X86::BI__builtin_ia32_knotdi:
5916 S, OpPC,
Call, [](
const APSInt &Src) {
return ~Src; });
5918 case X86::BI__builtin_ia32_kaddqi:
5919 case X86::BI__builtin_ia32_kaddhi:
5920 case X86::BI__builtin_ia32_kaddsi:
5921 case X86::BI__builtin_ia32_kadddi:
5924 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
5926 case X86::BI__builtin_ia32_kmovb:
5927 case X86::BI__builtin_ia32_kmovw:
5928 case X86::BI__builtin_ia32_kmovd:
5929 case X86::BI__builtin_ia32_kmovq:
5931 S, OpPC,
Call, [](
const APSInt &Src) {
return Src; });
5933 case X86::BI__builtin_ia32_kunpckhi:
5934 case X86::BI__builtin_ia32_kunpckdi:
5935 case X86::BI__builtin_ia32_kunpcksi:
5940 unsigned BW = A.getBitWidth();
5941 return APSInt(A.trunc(BW / 2).concat(B.trunc(BW / 2)),
5945 case X86::BI__builtin_ia32_phminposuw128:
5948 case X86::BI__builtin_ia32_psraq128:
5949 case X86::BI__builtin_ia32_psraq256:
5950 case X86::BI__builtin_ia32_psraq512:
5951 case X86::BI__builtin_ia32_psrad128:
5952 case X86::BI__builtin_ia32_psrad256:
5953 case X86::BI__builtin_ia32_psrad512:
5954 case X86::BI__builtin_ia32_psraw128:
5955 case X86::BI__builtin_ia32_psraw256:
5956 case X86::BI__builtin_ia32_psraw512:
5959 [](
const APInt &Elt, uint64_t Count) {
return Elt.ashr(Count); },
5960 [](
const APInt &Elt,
unsigned Width) {
return Elt.ashr(Width - 1); });
5962 case X86::BI__builtin_ia32_psllq128:
5963 case X86::BI__builtin_ia32_psllq256:
5964 case X86::BI__builtin_ia32_psllq512:
5965 case X86::BI__builtin_ia32_pslld128:
5966 case X86::BI__builtin_ia32_pslld256:
5967 case X86::BI__builtin_ia32_pslld512:
5968 case X86::BI__builtin_ia32_psllw128:
5969 case X86::BI__builtin_ia32_psllw256:
5970 case X86::BI__builtin_ia32_psllw512:
5973 [](
const APInt &Elt, uint64_t Count) {
return Elt.shl(Count); },
5974 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
5976 case X86::BI__builtin_ia32_psrlq128:
5977 case X86::BI__builtin_ia32_psrlq256:
5978 case X86::BI__builtin_ia32_psrlq512:
5979 case X86::BI__builtin_ia32_psrld128:
5980 case X86::BI__builtin_ia32_psrld256:
5981 case X86::BI__builtin_ia32_psrld512:
5982 case X86::BI__builtin_ia32_psrlw128:
5983 case X86::BI__builtin_ia32_psrlw256:
5984 case X86::BI__builtin_ia32_psrlw512:
5987 [](
const APInt &Elt, uint64_t Count) {
return Elt.lshr(Count); },
5988 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
5990 case X86::BI__builtin_ia32_pternlogd128_mask:
5991 case X86::BI__builtin_ia32_pternlogd256_mask:
5992 case X86::BI__builtin_ia32_pternlogd512_mask:
5993 case X86::BI__builtin_ia32_pternlogq128_mask:
5994 case X86::BI__builtin_ia32_pternlogq256_mask:
5995 case X86::BI__builtin_ia32_pternlogq512_mask:
5997 case X86::BI__builtin_ia32_pternlogd128_maskz:
5998 case X86::BI__builtin_ia32_pternlogd256_maskz:
5999 case X86::BI__builtin_ia32_pternlogd512_maskz:
6000 case X86::BI__builtin_ia32_pternlogq128_maskz:
6001 case X86::BI__builtin_ia32_pternlogq256_maskz:
6002 case X86::BI__builtin_ia32_pternlogq512_maskz:
6004 case Builtin::BI__builtin_elementwise_fshl:
6006 llvm::APIntOps::fshl);
6007 case Builtin::BI__builtin_elementwise_fshr:
6009 llvm::APIntOps::fshr);
6011 case X86::BI__builtin_ia32_shuf_f32x4_256:
6012 case X86::BI__builtin_ia32_shuf_i32x4_256:
6013 case X86::BI__builtin_ia32_shuf_f64x2_256:
6014 case X86::BI__builtin_ia32_shuf_i64x2_256:
6015 case X86::BI__builtin_ia32_shuf_f32x4:
6016 case X86::BI__builtin_ia32_shuf_i32x4:
6017 case X86::BI__builtin_ia32_shuf_f64x2:
6018 case X86::BI__builtin_ia32_shuf_i64x2: {
6024 unsigned LaneBits = 128u;
6025 unsigned NumLanes = (NumElems * ElemBits) / LaneBits;
6026 unsigned NumElemsPerLane = LaneBits / ElemBits;
6030 [NumLanes, NumElemsPerLane](
unsigned DstIdx,
unsigned ShuffleMask) {
6032 unsigned BitsPerElem = NumLanes / 2;
6033 unsigned IndexMask = (1u << BitsPerElem) - 1;
6034 unsigned Lane = DstIdx / NumElemsPerLane;
6035 unsigned SrcIdx = (Lane < NumLanes / 2) ? 0 : 1;
6036 unsigned BitIdx = BitsPerElem * Lane;
6037 unsigned SrcLaneIdx = (ShuffleMask >> BitIdx) & IndexMask;
6038 unsigned ElemInLane = DstIdx % NumElemsPerLane;
6039 unsigned IdxToPick = SrcLaneIdx * NumElemsPerLane + ElemInLane;
6040 return std::pair<unsigned, int>{SrcIdx, IdxToPick};
6044 case X86::BI__builtin_ia32_insertf32x4_256:
6045 case X86::BI__builtin_ia32_inserti32x4_256:
6046 case X86::BI__builtin_ia32_insertf64x2_256:
6047 case X86::BI__builtin_ia32_inserti64x2_256:
6048 case X86::BI__builtin_ia32_insertf32x4:
6049 case X86::BI__builtin_ia32_inserti32x4:
6050 case X86::BI__builtin_ia32_insertf64x2_512:
6051 case X86::BI__builtin_ia32_inserti64x2_512:
6052 case X86::BI__builtin_ia32_insertf32x8:
6053 case X86::BI__builtin_ia32_inserti32x8:
6054 case X86::BI__builtin_ia32_insertf64x4:
6055 case X86::BI__builtin_ia32_inserti64x4:
6056 case X86::BI__builtin_ia32_vinsertf128_ps256:
6057 case X86::BI__builtin_ia32_vinsertf128_pd256:
6058 case X86::BI__builtin_ia32_vinsertf128_si256:
6059 case X86::BI__builtin_ia32_insert128i256:
6062 case clang::X86::BI__builtin_ia32_vcvtps2ph:
6063 case clang::X86::BI__builtin_ia32_vcvtps2ph256:
6066 case X86::BI__builtin_ia32_vec_ext_v4hi:
6067 case X86::BI__builtin_ia32_vec_ext_v16qi:
6068 case X86::BI__builtin_ia32_vec_ext_v8hi:
6069 case X86::BI__builtin_ia32_vec_ext_v4si:
6070 case X86::BI__builtin_ia32_vec_ext_v2di:
6071 case X86::BI__builtin_ia32_vec_ext_v32qi:
6072 case X86::BI__builtin_ia32_vec_ext_v16hi:
6073 case X86::BI__builtin_ia32_vec_ext_v8si:
6074 case X86::BI__builtin_ia32_vec_ext_v4di:
6075 case X86::BI__builtin_ia32_vec_ext_v4sf:
6078 case X86::BI__builtin_ia32_vec_set_v4hi:
6079 case X86::BI__builtin_ia32_vec_set_v16qi:
6080 case X86::BI__builtin_ia32_vec_set_v8hi:
6081 case X86::BI__builtin_ia32_vec_set_v4si:
6082 case X86::BI__builtin_ia32_vec_set_v2di:
6083 case X86::BI__builtin_ia32_vec_set_v32qi:
6084 case X86::BI__builtin_ia32_vec_set_v16hi:
6085 case X86::BI__builtin_ia32_vec_set_v8si:
6086 case X86::BI__builtin_ia32_vec_set_v4di:
6089 case X86::BI__builtin_ia32_cvtb2mask128:
6090 case X86::BI__builtin_ia32_cvtb2mask256:
6091 case X86::BI__builtin_ia32_cvtb2mask512:
6092 case X86::BI__builtin_ia32_cvtw2mask128:
6093 case X86::BI__builtin_ia32_cvtw2mask256:
6094 case X86::BI__builtin_ia32_cvtw2mask512:
6095 case X86::BI__builtin_ia32_cvtd2mask128:
6096 case X86::BI__builtin_ia32_cvtd2mask256:
6097 case X86::BI__builtin_ia32_cvtd2mask512:
6098 case X86::BI__builtin_ia32_cvtq2mask128:
6099 case X86::BI__builtin_ia32_cvtq2mask256:
6100 case X86::BI__builtin_ia32_cvtq2mask512:
6103 case X86::BI__builtin_ia32_cvtmask2b128:
6104 case X86::BI__builtin_ia32_cvtmask2b256:
6105 case X86::BI__builtin_ia32_cvtmask2b512:
6106 case X86::BI__builtin_ia32_cvtmask2w128:
6107 case X86::BI__builtin_ia32_cvtmask2w256:
6108 case X86::BI__builtin_ia32_cvtmask2w512:
6109 case X86::BI__builtin_ia32_cvtmask2d128:
6110 case X86::BI__builtin_ia32_cvtmask2d256:
6111 case X86::BI__builtin_ia32_cvtmask2d512:
6112 case X86::BI__builtin_ia32_cvtmask2q128:
6113 case X86::BI__builtin_ia32_cvtmask2q256:
6114 case X86::BI__builtin_ia32_cvtmask2q512:
6117 case X86::BI__builtin_ia32_cvtsd2ss:
6120 case X86::BI__builtin_ia32_cvtsd2ss_round_mask:
6123 case X86::BI__builtin_ia32_cvtpd2ps:
6124 case X86::BI__builtin_ia32_cvtpd2ps256:
6126 case X86::BI__builtin_ia32_cvtpd2ps_mask:
6128 case X86::BI__builtin_ia32_cvtpd2ps512_mask:
6131 case X86::BI__builtin_ia32_cmpb128_mask:
6132 case X86::BI__builtin_ia32_cmpw128_mask:
6133 case X86::BI__builtin_ia32_cmpd128_mask:
6134 case X86::BI__builtin_ia32_cmpq128_mask:
6135 case X86::BI__builtin_ia32_cmpb256_mask:
6136 case X86::BI__builtin_ia32_cmpw256_mask:
6137 case X86::BI__builtin_ia32_cmpd256_mask:
6138 case X86::BI__builtin_ia32_cmpq256_mask:
6139 case X86::BI__builtin_ia32_cmpb512_mask:
6140 case X86::BI__builtin_ia32_cmpw512_mask:
6141 case X86::BI__builtin_ia32_cmpd512_mask:
6142 case X86::BI__builtin_ia32_cmpq512_mask:
6146 case X86::BI__builtin_ia32_ucmpb128_mask:
6147 case X86::BI__builtin_ia32_ucmpw128_mask:
6148 case X86::BI__builtin_ia32_ucmpd128_mask:
6149 case X86::BI__builtin_ia32_ucmpq128_mask:
6150 case X86::BI__builtin_ia32_ucmpb256_mask:
6151 case X86::BI__builtin_ia32_ucmpw256_mask:
6152 case X86::BI__builtin_ia32_ucmpd256_mask:
6153 case X86::BI__builtin_ia32_ucmpq256_mask:
6154 case X86::BI__builtin_ia32_ucmpb512_mask:
6155 case X86::BI__builtin_ia32_ucmpw512_mask:
6156 case X86::BI__builtin_ia32_ucmpd512_mask:
6157 case X86::BI__builtin_ia32_ucmpq512_mask:
6161 case X86::BI__builtin_ia32_vpshufbitqmb128_mask:
6162 case X86::BI__builtin_ia32_vpshufbitqmb256_mask:
6163 case X86::BI__builtin_ia32_vpshufbitqmb512_mask:
6166 case X86::BI__builtin_ia32_pslldqi128_byteshift:
6167 case X86::BI__builtin_ia32_pslldqi256_byteshift:
6168 case X86::BI__builtin_ia32_pslldqi512_byteshift:
6175 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
6176 unsigned LaneBase = (DstIdx / 16) * 16;
6177 unsigned LaneIdx = DstIdx % 16;
6178 if (LaneIdx < Shift)
6179 return std::make_pair(0, -1);
6181 return std::make_pair(0,
6182 static_cast<int>(LaneBase + LaneIdx - Shift));
6185 case X86::BI__builtin_ia32_psrldqi128_byteshift:
6186 case X86::BI__builtin_ia32_psrldqi256_byteshift:
6187 case X86::BI__builtin_ia32_psrldqi512_byteshift:
6194 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
6195 unsigned LaneBase = (DstIdx / 16) * 16;
6196 unsigned LaneIdx = DstIdx % 16;
6197 if (LaneIdx + Shift < 16)
6198 return std::make_pair(0,
6199 static_cast<int>(LaneBase + LaneIdx + Shift));
6201 return std::make_pair(0, -1);
6204 case X86::BI__builtin_ia32_palignr128:
6205 case X86::BI__builtin_ia32_palignr256:
6206 case X86::BI__builtin_ia32_palignr512:
6208 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Shift) {
6210 unsigned VecIdx = 1;
6213 int Lane = DstIdx / 16;
6214 int Offset = DstIdx % 16;
6217 unsigned ShiftedIdx = Offset + (Shift & 0xFF);
6218 if (ShiftedIdx < 16) {
6219 ElemIdx = ShiftedIdx + (Lane * 16);
6220 }
else if (ShiftedIdx < 32) {
6222 ElemIdx = (ShiftedIdx - 16) + (Lane * 16);
6225 return std::pair<unsigned, int>{VecIdx, ElemIdx};
6228 case X86::BI__builtin_ia32_alignd128:
6229 case X86::BI__builtin_ia32_alignd256:
6230 case X86::BI__builtin_ia32_alignd512:
6231 case X86::BI__builtin_ia32_alignq128:
6232 case X86::BI__builtin_ia32_alignq256:
6233 case X86::BI__builtin_ia32_alignq512: {
6234 unsigned NumElems =
Call->getType()->castAs<
VectorType>()->getNumElements();
6236 S, OpPC,
Call, [NumElems](
unsigned DstIdx,
unsigned Shift) {
6237 unsigned Imm = Shift & 0xFF;
6238 unsigned EffectiveShift = Imm & (NumElems - 1);
6239 unsigned SourcePos = DstIdx + EffectiveShift;
6240 unsigned VecIdx = SourcePos < NumElems ? 1u : 0u;
6241 unsigned ElemIdx = SourcePos & (NumElems - 1);
6242 return std::pair<unsigned, int>{VecIdx,
static_cast<int>(ElemIdx)};
6246 case clang::X86::BI__builtin_ia32_minps:
6247 case clang::X86::BI__builtin_ia32_minpd:
6248 case clang::X86::BI__builtin_ia32_minph128:
6249 case clang::X86::BI__builtin_ia32_minph256:
6250 case clang::X86::BI__builtin_ia32_minps256:
6251 case clang::X86::BI__builtin_ia32_minpd256:
6252 case clang::X86::BI__builtin_ia32_minps512:
6253 case clang::X86::BI__builtin_ia32_minpd512:
6254 case clang::X86::BI__builtin_ia32_minph512:
6258 std::optional<APSInt>) -> std::optional<APFloat> {
6259 if (A.isNaN() || A.isInfinity() || A.isDenormal() || B.isNaN() ||
6260 B.isInfinity() || B.isDenormal())
6261 return std::nullopt;
6262 if (A.isZero() && B.isZero())
6264 return llvm::minimum(A, B);
6267 case clang::X86::BI__builtin_ia32_minss:
6268 case clang::X86::BI__builtin_ia32_minsd:
6272 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
6277 case clang::X86::BI__builtin_ia32_minsd_round_mask:
6278 case clang::X86::BI__builtin_ia32_minss_round_mask:
6279 case clang::X86::BI__builtin_ia32_minsh_round_mask:
6280 case clang::X86::BI__builtin_ia32_maxsd_round_mask:
6281 case clang::X86::BI__builtin_ia32_maxss_round_mask:
6282 case clang::X86::BI__builtin_ia32_maxsh_round_mask: {
6283 bool IsMin = BuiltinID == clang::X86::BI__builtin_ia32_minsd_round_mask ||
6284 BuiltinID == clang::X86::BI__builtin_ia32_minss_round_mask ||
6285 BuiltinID == clang::X86::BI__builtin_ia32_minsh_round_mask;
6289 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
6294 case clang::X86::BI__builtin_ia32_maxps:
6295 case clang::X86::BI__builtin_ia32_maxpd:
6296 case clang::X86::BI__builtin_ia32_maxph128:
6297 case clang::X86::BI__builtin_ia32_maxph256:
6298 case clang::X86::BI__builtin_ia32_maxps256:
6299 case clang::X86::BI__builtin_ia32_maxpd256:
6300 case clang::X86::BI__builtin_ia32_maxps512:
6301 case clang::X86::BI__builtin_ia32_maxpd512:
6302 case clang::X86::BI__builtin_ia32_maxph512:
6306 std::optional<APSInt>) -> std::optional<APFloat> {
6307 if (A.isNaN() || A.isInfinity() || A.isDenormal() || B.isNaN() ||
6308 B.isInfinity() || B.isDenormal())
6309 return std::nullopt;
6310 if (A.isZero() && B.isZero())
6312 return llvm::maximum(A, B);
6315 case clang::X86::BI__builtin_ia32_maxss:
6316 case clang::X86::BI__builtin_ia32_maxsd:
6320 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
6327 diag::note_invalid_subexpr_in_const_expr)
6333 llvm_unreachable(
"Unhandled builtin ID");