4445 uint32_t BuiltinID) {
4450 switch (BuiltinID) {
4451 case Builtin::BI__builtin_is_constant_evaluated:
4454 case Builtin::BI__builtin_assume:
4455 case Builtin::BI__assume:
4458 case Builtin::BI__builtin_strcmp:
4459 case Builtin::BIstrcmp:
4460 case Builtin::BI__builtin_strncmp:
4461 case Builtin::BIstrncmp:
4462 case Builtin::BI__builtin_wcsncmp:
4463 case Builtin::BIwcsncmp:
4464 case Builtin::BI__builtin_wcscmp:
4465 case Builtin::BIwcscmp:
4468 case Builtin::BI__builtin_strlen:
4469 case Builtin::BIstrlen:
4470 case Builtin::BI__builtin_wcslen:
4471 case Builtin::BIwcslen:
4474 case Builtin::BI__builtin_nan:
4475 case Builtin::BI__builtin_nanf:
4476 case Builtin::BI__builtin_nanl:
4477 case Builtin::BI__builtin_nanf16:
4478 case Builtin::BI__builtin_nanf128:
4481 case Builtin::BI__builtin_nans:
4482 case Builtin::BI__builtin_nansf:
4483 case Builtin::BI__builtin_nansl:
4484 case Builtin::BI__builtin_nansf16:
4485 case Builtin::BI__builtin_nansf128:
4488 case Builtin::BI__builtin_huge_val:
4489 case Builtin::BI__builtin_huge_valf:
4490 case Builtin::BI__builtin_huge_vall:
4491 case Builtin::BI__builtin_huge_valf16:
4492 case Builtin::BI__builtin_huge_valf128:
4493 case Builtin::BI__builtin_inf:
4494 case Builtin::BI__builtin_inff:
4495 case Builtin::BI__builtin_infl:
4496 case Builtin::BI__builtin_inff16:
4497 case Builtin::BI__builtin_inff128:
4500 case Builtin::BI__builtin_copysign:
4501 case Builtin::BI__builtin_copysignf:
4502 case Builtin::BI__builtin_copysignl:
4503 case Builtin::BI__builtin_copysignf128:
4506 case Builtin::BI__builtin_fmin:
4507 case Builtin::BI__builtin_fminf:
4508 case Builtin::BI__builtin_fminl:
4509 case Builtin::BI__builtin_fminf16:
4510 case Builtin::BI__builtin_fminf128:
4513 case Builtin::BI__builtin_fminimum_num:
4514 case Builtin::BI__builtin_fminimum_numf:
4515 case Builtin::BI__builtin_fminimum_numl:
4516 case Builtin::BI__builtin_fminimum_numf16:
4517 case Builtin::BI__builtin_fminimum_numf128:
4520 case Builtin::BI__builtin_fmax:
4521 case Builtin::BI__builtin_fmaxf:
4522 case Builtin::BI__builtin_fmaxl:
4523 case Builtin::BI__builtin_fmaxf16:
4524 case Builtin::BI__builtin_fmaxf128:
4527 case Builtin::BI__builtin_fmaximum_num:
4528 case Builtin::BI__builtin_fmaximum_numf:
4529 case Builtin::BI__builtin_fmaximum_numl:
4530 case Builtin::BI__builtin_fmaximum_numf16:
4531 case Builtin::BI__builtin_fmaximum_numf128:
4534 case Builtin::BI__builtin_isnan:
4537 case Builtin::BI__builtin_issignaling:
4540 case Builtin::BI__builtin_isinf:
4543 case Builtin::BI__builtin_isinf_sign:
4546 case Builtin::BI__builtin_isfinite:
4549 case Builtin::BI__builtin_isnormal:
4552 case Builtin::BI__builtin_issubnormal:
4555 case Builtin::BI__builtin_iszero:
4558 case Builtin::BI__builtin_signbit:
4559 case Builtin::BI__builtin_signbitf:
4560 case Builtin::BI__builtin_signbitl:
4563 case Builtin::BI__builtin_isgreater:
4564 case Builtin::BI__builtin_isgreaterequal:
4565 case Builtin::BI__builtin_isless:
4566 case Builtin::BI__builtin_islessequal:
4567 case Builtin::BI__builtin_islessgreater:
4568 case Builtin::BI__builtin_isunordered:
4571 case Builtin::BI__builtin_isfpclass:
4574 case Builtin::BI__builtin_fpclassify:
4577 case Builtin::BI__builtin_fabs:
4578 case Builtin::BI__builtin_fabsf:
4579 case Builtin::BI__builtin_fabsl:
4580 case Builtin::BI__builtin_fabsf128:
4583 case Builtin::BI__builtin_abs:
4584 case Builtin::BI__builtin_labs:
4585 case Builtin::BI__builtin_llabs:
4588 case Builtin::BI__builtin_popcount:
4589 case Builtin::BI__builtin_popcountl:
4590 case Builtin::BI__builtin_popcountll:
4591 case Builtin::BI__builtin_popcountg:
4592 case Builtin::BI__popcnt16:
4593 case Builtin::BI__popcnt:
4594 case Builtin::BI__popcnt64:
4597 case Builtin::BI__builtin_parity:
4598 case Builtin::BI__builtin_parityl:
4599 case Builtin::BI__builtin_parityll:
4602 return APInt(Val.getBitWidth(), Val.popcount() % 2);
4604 case Builtin::BI__builtin_clrsb:
4605 case Builtin::BI__builtin_clrsbl:
4606 case Builtin::BI__builtin_clrsbll:
4609 return APInt(Val.getBitWidth(),
4610 Val.getBitWidth() - Val.getSignificantBits());
4612 case Builtin::BI__builtin_bitreverseg:
4613 case Builtin::BI__builtin_bitreverse8:
4614 case Builtin::BI__builtin_bitreverse16:
4615 case Builtin::BI__builtin_bitreverse32:
4616 case Builtin::BI__builtin_bitreverse64:
4618 S, OpPC,
Call, [](
const APSInt &Val) {
return Val.reverseBits(); });
4620 case Builtin::BI__builtin_classify_type:
4623 case Builtin::BI__builtin_expect:
4624 case Builtin::BI__builtin_expect_with_probability:
4627 case Builtin::BI__builtin_rotateleft8:
4628 case Builtin::BI__builtin_rotateleft16:
4629 case Builtin::BI__builtin_rotateleft32:
4630 case Builtin::BI__builtin_rotateleft64:
4631 case Builtin::BI__builtin_stdc_rotate_left:
4632 case Builtin::BIstdc_rotate_left_uc:
4633 case Builtin::BIstdc_rotate_left_us:
4634 case Builtin::BIstdc_rotate_left_ui:
4635 case Builtin::BIstdc_rotate_left_ul:
4636 case Builtin::BIstdc_rotate_left_ull:
4637 case Builtin::BI_rotl8:
4638 case Builtin::BI_rotl16:
4639 case Builtin::BI_rotl:
4640 case Builtin::BI_lrotl:
4641 case Builtin::BI_rotl64:
4642 case Builtin::BI__builtin_rotateright8:
4643 case Builtin::BI__builtin_rotateright16:
4644 case Builtin::BI__builtin_rotateright32:
4645 case Builtin::BI__builtin_rotateright64:
4646 case Builtin::BI__builtin_stdc_rotate_right:
4647 case Builtin::BIstdc_rotate_right_uc:
4648 case Builtin::BIstdc_rotate_right_us:
4649 case Builtin::BIstdc_rotate_right_ui:
4650 case Builtin::BIstdc_rotate_right_ul:
4651 case Builtin::BIstdc_rotate_right_ull:
4652 case Builtin::BI_rotr8:
4653 case Builtin::BI_rotr16:
4654 case Builtin::BI_rotr:
4655 case Builtin::BI_lrotr:
4656 case Builtin::BI_rotr64: {
4659 switch (BuiltinID) {
4660 case Builtin::BI__builtin_rotateright8:
4661 case Builtin::BI__builtin_rotateright16:
4662 case Builtin::BI__builtin_rotateright32:
4663 case Builtin::BI__builtin_rotateright64:
4664 case Builtin::BI__builtin_stdc_rotate_right:
4665 case Builtin::BIstdc_rotate_right_uc:
4666 case Builtin::BIstdc_rotate_right_us:
4667 case Builtin::BIstdc_rotate_right_ui:
4668 case Builtin::BIstdc_rotate_right_ul:
4669 case Builtin::BIstdc_rotate_right_ull:
4670 case Builtin::BI_rotr8:
4671 case Builtin::BI_rotr16:
4672 case Builtin::BI_rotr:
4673 case Builtin::BI_lrotr:
4674 case Builtin::BI_rotr64:
4675 IsRotateRight =
true;
4678 IsRotateRight =
false;
4685 return IsRotateRight ?
Value.rotr(Amount.getZExtValue())
4686 :
Value.rotl(Amount.getZExtValue());
4690 case Builtin::BIstdc_leading_zeros_uc:
4691 case Builtin::BIstdc_leading_zeros_us:
4692 case Builtin::BIstdc_leading_zeros_ui:
4693 case Builtin::BIstdc_leading_zeros_ul:
4694 case Builtin::BIstdc_leading_zeros_ull:
4695 case Builtin::BI__builtin_stdc_leading_zeros: {
4698 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4699 return APInt(ResWidth, Val.countl_zero());
4703 case Builtin::BIstdc_leading_ones_uc:
4704 case Builtin::BIstdc_leading_ones_us:
4705 case Builtin::BIstdc_leading_ones_ui:
4706 case Builtin::BIstdc_leading_ones_ul:
4707 case Builtin::BIstdc_leading_ones_ull:
4708 case Builtin::BI__builtin_stdc_leading_ones: {
4711 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4712 return APInt(ResWidth, Val.countl_one());
4716 case Builtin::BIstdc_trailing_zeros_uc:
4717 case Builtin::BIstdc_trailing_zeros_us:
4718 case Builtin::BIstdc_trailing_zeros_ui:
4719 case Builtin::BIstdc_trailing_zeros_ul:
4720 case Builtin::BIstdc_trailing_zeros_ull:
4721 case Builtin::BI__builtin_stdc_trailing_zeros: {
4724 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4725 return APInt(ResWidth, Val.countr_zero());
4729 case Builtin::BIstdc_trailing_ones_uc:
4730 case Builtin::BIstdc_trailing_ones_us:
4731 case Builtin::BIstdc_trailing_ones_ui:
4732 case Builtin::BIstdc_trailing_ones_ul:
4733 case Builtin::BIstdc_trailing_ones_ull:
4734 case Builtin::BI__builtin_stdc_trailing_ones: {
4737 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4738 return APInt(ResWidth, Val.countr_one());
4742 case Builtin::BIstdc_first_leading_zero_uc:
4743 case Builtin::BIstdc_first_leading_zero_us:
4744 case Builtin::BIstdc_first_leading_zero_ui:
4745 case Builtin::BIstdc_first_leading_zero_ul:
4746 case Builtin::BIstdc_first_leading_zero_ull:
4747 case Builtin::BI__builtin_stdc_first_leading_zero: {
4750 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4751 return APInt(ResWidth, Val.isAllOnes() ? 0 : Val.countl_one() + 1);
4755 case Builtin::BIstdc_first_leading_one_uc:
4756 case Builtin::BIstdc_first_leading_one_us:
4757 case Builtin::BIstdc_first_leading_one_ui:
4758 case Builtin::BIstdc_first_leading_one_ul:
4759 case Builtin::BIstdc_first_leading_one_ull:
4760 case Builtin::BI__builtin_stdc_first_leading_one: {
4763 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4764 return APInt(ResWidth, Val.isZero() ? 0 : Val.countl_zero() + 1);
4768 case Builtin::BIstdc_first_trailing_zero_uc:
4769 case Builtin::BIstdc_first_trailing_zero_us:
4770 case Builtin::BIstdc_first_trailing_zero_ui:
4771 case Builtin::BIstdc_first_trailing_zero_ul:
4772 case Builtin::BIstdc_first_trailing_zero_ull:
4773 case Builtin::BI__builtin_stdc_first_trailing_zero: {
4776 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4777 return APInt(ResWidth, Val.isAllOnes() ? 0 : Val.countr_one() + 1);
4781 case Builtin::BIstdc_first_trailing_one_uc:
4782 case Builtin::BIstdc_first_trailing_one_us:
4783 case Builtin::BIstdc_first_trailing_one_ui:
4784 case Builtin::BIstdc_first_trailing_one_ul:
4785 case Builtin::BIstdc_first_trailing_one_ull:
4786 case Builtin::BI__builtin_stdc_first_trailing_one: {
4789 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4790 return APInt(ResWidth, Val.isZero() ? 0 : Val.countr_zero() + 1);
4794 case Builtin::BIstdc_count_zeros_uc:
4795 case Builtin::BIstdc_count_zeros_us:
4796 case Builtin::BIstdc_count_zeros_ui:
4797 case Builtin::BIstdc_count_zeros_ul:
4798 case Builtin::BIstdc_count_zeros_ull:
4799 case Builtin::BI__builtin_stdc_count_zeros: {
4802 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4803 unsigned BitWidth = Val.getBitWidth();
4804 return APInt(ResWidth, BitWidth - Val.popcount());
4808 case Builtin::BIstdc_count_ones_uc:
4809 case Builtin::BIstdc_count_ones_us:
4810 case Builtin::BIstdc_count_ones_ui:
4811 case Builtin::BIstdc_count_ones_ul:
4812 case Builtin::BIstdc_count_ones_ull:
4813 case Builtin::BI__builtin_stdc_count_ones: {
4816 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4817 return APInt(ResWidth, Val.popcount());
4821 case Builtin::BIstdc_has_single_bit_uc:
4822 case Builtin::BIstdc_has_single_bit_us:
4823 case Builtin::BIstdc_has_single_bit_ui:
4824 case Builtin::BIstdc_has_single_bit_ul:
4825 case Builtin::BIstdc_has_single_bit_ull:
4826 case Builtin::BI__builtin_stdc_has_single_bit: {
4829 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4830 return APInt(ResWidth, Val.popcount() == 1 ? 1 : 0);
4834 case Builtin::BIstdc_bit_width_uc:
4835 case Builtin::BIstdc_bit_width_us:
4836 case Builtin::BIstdc_bit_width_ui:
4837 case Builtin::BIstdc_bit_width_ul:
4838 case Builtin::BIstdc_bit_width_ull:
4839 case Builtin::BI__builtin_stdc_bit_width: {
4842 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4843 unsigned BitWidth = Val.getBitWidth();
4844 return APInt(ResWidth, BitWidth - Val.countl_zero());
4848 case Builtin::BIstdc_bit_floor_uc:
4849 case Builtin::BIstdc_bit_floor_us:
4850 case Builtin::BIstdc_bit_floor_ui:
4851 case Builtin::BIstdc_bit_floor_ul:
4852 case Builtin::BIstdc_bit_floor_ull:
4853 case Builtin::BI__builtin_stdc_bit_floor:
4856 unsigned BitWidth = Val.getBitWidth();
4858 return APInt::getZero(BitWidth);
4859 return APInt::getOneBitSet(BitWidth,
4860 BitWidth - Val.countl_zero() - 1);
4863 case Builtin::BIstdc_bit_ceil_uc:
4864 case Builtin::BIstdc_bit_ceil_us:
4865 case Builtin::BIstdc_bit_ceil_ui:
4866 case Builtin::BIstdc_bit_ceil_ul:
4867 case Builtin::BIstdc_bit_ceil_ull:
4868 case Builtin::BI__builtin_stdc_bit_ceil:
4871 unsigned BitWidth = Val.getBitWidth();
4873 return APInt(BitWidth, 1);
4875 APInt ValMinusOne =
V - 1;
4876 unsigned LeadingZeros = ValMinusOne.countl_zero();
4877 if (LeadingZeros == 0)
4878 return APInt(BitWidth, 0);
4879 return APInt::getOneBitSet(BitWidth, BitWidth - LeadingZeros);
4882 case Builtin::BI__builtin_ffs:
4883 case Builtin::BI__builtin_ffsl:
4884 case Builtin::BI__builtin_ffsll:
4887 return APInt(Val.getBitWidth(),
4888 Val.isZero() ? 0u : Val.countTrailingZeros() + 1u);
4891 case Builtin::BIaddressof:
4892 case Builtin::BI__addressof:
4893 case Builtin::BI__builtin_addressof:
4897 case Builtin::BIas_const:
4898 case Builtin::BIforward:
4899 case Builtin::BIforward_like:
4900 case Builtin::BImove:
4901 case Builtin::BImove_if_noexcept:
4905 case Builtin::BI__builtin_eh_return_data_regno:
4908 case Builtin::BI__builtin_launder:
4912 case Builtin::BI__builtin_add_overflow:
4913 case Builtin::BI__builtin_sub_overflow:
4914 case Builtin::BI__builtin_mul_overflow:
4915 case Builtin::BI__builtin_sadd_overflow:
4916 case Builtin::BI__builtin_uadd_overflow:
4917 case Builtin::BI__builtin_uaddl_overflow:
4918 case Builtin::BI__builtin_uaddll_overflow:
4919 case Builtin::BI__builtin_usub_overflow:
4920 case Builtin::BI__builtin_usubl_overflow:
4921 case Builtin::BI__builtin_usubll_overflow:
4922 case Builtin::BI__builtin_umul_overflow:
4923 case Builtin::BI__builtin_umull_overflow:
4924 case Builtin::BI__builtin_umulll_overflow:
4925 case Builtin::BI__builtin_saddl_overflow:
4926 case Builtin::BI__builtin_saddll_overflow:
4927 case Builtin::BI__builtin_ssub_overflow:
4928 case Builtin::BI__builtin_ssubl_overflow:
4929 case Builtin::BI__builtin_ssubll_overflow:
4930 case Builtin::BI__builtin_smul_overflow:
4931 case Builtin::BI__builtin_smull_overflow:
4932 case Builtin::BI__builtin_smulll_overflow:
4935 case Builtin::BI__builtin_addcb:
4936 case Builtin::BI__builtin_addcs:
4937 case Builtin::BI__builtin_addc:
4938 case Builtin::BI__builtin_addcl:
4939 case Builtin::BI__builtin_addcll:
4940 case Builtin::BI__builtin_subcb:
4941 case Builtin::BI__builtin_subcs:
4942 case Builtin::BI__builtin_subc:
4943 case Builtin::BI__builtin_subcl:
4944 case Builtin::BI__builtin_subcll:
4947 case Builtin::BI__builtin_clz:
4948 case Builtin::BI__builtin_clzl:
4949 case Builtin::BI__builtin_clzll:
4950 case Builtin::BI__builtin_clzs:
4951 case Builtin::BI__builtin_clzg:
4952 case Builtin::BI__lzcnt16:
4953 case Builtin::BI__lzcnt:
4954 case Builtin::BI__lzcnt64:
4957 case Builtin::BI__builtin_ctz:
4958 case Builtin::BI__builtin_ctzl:
4959 case Builtin::BI__builtin_ctzll:
4960 case Builtin::BI__builtin_ctzs:
4961 case Builtin::BI__builtin_ctzg:
4964 case Builtin::BI__builtin_elementwise_clzg:
4965 case Builtin::BI__builtin_elementwise_ctzg:
4968 case Builtin::BI__builtin_bswapg:
4969 case Builtin::BI__builtin_bswap16:
4970 case Builtin::BI__builtin_bswap32:
4971 case Builtin::BI__builtin_bswap64:
4972 case Builtin::BIstdc_memreverse8u8:
4973 case Builtin::BIstdc_memreverse8u16:
4974 case Builtin::BIstdc_memreverse8u32:
4975 case Builtin::BIstdc_memreverse8u64:
4978 case Builtin::BI__atomic_always_lock_free:
4979 case Builtin::BI__atomic_is_lock_free:
4982 case Builtin::BI__c11_atomic_is_lock_free:
4985 case Builtin::BI__builtin_complex:
4988 case Builtin::BI__builtin_is_aligned:
4989 case Builtin::BI__builtin_align_up:
4990 case Builtin::BI__builtin_align_down:
4993 case Builtin::BI__builtin_assume_aligned:
4996 case clang::X86::BI__builtin_ia32_crc32qi:
4998 case clang::X86::BI__builtin_ia32_crc32hi:
5000 case clang::X86::BI__builtin_ia32_crc32si:
5002 case clang::X86::BI__builtin_ia32_crc32di:
5005 case clang::X86::BI__builtin_ia32_bextr_u32:
5006 case clang::X86::BI__builtin_ia32_bextr_u64:
5007 case clang::X86::BI__builtin_ia32_bextri_u32:
5008 case clang::X86::BI__builtin_ia32_bextri_u64:
5011 unsigned BitWidth = Val.getBitWidth();
5012 uint64_t Shift = Idx.extractBitsAsZExtValue(8, 0);
5013 uint64_t Length = Idx.extractBitsAsZExtValue(8, 8);
5014 if (Length > BitWidth) {
5019 if (Length == 0 || Shift >= BitWidth)
5020 return APInt(BitWidth, 0);
5022 uint64_t
Result = Val.getZExtValue() >> Shift;
5023 Result &= llvm::maskTrailingOnes<uint64_t>(Length);
5027 case clang::X86::BI__builtin_ia32_bzhi_si:
5028 case clang::X86::BI__builtin_ia32_bzhi_di:
5031 unsigned BitWidth = Val.getBitWidth();
5032 uint64_t Index = Idx.extractBitsAsZExtValue(8, 0);
5035 if (Index < BitWidth)
5036 Result.clearHighBits(BitWidth - Index);
5041 case clang::X86::BI__builtin_ia32_ktestcqi:
5042 case clang::X86::BI__builtin_ia32_ktestchi:
5043 case clang::X86::BI__builtin_ia32_ktestcsi:
5044 case clang::X86::BI__builtin_ia32_ktestcdi:
5047 return APInt(
sizeof(
unsigned char) * 8, (~A & B) == 0);
5050 case clang::X86::BI__builtin_ia32_ktestzqi:
5051 case clang::X86::BI__builtin_ia32_ktestzhi:
5052 case clang::X86::BI__builtin_ia32_ktestzsi:
5053 case clang::X86::BI__builtin_ia32_ktestzdi:
5056 return APInt(
sizeof(
unsigned char) * 8, (A & B) == 0);
5059 case clang::X86::BI__builtin_ia32_kortestcqi:
5060 case clang::X86::BI__builtin_ia32_kortestchi:
5061 case clang::X86::BI__builtin_ia32_kortestcsi:
5062 case clang::X86::BI__builtin_ia32_kortestcdi:
5065 return APInt(
sizeof(
unsigned char) * 8, ~(A | B) == 0);
5068 case clang::X86::BI__builtin_ia32_kortestzqi:
5069 case clang::X86::BI__builtin_ia32_kortestzhi:
5070 case clang::X86::BI__builtin_ia32_kortestzsi:
5071 case clang::X86::BI__builtin_ia32_kortestzdi:
5074 return APInt(
sizeof(
unsigned char) * 8, (A | B) == 0);
5077 case clang::X86::BI__builtin_ia32_kshiftliqi:
5078 case clang::X86::BI__builtin_ia32_kshiftlihi:
5079 case clang::X86::BI__builtin_ia32_kshiftlisi:
5080 case clang::X86::BI__builtin_ia32_kshiftlidi:
5083 unsigned Amt = RHS.getZExtValue() & 0xFF;
5084 if (Amt >= LHS.getBitWidth())
5085 return APInt::getZero(LHS.getBitWidth());
5086 return LHS.shl(Amt);
5089 case clang::X86::BI__builtin_ia32_kshiftriqi:
5090 case clang::X86::BI__builtin_ia32_kshiftrihi:
5091 case clang::X86::BI__builtin_ia32_kshiftrisi:
5092 case clang::X86::BI__builtin_ia32_kshiftridi:
5095 unsigned Amt = RHS.getZExtValue() & 0xFF;
5096 if (Amt >= LHS.getBitWidth())
5097 return APInt::getZero(LHS.getBitWidth());
5098 return LHS.lshr(Amt);
5101 case clang::X86::BI__builtin_ia32_lzcnt_u16:
5102 case clang::X86::BI__builtin_ia32_lzcnt_u32:
5103 case clang::X86::BI__builtin_ia32_lzcnt_u64:
5106 return APInt(Src.getBitWidth(), Src.countLeadingZeros());
5109 case clang::X86::BI__builtin_ia32_tzcnt_u16:
5110 case clang::X86::BI__builtin_ia32_tzcnt_u32:
5111 case clang::X86::BI__builtin_ia32_tzcnt_u64:
5114 return APInt(Src.getBitWidth(), Src.countTrailingZeros());
5117 case clang::X86::BI__builtin_ia32_pdep_si:
5118 case clang::X86::BI__builtin_ia32_pdep_di:
5120 llvm::APIntOps::expandBits);
5122 case clang::X86::BI__builtin_ia32_pext_si:
5123 case clang::X86::BI__builtin_ia32_pext_di:
5125 llvm::APIntOps::compressBits);
5127 case clang::X86::BI__builtin_ia32_addcarryx_u32:
5128 case clang::X86::BI__builtin_ia32_addcarryx_u64:
5132 case clang::X86::BI__builtin_ia32_subborrow_u32:
5133 case clang::X86::BI__builtin_ia32_subborrow_u64:
5137 case Builtin::BI__builtin_os_log_format_buffer_size:
5140 case Builtin::BI__builtin_ptrauth_string_discriminator:
5143 case Builtin::BI__builtin_infer_alloc_token:
5146 case Builtin::BI__noop:
5150 case Builtin::BI__builtin_operator_new:
5153 case Builtin::BI__builtin_operator_delete:
5156 case Builtin::BI__arithmetic_fence:
5159 case Builtin::BI__builtin_reduce_add:
5160 case Builtin::BI__builtin_reduce_mul:
5161 case Builtin::BI__builtin_reduce_and:
5162 case Builtin::BI__builtin_reduce_or:
5163 case Builtin::BI__builtin_reduce_xor:
5164 case Builtin::BI__builtin_reduce_min:
5165 case Builtin::BI__builtin_reduce_max:
5168 case Builtin::BI__builtin_elementwise_popcount:
5171 return APInt(Src.getBitWidth(), Src.popcount());
5173 case Builtin::BI__builtin_elementwise_bitreverse:
5175 S, OpPC,
Call, [](
const APSInt &Src) {
return Src.reverseBits(); });
5177 case Builtin::BI__builtin_elementwise_abs:
5180 case Builtin::BI__builtin_memcpy:
5181 case Builtin::BImemcpy:
5182 case Builtin::BI__builtin_wmemcpy:
5183 case Builtin::BIwmemcpy:
5184 case Builtin::BI__builtin_memmove:
5185 case Builtin::BImemmove:
5186 case Builtin::BI__builtin_wmemmove:
5187 case Builtin::BIwmemmove:
5190 case Builtin::BI__builtin_memcmp:
5191 case Builtin::BImemcmp:
5192 case Builtin::BI__builtin_bcmp:
5193 case Builtin::BIbcmp:
5194 case Builtin::BI__builtin_wmemcmp:
5195 case Builtin::BIwmemcmp:
5198 case Builtin::BImemchr:
5199 case Builtin::BI__builtin_memchr:
5200 case Builtin::BIstrchr:
5201 case Builtin::BI__builtin_strchr:
5202 case Builtin::BIwmemchr:
5203 case Builtin::BI__builtin_wmemchr:
5204 case Builtin::BIwcschr:
5205 case Builtin::BI__builtin_wcschr:
5206 case Builtin::BI__builtin_char_memchr:
5209 case Builtin::BI__builtin_object_size:
5210 case Builtin::BI__builtin_dynamic_object_size:
5213 case Builtin::BI__builtin_is_within_lifetime:
5216 case Builtin::BI__builtin_elementwise_add_sat:
5219 return LHS.isSigned() ? LHS.sadd_sat(RHS) : LHS.uadd_sat(RHS);
5222 case Builtin::BI__builtin_elementwise_sub_sat:
5225 return LHS.isSigned() ? LHS.ssub_sat(RHS) : LHS.usub_sat(RHS);
5227 case X86::BI__builtin_ia32_extract128i256:
5228 case X86::BI__builtin_ia32_vextractf128_pd256:
5229 case X86::BI__builtin_ia32_vextractf128_ps256:
5230 case X86::BI__builtin_ia32_vextractf128_si256:
5233 case X86::BI__builtin_ia32_extractf32x4_256_mask:
5234 case X86::BI__builtin_ia32_extractf32x4_mask:
5235 case X86::BI__builtin_ia32_extractf32x8_mask:
5236 case X86::BI__builtin_ia32_extractf64x2_256_mask:
5237 case X86::BI__builtin_ia32_extractf64x2_512_mask:
5238 case X86::BI__builtin_ia32_extractf64x4_mask:
5239 case X86::BI__builtin_ia32_extracti32x4_256_mask:
5240 case X86::BI__builtin_ia32_extracti32x4_mask:
5241 case X86::BI__builtin_ia32_extracti32x8_mask:
5242 case X86::BI__builtin_ia32_extracti64x2_256_mask:
5243 case X86::BI__builtin_ia32_extracti64x2_512_mask:
5244 case X86::BI__builtin_ia32_extracti64x4_mask:
5247 case clang::X86::BI__builtin_ia32_pmulhrsw128:
5248 case clang::X86::BI__builtin_ia32_pmulhrsw256:
5249 case clang::X86::BI__builtin_ia32_pmulhrsw512:
5252 return (llvm::APIntOps::mulsExtended(LHS, RHS).ashr(14) + 1)
5253 .extractBits(16, 1);
5256 case clang::X86::BI__builtin_ia32_movmskps:
5257 case clang::X86::BI__builtin_ia32_movmskpd:
5258 case clang::X86::BI__builtin_ia32_pmovmskb128:
5259 case clang::X86::BI__builtin_ia32_pmovmskb256:
5260 case clang::X86::BI__builtin_ia32_movmskps256:
5261 case clang::X86::BI__builtin_ia32_movmskpd256: {
5265 case X86::BI__builtin_ia32_psignb128:
5266 case X86::BI__builtin_ia32_psignb256:
5267 case X86::BI__builtin_ia32_psignw128:
5268 case X86::BI__builtin_ia32_psignw256:
5269 case X86::BI__builtin_ia32_psignd128:
5270 case X86::BI__builtin_ia32_psignd256:
5274 return APInt::getZero(AElem.getBitWidth());
5275 if (BElem.isNegative())
5280 case clang::X86::BI__builtin_ia32_pavgb128:
5281 case clang::X86::BI__builtin_ia32_pavgw128:
5282 case clang::X86::BI__builtin_ia32_pavgb256:
5283 case clang::X86::BI__builtin_ia32_pavgw256:
5284 case clang::X86::BI__builtin_ia32_pavgb512:
5285 case clang::X86::BI__builtin_ia32_pavgw512:
5287 llvm::APIntOps::avgCeilU);
5289 case clang::X86::BI__builtin_ia32_pmaddubsw128:
5290 case clang::X86::BI__builtin_ia32_pmaddubsw256:
5291 case clang::X86::BI__builtin_ia32_pmaddubsw512:
5296 unsigned BitWidth = 2 * LoLHS.getBitWidth();
5297 return (LoLHS.zext(BitWidth) * LoRHS.sext(BitWidth))
5298 .sadd_sat((HiLHS.zext(BitWidth) * HiRHS.sext(BitWidth)));
5301 case clang::X86::BI__builtin_ia32_pmaddwd128:
5302 case clang::X86::BI__builtin_ia32_pmaddwd256:
5303 case clang::X86::BI__builtin_ia32_pmaddwd512:
5308 unsigned BitWidth = 2 * LoLHS.getBitWidth();
5309 return (LoLHS.sext(BitWidth) * LoRHS.sext(BitWidth)) +
5310 (HiLHS.sext(BitWidth) * HiRHS.sext(BitWidth));
5313 case clang::X86::BI__builtin_ia32_dbpsadbw128:
5314 case clang::X86::BI__builtin_ia32_dbpsadbw256:
5315 case clang::X86::BI__builtin_ia32_dbpsadbw512:
5318 case clang::X86::BI__builtin_ia32_pmulhuw128:
5319 case clang::X86::BI__builtin_ia32_pmulhuw256:
5320 case clang::X86::BI__builtin_ia32_pmulhuw512:
5322 llvm::APIntOps::mulhu);
5324 case clang::X86::BI__builtin_ia32_pmulhw128:
5325 case clang::X86::BI__builtin_ia32_pmulhw256:
5326 case clang::X86::BI__builtin_ia32_pmulhw512:
5328 llvm::APIntOps::mulhs);
5330 case clang::X86::BI__builtin_ia32_psllv2di:
5331 case clang::X86::BI__builtin_ia32_psllv4di:
5332 case clang::X86::BI__builtin_ia32_psllv4si:
5333 case clang::X86::BI__builtin_ia32_psllv8di:
5334 case clang::X86::BI__builtin_ia32_psllv8hi:
5335 case clang::X86::BI__builtin_ia32_psllv8si:
5336 case clang::X86::BI__builtin_ia32_psllv16hi:
5337 case clang::X86::BI__builtin_ia32_psllv16si:
5338 case clang::X86::BI__builtin_ia32_psllv32hi:
5339 case clang::X86::BI__builtin_ia32_psllwi128:
5340 case clang::X86::BI__builtin_ia32_psllwi256:
5341 case clang::X86::BI__builtin_ia32_psllwi512:
5342 case clang::X86::BI__builtin_ia32_pslldi128:
5343 case clang::X86::BI__builtin_ia32_pslldi256:
5344 case clang::X86::BI__builtin_ia32_pslldi512:
5345 case clang::X86::BI__builtin_ia32_psllqi128:
5346 case clang::X86::BI__builtin_ia32_psllqi256:
5347 case clang::X86::BI__builtin_ia32_psllqi512:
5350 if (RHS.uge(LHS.getBitWidth())) {
5351 return APInt::getZero(LHS.getBitWidth());
5353 return LHS.shl(RHS.getZExtValue());
5356 case clang::X86::BI__builtin_ia32_psrav4si:
5357 case clang::X86::BI__builtin_ia32_psrav8di:
5358 case clang::X86::BI__builtin_ia32_psrav8hi:
5359 case clang::X86::BI__builtin_ia32_psrav8si:
5360 case clang::X86::BI__builtin_ia32_psrav16hi:
5361 case clang::X86::BI__builtin_ia32_psrav16si:
5362 case clang::X86::BI__builtin_ia32_psrav32hi:
5363 case clang::X86::BI__builtin_ia32_psravq128:
5364 case clang::X86::BI__builtin_ia32_psravq256:
5365 case clang::X86::BI__builtin_ia32_psrawi128:
5366 case clang::X86::BI__builtin_ia32_psrawi256:
5367 case clang::X86::BI__builtin_ia32_psrawi512:
5368 case clang::X86::BI__builtin_ia32_psradi128:
5369 case clang::X86::BI__builtin_ia32_psradi256:
5370 case clang::X86::BI__builtin_ia32_psradi512:
5371 case clang::X86::BI__builtin_ia32_psraqi128:
5372 case clang::X86::BI__builtin_ia32_psraqi256:
5373 case clang::X86::BI__builtin_ia32_psraqi512:
5376 if (RHS.uge(LHS.getBitWidth())) {
5377 return LHS.ashr(LHS.getBitWidth() - 1);
5379 return LHS.ashr(RHS.getZExtValue());
5382 case clang::X86::BI__builtin_ia32_psrlv2di:
5383 case clang::X86::BI__builtin_ia32_psrlv4di:
5384 case clang::X86::BI__builtin_ia32_psrlv4si:
5385 case clang::X86::BI__builtin_ia32_psrlv8di:
5386 case clang::X86::BI__builtin_ia32_psrlv8hi:
5387 case clang::X86::BI__builtin_ia32_psrlv8si:
5388 case clang::X86::BI__builtin_ia32_psrlv16hi:
5389 case clang::X86::BI__builtin_ia32_psrlv16si:
5390 case clang::X86::BI__builtin_ia32_psrlv32hi:
5391 case clang::X86::BI__builtin_ia32_psrlwi128:
5392 case clang::X86::BI__builtin_ia32_psrlwi256:
5393 case clang::X86::BI__builtin_ia32_psrlwi512:
5394 case clang::X86::BI__builtin_ia32_psrldi128:
5395 case clang::X86::BI__builtin_ia32_psrldi256:
5396 case clang::X86::BI__builtin_ia32_psrldi512:
5397 case clang::X86::BI__builtin_ia32_psrlqi128:
5398 case clang::X86::BI__builtin_ia32_psrlqi256:
5399 case clang::X86::BI__builtin_ia32_psrlqi512:
5402 if (RHS.uge(LHS.getBitWidth())) {
5403 return APInt::getZero(LHS.getBitWidth());
5405 return LHS.lshr(RHS.getZExtValue());
5407 case clang::X86::BI__builtin_ia32_packsswb128:
5408 case clang::X86::BI__builtin_ia32_packsswb256:
5409 case clang::X86::BI__builtin_ia32_packsswb512:
5410 case clang::X86::BI__builtin_ia32_packssdw128:
5411 case clang::X86::BI__builtin_ia32_packssdw256:
5412 case clang::X86::BI__builtin_ia32_packssdw512:
5414 return APInt(Src).truncSSat(Src.getBitWidth() / 2);
5416 case clang::X86::BI__builtin_ia32_packusdw128:
5417 case clang::X86::BI__builtin_ia32_packusdw256:
5418 case clang::X86::BI__builtin_ia32_packusdw512:
5419 case clang::X86::BI__builtin_ia32_packuswb128:
5420 case clang::X86::BI__builtin_ia32_packuswb256:
5421 case clang::X86::BI__builtin_ia32_packuswb512:
5423 return APInt(Src).truncSSatU(Src.getBitWidth() / 2);
5426 case clang::X86::BI__builtin_ia32_selectss_128:
5427 case clang::X86::BI__builtin_ia32_selectsd_128:
5428 case clang::X86::BI__builtin_ia32_selectsh_128:
5429 case clang::X86::BI__builtin_ia32_selectsbf_128:
5431 case clang::X86::BI__builtin_ia32_vprotbi:
5432 case clang::X86::BI__builtin_ia32_vprotdi:
5433 case clang::X86::BI__builtin_ia32_vprotqi:
5434 case clang::X86::BI__builtin_ia32_vprotwi:
5435 case clang::X86::BI__builtin_ia32_prold128:
5436 case clang::X86::BI__builtin_ia32_prold256:
5437 case clang::X86::BI__builtin_ia32_prold512:
5438 case clang::X86::BI__builtin_ia32_prolq128:
5439 case clang::X86::BI__builtin_ia32_prolq256:
5440 case clang::X86::BI__builtin_ia32_prolq512:
5443 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotl(RHS); });
5445 case clang::X86::BI__builtin_ia32_prord128:
5446 case clang::X86::BI__builtin_ia32_prord256:
5447 case clang::X86::BI__builtin_ia32_prord512:
5448 case clang::X86::BI__builtin_ia32_prorq128:
5449 case clang::X86::BI__builtin_ia32_prorq256:
5450 case clang::X86::BI__builtin_ia32_prorq512:
5453 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotr(RHS); });
5455 case Builtin::BI__builtin_elementwise_max:
5456 case Builtin::BI__builtin_elementwise_min:
5459 case clang::X86::BI__builtin_ia32_phaddw128:
5460 case clang::X86::BI__builtin_ia32_phaddw256:
5461 case clang::X86::BI__builtin_ia32_phaddd128:
5462 case clang::X86::BI__builtin_ia32_phaddd256:
5465 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
5466 case clang::X86::BI__builtin_ia32_phaddsw128:
5467 case clang::X86::BI__builtin_ia32_phaddsw256:
5470 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.sadd_sat(RHS); });
5471 case clang::X86::BI__builtin_ia32_phsubw128:
5472 case clang::X86::BI__builtin_ia32_phsubw256:
5473 case clang::X86::BI__builtin_ia32_phsubd128:
5474 case clang::X86::BI__builtin_ia32_phsubd256:
5477 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS - RHS; });
5478 case clang::X86::BI__builtin_ia32_phsubsw128:
5479 case clang::X86::BI__builtin_ia32_phsubsw256:
5482 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.ssub_sat(RHS); });
5483 case clang::X86::BI__builtin_ia32_haddpd:
5484 case clang::X86::BI__builtin_ia32_haddps:
5485 case clang::X86::BI__builtin_ia32_haddpd256:
5486 case clang::X86::BI__builtin_ia32_haddps256:
5489 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
5494 case clang::X86::BI__builtin_ia32_hsubpd:
5495 case clang::X86::BI__builtin_ia32_hsubps:
5496 case clang::X86::BI__builtin_ia32_hsubpd256:
5497 case clang::X86::BI__builtin_ia32_hsubps256:
5500 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
5502 F.subtract(RHS, RM);
5505 case clang::X86::BI__builtin_ia32_addsubpd:
5506 case clang::X86::BI__builtin_ia32_addsubps:
5507 case clang::X86::BI__builtin_ia32_addsubpd256:
5508 case clang::X86::BI__builtin_ia32_addsubps256:
5511 case clang::X86::BI__builtin_ia32_pmuldq128:
5512 case clang::X86::BI__builtin_ia32_pmuldq256:
5513 case clang::X86::BI__builtin_ia32_pmuldq512:
5518 return llvm::APIntOps::mulsExtended(LoLHS, LoRHS);
5521 case clang::X86::BI__builtin_ia32_pmuludq128:
5522 case clang::X86::BI__builtin_ia32_pmuludq256:
5523 case clang::X86::BI__builtin_ia32_pmuludq512:
5528 return llvm::APIntOps::muluExtended(LoLHS, LoRHS);
5531 case clang::X86::BI__builtin_ia32_pclmulqdq128:
5532 case clang::X86::BI__builtin_ia32_pclmulqdq256:
5533 case clang::X86::BI__builtin_ia32_pclmulqdq512:
5535 case Builtin::BI__builtin_elementwise_clmul:
5537 llvm::APIntOps::clmul);
5539 case Builtin::BI__builtin_elementwise_fma:
5543 llvm::RoundingMode RM) {
5545 F.fusedMultiplyAdd(Y, Z, RM);
5549 case X86::BI__builtin_ia32_vpmadd52luq128:
5550 case X86::BI__builtin_ia32_vpmadd52luq256:
5551 case X86::BI__builtin_ia32_vpmadd52luq512:
5554 return A + (B.trunc(52) *
C.trunc(52)).zext(64);
5556 case X86::BI__builtin_ia32_vpmadd52huq128:
5557 case X86::BI__builtin_ia32_vpmadd52huq256:
5558 case X86::BI__builtin_ia32_vpmadd52huq512:
5561 return A + llvm::APIntOps::mulhu(B.trunc(52),
C.trunc(52)).zext(64);
5564 case X86::BI__builtin_ia32_vpshldd128:
5565 case X86::BI__builtin_ia32_vpshldd256:
5566 case X86::BI__builtin_ia32_vpshldd512:
5567 case X86::BI__builtin_ia32_vpshldq128:
5568 case X86::BI__builtin_ia32_vpshldq256:
5569 case X86::BI__builtin_ia32_vpshldq512:
5570 case X86::BI__builtin_ia32_vpshldw128:
5571 case X86::BI__builtin_ia32_vpshldw256:
5572 case X86::BI__builtin_ia32_vpshldw512:
5576 return llvm::APIntOps::fshl(Hi, Lo, Amt);
5579 case X86::BI__builtin_ia32_vpshrdd128:
5580 case X86::BI__builtin_ia32_vpshrdd256:
5581 case X86::BI__builtin_ia32_vpshrdd512:
5582 case X86::BI__builtin_ia32_vpshrdq128:
5583 case X86::BI__builtin_ia32_vpshrdq256:
5584 case X86::BI__builtin_ia32_vpshrdq512:
5585 case X86::BI__builtin_ia32_vpshrdw128:
5586 case X86::BI__builtin_ia32_vpshrdw256:
5587 case X86::BI__builtin_ia32_vpshrdw512:
5592 return llvm::APIntOps::fshr(Hi, Lo, Amt);
5594 case X86::BI__builtin_ia32_vpconflictsi_128:
5595 case X86::BI__builtin_ia32_vpconflictsi_256:
5596 case X86::BI__builtin_ia32_vpconflictsi_512:
5597 case X86::BI__builtin_ia32_vpconflictdi_128:
5598 case X86::BI__builtin_ia32_vpconflictdi_256:
5599 case X86::BI__builtin_ia32_vpconflictdi_512:
5601 case X86::BI__builtin_ia32_compressdf128_mask:
5602 case X86::BI__builtin_ia32_compressdf256_mask:
5603 case X86::BI__builtin_ia32_compressdf512_mask:
5604 case X86::BI__builtin_ia32_compressdi128_mask:
5605 case X86::BI__builtin_ia32_compressdi256_mask:
5606 case X86::BI__builtin_ia32_compressdi512_mask:
5607 case X86::BI__builtin_ia32_compresshi128_mask:
5608 case X86::BI__builtin_ia32_compresshi256_mask:
5609 case X86::BI__builtin_ia32_compresshi512_mask:
5610 case X86::BI__builtin_ia32_compressqi128_mask:
5611 case X86::BI__builtin_ia32_compressqi256_mask:
5612 case X86::BI__builtin_ia32_compressqi512_mask:
5613 case X86::BI__builtin_ia32_compresssf128_mask:
5614 case X86::BI__builtin_ia32_compresssf256_mask:
5615 case X86::BI__builtin_ia32_compresssf512_mask:
5616 case X86::BI__builtin_ia32_compresssi128_mask:
5617 case X86::BI__builtin_ia32_compresssi256_mask:
5618 case X86::BI__builtin_ia32_compresssi512_mask: {
5620 Call->getArg(0)->getType()->castAs<
VectorType>()->getNumElements();
5622 S, OpPC,
Call, [NumElems](
unsigned DstIdx,
const APInt &ShuffleMask) {
5623 APInt CompressMask = ShuffleMask.trunc(NumElems);
5624 if (DstIdx < CompressMask.popcount()) {
5625 while (DstIdx != 0) {
5626 CompressMask = CompressMask & (CompressMask - 1);
5629 return std::pair<unsigned, int>{
5630 0,
static_cast<int>(CompressMask.countr_zero())};
5632 return std::pair<unsigned, int>{1,
static_cast<int>(DstIdx)};
5635 case X86::BI__builtin_ia32_expanddf128_mask:
5636 case X86::BI__builtin_ia32_expanddf256_mask:
5637 case X86::BI__builtin_ia32_expanddf512_mask:
5638 case X86::BI__builtin_ia32_expanddi128_mask:
5639 case X86::BI__builtin_ia32_expanddi256_mask:
5640 case X86::BI__builtin_ia32_expanddi512_mask:
5641 case X86::BI__builtin_ia32_expandhi128_mask:
5642 case X86::BI__builtin_ia32_expandhi256_mask:
5643 case X86::BI__builtin_ia32_expandhi512_mask:
5644 case X86::BI__builtin_ia32_expandqi128_mask:
5645 case X86::BI__builtin_ia32_expandqi256_mask:
5646 case X86::BI__builtin_ia32_expandqi512_mask:
5647 case X86::BI__builtin_ia32_expandsf128_mask:
5648 case X86::BI__builtin_ia32_expandsf256_mask:
5649 case X86::BI__builtin_ia32_expandsf512_mask:
5650 case X86::BI__builtin_ia32_expandsi128_mask:
5651 case X86::BI__builtin_ia32_expandsi256_mask:
5652 case X86::BI__builtin_ia32_expandsi512_mask: {
5654 S, OpPC,
Call, [](
unsigned DstIdx,
const APInt &ShuffleMask) {
5657 APInt ExpandMask = ShuffleMask.trunc(DstIdx + 1);
5658 if (ExpandMask[DstIdx]) {
5659 int SrcIdx = ExpandMask.popcount() - 1;
5660 return std::pair<unsigned, int>{0, SrcIdx};
5662 return std::pair<unsigned, int>{1,
static_cast<int>(DstIdx)};
5665 case clang::X86::BI__builtin_ia32_blendpd:
5666 case clang::X86::BI__builtin_ia32_blendpd256:
5667 case clang::X86::BI__builtin_ia32_blendps:
5668 case clang::X86::BI__builtin_ia32_blendps256:
5669 case clang::X86::BI__builtin_ia32_pblendw128:
5670 case clang::X86::BI__builtin_ia32_pblendw256:
5671 case clang::X86::BI__builtin_ia32_pblendd128:
5672 case clang::X86::BI__builtin_ia32_pblendd256:
5674 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5676 unsigned MaskBit = (ShuffleMask >> (DstIdx % 8)) & 0x1;
5677 unsigned SrcVecIdx = MaskBit ? 1 : 0;
5678 return std::pair<unsigned, int>{SrcVecIdx,
static_cast<int>(DstIdx)};
5683 case clang::X86::BI__builtin_ia32_blendvpd:
5684 case clang::X86::BI__builtin_ia32_blendvpd256:
5685 case clang::X86::BI__builtin_ia32_blendvps:
5686 case clang::X86::BI__builtin_ia32_blendvps256:
5690 llvm::RoundingMode) {
return C.isNegative() ? T : F; });
5692 case clang::X86::BI__builtin_ia32_pblendvb128:
5693 case clang::X86::BI__builtin_ia32_pblendvb256:
5696 return ((
APInt)
C).isNegative() ? T : F;
5698 case X86::BI__builtin_ia32_ptestz128:
5699 case X86::BI__builtin_ia32_ptestz256:
5700 case X86::BI__builtin_ia32_vtestzps:
5701 case X86::BI__builtin_ia32_vtestzps256:
5702 case X86::BI__builtin_ia32_vtestzpd:
5703 case X86::BI__builtin_ia32_vtestzpd256:
5706 [](
const APInt &A,
const APInt &B) {
return (A & B) == 0; });
5707 case X86::BI__builtin_ia32_ptestc128:
5708 case X86::BI__builtin_ia32_ptestc256:
5709 case X86::BI__builtin_ia32_vtestcps:
5710 case X86::BI__builtin_ia32_vtestcps256:
5711 case X86::BI__builtin_ia32_vtestcpd:
5712 case X86::BI__builtin_ia32_vtestcpd256:
5715 [](
const APInt &A,
const APInt &B) {
return (~A & B) == 0; });
5716 case X86::BI__builtin_ia32_ptestnzc128:
5717 case X86::BI__builtin_ia32_ptestnzc256:
5718 case X86::BI__builtin_ia32_vtestnzcps:
5719 case X86::BI__builtin_ia32_vtestnzcps256:
5720 case X86::BI__builtin_ia32_vtestnzcpd:
5721 case X86::BI__builtin_ia32_vtestnzcpd256:
5724 return ((A & B) != 0) && ((~A & B) != 0);
5726 case X86::BI__builtin_ia32_selectb_128:
5727 case X86::BI__builtin_ia32_selectb_256:
5728 case X86::BI__builtin_ia32_selectb_512:
5729 case X86::BI__builtin_ia32_selectw_128:
5730 case X86::BI__builtin_ia32_selectw_256:
5731 case X86::BI__builtin_ia32_selectw_512:
5732 case X86::BI__builtin_ia32_selectd_128:
5733 case X86::BI__builtin_ia32_selectd_256:
5734 case X86::BI__builtin_ia32_selectd_512:
5735 case X86::BI__builtin_ia32_selectq_128:
5736 case X86::BI__builtin_ia32_selectq_256:
5737 case X86::BI__builtin_ia32_selectq_512:
5738 case X86::BI__builtin_ia32_selectph_128:
5739 case X86::BI__builtin_ia32_selectph_256:
5740 case X86::BI__builtin_ia32_selectph_512:
5741 case X86::BI__builtin_ia32_selectpbf_128:
5742 case X86::BI__builtin_ia32_selectpbf_256:
5743 case X86::BI__builtin_ia32_selectpbf_512:
5744 case X86::BI__builtin_ia32_selectps_128:
5745 case X86::BI__builtin_ia32_selectps_256:
5746 case X86::BI__builtin_ia32_selectps_512:
5747 case X86::BI__builtin_ia32_selectpd_128:
5748 case X86::BI__builtin_ia32_selectpd_256:
5749 case X86::BI__builtin_ia32_selectpd_512:
5752 case X86::BI__builtin_ia32_shufps:
5753 case X86::BI__builtin_ia32_shufps256:
5754 case X86::BI__builtin_ia32_shufps512:
5756 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5757 unsigned NumElemPerLane = 4;
5758 unsigned NumSelectableElems = NumElemPerLane / 2;
5759 unsigned BitsPerElem = 2;
5760 unsigned IndexMask = 0x3;
5761 unsigned MaskBits = 8;
5762 unsigned Lane = DstIdx / NumElemPerLane;
5763 unsigned ElemInLane = DstIdx % NumElemPerLane;
5764 unsigned LaneOffset = Lane * NumElemPerLane;
5765 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
5766 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5767 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
5768 return std::pair<unsigned, int>{SrcIdx,
5769 static_cast<int>(LaneOffset + Index)};
5771 case X86::BI__builtin_ia32_shufpd:
5772 case X86::BI__builtin_ia32_shufpd256:
5773 case X86::BI__builtin_ia32_shufpd512:
5775 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5776 unsigned NumElemPerLane = 2;
5777 unsigned NumSelectableElems = NumElemPerLane / 2;
5778 unsigned BitsPerElem = 1;
5779 unsigned IndexMask = 0x1;
5780 unsigned MaskBits = 8;
5781 unsigned Lane = DstIdx / NumElemPerLane;
5782 unsigned ElemInLane = DstIdx % NumElemPerLane;
5783 unsigned LaneOffset = Lane * NumElemPerLane;
5784 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
5785 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5786 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
5787 return std::pair<unsigned, int>{SrcIdx,
5788 static_cast<int>(LaneOffset + Index)};
5791 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v16qi:
5792 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v32qi:
5793 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v64qi:
5795 case X86::BI__builtin_ia32_vgf2p8affineqb_v16qi:
5796 case X86::BI__builtin_ia32_vgf2p8affineqb_v32qi:
5797 case X86::BI__builtin_ia32_vgf2p8affineqb_v64qi:
5800 case X86::BI__builtin_ia32_vgf2p8mulb_v16qi:
5801 case X86::BI__builtin_ia32_vgf2p8mulb_v32qi:
5802 case X86::BI__builtin_ia32_vgf2p8mulb_v64qi:
5805 case X86::BI__builtin_ia32_insertps128:
5807 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Mask) {
5809 if ((Mask & (1 << DstIdx)) != 0) {
5810 return std::pair<unsigned, int>{0, -1};
5814 unsigned SrcElem = (Mask >> 6) & 0x3;
5815 unsigned DstElem = (Mask >> 4) & 0x3;
5816 if (DstIdx == DstElem) {
5818 return std::pair<unsigned, int>{1,
static_cast<int>(SrcElem)};
5821 return std::pair<unsigned, int>{0,
static_cast<int>(DstIdx)};
5824 case X86::BI__builtin_ia32_permvarsi256:
5825 case X86::BI__builtin_ia32_permvarsf256:
5826 case X86::BI__builtin_ia32_permvardf512:
5827 case X86::BI__builtin_ia32_permvardi512:
5828 case X86::BI__builtin_ia32_permvarhi128:
5830 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5831 int Offset = ShuffleMask & 0x7;
5832 return std::pair<unsigned, int>{0, Offset};
5834 case X86::BI__builtin_ia32_permvarqi128:
5835 case X86::BI__builtin_ia32_permvarhi256:
5836 case X86::BI__builtin_ia32_permvarsi512:
5837 case X86::BI__builtin_ia32_permvarsf512:
5839 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5840 int Offset = ShuffleMask & 0xF;
5841 return std::pair<unsigned, int>{0, Offset};
5843 case X86::BI__builtin_ia32_permvardi256:
5844 case X86::BI__builtin_ia32_permvardf256:
5846 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5847 int Offset = ShuffleMask & 0x3;
5848 return std::pair<unsigned, int>{0, Offset};
5850 case X86::BI__builtin_ia32_permvarqi256:
5851 case X86::BI__builtin_ia32_permvarhi512:
5853 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5854 int Offset = ShuffleMask & 0x1F;
5855 return std::pair<unsigned, int>{0, Offset};
5857 case X86::BI__builtin_ia32_permvarqi512:
5859 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5860 int Offset = ShuffleMask & 0x3F;
5861 return std::pair<unsigned, int>{0, Offset};
5863 case X86::BI__builtin_ia32_vpermi2varq128:
5864 case X86::BI__builtin_ia32_vpermi2varpd128:
5866 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5867 int Offset = ShuffleMask & 0x1;
5868 unsigned SrcIdx = (ShuffleMask >> 1) & 0x1;
5869 return std::pair<unsigned, int>{SrcIdx, Offset};
5871 case X86::BI__builtin_ia32_vpermi2vard128:
5872 case X86::BI__builtin_ia32_vpermi2varps128:
5873 case X86::BI__builtin_ia32_vpermi2varq256:
5874 case X86::BI__builtin_ia32_vpermi2varpd256:
5876 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5877 int Offset = ShuffleMask & 0x3;
5878 unsigned SrcIdx = (ShuffleMask >> 2) & 0x1;
5879 return std::pair<unsigned, int>{SrcIdx, Offset};
5881 case X86::BI__builtin_ia32_vpermi2varhi128:
5882 case X86::BI__builtin_ia32_vpermi2vard256:
5883 case X86::BI__builtin_ia32_vpermi2varps256:
5884 case X86::BI__builtin_ia32_vpermi2varq512:
5885 case X86::BI__builtin_ia32_vpermi2varpd512:
5887 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5888 int Offset = ShuffleMask & 0x7;
5889 unsigned SrcIdx = (ShuffleMask >> 3) & 0x1;
5890 return std::pair<unsigned, int>{SrcIdx, Offset};
5892 case X86::BI__builtin_ia32_vpermi2varqi128:
5893 case X86::BI__builtin_ia32_vpermi2varhi256:
5894 case X86::BI__builtin_ia32_vpermi2vard512:
5895 case X86::BI__builtin_ia32_vpermi2varps512:
5897 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5898 int Offset = ShuffleMask & 0xF;
5899 unsigned SrcIdx = (ShuffleMask >> 4) & 0x1;
5900 return std::pair<unsigned, int>{SrcIdx, Offset};
5902 case X86::BI__builtin_ia32_vpermi2varqi256:
5903 case X86::BI__builtin_ia32_vpermi2varhi512:
5905 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5906 int Offset = ShuffleMask & 0x1F;
5907 unsigned SrcIdx = (ShuffleMask >> 5) & 0x1;
5908 return std::pair<unsigned, int>{SrcIdx, Offset};
5910 case X86::BI__builtin_ia32_vpermi2varqi512:
5912 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5913 int Offset = ShuffleMask & 0x3F;
5914 unsigned SrcIdx = (ShuffleMask >> 6) & 0x1;
5915 return std::pair<unsigned, int>{SrcIdx, Offset};
5917 case X86::BI__builtin_ia32_vperm2f128_pd256:
5918 case X86::BI__builtin_ia32_vperm2f128_ps256:
5919 case X86::BI__builtin_ia32_vperm2f128_si256:
5920 case X86::BI__builtin_ia32_permti256: {
5921 unsigned NumElements =
5922 Call->getArg(0)->getType()->castAs<
VectorType>()->getNumElements();
5923 unsigned PreservedBitsCnt = NumElements >> 2;
5926 [PreservedBitsCnt](
unsigned DstIdx,
unsigned ShuffleMask) {
5927 unsigned ControlBitsCnt = DstIdx >> PreservedBitsCnt << 2;
5928 unsigned ControlBits = ShuffleMask >> ControlBitsCnt;
5930 if (ControlBits & 0b1000)
5931 return std::make_pair(0u, -1);
5933 unsigned SrcVecIdx = (ControlBits & 0b10) >> 1;
5934 unsigned PreservedBitsMask = (1 << PreservedBitsCnt) - 1;
5935 int SrcIdx = ((ControlBits & 0b1) << PreservedBitsCnt) |
5936 (DstIdx & PreservedBitsMask);
5937 return std::make_pair(SrcVecIdx, SrcIdx);
5940 case X86::BI__builtin_ia32_pshufb128:
5941 case X86::BI__builtin_ia32_pshufb256:
5942 case X86::BI__builtin_ia32_pshufb512:
5944 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5945 uint8_t Ctlb =
static_cast<uint8_t
>(ShuffleMask);
5947 return std::make_pair(0, -1);
5949 unsigned LaneBase = (DstIdx / 16) * 16;
5950 unsigned SrcOffset = Ctlb & 0x0F;
5951 unsigned SrcIdx = LaneBase + SrcOffset;
5952 return std::make_pair(0,
static_cast<int>(SrcIdx));
5955 case X86::BI__builtin_ia32_pshuflw:
5956 case X86::BI__builtin_ia32_pshuflw256:
5957 case X86::BI__builtin_ia32_pshuflw512:
5959 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5960 unsigned LaneBase = (DstIdx / 8) * 8;
5961 unsigned LaneIdx = DstIdx % 8;
5963 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
5964 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
5967 return std::make_pair(0,
static_cast<int>(DstIdx));
5970 case X86::BI__builtin_ia32_pshufhw:
5971 case X86::BI__builtin_ia32_pshufhw256:
5972 case X86::BI__builtin_ia32_pshufhw512:
5974 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5975 unsigned LaneBase = (DstIdx / 8) * 8;
5976 unsigned LaneIdx = DstIdx % 8;
5978 unsigned Sel = (ShuffleMask >> (2 * (LaneIdx - 4))) & 0x3;
5979 return std::make_pair(0,
static_cast<int>(LaneBase + 4 + Sel));
5982 return std::make_pair(0,
static_cast<int>(DstIdx));
5985 case X86::BI__builtin_ia32_pshufd:
5986 case X86::BI__builtin_ia32_pshufd256:
5987 case X86::BI__builtin_ia32_pshufd512:
5988 case X86::BI__builtin_ia32_vpermilps:
5989 case X86::BI__builtin_ia32_vpermilps256:
5990 case X86::BI__builtin_ia32_vpermilps512:
5992 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5993 unsigned LaneBase = (DstIdx / 4) * 4;
5994 unsigned LaneIdx = DstIdx % 4;
5995 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
5996 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
5999 case X86::BI__builtin_ia32_vpermilvarpd:
6000 case X86::BI__builtin_ia32_vpermilvarpd256:
6001 case X86::BI__builtin_ia32_vpermilvarpd512:
6003 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6004 unsigned NumElemPerLane = 2;
6005 unsigned Lane = DstIdx / NumElemPerLane;
6006 unsigned Offset = ShuffleMask & 0b10 ? 1 : 0;
6007 return std::make_pair(
6008 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
6011 case X86::BI__builtin_ia32_vpermilvarps:
6012 case X86::BI__builtin_ia32_vpermilvarps256:
6013 case X86::BI__builtin_ia32_vpermilvarps512:
6015 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6016 unsigned NumElemPerLane = 4;
6017 unsigned Lane = DstIdx / NumElemPerLane;
6018 unsigned Offset = ShuffleMask & 0b11;
6019 return std::make_pair(
6020 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
6023 case X86::BI__builtin_ia32_vpermilpd:
6024 case X86::BI__builtin_ia32_vpermilpd256:
6025 case X86::BI__builtin_ia32_vpermilpd512:
6027 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Control) {
6028 unsigned NumElemPerLane = 2;
6029 unsigned BitsPerElem = 1;
6030 unsigned MaskBits = 8;
6031 unsigned IndexMask = 0x1;
6032 unsigned Lane = DstIdx / NumElemPerLane;
6033 unsigned LaneOffset = Lane * NumElemPerLane;
6034 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
6035 unsigned Index = (Control >> BitIndex) & IndexMask;
6036 return std::make_pair(0,
static_cast<int>(LaneOffset + Index));
6039 case X86::BI__builtin_ia32_permdf256:
6040 case X86::BI__builtin_ia32_permdi256:
6042 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Control) {
6045 unsigned Index = (Control >> (2 * DstIdx)) & 0x3;
6046 return std::make_pair(0,
static_cast<int>(Index));
6049 case X86::BI__builtin_ia32_vpmultishiftqb128:
6050 case X86::BI__builtin_ia32_vpmultishiftqb256:
6051 case X86::BI__builtin_ia32_vpmultishiftqb512:
6053 case X86::BI__builtin_ia32_kandqi:
6054 case X86::BI__builtin_ia32_kandhi:
6055 case X86::BI__builtin_ia32_kandsi:
6056 case X86::BI__builtin_ia32_kanddi:
6059 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS & RHS; });
6061 case X86::BI__builtin_ia32_kandnqi:
6062 case X86::BI__builtin_ia32_kandnhi:
6063 case X86::BI__builtin_ia32_kandnsi:
6064 case X86::BI__builtin_ia32_kandndi:
6067 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~LHS & RHS; });
6069 case X86::BI__builtin_ia32_korqi:
6070 case X86::BI__builtin_ia32_korhi:
6071 case X86::BI__builtin_ia32_korsi:
6072 case X86::BI__builtin_ia32_kordi:
6075 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS | RHS; });
6077 case X86::BI__builtin_ia32_kxnorqi:
6078 case X86::BI__builtin_ia32_kxnorhi:
6079 case X86::BI__builtin_ia32_kxnorsi:
6080 case X86::BI__builtin_ia32_kxnordi:
6083 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~(LHS ^ RHS); });
6085 case X86::BI__builtin_ia32_kxorqi:
6086 case X86::BI__builtin_ia32_kxorhi:
6087 case X86::BI__builtin_ia32_kxorsi:
6088 case X86::BI__builtin_ia32_kxordi:
6091 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS ^ RHS; });
6093 case X86::BI__builtin_ia32_knotqi:
6094 case X86::BI__builtin_ia32_knothi:
6095 case X86::BI__builtin_ia32_knotsi:
6096 case X86::BI__builtin_ia32_knotdi:
6098 S, OpPC,
Call, [](
const APSInt &Src) {
return ~Src; });
6100 case X86::BI__builtin_ia32_kaddqi:
6101 case X86::BI__builtin_ia32_kaddhi:
6102 case X86::BI__builtin_ia32_kaddsi:
6103 case X86::BI__builtin_ia32_kadddi:
6106 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
6108 case X86::BI__builtin_ia32_kmovb:
6109 case X86::BI__builtin_ia32_kmovw:
6110 case X86::BI__builtin_ia32_kmovd:
6111 case X86::BI__builtin_ia32_kmovq:
6113 S, OpPC,
Call, [](
const APSInt &Src) {
return Src; });
6115 case X86::BI__builtin_ia32_kunpckhi:
6116 case X86::BI__builtin_ia32_kunpckdi:
6117 case X86::BI__builtin_ia32_kunpcksi:
6122 unsigned BW = A.getBitWidth();
6123 return APSInt(A.trunc(BW / 2).concat(B.trunc(BW / 2)),
6127 case X86::BI__builtin_ia32_phminposuw128:
6130 case X86::BI__builtin_ia32_psraq128:
6131 case X86::BI__builtin_ia32_psraq256:
6132 case X86::BI__builtin_ia32_psraq512:
6133 case X86::BI__builtin_ia32_psrad128:
6134 case X86::BI__builtin_ia32_psrad256:
6135 case X86::BI__builtin_ia32_psrad512:
6136 case X86::BI__builtin_ia32_psraw128:
6137 case X86::BI__builtin_ia32_psraw256:
6138 case X86::BI__builtin_ia32_psraw512:
6141 [](
const APInt &Elt, uint64_t Count) {
return Elt.ashr(Count); },
6142 [](
const APInt &Elt,
unsigned Width) {
return Elt.ashr(Width - 1); });
6144 case X86::BI__builtin_ia32_psllq128:
6145 case X86::BI__builtin_ia32_psllq256:
6146 case X86::BI__builtin_ia32_psllq512:
6147 case X86::BI__builtin_ia32_pslld128:
6148 case X86::BI__builtin_ia32_pslld256:
6149 case X86::BI__builtin_ia32_pslld512:
6150 case X86::BI__builtin_ia32_psllw128:
6151 case X86::BI__builtin_ia32_psllw256:
6152 case X86::BI__builtin_ia32_psllw512:
6155 [](
const APInt &Elt, uint64_t Count) {
return Elt.shl(Count); },
6156 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
6158 case X86::BI__builtin_ia32_psrlq128:
6159 case X86::BI__builtin_ia32_psrlq256:
6160 case X86::BI__builtin_ia32_psrlq512:
6161 case X86::BI__builtin_ia32_psrld128:
6162 case X86::BI__builtin_ia32_psrld256:
6163 case X86::BI__builtin_ia32_psrld512:
6164 case X86::BI__builtin_ia32_psrlw128:
6165 case X86::BI__builtin_ia32_psrlw256:
6166 case X86::BI__builtin_ia32_psrlw512:
6169 [](
const APInt &Elt, uint64_t Count) {
return Elt.lshr(Count); },
6170 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
6172 case X86::BI__builtin_ia32_pternlogd128_mask:
6173 case X86::BI__builtin_ia32_pternlogd256_mask:
6174 case X86::BI__builtin_ia32_pternlogd512_mask:
6175 case X86::BI__builtin_ia32_pternlogq128_mask:
6176 case X86::BI__builtin_ia32_pternlogq256_mask:
6177 case X86::BI__builtin_ia32_pternlogq512_mask:
6179 case X86::BI__builtin_ia32_pternlogd128_maskz:
6180 case X86::BI__builtin_ia32_pternlogd256_maskz:
6181 case X86::BI__builtin_ia32_pternlogd512_maskz:
6182 case X86::BI__builtin_ia32_pternlogq128_maskz:
6183 case X86::BI__builtin_ia32_pternlogq256_maskz:
6184 case X86::BI__builtin_ia32_pternlogq512_maskz:
6186 case Builtin::BI__builtin_elementwise_fshl:
6188 llvm::APIntOps::fshl);
6189 case Builtin::BI__builtin_elementwise_fshr:
6191 llvm::APIntOps::fshr);
6193 case X86::BI__builtin_ia32_shuf_f32x4_256:
6194 case X86::BI__builtin_ia32_shuf_i32x4_256:
6195 case X86::BI__builtin_ia32_shuf_f64x2_256:
6196 case X86::BI__builtin_ia32_shuf_i64x2_256:
6197 case X86::BI__builtin_ia32_shuf_f32x4:
6198 case X86::BI__builtin_ia32_shuf_i32x4:
6199 case X86::BI__builtin_ia32_shuf_f64x2:
6200 case X86::BI__builtin_ia32_shuf_i64x2: {
6206 unsigned LaneBits = 128u;
6207 unsigned NumLanes = (NumElems * ElemBits) / LaneBits;
6208 unsigned NumElemsPerLane = LaneBits / ElemBits;
6212 [NumLanes, NumElemsPerLane](
unsigned DstIdx,
unsigned ShuffleMask) {
6214 unsigned BitsPerElem = NumLanes / 2;
6215 unsigned IndexMask = (1u << BitsPerElem) - 1;
6216 unsigned Lane = DstIdx / NumElemsPerLane;
6217 unsigned SrcIdx = (Lane < NumLanes / 2) ? 0 : 1;
6218 unsigned BitIdx = BitsPerElem * Lane;
6219 unsigned SrcLaneIdx = (ShuffleMask >> BitIdx) & IndexMask;
6220 unsigned ElemInLane = DstIdx % NumElemsPerLane;
6221 unsigned IdxToPick = SrcLaneIdx * NumElemsPerLane + ElemInLane;
6222 return std::pair<unsigned, int>{SrcIdx, IdxToPick};
6226 case X86::BI__builtin_ia32_insertf32x4_256:
6227 case X86::BI__builtin_ia32_inserti32x4_256:
6228 case X86::BI__builtin_ia32_insertf64x2_256:
6229 case X86::BI__builtin_ia32_inserti64x2_256:
6230 case X86::BI__builtin_ia32_insertf32x4:
6231 case X86::BI__builtin_ia32_inserti32x4:
6232 case X86::BI__builtin_ia32_insertf64x2_512:
6233 case X86::BI__builtin_ia32_inserti64x2_512:
6234 case X86::BI__builtin_ia32_insertf32x8:
6235 case X86::BI__builtin_ia32_inserti32x8:
6236 case X86::BI__builtin_ia32_insertf64x4:
6237 case X86::BI__builtin_ia32_inserti64x4:
6238 case X86::BI__builtin_ia32_vinsertf128_ps256:
6239 case X86::BI__builtin_ia32_vinsertf128_pd256:
6240 case X86::BI__builtin_ia32_vinsertf128_si256:
6241 case X86::BI__builtin_ia32_insert128i256:
6244 case clang::X86::BI__builtin_ia32_vcvtps2ph:
6245 case clang::X86::BI__builtin_ia32_vcvtps2ph256:
6248 case X86::BI__builtin_ia32_vec_ext_v4hi:
6249 case X86::BI__builtin_ia32_vec_ext_v16qi:
6250 case X86::BI__builtin_ia32_vec_ext_v8hi:
6251 case X86::BI__builtin_ia32_vec_ext_v4si:
6252 case X86::BI__builtin_ia32_vec_ext_v2di:
6253 case X86::BI__builtin_ia32_vec_ext_v32qi:
6254 case X86::BI__builtin_ia32_vec_ext_v16hi:
6255 case X86::BI__builtin_ia32_vec_ext_v8si:
6256 case X86::BI__builtin_ia32_vec_ext_v4di:
6257 case X86::BI__builtin_ia32_vec_ext_v4sf:
6260 case X86::BI__builtin_ia32_vec_set_v4hi:
6261 case X86::BI__builtin_ia32_vec_set_v16qi:
6262 case X86::BI__builtin_ia32_vec_set_v8hi:
6263 case X86::BI__builtin_ia32_vec_set_v4si:
6264 case X86::BI__builtin_ia32_vec_set_v2di:
6265 case X86::BI__builtin_ia32_vec_set_v32qi:
6266 case X86::BI__builtin_ia32_vec_set_v16hi:
6267 case X86::BI__builtin_ia32_vec_set_v8si:
6268 case X86::BI__builtin_ia32_vec_set_v4di:
6271 case X86::BI__builtin_ia32_cvtb2mask128:
6272 case X86::BI__builtin_ia32_cvtb2mask256:
6273 case X86::BI__builtin_ia32_cvtb2mask512:
6274 case X86::BI__builtin_ia32_cvtw2mask128:
6275 case X86::BI__builtin_ia32_cvtw2mask256:
6276 case X86::BI__builtin_ia32_cvtw2mask512:
6277 case X86::BI__builtin_ia32_cvtd2mask128:
6278 case X86::BI__builtin_ia32_cvtd2mask256:
6279 case X86::BI__builtin_ia32_cvtd2mask512:
6280 case X86::BI__builtin_ia32_cvtq2mask128:
6281 case X86::BI__builtin_ia32_cvtq2mask256:
6282 case X86::BI__builtin_ia32_cvtq2mask512:
6285 case X86::BI__builtin_ia32_cvtmask2b128:
6286 case X86::BI__builtin_ia32_cvtmask2b256:
6287 case X86::BI__builtin_ia32_cvtmask2b512:
6288 case X86::BI__builtin_ia32_cvtmask2w128:
6289 case X86::BI__builtin_ia32_cvtmask2w256:
6290 case X86::BI__builtin_ia32_cvtmask2w512:
6291 case X86::BI__builtin_ia32_cvtmask2d128:
6292 case X86::BI__builtin_ia32_cvtmask2d256:
6293 case X86::BI__builtin_ia32_cvtmask2d512:
6294 case X86::BI__builtin_ia32_cvtmask2q128:
6295 case X86::BI__builtin_ia32_cvtmask2q256:
6296 case X86::BI__builtin_ia32_cvtmask2q512:
6299 case X86::BI__builtin_ia32_cvtsd2ss:
6302 case X86::BI__builtin_ia32_cvtsd2ss_round_mask:
6305 case X86::BI__builtin_ia32_cvtpd2ps:
6306 case X86::BI__builtin_ia32_cvtpd2ps256:
6308 case X86::BI__builtin_ia32_cvtpd2ps_mask:
6310 case X86::BI__builtin_ia32_cvtpd2ps512_mask:
6313 case X86::BI__builtin_ia32_cmpb128_mask:
6314 case X86::BI__builtin_ia32_cmpw128_mask:
6315 case X86::BI__builtin_ia32_cmpd128_mask:
6316 case X86::BI__builtin_ia32_cmpq128_mask:
6317 case X86::BI__builtin_ia32_cmpb256_mask:
6318 case X86::BI__builtin_ia32_cmpw256_mask:
6319 case X86::BI__builtin_ia32_cmpd256_mask:
6320 case X86::BI__builtin_ia32_cmpq256_mask:
6321 case X86::BI__builtin_ia32_cmpb512_mask:
6322 case X86::BI__builtin_ia32_cmpw512_mask:
6323 case X86::BI__builtin_ia32_cmpd512_mask:
6324 case X86::BI__builtin_ia32_cmpq512_mask:
6328 case X86::BI__builtin_ia32_ucmpb128_mask:
6329 case X86::BI__builtin_ia32_ucmpw128_mask:
6330 case X86::BI__builtin_ia32_ucmpd128_mask:
6331 case X86::BI__builtin_ia32_ucmpq128_mask:
6332 case X86::BI__builtin_ia32_ucmpb256_mask:
6333 case X86::BI__builtin_ia32_ucmpw256_mask:
6334 case X86::BI__builtin_ia32_ucmpd256_mask:
6335 case X86::BI__builtin_ia32_ucmpq256_mask:
6336 case X86::BI__builtin_ia32_ucmpb512_mask:
6337 case X86::BI__builtin_ia32_ucmpw512_mask:
6338 case X86::BI__builtin_ia32_ucmpd512_mask:
6339 case X86::BI__builtin_ia32_ucmpq512_mask:
6343 case X86::BI__builtin_ia32_vpshufbitqmb128_mask:
6344 case X86::BI__builtin_ia32_vpshufbitqmb256_mask:
6345 case X86::BI__builtin_ia32_vpshufbitqmb512_mask:
6348 case X86::BI__builtin_ia32_pslldqi128_byteshift:
6349 case X86::BI__builtin_ia32_pslldqi256_byteshift:
6350 case X86::BI__builtin_ia32_pslldqi512_byteshift:
6357 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
6358 unsigned LaneBase = (DstIdx / 16) * 16;
6359 unsigned LaneIdx = DstIdx % 16;
6360 if (LaneIdx < Shift)
6361 return std::make_pair(0, -1);
6363 return std::make_pair(0,
6364 static_cast<int>(LaneBase + LaneIdx - Shift));
6367 case X86::BI__builtin_ia32_psrldqi128_byteshift:
6368 case X86::BI__builtin_ia32_psrldqi256_byteshift:
6369 case X86::BI__builtin_ia32_psrldqi512_byteshift:
6376 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
6377 unsigned LaneBase = (DstIdx / 16) * 16;
6378 unsigned LaneIdx = DstIdx % 16;
6379 if (LaneIdx + Shift < 16)
6380 return std::make_pair(0,
6381 static_cast<int>(LaneBase + LaneIdx + Shift));
6383 return std::make_pair(0, -1);
6386 case X86::BI__builtin_ia32_palignr128:
6387 case X86::BI__builtin_ia32_palignr256:
6388 case X86::BI__builtin_ia32_palignr512:
6390 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Shift) {
6392 unsigned VecIdx = 1;
6395 int Lane = DstIdx / 16;
6396 int Offset = DstIdx % 16;
6399 unsigned ShiftedIdx = Offset + (Shift & 0xFF);
6400 if (ShiftedIdx < 16) {
6401 ElemIdx = ShiftedIdx + (Lane * 16);
6402 }
else if (ShiftedIdx < 32) {
6404 ElemIdx = (ShiftedIdx - 16) + (Lane * 16);
6407 return std::pair<unsigned, int>{VecIdx, ElemIdx};
6410 case X86::BI__builtin_ia32_alignd128:
6411 case X86::BI__builtin_ia32_alignd256:
6412 case X86::BI__builtin_ia32_alignd512:
6413 case X86::BI__builtin_ia32_alignq128:
6414 case X86::BI__builtin_ia32_alignq256:
6415 case X86::BI__builtin_ia32_alignq512: {
6416 unsigned NumElems =
Call->getType()->castAs<
VectorType>()->getNumElements();
6418 S, OpPC,
Call, [NumElems](
unsigned DstIdx,
unsigned Shift) {
6419 unsigned Imm = Shift & 0xFF;
6420 unsigned EffectiveShift = Imm & (NumElems - 1);
6421 unsigned SourcePos = DstIdx + EffectiveShift;
6422 unsigned VecIdx = SourcePos < NumElems ? 1u : 0u;
6423 unsigned ElemIdx = SourcePos & (NumElems - 1);
6424 return std::pair<unsigned, int>{VecIdx,
static_cast<int>(ElemIdx)};
6428 case clang::X86::BI__builtin_ia32_minps:
6429 case clang::X86::BI__builtin_ia32_minpd:
6430 case clang::X86::BI__builtin_ia32_minph128:
6431 case clang::X86::BI__builtin_ia32_minph256:
6432 case clang::X86::BI__builtin_ia32_minps256:
6433 case clang::X86::BI__builtin_ia32_minpd256:
6434 case clang::X86::BI__builtin_ia32_minps512:
6435 case clang::X86::BI__builtin_ia32_minpd512:
6436 case clang::X86::BI__builtin_ia32_minph512:
6440 std::optional<APSInt>) -> std::optional<APFloat> {
6441 if (A.isNaN() || A.isInfinity() || A.isDenormal() || B.isNaN() ||
6442 B.isInfinity() || B.isDenormal())
6443 return std::nullopt;
6444 if (A.isZero() && B.isZero())
6446 return llvm::minimum(A, B);
6449 case clang::X86::BI__builtin_ia32_minss:
6450 case clang::X86::BI__builtin_ia32_minsd:
6454 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
6459 case clang::X86::BI__builtin_ia32_minsd_round_mask:
6460 case clang::X86::BI__builtin_ia32_minss_round_mask:
6461 case clang::X86::BI__builtin_ia32_minsh_round_mask:
6462 case clang::X86::BI__builtin_ia32_maxsd_round_mask:
6463 case clang::X86::BI__builtin_ia32_maxss_round_mask:
6464 case clang::X86::BI__builtin_ia32_maxsh_round_mask: {
6465 bool IsMin = BuiltinID == clang::X86::BI__builtin_ia32_minsd_round_mask ||
6466 BuiltinID == clang::X86::BI__builtin_ia32_minss_round_mask ||
6467 BuiltinID == clang::X86::BI__builtin_ia32_minsh_round_mask;
6471 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
6476 case clang::X86::BI__builtin_ia32_maxps:
6477 case clang::X86::BI__builtin_ia32_maxpd:
6478 case clang::X86::BI__builtin_ia32_maxph128:
6479 case clang::X86::BI__builtin_ia32_maxph256:
6480 case clang::X86::BI__builtin_ia32_maxps256:
6481 case clang::X86::BI__builtin_ia32_maxpd256:
6482 case clang::X86::BI__builtin_ia32_maxps512:
6483 case clang::X86::BI__builtin_ia32_maxpd512:
6484 case clang::X86::BI__builtin_ia32_maxph512:
6488 std::optional<APSInt>) -> std::optional<APFloat> {
6489 if (A.isNaN() || A.isInfinity() || A.isDenormal() || B.isNaN() ||
6490 B.isInfinity() || B.isDenormal())
6491 return std::nullopt;
6492 if (A.isZero() && B.isZero())
6494 return llvm::maximum(A, B);
6497 case clang::X86::BI__builtin_ia32_maxss:
6498 case clang::X86::BI__builtin_ia32_maxsd:
6502 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
6509 diag::note_invalid_subexpr_in_const_expr)
6515 llvm_unreachable(
"Unhandled builtin ID");