4030 uint32_t BuiltinID) {
4035 switch (BuiltinID) {
4036 case Builtin::BI__builtin_is_constant_evaluated:
4039 case Builtin::BI__builtin_assume:
4040 case Builtin::BI__assume:
4043 case Builtin::BI__builtin_strcmp:
4044 case Builtin::BIstrcmp:
4045 case Builtin::BI__builtin_strncmp:
4046 case Builtin::BIstrncmp:
4047 case Builtin::BI__builtin_wcsncmp:
4048 case Builtin::BIwcsncmp:
4049 case Builtin::BI__builtin_wcscmp:
4050 case Builtin::BIwcscmp:
4053 case Builtin::BI__builtin_strlen:
4054 case Builtin::BIstrlen:
4055 case Builtin::BI__builtin_wcslen:
4056 case Builtin::BIwcslen:
4059 case Builtin::BI__builtin_nan:
4060 case Builtin::BI__builtin_nanf:
4061 case Builtin::BI__builtin_nanl:
4062 case Builtin::BI__builtin_nanf16:
4063 case Builtin::BI__builtin_nanf128:
4066 case Builtin::BI__builtin_nans:
4067 case Builtin::BI__builtin_nansf:
4068 case Builtin::BI__builtin_nansl:
4069 case Builtin::BI__builtin_nansf16:
4070 case Builtin::BI__builtin_nansf128:
4073 case Builtin::BI__builtin_huge_val:
4074 case Builtin::BI__builtin_huge_valf:
4075 case Builtin::BI__builtin_huge_vall:
4076 case Builtin::BI__builtin_huge_valf16:
4077 case Builtin::BI__builtin_huge_valf128:
4078 case Builtin::BI__builtin_inf:
4079 case Builtin::BI__builtin_inff:
4080 case Builtin::BI__builtin_infl:
4081 case Builtin::BI__builtin_inff16:
4082 case Builtin::BI__builtin_inff128:
4085 case Builtin::BI__builtin_copysign:
4086 case Builtin::BI__builtin_copysignf:
4087 case Builtin::BI__builtin_copysignl:
4088 case Builtin::BI__builtin_copysignf128:
4091 case Builtin::BI__builtin_fmin:
4092 case Builtin::BI__builtin_fminf:
4093 case Builtin::BI__builtin_fminl:
4094 case Builtin::BI__builtin_fminf16:
4095 case Builtin::BI__builtin_fminf128:
4098 case Builtin::BI__builtin_fminimum_num:
4099 case Builtin::BI__builtin_fminimum_numf:
4100 case Builtin::BI__builtin_fminimum_numl:
4101 case Builtin::BI__builtin_fminimum_numf16:
4102 case Builtin::BI__builtin_fminimum_numf128:
4105 case Builtin::BI__builtin_fmax:
4106 case Builtin::BI__builtin_fmaxf:
4107 case Builtin::BI__builtin_fmaxl:
4108 case Builtin::BI__builtin_fmaxf16:
4109 case Builtin::BI__builtin_fmaxf128:
4112 case Builtin::BI__builtin_fmaximum_num:
4113 case Builtin::BI__builtin_fmaximum_numf:
4114 case Builtin::BI__builtin_fmaximum_numl:
4115 case Builtin::BI__builtin_fmaximum_numf16:
4116 case Builtin::BI__builtin_fmaximum_numf128:
4119 case Builtin::BI__builtin_isnan:
4122 case Builtin::BI__builtin_issignaling:
4125 case Builtin::BI__builtin_isinf:
4128 case Builtin::BI__builtin_isinf_sign:
4131 case Builtin::BI__builtin_isfinite:
4134 case Builtin::BI__builtin_isnormal:
4137 case Builtin::BI__builtin_issubnormal:
4140 case Builtin::BI__builtin_iszero:
4143 case Builtin::BI__builtin_signbit:
4144 case Builtin::BI__builtin_signbitf:
4145 case Builtin::BI__builtin_signbitl:
4148 case Builtin::BI__builtin_isgreater:
4149 case Builtin::BI__builtin_isgreaterequal:
4150 case Builtin::BI__builtin_isless:
4151 case Builtin::BI__builtin_islessequal:
4152 case Builtin::BI__builtin_islessgreater:
4153 case Builtin::BI__builtin_isunordered:
4156 case Builtin::BI__builtin_isfpclass:
4159 case Builtin::BI__builtin_fpclassify:
4162 case Builtin::BI__builtin_fabs:
4163 case Builtin::BI__builtin_fabsf:
4164 case Builtin::BI__builtin_fabsl:
4165 case Builtin::BI__builtin_fabsf128:
4168 case Builtin::BI__builtin_abs:
4169 case Builtin::BI__builtin_labs:
4170 case Builtin::BI__builtin_llabs:
4173 case Builtin::BI__builtin_popcount:
4174 case Builtin::BI__builtin_popcountl:
4175 case Builtin::BI__builtin_popcountll:
4176 case Builtin::BI__builtin_popcountg:
4177 case Builtin::BI__popcnt16:
4178 case Builtin::BI__popcnt:
4179 case Builtin::BI__popcnt64:
4182 case Builtin::BI__builtin_parity:
4183 case Builtin::BI__builtin_parityl:
4184 case Builtin::BI__builtin_parityll:
4187 return APInt(Val.getBitWidth(), Val.popcount() % 2);
4189 case Builtin::BI__builtin_clrsb:
4190 case Builtin::BI__builtin_clrsbl:
4191 case Builtin::BI__builtin_clrsbll:
4194 return APInt(Val.getBitWidth(),
4195 Val.getBitWidth() - Val.getSignificantBits());
4197 case Builtin::BI__builtin_bitreverse8:
4198 case Builtin::BI__builtin_bitreverse16:
4199 case Builtin::BI__builtin_bitreverse32:
4200 case Builtin::BI__builtin_bitreverse64:
4202 S, OpPC,
Call, [](
const APSInt &Val) {
return Val.reverseBits(); });
4204 case Builtin::BI__builtin_classify_type:
4207 case Builtin::BI__builtin_expect:
4208 case Builtin::BI__builtin_expect_with_probability:
4211 case Builtin::BI__builtin_rotateleft8:
4212 case Builtin::BI__builtin_rotateleft16:
4213 case Builtin::BI__builtin_rotateleft32:
4214 case Builtin::BI__builtin_rotateleft64:
4215 case Builtin::BI_rotl8:
4216 case Builtin::BI_rotl16:
4217 case Builtin::BI_rotl:
4218 case Builtin::BI_lrotl:
4219 case Builtin::BI_rotl64:
4222 return Value.rotl(Amount);
4225 case Builtin::BI__builtin_rotateright8:
4226 case Builtin::BI__builtin_rotateright16:
4227 case Builtin::BI__builtin_rotateright32:
4228 case Builtin::BI__builtin_rotateright64:
4229 case Builtin::BI_rotr8:
4230 case Builtin::BI_rotr16:
4231 case Builtin::BI_rotr:
4232 case Builtin::BI_lrotr:
4233 case Builtin::BI_rotr64:
4236 return Value.rotr(Amount);
4239 case Builtin::BI__builtin_ffs:
4240 case Builtin::BI__builtin_ffsl:
4241 case Builtin::BI__builtin_ffsll:
4244 return APInt(Val.getBitWidth(),
4245 Val.isZero() ? 0u : Val.countTrailingZeros() + 1u);
4248 case Builtin::BIaddressof:
4249 case Builtin::BI__addressof:
4250 case Builtin::BI__builtin_addressof:
4254 case Builtin::BIas_const:
4255 case Builtin::BIforward:
4256 case Builtin::BIforward_like:
4257 case Builtin::BImove:
4258 case Builtin::BImove_if_noexcept:
4262 case Builtin::BI__builtin_eh_return_data_regno:
4265 case Builtin::BI__builtin_launder:
4269 case Builtin::BI__builtin_add_overflow:
4270 case Builtin::BI__builtin_sub_overflow:
4271 case Builtin::BI__builtin_mul_overflow:
4272 case Builtin::BI__builtin_sadd_overflow:
4273 case Builtin::BI__builtin_uadd_overflow:
4274 case Builtin::BI__builtin_uaddl_overflow:
4275 case Builtin::BI__builtin_uaddll_overflow:
4276 case Builtin::BI__builtin_usub_overflow:
4277 case Builtin::BI__builtin_usubl_overflow:
4278 case Builtin::BI__builtin_usubll_overflow:
4279 case Builtin::BI__builtin_umul_overflow:
4280 case Builtin::BI__builtin_umull_overflow:
4281 case Builtin::BI__builtin_umulll_overflow:
4282 case Builtin::BI__builtin_saddl_overflow:
4283 case Builtin::BI__builtin_saddll_overflow:
4284 case Builtin::BI__builtin_ssub_overflow:
4285 case Builtin::BI__builtin_ssubl_overflow:
4286 case Builtin::BI__builtin_ssubll_overflow:
4287 case Builtin::BI__builtin_smul_overflow:
4288 case Builtin::BI__builtin_smull_overflow:
4289 case Builtin::BI__builtin_smulll_overflow:
4292 case Builtin::BI__builtin_addcb:
4293 case Builtin::BI__builtin_addcs:
4294 case Builtin::BI__builtin_addc:
4295 case Builtin::BI__builtin_addcl:
4296 case Builtin::BI__builtin_addcll:
4297 case Builtin::BI__builtin_subcb:
4298 case Builtin::BI__builtin_subcs:
4299 case Builtin::BI__builtin_subc:
4300 case Builtin::BI__builtin_subcl:
4301 case Builtin::BI__builtin_subcll:
4304 case Builtin::BI__builtin_clz:
4305 case Builtin::BI__builtin_clzl:
4306 case Builtin::BI__builtin_clzll:
4307 case Builtin::BI__builtin_clzs:
4308 case Builtin::BI__builtin_clzg:
4309 case Builtin::BI__lzcnt16:
4310 case Builtin::BI__lzcnt:
4311 case Builtin::BI__lzcnt64:
4314 case Builtin::BI__builtin_ctz:
4315 case Builtin::BI__builtin_ctzl:
4316 case Builtin::BI__builtin_ctzll:
4317 case Builtin::BI__builtin_ctzs:
4318 case Builtin::BI__builtin_ctzg:
4321 case Builtin::BI__builtin_elementwise_clzg:
4322 case Builtin::BI__builtin_elementwise_ctzg:
4325 case Builtin::BI__builtin_bswapg:
4326 case Builtin::BI__builtin_bswap16:
4327 case Builtin::BI__builtin_bswap32:
4328 case Builtin::BI__builtin_bswap64:
4331 case Builtin::BI__atomic_always_lock_free:
4332 case Builtin::BI__atomic_is_lock_free:
4335 case Builtin::BI__c11_atomic_is_lock_free:
4338 case Builtin::BI__builtin_complex:
4341 case Builtin::BI__builtin_is_aligned:
4342 case Builtin::BI__builtin_align_up:
4343 case Builtin::BI__builtin_align_down:
4346 case Builtin::BI__builtin_assume_aligned:
4349 case clang::X86::BI__builtin_ia32_bextr_u32:
4350 case clang::X86::BI__builtin_ia32_bextr_u64:
4351 case clang::X86::BI__builtin_ia32_bextri_u32:
4352 case clang::X86::BI__builtin_ia32_bextri_u64:
4355 unsigned BitWidth = Val.getBitWidth();
4356 uint64_t Shift = Idx.extractBitsAsZExtValue(8, 0);
4357 uint64_t Length = Idx.extractBitsAsZExtValue(8, 8);
4358 if (Length > BitWidth) {
4363 if (Length == 0 || Shift >= BitWidth)
4364 return APInt(BitWidth, 0);
4366 uint64_t
Result = Val.getZExtValue() >> Shift;
4367 Result &= llvm::maskTrailingOnes<uint64_t>(Length);
4371 case clang::X86::BI__builtin_ia32_bzhi_si:
4372 case clang::X86::BI__builtin_ia32_bzhi_di:
4375 unsigned BitWidth = Val.getBitWidth();
4376 uint64_t Index = Idx.extractBitsAsZExtValue(8, 0);
4379 if (Index < BitWidth)
4380 Result.clearHighBits(BitWidth - Index);
4385 case clang::X86::BI__builtin_ia32_ktestcqi:
4386 case clang::X86::BI__builtin_ia32_ktestchi:
4387 case clang::X86::BI__builtin_ia32_ktestcsi:
4388 case clang::X86::BI__builtin_ia32_ktestcdi:
4391 return APInt(
sizeof(
unsigned char) * 8, (~A & B) == 0);
4394 case clang::X86::BI__builtin_ia32_ktestzqi:
4395 case clang::X86::BI__builtin_ia32_ktestzhi:
4396 case clang::X86::BI__builtin_ia32_ktestzsi:
4397 case clang::X86::BI__builtin_ia32_ktestzdi:
4400 return APInt(
sizeof(
unsigned char) * 8, (A & B) == 0);
4403 case clang::X86::BI__builtin_ia32_kortestcqi:
4404 case clang::X86::BI__builtin_ia32_kortestchi:
4405 case clang::X86::BI__builtin_ia32_kortestcsi:
4406 case clang::X86::BI__builtin_ia32_kortestcdi:
4409 return APInt(
sizeof(
unsigned char) * 8, ~(A | B) == 0);
4412 case clang::X86::BI__builtin_ia32_kortestzqi:
4413 case clang::X86::BI__builtin_ia32_kortestzhi:
4414 case clang::X86::BI__builtin_ia32_kortestzsi:
4415 case clang::X86::BI__builtin_ia32_kortestzdi:
4418 return APInt(
sizeof(
unsigned char) * 8, (A | B) == 0);
4421 case clang::X86::BI__builtin_ia32_kshiftliqi:
4422 case clang::X86::BI__builtin_ia32_kshiftlihi:
4423 case clang::X86::BI__builtin_ia32_kshiftlisi:
4424 case clang::X86::BI__builtin_ia32_kshiftlidi:
4427 unsigned Amt = RHS.getZExtValue() & 0xFF;
4428 if (Amt >= LHS.getBitWidth())
4429 return APInt::getZero(LHS.getBitWidth());
4430 return LHS.shl(Amt);
4433 case clang::X86::BI__builtin_ia32_kshiftriqi:
4434 case clang::X86::BI__builtin_ia32_kshiftrihi:
4435 case clang::X86::BI__builtin_ia32_kshiftrisi:
4436 case clang::X86::BI__builtin_ia32_kshiftridi:
4439 unsigned Amt = RHS.getZExtValue() & 0xFF;
4440 if (Amt >= LHS.getBitWidth())
4441 return APInt::getZero(LHS.getBitWidth());
4442 return LHS.lshr(Amt);
4445 case clang::X86::BI__builtin_ia32_lzcnt_u16:
4446 case clang::X86::BI__builtin_ia32_lzcnt_u32:
4447 case clang::X86::BI__builtin_ia32_lzcnt_u64:
4450 return APInt(Src.getBitWidth(), Src.countLeadingZeros());
4453 case clang::X86::BI__builtin_ia32_tzcnt_u16:
4454 case clang::X86::BI__builtin_ia32_tzcnt_u32:
4455 case clang::X86::BI__builtin_ia32_tzcnt_u64:
4458 return APInt(Src.getBitWidth(), Src.countTrailingZeros());
4461 case clang::X86::BI__builtin_ia32_pdep_si:
4462 case clang::X86::BI__builtin_ia32_pdep_di:
4465 unsigned BitWidth = Val.getBitWidth();
4468 for (
unsigned I = 0, P = 0; I != BitWidth; ++I) {
4470 Result.setBitVal(I, Val[P++]);
4476 case clang::X86::BI__builtin_ia32_pext_si:
4477 case clang::X86::BI__builtin_ia32_pext_di:
4480 unsigned BitWidth = Val.getBitWidth();
4483 for (
unsigned I = 0, P = 0; I != BitWidth; ++I) {
4485 Result.setBitVal(P++, Val[I]);
4491 case clang::X86::BI__builtin_ia32_addcarryx_u32:
4492 case clang::X86::BI__builtin_ia32_addcarryx_u64:
4493 case clang::X86::BI__builtin_ia32_subborrow_u32:
4494 case clang::X86::BI__builtin_ia32_subborrow_u64:
4498 case Builtin::BI__builtin_os_log_format_buffer_size:
4501 case Builtin::BI__builtin_ptrauth_string_discriminator:
4504 case Builtin::BI__builtin_infer_alloc_token:
4507 case Builtin::BI__noop:
4511 case Builtin::BI__builtin_operator_new:
4514 case Builtin::BI__builtin_operator_delete:
4517 case Builtin::BI__arithmetic_fence:
4520 case Builtin::BI__builtin_reduce_add:
4521 case Builtin::BI__builtin_reduce_mul:
4522 case Builtin::BI__builtin_reduce_and:
4523 case Builtin::BI__builtin_reduce_or:
4524 case Builtin::BI__builtin_reduce_xor:
4525 case Builtin::BI__builtin_reduce_min:
4526 case Builtin::BI__builtin_reduce_max:
4529 case Builtin::BI__builtin_elementwise_popcount:
4532 return APInt(Src.getBitWidth(), Src.popcount());
4534 case Builtin::BI__builtin_elementwise_bitreverse:
4536 S, OpPC,
Call, [](
const APSInt &Src) {
return Src.reverseBits(); });
4538 case Builtin::BI__builtin_elementwise_abs:
4541 case Builtin::BI__builtin_memcpy:
4542 case Builtin::BImemcpy:
4543 case Builtin::BI__builtin_wmemcpy:
4544 case Builtin::BIwmemcpy:
4545 case Builtin::BI__builtin_memmove:
4546 case Builtin::BImemmove:
4547 case Builtin::BI__builtin_wmemmove:
4548 case Builtin::BIwmemmove:
4551 case Builtin::BI__builtin_memcmp:
4552 case Builtin::BImemcmp:
4553 case Builtin::BI__builtin_bcmp:
4554 case Builtin::BIbcmp:
4555 case Builtin::BI__builtin_wmemcmp:
4556 case Builtin::BIwmemcmp:
4559 case Builtin::BImemchr:
4560 case Builtin::BI__builtin_memchr:
4561 case Builtin::BIstrchr:
4562 case Builtin::BI__builtin_strchr:
4563 case Builtin::BIwmemchr:
4564 case Builtin::BI__builtin_wmemchr:
4565 case Builtin::BIwcschr:
4566 case Builtin::BI__builtin_wcschr:
4567 case Builtin::BI__builtin_char_memchr:
4570 case Builtin::BI__builtin_object_size:
4571 case Builtin::BI__builtin_dynamic_object_size:
4574 case Builtin::BI__builtin_is_within_lifetime:
4577 case Builtin::BI__builtin_elementwise_add_sat:
4580 return LHS.isSigned() ? LHS.sadd_sat(RHS) : LHS.uadd_sat(RHS);
4583 case Builtin::BI__builtin_elementwise_sub_sat:
4586 return LHS.isSigned() ? LHS.ssub_sat(RHS) : LHS.usub_sat(RHS);
4588 case X86::BI__builtin_ia32_extract128i256:
4589 case X86::BI__builtin_ia32_vextractf128_pd256:
4590 case X86::BI__builtin_ia32_vextractf128_ps256:
4591 case X86::BI__builtin_ia32_vextractf128_si256:
4594 case X86::BI__builtin_ia32_extractf32x4_256_mask:
4595 case X86::BI__builtin_ia32_extractf32x4_mask:
4596 case X86::BI__builtin_ia32_extractf32x8_mask:
4597 case X86::BI__builtin_ia32_extractf64x2_256_mask:
4598 case X86::BI__builtin_ia32_extractf64x2_512_mask:
4599 case X86::BI__builtin_ia32_extractf64x4_mask:
4600 case X86::BI__builtin_ia32_extracti32x4_256_mask:
4601 case X86::BI__builtin_ia32_extracti32x4_mask:
4602 case X86::BI__builtin_ia32_extracti32x8_mask:
4603 case X86::BI__builtin_ia32_extracti64x2_256_mask:
4604 case X86::BI__builtin_ia32_extracti64x2_512_mask:
4605 case X86::BI__builtin_ia32_extracti64x4_mask:
4608 case clang::X86::BI__builtin_ia32_pmulhrsw128:
4609 case clang::X86::BI__builtin_ia32_pmulhrsw256:
4610 case clang::X86::BI__builtin_ia32_pmulhrsw512:
4613 return (llvm::APIntOps::mulsExtended(LHS, RHS).ashr(14) + 1)
4614 .extractBits(16, 1);
4617 case clang::X86::BI__builtin_ia32_movmskps:
4618 case clang::X86::BI__builtin_ia32_movmskpd:
4619 case clang::X86::BI__builtin_ia32_pmovmskb128:
4620 case clang::X86::BI__builtin_ia32_pmovmskb256:
4621 case clang::X86::BI__builtin_ia32_movmskps256:
4622 case clang::X86::BI__builtin_ia32_movmskpd256: {
4626 case X86::BI__builtin_ia32_psignb128:
4627 case X86::BI__builtin_ia32_psignb256:
4628 case X86::BI__builtin_ia32_psignw128:
4629 case X86::BI__builtin_ia32_psignw256:
4630 case X86::BI__builtin_ia32_psignd128:
4631 case X86::BI__builtin_ia32_psignd256:
4635 return APInt::getZero(AElem.getBitWidth());
4636 if (BElem.isNegative())
4641 case clang::X86::BI__builtin_ia32_pavgb128:
4642 case clang::X86::BI__builtin_ia32_pavgw128:
4643 case clang::X86::BI__builtin_ia32_pavgb256:
4644 case clang::X86::BI__builtin_ia32_pavgw256:
4645 case clang::X86::BI__builtin_ia32_pavgb512:
4646 case clang::X86::BI__builtin_ia32_pavgw512:
4648 llvm::APIntOps::avgCeilU);
4650 case clang::X86::BI__builtin_ia32_pmaddubsw128:
4651 case clang::X86::BI__builtin_ia32_pmaddubsw256:
4652 case clang::X86::BI__builtin_ia32_pmaddubsw512:
4657 unsigned BitWidth = 2 * LoLHS.getBitWidth();
4658 return (LoLHS.zext(BitWidth) * LoRHS.sext(BitWidth))
4659 .sadd_sat((HiLHS.zext(BitWidth) * HiRHS.sext(BitWidth)));
4662 case clang::X86::BI__builtin_ia32_pmaddwd128:
4663 case clang::X86::BI__builtin_ia32_pmaddwd256:
4664 case clang::X86::BI__builtin_ia32_pmaddwd512:
4669 unsigned BitWidth = 2 * LoLHS.getBitWidth();
4670 return (LoLHS.sext(BitWidth) * LoRHS.sext(BitWidth)) +
4671 (HiLHS.sext(BitWidth) * HiRHS.sext(BitWidth));
4674 case clang::X86::BI__builtin_ia32_pmulhuw128:
4675 case clang::X86::BI__builtin_ia32_pmulhuw256:
4676 case clang::X86::BI__builtin_ia32_pmulhuw512:
4678 llvm::APIntOps::mulhu);
4680 case clang::X86::BI__builtin_ia32_pmulhw128:
4681 case clang::X86::BI__builtin_ia32_pmulhw256:
4682 case clang::X86::BI__builtin_ia32_pmulhw512:
4684 llvm::APIntOps::mulhs);
4686 case clang::X86::BI__builtin_ia32_psllv2di:
4687 case clang::X86::BI__builtin_ia32_psllv4di:
4688 case clang::X86::BI__builtin_ia32_psllv4si:
4689 case clang::X86::BI__builtin_ia32_psllv8di:
4690 case clang::X86::BI__builtin_ia32_psllv8hi:
4691 case clang::X86::BI__builtin_ia32_psllv8si:
4692 case clang::X86::BI__builtin_ia32_psllv16hi:
4693 case clang::X86::BI__builtin_ia32_psllv16si:
4694 case clang::X86::BI__builtin_ia32_psllv32hi:
4695 case clang::X86::BI__builtin_ia32_psllwi128:
4696 case clang::X86::BI__builtin_ia32_psllwi256:
4697 case clang::X86::BI__builtin_ia32_psllwi512:
4698 case clang::X86::BI__builtin_ia32_pslldi128:
4699 case clang::X86::BI__builtin_ia32_pslldi256:
4700 case clang::X86::BI__builtin_ia32_pslldi512:
4701 case clang::X86::BI__builtin_ia32_psllqi128:
4702 case clang::X86::BI__builtin_ia32_psllqi256:
4703 case clang::X86::BI__builtin_ia32_psllqi512:
4706 if (RHS.uge(LHS.getBitWidth())) {
4707 return APInt::getZero(LHS.getBitWidth());
4709 return LHS.shl(RHS.getZExtValue());
4712 case clang::X86::BI__builtin_ia32_psrav4si:
4713 case clang::X86::BI__builtin_ia32_psrav8di:
4714 case clang::X86::BI__builtin_ia32_psrav8hi:
4715 case clang::X86::BI__builtin_ia32_psrav8si:
4716 case clang::X86::BI__builtin_ia32_psrav16hi:
4717 case clang::X86::BI__builtin_ia32_psrav16si:
4718 case clang::X86::BI__builtin_ia32_psrav32hi:
4719 case clang::X86::BI__builtin_ia32_psravq128:
4720 case clang::X86::BI__builtin_ia32_psravq256:
4721 case clang::X86::BI__builtin_ia32_psrawi128:
4722 case clang::X86::BI__builtin_ia32_psrawi256:
4723 case clang::X86::BI__builtin_ia32_psrawi512:
4724 case clang::X86::BI__builtin_ia32_psradi128:
4725 case clang::X86::BI__builtin_ia32_psradi256:
4726 case clang::X86::BI__builtin_ia32_psradi512:
4727 case clang::X86::BI__builtin_ia32_psraqi128:
4728 case clang::X86::BI__builtin_ia32_psraqi256:
4729 case clang::X86::BI__builtin_ia32_psraqi512:
4732 if (RHS.uge(LHS.getBitWidth())) {
4733 return LHS.ashr(LHS.getBitWidth() - 1);
4735 return LHS.ashr(RHS.getZExtValue());
4738 case clang::X86::BI__builtin_ia32_psrlv2di:
4739 case clang::X86::BI__builtin_ia32_psrlv4di:
4740 case clang::X86::BI__builtin_ia32_psrlv4si:
4741 case clang::X86::BI__builtin_ia32_psrlv8di:
4742 case clang::X86::BI__builtin_ia32_psrlv8hi:
4743 case clang::X86::BI__builtin_ia32_psrlv8si:
4744 case clang::X86::BI__builtin_ia32_psrlv16hi:
4745 case clang::X86::BI__builtin_ia32_psrlv16si:
4746 case clang::X86::BI__builtin_ia32_psrlv32hi:
4747 case clang::X86::BI__builtin_ia32_psrlwi128:
4748 case clang::X86::BI__builtin_ia32_psrlwi256:
4749 case clang::X86::BI__builtin_ia32_psrlwi512:
4750 case clang::X86::BI__builtin_ia32_psrldi128:
4751 case clang::X86::BI__builtin_ia32_psrldi256:
4752 case clang::X86::BI__builtin_ia32_psrldi512:
4753 case clang::X86::BI__builtin_ia32_psrlqi128:
4754 case clang::X86::BI__builtin_ia32_psrlqi256:
4755 case clang::X86::BI__builtin_ia32_psrlqi512:
4758 if (RHS.uge(LHS.getBitWidth())) {
4759 return APInt::getZero(LHS.getBitWidth());
4761 return LHS.lshr(RHS.getZExtValue());
4763 case clang::X86::BI__builtin_ia32_packsswb128:
4764 case clang::X86::BI__builtin_ia32_packsswb256:
4765 case clang::X86::BI__builtin_ia32_packsswb512:
4766 case clang::X86::BI__builtin_ia32_packssdw128:
4767 case clang::X86::BI__builtin_ia32_packssdw256:
4768 case clang::X86::BI__builtin_ia32_packssdw512:
4770 return APInt(Src).truncSSat(Src.getBitWidth() / 2);
4772 case clang::X86::BI__builtin_ia32_packusdw128:
4773 case clang::X86::BI__builtin_ia32_packusdw256:
4774 case clang::X86::BI__builtin_ia32_packusdw512:
4775 case clang::X86::BI__builtin_ia32_packuswb128:
4776 case clang::X86::BI__builtin_ia32_packuswb256:
4777 case clang::X86::BI__builtin_ia32_packuswb512:
4779 unsigned DstBits = Src.getBitWidth() / 2;
4780 if (Src.isNegative())
4781 return APInt::getZero(DstBits);
4782 if (Src.isIntN(DstBits))
4783 return APInt(Src).trunc(DstBits);
4784 return APInt::getAllOnes(DstBits);
4787 case clang::X86::BI__builtin_ia32_selectss_128:
4788 case clang::X86::BI__builtin_ia32_selectsd_128:
4789 case clang::X86::BI__builtin_ia32_selectsh_128:
4790 case clang::X86::BI__builtin_ia32_selectsbf_128:
4792 case clang::X86::BI__builtin_ia32_vprotbi:
4793 case clang::X86::BI__builtin_ia32_vprotdi:
4794 case clang::X86::BI__builtin_ia32_vprotqi:
4795 case clang::X86::BI__builtin_ia32_vprotwi:
4796 case clang::X86::BI__builtin_ia32_prold128:
4797 case clang::X86::BI__builtin_ia32_prold256:
4798 case clang::X86::BI__builtin_ia32_prold512:
4799 case clang::X86::BI__builtin_ia32_prolq128:
4800 case clang::X86::BI__builtin_ia32_prolq256:
4801 case clang::X86::BI__builtin_ia32_prolq512:
4804 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotl(RHS); });
4806 case clang::X86::BI__builtin_ia32_prord128:
4807 case clang::X86::BI__builtin_ia32_prord256:
4808 case clang::X86::BI__builtin_ia32_prord512:
4809 case clang::X86::BI__builtin_ia32_prorq128:
4810 case clang::X86::BI__builtin_ia32_prorq256:
4811 case clang::X86::BI__builtin_ia32_prorq512:
4814 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotr(RHS); });
4816 case Builtin::BI__builtin_elementwise_max:
4817 case Builtin::BI__builtin_elementwise_min:
4820 case clang::X86::BI__builtin_ia32_phaddw128:
4821 case clang::X86::BI__builtin_ia32_phaddw256:
4822 case clang::X86::BI__builtin_ia32_phaddd128:
4823 case clang::X86::BI__builtin_ia32_phaddd256:
4826 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
4827 case clang::X86::BI__builtin_ia32_phaddsw128:
4828 case clang::X86::BI__builtin_ia32_phaddsw256:
4831 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.sadd_sat(RHS); });
4832 case clang::X86::BI__builtin_ia32_phsubw128:
4833 case clang::X86::BI__builtin_ia32_phsubw256:
4834 case clang::X86::BI__builtin_ia32_phsubd128:
4835 case clang::X86::BI__builtin_ia32_phsubd256:
4838 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS - RHS; });
4839 case clang::X86::BI__builtin_ia32_phsubsw128:
4840 case clang::X86::BI__builtin_ia32_phsubsw256:
4843 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.ssub_sat(RHS); });
4844 case clang::X86::BI__builtin_ia32_haddpd:
4845 case clang::X86::BI__builtin_ia32_haddps:
4846 case clang::X86::BI__builtin_ia32_haddpd256:
4847 case clang::X86::BI__builtin_ia32_haddps256:
4850 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
4855 case clang::X86::BI__builtin_ia32_hsubpd:
4856 case clang::X86::BI__builtin_ia32_hsubps:
4857 case clang::X86::BI__builtin_ia32_hsubpd256:
4858 case clang::X86::BI__builtin_ia32_hsubps256:
4861 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
4863 F.subtract(RHS, RM);
4866 case clang::X86::BI__builtin_ia32_addsubpd:
4867 case clang::X86::BI__builtin_ia32_addsubps:
4868 case clang::X86::BI__builtin_ia32_addsubpd256:
4869 case clang::X86::BI__builtin_ia32_addsubps256:
4872 case clang::X86::BI__builtin_ia32_pmuldq128:
4873 case clang::X86::BI__builtin_ia32_pmuldq256:
4874 case clang::X86::BI__builtin_ia32_pmuldq512:
4879 return llvm::APIntOps::mulsExtended(LoLHS, LoRHS);
4882 case clang::X86::BI__builtin_ia32_pmuludq128:
4883 case clang::X86::BI__builtin_ia32_pmuludq256:
4884 case clang::X86::BI__builtin_ia32_pmuludq512:
4889 return llvm::APIntOps::muluExtended(LoLHS, LoRHS);
4892 case clang::X86::BI__builtin_ia32_pclmulqdq128:
4893 case clang::X86::BI__builtin_ia32_pclmulqdq256:
4894 case clang::X86::BI__builtin_ia32_pclmulqdq512:
4897 case Builtin::BI__builtin_elementwise_fma:
4901 llvm::RoundingMode RM) {
4903 F.fusedMultiplyAdd(Y, Z, RM);
4907 case X86::BI__builtin_ia32_vpmadd52luq128:
4908 case X86::BI__builtin_ia32_vpmadd52luq256:
4909 case X86::BI__builtin_ia32_vpmadd52luq512:
4912 return A + (B.trunc(52) *
C.trunc(52)).zext(64);
4914 case X86::BI__builtin_ia32_vpmadd52huq128:
4915 case X86::BI__builtin_ia32_vpmadd52huq256:
4916 case X86::BI__builtin_ia32_vpmadd52huq512:
4919 return A + llvm::APIntOps::mulhu(B.trunc(52),
C.trunc(52)).zext(64);
4922 case X86::BI__builtin_ia32_vpshldd128:
4923 case X86::BI__builtin_ia32_vpshldd256:
4924 case X86::BI__builtin_ia32_vpshldd512:
4925 case X86::BI__builtin_ia32_vpshldq128:
4926 case X86::BI__builtin_ia32_vpshldq256:
4927 case X86::BI__builtin_ia32_vpshldq512:
4928 case X86::BI__builtin_ia32_vpshldw128:
4929 case X86::BI__builtin_ia32_vpshldw256:
4930 case X86::BI__builtin_ia32_vpshldw512:
4934 return llvm::APIntOps::fshl(Hi, Lo, Amt);
4937 case X86::BI__builtin_ia32_vpshrdd128:
4938 case X86::BI__builtin_ia32_vpshrdd256:
4939 case X86::BI__builtin_ia32_vpshrdd512:
4940 case X86::BI__builtin_ia32_vpshrdq128:
4941 case X86::BI__builtin_ia32_vpshrdq256:
4942 case X86::BI__builtin_ia32_vpshrdq512:
4943 case X86::BI__builtin_ia32_vpshrdw128:
4944 case X86::BI__builtin_ia32_vpshrdw256:
4945 case X86::BI__builtin_ia32_vpshrdw512:
4950 return llvm::APIntOps::fshr(Hi, Lo, Amt);
4952 case X86::BI__builtin_ia32_vpconflictsi_128:
4953 case X86::BI__builtin_ia32_vpconflictsi_256:
4954 case X86::BI__builtin_ia32_vpconflictsi_512:
4955 case X86::BI__builtin_ia32_vpconflictdi_128:
4956 case X86::BI__builtin_ia32_vpconflictdi_256:
4957 case X86::BI__builtin_ia32_vpconflictdi_512:
4959 case clang::X86::BI__builtin_ia32_blendpd:
4960 case clang::X86::BI__builtin_ia32_blendpd256:
4961 case clang::X86::BI__builtin_ia32_blendps:
4962 case clang::X86::BI__builtin_ia32_blendps256:
4963 case clang::X86::BI__builtin_ia32_pblendw128:
4964 case clang::X86::BI__builtin_ia32_pblendw256:
4965 case clang::X86::BI__builtin_ia32_pblendd128:
4966 case clang::X86::BI__builtin_ia32_pblendd256:
4968 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
4970 unsigned MaskBit = (ShuffleMask >> (DstIdx % 8)) & 0x1;
4971 unsigned SrcVecIdx = MaskBit ? 1 : 0;
4972 return std::pair<unsigned, int>{SrcVecIdx,
static_cast<int>(DstIdx)};
4977 case clang::X86::BI__builtin_ia32_blendvpd:
4978 case clang::X86::BI__builtin_ia32_blendvpd256:
4979 case clang::X86::BI__builtin_ia32_blendvps:
4980 case clang::X86::BI__builtin_ia32_blendvps256:
4984 llvm::RoundingMode) {
return C.isNegative() ?
T : F; });
4986 case clang::X86::BI__builtin_ia32_pblendvb128:
4987 case clang::X86::BI__builtin_ia32_pblendvb256:
4990 return ((
APInt)
C).isNegative() ?
T : F;
4992 case X86::BI__builtin_ia32_ptestz128:
4993 case X86::BI__builtin_ia32_ptestz256:
4994 case X86::BI__builtin_ia32_vtestzps:
4995 case X86::BI__builtin_ia32_vtestzps256:
4996 case X86::BI__builtin_ia32_vtestzpd:
4997 case X86::BI__builtin_ia32_vtestzpd256:
5000 [](
const APInt &A,
const APInt &B) {
return (A & B) == 0; });
5001 case X86::BI__builtin_ia32_ptestc128:
5002 case X86::BI__builtin_ia32_ptestc256:
5003 case X86::BI__builtin_ia32_vtestcps:
5004 case X86::BI__builtin_ia32_vtestcps256:
5005 case X86::BI__builtin_ia32_vtestcpd:
5006 case X86::BI__builtin_ia32_vtestcpd256:
5009 [](
const APInt &A,
const APInt &B) {
return (~A & B) == 0; });
5010 case X86::BI__builtin_ia32_ptestnzc128:
5011 case X86::BI__builtin_ia32_ptestnzc256:
5012 case X86::BI__builtin_ia32_vtestnzcps:
5013 case X86::BI__builtin_ia32_vtestnzcps256:
5014 case X86::BI__builtin_ia32_vtestnzcpd:
5015 case X86::BI__builtin_ia32_vtestnzcpd256:
5018 return ((A & B) != 0) && ((~A & B) != 0);
5020 case X86::BI__builtin_ia32_selectb_128:
5021 case X86::BI__builtin_ia32_selectb_256:
5022 case X86::BI__builtin_ia32_selectb_512:
5023 case X86::BI__builtin_ia32_selectw_128:
5024 case X86::BI__builtin_ia32_selectw_256:
5025 case X86::BI__builtin_ia32_selectw_512:
5026 case X86::BI__builtin_ia32_selectd_128:
5027 case X86::BI__builtin_ia32_selectd_256:
5028 case X86::BI__builtin_ia32_selectd_512:
5029 case X86::BI__builtin_ia32_selectq_128:
5030 case X86::BI__builtin_ia32_selectq_256:
5031 case X86::BI__builtin_ia32_selectq_512:
5032 case X86::BI__builtin_ia32_selectph_128:
5033 case X86::BI__builtin_ia32_selectph_256:
5034 case X86::BI__builtin_ia32_selectph_512:
5035 case X86::BI__builtin_ia32_selectpbf_128:
5036 case X86::BI__builtin_ia32_selectpbf_256:
5037 case X86::BI__builtin_ia32_selectpbf_512:
5038 case X86::BI__builtin_ia32_selectps_128:
5039 case X86::BI__builtin_ia32_selectps_256:
5040 case X86::BI__builtin_ia32_selectps_512:
5041 case X86::BI__builtin_ia32_selectpd_128:
5042 case X86::BI__builtin_ia32_selectpd_256:
5043 case X86::BI__builtin_ia32_selectpd_512:
5046 case X86::BI__builtin_ia32_shufps:
5047 case X86::BI__builtin_ia32_shufps256:
5048 case X86::BI__builtin_ia32_shufps512:
5050 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5051 unsigned NumElemPerLane = 4;
5052 unsigned NumSelectableElems = NumElemPerLane / 2;
5053 unsigned BitsPerElem = 2;
5054 unsigned IndexMask = 0x3;
5055 unsigned MaskBits = 8;
5056 unsigned Lane = DstIdx / NumElemPerLane;
5057 unsigned ElemInLane = DstIdx % NumElemPerLane;
5058 unsigned LaneOffset = Lane * NumElemPerLane;
5059 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
5060 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5061 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
5062 return std::pair<unsigned, int>{SrcIdx,
5063 static_cast<int>(LaneOffset + Index)};
5065 case X86::BI__builtin_ia32_shufpd:
5066 case X86::BI__builtin_ia32_shufpd256:
5067 case X86::BI__builtin_ia32_shufpd512:
5069 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5070 unsigned NumElemPerLane = 2;
5071 unsigned NumSelectableElems = NumElemPerLane / 2;
5072 unsigned BitsPerElem = 1;
5073 unsigned IndexMask = 0x1;
5074 unsigned MaskBits = 8;
5075 unsigned Lane = DstIdx / NumElemPerLane;
5076 unsigned ElemInLane = DstIdx % NumElemPerLane;
5077 unsigned LaneOffset = Lane * NumElemPerLane;
5078 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
5079 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5080 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
5081 return std::pair<unsigned, int>{SrcIdx,
5082 static_cast<int>(LaneOffset + Index)};
5085 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v16qi:
5086 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v32qi:
5087 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v64qi:
5089 case X86::BI__builtin_ia32_vgf2p8affineqb_v16qi:
5090 case X86::BI__builtin_ia32_vgf2p8affineqb_v32qi:
5091 case X86::BI__builtin_ia32_vgf2p8affineqb_v64qi:
5094 case X86::BI__builtin_ia32_vgf2p8mulb_v16qi:
5095 case X86::BI__builtin_ia32_vgf2p8mulb_v32qi:
5096 case X86::BI__builtin_ia32_vgf2p8mulb_v64qi:
5099 case X86::BI__builtin_ia32_insertps128:
5101 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Mask) {
5103 if ((Mask & (1 << DstIdx)) != 0) {
5104 return std::pair<unsigned, int>{0, -1};
5108 unsigned SrcElem = (Mask >> 6) & 0x3;
5109 unsigned DstElem = (Mask >> 4) & 0x3;
5110 if (DstIdx == DstElem) {
5112 return std::pair<unsigned, int>{1,
static_cast<int>(SrcElem)};
5115 return std::pair<unsigned, int>{0,
static_cast<int>(DstIdx)};
5118 case X86::BI__builtin_ia32_permvarsi256:
5119 case X86::BI__builtin_ia32_permvarsf256:
5120 case X86::BI__builtin_ia32_permvardf512:
5121 case X86::BI__builtin_ia32_permvardi512:
5122 case X86::BI__builtin_ia32_permvarhi128:
5124 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5125 int Offset = ShuffleMask & 0x7;
5126 return std::pair<unsigned, int>{0, Offset};
5128 case X86::BI__builtin_ia32_permvarqi128:
5129 case X86::BI__builtin_ia32_permvarhi256:
5130 case X86::BI__builtin_ia32_permvarsi512:
5131 case X86::BI__builtin_ia32_permvarsf512:
5133 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5134 int Offset = ShuffleMask & 0xF;
5135 return std::pair<unsigned, int>{0, Offset};
5137 case X86::BI__builtin_ia32_permvardi256:
5138 case X86::BI__builtin_ia32_permvardf256:
5140 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5141 int Offset = ShuffleMask & 0x3;
5142 return std::pair<unsigned, int>{0, Offset};
5144 case X86::BI__builtin_ia32_permvarqi256:
5145 case X86::BI__builtin_ia32_permvarhi512:
5147 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5148 int Offset = ShuffleMask & 0x1F;
5149 return std::pair<unsigned, int>{0, Offset};
5151 case X86::BI__builtin_ia32_permvarqi512:
5153 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5154 int Offset = ShuffleMask & 0x3F;
5155 return std::pair<unsigned, int>{0, Offset};
5157 case X86::BI__builtin_ia32_vpermi2varq128:
5158 case X86::BI__builtin_ia32_vpermi2varpd128:
5160 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5161 int Offset = ShuffleMask & 0x1;
5162 unsigned SrcIdx = (ShuffleMask >> 1) & 0x1;
5163 return std::pair<unsigned, int>{SrcIdx, Offset};
5165 case X86::BI__builtin_ia32_vpermi2vard128:
5166 case X86::BI__builtin_ia32_vpermi2varps128:
5167 case X86::BI__builtin_ia32_vpermi2varq256:
5168 case X86::BI__builtin_ia32_vpermi2varpd256:
5170 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5171 int Offset = ShuffleMask & 0x3;
5172 unsigned SrcIdx = (ShuffleMask >> 2) & 0x1;
5173 return std::pair<unsigned, int>{SrcIdx, Offset};
5175 case X86::BI__builtin_ia32_vpermi2varhi128:
5176 case X86::BI__builtin_ia32_vpermi2vard256:
5177 case X86::BI__builtin_ia32_vpermi2varps256:
5178 case X86::BI__builtin_ia32_vpermi2varq512:
5179 case X86::BI__builtin_ia32_vpermi2varpd512:
5181 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5182 int Offset = ShuffleMask & 0x7;
5183 unsigned SrcIdx = (ShuffleMask >> 3) & 0x1;
5184 return std::pair<unsigned, int>{SrcIdx, Offset};
5186 case X86::BI__builtin_ia32_vpermi2varqi128:
5187 case X86::BI__builtin_ia32_vpermi2varhi256:
5188 case X86::BI__builtin_ia32_vpermi2vard512:
5189 case X86::BI__builtin_ia32_vpermi2varps512:
5191 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5192 int Offset = ShuffleMask & 0xF;
5193 unsigned SrcIdx = (ShuffleMask >> 4) & 0x1;
5194 return std::pair<unsigned, int>{SrcIdx, Offset};
5196 case X86::BI__builtin_ia32_vpermi2varqi256:
5197 case X86::BI__builtin_ia32_vpermi2varhi512:
5199 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5200 int Offset = ShuffleMask & 0x1F;
5201 unsigned SrcIdx = (ShuffleMask >> 5) & 0x1;
5202 return std::pair<unsigned, int>{SrcIdx, Offset};
5204 case X86::BI__builtin_ia32_vpermi2varqi512:
5206 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5207 int Offset = ShuffleMask & 0x3F;
5208 unsigned SrcIdx = (ShuffleMask >> 6) & 0x1;
5209 return std::pair<unsigned, int>{SrcIdx, Offset};
5211 case X86::BI__builtin_ia32_vperm2f128_pd256:
5212 case X86::BI__builtin_ia32_vperm2f128_ps256:
5213 case X86::BI__builtin_ia32_vperm2f128_si256:
5214 case X86::BI__builtin_ia32_permti256: {
5215 unsigned NumElements =
5216 Call->getArg(0)->getType()->castAs<
VectorType>()->getNumElements();
5217 unsigned PreservedBitsCnt = NumElements >> 2;
5220 [PreservedBitsCnt](
unsigned DstIdx,
unsigned ShuffleMask) {
5221 unsigned ControlBitsCnt = DstIdx >> PreservedBitsCnt << 2;
5222 unsigned ControlBits = ShuffleMask >> ControlBitsCnt;
5224 if (ControlBits & 0b1000)
5225 return std::make_pair(0u, -1);
5227 unsigned SrcVecIdx = (ControlBits & 0b10) >> 1;
5228 unsigned PreservedBitsMask = (1 << PreservedBitsCnt) - 1;
5229 int SrcIdx = ((ControlBits & 0b1) << PreservedBitsCnt) |
5230 (DstIdx & PreservedBitsMask);
5231 return std::make_pair(SrcVecIdx, SrcIdx);
5234 case X86::BI__builtin_ia32_pshufb128:
5235 case X86::BI__builtin_ia32_pshufb256:
5236 case X86::BI__builtin_ia32_pshufb512:
5238 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5239 uint8_t Ctlb =
static_cast<uint8_t
>(ShuffleMask);
5241 return std::make_pair(0, -1);
5243 unsigned LaneBase = (DstIdx / 16) * 16;
5244 unsigned SrcOffset = Ctlb & 0x0F;
5245 unsigned SrcIdx = LaneBase + SrcOffset;
5246 return std::make_pair(0,
static_cast<int>(SrcIdx));
5249 case X86::BI__builtin_ia32_pshuflw:
5250 case X86::BI__builtin_ia32_pshuflw256:
5251 case X86::BI__builtin_ia32_pshuflw512:
5253 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5254 unsigned LaneBase = (DstIdx / 8) * 8;
5255 unsigned LaneIdx = DstIdx % 8;
5257 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
5258 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
5261 return std::make_pair(0,
static_cast<int>(DstIdx));
5264 case X86::BI__builtin_ia32_pshufhw:
5265 case X86::BI__builtin_ia32_pshufhw256:
5266 case X86::BI__builtin_ia32_pshufhw512:
5268 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5269 unsigned LaneBase = (DstIdx / 8) * 8;
5270 unsigned LaneIdx = DstIdx % 8;
5272 unsigned Sel = (ShuffleMask >> (2 * (LaneIdx - 4))) & 0x3;
5273 return std::make_pair(0,
static_cast<int>(LaneBase + 4 + Sel));
5276 return std::make_pair(0,
static_cast<int>(DstIdx));
5279 case X86::BI__builtin_ia32_pshufd:
5280 case X86::BI__builtin_ia32_pshufd256:
5281 case X86::BI__builtin_ia32_pshufd512:
5282 case X86::BI__builtin_ia32_vpermilps:
5283 case X86::BI__builtin_ia32_vpermilps256:
5284 case X86::BI__builtin_ia32_vpermilps512:
5286 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5287 unsigned LaneBase = (DstIdx / 4) * 4;
5288 unsigned LaneIdx = DstIdx % 4;
5289 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
5290 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
5293 case X86::BI__builtin_ia32_vpermilvarpd:
5294 case X86::BI__builtin_ia32_vpermilvarpd256:
5295 case X86::BI__builtin_ia32_vpermilvarpd512:
5297 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5298 unsigned NumElemPerLane = 2;
5299 unsigned Lane = DstIdx / NumElemPerLane;
5300 unsigned Offset = ShuffleMask & 0b10 ? 1 : 0;
5301 return std::make_pair(
5302 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
5305 case X86::BI__builtin_ia32_vpermilvarps:
5306 case X86::BI__builtin_ia32_vpermilvarps256:
5307 case X86::BI__builtin_ia32_vpermilvarps512:
5309 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5310 unsigned NumElemPerLane = 4;
5311 unsigned Lane = DstIdx / NumElemPerLane;
5312 unsigned Offset = ShuffleMask & 0b11;
5313 return std::make_pair(
5314 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
5317 case X86::BI__builtin_ia32_vpermilpd:
5318 case X86::BI__builtin_ia32_vpermilpd256:
5319 case X86::BI__builtin_ia32_vpermilpd512:
5321 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Control) {
5322 unsigned NumElemPerLane = 2;
5323 unsigned BitsPerElem = 1;
5324 unsigned MaskBits = 8;
5325 unsigned IndexMask = 0x1;
5326 unsigned Lane = DstIdx / NumElemPerLane;
5327 unsigned LaneOffset = Lane * NumElemPerLane;
5328 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5329 unsigned Index = (Control >> BitIndex) & IndexMask;
5330 return std::make_pair(0,
static_cast<int>(LaneOffset + Index));
5333 case X86::BI__builtin_ia32_permdf256:
5334 case X86::BI__builtin_ia32_permdi256:
5336 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Control) {
5339 unsigned Index = (Control >> (2 * DstIdx)) & 0x3;
5340 return std::make_pair(0,
static_cast<int>(Index));
5343 case X86::BI__builtin_ia32_vpmultishiftqb128:
5344 case X86::BI__builtin_ia32_vpmultishiftqb256:
5345 case X86::BI__builtin_ia32_vpmultishiftqb512:
5347 case X86::BI__builtin_ia32_kandqi:
5348 case X86::BI__builtin_ia32_kandhi:
5349 case X86::BI__builtin_ia32_kandsi:
5350 case X86::BI__builtin_ia32_kanddi:
5353 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS & RHS; });
5355 case X86::BI__builtin_ia32_kandnqi:
5356 case X86::BI__builtin_ia32_kandnhi:
5357 case X86::BI__builtin_ia32_kandnsi:
5358 case X86::BI__builtin_ia32_kandndi:
5361 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~LHS & RHS; });
5363 case X86::BI__builtin_ia32_korqi:
5364 case X86::BI__builtin_ia32_korhi:
5365 case X86::BI__builtin_ia32_korsi:
5366 case X86::BI__builtin_ia32_kordi:
5369 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS | RHS; });
5371 case X86::BI__builtin_ia32_kxnorqi:
5372 case X86::BI__builtin_ia32_kxnorhi:
5373 case X86::BI__builtin_ia32_kxnorsi:
5374 case X86::BI__builtin_ia32_kxnordi:
5377 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~(LHS ^ RHS); });
5379 case X86::BI__builtin_ia32_kxorqi:
5380 case X86::BI__builtin_ia32_kxorhi:
5381 case X86::BI__builtin_ia32_kxorsi:
5382 case X86::BI__builtin_ia32_kxordi:
5385 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS ^ RHS; });
5387 case X86::BI__builtin_ia32_knotqi:
5388 case X86::BI__builtin_ia32_knothi:
5389 case X86::BI__builtin_ia32_knotsi:
5390 case X86::BI__builtin_ia32_knotdi:
5392 S, OpPC,
Call, [](
const APSInt &Src) {
return ~Src; });
5394 case X86::BI__builtin_ia32_kaddqi:
5395 case X86::BI__builtin_ia32_kaddhi:
5396 case X86::BI__builtin_ia32_kaddsi:
5397 case X86::BI__builtin_ia32_kadddi:
5400 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
5402 case X86::BI__builtin_ia32_kmovb:
5403 case X86::BI__builtin_ia32_kmovw:
5404 case X86::BI__builtin_ia32_kmovd:
5405 case X86::BI__builtin_ia32_kmovq:
5407 S, OpPC,
Call, [](
const APSInt &Src) {
return Src; });
5409 case X86::BI__builtin_ia32_kunpckhi:
5410 case X86::BI__builtin_ia32_kunpckdi:
5411 case X86::BI__builtin_ia32_kunpcksi:
5416 unsigned BW = A.getBitWidth();
5417 return APSInt(A.trunc(BW / 2).concat(B.trunc(BW / 2)),
5421 case X86::BI__builtin_ia32_phminposuw128:
5424 case X86::BI__builtin_ia32_psraq128:
5425 case X86::BI__builtin_ia32_psraq256:
5426 case X86::BI__builtin_ia32_psraq512:
5427 case X86::BI__builtin_ia32_psrad128:
5428 case X86::BI__builtin_ia32_psrad256:
5429 case X86::BI__builtin_ia32_psrad512:
5430 case X86::BI__builtin_ia32_psraw128:
5431 case X86::BI__builtin_ia32_psraw256:
5432 case X86::BI__builtin_ia32_psraw512:
5435 [](
const APInt &Elt, uint64_t Count) {
return Elt.ashr(Count); },
5436 [](
const APInt &Elt,
unsigned Width) {
return Elt.ashr(Width - 1); });
5438 case X86::BI__builtin_ia32_psllq128:
5439 case X86::BI__builtin_ia32_psllq256:
5440 case X86::BI__builtin_ia32_psllq512:
5441 case X86::BI__builtin_ia32_pslld128:
5442 case X86::BI__builtin_ia32_pslld256:
5443 case X86::BI__builtin_ia32_pslld512:
5444 case X86::BI__builtin_ia32_psllw128:
5445 case X86::BI__builtin_ia32_psllw256:
5446 case X86::BI__builtin_ia32_psllw512:
5449 [](
const APInt &Elt, uint64_t Count) {
return Elt.shl(Count); },
5450 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
5452 case X86::BI__builtin_ia32_psrlq128:
5453 case X86::BI__builtin_ia32_psrlq256:
5454 case X86::BI__builtin_ia32_psrlq512:
5455 case X86::BI__builtin_ia32_psrld128:
5456 case X86::BI__builtin_ia32_psrld256:
5457 case X86::BI__builtin_ia32_psrld512:
5458 case X86::BI__builtin_ia32_psrlw128:
5459 case X86::BI__builtin_ia32_psrlw256:
5460 case X86::BI__builtin_ia32_psrlw512:
5463 [](
const APInt &Elt, uint64_t Count) {
return Elt.lshr(Count); },
5464 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
5466 case X86::BI__builtin_ia32_pternlogd128_mask:
5467 case X86::BI__builtin_ia32_pternlogd256_mask:
5468 case X86::BI__builtin_ia32_pternlogd512_mask:
5469 case X86::BI__builtin_ia32_pternlogq128_mask:
5470 case X86::BI__builtin_ia32_pternlogq256_mask:
5471 case X86::BI__builtin_ia32_pternlogq512_mask:
5473 case X86::BI__builtin_ia32_pternlogd128_maskz:
5474 case X86::BI__builtin_ia32_pternlogd256_maskz:
5475 case X86::BI__builtin_ia32_pternlogd512_maskz:
5476 case X86::BI__builtin_ia32_pternlogq128_maskz:
5477 case X86::BI__builtin_ia32_pternlogq256_maskz:
5478 case X86::BI__builtin_ia32_pternlogq512_maskz:
5480 case Builtin::BI__builtin_elementwise_fshl:
5482 llvm::APIntOps::fshl);
5483 case Builtin::BI__builtin_elementwise_fshr:
5485 llvm::APIntOps::fshr);
5487 case X86::BI__builtin_ia32_shuf_f32x4_256:
5488 case X86::BI__builtin_ia32_shuf_i32x4_256:
5489 case X86::BI__builtin_ia32_shuf_f64x2_256:
5490 case X86::BI__builtin_ia32_shuf_i64x2_256:
5491 case X86::BI__builtin_ia32_shuf_f32x4:
5492 case X86::BI__builtin_ia32_shuf_i32x4:
5493 case X86::BI__builtin_ia32_shuf_f64x2:
5494 case X86::BI__builtin_ia32_shuf_i64x2: {
5500 unsigned LaneBits = 128u;
5501 unsigned NumLanes = (NumElems * ElemBits) / LaneBits;
5502 unsigned NumElemsPerLane = LaneBits / ElemBits;
5506 [NumLanes, NumElemsPerLane](
unsigned DstIdx,
unsigned ShuffleMask) {
5508 unsigned BitsPerElem = NumLanes / 2;
5509 unsigned IndexMask = (1u << BitsPerElem) - 1;
5510 unsigned Lane = DstIdx / NumElemsPerLane;
5511 unsigned SrcIdx = (Lane < NumLanes / 2) ? 0 : 1;
5512 unsigned BitIdx = BitsPerElem * Lane;
5513 unsigned SrcLaneIdx = (ShuffleMask >> BitIdx) & IndexMask;
5514 unsigned ElemInLane = DstIdx % NumElemsPerLane;
5515 unsigned IdxToPick = SrcLaneIdx * NumElemsPerLane + ElemInLane;
5516 return std::pair<unsigned, int>{SrcIdx, IdxToPick};
5520 case X86::BI__builtin_ia32_insertf32x4_256:
5521 case X86::BI__builtin_ia32_inserti32x4_256:
5522 case X86::BI__builtin_ia32_insertf64x2_256:
5523 case X86::BI__builtin_ia32_inserti64x2_256:
5524 case X86::BI__builtin_ia32_insertf32x4:
5525 case X86::BI__builtin_ia32_inserti32x4:
5526 case X86::BI__builtin_ia32_insertf64x2_512:
5527 case X86::BI__builtin_ia32_inserti64x2_512:
5528 case X86::BI__builtin_ia32_insertf32x8:
5529 case X86::BI__builtin_ia32_inserti32x8:
5530 case X86::BI__builtin_ia32_insertf64x4:
5531 case X86::BI__builtin_ia32_inserti64x4:
5532 case X86::BI__builtin_ia32_vinsertf128_ps256:
5533 case X86::BI__builtin_ia32_vinsertf128_pd256:
5534 case X86::BI__builtin_ia32_vinsertf128_si256:
5535 case X86::BI__builtin_ia32_insert128i256:
5538 case clang::X86::BI__builtin_ia32_vcvtps2ph:
5539 case clang::X86::BI__builtin_ia32_vcvtps2ph256:
5542 case X86::BI__builtin_ia32_vec_ext_v4hi:
5543 case X86::BI__builtin_ia32_vec_ext_v16qi:
5544 case X86::BI__builtin_ia32_vec_ext_v8hi:
5545 case X86::BI__builtin_ia32_vec_ext_v4si:
5546 case X86::BI__builtin_ia32_vec_ext_v2di:
5547 case X86::BI__builtin_ia32_vec_ext_v32qi:
5548 case X86::BI__builtin_ia32_vec_ext_v16hi:
5549 case X86::BI__builtin_ia32_vec_ext_v8si:
5550 case X86::BI__builtin_ia32_vec_ext_v4di:
5551 case X86::BI__builtin_ia32_vec_ext_v4sf:
5554 case X86::BI__builtin_ia32_vec_set_v4hi:
5555 case X86::BI__builtin_ia32_vec_set_v16qi:
5556 case X86::BI__builtin_ia32_vec_set_v8hi:
5557 case X86::BI__builtin_ia32_vec_set_v4si:
5558 case X86::BI__builtin_ia32_vec_set_v2di:
5559 case X86::BI__builtin_ia32_vec_set_v32qi:
5560 case X86::BI__builtin_ia32_vec_set_v16hi:
5561 case X86::BI__builtin_ia32_vec_set_v8si:
5562 case X86::BI__builtin_ia32_vec_set_v4di:
5565 case X86::BI__builtin_ia32_cvtb2mask128:
5566 case X86::BI__builtin_ia32_cvtb2mask256:
5567 case X86::BI__builtin_ia32_cvtb2mask512:
5568 case X86::BI__builtin_ia32_cvtw2mask128:
5569 case X86::BI__builtin_ia32_cvtw2mask256:
5570 case X86::BI__builtin_ia32_cvtw2mask512:
5571 case X86::BI__builtin_ia32_cvtd2mask128:
5572 case X86::BI__builtin_ia32_cvtd2mask256:
5573 case X86::BI__builtin_ia32_cvtd2mask512:
5574 case X86::BI__builtin_ia32_cvtq2mask128:
5575 case X86::BI__builtin_ia32_cvtq2mask256:
5576 case X86::BI__builtin_ia32_cvtq2mask512:
5579 case X86::BI__builtin_ia32_cvtmask2b128:
5580 case X86::BI__builtin_ia32_cvtmask2b256:
5581 case X86::BI__builtin_ia32_cvtmask2b512:
5582 case X86::BI__builtin_ia32_cvtmask2w128:
5583 case X86::BI__builtin_ia32_cvtmask2w256:
5584 case X86::BI__builtin_ia32_cvtmask2w512:
5585 case X86::BI__builtin_ia32_cvtmask2d128:
5586 case X86::BI__builtin_ia32_cvtmask2d256:
5587 case X86::BI__builtin_ia32_cvtmask2d512:
5588 case X86::BI__builtin_ia32_cvtmask2q128:
5589 case X86::BI__builtin_ia32_cvtmask2q256:
5590 case X86::BI__builtin_ia32_cvtmask2q512:
5593 case X86::BI__builtin_ia32_cvtsd2ss:
5596 case X86::BI__builtin_ia32_cvtsd2ss_round_mask:
5599 case X86::BI__builtin_ia32_cvtpd2ps:
5600 case X86::BI__builtin_ia32_cvtpd2ps256:
5602 case X86::BI__builtin_ia32_cvtpd2ps_mask:
5604 case X86::BI__builtin_ia32_cvtpd2ps512_mask:
5607 case X86::BI__builtin_ia32_cmpb128_mask:
5608 case X86::BI__builtin_ia32_cmpw128_mask:
5609 case X86::BI__builtin_ia32_cmpd128_mask:
5610 case X86::BI__builtin_ia32_cmpq128_mask:
5611 case X86::BI__builtin_ia32_cmpb256_mask:
5612 case X86::BI__builtin_ia32_cmpw256_mask:
5613 case X86::BI__builtin_ia32_cmpd256_mask:
5614 case X86::BI__builtin_ia32_cmpq256_mask:
5615 case X86::BI__builtin_ia32_cmpb512_mask:
5616 case X86::BI__builtin_ia32_cmpw512_mask:
5617 case X86::BI__builtin_ia32_cmpd512_mask:
5618 case X86::BI__builtin_ia32_cmpq512_mask:
5622 case X86::BI__builtin_ia32_ucmpb128_mask:
5623 case X86::BI__builtin_ia32_ucmpw128_mask:
5624 case X86::BI__builtin_ia32_ucmpd128_mask:
5625 case X86::BI__builtin_ia32_ucmpq128_mask:
5626 case X86::BI__builtin_ia32_ucmpb256_mask:
5627 case X86::BI__builtin_ia32_ucmpw256_mask:
5628 case X86::BI__builtin_ia32_ucmpd256_mask:
5629 case X86::BI__builtin_ia32_ucmpq256_mask:
5630 case X86::BI__builtin_ia32_ucmpb512_mask:
5631 case X86::BI__builtin_ia32_ucmpw512_mask:
5632 case X86::BI__builtin_ia32_ucmpd512_mask:
5633 case X86::BI__builtin_ia32_ucmpq512_mask:
5637 case X86::BI__builtin_ia32_vpshufbitqmb128_mask:
5638 case X86::BI__builtin_ia32_vpshufbitqmb256_mask:
5639 case X86::BI__builtin_ia32_vpshufbitqmb512_mask:
5642 case X86::BI__builtin_ia32_pslldqi128_byteshift:
5643 case X86::BI__builtin_ia32_pslldqi256_byteshift:
5644 case X86::BI__builtin_ia32_pslldqi512_byteshift:
5651 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
5652 unsigned LaneBase = (DstIdx / 16) * 16;
5653 unsigned LaneIdx = DstIdx % 16;
5654 if (LaneIdx < Shift)
5655 return std::make_pair(0, -1);
5657 return std::make_pair(0,
5658 static_cast<int>(LaneBase + LaneIdx - Shift));
5661 case X86::BI__builtin_ia32_psrldqi128_byteshift:
5662 case X86::BI__builtin_ia32_psrldqi256_byteshift:
5663 case X86::BI__builtin_ia32_psrldqi512_byteshift:
5670 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
5671 unsigned LaneBase = (DstIdx / 16) * 16;
5672 unsigned LaneIdx = DstIdx % 16;
5673 if (LaneIdx + Shift < 16)
5674 return std::make_pair(0,
5675 static_cast<int>(LaneBase + LaneIdx + Shift));
5677 return std::make_pair(0, -1);
5680 case X86::BI__builtin_ia32_palignr128:
5681 case X86::BI__builtin_ia32_palignr256:
5682 case X86::BI__builtin_ia32_palignr512:
5684 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Shift) {
5686 unsigned VecIdx = 1;
5689 int Lane = DstIdx / 16;
5690 int Offset = DstIdx % 16;
5693 unsigned ShiftedIdx = Offset + (Shift & 0xFF);
5694 if (ShiftedIdx < 16) {
5695 ElemIdx = ShiftedIdx + (Lane * 16);
5696 }
else if (ShiftedIdx < 32) {
5698 ElemIdx = (ShiftedIdx - 16) + (Lane * 16);
5701 return std::pair<unsigned, int>{VecIdx, ElemIdx};
5704 case X86::BI__builtin_ia32_alignd128:
5705 case X86::BI__builtin_ia32_alignd256:
5706 case X86::BI__builtin_ia32_alignd512:
5707 case X86::BI__builtin_ia32_alignq128:
5708 case X86::BI__builtin_ia32_alignq256:
5709 case X86::BI__builtin_ia32_alignq512: {
5710 unsigned NumElems =
Call->getType()->castAs<
VectorType>()->getNumElements();
5712 S, OpPC,
Call, [NumElems](
unsigned DstIdx,
unsigned Shift) {
5713 unsigned Imm = Shift & 0xFF;
5714 unsigned EffectiveShift = Imm & (NumElems - 1);
5715 unsigned SourcePos = DstIdx + EffectiveShift;
5716 unsigned VecIdx = SourcePos < NumElems ? 1u : 0u;
5717 unsigned ElemIdx = SourcePos & (NumElems - 1);
5718 return std::pair<unsigned, int>{VecIdx,
static_cast<int>(ElemIdx)};
5724 diag::note_invalid_subexpr_in_const_expr)
5730 llvm_unreachable(
"Unhandled builtin ID");