4604 uint32_t BuiltinID) {
4621 switch (BuiltinID) {
4622 case Builtin::BI__builtin_is_constant_evaluated:
4625 case Builtin::BI__builtin_assume:
4626 case Builtin::BI__assume:
4629 case Builtin::BI__builtin_strcmp:
4630 case Builtin::BIstrcmp:
4631 case Builtin::BI__builtin_strncmp:
4632 case Builtin::BIstrncmp:
4633 case Builtin::BI__builtin_wcsncmp:
4634 case Builtin::BIwcsncmp:
4635 case Builtin::BI__builtin_wcscmp:
4636 case Builtin::BIwcscmp:
4639 case Builtin::BI__builtin_strlen:
4640 case Builtin::BIstrlen:
4641 case Builtin::BI__builtin_wcslen:
4642 case Builtin::BIwcslen:
4645 case Builtin::BI__builtin_nan:
4646 case Builtin::BI__builtin_nanf:
4647 case Builtin::BI__builtin_nanl:
4648 case Builtin::BI__builtin_nanf16:
4649 case Builtin::BI__builtin_nanf128:
4652 case Builtin::BI__builtin_nans:
4653 case Builtin::BI__builtin_nansf:
4654 case Builtin::BI__builtin_nansl:
4655 case Builtin::BI__builtin_nansf16:
4656 case Builtin::BI__builtin_nansf128:
4659 case Builtin::BI__builtin_huge_val:
4660 case Builtin::BI__builtin_huge_valf:
4661 case Builtin::BI__builtin_huge_vall:
4662 case Builtin::BI__builtin_huge_valf16:
4663 case Builtin::BI__builtin_huge_valf128:
4664 case Builtin::BI__builtin_inf:
4665 case Builtin::BI__builtin_inff:
4666 case Builtin::BI__builtin_infl:
4667 case Builtin::BI__builtin_inff16:
4668 case Builtin::BI__builtin_inff128:
4671 case Builtin::BI__builtin_copysign:
4672 case Builtin::BI__builtin_copysignf:
4673 case Builtin::BI__builtin_copysignl:
4674 case Builtin::BI__builtin_copysignf128:
4677 case Builtin::BI__builtin_fmin:
4678 case Builtin::BI__builtin_fminf:
4679 case Builtin::BI__builtin_fminl:
4680 case Builtin::BI__builtin_fminf16:
4681 case Builtin::BI__builtin_fminf128:
4684 case Builtin::BI__builtin_fminimum_num:
4685 case Builtin::BI__builtin_fminimum_numf:
4686 case Builtin::BI__builtin_fminimum_numl:
4687 case Builtin::BI__builtin_fminimum_numf16:
4688 case Builtin::BI__builtin_fminimum_numf128:
4691 case Builtin::BI__builtin_fmax:
4692 case Builtin::BI__builtin_fmaxf:
4693 case Builtin::BI__builtin_fmaxl:
4694 case Builtin::BI__builtin_fmaxf16:
4695 case Builtin::BI__builtin_fmaxf128:
4698 case Builtin::BI__builtin_fmaximum_num:
4699 case Builtin::BI__builtin_fmaximum_numf:
4700 case Builtin::BI__builtin_fmaximum_numl:
4701 case Builtin::BI__builtin_fmaximum_numf16:
4702 case Builtin::BI__builtin_fmaximum_numf128:
4705 case Builtin::BI__builtin_isnan:
4708 case Builtin::BI__builtin_issignaling:
4711 case Builtin::BI__builtin_isinf:
4714 case Builtin::BI__builtin_isinf_sign:
4717 case Builtin::BI__builtin_isfinite:
4720 case Builtin::BI__builtin_isnormal:
4723 case Builtin::BI__builtin_issubnormal:
4726 case Builtin::BI__builtin_iszero:
4729 case Builtin::BI__builtin_signbit:
4730 case Builtin::BI__builtin_signbitf:
4731 case Builtin::BI__builtin_signbitl:
4734 case Builtin::BI__builtin_isgreater:
4735 case Builtin::BI__builtin_isgreaterequal:
4736 case Builtin::BI__builtin_isless:
4737 case Builtin::BI__builtin_islessequal:
4738 case Builtin::BI__builtin_islessgreater:
4739 case Builtin::BI__builtin_isunordered:
4742 case Builtin::BI__builtin_isfpclass:
4745 case Builtin::BI__builtin_fpclassify:
4748 case Builtin::BI__builtin_fabs:
4749 case Builtin::BI__builtin_fabsf:
4750 case Builtin::BI__builtin_fabsl:
4751 case Builtin::BI__builtin_fabsf128:
4754 case Builtin::BI__builtin_abs:
4755 case Builtin::BI__builtin_labs:
4756 case Builtin::BI__builtin_llabs:
4759 case Builtin::BI__builtin_popcount:
4760 case Builtin::BI__builtin_popcountl:
4761 case Builtin::BI__builtin_popcountll:
4762 case Builtin::BI__builtin_popcountg:
4763 case Builtin::BI__popcnt16:
4764 case Builtin::BI__popcnt:
4765 case Builtin::BI__popcnt64:
4768 case Builtin::BI__builtin_parity:
4769 case Builtin::BI__builtin_parityl:
4770 case Builtin::BI__builtin_parityll:
4773 return APInt(Val.getBitWidth(), Val.popcount() % 2);
4775 case Builtin::BI__builtin_clrsb:
4776 case Builtin::BI__builtin_clrsbl:
4777 case Builtin::BI__builtin_clrsbll:
4780 return APInt(Val.getBitWidth(),
4781 Val.getBitWidth() - Val.getSignificantBits());
4783 case Builtin::BI__builtin_bitreverseg:
4784 case Builtin::BI__builtin_bitreverse8:
4785 case Builtin::BI__builtin_bitreverse16:
4786 case Builtin::BI__builtin_bitreverse32:
4787 case Builtin::BI__builtin_bitreverse64:
4789 S, OpPC,
Call, [](
const APSInt &Val) {
return Val.reverseBits(); });
4791 case Builtin::BI__builtin_classify_type:
4794 case Builtin::BI__builtin_expect:
4795 case Builtin::BI__builtin_expect_with_probability:
4798 case Builtin::BI__builtin_rotateleft8:
4799 case Builtin::BI__builtin_rotateleft16:
4800 case Builtin::BI__builtin_rotateleft32:
4801 case Builtin::BI__builtin_rotateleft64:
4802 case Builtin::BI__builtin_stdc_rotate_left:
4803 case Builtin::BIstdc_rotate_left_uc:
4804 case Builtin::BIstdc_rotate_left_us:
4805 case Builtin::BIstdc_rotate_left_ui:
4806 case Builtin::BIstdc_rotate_left_ul:
4807 case Builtin::BIstdc_rotate_left_ull:
4808 case Builtin::BI_rotl8:
4809 case Builtin::BI_rotl16:
4810 case Builtin::BI_rotl:
4811 case Builtin::BI_lrotl:
4812 case Builtin::BI_rotl64:
4813 case Builtin::BI__builtin_rotateright8:
4814 case Builtin::BI__builtin_rotateright16:
4815 case Builtin::BI__builtin_rotateright32:
4816 case Builtin::BI__builtin_rotateright64:
4817 case Builtin::BI__builtin_stdc_rotate_right:
4818 case Builtin::BIstdc_rotate_right_uc:
4819 case Builtin::BIstdc_rotate_right_us:
4820 case Builtin::BIstdc_rotate_right_ui:
4821 case Builtin::BIstdc_rotate_right_ul:
4822 case Builtin::BIstdc_rotate_right_ull:
4823 case Builtin::BI_rotr8:
4824 case Builtin::BI_rotr16:
4825 case Builtin::BI_rotr:
4826 case Builtin::BI_lrotr:
4827 case Builtin::BI_rotr64: {
4830 switch (BuiltinID) {
4831 case Builtin::BI__builtin_rotateright8:
4832 case Builtin::BI__builtin_rotateright16:
4833 case Builtin::BI__builtin_rotateright32:
4834 case Builtin::BI__builtin_rotateright64:
4835 case Builtin::BI__builtin_stdc_rotate_right:
4836 case Builtin::BIstdc_rotate_right_uc:
4837 case Builtin::BIstdc_rotate_right_us:
4838 case Builtin::BIstdc_rotate_right_ui:
4839 case Builtin::BIstdc_rotate_right_ul:
4840 case Builtin::BIstdc_rotate_right_ull:
4841 case Builtin::BI_rotr8:
4842 case Builtin::BI_rotr16:
4843 case Builtin::BI_rotr:
4844 case Builtin::BI_lrotr:
4845 case Builtin::BI_rotr64:
4846 IsRotateRight =
true;
4849 IsRotateRight =
false;
4856 return IsRotateRight ?
Value.rotr(Amount.getZExtValue())
4857 :
Value.rotl(Amount.getZExtValue());
4861 case Builtin::BIstdc_leading_zeros_uc:
4862 case Builtin::BIstdc_leading_zeros_us:
4863 case Builtin::BIstdc_leading_zeros_ui:
4864 case Builtin::BIstdc_leading_zeros_ul:
4865 case Builtin::BIstdc_leading_zeros_ull:
4866 case Builtin::BI__builtin_stdc_leading_zeros: {
4869 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4870 return APInt(ResWidth, Val.countl_zero());
4874 case Builtin::BIstdc_leading_ones_uc:
4875 case Builtin::BIstdc_leading_ones_us:
4876 case Builtin::BIstdc_leading_ones_ui:
4877 case Builtin::BIstdc_leading_ones_ul:
4878 case Builtin::BIstdc_leading_ones_ull:
4879 case Builtin::BI__builtin_stdc_leading_ones: {
4882 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4883 return APInt(ResWidth, Val.countl_one());
4887 case Builtin::BIstdc_trailing_zeros_uc:
4888 case Builtin::BIstdc_trailing_zeros_us:
4889 case Builtin::BIstdc_trailing_zeros_ui:
4890 case Builtin::BIstdc_trailing_zeros_ul:
4891 case Builtin::BIstdc_trailing_zeros_ull:
4892 case Builtin::BI__builtin_stdc_trailing_zeros: {
4895 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4896 return APInt(ResWidth, Val.countr_zero());
4900 case Builtin::BIstdc_trailing_ones_uc:
4901 case Builtin::BIstdc_trailing_ones_us:
4902 case Builtin::BIstdc_trailing_ones_ui:
4903 case Builtin::BIstdc_trailing_ones_ul:
4904 case Builtin::BIstdc_trailing_ones_ull:
4905 case Builtin::BI__builtin_stdc_trailing_ones: {
4908 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4909 return APInt(ResWidth, Val.countr_one());
4913 case Builtin::BIstdc_first_leading_zero_uc:
4914 case Builtin::BIstdc_first_leading_zero_us:
4915 case Builtin::BIstdc_first_leading_zero_ui:
4916 case Builtin::BIstdc_first_leading_zero_ul:
4917 case Builtin::BIstdc_first_leading_zero_ull:
4918 case Builtin::BI__builtin_stdc_first_leading_zero: {
4921 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4922 return APInt(ResWidth, Val.isAllOnes() ? 0 : Val.countl_one() + 1);
4926 case Builtin::BIstdc_first_leading_one_uc:
4927 case Builtin::BIstdc_first_leading_one_us:
4928 case Builtin::BIstdc_first_leading_one_ui:
4929 case Builtin::BIstdc_first_leading_one_ul:
4930 case Builtin::BIstdc_first_leading_one_ull:
4931 case Builtin::BI__builtin_stdc_first_leading_one: {
4934 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4935 return APInt(ResWidth, Val.isZero() ? 0 : Val.countl_zero() + 1);
4939 case Builtin::BIstdc_first_trailing_zero_uc:
4940 case Builtin::BIstdc_first_trailing_zero_us:
4941 case Builtin::BIstdc_first_trailing_zero_ui:
4942 case Builtin::BIstdc_first_trailing_zero_ul:
4943 case Builtin::BIstdc_first_trailing_zero_ull:
4944 case Builtin::BI__builtin_stdc_first_trailing_zero: {
4947 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4948 return APInt(ResWidth, Val.isAllOnes() ? 0 : Val.countr_one() + 1);
4952 case Builtin::BIstdc_first_trailing_one_uc:
4953 case Builtin::BIstdc_first_trailing_one_us:
4954 case Builtin::BIstdc_first_trailing_one_ui:
4955 case Builtin::BIstdc_first_trailing_one_ul:
4956 case Builtin::BIstdc_first_trailing_one_ull:
4957 case Builtin::BI__builtin_stdc_first_trailing_one: {
4960 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4961 return APInt(ResWidth, Val.isZero() ? 0 : Val.countr_zero() + 1);
4965 case Builtin::BIstdc_count_zeros_uc:
4966 case Builtin::BIstdc_count_zeros_us:
4967 case Builtin::BIstdc_count_zeros_ui:
4968 case Builtin::BIstdc_count_zeros_ul:
4969 case Builtin::BIstdc_count_zeros_ull:
4970 case Builtin::BI__builtin_stdc_count_zeros: {
4973 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4974 unsigned BitWidth = Val.getBitWidth();
4975 return APInt(ResWidth, BitWidth - Val.popcount());
4979 case Builtin::BIstdc_count_ones_uc:
4980 case Builtin::BIstdc_count_ones_us:
4981 case Builtin::BIstdc_count_ones_ui:
4982 case Builtin::BIstdc_count_ones_ul:
4983 case Builtin::BIstdc_count_ones_ull:
4984 case Builtin::BI__builtin_stdc_count_ones: {
4987 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4988 return APInt(ResWidth, Val.popcount());
4992 case Builtin::BIstdc_has_single_bit_uc:
4993 case Builtin::BIstdc_has_single_bit_us:
4994 case Builtin::BIstdc_has_single_bit_ui:
4995 case Builtin::BIstdc_has_single_bit_ul:
4996 case Builtin::BIstdc_has_single_bit_ull:
4997 case Builtin::BI__builtin_stdc_has_single_bit: {
5000 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
5001 return APInt(ResWidth, Val.popcount() == 1 ? 1 : 0);
5005 case Builtin::BIstdc_bit_width_uc:
5006 case Builtin::BIstdc_bit_width_us:
5007 case Builtin::BIstdc_bit_width_ui:
5008 case Builtin::BIstdc_bit_width_ul:
5009 case Builtin::BIstdc_bit_width_ull:
5010 case Builtin::BI__builtin_stdc_bit_width: {
5013 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
5014 unsigned BitWidth = Val.getBitWidth();
5015 return APInt(ResWidth, BitWidth - Val.countl_zero());
5019 case Builtin::BIstdc_bit_floor_uc:
5020 case Builtin::BIstdc_bit_floor_us:
5021 case Builtin::BIstdc_bit_floor_ui:
5022 case Builtin::BIstdc_bit_floor_ul:
5023 case Builtin::BIstdc_bit_floor_ull:
5024 case Builtin::BI__builtin_stdc_bit_floor:
5027 unsigned BitWidth = Val.getBitWidth();
5029 return APInt::getZero(BitWidth);
5030 return APInt::getOneBitSet(BitWidth,
5031 BitWidth - Val.countl_zero() - 1);
5034 case Builtin::BIstdc_bit_ceil_uc:
5035 case Builtin::BIstdc_bit_ceil_us:
5036 case Builtin::BIstdc_bit_ceil_ui:
5037 case Builtin::BIstdc_bit_ceil_ul:
5038 case Builtin::BIstdc_bit_ceil_ull:
5039 case Builtin::BI__builtin_stdc_bit_ceil:
5042 unsigned BitWidth = Val.getBitWidth();
5044 return APInt(BitWidth, 1);
5046 APInt ValMinusOne =
V - 1;
5047 unsigned LeadingZeros = ValMinusOne.countl_zero();
5048 if (LeadingZeros == 0)
5049 return APInt(BitWidth, 0);
5050 return APInt::getOneBitSet(BitWidth, BitWidth - LeadingZeros);
5053 case Builtin::BI__builtin_ffs:
5054 case Builtin::BI__builtin_ffsl:
5055 case Builtin::BI__builtin_ffsll:
5058 return APInt(Val.getBitWidth(),
5059 Val.isZero() ? 0u : Val.countTrailingZeros() + 1u);
5062 case Builtin::BIaddressof:
5063 case Builtin::BI__addressof:
5064 case Builtin::BI__builtin_addressof:
5068 case Builtin::BIas_const:
5069 case Builtin::BIforward:
5070 case Builtin::BIforward_like:
5071 case Builtin::BImove:
5072 case Builtin::BImove_if_noexcept:
5076 case Builtin::BI__builtin_eh_return_data_regno:
5079 case Builtin::BI__builtin_launder:
5083 case Builtin::BI__builtin_add_overflow:
5084 case Builtin::BI__builtin_sub_overflow:
5085 case Builtin::BI__builtin_mul_overflow:
5086 case Builtin::BI__builtin_sadd_overflow:
5087 case Builtin::BI__builtin_uadd_overflow:
5088 case Builtin::BI__builtin_uaddl_overflow:
5089 case Builtin::BI__builtin_uaddll_overflow:
5090 case Builtin::BI__builtin_usub_overflow:
5091 case Builtin::BI__builtin_usubl_overflow:
5092 case Builtin::BI__builtin_usubll_overflow:
5093 case Builtin::BI__builtin_umul_overflow:
5094 case Builtin::BI__builtin_umull_overflow:
5095 case Builtin::BI__builtin_umulll_overflow:
5096 case Builtin::BI__builtin_saddl_overflow:
5097 case Builtin::BI__builtin_saddll_overflow:
5098 case Builtin::BI__builtin_ssub_overflow:
5099 case Builtin::BI__builtin_ssubl_overflow:
5100 case Builtin::BI__builtin_ssubll_overflow:
5101 case Builtin::BI__builtin_smul_overflow:
5102 case Builtin::BI__builtin_smull_overflow:
5103 case Builtin::BI__builtin_smulll_overflow:
5106 case Builtin::BI__builtin_addcb:
5107 case Builtin::BI__builtin_addcs:
5108 case Builtin::BI__builtin_addc:
5109 case Builtin::BI__builtin_addcl:
5110 case Builtin::BI__builtin_addcll:
5111 case Builtin::BI__builtin_subcb:
5112 case Builtin::BI__builtin_subcs:
5113 case Builtin::BI__builtin_subc:
5114 case Builtin::BI__builtin_subcl:
5115 case Builtin::BI__builtin_subcll:
5118 case Builtin::BI__builtin_clz:
5119 case Builtin::BI__builtin_clzl:
5120 case Builtin::BI__builtin_clzll:
5121 case Builtin::BI__builtin_clzs:
5122 case Builtin::BI__builtin_clzg:
5123 case Builtin::BI__lzcnt16:
5124 case Builtin::BI__lzcnt:
5125 case Builtin::BI__lzcnt64:
5128 case Builtin::BI__builtin_ctz:
5129 case Builtin::BI__builtin_ctzl:
5130 case Builtin::BI__builtin_ctzll:
5131 case Builtin::BI__builtin_ctzs:
5132 case Builtin::BI__builtin_ctzg:
5135 case Builtin::BI__builtin_elementwise_clzg:
5136 case Builtin::BI__builtin_elementwise_ctzg:
5139 case Builtin::BI__builtin_bswapg:
5140 case Builtin::BI__builtin_bswap16:
5141 case Builtin::BI__builtin_bswap32:
5142 case Builtin::BI__builtin_bswap64:
5143 case Builtin::BIstdc_memreverse8u8:
5144 case Builtin::BIstdc_memreverse8u16:
5145 case Builtin::BIstdc_memreverse8u32:
5146 case Builtin::BIstdc_memreverse8u64:
5149 case Builtin::BI__atomic_always_lock_free:
5150 case Builtin::BI__atomic_is_lock_free:
5153 case Builtin::BI__c11_atomic_is_lock_free:
5156 case Builtin::BI__builtin_complex:
5159 case Builtin::BI__builtin_is_aligned:
5160 case Builtin::BI__builtin_align_up:
5161 case Builtin::BI__builtin_align_down:
5164 case Builtin::BI__builtin_assume_aligned:
5167 case clang::X86::BI__builtin_ia32_crc32qi:
5169 case clang::X86::BI__builtin_ia32_crc32hi:
5171 case clang::X86::BI__builtin_ia32_crc32si:
5173 case clang::X86::BI__builtin_ia32_crc32di:
5176 case clang::X86::BI__builtin_ia32_bextr_u32:
5177 case clang::X86::BI__builtin_ia32_bextr_u64:
5178 case clang::X86::BI__builtin_ia32_bextri_u32:
5179 case clang::X86::BI__builtin_ia32_bextri_u64:
5182 unsigned BitWidth = Val.getBitWidth();
5183 uint64_t Shift = Idx.extractBitsAsZExtValue(8, 0);
5184 uint64_t Length = Idx.extractBitsAsZExtValue(8, 8);
5185 if (Length > BitWidth) {
5190 if (Length == 0 || Shift >= BitWidth)
5191 return APInt(BitWidth, 0);
5193 uint64_t
Result = Val.getZExtValue() >> Shift;
5194 Result &= llvm::maskTrailingOnes<uint64_t>(Length);
5198 case clang::X86::BI__builtin_ia32_bzhi_si:
5199 case clang::X86::BI__builtin_ia32_bzhi_di:
5202 unsigned BitWidth = Val.getBitWidth();
5203 uint64_t Index = Idx.extractBitsAsZExtValue(8, 0);
5206 if (Index < BitWidth)
5207 Result.clearHighBits(BitWidth - Index);
5212 case clang::X86::BI__builtin_ia32_ktestcqi:
5213 case clang::X86::BI__builtin_ia32_ktestchi:
5214 case clang::X86::BI__builtin_ia32_ktestcsi:
5215 case clang::X86::BI__builtin_ia32_ktestcdi:
5218 return APInt(
sizeof(
unsigned char) * 8, (~A & B) == 0);
5221 case clang::X86::BI__builtin_ia32_ktestzqi:
5222 case clang::X86::BI__builtin_ia32_ktestzhi:
5223 case clang::X86::BI__builtin_ia32_ktestzsi:
5224 case clang::X86::BI__builtin_ia32_ktestzdi:
5227 return APInt(
sizeof(
unsigned char) * 8, (A & B) == 0);
5230 case clang::X86::BI__builtin_ia32_kortestcqi:
5231 case clang::X86::BI__builtin_ia32_kortestchi:
5232 case clang::X86::BI__builtin_ia32_kortestcsi:
5233 case clang::X86::BI__builtin_ia32_kortestcdi:
5236 return APInt(
sizeof(
unsigned char) * 8, ~(A | B) == 0);
5239 case clang::X86::BI__builtin_ia32_kortestzqi:
5240 case clang::X86::BI__builtin_ia32_kortestzhi:
5241 case clang::X86::BI__builtin_ia32_kortestzsi:
5242 case clang::X86::BI__builtin_ia32_kortestzdi:
5245 return APInt(
sizeof(
unsigned char) * 8, (A | B) == 0);
5248 case clang::X86::BI__builtin_ia32_kshiftliqi:
5249 case clang::X86::BI__builtin_ia32_kshiftlihi:
5250 case clang::X86::BI__builtin_ia32_kshiftlisi:
5251 case clang::X86::BI__builtin_ia32_kshiftlidi:
5254 unsigned Amt = RHS.getZExtValue() & 0xFF;
5255 if (Amt >= LHS.getBitWidth())
5256 return APInt::getZero(LHS.getBitWidth());
5257 return LHS.shl(Amt);
5260 case clang::X86::BI__builtin_ia32_kshiftriqi:
5261 case clang::X86::BI__builtin_ia32_kshiftrihi:
5262 case clang::X86::BI__builtin_ia32_kshiftrisi:
5263 case clang::X86::BI__builtin_ia32_kshiftridi:
5266 unsigned Amt = RHS.getZExtValue() & 0xFF;
5267 if (Amt >= LHS.getBitWidth())
5268 return APInt::getZero(LHS.getBitWidth());
5269 return LHS.lshr(Amt);
5272 case clang::X86::BI__builtin_ia32_lzcnt_u16:
5273 case clang::X86::BI__builtin_ia32_lzcnt_u32:
5274 case clang::X86::BI__builtin_ia32_lzcnt_u64:
5277 return APInt(Src.getBitWidth(), Src.countLeadingZeros());
5280 case clang::X86::BI__builtin_ia32_tzcnt_u16:
5281 case clang::X86::BI__builtin_ia32_tzcnt_u32:
5282 case clang::X86::BI__builtin_ia32_tzcnt_u64:
5285 return APInt(Src.getBitWidth(), Src.countTrailingZeros());
5288 case clang::X86::BI__builtin_ia32_addcarryx_u32:
5289 case clang::X86::BI__builtin_ia32_addcarryx_u64:
5293 case clang::X86::BI__builtin_ia32_subborrow_u32:
5294 case clang::X86::BI__builtin_ia32_subborrow_u64:
5298 case Builtin::BI__builtin_os_log_format_buffer_size:
5301 case Builtin::BI__builtin_ptrauth_string_discriminator:
5304 case Builtin::BI__builtin_infer_alloc_token:
5307 case Builtin::BI__noop:
5311 case Builtin::BI__builtin_operator_new:
5314 case Builtin::BI__builtin_operator_delete:
5317 case Builtin::BI__arithmetic_fence:
5320 case Builtin::BI__builtin_reduce_add:
5321 case Builtin::BI__builtin_reduce_mul:
5322 case Builtin::BI__builtin_reduce_and:
5323 case Builtin::BI__builtin_reduce_or:
5324 case Builtin::BI__builtin_reduce_xor:
5325 case Builtin::BI__builtin_reduce_min:
5326 case Builtin::BI__builtin_reduce_max:
5329 case Builtin::BI__builtin_elementwise_popcount:
5332 return APInt(Src.getBitWidth(), Src.popcount());
5334 case Builtin::BI__builtin_elementwise_bitreverse:
5336 S, OpPC,
Call, [](
const APSInt &Src) {
return Src.reverseBits(); });
5338 case Builtin::BI__builtin_elementwise_abs:
5341 case Builtin::BI__builtin_memcpy:
5342 case Builtin::BImemcpy:
5343 case Builtin::BI__builtin_wmemcpy:
5344 case Builtin::BIwmemcpy:
5345 case Builtin::BI__builtin_memmove:
5346 case Builtin::BImemmove:
5347 case Builtin::BI__builtin_wmemmove:
5348 case Builtin::BIwmemmove:
5351 case Builtin::BI__builtin_memcmp:
5352 case Builtin::BImemcmp:
5353 case Builtin::BI__builtin_bcmp:
5354 case Builtin::BIbcmp:
5355 case Builtin::BI__builtin_wmemcmp:
5356 case Builtin::BIwmemcmp:
5359 case Builtin::BImemchr:
5360 case Builtin::BI__builtin_memchr:
5361 case Builtin::BIstrchr:
5362 case Builtin::BI__builtin_strchr:
5363 case Builtin::BIwmemchr:
5364 case Builtin::BI__builtin_wmemchr:
5365 case Builtin::BIwcschr:
5366 case Builtin::BI__builtin_wcschr:
5367 case Builtin::BI__builtin_char_memchr:
5370 case Builtin::BI__builtin_object_size:
5373 case Builtin::BI__builtin_dynamic_object_size:
5377 case Builtin::BI__builtin_is_within_lifetime:
5380 case Builtin::BI__builtin_elementwise_add_sat:
5383 return LHS.isSigned() ? LHS.sadd_sat(RHS) : LHS.uadd_sat(RHS);
5386 case Builtin::BI__builtin_elementwise_sub_sat:
5389 return LHS.isSigned() ? LHS.ssub_sat(RHS) : LHS.usub_sat(RHS);
5392 case Builtin::BI__builtin_elementwise_pdep:
5394 llvm::APIntOps::pdep);
5396 case Builtin::BI__builtin_elementwise_pext:
5398 llvm::APIntOps::pext);
5400 case X86::BI__builtin_ia32_extract128i256:
5401 case X86::BI__builtin_ia32_vextractf128_pd256:
5402 case X86::BI__builtin_ia32_vextractf128_ps256:
5403 case X86::BI__builtin_ia32_vextractf128_si256:
5406 case X86::BI__builtin_ia32_extractf32x4_256_mask:
5407 case X86::BI__builtin_ia32_extractf32x4_mask:
5408 case X86::BI__builtin_ia32_extractf32x8_mask:
5409 case X86::BI__builtin_ia32_extractf64x2_256_mask:
5410 case X86::BI__builtin_ia32_extractf64x2_512_mask:
5411 case X86::BI__builtin_ia32_extractf64x4_mask:
5412 case X86::BI__builtin_ia32_extracti32x4_256_mask:
5413 case X86::BI__builtin_ia32_extracti32x4_mask:
5414 case X86::BI__builtin_ia32_extracti32x8_mask:
5415 case X86::BI__builtin_ia32_extracti64x2_256_mask:
5416 case X86::BI__builtin_ia32_extracti64x2_512_mask:
5417 case X86::BI__builtin_ia32_extracti64x4_mask:
5420 case clang::X86::BI__builtin_ia32_pmulhrsw128:
5421 case clang::X86::BI__builtin_ia32_pmulhrsw256:
5422 case clang::X86::BI__builtin_ia32_pmulhrsw512:
5425 return (llvm::APIntOps::mulsExtended(LHS, RHS).ashr(14) + 1)
5426 .extractBits(16, 1);
5429 case clang::X86::BI__builtin_ia32_movmskps:
5430 case clang::X86::BI__builtin_ia32_movmskpd:
5431 case clang::X86::BI__builtin_ia32_pmovmskb128:
5432 case clang::X86::BI__builtin_ia32_pmovmskb256:
5433 case clang::X86::BI__builtin_ia32_movmskps256:
5434 case clang::X86::BI__builtin_ia32_movmskpd256: {
5438 case X86::BI__builtin_ia32_psignb128:
5439 case X86::BI__builtin_ia32_psignb256:
5440 case X86::BI__builtin_ia32_psignw128:
5441 case X86::BI__builtin_ia32_psignw256:
5442 case X86::BI__builtin_ia32_psignd128:
5443 case X86::BI__builtin_ia32_psignd256:
5447 return APInt::getZero(AElem.getBitWidth());
5448 if (BElem.isNegative())
5453 case clang::X86::BI__builtin_ia32_pavgb128:
5454 case clang::X86::BI__builtin_ia32_pavgw128:
5455 case clang::X86::BI__builtin_ia32_pavgb256:
5456 case clang::X86::BI__builtin_ia32_pavgw256:
5457 case clang::X86::BI__builtin_ia32_pavgb512:
5458 case clang::X86::BI__builtin_ia32_pavgw512:
5460 llvm::APIntOps::avgCeilU);
5462 case clang::X86::BI__builtin_ia32_pmaddubsw128:
5463 case clang::X86::BI__builtin_ia32_pmaddubsw256:
5464 case clang::X86::BI__builtin_ia32_pmaddubsw512:
5469 unsigned BitWidth = 2 * LoLHS.getBitWidth();
5470 return (LoLHS.zext(BitWidth) * LoRHS.sext(BitWidth))
5471 .sadd_sat((HiLHS.zext(BitWidth) * HiRHS.sext(BitWidth)));
5474 case clang::X86::BI__builtin_ia32_pmaddwd128:
5475 case clang::X86::BI__builtin_ia32_pmaddwd256:
5476 case clang::X86::BI__builtin_ia32_pmaddwd512:
5481 unsigned BitWidth = 2 * LoLHS.getBitWidth();
5482 return (LoLHS.sext(BitWidth) * LoRHS.sext(BitWidth)) +
5483 (HiLHS.sext(BitWidth) * HiRHS.sext(BitWidth));
5486 case clang::X86::BI__builtin_ia32_psadbw128:
5487 case clang::X86::BI__builtin_ia32_psadbw256:
5488 case clang::X86::BI__builtin_ia32_psadbw512:
5491 case clang::X86::BI__builtin_ia32_dbpsadbw128:
5492 case clang::X86::BI__builtin_ia32_dbpsadbw256:
5493 case clang::X86::BI__builtin_ia32_dbpsadbw512:
5496 case clang::X86::BI__builtin_ia32_mpsadbw128:
5497 case clang::X86::BI__builtin_ia32_mpsadbw256:
5500 case clang::X86::BI__builtin_ia32_pmulhuw128:
5501 case clang::X86::BI__builtin_ia32_pmulhuw256:
5502 case clang::X86::BI__builtin_ia32_pmulhuw512:
5504 llvm::APIntOps::mulhu);
5506 case clang::X86::BI__builtin_ia32_pmulhw128:
5507 case clang::X86::BI__builtin_ia32_pmulhw256:
5508 case clang::X86::BI__builtin_ia32_pmulhw512:
5510 llvm::APIntOps::mulhs);
5512 case clang::X86::BI__builtin_ia32_psllv2di:
5513 case clang::X86::BI__builtin_ia32_psllv4di:
5514 case clang::X86::BI__builtin_ia32_psllv4si:
5515 case clang::X86::BI__builtin_ia32_psllv8di:
5516 case clang::X86::BI__builtin_ia32_psllv8hi:
5517 case clang::X86::BI__builtin_ia32_psllv8si:
5518 case clang::X86::BI__builtin_ia32_psllv16hi:
5519 case clang::X86::BI__builtin_ia32_psllv16si:
5520 case clang::X86::BI__builtin_ia32_psllv32hi:
5521 case clang::X86::BI__builtin_ia32_psllwi128:
5522 case clang::X86::BI__builtin_ia32_psllwi256:
5523 case clang::X86::BI__builtin_ia32_psllwi512:
5524 case clang::X86::BI__builtin_ia32_pslldi128:
5525 case clang::X86::BI__builtin_ia32_pslldi256:
5526 case clang::X86::BI__builtin_ia32_pslldi512:
5527 case clang::X86::BI__builtin_ia32_psllqi128:
5528 case clang::X86::BI__builtin_ia32_psllqi256:
5529 case clang::X86::BI__builtin_ia32_psllqi512:
5532 if (RHS.uge(LHS.getBitWidth())) {
5533 return APInt::getZero(LHS.getBitWidth());
5535 return LHS.shl(RHS.getZExtValue());
5538 case clang::X86::BI__builtin_ia32_psrav4si:
5539 case clang::X86::BI__builtin_ia32_psrav8di:
5540 case clang::X86::BI__builtin_ia32_psrav8hi:
5541 case clang::X86::BI__builtin_ia32_psrav8si:
5542 case clang::X86::BI__builtin_ia32_psrav16hi:
5543 case clang::X86::BI__builtin_ia32_psrav16si:
5544 case clang::X86::BI__builtin_ia32_psrav32hi:
5545 case clang::X86::BI__builtin_ia32_psravq128:
5546 case clang::X86::BI__builtin_ia32_psravq256:
5547 case clang::X86::BI__builtin_ia32_psrawi128:
5548 case clang::X86::BI__builtin_ia32_psrawi256:
5549 case clang::X86::BI__builtin_ia32_psrawi512:
5550 case clang::X86::BI__builtin_ia32_psradi128:
5551 case clang::X86::BI__builtin_ia32_psradi256:
5552 case clang::X86::BI__builtin_ia32_psradi512:
5553 case clang::X86::BI__builtin_ia32_psraqi128:
5554 case clang::X86::BI__builtin_ia32_psraqi256:
5555 case clang::X86::BI__builtin_ia32_psraqi512:
5558 if (RHS.uge(LHS.getBitWidth())) {
5559 return LHS.ashr(LHS.getBitWidth() - 1);
5561 return LHS.ashr(RHS.getZExtValue());
5564 case clang::X86::BI__builtin_ia32_psrlv2di:
5565 case clang::X86::BI__builtin_ia32_psrlv4di:
5566 case clang::X86::BI__builtin_ia32_psrlv4si:
5567 case clang::X86::BI__builtin_ia32_psrlv8di:
5568 case clang::X86::BI__builtin_ia32_psrlv8hi:
5569 case clang::X86::BI__builtin_ia32_psrlv8si:
5570 case clang::X86::BI__builtin_ia32_psrlv16hi:
5571 case clang::X86::BI__builtin_ia32_psrlv16si:
5572 case clang::X86::BI__builtin_ia32_psrlv32hi:
5573 case clang::X86::BI__builtin_ia32_psrlwi128:
5574 case clang::X86::BI__builtin_ia32_psrlwi256:
5575 case clang::X86::BI__builtin_ia32_psrlwi512:
5576 case clang::X86::BI__builtin_ia32_psrldi128:
5577 case clang::X86::BI__builtin_ia32_psrldi256:
5578 case clang::X86::BI__builtin_ia32_psrldi512:
5579 case clang::X86::BI__builtin_ia32_psrlqi128:
5580 case clang::X86::BI__builtin_ia32_psrlqi256:
5581 case clang::X86::BI__builtin_ia32_psrlqi512:
5584 if (RHS.uge(LHS.getBitWidth())) {
5585 return APInt::getZero(LHS.getBitWidth());
5587 return LHS.lshr(RHS.getZExtValue());
5589 case clang::X86::BI__builtin_ia32_packsswb128:
5590 case clang::X86::BI__builtin_ia32_packsswb256:
5591 case clang::X86::BI__builtin_ia32_packsswb512:
5592 case clang::X86::BI__builtin_ia32_packssdw128:
5593 case clang::X86::BI__builtin_ia32_packssdw256:
5594 case clang::X86::BI__builtin_ia32_packssdw512:
5596 return APInt(Src).truncSSat(Src.getBitWidth() / 2);
5598 case clang::X86::BI__builtin_ia32_packusdw128:
5599 case clang::X86::BI__builtin_ia32_packusdw256:
5600 case clang::X86::BI__builtin_ia32_packusdw512:
5601 case clang::X86::BI__builtin_ia32_packuswb128:
5602 case clang::X86::BI__builtin_ia32_packuswb256:
5603 case clang::X86::BI__builtin_ia32_packuswb512:
5605 return APInt(Src).truncSSatU(Src.getBitWidth() / 2);
5608 case clang::X86::BI__builtin_ia32_selectss_128:
5609 case clang::X86::BI__builtin_ia32_selectsd_128:
5610 case clang::X86::BI__builtin_ia32_selectsh_128:
5611 case clang::X86::BI__builtin_ia32_selectsbf_128:
5613 case clang::X86::BI__builtin_ia32_vprotbi:
5614 case clang::X86::BI__builtin_ia32_vprotdi:
5615 case clang::X86::BI__builtin_ia32_vprotqi:
5616 case clang::X86::BI__builtin_ia32_vprotwi:
5617 case clang::X86::BI__builtin_ia32_prold128:
5618 case clang::X86::BI__builtin_ia32_prold256:
5619 case clang::X86::BI__builtin_ia32_prold512:
5620 case clang::X86::BI__builtin_ia32_prolq128:
5621 case clang::X86::BI__builtin_ia32_prolq256:
5622 case clang::X86::BI__builtin_ia32_prolq512:
5625 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotl(RHS); });
5627 case clang::X86::BI__builtin_ia32_prord128:
5628 case clang::X86::BI__builtin_ia32_prord256:
5629 case clang::X86::BI__builtin_ia32_prord512:
5630 case clang::X86::BI__builtin_ia32_prorq128:
5631 case clang::X86::BI__builtin_ia32_prorq256:
5632 case clang::X86::BI__builtin_ia32_prorq512:
5635 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotr(RHS); });
5637 case Builtin::BI__builtin_elementwise_max:
5638 case Builtin::BI__builtin_elementwise_min:
5641 case clang::X86::BI__builtin_ia32_phaddw128:
5642 case clang::X86::BI__builtin_ia32_phaddw256:
5643 case clang::X86::BI__builtin_ia32_phaddd128:
5644 case clang::X86::BI__builtin_ia32_phaddd256:
5647 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
5648 case clang::X86::BI__builtin_ia32_phaddsw128:
5649 case clang::X86::BI__builtin_ia32_phaddsw256:
5652 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.sadd_sat(RHS); });
5653 case clang::X86::BI__builtin_ia32_phsubw128:
5654 case clang::X86::BI__builtin_ia32_phsubw256:
5655 case clang::X86::BI__builtin_ia32_phsubd128:
5656 case clang::X86::BI__builtin_ia32_phsubd256:
5659 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS - RHS; });
5660 case clang::X86::BI__builtin_ia32_phsubsw128:
5661 case clang::X86::BI__builtin_ia32_phsubsw256:
5664 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.ssub_sat(RHS); });
5665 case clang::X86::BI__builtin_ia32_haddpd:
5666 case clang::X86::BI__builtin_ia32_haddps:
5667 case clang::X86::BI__builtin_ia32_haddpd256:
5668 case clang::X86::BI__builtin_ia32_haddps256:
5671 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
5676 case clang::X86::BI__builtin_ia32_hsubpd:
5677 case clang::X86::BI__builtin_ia32_hsubps:
5678 case clang::X86::BI__builtin_ia32_hsubpd256:
5679 case clang::X86::BI__builtin_ia32_hsubps256:
5682 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
5684 F.subtract(RHS, RM);
5687 case clang::X86::BI__builtin_ia32_addsubpd:
5688 case clang::X86::BI__builtin_ia32_addsubps:
5689 case clang::X86::BI__builtin_ia32_addsubpd256:
5690 case clang::X86::BI__builtin_ia32_addsubps256:
5693 case clang::X86::BI__builtin_ia32_pmuldq128:
5694 case clang::X86::BI__builtin_ia32_pmuldq256:
5695 case clang::X86::BI__builtin_ia32_pmuldq512:
5700 return llvm::APIntOps::mulsExtended(LoLHS, LoRHS);
5703 case clang::X86::BI__builtin_ia32_pmuludq128:
5704 case clang::X86::BI__builtin_ia32_pmuludq256:
5705 case clang::X86::BI__builtin_ia32_pmuludq512:
5710 return llvm::APIntOps::muluExtended(LoLHS, LoRHS);
5713 case clang::X86::BI__builtin_ia32_pclmulqdq128:
5714 case clang::X86::BI__builtin_ia32_pclmulqdq256:
5715 case clang::X86::BI__builtin_ia32_pclmulqdq512:
5717 case Builtin::BI__builtin_elementwise_clmul:
5719 llvm::APIntOps::clmul);
5721 case Builtin::BI__builtin_elementwise_fma:
5725 llvm::RoundingMode RM) {
5727 F.fusedMultiplyAdd(Y, Z, RM);
5731 case X86::BI__builtin_ia32_vpmadd52luq128:
5732 case X86::BI__builtin_ia32_vpmadd52luq256:
5733 case X86::BI__builtin_ia32_vpmadd52luq512:
5736 return A + (B.trunc(52) *
C.trunc(52)).zext(64);
5738 case X86::BI__builtin_ia32_vpmadd52huq128:
5739 case X86::BI__builtin_ia32_vpmadd52huq256:
5740 case X86::BI__builtin_ia32_vpmadd52huq512:
5743 return A + llvm::APIntOps::mulhu(B.trunc(52),
C.trunc(52)).zext(64);
5746 case X86::BI__builtin_ia32_vpshldd128:
5747 case X86::BI__builtin_ia32_vpshldd256:
5748 case X86::BI__builtin_ia32_vpshldd512:
5749 case X86::BI__builtin_ia32_vpshldq128:
5750 case X86::BI__builtin_ia32_vpshldq256:
5751 case X86::BI__builtin_ia32_vpshldq512:
5752 case X86::BI__builtin_ia32_vpshldw128:
5753 case X86::BI__builtin_ia32_vpshldw256:
5754 case X86::BI__builtin_ia32_vpshldw512:
5758 return llvm::APIntOps::fshl(Hi, Lo, Amt);
5761 case X86::BI__builtin_ia32_vpshrdd128:
5762 case X86::BI__builtin_ia32_vpshrdd256:
5763 case X86::BI__builtin_ia32_vpshrdd512:
5764 case X86::BI__builtin_ia32_vpshrdq128:
5765 case X86::BI__builtin_ia32_vpshrdq256:
5766 case X86::BI__builtin_ia32_vpshrdq512:
5767 case X86::BI__builtin_ia32_vpshrdw128:
5768 case X86::BI__builtin_ia32_vpshrdw256:
5769 case X86::BI__builtin_ia32_vpshrdw512:
5774 return llvm::APIntOps::fshr(Hi, Lo, Amt);
5776 case X86::BI__builtin_ia32_vpconflictsi_128:
5777 case X86::BI__builtin_ia32_vpconflictsi_256:
5778 case X86::BI__builtin_ia32_vpconflictsi_512:
5779 case X86::BI__builtin_ia32_vpconflictdi_128:
5780 case X86::BI__builtin_ia32_vpconflictdi_256:
5781 case X86::BI__builtin_ia32_vpconflictdi_512:
5783 case X86::BI__builtin_ia32_compressdf128_mask:
5784 case X86::BI__builtin_ia32_compressdf256_mask:
5785 case X86::BI__builtin_ia32_compressdf512_mask:
5786 case X86::BI__builtin_ia32_compressdi128_mask:
5787 case X86::BI__builtin_ia32_compressdi256_mask:
5788 case X86::BI__builtin_ia32_compressdi512_mask:
5789 case X86::BI__builtin_ia32_compresshi128_mask:
5790 case X86::BI__builtin_ia32_compresshi256_mask:
5791 case X86::BI__builtin_ia32_compresshi512_mask:
5792 case X86::BI__builtin_ia32_compressqi128_mask:
5793 case X86::BI__builtin_ia32_compressqi256_mask:
5794 case X86::BI__builtin_ia32_compressqi512_mask:
5795 case X86::BI__builtin_ia32_compresssf128_mask:
5796 case X86::BI__builtin_ia32_compresssf256_mask:
5797 case X86::BI__builtin_ia32_compresssf512_mask:
5798 case X86::BI__builtin_ia32_compresssi128_mask:
5799 case X86::BI__builtin_ia32_compresssi256_mask:
5800 case X86::BI__builtin_ia32_compresssi512_mask: {
5802 Call->getArg(0)->getType()->castAs<
VectorType>()->getNumElements();
5804 S, OpPC,
Call, [NumElems](
unsigned DstIdx,
const APInt &ShuffleMask) {
5805 APInt CompressMask = ShuffleMask.trunc(NumElems);
5806 if (DstIdx < CompressMask.popcount()) {
5807 while (DstIdx != 0) {
5808 CompressMask = CompressMask & (CompressMask - 1);
5811 return std::pair<unsigned, int>{
5812 0,
static_cast<int>(CompressMask.countr_zero())};
5814 return std::pair<unsigned, int>{1,
static_cast<int>(DstIdx)};
5817 case X86::BI__builtin_ia32_expanddf128_mask:
5818 case X86::BI__builtin_ia32_expanddf256_mask:
5819 case X86::BI__builtin_ia32_expanddf512_mask:
5820 case X86::BI__builtin_ia32_expanddi128_mask:
5821 case X86::BI__builtin_ia32_expanddi256_mask:
5822 case X86::BI__builtin_ia32_expanddi512_mask:
5823 case X86::BI__builtin_ia32_expandhi128_mask:
5824 case X86::BI__builtin_ia32_expandhi256_mask:
5825 case X86::BI__builtin_ia32_expandhi512_mask:
5826 case X86::BI__builtin_ia32_expandqi128_mask:
5827 case X86::BI__builtin_ia32_expandqi256_mask:
5828 case X86::BI__builtin_ia32_expandqi512_mask:
5829 case X86::BI__builtin_ia32_expandsf128_mask:
5830 case X86::BI__builtin_ia32_expandsf256_mask:
5831 case X86::BI__builtin_ia32_expandsf512_mask:
5832 case X86::BI__builtin_ia32_expandsi128_mask:
5833 case X86::BI__builtin_ia32_expandsi256_mask:
5834 case X86::BI__builtin_ia32_expandsi512_mask: {
5836 S, OpPC,
Call, [](
unsigned DstIdx,
const APInt &ShuffleMask) {
5839 APInt ExpandMask = ShuffleMask.trunc(DstIdx + 1);
5840 if (ExpandMask[DstIdx]) {
5841 int SrcIdx = ExpandMask.popcount() - 1;
5842 return std::pair<unsigned, int>{0, SrcIdx};
5844 return std::pair<unsigned, int>{1,
static_cast<int>(DstIdx)};
5847 case clang::X86::BI__builtin_ia32_blendpd:
5848 case clang::X86::BI__builtin_ia32_blendpd256:
5849 case clang::X86::BI__builtin_ia32_blendps:
5850 case clang::X86::BI__builtin_ia32_blendps256:
5851 case clang::X86::BI__builtin_ia32_pblendw128:
5852 case clang::X86::BI__builtin_ia32_pblendw256:
5853 case clang::X86::BI__builtin_ia32_pblendd128:
5854 case clang::X86::BI__builtin_ia32_pblendd256:
5856 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5858 unsigned MaskBit = (ShuffleMask >> (DstIdx % 8)) & 0x1;
5859 unsigned SrcVecIdx = MaskBit ? 1 : 0;
5860 return std::pair<unsigned, int>{SrcVecIdx,
static_cast<int>(DstIdx)};
5865 case clang::X86::BI__builtin_ia32_blendvpd:
5866 case clang::X86::BI__builtin_ia32_blendvpd256:
5867 case clang::X86::BI__builtin_ia32_blendvps:
5868 case clang::X86::BI__builtin_ia32_blendvps256:
5872 llvm::RoundingMode) {
return C.isNegative() ?
T : F; });
5874 case clang::X86::BI__builtin_ia32_pblendvb128:
5875 case clang::X86::BI__builtin_ia32_pblendvb256:
5878 return ((
APInt)
C).isNegative() ?
T : F;
5880 case X86::BI__builtin_ia32_ptestz128:
5881 case X86::BI__builtin_ia32_ptestz256:
5882 case X86::BI__builtin_ia32_vtestzps:
5883 case X86::BI__builtin_ia32_vtestzps256:
5884 case X86::BI__builtin_ia32_vtestzpd:
5885 case X86::BI__builtin_ia32_vtestzpd256:
5888 [](
const APInt &A,
const APInt &B) {
return (A & B) == 0; });
5889 case X86::BI__builtin_ia32_ptestc128:
5890 case X86::BI__builtin_ia32_ptestc256:
5891 case X86::BI__builtin_ia32_vtestcps:
5892 case X86::BI__builtin_ia32_vtestcps256:
5893 case X86::BI__builtin_ia32_vtestcpd:
5894 case X86::BI__builtin_ia32_vtestcpd256:
5897 [](
const APInt &A,
const APInt &B) {
return (~A & B) == 0; });
5898 case X86::BI__builtin_ia32_ptestnzc128:
5899 case X86::BI__builtin_ia32_ptestnzc256:
5900 case X86::BI__builtin_ia32_vtestnzcps:
5901 case X86::BI__builtin_ia32_vtestnzcps256:
5902 case X86::BI__builtin_ia32_vtestnzcpd:
5903 case X86::BI__builtin_ia32_vtestnzcpd256:
5906 return ((A & B) != 0) && ((~A & B) != 0);
5908 case X86::BI__builtin_ia32_selectb_128:
5909 case X86::BI__builtin_ia32_selectb_256:
5910 case X86::BI__builtin_ia32_selectb_512:
5911 case X86::BI__builtin_ia32_selectw_128:
5912 case X86::BI__builtin_ia32_selectw_256:
5913 case X86::BI__builtin_ia32_selectw_512:
5914 case X86::BI__builtin_ia32_selectd_128:
5915 case X86::BI__builtin_ia32_selectd_256:
5916 case X86::BI__builtin_ia32_selectd_512:
5917 case X86::BI__builtin_ia32_selectq_128:
5918 case X86::BI__builtin_ia32_selectq_256:
5919 case X86::BI__builtin_ia32_selectq_512:
5920 case X86::BI__builtin_ia32_selectph_128:
5921 case X86::BI__builtin_ia32_selectph_256:
5922 case X86::BI__builtin_ia32_selectph_512:
5923 case X86::BI__builtin_ia32_selectpbf_128:
5924 case X86::BI__builtin_ia32_selectpbf_256:
5925 case X86::BI__builtin_ia32_selectpbf_512:
5926 case X86::BI__builtin_ia32_selectps_128:
5927 case X86::BI__builtin_ia32_selectps_256:
5928 case X86::BI__builtin_ia32_selectps_512:
5929 case X86::BI__builtin_ia32_selectpd_128:
5930 case X86::BI__builtin_ia32_selectpd_256:
5931 case X86::BI__builtin_ia32_selectpd_512:
5934 case X86::BI__builtin_ia32_shufps:
5935 case X86::BI__builtin_ia32_shufps256:
5936 case X86::BI__builtin_ia32_shufps512:
5938 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5939 unsigned NumElemPerLane = 4;
5940 unsigned NumSelectableElems = NumElemPerLane / 2;
5941 unsigned BitsPerElem = 2;
5942 unsigned IndexMask = 0x3;
5943 unsigned MaskBits = 8;
5944 unsigned Lane = DstIdx / NumElemPerLane;
5945 unsigned ElemInLane = DstIdx % NumElemPerLane;
5946 unsigned LaneOffset = Lane * NumElemPerLane;
5947 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
5948 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5949 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
5950 return std::pair<unsigned, int>{SrcIdx,
5951 static_cast<int>(LaneOffset + Index)};
5953 case X86::BI__builtin_ia32_shufpd:
5954 case X86::BI__builtin_ia32_shufpd256:
5955 case X86::BI__builtin_ia32_shufpd512:
5957 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5958 unsigned NumElemPerLane = 2;
5959 unsigned NumSelectableElems = NumElemPerLane / 2;
5960 unsigned BitsPerElem = 1;
5961 unsigned IndexMask = 0x1;
5962 unsigned MaskBits = 8;
5963 unsigned Lane = DstIdx / NumElemPerLane;
5964 unsigned ElemInLane = DstIdx % NumElemPerLane;
5965 unsigned LaneOffset = Lane * NumElemPerLane;
5966 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
5967 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5968 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
5969 return std::pair<unsigned, int>{SrcIdx,
5970 static_cast<int>(LaneOffset + Index)};
5973 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v16qi:
5974 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v32qi:
5975 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v64qi:
5977 case X86::BI__builtin_ia32_vgf2p8affineqb_v16qi:
5978 case X86::BI__builtin_ia32_vgf2p8affineqb_v32qi:
5979 case X86::BI__builtin_ia32_vgf2p8affineqb_v64qi:
5982 case X86::BI__builtin_ia32_vgf2p8mulb_v16qi:
5983 case X86::BI__builtin_ia32_vgf2p8mulb_v32qi:
5984 case X86::BI__builtin_ia32_vgf2p8mulb_v64qi:
5987 case X86::BI__builtin_ia32_bmacor16x16x16_v16hi:
5988 case X86::BI__builtin_ia32_bmacor16x16x16_v32hi:
5990 case X86::BI__builtin_ia32_bmacxor16x16x16_v16hi:
5991 case X86::BI__builtin_ia32_bmacxor16x16x16_v32hi:
5994 case X86::BI__builtin_ia32_insertps128:
5996 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Mask) {
5998 if ((Mask & (1 << DstIdx)) != 0) {
5999 return std::pair<unsigned, int>{0, -1};
6003 unsigned SrcElem = (Mask >> 6) & 0x3;
6004 unsigned DstElem = (Mask >> 4) & 0x3;
6005 if (DstIdx == DstElem) {
6007 return std::pair<unsigned, int>{1,
static_cast<int>(SrcElem)};
6010 return std::pair<unsigned, int>{0,
static_cast<int>(DstIdx)};
6013 case X86::BI__builtin_ia32_permvarsi256:
6014 case X86::BI__builtin_ia32_permvarsf256:
6015 case X86::BI__builtin_ia32_permvardf512:
6016 case X86::BI__builtin_ia32_permvardi512:
6017 case X86::BI__builtin_ia32_permvarhi128:
6019 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6020 int Offset = ShuffleMask & 0x7;
6021 return std::pair<unsigned, int>{0, Offset};
6023 case X86::BI__builtin_ia32_permvarqi128:
6024 case X86::BI__builtin_ia32_permvarhi256:
6025 case X86::BI__builtin_ia32_permvarsi512:
6026 case X86::BI__builtin_ia32_permvarsf512:
6028 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6029 int Offset = ShuffleMask & 0xF;
6030 return std::pair<unsigned, int>{0, Offset};
6032 case X86::BI__builtin_ia32_permvardi256:
6033 case X86::BI__builtin_ia32_permvardf256:
6035 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6036 int Offset = ShuffleMask & 0x3;
6037 return std::pair<unsigned, int>{0, Offset};
6039 case X86::BI__builtin_ia32_permvarqi256:
6040 case X86::BI__builtin_ia32_permvarhi512:
6042 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6043 int Offset = ShuffleMask & 0x1F;
6044 return std::pair<unsigned, int>{0, Offset};
6046 case X86::BI__builtin_ia32_permvarqi512:
6048 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6049 int Offset = ShuffleMask & 0x3F;
6050 return std::pair<unsigned, int>{0, Offset};
6052 case X86::BI__builtin_ia32_vpermi2varq128:
6053 case X86::BI__builtin_ia32_vpermi2varpd128:
6055 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6056 int Offset = ShuffleMask & 0x1;
6057 unsigned SrcIdx = (ShuffleMask >> 1) & 0x1;
6058 return std::pair<unsigned, int>{SrcIdx, Offset};
6060 case X86::BI__builtin_ia32_vpermi2vard128:
6061 case X86::BI__builtin_ia32_vpermi2varps128:
6062 case X86::BI__builtin_ia32_vpermi2varq256:
6063 case X86::BI__builtin_ia32_vpermi2varpd256:
6065 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6066 int Offset = ShuffleMask & 0x3;
6067 unsigned SrcIdx = (ShuffleMask >> 2) & 0x1;
6068 return std::pair<unsigned, int>{SrcIdx, Offset};
6070 case X86::BI__builtin_ia32_vpermi2varhi128:
6071 case X86::BI__builtin_ia32_vpermi2vard256:
6072 case X86::BI__builtin_ia32_vpermi2varps256:
6073 case X86::BI__builtin_ia32_vpermi2varq512:
6074 case X86::BI__builtin_ia32_vpermi2varpd512:
6076 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6077 int Offset = ShuffleMask & 0x7;
6078 unsigned SrcIdx = (ShuffleMask >> 3) & 0x1;
6079 return std::pair<unsigned, int>{SrcIdx, Offset};
6081 case X86::BI__builtin_ia32_vpermi2varqi128:
6082 case X86::BI__builtin_ia32_vpermi2varhi256:
6083 case X86::BI__builtin_ia32_vpermi2vard512:
6084 case X86::BI__builtin_ia32_vpermi2varps512:
6086 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6087 int Offset = ShuffleMask & 0xF;
6088 unsigned SrcIdx = (ShuffleMask >> 4) & 0x1;
6089 return std::pair<unsigned, int>{SrcIdx, Offset};
6091 case X86::BI__builtin_ia32_vpermi2varqi256:
6092 case X86::BI__builtin_ia32_vpermi2varhi512:
6094 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6095 int Offset = ShuffleMask & 0x1F;
6096 unsigned SrcIdx = (ShuffleMask >> 5) & 0x1;
6097 return std::pair<unsigned, int>{SrcIdx, Offset};
6099 case X86::BI__builtin_ia32_vpermi2varqi512:
6101 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6102 int Offset = ShuffleMask & 0x3F;
6103 unsigned SrcIdx = (ShuffleMask >> 6) & 0x1;
6104 return std::pair<unsigned, int>{SrcIdx, Offset};
6106 case X86::BI__builtin_ia32_vperm2f128_pd256:
6107 case X86::BI__builtin_ia32_vperm2f128_ps256:
6108 case X86::BI__builtin_ia32_vperm2f128_si256:
6109 case X86::BI__builtin_ia32_permti256: {
6110 unsigned NumElements =
6111 Call->getArg(0)->getType()->castAs<
VectorType>()->getNumElements();
6112 unsigned PreservedBitsCnt = NumElements >> 2;
6115 [PreservedBitsCnt](
unsigned DstIdx,
unsigned ShuffleMask) {
6116 unsigned ControlBitsCnt = DstIdx >> PreservedBitsCnt << 2;
6117 unsigned ControlBits = ShuffleMask >> ControlBitsCnt;
6119 if (ControlBits & 0b1000)
6120 return std::make_pair(0u, -1);
6122 unsigned SrcVecIdx = (ControlBits & 0b10) >> 1;
6123 unsigned PreservedBitsMask = (1 << PreservedBitsCnt) - 1;
6124 int SrcIdx = ((ControlBits & 0b1) << PreservedBitsCnt) |
6125 (DstIdx & PreservedBitsMask);
6126 return std::make_pair(SrcVecIdx, SrcIdx);
6129 case X86::BI__builtin_ia32_pshufb128:
6130 case X86::BI__builtin_ia32_pshufb256:
6131 case X86::BI__builtin_ia32_pshufb512:
6133 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6134 uint8_t Ctlb =
static_cast<uint8_t
>(ShuffleMask);
6136 return std::make_pair(0, -1);
6138 unsigned LaneBase = (DstIdx / 16) * 16;
6139 unsigned SrcOffset = Ctlb & 0x0F;
6140 unsigned SrcIdx = LaneBase + SrcOffset;
6141 return std::make_pair(0,
static_cast<int>(SrcIdx));
6144 case X86::BI__builtin_ia32_pshuflw:
6145 case X86::BI__builtin_ia32_pshuflw256:
6146 case X86::BI__builtin_ia32_pshuflw512:
6148 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6149 unsigned LaneBase = (DstIdx / 8) * 8;
6150 unsigned LaneIdx = DstIdx % 8;
6152 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
6153 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
6156 return std::make_pair(0,
static_cast<int>(DstIdx));
6159 case X86::BI__builtin_ia32_pshufhw:
6160 case X86::BI__builtin_ia32_pshufhw256:
6161 case X86::BI__builtin_ia32_pshufhw512:
6163 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6164 unsigned LaneBase = (DstIdx / 8) * 8;
6165 unsigned LaneIdx = DstIdx % 8;
6167 unsigned Sel = (ShuffleMask >> (2 * (LaneIdx - 4))) & 0x3;
6168 return std::make_pair(0,
static_cast<int>(LaneBase + 4 + Sel));
6171 return std::make_pair(0,
static_cast<int>(DstIdx));
6174 case X86::BI__builtin_ia32_pshufd:
6175 case X86::BI__builtin_ia32_pshufd256:
6176 case X86::BI__builtin_ia32_pshufd512:
6177 case X86::BI__builtin_ia32_vpermilps:
6178 case X86::BI__builtin_ia32_vpermilps256:
6179 case X86::BI__builtin_ia32_vpermilps512:
6181 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6182 unsigned LaneBase = (DstIdx / 4) * 4;
6183 unsigned LaneIdx = DstIdx % 4;
6184 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
6185 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
6188 case X86::BI__builtin_ia32_vpermilvarpd:
6189 case X86::BI__builtin_ia32_vpermilvarpd256:
6190 case X86::BI__builtin_ia32_vpermilvarpd512:
6192 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6193 unsigned NumElemPerLane = 2;
6194 unsigned Lane = DstIdx / NumElemPerLane;
6195 unsigned Offset = ShuffleMask & 0b10 ? 1 : 0;
6196 return std::make_pair(
6197 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
6200 case X86::BI__builtin_ia32_vpermilvarps:
6201 case X86::BI__builtin_ia32_vpermilvarps256:
6202 case X86::BI__builtin_ia32_vpermilvarps512:
6204 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6205 unsigned NumElemPerLane = 4;
6206 unsigned Lane = DstIdx / NumElemPerLane;
6207 unsigned Offset = ShuffleMask & 0b11;
6208 return std::make_pair(
6209 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
6212 case X86::BI__builtin_ia32_vpermilpd:
6213 case X86::BI__builtin_ia32_vpermilpd256:
6214 case X86::BI__builtin_ia32_vpermilpd512:
6216 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Control) {
6217 unsigned NumElemPerLane = 2;
6218 unsigned BitsPerElem = 1;
6219 unsigned MaskBits = 8;
6220 unsigned IndexMask = 0x1;
6221 unsigned Lane = DstIdx / NumElemPerLane;
6222 unsigned LaneOffset = Lane * NumElemPerLane;
6223 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
6224 unsigned Index = (Control >> BitIndex) & IndexMask;
6225 return std::make_pair(0,
static_cast<int>(LaneOffset + Index));
6228 case X86::BI__builtin_ia32_permdf256:
6229 case X86::BI__builtin_ia32_permdi256:
6231 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Control) {
6234 unsigned Index = (Control >> (2 * DstIdx)) & 0x3;
6235 return std::make_pair(0,
static_cast<int>(Index));
6238 case X86::BI__builtin_ia32_vpmultishiftqb128:
6239 case X86::BI__builtin_ia32_vpmultishiftqb256:
6240 case X86::BI__builtin_ia32_vpmultishiftqb512:
6242 case X86::BI__builtin_ia32_kandqi:
6243 case X86::BI__builtin_ia32_kandhi:
6244 case X86::BI__builtin_ia32_kandsi:
6245 case X86::BI__builtin_ia32_kanddi:
6248 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS & RHS; });
6250 case X86::BI__builtin_ia32_kandnqi:
6251 case X86::BI__builtin_ia32_kandnhi:
6252 case X86::BI__builtin_ia32_kandnsi:
6253 case X86::BI__builtin_ia32_kandndi:
6256 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~LHS & RHS; });
6258 case X86::BI__builtin_ia32_korqi:
6259 case X86::BI__builtin_ia32_korhi:
6260 case X86::BI__builtin_ia32_korsi:
6261 case X86::BI__builtin_ia32_kordi:
6264 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS | RHS; });
6266 case X86::BI__builtin_ia32_kxnorqi:
6267 case X86::BI__builtin_ia32_kxnorhi:
6268 case X86::BI__builtin_ia32_kxnorsi:
6269 case X86::BI__builtin_ia32_kxnordi:
6272 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~(LHS ^ RHS); });
6274 case X86::BI__builtin_ia32_kxorqi:
6275 case X86::BI__builtin_ia32_kxorhi:
6276 case X86::BI__builtin_ia32_kxorsi:
6277 case X86::BI__builtin_ia32_kxordi:
6280 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS ^ RHS; });
6282 case X86::BI__builtin_ia32_knotqi:
6283 case X86::BI__builtin_ia32_knothi:
6284 case X86::BI__builtin_ia32_knotsi:
6285 case X86::BI__builtin_ia32_knotdi:
6287 S, OpPC,
Call, [](
const APSInt &Src) {
return ~Src; });
6289 case X86::BI__builtin_ia32_kaddqi:
6290 case X86::BI__builtin_ia32_kaddhi:
6291 case X86::BI__builtin_ia32_kaddsi:
6292 case X86::BI__builtin_ia32_kadddi:
6295 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
6297 case X86::BI__builtin_ia32_kmovb:
6298 case X86::BI__builtin_ia32_kmovw:
6299 case X86::BI__builtin_ia32_kmovd:
6300 case X86::BI__builtin_ia32_kmovq:
6302 S, OpPC,
Call, [](
const APSInt &Src) {
return Src; });
6304 case X86::BI__builtin_ia32_kunpckhi:
6305 case X86::BI__builtin_ia32_kunpckdi:
6306 case X86::BI__builtin_ia32_kunpcksi:
6311 unsigned BW = A.getBitWidth();
6312 return APSInt(A.trunc(BW / 2).concat(B.trunc(BW / 2)),
6316 case X86::BI__builtin_ia32_phminposuw128:
6319 case X86::BI__builtin_ia32_psraq128:
6320 case X86::BI__builtin_ia32_psraq256:
6321 case X86::BI__builtin_ia32_psraq512:
6322 case X86::BI__builtin_ia32_psrad128:
6323 case X86::BI__builtin_ia32_psrad256:
6324 case X86::BI__builtin_ia32_psrad512:
6325 case X86::BI__builtin_ia32_psraw128:
6326 case X86::BI__builtin_ia32_psraw256:
6327 case X86::BI__builtin_ia32_psraw512:
6330 [](
const APInt &Elt, uint64_t Count) {
return Elt.ashr(Count); },
6331 [](
const APInt &Elt,
unsigned Width) {
return Elt.ashr(Width - 1); });
6333 case X86::BI__builtin_ia32_psllq128:
6334 case X86::BI__builtin_ia32_psllq256:
6335 case X86::BI__builtin_ia32_psllq512:
6336 case X86::BI__builtin_ia32_pslld128:
6337 case X86::BI__builtin_ia32_pslld256:
6338 case X86::BI__builtin_ia32_pslld512:
6339 case X86::BI__builtin_ia32_psllw128:
6340 case X86::BI__builtin_ia32_psllw256:
6341 case X86::BI__builtin_ia32_psllw512:
6344 [](
const APInt &Elt, uint64_t Count) {
return Elt.shl(Count); },
6345 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
6347 case X86::BI__builtin_ia32_psrlq128:
6348 case X86::BI__builtin_ia32_psrlq256:
6349 case X86::BI__builtin_ia32_psrlq512:
6350 case X86::BI__builtin_ia32_psrld128:
6351 case X86::BI__builtin_ia32_psrld256:
6352 case X86::BI__builtin_ia32_psrld512:
6353 case X86::BI__builtin_ia32_psrlw128:
6354 case X86::BI__builtin_ia32_psrlw256:
6355 case X86::BI__builtin_ia32_psrlw512:
6358 [](
const APInt &Elt, uint64_t Count) {
return Elt.lshr(Count); },
6359 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
6361 case X86::BI__builtin_ia32_pternlogd128_mask:
6362 case X86::BI__builtin_ia32_pternlogd256_mask:
6363 case X86::BI__builtin_ia32_pternlogd512_mask:
6364 case X86::BI__builtin_ia32_pternlogq128_mask:
6365 case X86::BI__builtin_ia32_pternlogq256_mask:
6366 case X86::BI__builtin_ia32_pternlogq512_mask:
6368 case X86::BI__builtin_ia32_pternlogd128_maskz:
6369 case X86::BI__builtin_ia32_pternlogd256_maskz:
6370 case X86::BI__builtin_ia32_pternlogd512_maskz:
6371 case X86::BI__builtin_ia32_pternlogq128_maskz:
6372 case X86::BI__builtin_ia32_pternlogq256_maskz:
6373 case X86::BI__builtin_ia32_pternlogq512_maskz:
6375 case Builtin::BI__builtin_elementwise_fshl:
6377 llvm::APIntOps::fshl);
6378 case Builtin::BI__builtin_elementwise_fshr:
6380 llvm::APIntOps::fshr);
6382 case X86::BI__builtin_ia32_shuf_f32x4_256:
6383 case X86::BI__builtin_ia32_shuf_i32x4_256:
6384 case X86::BI__builtin_ia32_shuf_f64x2_256:
6385 case X86::BI__builtin_ia32_shuf_i64x2_256:
6386 case X86::BI__builtin_ia32_shuf_f32x4:
6387 case X86::BI__builtin_ia32_shuf_i32x4:
6388 case X86::BI__builtin_ia32_shuf_f64x2:
6389 case X86::BI__builtin_ia32_shuf_i64x2: {
6395 unsigned LaneBits = 128u;
6396 unsigned NumLanes = (NumElems * ElemBits) / LaneBits;
6397 unsigned NumElemsPerLane = LaneBits / ElemBits;
6401 [NumLanes, NumElemsPerLane](
unsigned DstIdx,
unsigned ShuffleMask) {
6403 unsigned BitsPerElem = NumLanes / 2;
6404 unsigned IndexMask = (1u << BitsPerElem) - 1;
6405 unsigned Lane = DstIdx / NumElemsPerLane;
6406 unsigned SrcIdx = (Lane < NumLanes / 2) ? 0 : 1;
6407 unsigned BitIdx = BitsPerElem * Lane;
6408 unsigned SrcLaneIdx = (ShuffleMask >> BitIdx) & IndexMask;
6409 unsigned ElemInLane = DstIdx % NumElemsPerLane;
6410 unsigned IdxToPick = SrcLaneIdx * NumElemsPerLane + ElemInLane;
6411 return std::pair<unsigned, int>{SrcIdx, IdxToPick};
6415 case X86::BI__builtin_ia32_insertf32x4_256:
6416 case X86::BI__builtin_ia32_inserti32x4_256:
6417 case X86::BI__builtin_ia32_insertf64x2_256:
6418 case X86::BI__builtin_ia32_inserti64x2_256:
6419 case X86::BI__builtin_ia32_insertf32x4:
6420 case X86::BI__builtin_ia32_inserti32x4:
6421 case X86::BI__builtin_ia32_insertf64x2_512:
6422 case X86::BI__builtin_ia32_inserti64x2_512:
6423 case X86::BI__builtin_ia32_insertf32x8:
6424 case X86::BI__builtin_ia32_inserti32x8:
6425 case X86::BI__builtin_ia32_insertf64x4:
6426 case X86::BI__builtin_ia32_inserti64x4:
6427 case X86::BI__builtin_ia32_vinsertf128_ps256:
6428 case X86::BI__builtin_ia32_vinsertf128_pd256:
6429 case X86::BI__builtin_ia32_vinsertf128_si256:
6430 case X86::BI__builtin_ia32_insert128i256:
6433 case clang::X86::BI__builtin_ia32_vcvtps2ph:
6434 case clang::X86::BI__builtin_ia32_vcvtps2ph256:
6437 case X86::BI__builtin_ia32_vec_ext_v4hi:
6438 case X86::BI__builtin_ia32_vec_ext_v16qi:
6439 case X86::BI__builtin_ia32_vec_ext_v8hi:
6440 case X86::BI__builtin_ia32_vec_ext_v4si:
6441 case X86::BI__builtin_ia32_vec_ext_v2di:
6442 case X86::BI__builtin_ia32_vec_ext_v32qi:
6443 case X86::BI__builtin_ia32_vec_ext_v16hi:
6444 case X86::BI__builtin_ia32_vec_ext_v8si:
6445 case X86::BI__builtin_ia32_vec_ext_v4di:
6446 case X86::BI__builtin_ia32_vec_ext_v4sf:
6449 case X86::BI__builtin_ia32_vec_set_v4hi:
6450 case X86::BI__builtin_ia32_vec_set_v16qi:
6451 case X86::BI__builtin_ia32_vec_set_v8hi:
6452 case X86::BI__builtin_ia32_vec_set_v4si:
6453 case X86::BI__builtin_ia32_vec_set_v2di:
6454 case X86::BI__builtin_ia32_vec_set_v32qi:
6455 case X86::BI__builtin_ia32_vec_set_v16hi:
6456 case X86::BI__builtin_ia32_vec_set_v8si:
6457 case X86::BI__builtin_ia32_vec_set_v4di:
6460 case X86::BI__builtin_ia32_cvtb2mask128:
6461 case X86::BI__builtin_ia32_cvtb2mask256:
6462 case X86::BI__builtin_ia32_cvtb2mask512:
6463 case X86::BI__builtin_ia32_cvtw2mask128:
6464 case X86::BI__builtin_ia32_cvtw2mask256:
6465 case X86::BI__builtin_ia32_cvtw2mask512:
6466 case X86::BI__builtin_ia32_cvtd2mask128:
6467 case X86::BI__builtin_ia32_cvtd2mask256:
6468 case X86::BI__builtin_ia32_cvtd2mask512:
6469 case X86::BI__builtin_ia32_cvtq2mask128:
6470 case X86::BI__builtin_ia32_cvtq2mask256:
6471 case X86::BI__builtin_ia32_cvtq2mask512:
6474 case X86::BI__builtin_ia32_cvtmask2b128:
6475 case X86::BI__builtin_ia32_cvtmask2b256:
6476 case X86::BI__builtin_ia32_cvtmask2b512:
6477 case X86::BI__builtin_ia32_cvtmask2w128:
6478 case X86::BI__builtin_ia32_cvtmask2w256:
6479 case X86::BI__builtin_ia32_cvtmask2w512:
6480 case X86::BI__builtin_ia32_cvtmask2d128:
6481 case X86::BI__builtin_ia32_cvtmask2d256:
6482 case X86::BI__builtin_ia32_cvtmask2d512:
6483 case X86::BI__builtin_ia32_cvtmask2q128:
6484 case X86::BI__builtin_ia32_cvtmask2q256:
6485 case X86::BI__builtin_ia32_cvtmask2q512:
6488 case X86::BI__builtin_ia32_cvtsd2ss:
6491 case X86::BI__builtin_ia32_cvtsd2ss_round_mask:
6494 case X86::BI__builtin_ia32_cvtpd2ps:
6495 case X86::BI__builtin_ia32_cvtpd2ps256:
6497 case X86::BI__builtin_ia32_cvtpd2ps_mask:
6499 case X86::BI__builtin_ia32_cvtpd2ps512_mask:
6502 case X86::BI__builtin_ia32_cmpb128_mask:
6503 case X86::BI__builtin_ia32_cmpw128_mask:
6504 case X86::BI__builtin_ia32_cmpd128_mask:
6505 case X86::BI__builtin_ia32_cmpq128_mask:
6506 case X86::BI__builtin_ia32_cmpb256_mask:
6507 case X86::BI__builtin_ia32_cmpw256_mask:
6508 case X86::BI__builtin_ia32_cmpd256_mask:
6509 case X86::BI__builtin_ia32_cmpq256_mask:
6510 case X86::BI__builtin_ia32_cmpb512_mask:
6511 case X86::BI__builtin_ia32_cmpw512_mask:
6512 case X86::BI__builtin_ia32_cmpd512_mask:
6513 case X86::BI__builtin_ia32_cmpq512_mask:
6517 case X86::BI__builtin_ia32_ucmpb128_mask:
6518 case X86::BI__builtin_ia32_ucmpw128_mask:
6519 case X86::BI__builtin_ia32_ucmpd128_mask:
6520 case X86::BI__builtin_ia32_ucmpq128_mask:
6521 case X86::BI__builtin_ia32_ucmpb256_mask:
6522 case X86::BI__builtin_ia32_ucmpw256_mask:
6523 case X86::BI__builtin_ia32_ucmpd256_mask:
6524 case X86::BI__builtin_ia32_ucmpq256_mask:
6525 case X86::BI__builtin_ia32_ucmpb512_mask:
6526 case X86::BI__builtin_ia32_ucmpw512_mask:
6527 case X86::BI__builtin_ia32_ucmpd512_mask:
6528 case X86::BI__builtin_ia32_ucmpq512_mask:
6532 case X86::BI__builtin_ia32_vpshufbitqmb128_mask:
6533 case X86::BI__builtin_ia32_vpshufbitqmb256_mask:
6534 case X86::BI__builtin_ia32_vpshufbitqmb512_mask:
6537 case X86::BI__builtin_ia32_pslldqi128_byteshift:
6538 case X86::BI__builtin_ia32_pslldqi256_byteshift:
6539 case X86::BI__builtin_ia32_pslldqi512_byteshift:
6546 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
6547 unsigned LaneBase = (DstIdx / 16) * 16;
6548 unsigned LaneIdx = DstIdx % 16;
6549 if (LaneIdx < Shift)
6550 return std::make_pair(0, -1);
6552 return std::make_pair(0,
6553 static_cast<int>(LaneBase + LaneIdx - Shift));
6556 case X86::BI__builtin_ia32_psrldqi128_byteshift:
6557 case X86::BI__builtin_ia32_psrldqi256_byteshift:
6558 case X86::BI__builtin_ia32_psrldqi512_byteshift:
6565 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
6566 unsigned LaneBase = (DstIdx / 16) * 16;
6567 unsigned LaneIdx = DstIdx % 16;
6568 if (LaneIdx + Shift < 16)
6569 return std::make_pair(0,
6570 static_cast<int>(LaneBase + LaneIdx + Shift));
6572 return std::make_pair(0, -1);
6575 case X86::BI__builtin_ia32_palignr128:
6576 case X86::BI__builtin_ia32_palignr256:
6577 case X86::BI__builtin_ia32_palignr512:
6579 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Shift) {
6581 unsigned VecIdx = 1;
6584 int Lane = DstIdx / 16;
6585 int Offset = DstIdx % 16;
6588 unsigned ShiftedIdx = Offset + (Shift & 0xFF);
6589 if (ShiftedIdx < 16) {
6590 ElemIdx = ShiftedIdx + (Lane * 16);
6591 }
else if (ShiftedIdx < 32) {
6593 ElemIdx = (ShiftedIdx - 16) + (Lane * 16);
6596 return std::pair<unsigned, int>{VecIdx, ElemIdx};
6599 case X86::BI__builtin_ia32_alignd128:
6600 case X86::BI__builtin_ia32_alignd256:
6601 case X86::BI__builtin_ia32_alignd512:
6602 case X86::BI__builtin_ia32_alignq128:
6603 case X86::BI__builtin_ia32_alignq256:
6604 case X86::BI__builtin_ia32_alignq512: {
6605 unsigned NumElems =
Call->getType()->castAs<
VectorType>()->getNumElements();
6607 S, OpPC,
Call, [NumElems](
unsigned DstIdx,
unsigned Shift) {
6608 unsigned Imm = Shift & 0xFF;
6609 unsigned EffectiveShift = Imm & (NumElems - 1);
6610 unsigned SourcePos = DstIdx + EffectiveShift;
6611 unsigned VecIdx = SourcePos < NumElems ? 1u : 0u;
6612 unsigned ElemIdx = SourcePos & (NumElems - 1);
6613 return std::pair<unsigned, int>{VecIdx,
static_cast<int>(ElemIdx)};
6617 case clang::X86::BI__builtin_ia32_minps:
6618 case clang::X86::BI__builtin_ia32_minpd:
6619 case clang::X86::BI__builtin_ia32_minph128:
6620 case clang::X86::BI__builtin_ia32_minph256:
6621 case clang::X86::BI__builtin_ia32_minps256:
6622 case clang::X86::BI__builtin_ia32_minpd256:
6623 case clang::X86::BI__builtin_ia32_minps512:
6624 case clang::X86::BI__builtin_ia32_minpd512:
6625 case clang::X86::BI__builtin_ia32_minph512:
6629 std::optional<APSInt>) -> std::optional<APFloat> {
6630 if (A.isNaN() || A.isInfinity() || A.isDenormal() || B.isNaN() ||
6631 B.isInfinity() || B.isDenormal())
6632 return std::nullopt;
6633 if (A.isZero() && B.isZero())
6635 return llvm::minimum(A, B);
6638 case clang::X86::BI__builtin_ia32_minss:
6639 case clang::X86::BI__builtin_ia32_minsd:
6643 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
6648 case clang::X86::BI__builtin_ia32_minsd_round_mask:
6649 case clang::X86::BI__builtin_ia32_minss_round_mask:
6650 case clang::X86::BI__builtin_ia32_minsh_round_mask:
6651 case clang::X86::BI__builtin_ia32_maxsd_round_mask:
6652 case clang::X86::BI__builtin_ia32_maxss_round_mask:
6653 case clang::X86::BI__builtin_ia32_maxsh_round_mask: {
6654 bool IsMin = BuiltinID == clang::X86::BI__builtin_ia32_minsd_round_mask ||
6655 BuiltinID == clang::X86::BI__builtin_ia32_minss_round_mask ||
6656 BuiltinID == clang::X86::BI__builtin_ia32_minsh_round_mask;
6660 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
6665 case clang::X86::BI__builtin_ia32_maxps:
6666 case clang::X86::BI__builtin_ia32_maxpd:
6667 case clang::X86::BI__builtin_ia32_maxph128:
6668 case clang::X86::BI__builtin_ia32_maxph256:
6669 case clang::X86::BI__builtin_ia32_maxps256:
6670 case clang::X86::BI__builtin_ia32_maxpd256:
6671 case clang::X86::BI__builtin_ia32_maxps512:
6672 case clang::X86::BI__builtin_ia32_maxpd512:
6673 case clang::X86::BI__builtin_ia32_maxph512:
6677 std::optional<APSInt>) -> std::optional<APFloat> {
6678 if (A.isNaN() || A.isInfinity() || A.isDenormal() || B.isNaN() ||
6679 B.isInfinity() || B.isDenormal())
6680 return std::nullopt;
6681 if (A.isZero() && B.isZero())
6683 return llvm::maximum(A, B);
6686 case clang::X86::BI__builtin_ia32_maxss:
6687 case clang::X86::BI__builtin_ia32_maxsd:
6691 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
6695 case X86::BI__builtin_ia32_vpdpwssd128:
6696 case X86::BI__builtin_ia32_vpdpwssd256:
6697 case X86::BI__builtin_ia32_vpdpwssd512:
6698 case X86::BI__builtin_ia32_vpdpbusd128:
6699 case X86::BI__builtin_ia32_vpdpbusd256:
6700 case X86::BI__builtin_ia32_vpdpbusd512:
6702 case X86::BI__builtin_ia32_vpdpwssds128:
6703 case X86::BI__builtin_ia32_vpdpwssds256:
6704 case X86::BI__builtin_ia32_vpdpwssds512:
6705 case X86::BI__builtin_ia32_vpdpbusds128:
6706 case X86::BI__builtin_ia32_vpdpbusds256:
6707 case X86::BI__builtin_ia32_vpdpbusds512:
6709 case X86::BI__builtin_ia32_cvtss2si:
6710 case X86::BI__builtin_ia32_cvtsd2si:
6711 case X86::BI__builtin_ia32_cvttss2si:
6712 case X86::BI__builtin_ia32_cvttsd2si:
6713 case X86::BI__builtin_ia32_cvtss2si64:
6714 case X86::BI__builtin_ia32_cvtsd2si64:
6715 case X86::BI__builtin_ia32_cvttss2si64:
6716 case X86::BI__builtin_ia32_cvttsd2si64:
6718 case X86::BI__builtin_ia32_cvtpd2dq:
6719 case X86::BI__builtin_ia32_cvttpd2dq:
6720 case X86::BI__builtin_ia32_cvtps2dq:
6721 case X86::BI__builtin_ia32_cvtpd2dq256:
6722 case X86::BI__builtin_ia32_cvtps2dq256:
6723 case X86::BI__builtin_ia32_cvttps2dq:
6724 case X86::BI__builtin_ia32_cvttpd2dq256:
6725 case X86::BI__builtin_ia32_cvttps2dq256:
6729 diag::note_invalid_subexpr_in_const_expr)
6735 llvm_unreachable(
"Unhandled builtin ID");