4555 uint32_t BuiltinID) {
4560 switch (BuiltinID) {
4561 case Builtin::BI__builtin_is_constant_evaluated:
4564 case Builtin::BI__builtin_assume:
4565 case Builtin::BI__assume:
4568 case Builtin::BI__builtin_strcmp:
4569 case Builtin::BIstrcmp:
4570 case Builtin::BI__builtin_strncmp:
4571 case Builtin::BIstrncmp:
4572 case Builtin::BI__builtin_wcsncmp:
4573 case Builtin::BIwcsncmp:
4574 case Builtin::BI__builtin_wcscmp:
4575 case Builtin::BIwcscmp:
4578 case Builtin::BI__builtin_strlen:
4579 case Builtin::BIstrlen:
4580 case Builtin::BI__builtin_wcslen:
4581 case Builtin::BIwcslen:
4584 case Builtin::BI__builtin_nan:
4585 case Builtin::BI__builtin_nanf:
4586 case Builtin::BI__builtin_nanl:
4587 case Builtin::BI__builtin_nanf16:
4588 case Builtin::BI__builtin_nanf128:
4591 case Builtin::BI__builtin_nans:
4592 case Builtin::BI__builtin_nansf:
4593 case Builtin::BI__builtin_nansl:
4594 case Builtin::BI__builtin_nansf16:
4595 case Builtin::BI__builtin_nansf128:
4598 case Builtin::BI__builtin_huge_val:
4599 case Builtin::BI__builtin_huge_valf:
4600 case Builtin::BI__builtin_huge_vall:
4601 case Builtin::BI__builtin_huge_valf16:
4602 case Builtin::BI__builtin_huge_valf128:
4603 case Builtin::BI__builtin_inf:
4604 case Builtin::BI__builtin_inff:
4605 case Builtin::BI__builtin_infl:
4606 case Builtin::BI__builtin_inff16:
4607 case Builtin::BI__builtin_inff128:
4610 case Builtin::BI__builtin_copysign:
4611 case Builtin::BI__builtin_copysignf:
4612 case Builtin::BI__builtin_copysignl:
4613 case Builtin::BI__builtin_copysignf128:
4616 case Builtin::BI__builtin_fmin:
4617 case Builtin::BI__builtin_fminf:
4618 case Builtin::BI__builtin_fminl:
4619 case Builtin::BI__builtin_fminf16:
4620 case Builtin::BI__builtin_fminf128:
4623 case Builtin::BI__builtin_fminimum_num:
4624 case Builtin::BI__builtin_fminimum_numf:
4625 case Builtin::BI__builtin_fminimum_numl:
4626 case Builtin::BI__builtin_fminimum_numf16:
4627 case Builtin::BI__builtin_fminimum_numf128:
4630 case Builtin::BI__builtin_fmax:
4631 case Builtin::BI__builtin_fmaxf:
4632 case Builtin::BI__builtin_fmaxl:
4633 case Builtin::BI__builtin_fmaxf16:
4634 case Builtin::BI__builtin_fmaxf128:
4637 case Builtin::BI__builtin_fmaximum_num:
4638 case Builtin::BI__builtin_fmaximum_numf:
4639 case Builtin::BI__builtin_fmaximum_numl:
4640 case Builtin::BI__builtin_fmaximum_numf16:
4641 case Builtin::BI__builtin_fmaximum_numf128:
4644 case Builtin::BI__builtin_isnan:
4647 case Builtin::BI__builtin_issignaling:
4650 case Builtin::BI__builtin_isinf:
4653 case Builtin::BI__builtin_isinf_sign:
4656 case Builtin::BI__builtin_isfinite:
4659 case Builtin::BI__builtin_isnormal:
4662 case Builtin::BI__builtin_issubnormal:
4665 case Builtin::BI__builtin_iszero:
4668 case Builtin::BI__builtin_signbit:
4669 case Builtin::BI__builtin_signbitf:
4670 case Builtin::BI__builtin_signbitl:
4673 case Builtin::BI__builtin_isgreater:
4674 case Builtin::BI__builtin_isgreaterequal:
4675 case Builtin::BI__builtin_isless:
4676 case Builtin::BI__builtin_islessequal:
4677 case Builtin::BI__builtin_islessgreater:
4678 case Builtin::BI__builtin_isunordered:
4681 case Builtin::BI__builtin_isfpclass:
4684 case Builtin::BI__builtin_fpclassify:
4687 case Builtin::BI__builtin_fabs:
4688 case Builtin::BI__builtin_fabsf:
4689 case Builtin::BI__builtin_fabsl:
4690 case Builtin::BI__builtin_fabsf128:
4693 case Builtin::BI__builtin_abs:
4694 case Builtin::BI__builtin_labs:
4695 case Builtin::BI__builtin_llabs:
4698 case Builtin::BI__builtin_popcount:
4699 case Builtin::BI__builtin_popcountl:
4700 case Builtin::BI__builtin_popcountll:
4701 case Builtin::BI__builtin_popcountg:
4702 case Builtin::BI__popcnt16:
4703 case Builtin::BI__popcnt:
4704 case Builtin::BI__popcnt64:
4707 case Builtin::BI__builtin_parity:
4708 case Builtin::BI__builtin_parityl:
4709 case Builtin::BI__builtin_parityll:
4712 return APInt(Val.getBitWidth(), Val.popcount() % 2);
4714 case Builtin::BI__builtin_clrsb:
4715 case Builtin::BI__builtin_clrsbl:
4716 case Builtin::BI__builtin_clrsbll:
4719 return APInt(Val.getBitWidth(),
4720 Val.getBitWidth() - Val.getSignificantBits());
4722 case Builtin::BI__builtin_bitreverseg:
4723 case Builtin::BI__builtin_bitreverse8:
4724 case Builtin::BI__builtin_bitreverse16:
4725 case Builtin::BI__builtin_bitreverse32:
4726 case Builtin::BI__builtin_bitreverse64:
4728 S, OpPC,
Call, [](
const APSInt &Val) {
return Val.reverseBits(); });
4730 case Builtin::BI__builtin_classify_type:
4733 case Builtin::BI__builtin_expect:
4734 case Builtin::BI__builtin_expect_with_probability:
4737 case Builtin::BI__builtin_rotateleft8:
4738 case Builtin::BI__builtin_rotateleft16:
4739 case Builtin::BI__builtin_rotateleft32:
4740 case Builtin::BI__builtin_rotateleft64:
4741 case Builtin::BI__builtin_stdc_rotate_left:
4742 case Builtin::BIstdc_rotate_left_uc:
4743 case Builtin::BIstdc_rotate_left_us:
4744 case Builtin::BIstdc_rotate_left_ui:
4745 case Builtin::BIstdc_rotate_left_ul:
4746 case Builtin::BIstdc_rotate_left_ull:
4747 case Builtin::BI_rotl8:
4748 case Builtin::BI_rotl16:
4749 case Builtin::BI_rotl:
4750 case Builtin::BI_lrotl:
4751 case Builtin::BI_rotl64:
4752 case Builtin::BI__builtin_rotateright8:
4753 case Builtin::BI__builtin_rotateright16:
4754 case Builtin::BI__builtin_rotateright32:
4755 case Builtin::BI__builtin_rotateright64:
4756 case Builtin::BI__builtin_stdc_rotate_right:
4757 case Builtin::BIstdc_rotate_right_uc:
4758 case Builtin::BIstdc_rotate_right_us:
4759 case Builtin::BIstdc_rotate_right_ui:
4760 case Builtin::BIstdc_rotate_right_ul:
4761 case Builtin::BIstdc_rotate_right_ull:
4762 case Builtin::BI_rotr8:
4763 case Builtin::BI_rotr16:
4764 case Builtin::BI_rotr:
4765 case Builtin::BI_lrotr:
4766 case Builtin::BI_rotr64: {
4769 switch (BuiltinID) {
4770 case Builtin::BI__builtin_rotateright8:
4771 case Builtin::BI__builtin_rotateright16:
4772 case Builtin::BI__builtin_rotateright32:
4773 case Builtin::BI__builtin_rotateright64:
4774 case Builtin::BI__builtin_stdc_rotate_right:
4775 case Builtin::BIstdc_rotate_right_uc:
4776 case Builtin::BIstdc_rotate_right_us:
4777 case Builtin::BIstdc_rotate_right_ui:
4778 case Builtin::BIstdc_rotate_right_ul:
4779 case Builtin::BIstdc_rotate_right_ull:
4780 case Builtin::BI_rotr8:
4781 case Builtin::BI_rotr16:
4782 case Builtin::BI_rotr:
4783 case Builtin::BI_lrotr:
4784 case Builtin::BI_rotr64:
4785 IsRotateRight =
true;
4788 IsRotateRight =
false;
4795 return IsRotateRight ?
Value.rotr(Amount.getZExtValue())
4796 :
Value.rotl(Amount.getZExtValue());
4800 case Builtin::BIstdc_leading_zeros_uc:
4801 case Builtin::BIstdc_leading_zeros_us:
4802 case Builtin::BIstdc_leading_zeros_ui:
4803 case Builtin::BIstdc_leading_zeros_ul:
4804 case Builtin::BIstdc_leading_zeros_ull:
4805 case Builtin::BI__builtin_stdc_leading_zeros: {
4808 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4809 return APInt(ResWidth, Val.countl_zero());
4813 case Builtin::BIstdc_leading_ones_uc:
4814 case Builtin::BIstdc_leading_ones_us:
4815 case Builtin::BIstdc_leading_ones_ui:
4816 case Builtin::BIstdc_leading_ones_ul:
4817 case Builtin::BIstdc_leading_ones_ull:
4818 case Builtin::BI__builtin_stdc_leading_ones: {
4821 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4822 return APInt(ResWidth, Val.countl_one());
4826 case Builtin::BIstdc_trailing_zeros_uc:
4827 case Builtin::BIstdc_trailing_zeros_us:
4828 case Builtin::BIstdc_trailing_zeros_ui:
4829 case Builtin::BIstdc_trailing_zeros_ul:
4830 case Builtin::BIstdc_trailing_zeros_ull:
4831 case Builtin::BI__builtin_stdc_trailing_zeros: {
4834 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4835 return APInt(ResWidth, Val.countr_zero());
4839 case Builtin::BIstdc_trailing_ones_uc:
4840 case Builtin::BIstdc_trailing_ones_us:
4841 case Builtin::BIstdc_trailing_ones_ui:
4842 case Builtin::BIstdc_trailing_ones_ul:
4843 case Builtin::BIstdc_trailing_ones_ull:
4844 case Builtin::BI__builtin_stdc_trailing_ones: {
4847 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4848 return APInt(ResWidth, Val.countr_one());
4852 case Builtin::BIstdc_first_leading_zero_uc:
4853 case Builtin::BIstdc_first_leading_zero_us:
4854 case Builtin::BIstdc_first_leading_zero_ui:
4855 case Builtin::BIstdc_first_leading_zero_ul:
4856 case Builtin::BIstdc_first_leading_zero_ull:
4857 case Builtin::BI__builtin_stdc_first_leading_zero: {
4860 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4861 return APInt(ResWidth, Val.isAllOnes() ? 0 : Val.countl_one() + 1);
4865 case Builtin::BIstdc_first_leading_one_uc:
4866 case Builtin::BIstdc_first_leading_one_us:
4867 case Builtin::BIstdc_first_leading_one_ui:
4868 case Builtin::BIstdc_first_leading_one_ul:
4869 case Builtin::BIstdc_first_leading_one_ull:
4870 case Builtin::BI__builtin_stdc_first_leading_one: {
4873 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4874 return APInt(ResWidth, Val.isZero() ? 0 : Val.countl_zero() + 1);
4878 case Builtin::BIstdc_first_trailing_zero_uc:
4879 case Builtin::BIstdc_first_trailing_zero_us:
4880 case Builtin::BIstdc_first_trailing_zero_ui:
4881 case Builtin::BIstdc_first_trailing_zero_ul:
4882 case Builtin::BIstdc_first_trailing_zero_ull:
4883 case Builtin::BI__builtin_stdc_first_trailing_zero: {
4886 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4887 return APInt(ResWidth, Val.isAllOnes() ? 0 : Val.countr_one() + 1);
4891 case Builtin::BIstdc_first_trailing_one_uc:
4892 case Builtin::BIstdc_first_trailing_one_us:
4893 case Builtin::BIstdc_first_trailing_one_ui:
4894 case Builtin::BIstdc_first_trailing_one_ul:
4895 case Builtin::BIstdc_first_trailing_one_ull:
4896 case Builtin::BI__builtin_stdc_first_trailing_one: {
4899 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4900 return APInt(ResWidth, Val.isZero() ? 0 : Val.countr_zero() + 1);
4904 case Builtin::BIstdc_count_zeros_uc:
4905 case Builtin::BIstdc_count_zeros_us:
4906 case Builtin::BIstdc_count_zeros_ui:
4907 case Builtin::BIstdc_count_zeros_ul:
4908 case Builtin::BIstdc_count_zeros_ull:
4909 case Builtin::BI__builtin_stdc_count_zeros: {
4912 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4913 unsigned BitWidth = Val.getBitWidth();
4914 return APInt(ResWidth, BitWidth - Val.popcount());
4918 case Builtin::BIstdc_count_ones_uc:
4919 case Builtin::BIstdc_count_ones_us:
4920 case Builtin::BIstdc_count_ones_ui:
4921 case Builtin::BIstdc_count_ones_ul:
4922 case Builtin::BIstdc_count_ones_ull:
4923 case Builtin::BI__builtin_stdc_count_ones: {
4926 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4927 return APInt(ResWidth, Val.popcount());
4931 case Builtin::BIstdc_has_single_bit_uc:
4932 case Builtin::BIstdc_has_single_bit_us:
4933 case Builtin::BIstdc_has_single_bit_ui:
4934 case Builtin::BIstdc_has_single_bit_ul:
4935 case Builtin::BIstdc_has_single_bit_ull:
4936 case Builtin::BI__builtin_stdc_has_single_bit: {
4939 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4940 return APInt(ResWidth, Val.popcount() == 1 ? 1 : 0);
4944 case Builtin::BIstdc_bit_width_uc:
4945 case Builtin::BIstdc_bit_width_us:
4946 case Builtin::BIstdc_bit_width_ui:
4947 case Builtin::BIstdc_bit_width_ul:
4948 case Builtin::BIstdc_bit_width_ull:
4949 case Builtin::BI__builtin_stdc_bit_width: {
4952 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4953 unsigned BitWidth = Val.getBitWidth();
4954 return APInt(ResWidth, BitWidth - Val.countl_zero());
4958 case Builtin::BIstdc_bit_floor_uc:
4959 case Builtin::BIstdc_bit_floor_us:
4960 case Builtin::BIstdc_bit_floor_ui:
4961 case Builtin::BIstdc_bit_floor_ul:
4962 case Builtin::BIstdc_bit_floor_ull:
4963 case Builtin::BI__builtin_stdc_bit_floor:
4966 unsigned BitWidth = Val.getBitWidth();
4968 return APInt::getZero(BitWidth);
4969 return APInt::getOneBitSet(BitWidth,
4970 BitWidth - Val.countl_zero() - 1);
4973 case Builtin::BIstdc_bit_ceil_uc:
4974 case Builtin::BIstdc_bit_ceil_us:
4975 case Builtin::BIstdc_bit_ceil_ui:
4976 case Builtin::BIstdc_bit_ceil_ul:
4977 case Builtin::BIstdc_bit_ceil_ull:
4978 case Builtin::BI__builtin_stdc_bit_ceil:
4981 unsigned BitWidth = Val.getBitWidth();
4983 return APInt(BitWidth, 1);
4985 APInt ValMinusOne =
V - 1;
4986 unsigned LeadingZeros = ValMinusOne.countl_zero();
4987 if (LeadingZeros == 0)
4988 return APInt(BitWidth, 0);
4989 return APInt::getOneBitSet(BitWidth, BitWidth - LeadingZeros);
4992 case Builtin::BI__builtin_ffs:
4993 case Builtin::BI__builtin_ffsl:
4994 case Builtin::BI__builtin_ffsll:
4997 return APInt(Val.getBitWidth(),
4998 Val.isZero() ? 0u : Val.countTrailingZeros() + 1u);
5001 case Builtin::BIaddressof:
5002 case Builtin::BI__addressof:
5003 case Builtin::BI__builtin_addressof:
5007 case Builtin::BIas_const:
5008 case Builtin::BIforward:
5009 case Builtin::BIforward_like:
5010 case Builtin::BImove:
5011 case Builtin::BImove_if_noexcept:
5015 case Builtin::BI__builtin_eh_return_data_regno:
5018 case Builtin::BI__builtin_launder:
5022 case Builtin::BI__builtin_add_overflow:
5023 case Builtin::BI__builtin_sub_overflow:
5024 case Builtin::BI__builtin_mul_overflow:
5025 case Builtin::BI__builtin_sadd_overflow:
5026 case Builtin::BI__builtin_uadd_overflow:
5027 case Builtin::BI__builtin_uaddl_overflow:
5028 case Builtin::BI__builtin_uaddll_overflow:
5029 case Builtin::BI__builtin_usub_overflow:
5030 case Builtin::BI__builtin_usubl_overflow:
5031 case Builtin::BI__builtin_usubll_overflow:
5032 case Builtin::BI__builtin_umul_overflow:
5033 case Builtin::BI__builtin_umull_overflow:
5034 case Builtin::BI__builtin_umulll_overflow:
5035 case Builtin::BI__builtin_saddl_overflow:
5036 case Builtin::BI__builtin_saddll_overflow:
5037 case Builtin::BI__builtin_ssub_overflow:
5038 case Builtin::BI__builtin_ssubl_overflow:
5039 case Builtin::BI__builtin_ssubll_overflow:
5040 case Builtin::BI__builtin_smul_overflow:
5041 case Builtin::BI__builtin_smull_overflow:
5042 case Builtin::BI__builtin_smulll_overflow:
5045 case Builtin::BI__builtin_addcb:
5046 case Builtin::BI__builtin_addcs:
5047 case Builtin::BI__builtin_addc:
5048 case Builtin::BI__builtin_addcl:
5049 case Builtin::BI__builtin_addcll:
5050 case Builtin::BI__builtin_subcb:
5051 case Builtin::BI__builtin_subcs:
5052 case Builtin::BI__builtin_subc:
5053 case Builtin::BI__builtin_subcl:
5054 case Builtin::BI__builtin_subcll:
5057 case Builtin::BI__builtin_clz:
5058 case Builtin::BI__builtin_clzl:
5059 case Builtin::BI__builtin_clzll:
5060 case Builtin::BI__builtin_clzs:
5061 case Builtin::BI__builtin_clzg:
5062 case Builtin::BI__lzcnt16:
5063 case Builtin::BI__lzcnt:
5064 case Builtin::BI__lzcnt64:
5067 case Builtin::BI__builtin_ctz:
5068 case Builtin::BI__builtin_ctzl:
5069 case Builtin::BI__builtin_ctzll:
5070 case Builtin::BI__builtin_ctzs:
5071 case Builtin::BI__builtin_ctzg:
5074 case Builtin::BI__builtin_elementwise_clzg:
5075 case Builtin::BI__builtin_elementwise_ctzg:
5078 case Builtin::BI__builtin_bswapg:
5079 case Builtin::BI__builtin_bswap16:
5080 case Builtin::BI__builtin_bswap32:
5081 case Builtin::BI__builtin_bswap64:
5082 case Builtin::BIstdc_memreverse8u8:
5083 case Builtin::BIstdc_memreverse8u16:
5084 case Builtin::BIstdc_memreverse8u32:
5085 case Builtin::BIstdc_memreverse8u64:
5088 case Builtin::BI__atomic_always_lock_free:
5089 case Builtin::BI__atomic_is_lock_free:
5092 case Builtin::BI__c11_atomic_is_lock_free:
5095 case Builtin::BI__builtin_complex:
5098 case Builtin::BI__builtin_is_aligned:
5099 case Builtin::BI__builtin_align_up:
5100 case Builtin::BI__builtin_align_down:
5103 case Builtin::BI__builtin_assume_aligned:
5106 case clang::X86::BI__builtin_ia32_crc32qi:
5108 case clang::X86::BI__builtin_ia32_crc32hi:
5110 case clang::X86::BI__builtin_ia32_crc32si:
5112 case clang::X86::BI__builtin_ia32_crc32di:
5115 case clang::X86::BI__builtin_ia32_bextr_u32:
5116 case clang::X86::BI__builtin_ia32_bextr_u64:
5117 case clang::X86::BI__builtin_ia32_bextri_u32:
5118 case clang::X86::BI__builtin_ia32_bextri_u64:
5121 unsigned BitWidth = Val.getBitWidth();
5122 uint64_t Shift = Idx.extractBitsAsZExtValue(8, 0);
5123 uint64_t Length = Idx.extractBitsAsZExtValue(8, 8);
5124 if (Length > BitWidth) {
5129 if (Length == 0 || Shift >= BitWidth)
5130 return APInt(BitWidth, 0);
5132 uint64_t
Result = Val.getZExtValue() >> Shift;
5133 Result &= llvm::maskTrailingOnes<uint64_t>(Length);
5137 case clang::X86::BI__builtin_ia32_bzhi_si:
5138 case clang::X86::BI__builtin_ia32_bzhi_di:
5141 unsigned BitWidth = Val.getBitWidth();
5142 uint64_t Index = Idx.extractBitsAsZExtValue(8, 0);
5145 if (Index < BitWidth)
5146 Result.clearHighBits(BitWidth - Index);
5151 case clang::X86::BI__builtin_ia32_ktestcqi:
5152 case clang::X86::BI__builtin_ia32_ktestchi:
5153 case clang::X86::BI__builtin_ia32_ktestcsi:
5154 case clang::X86::BI__builtin_ia32_ktestcdi:
5157 return APInt(
sizeof(
unsigned char) * 8, (~A & B) == 0);
5160 case clang::X86::BI__builtin_ia32_ktestzqi:
5161 case clang::X86::BI__builtin_ia32_ktestzhi:
5162 case clang::X86::BI__builtin_ia32_ktestzsi:
5163 case clang::X86::BI__builtin_ia32_ktestzdi:
5166 return APInt(
sizeof(
unsigned char) * 8, (A & B) == 0);
5169 case clang::X86::BI__builtin_ia32_kortestcqi:
5170 case clang::X86::BI__builtin_ia32_kortestchi:
5171 case clang::X86::BI__builtin_ia32_kortestcsi:
5172 case clang::X86::BI__builtin_ia32_kortestcdi:
5175 return APInt(
sizeof(
unsigned char) * 8, ~(A | B) == 0);
5178 case clang::X86::BI__builtin_ia32_kortestzqi:
5179 case clang::X86::BI__builtin_ia32_kortestzhi:
5180 case clang::X86::BI__builtin_ia32_kortestzsi:
5181 case clang::X86::BI__builtin_ia32_kortestzdi:
5184 return APInt(
sizeof(
unsigned char) * 8, (A | B) == 0);
5187 case clang::X86::BI__builtin_ia32_kshiftliqi:
5188 case clang::X86::BI__builtin_ia32_kshiftlihi:
5189 case clang::X86::BI__builtin_ia32_kshiftlisi:
5190 case clang::X86::BI__builtin_ia32_kshiftlidi:
5193 unsigned Amt = RHS.getZExtValue() & 0xFF;
5194 if (Amt >= LHS.getBitWidth())
5195 return APInt::getZero(LHS.getBitWidth());
5196 return LHS.shl(Amt);
5199 case clang::X86::BI__builtin_ia32_kshiftriqi:
5200 case clang::X86::BI__builtin_ia32_kshiftrihi:
5201 case clang::X86::BI__builtin_ia32_kshiftrisi:
5202 case clang::X86::BI__builtin_ia32_kshiftridi:
5205 unsigned Amt = RHS.getZExtValue() & 0xFF;
5206 if (Amt >= LHS.getBitWidth())
5207 return APInt::getZero(LHS.getBitWidth());
5208 return LHS.lshr(Amt);
5211 case clang::X86::BI__builtin_ia32_lzcnt_u16:
5212 case clang::X86::BI__builtin_ia32_lzcnt_u32:
5213 case clang::X86::BI__builtin_ia32_lzcnt_u64:
5216 return APInt(Src.getBitWidth(), Src.countLeadingZeros());
5219 case clang::X86::BI__builtin_ia32_tzcnt_u16:
5220 case clang::X86::BI__builtin_ia32_tzcnt_u32:
5221 case clang::X86::BI__builtin_ia32_tzcnt_u64:
5224 return APInt(Src.getBitWidth(), Src.countTrailingZeros());
5227 case clang::X86::BI__builtin_ia32_pdep_si:
5228 case clang::X86::BI__builtin_ia32_pdep_di:
5229 case Builtin::BI__builtin_elementwise_pdep:
5231 llvm::APIntOps::pdep);
5233 case clang::X86::BI__builtin_ia32_pext_si:
5234 case clang::X86::BI__builtin_ia32_pext_di:
5235 case Builtin::BI__builtin_elementwise_pext:
5237 llvm::APIntOps::pext);
5239 case clang::X86::BI__builtin_ia32_addcarryx_u32:
5240 case clang::X86::BI__builtin_ia32_addcarryx_u64:
5244 case clang::X86::BI__builtin_ia32_subborrow_u32:
5245 case clang::X86::BI__builtin_ia32_subborrow_u64:
5249 case Builtin::BI__builtin_os_log_format_buffer_size:
5252 case Builtin::BI__builtin_ptrauth_string_discriminator:
5255 case Builtin::BI__builtin_infer_alloc_token:
5258 case Builtin::BI__noop:
5262 case Builtin::BI__builtin_operator_new:
5265 case Builtin::BI__builtin_operator_delete:
5268 case Builtin::BI__arithmetic_fence:
5271 case Builtin::BI__builtin_reduce_add:
5272 case Builtin::BI__builtin_reduce_mul:
5273 case Builtin::BI__builtin_reduce_and:
5274 case Builtin::BI__builtin_reduce_or:
5275 case Builtin::BI__builtin_reduce_xor:
5276 case Builtin::BI__builtin_reduce_min:
5277 case Builtin::BI__builtin_reduce_max:
5280 case Builtin::BI__builtin_elementwise_popcount:
5283 return APInt(Src.getBitWidth(), Src.popcount());
5285 case Builtin::BI__builtin_elementwise_bitreverse:
5287 S, OpPC,
Call, [](
const APSInt &Src) {
return Src.reverseBits(); });
5289 case Builtin::BI__builtin_elementwise_abs:
5292 case Builtin::BI__builtin_memcpy:
5293 case Builtin::BImemcpy:
5294 case Builtin::BI__builtin_wmemcpy:
5295 case Builtin::BIwmemcpy:
5296 case Builtin::BI__builtin_memmove:
5297 case Builtin::BImemmove:
5298 case Builtin::BI__builtin_wmemmove:
5299 case Builtin::BIwmemmove:
5302 case Builtin::BI__builtin_memcmp:
5303 case Builtin::BImemcmp:
5304 case Builtin::BI__builtin_bcmp:
5305 case Builtin::BIbcmp:
5306 case Builtin::BI__builtin_wmemcmp:
5307 case Builtin::BIwmemcmp:
5310 case Builtin::BImemchr:
5311 case Builtin::BI__builtin_memchr:
5312 case Builtin::BIstrchr:
5313 case Builtin::BI__builtin_strchr:
5314 case Builtin::BIwmemchr:
5315 case Builtin::BI__builtin_wmemchr:
5316 case Builtin::BIwcschr:
5317 case Builtin::BI__builtin_wcschr:
5318 case Builtin::BI__builtin_char_memchr:
5321 case Builtin::BI__builtin_object_size:
5322 case Builtin::BI__builtin_dynamic_object_size:
5325 case Builtin::BI__builtin_is_within_lifetime:
5328 case Builtin::BI__builtin_elementwise_add_sat:
5331 return LHS.isSigned() ? LHS.sadd_sat(RHS) : LHS.uadd_sat(RHS);
5334 case Builtin::BI__builtin_elementwise_sub_sat:
5337 return LHS.isSigned() ? LHS.ssub_sat(RHS) : LHS.usub_sat(RHS);
5339 case X86::BI__builtin_ia32_extract128i256:
5340 case X86::BI__builtin_ia32_vextractf128_pd256:
5341 case X86::BI__builtin_ia32_vextractf128_ps256:
5342 case X86::BI__builtin_ia32_vextractf128_si256:
5345 case X86::BI__builtin_ia32_extractf32x4_256_mask:
5346 case X86::BI__builtin_ia32_extractf32x4_mask:
5347 case X86::BI__builtin_ia32_extractf32x8_mask:
5348 case X86::BI__builtin_ia32_extractf64x2_256_mask:
5349 case X86::BI__builtin_ia32_extractf64x2_512_mask:
5350 case X86::BI__builtin_ia32_extractf64x4_mask:
5351 case X86::BI__builtin_ia32_extracti32x4_256_mask:
5352 case X86::BI__builtin_ia32_extracti32x4_mask:
5353 case X86::BI__builtin_ia32_extracti32x8_mask:
5354 case X86::BI__builtin_ia32_extracti64x2_256_mask:
5355 case X86::BI__builtin_ia32_extracti64x2_512_mask:
5356 case X86::BI__builtin_ia32_extracti64x4_mask:
5359 case clang::X86::BI__builtin_ia32_pmulhrsw128:
5360 case clang::X86::BI__builtin_ia32_pmulhrsw256:
5361 case clang::X86::BI__builtin_ia32_pmulhrsw512:
5364 return (llvm::APIntOps::mulsExtended(LHS, RHS).ashr(14) + 1)
5365 .extractBits(16, 1);
5368 case clang::X86::BI__builtin_ia32_movmskps:
5369 case clang::X86::BI__builtin_ia32_movmskpd:
5370 case clang::X86::BI__builtin_ia32_pmovmskb128:
5371 case clang::X86::BI__builtin_ia32_pmovmskb256:
5372 case clang::X86::BI__builtin_ia32_movmskps256:
5373 case clang::X86::BI__builtin_ia32_movmskpd256: {
5377 case X86::BI__builtin_ia32_psignb128:
5378 case X86::BI__builtin_ia32_psignb256:
5379 case X86::BI__builtin_ia32_psignw128:
5380 case X86::BI__builtin_ia32_psignw256:
5381 case X86::BI__builtin_ia32_psignd128:
5382 case X86::BI__builtin_ia32_psignd256:
5386 return APInt::getZero(AElem.getBitWidth());
5387 if (BElem.isNegative())
5392 case clang::X86::BI__builtin_ia32_pavgb128:
5393 case clang::X86::BI__builtin_ia32_pavgw128:
5394 case clang::X86::BI__builtin_ia32_pavgb256:
5395 case clang::X86::BI__builtin_ia32_pavgw256:
5396 case clang::X86::BI__builtin_ia32_pavgb512:
5397 case clang::X86::BI__builtin_ia32_pavgw512:
5399 llvm::APIntOps::avgCeilU);
5401 case clang::X86::BI__builtin_ia32_pmaddubsw128:
5402 case clang::X86::BI__builtin_ia32_pmaddubsw256:
5403 case clang::X86::BI__builtin_ia32_pmaddubsw512:
5408 unsigned BitWidth = 2 * LoLHS.getBitWidth();
5409 return (LoLHS.zext(BitWidth) * LoRHS.sext(BitWidth))
5410 .sadd_sat((HiLHS.zext(BitWidth) * HiRHS.sext(BitWidth)));
5413 case clang::X86::BI__builtin_ia32_pmaddwd128:
5414 case clang::X86::BI__builtin_ia32_pmaddwd256:
5415 case clang::X86::BI__builtin_ia32_pmaddwd512:
5420 unsigned BitWidth = 2 * LoLHS.getBitWidth();
5421 return (LoLHS.sext(BitWidth) * LoRHS.sext(BitWidth)) +
5422 (HiLHS.sext(BitWidth) * HiRHS.sext(BitWidth));
5425 case clang::X86::BI__builtin_ia32_dbpsadbw128:
5426 case clang::X86::BI__builtin_ia32_dbpsadbw256:
5427 case clang::X86::BI__builtin_ia32_dbpsadbw512:
5430 case clang::X86::BI__builtin_ia32_mpsadbw128:
5431 case clang::X86::BI__builtin_ia32_mpsadbw256:
5434 case clang::X86::BI__builtin_ia32_pmulhuw128:
5435 case clang::X86::BI__builtin_ia32_pmulhuw256:
5436 case clang::X86::BI__builtin_ia32_pmulhuw512:
5438 llvm::APIntOps::mulhu);
5440 case clang::X86::BI__builtin_ia32_pmulhw128:
5441 case clang::X86::BI__builtin_ia32_pmulhw256:
5442 case clang::X86::BI__builtin_ia32_pmulhw512:
5444 llvm::APIntOps::mulhs);
5446 case clang::X86::BI__builtin_ia32_psllv2di:
5447 case clang::X86::BI__builtin_ia32_psllv4di:
5448 case clang::X86::BI__builtin_ia32_psllv4si:
5449 case clang::X86::BI__builtin_ia32_psllv8di:
5450 case clang::X86::BI__builtin_ia32_psllv8hi:
5451 case clang::X86::BI__builtin_ia32_psllv8si:
5452 case clang::X86::BI__builtin_ia32_psllv16hi:
5453 case clang::X86::BI__builtin_ia32_psllv16si:
5454 case clang::X86::BI__builtin_ia32_psllv32hi:
5455 case clang::X86::BI__builtin_ia32_psllwi128:
5456 case clang::X86::BI__builtin_ia32_psllwi256:
5457 case clang::X86::BI__builtin_ia32_psllwi512:
5458 case clang::X86::BI__builtin_ia32_pslldi128:
5459 case clang::X86::BI__builtin_ia32_pslldi256:
5460 case clang::X86::BI__builtin_ia32_pslldi512:
5461 case clang::X86::BI__builtin_ia32_psllqi128:
5462 case clang::X86::BI__builtin_ia32_psllqi256:
5463 case clang::X86::BI__builtin_ia32_psllqi512:
5466 if (RHS.uge(LHS.getBitWidth())) {
5467 return APInt::getZero(LHS.getBitWidth());
5469 return LHS.shl(RHS.getZExtValue());
5472 case clang::X86::BI__builtin_ia32_psrav4si:
5473 case clang::X86::BI__builtin_ia32_psrav8di:
5474 case clang::X86::BI__builtin_ia32_psrav8hi:
5475 case clang::X86::BI__builtin_ia32_psrav8si:
5476 case clang::X86::BI__builtin_ia32_psrav16hi:
5477 case clang::X86::BI__builtin_ia32_psrav16si:
5478 case clang::X86::BI__builtin_ia32_psrav32hi:
5479 case clang::X86::BI__builtin_ia32_psravq128:
5480 case clang::X86::BI__builtin_ia32_psravq256:
5481 case clang::X86::BI__builtin_ia32_psrawi128:
5482 case clang::X86::BI__builtin_ia32_psrawi256:
5483 case clang::X86::BI__builtin_ia32_psrawi512:
5484 case clang::X86::BI__builtin_ia32_psradi128:
5485 case clang::X86::BI__builtin_ia32_psradi256:
5486 case clang::X86::BI__builtin_ia32_psradi512:
5487 case clang::X86::BI__builtin_ia32_psraqi128:
5488 case clang::X86::BI__builtin_ia32_psraqi256:
5489 case clang::X86::BI__builtin_ia32_psraqi512:
5492 if (RHS.uge(LHS.getBitWidth())) {
5493 return LHS.ashr(LHS.getBitWidth() - 1);
5495 return LHS.ashr(RHS.getZExtValue());
5498 case clang::X86::BI__builtin_ia32_psrlv2di:
5499 case clang::X86::BI__builtin_ia32_psrlv4di:
5500 case clang::X86::BI__builtin_ia32_psrlv4si:
5501 case clang::X86::BI__builtin_ia32_psrlv8di:
5502 case clang::X86::BI__builtin_ia32_psrlv8hi:
5503 case clang::X86::BI__builtin_ia32_psrlv8si:
5504 case clang::X86::BI__builtin_ia32_psrlv16hi:
5505 case clang::X86::BI__builtin_ia32_psrlv16si:
5506 case clang::X86::BI__builtin_ia32_psrlv32hi:
5507 case clang::X86::BI__builtin_ia32_psrlwi128:
5508 case clang::X86::BI__builtin_ia32_psrlwi256:
5509 case clang::X86::BI__builtin_ia32_psrlwi512:
5510 case clang::X86::BI__builtin_ia32_psrldi128:
5511 case clang::X86::BI__builtin_ia32_psrldi256:
5512 case clang::X86::BI__builtin_ia32_psrldi512:
5513 case clang::X86::BI__builtin_ia32_psrlqi128:
5514 case clang::X86::BI__builtin_ia32_psrlqi256:
5515 case clang::X86::BI__builtin_ia32_psrlqi512:
5518 if (RHS.uge(LHS.getBitWidth())) {
5519 return APInt::getZero(LHS.getBitWidth());
5521 return LHS.lshr(RHS.getZExtValue());
5523 case clang::X86::BI__builtin_ia32_packsswb128:
5524 case clang::X86::BI__builtin_ia32_packsswb256:
5525 case clang::X86::BI__builtin_ia32_packsswb512:
5526 case clang::X86::BI__builtin_ia32_packssdw128:
5527 case clang::X86::BI__builtin_ia32_packssdw256:
5528 case clang::X86::BI__builtin_ia32_packssdw512:
5530 return APInt(Src).truncSSat(Src.getBitWidth() / 2);
5532 case clang::X86::BI__builtin_ia32_packusdw128:
5533 case clang::X86::BI__builtin_ia32_packusdw256:
5534 case clang::X86::BI__builtin_ia32_packusdw512:
5535 case clang::X86::BI__builtin_ia32_packuswb128:
5536 case clang::X86::BI__builtin_ia32_packuswb256:
5537 case clang::X86::BI__builtin_ia32_packuswb512:
5539 return APInt(Src).truncSSatU(Src.getBitWidth() / 2);
5542 case clang::X86::BI__builtin_ia32_selectss_128:
5543 case clang::X86::BI__builtin_ia32_selectsd_128:
5544 case clang::X86::BI__builtin_ia32_selectsh_128:
5545 case clang::X86::BI__builtin_ia32_selectsbf_128:
5547 case clang::X86::BI__builtin_ia32_vprotbi:
5548 case clang::X86::BI__builtin_ia32_vprotdi:
5549 case clang::X86::BI__builtin_ia32_vprotqi:
5550 case clang::X86::BI__builtin_ia32_vprotwi:
5551 case clang::X86::BI__builtin_ia32_prold128:
5552 case clang::X86::BI__builtin_ia32_prold256:
5553 case clang::X86::BI__builtin_ia32_prold512:
5554 case clang::X86::BI__builtin_ia32_prolq128:
5555 case clang::X86::BI__builtin_ia32_prolq256:
5556 case clang::X86::BI__builtin_ia32_prolq512:
5559 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotl(RHS); });
5561 case clang::X86::BI__builtin_ia32_prord128:
5562 case clang::X86::BI__builtin_ia32_prord256:
5563 case clang::X86::BI__builtin_ia32_prord512:
5564 case clang::X86::BI__builtin_ia32_prorq128:
5565 case clang::X86::BI__builtin_ia32_prorq256:
5566 case clang::X86::BI__builtin_ia32_prorq512:
5569 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotr(RHS); });
5571 case Builtin::BI__builtin_elementwise_max:
5572 case Builtin::BI__builtin_elementwise_min:
5575 case clang::X86::BI__builtin_ia32_phaddw128:
5576 case clang::X86::BI__builtin_ia32_phaddw256:
5577 case clang::X86::BI__builtin_ia32_phaddd128:
5578 case clang::X86::BI__builtin_ia32_phaddd256:
5581 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
5582 case clang::X86::BI__builtin_ia32_phaddsw128:
5583 case clang::X86::BI__builtin_ia32_phaddsw256:
5586 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.sadd_sat(RHS); });
5587 case clang::X86::BI__builtin_ia32_phsubw128:
5588 case clang::X86::BI__builtin_ia32_phsubw256:
5589 case clang::X86::BI__builtin_ia32_phsubd128:
5590 case clang::X86::BI__builtin_ia32_phsubd256:
5593 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS - RHS; });
5594 case clang::X86::BI__builtin_ia32_phsubsw128:
5595 case clang::X86::BI__builtin_ia32_phsubsw256:
5598 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.ssub_sat(RHS); });
5599 case clang::X86::BI__builtin_ia32_haddpd:
5600 case clang::X86::BI__builtin_ia32_haddps:
5601 case clang::X86::BI__builtin_ia32_haddpd256:
5602 case clang::X86::BI__builtin_ia32_haddps256:
5605 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
5610 case clang::X86::BI__builtin_ia32_hsubpd:
5611 case clang::X86::BI__builtin_ia32_hsubps:
5612 case clang::X86::BI__builtin_ia32_hsubpd256:
5613 case clang::X86::BI__builtin_ia32_hsubps256:
5616 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
5618 F.subtract(RHS, RM);
5621 case clang::X86::BI__builtin_ia32_addsubpd:
5622 case clang::X86::BI__builtin_ia32_addsubps:
5623 case clang::X86::BI__builtin_ia32_addsubpd256:
5624 case clang::X86::BI__builtin_ia32_addsubps256:
5627 case clang::X86::BI__builtin_ia32_pmuldq128:
5628 case clang::X86::BI__builtin_ia32_pmuldq256:
5629 case clang::X86::BI__builtin_ia32_pmuldq512:
5634 return llvm::APIntOps::mulsExtended(LoLHS, LoRHS);
5637 case clang::X86::BI__builtin_ia32_pmuludq128:
5638 case clang::X86::BI__builtin_ia32_pmuludq256:
5639 case clang::X86::BI__builtin_ia32_pmuludq512:
5644 return llvm::APIntOps::muluExtended(LoLHS, LoRHS);
5647 case clang::X86::BI__builtin_ia32_pclmulqdq128:
5648 case clang::X86::BI__builtin_ia32_pclmulqdq256:
5649 case clang::X86::BI__builtin_ia32_pclmulqdq512:
5651 case Builtin::BI__builtin_elementwise_clmul:
5653 llvm::APIntOps::clmul);
5655 case Builtin::BI__builtin_elementwise_fma:
5659 llvm::RoundingMode RM) {
5661 F.fusedMultiplyAdd(Y, Z, RM);
5665 case X86::BI__builtin_ia32_vpmadd52luq128:
5666 case X86::BI__builtin_ia32_vpmadd52luq256:
5667 case X86::BI__builtin_ia32_vpmadd52luq512:
5670 return A + (B.trunc(52) *
C.trunc(52)).zext(64);
5672 case X86::BI__builtin_ia32_vpmadd52huq128:
5673 case X86::BI__builtin_ia32_vpmadd52huq256:
5674 case X86::BI__builtin_ia32_vpmadd52huq512:
5677 return A + llvm::APIntOps::mulhu(B.trunc(52),
C.trunc(52)).zext(64);
5680 case X86::BI__builtin_ia32_vpshldd128:
5681 case X86::BI__builtin_ia32_vpshldd256:
5682 case X86::BI__builtin_ia32_vpshldd512:
5683 case X86::BI__builtin_ia32_vpshldq128:
5684 case X86::BI__builtin_ia32_vpshldq256:
5685 case X86::BI__builtin_ia32_vpshldq512:
5686 case X86::BI__builtin_ia32_vpshldw128:
5687 case X86::BI__builtin_ia32_vpshldw256:
5688 case X86::BI__builtin_ia32_vpshldw512:
5692 return llvm::APIntOps::fshl(Hi, Lo, Amt);
5695 case X86::BI__builtin_ia32_vpshrdd128:
5696 case X86::BI__builtin_ia32_vpshrdd256:
5697 case X86::BI__builtin_ia32_vpshrdd512:
5698 case X86::BI__builtin_ia32_vpshrdq128:
5699 case X86::BI__builtin_ia32_vpshrdq256:
5700 case X86::BI__builtin_ia32_vpshrdq512:
5701 case X86::BI__builtin_ia32_vpshrdw128:
5702 case X86::BI__builtin_ia32_vpshrdw256:
5703 case X86::BI__builtin_ia32_vpshrdw512:
5708 return llvm::APIntOps::fshr(Hi, Lo, Amt);
5710 case X86::BI__builtin_ia32_vpconflictsi_128:
5711 case X86::BI__builtin_ia32_vpconflictsi_256:
5712 case X86::BI__builtin_ia32_vpconflictsi_512:
5713 case X86::BI__builtin_ia32_vpconflictdi_128:
5714 case X86::BI__builtin_ia32_vpconflictdi_256:
5715 case X86::BI__builtin_ia32_vpconflictdi_512:
5717 case X86::BI__builtin_ia32_compressdf128_mask:
5718 case X86::BI__builtin_ia32_compressdf256_mask:
5719 case X86::BI__builtin_ia32_compressdf512_mask:
5720 case X86::BI__builtin_ia32_compressdi128_mask:
5721 case X86::BI__builtin_ia32_compressdi256_mask:
5722 case X86::BI__builtin_ia32_compressdi512_mask:
5723 case X86::BI__builtin_ia32_compresshi128_mask:
5724 case X86::BI__builtin_ia32_compresshi256_mask:
5725 case X86::BI__builtin_ia32_compresshi512_mask:
5726 case X86::BI__builtin_ia32_compressqi128_mask:
5727 case X86::BI__builtin_ia32_compressqi256_mask:
5728 case X86::BI__builtin_ia32_compressqi512_mask:
5729 case X86::BI__builtin_ia32_compresssf128_mask:
5730 case X86::BI__builtin_ia32_compresssf256_mask:
5731 case X86::BI__builtin_ia32_compresssf512_mask:
5732 case X86::BI__builtin_ia32_compresssi128_mask:
5733 case X86::BI__builtin_ia32_compresssi256_mask:
5734 case X86::BI__builtin_ia32_compresssi512_mask: {
5736 Call->getArg(0)->getType()->castAs<
VectorType>()->getNumElements();
5738 S, OpPC,
Call, [NumElems](
unsigned DstIdx,
const APInt &ShuffleMask) {
5739 APInt CompressMask = ShuffleMask.trunc(NumElems);
5740 if (DstIdx < CompressMask.popcount()) {
5741 while (DstIdx != 0) {
5742 CompressMask = CompressMask & (CompressMask - 1);
5745 return std::pair<unsigned, int>{
5746 0,
static_cast<int>(CompressMask.countr_zero())};
5748 return std::pair<unsigned, int>{1,
static_cast<int>(DstIdx)};
5751 case X86::BI__builtin_ia32_expanddf128_mask:
5752 case X86::BI__builtin_ia32_expanddf256_mask:
5753 case X86::BI__builtin_ia32_expanddf512_mask:
5754 case X86::BI__builtin_ia32_expanddi128_mask:
5755 case X86::BI__builtin_ia32_expanddi256_mask:
5756 case X86::BI__builtin_ia32_expanddi512_mask:
5757 case X86::BI__builtin_ia32_expandhi128_mask:
5758 case X86::BI__builtin_ia32_expandhi256_mask:
5759 case X86::BI__builtin_ia32_expandhi512_mask:
5760 case X86::BI__builtin_ia32_expandqi128_mask:
5761 case X86::BI__builtin_ia32_expandqi256_mask:
5762 case X86::BI__builtin_ia32_expandqi512_mask:
5763 case X86::BI__builtin_ia32_expandsf128_mask:
5764 case X86::BI__builtin_ia32_expandsf256_mask:
5765 case X86::BI__builtin_ia32_expandsf512_mask:
5766 case X86::BI__builtin_ia32_expandsi128_mask:
5767 case X86::BI__builtin_ia32_expandsi256_mask:
5768 case X86::BI__builtin_ia32_expandsi512_mask: {
5770 S, OpPC,
Call, [](
unsigned DstIdx,
const APInt &ShuffleMask) {
5773 APInt ExpandMask = ShuffleMask.trunc(DstIdx + 1);
5774 if (ExpandMask[DstIdx]) {
5775 int SrcIdx = ExpandMask.popcount() - 1;
5776 return std::pair<unsigned, int>{0, SrcIdx};
5778 return std::pair<unsigned, int>{1,
static_cast<int>(DstIdx)};
5781 case clang::X86::BI__builtin_ia32_blendpd:
5782 case clang::X86::BI__builtin_ia32_blendpd256:
5783 case clang::X86::BI__builtin_ia32_blendps:
5784 case clang::X86::BI__builtin_ia32_blendps256:
5785 case clang::X86::BI__builtin_ia32_pblendw128:
5786 case clang::X86::BI__builtin_ia32_pblendw256:
5787 case clang::X86::BI__builtin_ia32_pblendd128:
5788 case clang::X86::BI__builtin_ia32_pblendd256:
5790 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5792 unsigned MaskBit = (ShuffleMask >> (DstIdx % 8)) & 0x1;
5793 unsigned SrcVecIdx = MaskBit ? 1 : 0;
5794 return std::pair<unsigned, int>{SrcVecIdx,
static_cast<int>(DstIdx)};
5799 case clang::X86::BI__builtin_ia32_blendvpd:
5800 case clang::X86::BI__builtin_ia32_blendvpd256:
5801 case clang::X86::BI__builtin_ia32_blendvps:
5802 case clang::X86::BI__builtin_ia32_blendvps256:
5806 llvm::RoundingMode) {
return C.isNegative() ? T : F; });
5808 case clang::X86::BI__builtin_ia32_pblendvb128:
5809 case clang::X86::BI__builtin_ia32_pblendvb256:
5812 return ((
APInt)
C).isNegative() ? T : F;
5814 case X86::BI__builtin_ia32_ptestz128:
5815 case X86::BI__builtin_ia32_ptestz256:
5816 case X86::BI__builtin_ia32_vtestzps:
5817 case X86::BI__builtin_ia32_vtestzps256:
5818 case X86::BI__builtin_ia32_vtestzpd:
5819 case X86::BI__builtin_ia32_vtestzpd256:
5822 [](
const APInt &A,
const APInt &B) {
return (A & B) == 0; });
5823 case X86::BI__builtin_ia32_ptestc128:
5824 case X86::BI__builtin_ia32_ptestc256:
5825 case X86::BI__builtin_ia32_vtestcps:
5826 case X86::BI__builtin_ia32_vtestcps256:
5827 case X86::BI__builtin_ia32_vtestcpd:
5828 case X86::BI__builtin_ia32_vtestcpd256:
5831 [](
const APInt &A,
const APInt &B) {
return (~A & B) == 0; });
5832 case X86::BI__builtin_ia32_ptestnzc128:
5833 case X86::BI__builtin_ia32_ptestnzc256:
5834 case X86::BI__builtin_ia32_vtestnzcps:
5835 case X86::BI__builtin_ia32_vtestnzcps256:
5836 case X86::BI__builtin_ia32_vtestnzcpd:
5837 case X86::BI__builtin_ia32_vtestnzcpd256:
5840 return ((A & B) != 0) && ((~A & B) != 0);
5842 case X86::BI__builtin_ia32_selectb_128:
5843 case X86::BI__builtin_ia32_selectb_256:
5844 case X86::BI__builtin_ia32_selectb_512:
5845 case X86::BI__builtin_ia32_selectw_128:
5846 case X86::BI__builtin_ia32_selectw_256:
5847 case X86::BI__builtin_ia32_selectw_512:
5848 case X86::BI__builtin_ia32_selectd_128:
5849 case X86::BI__builtin_ia32_selectd_256:
5850 case X86::BI__builtin_ia32_selectd_512:
5851 case X86::BI__builtin_ia32_selectq_128:
5852 case X86::BI__builtin_ia32_selectq_256:
5853 case X86::BI__builtin_ia32_selectq_512:
5854 case X86::BI__builtin_ia32_selectph_128:
5855 case X86::BI__builtin_ia32_selectph_256:
5856 case X86::BI__builtin_ia32_selectph_512:
5857 case X86::BI__builtin_ia32_selectpbf_128:
5858 case X86::BI__builtin_ia32_selectpbf_256:
5859 case X86::BI__builtin_ia32_selectpbf_512:
5860 case X86::BI__builtin_ia32_selectps_128:
5861 case X86::BI__builtin_ia32_selectps_256:
5862 case X86::BI__builtin_ia32_selectps_512:
5863 case X86::BI__builtin_ia32_selectpd_128:
5864 case X86::BI__builtin_ia32_selectpd_256:
5865 case X86::BI__builtin_ia32_selectpd_512:
5868 case X86::BI__builtin_ia32_shufps:
5869 case X86::BI__builtin_ia32_shufps256:
5870 case X86::BI__builtin_ia32_shufps512:
5872 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5873 unsigned NumElemPerLane = 4;
5874 unsigned NumSelectableElems = NumElemPerLane / 2;
5875 unsigned BitsPerElem = 2;
5876 unsigned IndexMask = 0x3;
5877 unsigned MaskBits = 8;
5878 unsigned Lane = DstIdx / NumElemPerLane;
5879 unsigned ElemInLane = DstIdx % NumElemPerLane;
5880 unsigned LaneOffset = Lane * NumElemPerLane;
5881 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
5882 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5883 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
5884 return std::pair<unsigned, int>{SrcIdx,
5885 static_cast<int>(LaneOffset + Index)};
5887 case X86::BI__builtin_ia32_shufpd:
5888 case X86::BI__builtin_ia32_shufpd256:
5889 case X86::BI__builtin_ia32_shufpd512:
5891 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5892 unsigned NumElemPerLane = 2;
5893 unsigned NumSelectableElems = NumElemPerLane / 2;
5894 unsigned BitsPerElem = 1;
5895 unsigned IndexMask = 0x1;
5896 unsigned MaskBits = 8;
5897 unsigned Lane = DstIdx / NumElemPerLane;
5898 unsigned ElemInLane = DstIdx % NumElemPerLane;
5899 unsigned LaneOffset = Lane * NumElemPerLane;
5900 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
5901 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5902 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
5903 return std::pair<unsigned, int>{SrcIdx,
5904 static_cast<int>(LaneOffset + Index)};
5907 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v16qi:
5908 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v32qi:
5909 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v64qi:
5911 case X86::BI__builtin_ia32_vgf2p8affineqb_v16qi:
5912 case X86::BI__builtin_ia32_vgf2p8affineqb_v32qi:
5913 case X86::BI__builtin_ia32_vgf2p8affineqb_v64qi:
5916 case X86::BI__builtin_ia32_vgf2p8mulb_v16qi:
5917 case X86::BI__builtin_ia32_vgf2p8mulb_v32qi:
5918 case X86::BI__builtin_ia32_vgf2p8mulb_v64qi:
5921 case X86::BI__builtin_ia32_insertps128:
5923 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Mask) {
5925 if ((Mask & (1 << DstIdx)) != 0) {
5926 return std::pair<unsigned, int>{0, -1};
5930 unsigned SrcElem = (Mask >> 6) & 0x3;
5931 unsigned DstElem = (Mask >> 4) & 0x3;
5932 if (DstIdx == DstElem) {
5934 return std::pair<unsigned, int>{1,
static_cast<int>(SrcElem)};
5937 return std::pair<unsigned, int>{0,
static_cast<int>(DstIdx)};
5940 case X86::BI__builtin_ia32_permvarsi256:
5941 case X86::BI__builtin_ia32_permvarsf256:
5942 case X86::BI__builtin_ia32_permvardf512:
5943 case X86::BI__builtin_ia32_permvardi512:
5944 case X86::BI__builtin_ia32_permvarhi128:
5946 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5947 int Offset = ShuffleMask & 0x7;
5948 return std::pair<unsigned, int>{0, Offset};
5950 case X86::BI__builtin_ia32_permvarqi128:
5951 case X86::BI__builtin_ia32_permvarhi256:
5952 case X86::BI__builtin_ia32_permvarsi512:
5953 case X86::BI__builtin_ia32_permvarsf512:
5955 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5956 int Offset = ShuffleMask & 0xF;
5957 return std::pair<unsigned, int>{0, Offset};
5959 case X86::BI__builtin_ia32_permvardi256:
5960 case X86::BI__builtin_ia32_permvardf256:
5962 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5963 int Offset = ShuffleMask & 0x3;
5964 return std::pair<unsigned, int>{0, Offset};
5966 case X86::BI__builtin_ia32_permvarqi256:
5967 case X86::BI__builtin_ia32_permvarhi512:
5969 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5970 int Offset = ShuffleMask & 0x1F;
5971 return std::pair<unsigned, int>{0, Offset};
5973 case X86::BI__builtin_ia32_permvarqi512:
5975 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5976 int Offset = ShuffleMask & 0x3F;
5977 return std::pair<unsigned, int>{0, Offset};
5979 case X86::BI__builtin_ia32_vpermi2varq128:
5980 case X86::BI__builtin_ia32_vpermi2varpd128:
5982 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5983 int Offset = ShuffleMask & 0x1;
5984 unsigned SrcIdx = (ShuffleMask >> 1) & 0x1;
5985 return std::pair<unsigned, int>{SrcIdx, Offset};
5987 case X86::BI__builtin_ia32_vpermi2vard128:
5988 case X86::BI__builtin_ia32_vpermi2varps128:
5989 case X86::BI__builtin_ia32_vpermi2varq256:
5990 case X86::BI__builtin_ia32_vpermi2varpd256:
5992 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5993 int Offset = ShuffleMask & 0x3;
5994 unsigned SrcIdx = (ShuffleMask >> 2) & 0x1;
5995 return std::pair<unsigned, int>{SrcIdx, Offset};
5997 case X86::BI__builtin_ia32_vpermi2varhi128:
5998 case X86::BI__builtin_ia32_vpermi2vard256:
5999 case X86::BI__builtin_ia32_vpermi2varps256:
6000 case X86::BI__builtin_ia32_vpermi2varq512:
6001 case X86::BI__builtin_ia32_vpermi2varpd512:
6003 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6004 int Offset = ShuffleMask & 0x7;
6005 unsigned SrcIdx = (ShuffleMask >> 3) & 0x1;
6006 return std::pair<unsigned, int>{SrcIdx, Offset};
6008 case X86::BI__builtin_ia32_vpermi2varqi128:
6009 case X86::BI__builtin_ia32_vpermi2varhi256:
6010 case X86::BI__builtin_ia32_vpermi2vard512:
6011 case X86::BI__builtin_ia32_vpermi2varps512:
6013 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6014 int Offset = ShuffleMask & 0xF;
6015 unsigned SrcIdx = (ShuffleMask >> 4) & 0x1;
6016 return std::pair<unsigned, int>{SrcIdx, Offset};
6018 case X86::BI__builtin_ia32_vpermi2varqi256:
6019 case X86::BI__builtin_ia32_vpermi2varhi512:
6021 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6022 int Offset = ShuffleMask & 0x1F;
6023 unsigned SrcIdx = (ShuffleMask >> 5) & 0x1;
6024 return std::pair<unsigned, int>{SrcIdx, Offset};
6026 case X86::BI__builtin_ia32_vpermi2varqi512:
6028 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6029 int Offset = ShuffleMask & 0x3F;
6030 unsigned SrcIdx = (ShuffleMask >> 6) & 0x1;
6031 return std::pair<unsigned, int>{SrcIdx, Offset};
6033 case X86::BI__builtin_ia32_vperm2f128_pd256:
6034 case X86::BI__builtin_ia32_vperm2f128_ps256:
6035 case X86::BI__builtin_ia32_vperm2f128_si256:
6036 case X86::BI__builtin_ia32_permti256: {
6037 unsigned NumElements =
6038 Call->getArg(0)->getType()->castAs<
VectorType>()->getNumElements();
6039 unsigned PreservedBitsCnt = NumElements >> 2;
6042 [PreservedBitsCnt](
unsigned DstIdx,
unsigned ShuffleMask) {
6043 unsigned ControlBitsCnt = DstIdx >> PreservedBitsCnt << 2;
6044 unsigned ControlBits = ShuffleMask >> ControlBitsCnt;
6046 if (ControlBits & 0b1000)
6047 return std::make_pair(0u, -1);
6049 unsigned SrcVecIdx = (ControlBits & 0b10) >> 1;
6050 unsigned PreservedBitsMask = (1 << PreservedBitsCnt) - 1;
6051 int SrcIdx = ((ControlBits & 0b1) << PreservedBitsCnt) |
6052 (DstIdx & PreservedBitsMask);
6053 return std::make_pair(SrcVecIdx, SrcIdx);
6056 case X86::BI__builtin_ia32_pshufb128:
6057 case X86::BI__builtin_ia32_pshufb256:
6058 case X86::BI__builtin_ia32_pshufb512:
6060 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6061 uint8_t Ctlb =
static_cast<uint8_t
>(ShuffleMask);
6063 return std::make_pair(0, -1);
6065 unsigned LaneBase = (DstIdx / 16) * 16;
6066 unsigned SrcOffset = Ctlb & 0x0F;
6067 unsigned SrcIdx = LaneBase + SrcOffset;
6068 return std::make_pair(0,
static_cast<int>(SrcIdx));
6071 case X86::BI__builtin_ia32_pshuflw:
6072 case X86::BI__builtin_ia32_pshuflw256:
6073 case X86::BI__builtin_ia32_pshuflw512:
6075 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6076 unsigned LaneBase = (DstIdx / 8) * 8;
6077 unsigned LaneIdx = DstIdx % 8;
6079 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
6080 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
6083 return std::make_pair(0,
static_cast<int>(DstIdx));
6086 case X86::BI__builtin_ia32_pshufhw:
6087 case X86::BI__builtin_ia32_pshufhw256:
6088 case X86::BI__builtin_ia32_pshufhw512:
6090 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6091 unsigned LaneBase = (DstIdx / 8) * 8;
6092 unsigned LaneIdx = DstIdx % 8;
6094 unsigned Sel = (ShuffleMask >> (2 * (LaneIdx - 4))) & 0x3;
6095 return std::make_pair(0,
static_cast<int>(LaneBase + 4 + Sel));
6098 return std::make_pair(0,
static_cast<int>(DstIdx));
6101 case X86::BI__builtin_ia32_pshufd:
6102 case X86::BI__builtin_ia32_pshufd256:
6103 case X86::BI__builtin_ia32_pshufd512:
6104 case X86::BI__builtin_ia32_vpermilps:
6105 case X86::BI__builtin_ia32_vpermilps256:
6106 case X86::BI__builtin_ia32_vpermilps512:
6108 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6109 unsigned LaneBase = (DstIdx / 4) * 4;
6110 unsigned LaneIdx = DstIdx % 4;
6111 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
6112 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
6115 case X86::BI__builtin_ia32_vpermilvarpd:
6116 case X86::BI__builtin_ia32_vpermilvarpd256:
6117 case X86::BI__builtin_ia32_vpermilvarpd512:
6119 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6120 unsigned NumElemPerLane = 2;
6121 unsigned Lane = DstIdx / NumElemPerLane;
6122 unsigned Offset = ShuffleMask & 0b10 ? 1 : 0;
6123 return std::make_pair(
6124 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
6127 case X86::BI__builtin_ia32_vpermilvarps:
6128 case X86::BI__builtin_ia32_vpermilvarps256:
6129 case X86::BI__builtin_ia32_vpermilvarps512:
6131 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6132 unsigned NumElemPerLane = 4;
6133 unsigned Lane = DstIdx / NumElemPerLane;
6134 unsigned Offset = ShuffleMask & 0b11;
6135 return std::make_pair(
6136 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
6139 case X86::BI__builtin_ia32_vpermilpd:
6140 case X86::BI__builtin_ia32_vpermilpd256:
6141 case X86::BI__builtin_ia32_vpermilpd512:
6143 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Control) {
6144 unsigned NumElemPerLane = 2;
6145 unsigned BitsPerElem = 1;
6146 unsigned MaskBits = 8;
6147 unsigned IndexMask = 0x1;
6148 unsigned Lane = DstIdx / NumElemPerLane;
6149 unsigned LaneOffset = Lane * NumElemPerLane;
6150 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
6151 unsigned Index = (Control >> BitIndex) & IndexMask;
6152 return std::make_pair(0,
static_cast<int>(LaneOffset + Index));
6155 case X86::BI__builtin_ia32_permdf256:
6156 case X86::BI__builtin_ia32_permdi256:
6158 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Control) {
6161 unsigned Index = (Control >> (2 * DstIdx)) & 0x3;
6162 return std::make_pair(0,
static_cast<int>(Index));
6165 case X86::BI__builtin_ia32_vpmultishiftqb128:
6166 case X86::BI__builtin_ia32_vpmultishiftqb256:
6167 case X86::BI__builtin_ia32_vpmultishiftqb512:
6169 case X86::BI__builtin_ia32_kandqi:
6170 case X86::BI__builtin_ia32_kandhi:
6171 case X86::BI__builtin_ia32_kandsi:
6172 case X86::BI__builtin_ia32_kanddi:
6175 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS & RHS; });
6177 case X86::BI__builtin_ia32_kandnqi:
6178 case X86::BI__builtin_ia32_kandnhi:
6179 case X86::BI__builtin_ia32_kandnsi:
6180 case X86::BI__builtin_ia32_kandndi:
6183 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~LHS & RHS; });
6185 case X86::BI__builtin_ia32_korqi:
6186 case X86::BI__builtin_ia32_korhi:
6187 case X86::BI__builtin_ia32_korsi:
6188 case X86::BI__builtin_ia32_kordi:
6191 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS | RHS; });
6193 case X86::BI__builtin_ia32_kxnorqi:
6194 case X86::BI__builtin_ia32_kxnorhi:
6195 case X86::BI__builtin_ia32_kxnorsi:
6196 case X86::BI__builtin_ia32_kxnordi:
6199 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~(LHS ^ RHS); });
6201 case X86::BI__builtin_ia32_kxorqi:
6202 case X86::BI__builtin_ia32_kxorhi:
6203 case X86::BI__builtin_ia32_kxorsi:
6204 case X86::BI__builtin_ia32_kxordi:
6207 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS ^ RHS; });
6209 case X86::BI__builtin_ia32_knotqi:
6210 case X86::BI__builtin_ia32_knothi:
6211 case X86::BI__builtin_ia32_knotsi:
6212 case X86::BI__builtin_ia32_knotdi:
6214 S, OpPC,
Call, [](
const APSInt &Src) {
return ~Src; });
6216 case X86::BI__builtin_ia32_kaddqi:
6217 case X86::BI__builtin_ia32_kaddhi:
6218 case X86::BI__builtin_ia32_kaddsi:
6219 case X86::BI__builtin_ia32_kadddi:
6222 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
6224 case X86::BI__builtin_ia32_kmovb:
6225 case X86::BI__builtin_ia32_kmovw:
6226 case X86::BI__builtin_ia32_kmovd:
6227 case X86::BI__builtin_ia32_kmovq:
6229 S, OpPC,
Call, [](
const APSInt &Src) {
return Src; });
6231 case X86::BI__builtin_ia32_kunpckhi:
6232 case X86::BI__builtin_ia32_kunpckdi:
6233 case X86::BI__builtin_ia32_kunpcksi:
6238 unsigned BW = A.getBitWidth();
6239 return APSInt(A.trunc(BW / 2).concat(B.trunc(BW / 2)),
6243 case X86::BI__builtin_ia32_phminposuw128:
6246 case X86::BI__builtin_ia32_psraq128:
6247 case X86::BI__builtin_ia32_psraq256:
6248 case X86::BI__builtin_ia32_psraq512:
6249 case X86::BI__builtin_ia32_psrad128:
6250 case X86::BI__builtin_ia32_psrad256:
6251 case X86::BI__builtin_ia32_psrad512:
6252 case X86::BI__builtin_ia32_psraw128:
6253 case X86::BI__builtin_ia32_psraw256:
6254 case X86::BI__builtin_ia32_psraw512:
6257 [](
const APInt &Elt, uint64_t Count) {
return Elt.ashr(Count); },
6258 [](
const APInt &Elt,
unsigned Width) {
return Elt.ashr(Width - 1); });
6260 case X86::BI__builtin_ia32_psllq128:
6261 case X86::BI__builtin_ia32_psllq256:
6262 case X86::BI__builtin_ia32_psllq512:
6263 case X86::BI__builtin_ia32_pslld128:
6264 case X86::BI__builtin_ia32_pslld256:
6265 case X86::BI__builtin_ia32_pslld512:
6266 case X86::BI__builtin_ia32_psllw128:
6267 case X86::BI__builtin_ia32_psllw256:
6268 case X86::BI__builtin_ia32_psllw512:
6271 [](
const APInt &Elt, uint64_t Count) {
return Elt.shl(Count); },
6272 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
6274 case X86::BI__builtin_ia32_psrlq128:
6275 case X86::BI__builtin_ia32_psrlq256:
6276 case X86::BI__builtin_ia32_psrlq512:
6277 case X86::BI__builtin_ia32_psrld128:
6278 case X86::BI__builtin_ia32_psrld256:
6279 case X86::BI__builtin_ia32_psrld512:
6280 case X86::BI__builtin_ia32_psrlw128:
6281 case X86::BI__builtin_ia32_psrlw256:
6282 case X86::BI__builtin_ia32_psrlw512:
6285 [](
const APInt &Elt, uint64_t Count) {
return Elt.lshr(Count); },
6286 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
6288 case X86::BI__builtin_ia32_pternlogd128_mask:
6289 case X86::BI__builtin_ia32_pternlogd256_mask:
6290 case X86::BI__builtin_ia32_pternlogd512_mask:
6291 case X86::BI__builtin_ia32_pternlogq128_mask:
6292 case X86::BI__builtin_ia32_pternlogq256_mask:
6293 case X86::BI__builtin_ia32_pternlogq512_mask:
6295 case X86::BI__builtin_ia32_pternlogd128_maskz:
6296 case X86::BI__builtin_ia32_pternlogd256_maskz:
6297 case X86::BI__builtin_ia32_pternlogd512_maskz:
6298 case X86::BI__builtin_ia32_pternlogq128_maskz:
6299 case X86::BI__builtin_ia32_pternlogq256_maskz:
6300 case X86::BI__builtin_ia32_pternlogq512_maskz:
6302 case Builtin::BI__builtin_elementwise_fshl:
6304 llvm::APIntOps::fshl);
6305 case Builtin::BI__builtin_elementwise_fshr:
6307 llvm::APIntOps::fshr);
6309 case X86::BI__builtin_ia32_shuf_f32x4_256:
6310 case X86::BI__builtin_ia32_shuf_i32x4_256:
6311 case X86::BI__builtin_ia32_shuf_f64x2_256:
6312 case X86::BI__builtin_ia32_shuf_i64x2_256:
6313 case X86::BI__builtin_ia32_shuf_f32x4:
6314 case X86::BI__builtin_ia32_shuf_i32x4:
6315 case X86::BI__builtin_ia32_shuf_f64x2:
6316 case X86::BI__builtin_ia32_shuf_i64x2: {
6322 unsigned LaneBits = 128u;
6323 unsigned NumLanes = (NumElems * ElemBits) / LaneBits;
6324 unsigned NumElemsPerLane = LaneBits / ElemBits;
6328 [NumLanes, NumElemsPerLane](
unsigned DstIdx,
unsigned ShuffleMask) {
6330 unsigned BitsPerElem = NumLanes / 2;
6331 unsigned IndexMask = (1u << BitsPerElem) - 1;
6332 unsigned Lane = DstIdx / NumElemsPerLane;
6333 unsigned SrcIdx = (Lane < NumLanes / 2) ? 0 : 1;
6334 unsigned BitIdx = BitsPerElem * Lane;
6335 unsigned SrcLaneIdx = (ShuffleMask >> BitIdx) & IndexMask;
6336 unsigned ElemInLane = DstIdx % NumElemsPerLane;
6337 unsigned IdxToPick = SrcLaneIdx * NumElemsPerLane + ElemInLane;
6338 return std::pair<unsigned, int>{SrcIdx, IdxToPick};
6342 case X86::BI__builtin_ia32_insertf32x4_256:
6343 case X86::BI__builtin_ia32_inserti32x4_256:
6344 case X86::BI__builtin_ia32_insertf64x2_256:
6345 case X86::BI__builtin_ia32_inserti64x2_256:
6346 case X86::BI__builtin_ia32_insertf32x4:
6347 case X86::BI__builtin_ia32_inserti32x4:
6348 case X86::BI__builtin_ia32_insertf64x2_512:
6349 case X86::BI__builtin_ia32_inserti64x2_512:
6350 case X86::BI__builtin_ia32_insertf32x8:
6351 case X86::BI__builtin_ia32_inserti32x8:
6352 case X86::BI__builtin_ia32_insertf64x4:
6353 case X86::BI__builtin_ia32_inserti64x4:
6354 case X86::BI__builtin_ia32_vinsertf128_ps256:
6355 case X86::BI__builtin_ia32_vinsertf128_pd256:
6356 case X86::BI__builtin_ia32_vinsertf128_si256:
6357 case X86::BI__builtin_ia32_insert128i256:
6360 case clang::X86::BI__builtin_ia32_vcvtps2ph:
6361 case clang::X86::BI__builtin_ia32_vcvtps2ph256:
6364 case X86::BI__builtin_ia32_vec_ext_v4hi:
6365 case X86::BI__builtin_ia32_vec_ext_v16qi:
6366 case X86::BI__builtin_ia32_vec_ext_v8hi:
6367 case X86::BI__builtin_ia32_vec_ext_v4si:
6368 case X86::BI__builtin_ia32_vec_ext_v2di:
6369 case X86::BI__builtin_ia32_vec_ext_v32qi:
6370 case X86::BI__builtin_ia32_vec_ext_v16hi:
6371 case X86::BI__builtin_ia32_vec_ext_v8si:
6372 case X86::BI__builtin_ia32_vec_ext_v4di:
6373 case X86::BI__builtin_ia32_vec_ext_v4sf:
6376 case X86::BI__builtin_ia32_vec_set_v4hi:
6377 case X86::BI__builtin_ia32_vec_set_v16qi:
6378 case X86::BI__builtin_ia32_vec_set_v8hi:
6379 case X86::BI__builtin_ia32_vec_set_v4si:
6380 case X86::BI__builtin_ia32_vec_set_v2di:
6381 case X86::BI__builtin_ia32_vec_set_v32qi:
6382 case X86::BI__builtin_ia32_vec_set_v16hi:
6383 case X86::BI__builtin_ia32_vec_set_v8si:
6384 case X86::BI__builtin_ia32_vec_set_v4di:
6387 case X86::BI__builtin_ia32_cvtb2mask128:
6388 case X86::BI__builtin_ia32_cvtb2mask256:
6389 case X86::BI__builtin_ia32_cvtb2mask512:
6390 case X86::BI__builtin_ia32_cvtw2mask128:
6391 case X86::BI__builtin_ia32_cvtw2mask256:
6392 case X86::BI__builtin_ia32_cvtw2mask512:
6393 case X86::BI__builtin_ia32_cvtd2mask128:
6394 case X86::BI__builtin_ia32_cvtd2mask256:
6395 case X86::BI__builtin_ia32_cvtd2mask512:
6396 case X86::BI__builtin_ia32_cvtq2mask128:
6397 case X86::BI__builtin_ia32_cvtq2mask256:
6398 case X86::BI__builtin_ia32_cvtq2mask512:
6401 case X86::BI__builtin_ia32_cvtmask2b128:
6402 case X86::BI__builtin_ia32_cvtmask2b256:
6403 case X86::BI__builtin_ia32_cvtmask2b512:
6404 case X86::BI__builtin_ia32_cvtmask2w128:
6405 case X86::BI__builtin_ia32_cvtmask2w256:
6406 case X86::BI__builtin_ia32_cvtmask2w512:
6407 case X86::BI__builtin_ia32_cvtmask2d128:
6408 case X86::BI__builtin_ia32_cvtmask2d256:
6409 case X86::BI__builtin_ia32_cvtmask2d512:
6410 case X86::BI__builtin_ia32_cvtmask2q128:
6411 case X86::BI__builtin_ia32_cvtmask2q256:
6412 case X86::BI__builtin_ia32_cvtmask2q512:
6415 case X86::BI__builtin_ia32_cvtsd2ss:
6418 case X86::BI__builtin_ia32_cvtsd2ss_round_mask:
6421 case X86::BI__builtin_ia32_cvtpd2ps:
6422 case X86::BI__builtin_ia32_cvtpd2ps256:
6424 case X86::BI__builtin_ia32_cvtpd2ps_mask:
6426 case X86::BI__builtin_ia32_cvtpd2ps512_mask:
6429 case X86::BI__builtin_ia32_cmpb128_mask:
6430 case X86::BI__builtin_ia32_cmpw128_mask:
6431 case X86::BI__builtin_ia32_cmpd128_mask:
6432 case X86::BI__builtin_ia32_cmpq128_mask:
6433 case X86::BI__builtin_ia32_cmpb256_mask:
6434 case X86::BI__builtin_ia32_cmpw256_mask:
6435 case X86::BI__builtin_ia32_cmpd256_mask:
6436 case X86::BI__builtin_ia32_cmpq256_mask:
6437 case X86::BI__builtin_ia32_cmpb512_mask:
6438 case X86::BI__builtin_ia32_cmpw512_mask:
6439 case X86::BI__builtin_ia32_cmpd512_mask:
6440 case X86::BI__builtin_ia32_cmpq512_mask:
6444 case X86::BI__builtin_ia32_ucmpb128_mask:
6445 case X86::BI__builtin_ia32_ucmpw128_mask:
6446 case X86::BI__builtin_ia32_ucmpd128_mask:
6447 case X86::BI__builtin_ia32_ucmpq128_mask:
6448 case X86::BI__builtin_ia32_ucmpb256_mask:
6449 case X86::BI__builtin_ia32_ucmpw256_mask:
6450 case X86::BI__builtin_ia32_ucmpd256_mask:
6451 case X86::BI__builtin_ia32_ucmpq256_mask:
6452 case X86::BI__builtin_ia32_ucmpb512_mask:
6453 case X86::BI__builtin_ia32_ucmpw512_mask:
6454 case X86::BI__builtin_ia32_ucmpd512_mask:
6455 case X86::BI__builtin_ia32_ucmpq512_mask:
6459 case X86::BI__builtin_ia32_vpshufbitqmb128_mask:
6460 case X86::BI__builtin_ia32_vpshufbitqmb256_mask:
6461 case X86::BI__builtin_ia32_vpshufbitqmb512_mask:
6464 case X86::BI__builtin_ia32_pslldqi128_byteshift:
6465 case X86::BI__builtin_ia32_pslldqi256_byteshift:
6466 case X86::BI__builtin_ia32_pslldqi512_byteshift:
6473 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
6474 unsigned LaneBase = (DstIdx / 16) * 16;
6475 unsigned LaneIdx = DstIdx % 16;
6476 if (LaneIdx < Shift)
6477 return std::make_pair(0, -1);
6479 return std::make_pair(0,
6480 static_cast<int>(LaneBase + LaneIdx - Shift));
6483 case X86::BI__builtin_ia32_psrldqi128_byteshift:
6484 case X86::BI__builtin_ia32_psrldqi256_byteshift:
6485 case X86::BI__builtin_ia32_psrldqi512_byteshift:
6492 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
6493 unsigned LaneBase = (DstIdx / 16) * 16;
6494 unsigned LaneIdx = DstIdx % 16;
6495 if (LaneIdx + Shift < 16)
6496 return std::make_pair(0,
6497 static_cast<int>(LaneBase + LaneIdx + Shift));
6499 return std::make_pair(0, -1);
6502 case X86::BI__builtin_ia32_palignr128:
6503 case X86::BI__builtin_ia32_palignr256:
6504 case X86::BI__builtin_ia32_palignr512:
6506 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Shift) {
6508 unsigned VecIdx = 1;
6511 int Lane = DstIdx / 16;
6512 int Offset = DstIdx % 16;
6515 unsigned ShiftedIdx = Offset + (Shift & 0xFF);
6516 if (ShiftedIdx < 16) {
6517 ElemIdx = ShiftedIdx + (Lane * 16);
6518 }
else if (ShiftedIdx < 32) {
6520 ElemIdx = (ShiftedIdx - 16) + (Lane * 16);
6523 return std::pair<unsigned, int>{VecIdx, ElemIdx};
6526 case X86::BI__builtin_ia32_alignd128:
6527 case X86::BI__builtin_ia32_alignd256:
6528 case X86::BI__builtin_ia32_alignd512:
6529 case X86::BI__builtin_ia32_alignq128:
6530 case X86::BI__builtin_ia32_alignq256:
6531 case X86::BI__builtin_ia32_alignq512: {
6532 unsigned NumElems =
Call->getType()->castAs<
VectorType>()->getNumElements();
6534 S, OpPC,
Call, [NumElems](
unsigned DstIdx,
unsigned Shift) {
6535 unsigned Imm = Shift & 0xFF;
6536 unsigned EffectiveShift = Imm & (NumElems - 1);
6537 unsigned SourcePos = DstIdx + EffectiveShift;
6538 unsigned VecIdx = SourcePos < NumElems ? 1u : 0u;
6539 unsigned ElemIdx = SourcePos & (NumElems - 1);
6540 return std::pair<unsigned, int>{VecIdx,
static_cast<int>(ElemIdx)};
6544 case clang::X86::BI__builtin_ia32_minps:
6545 case clang::X86::BI__builtin_ia32_minpd:
6546 case clang::X86::BI__builtin_ia32_minph128:
6547 case clang::X86::BI__builtin_ia32_minph256:
6548 case clang::X86::BI__builtin_ia32_minps256:
6549 case clang::X86::BI__builtin_ia32_minpd256:
6550 case clang::X86::BI__builtin_ia32_minps512:
6551 case clang::X86::BI__builtin_ia32_minpd512:
6552 case clang::X86::BI__builtin_ia32_minph512:
6556 std::optional<APSInt>) -> std::optional<APFloat> {
6557 if (A.isNaN() || A.isInfinity() || A.isDenormal() || B.isNaN() ||
6558 B.isInfinity() || B.isDenormal())
6559 return std::nullopt;
6560 if (A.isZero() && B.isZero())
6562 return llvm::minimum(A, B);
6565 case clang::X86::BI__builtin_ia32_minss:
6566 case clang::X86::BI__builtin_ia32_minsd:
6570 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
6575 case clang::X86::BI__builtin_ia32_minsd_round_mask:
6576 case clang::X86::BI__builtin_ia32_minss_round_mask:
6577 case clang::X86::BI__builtin_ia32_minsh_round_mask:
6578 case clang::X86::BI__builtin_ia32_maxsd_round_mask:
6579 case clang::X86::BI__builtin_ia32_maxss_round_mask:
6580 case clang::X86::BI__builtin_ia32_maxsh_round_mask: {
6581 bool IsMin = BuiltinID == clang::X86::BI__builtin_ia32_minsd_round_mask ||
6582 BuiltinID == clang::X86::BI__builtin_ia32_minss_round_mask ||
6583 BuiltinID == clang::X86::BI__builtin_ia32_minsh_round_mask;
6587 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
6592 case clang::X86::BI__builtin_ia32_maxps:
6593 case clang::X86::BI__builtin_ia32_maxpd:
6594 case clang::X86::BI__builtin_ia32_maxph128:
6595 case clang::X86::BI__builtin_ia32_maxph256:
6596 case clang::X86::BI__builtin_ia32_maxps256:
6597 case clang::X86::BI__builtin_ia32_maxpd256:
6598 case clang::X86::BI__builtin_ia32_maxps512:
6599 case clang::X86::BI__builtin_ia32_maxpd512:
6600 case clang::X86::BI__builtin_ia32_maxph512:
6604 std::optional<APSInt>) -> std::optional<APFloat> {
6605 if (A.isNaN() || A.isInfinity() || A.isDenormal() || B.isNaN() ||
6606 B.isInfinity() || B.isDenormal())
6607 return std::nullopt;
6608 if (A.isZero() && B.isZero())
6610 return llvm::maximum(A, B);
6613 case clang::X86::BI__builtin_ia32_maxss:
6614 case clang::X86::BI__builtin_ia32_maxsd:
6618 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
6622 case X86::BI__builtin_ia32_vpdpwssd128:
6623 case X86::BI__builtin_ia32_vpdpwssd256:
6624 case X86::BI__builtin_ia32_vpdpwssd512:
6625 case X86::BI__builtin_ia32_vpdpbusd128:
6626 case X86::BI__builtin_ia32_vpdpbusd256:
6627 case X86::BI__builtin_ia32_vpdpbusd512:
6629 case X86::BI__builtin_ia32_vpdpwssds128:
6630 case X86::BI__builtin_ia32_vpdpwssds256:
6631 case X86::BI__builtin_ia32_vpdpwssds512:
6632 case X86::BI__builtin_ia32_vpdpbusds128:
6633 case X86::BI__builtin_ia32_vpdpbusds256:
6634 case X86::BI__builtin_ia32_vpdpbusds512:
6638 diag::note_invalid_subexpr_in_const_expr)
6644 llvm_unreachable(
"Unhandled builtin ID");