4429 uint32_t BuiltinID) {
4434 switch (BuiltinID) {
4435 case Builtin::BI__builtin_is_constant_evaluated:
4438 case Builtin::BI__builtin_assume:
4439 case Builtin::BI__assume:
4442 case Builtin::BI__builtin_strcmp:
4443 case Builtin::BIstrcmp:
4444 case Builtin::BI__builtin_strncmp:
4445 case Builtin::BIstrncmp:
4446 case Builtin::BI__builtin_wcsncmp:
4447 case Builtin::BIwcsncmp:
4448 case Builtin::BI__builtin_wcscmp:
4449 case Builtin::BIwcscmp:
4452 case Builtin::BI__builtin_strlen:
4453 case Builtin::BIstrlen:
4454 case Builtin::BI__builtin_wcslen:
4455 case Builtin::BIwcslen:
4458 case Builtin::BI__builtin_nan:
4459 case Builtin::BI__builtin_nanf:
4460 case Builtin::BI__builtin_nanl:
4461 case Builtin::BI__builtin_nanf16:
4462 case Builtin::BI__builtin_nanf128:
4465 case Builtin::BI__builtin_nans:
4466 case Builtin::BI__builtin_nansf:
4467 case Builtin::BI__builtin_nansl:
4468 case Builtin::BI__builtin_nansf16:
4469 case Builtin::BI__builtin_nansf128:
4472 case Builtin::BI__builtin_huge_val:
4473 case Builtin::BI__builtin_huge_valf:
4474 case Builtin::BI__builtin_huge_vall:
4475 case Builtin::BI__builtin_huge_valf16:
4476 case Builtin::BI__builtin_huge_valf128:
4477 case Builtin::BI__builtin_inf:
4478 case Builtin::BI__builtin_inff:
4479 case Builtin::BI__builtin_infl:
4480 case Builtin::BI__builtin_inff16:
4481 case Builtin::BI__builtin_inff128:
4484 case Builtin::BI__builtin_copysign:
4485 case Builtin::BI__builtin_copysignf:
4486 case Builtin::BI__builtin_copysignl:
4487 case Builtin::BI__builtin_copysignf128:
4490 case Builtin::BI__builtin_fmin:
4491 case Builtin::BI__builtin_fminf:
4492 case Builtin::BI__builtin_fminl:
4493 case Builtin::BI__builtin_fminf16:
4494 case Builtin::BI__builtin_fminf128:
4497 case Builtin::BI__builtin_fminimum_num:
4498 case Builtin::BI__builtin_fminimum_numf:
4499 case Builtin::BI__builtin_fminimum_numl:
4500 case Builtin::BI__builtin_fminimum_numf16:
4501 case Builtin::BI__builtin_fminimum_numf128:
4504 case Builtin::BI__builtin_fmax:
4505 case Builtin::BI__builtin_fmaxf:
4506 case Builtin::BI__builtin_fmaxl:
4507 case Builtin::BI__builtin_fmaxf16:
4508 case Builtin::BI__builtin_fmaxf128:
4511 case Builtin::BI__builtin_fmaximum_num:
4512 case Builtin::BI__builtin_fmaximum_numf:
4513 case Builtin::BI__builtin_fmaximum_numl:
4514 case Builtin::BI__builtin_fmaximum_numf16:
4515 case Builtin::BI__builtin_fmaximum_numf128:
4518 case Builtin::BI__builtin_isnan:
4521 case Builtin::BI__builtin_issignaling:
4524 case Builtin::BI__builtin_isinf:
4527 case Builtin::BI__builtin_isinf_sign:
4530 case Builtin::BI__builtin_isfinite:
4533 case Builtin::BI__builtin_isnormal:
4536 case Builtin::BI__builtin_issubnormal:
4539 case Builtin::BI__builtin_iszero:
4542 case Builtin::BI__builtin_signbit:
4543 case Builtin::BI__builtin_signbitf:
4544 case Builtin::BI__builtin_signbitl:
4547 case Builtin::BI__builtin_isgreater:
4548 case Builtin::BI__builtin_isgreaterequal:
4549 case Builtin::BI__builtin_isless:
4550 case Builtin::BI__builtin_islessequal:
4551 case Builtin::BI__builtin_islessgreater:
4552 case Builtin::BI__builtin_isunordered:
4555 case Builtin::BI__builtin_isfpclass:
4558 case Builtin::BI__builtin_fpclassify:
4561 case Builtin::BI__builtin_fabs:
4562 case Builtin::BI__builtin_fabsf:
4563 case Builtin::BI__builtin_fabsl:
4564 case Builtin::BI__builtin_fabsf128:
4567 case Builtin::BI__builtin_abs:
4568 case Builtin::BI__builtin_labs:
4569 case Builtin::BI__builtin_llabs:
4572 case Builtin::BI__builtin_popcount:
4573 case Builtin::BI__builtin_popcountl:
4574 case Builtin::BI__builtin_popcountll:
4575 case Builtin::BI__builtin_popcountg:
4576 case Builtin::BI__popcnt16:
4577 case Builtin::BI__popcnt:
4578 case Builtin::BI__popcnt64:
4581 case Builtin::BI__builtin_parity:
4582 case Builtin::BI__builtin_parityl:
4583 case Builtin::BI__builtin_parityll:
4586 return APInt(Val.getBitWidth(), Val.popcount() % 2);
4588 case Builtin::BI__builtin_clrsb:
4589 case Builtin::BI__builtin_clrsbl:
4590 case Builtin::BI__builtin_clrsbll:
4593 return APInt(Val.getBitWidth(),
4594 Val.getBitWidth() - Val.getSignificantBits());
4596 case Builtin::BI__builtin_bitreverseg:
4597 case Builtin::BI__builtin_bitreverse8:
4598 case Builtin::BI__builtin_bitreverse16:
4599 case Builtin::BI__builtin_bitreverse32:
4600 case Builtin::BI__builtin_bitreverse64:
4602 S, OpPC,
Call, [](
const APSInt &Val) {
return Val.reverseBits(); });
4604 case Builtin::BI__builtin_classify_type:
4607 case Builtin::BI__builtin_expect:
4608 case Builtin::BI__builtin_expect_with_probability:
4611 case Builtin::BI__builtin_rotateleft8:
4612 case Builtin::BI__builtin_rotateleft16:
4613 case Builtin::BI__builtin_rotateleft32:
4614 case Builtin::BI__builtin_rotateleft64:
4615 case Builtin::BI__builtin_stdc_rotate_left:
4616 case Builtin::BI_rotl8:
4617 case Builtin::BI_rotl16:
4618 case Builtin::BI_rotl:
4619 case Builtin::BI_lrotl:
4620 case Builtin::BI_rotl64:
4621 case Builtin::BI__builtin_rotateright8:
4622 case Builtin::BI__builtin_rotateright16:
4623 case Builtin::BI__builtin_rotateright32:
4624 case Builtin::BI__builtin_rotateright64:
4625 case Builtin::BI__builtin_stdc_rotate_right:
4626 case Builtin::BI_rotr8:
4627 case Builtin::BI_rotr16:
4628 case Builtin::BI_rotr:
4629 case Builtin::BI_lrotr:
4630 case Builtin::BI_rotr64: {
4633 switch (BuiltinID) {
4634 case Builtin::BI__builtin_rotateright8:
4635 case Builtin::BI__builtin_rotateright16:
4636 case Builtin::BI__builtin_rotateright32:
4637 case Builtin::BI__builtin_rotateright64:
4638 case Builtin::BI__builtin_stdc_rotate_right:
4639 case Builtin::BI_rotr8:
4640 case Builtin::BI_rotr16:
4641 case Builtin::BI_rotr:
4642 case Builtin::BI_lrotr:
4643 case Builtin::BI_rotr64:
4644 IsRotateRight =
true;
4647 IsRotateRight =
false;
4654 return IsRotateRight ?
Value.rotr(Amount.getZExtValue())
4655 :
Value.rotl(Amount.getZExtValue());
4659 case Builtin::BIstdc_leading_zeros_uc:
4660 case Builtin::BIstdc_leading_zeros_us:
4661 case Builtin::BIstdc_leading_zeros_ui:
4662 case Builtin::BIstdc_leading_zeros_ul:
4663 case Builtin::BIstdc_leading_zeros_ull:
4664 case Builtin::BIstdc_leading_zeros:
4665 case Builtin::BI__builtin_stdc_leading_zeros: {
4668 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4669 return APInt(ResWidth, Val.countl_zero());
4673 case Builtin::BIstdc_leading_ones_uc:
4674 case Builtin::BIstdc_leading_ones_us:
4675 case Builtin::BIstdc_leading_ones_ui:
4676 case Builtin::BIstdc_leading_ones_ul:
4677 case Builtin::BIstdc_leading_ones_ull:
4678 case Builtin::BIstdc_leading_ones:
4679 case Builtin::BI__builtin_stdc_leading_ones: {
4682 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4683 return APInt(ResWidth, Val.countl_one());
4687 case Builtin::BIstdc_trailing_zeros_uc:
4688 case Builtin::BIstdc_trailing_zeros_us:
4689 case Builtin::BIstdc_trailing_zeros_ui:
4690 case Builtin::BIstdc_trailing_zeros_ul:
4691 case Builtin::BIstdc_trailing_zeros_ull:
4692 case Builtin::BIstdc_trailing_zeros:
4693 case Builtin::BI__builtin_stdc_trailing_zeros: {
4696 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4697 return APInt(ResWidth, Val.countr_zero());
4701 case Builtin::BIstdc_trailing_ones_uc:
4702 case Builtin::BIstdc_trailing_ones_us:
4703 case Builtin::BIstdc_trailing_ones_ui:
4704 case Builtin::BIstdc_trailing_ones_ul:
4705 case Builtin::BIstdc_trailing_ones_ull:
4706 case Builtin::BIstdc_trailing_ones:
4707 case Builtin::BI__builtin_stdc_trailing_ones: {
4710 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4711 return APInt(ResWidth, Val.countr_one());
4715 case Builtin::BIstdc_first_leading_zero_uc:
4716 case Builtin::BIstdc_first_leading_zero_us:
4717 case Builtin::BIstdc_first_leading_zero_ui:
4718 case Builtin::BIstdc_first_leading_zero_ul:
4719 case Builtin::BIstdc_first_leading_zero_ull:
4720 case Builtin::BIstdc_first_leading_zero:
4721 case Builtin::BI__builtin_stdc_first_leading_zero: {
4724 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4725 return APInt(ResWidth, Val.isAllOnes() ? 0 : Val.countl_one() + 1);
4729 case Builtin::BIstdc_first_leading_one_uc:
4730 case Builtin::BIstdc_first_leading_one_us:
4731 case Builtin::BIstdc_first_leading_one_ui:
4732 case Builtin::BIstdc_first_leading_one_ul:
4733 case Builtin::BIstdc_first_leading_one_ull:
4734 case Builtin::BIstdc_first_leading_one:
4735 case Builtin::BI__builtin_stdc_first_leading_one: {
4738 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4739 return APInt(ResWidth, Val.isZero() ? 0 : Val.countl_zero() + 1);
4743 case Builtin::BIstdc_first_trailing_zero_uc:
4744 case Builtin::BIstdc_first_trailing_zero_us:
4745 case Builtin::BIstdc_first_trailing_zero_ui:
4746 case Builtin::BIstdc_first_trailing_zero_ul:
4747 case Builtin::BIstdc_first_trailing_zero_ull:
4748 case Builtin::BIstdc_first_trailing_zero:
4749 case Builtin::BI__builtin_stdc_first_trailing_zero: {
4752 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4753 return APInt(ResWidth, Val.isAllOnes() ? 0 : Val.countr_one() + 1);
4757 case Builtin::BIstdc_first_trailing_one_uc:
4758 case Builtin::BIstdc_first_trailing_one_us:
4759 case Builtin::BIstdc_first_trailing_one_ui:
4760 case Builtin::BIstdc_first_trailing_one_ul:
4761 case Builtin::BIstdc_first_trailing_one_ull:
4762 case Builtin::BIstdc_first_trailing_one:
4763 case Builtin::BI__builtin_stdc_first_trailing_one: {
4766 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4767 return APInt(ResWidth, Val.isZero() ? 0 : Val.countr_zero() + 1);
4771 case Builtin::BIstdc_count_zeros_uc:
4772 case Builtin::BIstdc_count_zeros_us:
4773 case Builtin::BIstdc_count_zeros_ui:
4774 case Builtin::BIstdc_count_zeros_ul:
4775 case Builtin::BIstdc_count_zeros_ull:
4776 case Builtin::BIstdc_count_zeros:
4777 case Builtin::BI__builtin_stdc_count_zeros: {
4780 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4781 unsigned BitWidth = Val.getBitWidth();
4782 return APInt(ResWidth, BitWidth - Val.popcount());
4786 case Builtin::BIstdc_count_ones_uc:
4787 case Builtin::BIstdc_count_ones_us:
4788 case Builtin::BIstdc_count_ones_ui:
4789 case Builtin::BIstdc_count_ones_ul:
4790 case Builtin::BIstdc_count_ones_ull:
4791 case Builtin::BIstdc_count_ones:
4792 case Builtin::BI__builtin_stdc_count_ones: {
4795 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4796 return APInt(ResWidth, Val.popcount());
4800 case Builtin::BIstdc_has_single_bit_uc:
4801 case Builtin::BIstdc_has_single_bit_us:
4802 case Builtin::BIstdc_has_single_bit_ui:
4803 case Builtin::BIstdc_has_single_bit_ul:
4804 case Builtin::BIstdc_has_single_bit_ull:
4805 case Builtin::BIstdc_has_single_bit:
4806 case Builtin::BI__builtin_stdc_has_single_bit: {
4809 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4810 return APInt(ResWidth, Val.popcount() == 1 ? 1 : 0);
4814 case Builtin::BIstdc_bit_width_uc:
4815 case Builtin::BIstdc_bit_width_us:
4816 case Builtin::BIstdc_bit_width_ui:
4817 case Builtin::BIstdc_bit_width_ul:
4818 case Builtin::BIstdc_bit_width_ull:
4819 case Builtin::BIstdc_bit_width:
4820 case Builtin::BI__builtin_stdc_bit_width: {
4823 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4824 unsigned BitWidth = Val.getBitWidth();
4825 return APInt(ResWidth, BitWidth - Val.countl_zero());
4829 case Builtin::BIstdc_bit_floor_uc:
4830 case Builtin::BIstdc_bit_floor_us:
4831 case Builtin::BIstdc_bit_floor_ui:
4832 case Builtin::BIstdc_bit_floor_ul:
4833 case Builtin::BIstdc_bit_floor_ull:
4834 case Builtin::BIstdc_bit_floor:
4835 case Builtin::BI__builtin_stdc_bit_floor:
4838 unsigned BitWidth = Val.getBitWidth();
4840 return APInt::getZero(BitWidth);
4841 return APInt::getOneBitSet(BitWidth,
4842 BitWidth - Val.countl_zero() - 1);
4845 case Builtin::BIstdc_bit_ceil_uc:
4846 case Builtin::BIstdc_bit_ceil_us:
4847 case Builtin::BIstdc_bit_ceil_ui:
4848 case Builtin::BIstdc_bit_ceil_ul:
4849 case Builtin::BIstdc_bit_ceil_ull:
4850 case Builtin::BIstdc_bit_ceil:
4851 case Builtin::BI__builtin_stdc_bit_ceil:
4854 unsigned BitWidth = Val.getBitWidth();
4856 return APInt(BitWidth, 1);
4858 APInt ValMinusOne =
V - 1;
4859 unsigned LeadingZeros = ValMinusOne.countl_zero();
4860 if (LeadingZeros == 0)
4861 return APInt(BitWidth, 0);
4862 return APInt::getOneBitSet(BitWidth, BitWidth - LeadingZeros);
4865 case Builtin::BI__builtin_ffs:
4866 case Builtin::BI__builtin_ffsl:
4867 case Builtin::BI__builtin_ffsll:
4870 return APInt(Val.getBitWidth(),
4871 Val.isZero() ? 0u : Val.countTrailingZeros() + 1u);
4874 case Builtin::BIaddressof:
4875 case Builtin::BI__addressof:
4876 case Builtin::BI__builtin_addressof:
4880 case Builtin::BIas_const:
4881 case Builtin::BIforward:
4882 case Builtin::BIforward_like:
4883 case Builtin::BImove:
4884 case Builtin::BImove_if_noexcept:
4888 case Builtin::BI__builtin_eh_return_data_regno:
4891 case Builtin::BI__builtin_launder:
4895 case Builtin::BI__builtin_add_overflow:
4896 case Builtin::BI__builtin_sub_overflow:
4897 case Builtin::BI__builtin_mul_overflow:
4898 case Builtin::BI__builtin_sadd_overflow:
4899 case Builtin::BI__builtin_uadd_overflow:
4900 case Builtin::BI__builtin_uaddl_overflow:
4901 case Builtin::BI__builtin_uaddll_overflow:
4902 case Builtin::BI__builtin_usub_overflow:
4903 case Builtin::BI__builtin_usubl_overflow:
4904 case Builtin::BI__builtin_usubll_overflow:
4905 case Builtin::BI__builtin_umul_overflow:
4906 case Builtin::BI__builtin_umull_overflow:
4907 case Builtin::BI__builtin_umulll_overflow:
4908 case Builtin::BI__builtin_saddl_overflow:
4909 case Builtin::BI__builtin_saddll_overflow:
4910 case Builtin::BI__builtin_ssub_overflow:
4911 case Builtin::BI__builtin_ssubl_overflow:
4912 case Builtin::BI__builtin_ssubll_overflow:
4913 case Builtin::BI__builtin_smul_overflow:
4914 case Builtin::BI__builtin_smull_overflow:
4915 case Builtin::BI__builtin_smulll_overflow:
4918 case Builtin::BI__builtin_addcb:
4919 case Builtin::BI__builtin_addcs:
4920 case Builtin::BI__builtin_addc:
4921 case Builtin::BI__builtin_addcl:
4922 case Builtin::BI__builtin_addcll:
4923 case Builtin::BI__builtin_subcb:
4924 case Builtin::BI__builtin_subcs:
4925 case Builtin::BI__builtin_subc:
4926 case Builtin::BI__builtin_subcl:
4927 case Builtin::BI__builtin_subcll:
4930 case Builtin::BI__builtin_clz:
4931 case Builtin::BI__builtin_clzl:
4932 case Builtin::BI__builtin_clzll:
4933 case Builtin::BI__builtin_clzs:
4934 case Builtin::BI__builtin_clzg:
4935 case Builtin::BI__lzcnt16:
4936 case Builtin::BI__lzcnt:
4937 case Builtin::BI__lzcnt64:
4940 case Builtin::BI__builtin_ctz:
4941 case Builtin::BI__builtin_ctzl:
4942 case Builtin::BI__builtin_ctzll:
4943 case Builtin::BI__builtin_ctzs:
4944 case Builtin::BI__builtin_ctzg:
4947 case Builtin::BI__builtin_elementwise_clzg:
4948 case Builtin::BI__builtin_elementwise_ctzg:
4951 case Builtin::BI__builtin_bswapg:
4952 case Builtin::BI__builtin_bswap16:
4953 case Builtin::BI__builtin_bswap32:
4954 case Builtin::BI__builtin_bswap64:
4957 case Builtin::BI__atomic_always_lock_free:
4958 case Builtin::BI__atomic_is_lock_free:
4961 case Builtin::BI__c11_atomic_is_lock_free:
4964 case Builtin::BI__builtin_complex:
4967 case Builtin::BI__builtin_is_aligned:
4968 case Builtin::BI__builtin_align_up:
4969 case Builtin::BI__builtin_align_down:
4972 case Builtin::BI__builtin_assume_aligned:
4975 case clang::X86::BI__builtin_ia32_crc32qi:
4977 case clang::X86::BI__builtin_ia32_crc32hi:
4979 case clang::X86::BI__builtin_ia32_crc32si:
4981 case clang::X86::BI__builtin_ia32_crc32di:
4984 case clang::X86::BI__builtin_ia32_bextr_u32:
4985 case clang::X86::BI__builtin_ia32_bextr_u64:
4986 case clang::X86::BI__builtin_ia32_bextri_u32:
4987 case clang::X86::BI__builtin_ia32_bextri_u64:
4990 unsigned BitWidth = Val.getBitWidth();
4991 uint64_t Shift = Idx.extractBitsAsZExtValue(8, 0);
4992 uint64_t Length = Idx.extractBitsAsZExtValue(8, 8);
4993 if (Length > BitWidth) {
4998 if (Length == 0 || Shift >= BitWidth)
4999 return APInt(BitWidth, 0);
5001 uint64_t
Result = Val.getZExtValue() >> Shift;
5002 Result &= llvm::maskTrailingOnes<uint64_t>(Length);
5006 case clang::X86::BI__builtin_ia32_bzhi_si:
5007 case clang::X86::BI__builtin_ia32_bzhi_di:
5010 unsigned BitWidth = Val.getBitWidth();
5011 uint64_t Index = Idx.extractBitsAsZExtValue(8, 0);
5014 if (Index < BitWidth)
5015 Result.clearHighBits(BitWidth - Index);
5020 case clang::X86::BI__builtin_ia32_ktestcqi:
5021 case clang::X86::BI__builtin_ia32_ktestchi:
5022 case clang::X86::BI__builtin_ia32_ktestcsi:
5023 case clang::X86::BI__builtin_ia32_ktestcdi:
5026 return APInt(
sizeof(
unsigned char) * 8, (~A & B) == 0);
5029 case clang::X86::BI__builtin_ia32_ktestzqi:
5030 case clang::X86::BI__builtin_ia32_ktestzhi:
5031 case clang::X86::BI__builtin_ia32_ktestzsi:
5032 case clang::X86::BI__builtin_ia32_ktestzdi:
5035 return APInt(
sizeof(
unsigned char) * 8, (A & B) == 0);
5038 case clang::X86::BI__builtin_ia32_kortestcqi:
5039 case clang::X86::BI__builtin_ia32_kortestchi:
5040 case clang::X86::BI__builtin_ia32_kortestcsi:
5041 case clang::X86::BI__builtin_ia32_kortestcdi:
5044 return APInt(
sizeof(
unsigned char) * 8, ~(A | B) == 0);
5047 case clang::X86::BI__builtin_ia32_kortestzqi:
5048 case clang::X86::BI__builtin_ia32_kortestzhi:
5049 case clang::X86::BI__builtin_ia32_kortestzsi:
5050 case clang::X86::BI__builtin_ia32_kortestzdi:
5053 return APInt(
sizeof(
unsigned char) * 8, (A | B) == 0);
5056 case clang::X86::BI__builtin_ia32_kshiftliqi:
5057 case clang::X86::BI__builtin_ia32_kshiftlihi:
5058 case clang::X86::BI__builtin_ia32_kshiftlisi:
5059 case clang::X86::BI__builtin_ia32_kshiftlidi:
5062 unsigned Amt = RHS.getZExtValue() & 0xFF;
5063 if (Amt >= LHS.getBitWidth())
5064 return APInt::getZero(LHS.getBitWidth());
5065 return LHS.shl(Amt);
5068 case clang::X86::BI__builtin_ia32_kshiftriqi:
5069 case clang::X86::BI__builtin_ia32_kshiftrihi:
5070 case clang::X86::BI__builtin_ia32_kshiftrisi:
5071 case clang::X86::BI__builtin_ia32_kshiftridi:
5074 unsigned Amt = RHS.getZExtValue() & 0xFF;
5075 if (Amt >= LHS.getBitWidth())
5076 return APInt::getZero(LHS.getBitWidth());
5077 return LHS.lshr(Amt);
5080 case clang::X86::BI__builtin_ia32_lzcnt_u16:
5081 case clang::X86::BI__builtin_ia32_lzcnt_u32:
5082 case clang::X86::BI__builtin_ia32_lzcnt_u64:
5085 return APInt(Src.getBitWidth(), Src.countLeadingZeros());
5088 case clang::X86::BI__builtin_ia32_tzcnt_u16:
5089 case clang::X86::BI__builtin_ia32_tzcnt_u32:
5090 case clang::X86::BI__builtin_ia32_tzcnt_u64:
5093 return APInt(Src.getBitWidth(), Src.countTrailingZeros());
5096 case clang::X86::BI__builtin_ia32_pdep_si:
5097 case clang::X86::BI__builtin_ia32_pdep_di:
5100 unsigned BitWidth = Val.getBitWidth();
5103 for (
unsigned I = 0, P = 0; I != BitWidth; ++I) {
5105 Result.setBitVal(I, Val[P++]);
5111 case clang::X86::BI__builtin_ia32_pext_si:
5112 case clang::X86::BI__builtin_ia32_pext_di:
5115 unsigned BitWidth = Val.getBitWidth();
5118 for (
unsigned I = 0, P = 0; I != BitWidth; ++I) {
5120 Result.setBitVal(P++, Val[I]);
5126 case clang::X86::BI__builtin_ia32_addcarryx_u32:
5127 case clang::X86::BI__builtin_ia32_addcarryx_u64:
5131 case clang::X86::BI__builtin_ia32_subborrow_u32:
5132 case clang::X86::BI__builtin_ia32_subborrow_u64:
5136 case Builtin::BI__builtin_os_log_format_buffer_size:
5139 case Builtin::BI__builtin_ptrauth_string_discriminator:
5142 case Builtin::BI__builtin_infer_alloc_token:
5145 case Builtin::BI__noop:
5149 case Builtin::BI__builtin_operator_new:
5152 case Builtin::BI__builtin_operator_delete:
5155 case Builtin::BI__arithmetic_fence:
5158 case Builtin::BI__builtin_reduce_add:
5159 case Builtin::BI__builtin_reduce_mul:
5160 case Builtin::BI__builtin_reduce_and:
5161 case Builtin::BI__builtin_reduce_or:
5162 case Builtin::BI__builtin_reduce_xor:
5163 case Builtin::BI__builtin_reduce_min:
5164 case Builtin::BI__builtin_reduce_max:
5167 case Builtin::BI__builtin_elementwise_popcount:
5170 return APInt(Src.getBitWidth(), Src.popcount());
5172 case Builtin::BI__builtin_elementwise_bitreverse:
5174 S, OpPC,
Call, [](
const APSInt &Src) {
return Src.reverseBits(); });
5176 case Builtin::BI__builtin_elementwise_abs:
5179 case Builtin::BI__builtin_memcpy:
5180 case Builtin::BImemcpy:
5181 case Builtin::BI__builtin_wmemcpy:
5182 case Builtin::BIwmemcpy:
5183 case Builtin::BI__builtin_memmove:
5184 case Builtin::BImemmove:
5185 case Builtin::BI__builtin_wmemmove:
5186 case Builtin::BIwmemmove:
5189 case Builtin::BI__builtin_memcmp:
5190 case Builtin::BImemcmp:
5191 case Builtin::BI__builtin_bcmp:
5192 case Builtin::BIbcmp:
5193 case Builtin::BI__builtin_wmemcmp:
5194 case Builtin::BIwmemcmp:
5197 case Builtin::BImemchr:
5198 case Builtin::BI__builtin_memchr:
5199 case Builtin::BIstrchr:
5200 case Builtin::BI__builtin_strchr:
5201 case Builtin::BIwmemchr:
5202 case Builtin::BI__builtin_wmemchr:
5203 case Builtin::BIwcschr:
5204 case Builtin::BI__builtin_wcschr:
5205 case Builtin::BI__builtin_char_memchr:
5208 case Builtin::BI__builtin_object_size:
5209 case Builtin::BI__builtin_dynamic_object_size:
5212 case Builtin::BI__builtin_is_within_lifetime:
5215 case Builtin::BI__builtin_elementwise_add_sat:
5218 return LHS.isSigned() ? LHS.sadd_sat(RHS) : LHS.uadd_sat(RHS);
5221 case Builtin::BI__builtin_elementwise_sub_sat:
5224 return LHS.isSigned() ? LHS.ssub_sat(RHS) : LHS.usub_sat(RHS);
5226 case X86::BI__builtin_ia32_extract128i256:
5227 case X86::BI__builtin_ia32_vextractf128_pd256:
5228 case X86::BI__builtin_ia32_vextractf128_ps256:
5229 case X86::BI__builtin_ia32_vextractf128_si256:
5232 case X86::BI__builtin_ia32_extractf32x4_256_mask:
5233 case X86::BI__builtin_ia32_extractf32x4_mask:
5234 case X86::BI__builtin_ia32_extractf32x8_mask:
5235 case X86::BI__builtin_ia32_extractf64x2_256_mask:
5236 case X86::BI__builtin_ia32_extractf64x2_512_mask:
5237 case X86::BI__builtin_ia32_extractf64x4_mask:
5238 case X86::BI__builtin_ia32_extracti32x4_256_mask:
5239 case X86::BI__builtin_ia32_extracti32x4_mask:
5240 case X86::BI__builtin_ia32_extracti32x8_mask:
5241 case X86::BI__builtin_ia32_extracti64x2_256_mask:
5242 case X86::BI__builtin_ia32_extracti64x2_512_mask:
5243 case X86::BI__builtin_ia32_extracti64x4_mask:
5246 case clang::X86::BI__builtin_ia32_pmulhrsw128:
5247 case clang::X86::BI__builtin_ia32_pmulhrsw256:
5248 case clang::X86::BI__builtin_ia32_pmulhrsw512:
5251 return (llvm::APIntOps::mulsExtended(LHS, RHS).ashr(14) + 1)
5252 .extractBits(16, 1);
5255 case clang::X86::BI__builtin_ia32_movmskps:
5256 case clang::X86::BI__builtin_ia32_movmskpd:
5257 case clang::X86::BI__builtin_ia32_pmovmskb128:
5258 case clang::X86::BI__builtin_ia32_pmovmskb256:
5259 case clang::X86::BI__builtin_ia32_movmskps256:
5260 case clang::X86::BI__builtin_ia32_movmskpd256: {
5264 case X86::BI__builtin_ia32_psignb128:
5265 case X86::BI__builtin_ia32_psignb256:
5266 case X86::BI__builtin_ia32_psignw128:
5267 case X86::BI__builtin_ia32_psignw256:
5268 case X86::BI__builtin_ia32_psignd128:
5269 case X86::BI__builtin_ia32_psignd256:
5273 return APInt::getZero(AElem.getBitWidth());
5274 if (BElem.isNegative())
5279 case clang::X86::BI__builtin_ia32_pavgb128:
5280 case clang::X86::BI__builtin_ia32_pavgw128:
5281 case clang::X86::BI__builtin_ia32_pavgb256:
5282 case clang::X86::BI__builtin_ia32_pavgw256:
5283 case clang::X86::BI__builtin_ia32_pavgb512:
5284 case clang::X86::BI__builtin_ia32_pavgw512:
5286 llvm::APIntOps::avgCeilU);
5288 case clang::X86::BI__builtin_ia32_pmaddubsw128:
5289 case clang::X86::BI__builtin_ia32_pmaddubsw256:
5290 case clang::X86::BI__builtin_ia32_pmaddubsw512:
5295 unsigned BitWidth = 2 * LoLHS.getBitWidth();
5296 return (LoLHS.zext(BitWidth) * LoRHS.sext(BitWidth))
5297 .sadd_sat((HiLHS.zext(BitWidth) * HiRHS.sext(BitWidth)));
5300 case clang::X86::BI__builtin_ia32_pmaddwd128:
5301 case clang::X86::BI__builtin_ia32_pmaddwd256:
5302 case clang::X86::BI__builtin_ia32_pmaddwd512:
5307 unsigned BitWidth = 2 * LoLHS.getBitWidth();
5308 return (LoLHS.sext(BitWidth) * LoRHS.sext(BitWidth)) +
5309 (HiLHS.sext(BitWidth) * HiRHS.sext(BitWidth));
5312 case clang::X86::BI__builtin_ia32_dbpsadbw128:
5313 case clang::X86::BI__builtin_ia32_dbpsadbw256:
5314 case clang::X86::BI__builtin_ia32_dbpsadbw512:
5317 case clang::X86::BI__builtin_ia32_pmulhuw128:
5318 case clang::X86::BI__builtin_ia32_pmulhuw256:
5319 case clang::X86::BI__builtin_ia32_pmulhuw512:
5321 llvm::APIntOps::mulhu);
5323 case clang::X86::BI__builtin_ia32_pmulhw128:
5324 case clang::X86::BI__builtin_ia32_pmulhw256:
5325 case clang::X86::BI__builtin_ia32_pmulhw512:
5327 llvm::APIntOps::mulhs);
5329 case clang::X86::BI__builtin_ia32_psllv2di:
5330 case clang::X86::BI__builtin_ia32_psllv4di:
5331 case clang::X86::BI__builtin_ia32_psllv4si:
5332 case clang::X86::BI__builtin_ia32_psllv8di:
5333 case clang::X86::BI__builtin_ia32_psllv8hi:
5334 case clang::X86::BI__builtin_ia32_psllv8si:
5335 case clang::X86::BI__builtin_ia32_psllv16hi:
5336 case clang::X86::BI__builtin_ia32_psllv16si:
5337 case clang::X86::BI__builtin_ia32_psllv32hi:
5338 case clang::X86::BI__builtin_ia32_psllwi128:
5339 case clang::X86::BI__builtin_ia32_psllwi256:
5340 case clang::X86::BI__builtin_ia32_psllwi512:
5341 case clang::X86::BI__builtin_ia32_pslldi128:
5342 case clang::X86::BI__builtin_ia32_pslldi256:
5343 case clang::X86::BI__builtin_ia32_pslldi512:
5344 case clang::X86::BI__builtin_ia32_psllqi128:
5345 case clang::X86::BI__builtin_ia32_psllqi256:
5346 case clang::X86::BI__builtin_ia32_psllqi512:
5349 if (RHS.uge(LHS.getBitWidth())) {
5350 return APInt::getZero(LHS.getBitWidth());
5352 return LHS.shl(RHS.getZExtValue());
5355 case clang::X86::BI__builtin_ia32_psrav4si:
5356 case clang::X86::BI__builtin_ia32_psrav8di:
5357 case clang::X86::BI__builtin_ia32_psrav8hi:
5358 case clang::X86::BI__builtin_ia32_psrav8si:
5359 case clang::X86::BI__builtin_ia32_psrav16hi:
5360 case clang::X86::BI__builtin_ia32_psrav16si:
5361 case clang::X86::BI__builtin_ia32_psrav32hi:
5362 case clang::X86::BI__builtin_ia32_psravq128:
5363 case clang::X86::BI__builtin_ia32_psravq256:
5364 case clang::X86::BI__builtin_ia32_psrawi128:
5365 case clang::X86::BI__builtin_ia32_psrawi256:
5366 case clang::X86::BI__builtin_ia32_psrawi512:
5367 case clang::X86::BI__builtin_ia32_psradi128:
5368 case clang::X86::BI__builtin_ia32_psradi256:
5369 case clang::X86::BI__builtin_ia32_psradi512:
5370 case clang::X86::BI__builtin_ia32_psraqi128:
5371 case clang::X86::BI__builtin_ia32_psraqi256:
5372 case clang::X86::BI__builtin_ia32_psraqi512:
5375 if (RHS.uge(LHS.getBitWidth())) {
5376 return LHS.ashr(LHS.getBitWidth() - 1);
5378 return LHS.ashr(RHS.getZExtValue());
5381 case clang::X86::BI__builtin_ia32_psrlv2di:
5382 case clang::X86::BI__builtin_ia32_psrlv4di:
5383 case clang::X86::BI__builtin_ia32_psrlv4si:
5384 case clang::X86::BI__builtin_ia32_psrlv8di:
5385 case clang::X86::BI__builtin_ia32_psrlv8hi:
5386 case clang::X86::BI__builtin_ia32_psrlv8si:
5387 case clang::X86::BI__builtin_ia32_psrlv16hi:
5388 case clang::X86::BI__builtin_ia32_psrlv16si:
5389 case clang::X86::BI__builtin_ia32_psrlv32hi:
5390 case clang::X86::BI__builtin_ia32_psrlwi128:
5391 case clang::X86::BI__builtin_ia32_psrlwi256:
5392 case clang::X86::BI__builtin_ia32_psrlwi512:
5393 case clang::X86::BI__builtin_ia32_psrldi128:
5394 case clang::X86::BI__builtin_ia32_psrldi256:
5395 case clang::X86::BI__builtin_ia32_psrldi512:
5396 case clang::X86::BI__builtin_ia32_psrlqi128:
5397 case clang::X86::BI__builtin_ia32_psrlqi256:
5398 case clang::X86::BI__builtin_ia32_psrlqi512:
5401 if (RHS.uge(LHS.getBitWidth())) {
5402 return APInt::getZero(LHS.getBitWidth());
5404 return LHS.lshr(RHS.getZExtValue());
5406 case clang::X86::BI__builtin_ia32_packsswb128:
5407 case clang::X86::BI__builtin_ia32_packsswb256:
5408 case clang::X86::BI__builtin_ia32_packsswb512:
5409 case clang::X86::BI__builtin_ia32_packssdw128:
5410 case clang::X86::BI__builtin_ia32_packssdw256:
5411 case clang::X86::BI__builtin_ia32_packssdw512:
5413 return APInt(Src).truncSSat(Src.getBitWidth() / 2);
5415 case clang::X86::BI__builtin_ia32_packusdw128:
5416 case clang::X86::BI__builtin_ia32_packusdw256:
5417 case clang::X86::BI__builtin_ia32_packusdw512:
5418 case clang::X86::BI__builtin_ia32_packuswb128:
5419 case clang::X86::BI__builtin_ia32_packuswb256:
5420 case clang::X86::BI__builtin_ia32_packuswb512:
5422 return APInt(Src).truncSSatU(Src.getBitWidth() / 2);
5425 case clang::X86::BI__builtin_ia32_selectss_128:
5426 case clang::X86::BI__builtin_ia32_selectsd_128:
5427 case clang::X86::BI__builtin_ia32_selectsh_128:
5428 case clang::X86::BI__builtin_ia32_selectsbf_128:
5430 case clang::X86::BI__builtin_ia32_vprotbi:
5431 case clang::X86::BI__builtin_ia32_vprotdi:
5432 case clang::X86::BI__builtin_ia32_vprotqi:
5433 case clang::X86::BI__builtin_ia32_vprotwi:
5434 case clang::X86::BI__builtin_ia32_prold128:
5435 case clang::X86::BI__builtin_ia32_prold256:
5436 case clang::X86::BI__builtin_ia32_prold512:
5437 case clang::X86::BI__builtin_ia32_prolq128:
5438 case clang::X86::BI__builtin_ia32_prolq256:
5439 case clang::X86::BI__builtin_ia32_prolq512:
5442 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotl(RHS); });
5444 case clang::X86::BI__builtin_ia32_prord128:
5445 case clang::X86::BI__builtin_ia32_prord256:
5446 case clang::X86::BI__builtin_ia32_prord512:
5447 case clang::X86::BI__builtin_ia32_prorq128:
5448 case clang::X86::BI__builtin_ia32_prorq256:
5449 case clang::X86::BI__builtin_ia32_prorq512:
5452 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotr(RHS); });
5454 case Builtin::BI__builtin_elementwise_max:
5455 case Builtin::BI__builtin_elementwise_min:
5458 case clang::X86::BI__builtin_ia32_phaddw128:
5459 case clang::X86::BI__builtin_ia32_phaddw256:
5460 case clang::X86::BI__builtin_ia32_phaddd128:
5461 case clang::X86::BI__builtin_ia32_phaddd256:
5464 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
5465 case clang::X86::BI__builtin_ia32_phaddsw128:
5466 case clang::X86::BI__builtin_ia32_phaddsw256:
5469 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.sadd_sat(RHS); });
5470 case clang::X86::BI__builtin_ia32_phsubw128:
5471 case clang::X86::BI__builtin_ia32_phsubw256:
5472 case clang::X86::BI__builtin_ia32_phsubd128:
5473 case clang::X86::BI__builtin_ia32_phsubd256:
5476 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS - RHS; });
5477 case clang::X86::BI__builtin_ia32_phsubsw128:
5478 case clang::X86::BI__builtin_ia32_phsubsw256:
5481 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.ssub_sat(RHS); });
5482 case clang::X86::BI__builtin_ia32_haddpd:
5483 case clang::X86::BI__builtin_ia32_haddps:
5484 case clang::X86::BI__builtin_ia32_haddpd256:
5485 case clang::X86::BI__builtin_ia32_haddps256:
5488 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
5493 case clang::X86::BI__builtin_ia32_hsubpd:
5494 case clang::X86::BI__builtin_ia32_hsubps:
5495 case clang::X86::BI__builtin_ia32_hsubpd256:
5496 case clang::X86::BI__builtin_ia32_hsubps256:
5499 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
5501 F.subtract(RHS, RM);
5504 case clang::X86::BI__builtin_ia32_addsubpd:
5505 case clang::X86::BI__builtin_ia32_addsubps:
5506 case clang::X86::BI__builtin_ia32_addsubpd256:
5507 case clang::X86::BI__builtin_ia32_addsubps256:
5510 case clang::X86::BI__builtin_ia32_pmuldq128:
5511 case clang::X86::BI__builtin_ia32_pmuldq256:
5512 case clang::X86::BI__builtin_ia32_pmuldq512:
5517 return llvm::APIntOps::mulsExtended(LoLHS, LoRHS);
5520 case clang::X86::BI__builtin_ia32_pmuludq128:
5521 case clang::X86::BI__builtin_ia32_pmuludq256:
5522 case clang::X86::BI__builtin_ia32_pmuludq512:
5527 return llvm::APIntOps::muluExtended(LoLHS, LoRHS);
5530 case clang::X86::BI__builtin_ia32_pclmulqdq128:
5531 case clang::X86::BI__builtin_ia32_pclmulqdq256:
5532 case clang::X86::BI__builtin_ia32_pclmulqdq512:
5535 case Builtin::BI__builtin_elementwise_fma:
5539 llvm::RoundingMode RM) {
5541 F.fusedMultiplyAdd(Y, Z, RM);
5545 case X86::BI__builtin_ia32_vpmadd52luq128:
5546 case X86::BI__builtin_ia32_vpmadd52luq256:
5547 case X86::BI__builtin_ia32_vpmadd52luq512:
5550 return A + (B.trunc(52) *
C.trunc(52)).zext(64);
5552 case X86::BI__builtin_ia32_vpmadd52huq128:
5553 case X86::BI__builtin_ia32_vpmadd52huq256:
5554 case X86::BI__builtin_ia32_vpmadd52huq512:
5557 return A + llvm::APIntOps::mulhu(B.trunc(52),
C.trunc(52)).zext(64);
5560 case X86::BI__builtin_ia32_vpshldd128:
5561 case X86::BI__builtin_ia32_vpshldd256:
5562 case X86::BI__builtin_ia32_vpshldd512:
5563 case X86::BI__builtin_ia32_vpshldq128:
5564 case X86::BI__builtin_ia32_vpshldq256:
5565 case X86::BI__builtin_ia32_vpshldq512:
5566 case X86::BI__builtin_ia32_vpshldw128:
5567 case X86::BI__builtin_ia32_vpshldw256:
5568 case X86::BI__builtin_ia32_vpshldw512:
5572 return llvm::APIntOps::fshl(Hi, Lo, Amt);
5575 case X86::BI__builtin_ia32_vpshrdd128:
5576 case X86::BI__builtin_ia32_vpshrdd256:
5577 case X86::BI__builtin_ia32_vpshrdd512:
5578 case X86::BI__builtin_ia32_vpshrdq128:
5579 case X86::BI__builtin_ia32_vpshrdq256:
5580 case X86::BI__builtin_ia32_vpshrdq512:
5581 case X86::BI__builtin_ia32_vpshrdw128:
5582 case X86::BI__builtin_ia32_vpshrdw256:
5583 case X86::BI__builtin_ia32_vpshrdw512:
5588 return llvm::APIntOps::fshr(Hi, Lo, Amt);
5590 case X86::BI__builtin_ia32_vpconflictsi_128:
5591 case X86::BI__builtin_ia32_vpconflictsi_256:
5592 case X86::BI__builtin_ia32_vpconflictsi_512:
5593 case X86::BI__builtin_ia32_vpconflictdi_128:
5594 case X86::BI__builtin_ia32_vpconflictdi_256:
5595 case X86::BI__builtin_ia32_vpconflictdi_512:
5597 case X86::BI__builtin_ia32_compressdf128_mask:
5598 case X86::BI__builtin_ia32_compressdf256_mask:
5599 case X86::BI__builtin_ia32_compressdf512_mask:
5600 case X86::BI__builtin_ia32_compressdi128_mask:
5601 case X86::BI__builtin_ia32_compressdi256_mask:
5602 case X86::BI__builtin_ia32_compressdi512_mask:
5603 case X86::BI__builtin_ia32_compresshi128_mask:
5604 case X86::BI__builtin_ia32_compresshi256_mask:
5605 case X86::BI__builtin_ia32_compresshi512_mask:
5606 case X86::BI__builtin_ia32_compressqi128_mask:
5607 case X86::BI__builtin_ia32_compressqi256_mask:
5608 case X86::BI__builtin_ia32_compressqi512_mask:
5609 case X86::BI__builtin_ia32_compresssf128_mask:
5610 case X86::BI__builtin_ia32_compresssf256_mask:
5611 case X86::BI__builtin_ia32_compresssf512_mask:
5612 case X86::BI__builtin_ia32_compresssi128_mask:
5613 case X86::BI__builtin_ia32_compresssi256_mask:
5614 case X86::BI__builtin_ia32_compresssi512_mask: {
5616 Call->getArg(0)->getType()->castAs<
VectorType>()->getNumElements();
5618 S, OpPC,
Call, [NumElems](
unsigned DstIdx,
const APInt &ShuffleMask) {
5619 APInt CompressMask = ShuffleMask.trunc(NumElems);
5620 if (DstIdx < CompressMask.popcount()) {
5621 while (DstIdx != 0) {
5622 CompressMask = CompressMask & (CompressMask - 1);
5625 return std::pair<unsigned, int>{
5626 0,
static_cast<int>(CompressMask.countr_zero())};
5628 return std::pair<unsigned, int>{1,
static_cast<int>(DstIdx)};
5631 case X86::BI__builtin_ia32_expanddf128_mask:
5632 case X86::BI__builtin_ia32_expanddf256_mask:
5633 case X86::BI__builtin_ia32_expanddf512_mask:
5634 case X86::BI__builtin_ia32_expanddi128_mask:
5635 case X86::BI__builtin_ia32_expanddi256_mask:
5636 case X86::BI__builtin_ia32_expanddi512_mask:
5637 case X86::BI__builtin_ia32_expandhi128_mask:
5638 case X86::BI__builtin_ia32_expandhi256_mask:
5639 case X86::BI__builtin_ia32_expandhi512_mask:
5640 case X86::BI__builtin_ia32_expandqi128_mask:
5641 case X86::BI__builtin_ia32_expandqi256_mask:
5642 case X86::BI__builtin_ia32_expandqi512_mask:
5643 case X86::BI__builtin_ia32_expandsf128_mask:
5644 case X86::BI__builtin_ia32_expandsf256_mask:
5645 case X86::BI__builtin_ia32_expandsf512_mask:
5646 case X86::BI__builtin_ia32_expandsi128_mask:
5647 case X86::BI__builtin_ia32_expandsi256_mask:
5648 case X86::BI__builtin_ia32_expandsi512_mask: {
5650 S, OpPC,
Call, [](
unsigned DstIdx,
const APInt &ShuffleMask) {
5653 APInt ExpandMask = ShuffleMask.trunc(DstIdx + 1);
5654 if (ExpandMask[DstIdx]) {
5655 int SrcIdx = ExpandMask.popcount() - 1;
5656 return std::pair<unsigned, int>{0, SrcIdx};
5658 return std::pair<unsigned, int>{1,
static_cast<int>(DstIdx)};
5661 case clang::X86::BI__builtin_ia32_blendpd:
5662 case clang::X86::BI__builtin_ia32_blendpd256:
5663 case clang::X86::BI__builtin_ia32_blendps:
5664 case clang::X86::BI__builtin_ia32_blendps256:
5665 case clang::X86::BI__builtin_ia32_pblendw128:
5666 case clang::X86::BI__builtin_ia32_pblendw256:
5667 case clang::X86::BI__builtin_ia32_pblendd128:
5668 case clang::X86::BI__builtin_ia32_pblendd256:
5670 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5672 unsigned MaskBit = (ShuffleMask >> (DstIdx % 8)) & 0x1;
5673 unsigned SrcVecIdx = MaskBit ? 1 : 0;
5674 return std::pair<unsigned, int>{SrcVecIdx,
static_cast<int>(DstIdx)};
5679 case clang::X86::BI__builtin_ia32_blendvpd:
5680 case clang::X86::BI__builtin_ia32_blendvpd256:
5681 case clang::X86::BI__builtin_ia32_blendvps:
5682 case clang::X86::BI__builtin_ia32_blendvps256:
5686 llvm::RoundingMode) {
return C.isNegative() ? T : F; });
5688 case clang::X86::BI__builtin_ia32_pblendvb128:
5689 case clang::X86::BI__builtin_ia32_pblendvb256:
5692 return ((
APInt)
C).isNegative() ? T : F;
5694 case X86::BI__builtin_ia32_ptestz128:
5695 case X86::BI__builtin_ia32_ptestz256:
5696 case X86::BI__builtin_ia32_vtestzps:
5697 case X86::BI__builtin_ia32_vtestzps256:
5698 case X86::BI__builtin_ia32_vtestzpd:
5699 case X86::BI__builtin_ia32_vtestzpd256:
5702 [](
const APInt &A,
const APInt &B) {
return (A & B) == 0; });
5703 case X86::BI__builtin_ia32_ptestc128:
5704 case X86::BI__builtin_ia32_ptestc256:
5705 case X86::BI__builtin_ia32_vtestcps:
5706 case X86::BI__builtin_ia32_vtestcps256:
5707 case X86::BI__builtin_ia32_vtestcpd:
5708 case X86::BI__builtin_ia32_vtestcpd256:
5711 [](
const APInt &A,
const APInt &B) {
return (~A & B) == 0; });
5712 case X86::BI__builtin_ia32_ptestnzc128:
5713 case X86::BI__builtin_ia32_ptestnzc256:
5714 case X86::BI__builtin_ia32_vtestnzcps:
5715 case X86::BI__builtin_ia32_vtestnzcps256:
5716 case X86::BI__builtin_ia32_vtestnzcpd:
5717 case X86::BI__builtin_ia32_vtestnzcpd256:
5720 return ((A & B) != 0) && ((~A & B) != 0);
5722 case X86::BI__builtin_ia32_selectb_128:
5723 case X86::BI__builtin_ia32_selectb_256:
5724 case X86::BI__builtin_ia32_selectb_512:
5725 case X86::BI__builtin_ia32_selectw_128:
5726 case X86::BI__builtin_ia32_selectw_256:
5727 case X86::BI__builtin_ia32_selectw_512:
5728 case X86::BI__builtin_ia32_selectd_128:
5729 case X86::BI__builtin_ia32_selectd_256:
5730 case X86::BI__builtin_ia32_selectd_512:
5731 case X86::BI__builtin_ia32_selectq_128:
5732 case X86::BI__builtin_ia32_selectq_256:
5733 case X86::BI__builtin_ia32_selectq_512:
5734 case X86::BI__builtin_ia32_selectph_128:
5735 case X86::BI__builtin_ia32_selectph_256:
5736 case X86::BI__builtin_ia32_selectph_512:
5737 case X86::BI__builtin_ia32_selectpbf_128:
5738 case X86::BI__builtin_ia32_selectpbf_256:
5739 case X86::BI__builtin_ia32_selectpbf_512:
5740 case X86::BI__builtin_ia32_selectps_128:
5741 case X86::BI__builtin_ia32_selectps_256:
5742 case X86::BI__builtin_ia32_selectps_512:
5743 case X86::BI__builtin_ia32_selectpd_128:
5744 case X86::BI__builtin_ia32_selectpd_256:
5745 case X86::BI__builtin_ia32_selectpd_512:
5748 case X86::BI__builtin_ia32_shufps:
5749 case X86::BI__builtin_ia32_shufps256:
5750 case X86::BI__builtin_ia32_shufps512:
5752 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5753 unsigned NumElemPerLane = 4;
5754 unsigned NumSelectableElems = NumElemPerLane / 2;
5755 unsigned BitsPerElem = 2;
5756 unsigned IndexMask = 0x3;
5757 unsigned MaskBits = 8;
5758 unsigned Lane = DstIdx / NumElemPerLane;
5759 unsigned ElemInLane = DstIdx % NumElemPerLane;
5760 unsigned LaneOffset = Lane * NumElemPerLane;
5761 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
5762 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5763 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
5764 return std::pair<unsigned, int>{SrcIdx,
5765 static_cast<int>(LaneOffset + Index)};
5767 case X86::BI__builtin_ia32_shufpd:
5768 case X86::BI__builtin_ia32_shufpd256:
5769 case X86::BI__builtin_ia32_shufpd512:
5771 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5772 unsigned NumElemPerLane = 2;
5773 unsigned NumSelectableElems = NumElemPerLane / 2;
5774 unsigned BitsPerElem = 1;
5775 unsigned IndexMask = 0x1;
5776 unsigned MaskBits = 8;
5777 unsigned Lane = DstIdx / NumElemPerLane;
5778 unsigned ElemInLane = DstIdx % NumElemPerLane;
5779 unsigned LaneOffset = Lane * NumElemPerLane;
5780 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
5781 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5782 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
5783 return std::pair<unsigned, int>{SrcIdx,
5784 static_cast<int>(LaneOffset + Index)};
5787 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v16qi:
5788 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v32qi:
5789 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v64qi:
5791 case X86::BI__builtin_ia32_vgf2p8affineqb_v16qi:
5792 case X86::BI__builtin_ia32_vgf2p8affineqb_v32qi:
5793 case X86::BI__builtin_ia32_vgf2p8affineqb_v64qi:
5796 case X86::BI__builtin_ia32_vgf2p8mulb_v16qi:
5797 case X86::BI__builtin_ia32_vgf2p8mulb_v32qi:
5798 case X86::BI__builtin_ia32_vgf2p8mulb_v64qi:
5801 case X86::BI__builtin_ia32_insertps128:
5803 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Mask) {
5805 if ((Mask & (1 << DstIdx)) != 0) {
5806 return std::pair<unsigned, int>{0, -1};
5810 unsigned SrcElem = (Mask >> 6) & 0x3;
5811 unsigned DstElem = (Mask >> 4) & 0x3;
5812 if (DstIdx == DstElem) {
5814 return std::pair<unsigned, int>{1,
static_cast<int>(SrcElem)};
5817 return std::pair<unsigned, int>{0,
static_cast<int>(DstIdx)};
5820 case X86::BI__builtin_ia32_permvarsi256:
5821 case X86::BI__builtin_ia32_permvarsf256:
5822 case X86::BI__builtin_ia32_permvardf512:
5823 case X86::BI__builtin_ia32_permvardi512:
5824 case X86::BI__builtin_ia32_permvarhi128:
5826 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5827 int Offset = ShuffleMask & 0x7;
5828 return std::pair<unsigned, int>{0, Offset};
5830 case X86::BI__builtin_ia32_permvarqi128:
5831 case X86::BI__builtin_ia32_permvarhi256:
5832 case X86::BI__builtin_ia32_permvarsi512:
5833 case X86::BI__builtin_ia32_permvarsf512:
5835 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5836 int Offset = ShuffleMask & 0xF;
5837 return std::pair<unsigned, int>{0, Offset};
5839 case X86::BI__builtin_ia32_permvardi256:
5840 case X86::BI__builtin_ia32_permvardf256:
5842 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5843 int Offset = ShuffleMask & 0x3;
5844 return std::pair<unsigned, int>{0, Offset};
5846 case X86::BI__builtin_ia32_permvarqi256:
5847 case X86::BI__builtin_ia32_permvarhi512:
5849 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5850 int Offset = ShuffleMask & 0x1F;
5851 return std::pair<unsigned, int>{0, Offset};
5853 case X86::BI__builtin_ia32_permvarqi512:
5855 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5856 int Offset = ShuffleMask & 0x3F;
5857 return std::pair<unsigned, int>{0, Offset};
5859 case X86::BI__builtin_ia32_vpermi2varq128:
5860 case X86::BI__builtin_ia32_vpermi2varpd128:
5862 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5863 int Offset = ShuffleMask & 0x1;
5864 unsigned SrcIdx = (ShuffleMask >> 1) & 0x1;
5865 return std::pair<unsigned, int>{SrcIdx, Offset};
5867 case X86::BI__builtin_ia32_vpermi2vard128:
5868 case X86::BI__builtin_ia32_vpermi2varps128:
5869 case X86::BI__builtin_ia32_vpermi2varq256:
5870 case X86::BI__builtin_ia32_vpermi2varpd256:
5872 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5873 int Offset = ShuffleMask & 0x3;
5874 unsigned SrcIdx = (ShuffleMask >> 2) & 0x1;
5875 return std::pair<unsigned, int>{SrcIdx, Offset};
5877 case X86::BI__builtin_ia32_vpermi2varhi128:
5878 case X86::BI__builtin_ia32_vpermi2vard256:
5879 case X86::BI__builtin_ia32_vpermi2varps256:
5880 case X86::BI__builtin_ia32_vpermi2varq512:
5881 case X86::BI__builtin_ia32_vpermi2varpd512:
5883 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5884 int Offset = ShuffleMask & 0x7;
5885 unsigned SrcIdx = (ShuffleMask >> 3) & 0x1;
5886 return std::pair<unsigned, int>{SrcIdx, Offset};
5888 case X86::BI__builtin_ia32_vpermi2varqi128:
5889 case X86::BI__builtin_ia32_vpermi2varhi256:
5890 case X86::BI__builtin_ia32_vpermi2vard512:
5891 case X86::BI__builtin_ia32_vpermi2varps512:
5893 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5894 int Offset = ShuffleMask & 0xF;
5895 unsigned SrcIdx = (ShuffleMask >> 4) & 0x1;
5896 return std::pair<unsigned, int>{SrcIdx, Offset};
5898 case X86::BI__builtin_ia32_vpermi2varqi256:
5899 case X86::BI__builtin_ia32_vpermi2varhi512:
5901 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5902 int Offset = ShuffleMask & 0x1F;
5903 unsigned SrcIdx = (ShuffleMask >> 5) & 0x1;
5904 return std::pair<unsigned, int>{SrcIdx, Offset};
5906 case X86::BI__builtin_ia32_vpermi2varqi512:
5908 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5909 int Offset = ShuffleMask & 0x3F;
5910 unsigned SrcIdx = (ShuffleMask >> 6) & 0x1;
5911 return std::pair<unsigned, int>{SrcIdx, Offset};
5913 case X86::BI__builtin_ia32_vperm2f128_pd256:
5914 case X86::BI__builtin_ia32_vperm2f128_ps256:
5915 case X86::BI__builtin_ia32_vperm2f128_si256:
5916 case X86::BI__builtin_ia32_permti256: {
5917 unsigned NumElements =
5918 Call->getArg(0)->getType()->castAs<
VectorType>()->getNumElements();
5919 unsigned PreservedBitsCnt = NumElements >> 2;
5922 [PreservedBitsCnt](
unsigned DstIdx,
unsigned ShuffleMask) {
5923 unsigned ControlBitsCnt = DstIdx >> PreservedBitsCnt << 2;
5924 unsigned ControlBits = ShuffleMask >> ControlBitsCnt;
5926 if (ControlBits & 0b1000)
5927 return std::make_pair(0u, -1);
5929 unsigned SrcVecIdx = (ControlBits & 0b10) >> 1;
5930 unsigned PreservedBitsMask = (1 << PreservedBitsCnt) - 1;
5931 int SrcIdx = ((ControlBits & 0b1) << PreservedBitsCnt) |
5932 (DstIdx & PreservedBitsMask);
5933 return std::make_pair(SrcVecIdx, SrcIdx);
5936 case X86::BI__builtin_ia32_pshufb128:
5937 case X86::BI__builtin_ia32_pshufb256:
5938 case X86::BI__builtin_ia32_pshufb512:
5940 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5941 uint8_t Ctlb =
static_cast<uint8_t
>(ShuffleMask);
5943 return std::make_pair(0, -1);
5945 unsigned LaneBase = (DstIdx / 16) * 16;
5946 unsigned SrcOffset = Ctlb & 0x0F;
5947 unsigned SrcIdx = LaneBase + SrcOffset;
5948 return std::make_pair(0,
static_cast<int>(SrcIdx));
5951 case X86::BI__builtin_ia32_pshuflw:
5952 case X86::BI__builtin_ia32_pshuflw256:
5953 case X86::BI__builtin_ia32_pshuflw512:
5955 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5956 unsigned LaneBase = (DstIdx / 8) * 8;
5957 unsigned LaneIdx = DstIdx % 8;
5959 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
5960 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
5963 return std::make_pair(0,
static_cast<int>(DstIdx));
5966 case X86::BI__builtin_ia32_pshufhw:
5967 case X86::BI__builtin_ia32_pshufhw256:
5968 case X86::BI__builtin_ia32_pshufhw512:
5970 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5971 unsigned LaneBase = (DstIdx / 8) * 8;
5972 unsigned LaneIdx = DstIdx % 8;
5974 unsigned Sel = (ShuffleMask >> (2 * (LaneIdx - 4))) & 0x3;
5975 return std::make_pair(0,
static_cast<int>(LaneBase + 4 + Sel));
5978 return std::make_pair(0,
static_cast<int>(DstIdx));
5981 case X86::BI__builtin_ia32_pshufd:
5982 case X86::BI__builtin_ia32_pshufd256:
5983 case X86::BI__builtin_ia32_pshufd512:
5984 case X86::BI__builtin_ia32_vpermilps:
5985 case X86::BI__builtin_ia32_vpermilps256:
5986 case X86::BI__builtin_ia32_vpermilps512:
5988 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5989 unsigned LaneBase = (DstIdx / 4) * 4;
5990 unsigned LaneIdx = DstIdx % 4;
5991 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
5992 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
5995 case X86::BI__builtin_ia32_vpermilvarpd:
5996 case X86::BI__builtin_ia32_vpermilvarpd256:
5997 case X86::BI__builtin_ia32_vpermilvarpd512:
5999 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6000 unsigned NumElemPerLane = 2;
6001 unsigned Lane = DstIdx / NumElemPerLane;
6002 unsigned Offset = ShuffleMask & 0b10 ? 1 : 0;
6003 return std::make_pair(
6004 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
6007 case X86::BI__builtin_ia32_vpermilvarps:
6008 case X86::BI__builtin_ia32_vpermilvarps256:
6009 case X86::BI__builtin_ia32_vpermilvarps512:
6011 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6012 unsigned NumElemPerLane = 4;
6013 unsigned Lane = DstIdx / NumElemPerLane;
6014 unsigned Offset = ShuffleMask & 0b11;
6015 return std::make_pair(
6016 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
6019 case X86::BI__builtin_ia32_vpermilpd:
6020 case X86::BI__builtin_ia32_vpermilpd256:
6021 case X86::BI__builtin_ia32_vpermilpd512:
6023 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Control) {
6024 unsigned NumElemPerLane = 2;
6025 unsigned BitsPerElem = 1;
6026 unsigned MaskBits = 8;
6027 unsigned IndexMask = 0x1;
6028 unsigned Lane = DstIdx / NumElemPerLane;
6029 unsigned LaneOffset = Lane * NumElemPerLane;
6030 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
6031 unsigned Index = (Control >> BitIndex) & IndexMask;
6032 return std::make_pair(0,
static_cast<int>(LaneOffset + Index));
6035 case X86::BI__builtin_ia32_permdf256:
6036 case X86::BI__builtin_ia32_permdi256:
6038 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Control) {
6041 unsigned Index = (Control >> (2 * DstIdx)) & 0x3;
6042 return std::make_pair(0,
static_cast<int>(Index));
6045 case X86::BI__builtin_ia32_vpmultishiftqb128:
6046 case X86::BI__builtin_ia32_vpmultishiftqb256:
6047 case X86::BI__builtin_ia32_vpmultishiftqb512:
6049 case X86::BI__builtin_ia32_kandqi:
6050 case X86::BI__builtin_ia32_kandhi:
6051 case X86::BI__builtin_ia32_kandsi:
6052 case X86::BI__builtin_ia32_kanddi:
6055 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS & RHS; });
6057 case X86::BI__builtin_ia32_kandnqi:
6058 case X86::BI__builtin_ia32_kandnhi:
6059 case X86::BI__builtin_ia32_kandnsi:
6060 case X86::BI__builtin_ia32_kandndi:
6063 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~LHS & RHS; });
6065 case X86::BI__builtin_ia32_korqi:
6066 case X86::BI__builtin_ia32_korhi:
6067 case X86::BI__builtin_ia32_korsi:
6068 case X86::BI__builtin_ia32_kordi:
6071 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS | RHS; });
6073 case X86::BI__builtin_ia32_kxnorqi:
6074 case X86::BI__builtin_ia32_kxnorhi:
6075 case X86::BI__builtin_ia32_kxnorsi:
6076 case X86::BI__builtin_ia32_kxnordi:
6079 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~(LHS ^ RHS); });
6081 case X86::BI__builtin_ia32_kxorqi:
6082 case X86::BI__builtin_ia32_kxorhi:
6083 case X86::BI__builtin_ia32_kxorsi:
6084 case X86::BI__builtin_ia32_kxordi:
6087 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS ^ RHS; });
6089 case X86::BI__builtin_ia32_knotqi:
6090 case X86::BI__builtin_ia32_knothi:
6091 case X86::BI__builtin_ia32_knotsi:
6092 case X86::BI__builtin_ia32_knotdi:
6094 S, OpPC,
Call, [](
const APSInt &Src) {
return ~Src; });
6096 case X86::BI__builtin_ia32_kaddqi:
6097 case X86::BI__builtin_ia32_kaddhi:
6098 case X86::BI__builtin_ia32_kaddsi:
6099 case X86::BI__builtin_ia32_kadddi:
6102 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
6104 case X86::BI__builtin_ia32_kmovb:
6105 case X86::BI__builtin_ia32_kmovw:
6106 case X86::BI__builtin_ia32_kmovd:
6107 case X86::BI__builtin_ia32_kmovq:
6109 S, OpPC,
Call, [](
const APSInt &Src) {
return Src; });
6111 case X86::BI__builtin_ia32_kunpckhi:
6112 case X86::BI__builtin_ia32_kunpckdi:
6113 case X86::BI__builtin_ia32_kunpcksi:
6118 unsigned BW = A.getBitWidth();
6119 return APSInt(A.trunc(BW / 2).concat(B.trunc(BW / 2)),
6123 case X86::BI__builtin_ia32_phminposuw128:
6126 case X86::BI__builtin_ia32_psraq128:
6127 case X86::BI__builtin_ia32_psraq256:
6128 case X86::BI__builtin_ia32_psraq512:
6129 case X86::BI__builtin_ia32_psrad128:
6130 case X86::BI__builtin_ia32_psrad256:
6131 case X86::BI__builtin_ia32_psrad512:
6132 case X86::BI__builtin_ia32_psraw128:
6133 case X86::BI__builtin_ia32_psraw256:
6134 case X86::BI__builtin_ia32_psraw512:
6137 [](
const APInt &Elt, uint64_t Count) {
return Elt.ashr(Count); },
6138 [](
const APInt &Elt,
unsigned Width) {
return Elt.ashr(Width - 1); });
6140 case X86::BI__builtin_ia32_psllq128:
6141 case X86::BI__builtin_ia32_psllq256:
6142 case X86::BI__builtin_ia32_psllq512:
6143 case X86::BI__builtin_ia32_pslld128:
6144 case X86::BI__builtin_ia32_pslld256:
6145 case X86::BI__builtin_ia32_pslld512:
6146 case X86::BI__builtin_ia32_psllw128:
6147 case X86::BI__builtin_ia32_psllw256:
6148 case X86::BI__builtin_ia32_psllw512:
6151 [](
const APInt &Elt, uint64_t Count) {
return Elt.shl(Count); },
6152 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
6154 case X86::BI__builtin_ia32_psrlq128:
6155 case X86::BI__builtin_ia32_psrlq256:
6156 case X86::BI__builtin_ia32_psrlq512:
6157 case X86::BI__builtin_ia32_psrld128:
6158 case X86::BI__builtin_ia32_psrld256:
6159 case X86::BI__builtin_ia32_psrld512:
6160 case X86::BI__builtin_ia32_psrlw128:
6161 case X86::BI__builtin_ia32_psrlw256:
6162 case X86::BI__builtin_ia32_psrlw512:
6165 [](
const APInt &Elt, uint64_t Count) {
return Elt.lshr(Count); },
6166 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
6168 case X86::BI__builtin_ia32_pternlogd128_mask:
6169 case X86::BI__builtin_ia32_pternlogd256_mask:
6170 case X86::BI__builtin_ia32_pternlogd512_mask:
6171 case X86::BI__builtin_ia32_pternlogq128_mask:
6172 case X86::BI__builtin_ia32_pternlogq256_mask:
6173 case X86::BI__builtin_ia32_pternlogq512_mask:
6175 case X86::BI__builtin_ia32_pternlogd128_maskz:
6176 case X86::BI__builtin_ia32_pternlogd256_maskz:
6177 case X86::BI__builtin_ia32_pternlogd512_maskz:
6178 case X86::BI__builtin_ia32_pternlogq128_maskz:
6179 case X86::BI__builtin_ia32_pternlogq256_maskz:
6180 case X86::BI__builtin_ia32_pternlogq512_maskz:
6182 case Builtin::BI__builtin_elementwise_fshl:
6184 llvm::APIntOps::fshl);
6185 case Builtin::BI__builtin_elementwise_fshr:
6187 llvm::APIntOps::fshr);
6189 case X86::BI__builtin_ia32_shuf_f32x4_256:
6190 case X86::BI__builtin_ia32_shuf_i32x4_256:
6191 case X86::BI__builtin_ia32_shuf_f64x2_256:
6192 case X86::BI__builtin_ia32_shuf_i64x2_256:
6193 case X86::BI__builtin_ia32_shuf_f32x4:
6194 case X86::BI__builtin_ia32_shuf_i32x4:
6195 case X86::BI__builtin_ia32_shuf_f64x2:
6196 case X86::BI__builtin_ia32_shuf_i64x2: {
6202 unsigned LaneBits = 128u;
6203 unsigned NumLanes = (NumElems * ElemBits) / LaneBits;
6204 unsigned NumElemsPerLane = LaneBits / ElemBits;
6208 [NumLanes, NumElemsPerLane](
unsigned DstIdx,
unsigned ShuffleMask) {
6210 unsigned BitsPerElem = NumLanes / 2;
6211 unsigned IndexMask = (1u << BitsPerElem) - 1;
6212 unsigned Lane = DstIdx / NumElemsPerLane;
6213 unsigned SrcIdx = (Lane < NumLanes / 2) ? 0 : 1;
6214 unsigned BitIdx = BitsPerElem * Lane;
6215 unsigned SrcLaneIdx = (ShuffleMask >> BitIdx) & IndexMask;
6216 unsigned ElemInLane = DstIdx % NumElemsPerLane;
6217 unsigned IdxToPick = SrcLaneIdx * NumElemsPerLane + ElemInLane;
6218 return std::pair<unsigned, int>{SrcIdx, IdxToPick};
6222 case X86::BI__builtin_ia32_insertf32x4_256:
6223 case X86::BI__builtin_ia32_inserti32x4_256:
6224 case X86::BI__builtin_ia32_insertf64x2_256:
6225 case X86::BI__builtin_ia32_inserti64x2_256:
6226 case X86::BI__builtin_ia32_insertf32x4:
6227 case X86::BI__builtin_ia32_inserti32x4:
6228 case X86::BI__builtin_ia32_insertf64x2_512:
6229 case X86::BI__builtin_ia32_inserti64x2_512:
6230 case X86::BI__builtin_ia32_insertf32x8:
6231 case X86::BI__builtin_ia32_inserti32x8:
6232 case X86::BI__builtin_ia32_insertf64x4:
6233 case X86::BI__builtin_ia32_inserti64x4:
6234 case X86::BI__builtin_ia32_vinsertf128_ps256:
6235 case X86::BI__builtin_ia32_vinsertf128_pd256:
6236 case X86::BI__builtin_ia32_vinsertf128_si256:
6237 case X86::BI__builtin_ia32_insert128i256:
6240 case clang::X86::BI__builtin_ia32_vcvtps2ph:
6241 case clang::X86::BI__builtin_ia32_vcvtps2ph256:
6244 case X86::BI__builtin_ia32_vec_ext_v4hi:
6245 case X86::BI__builtin_ia32_vec_ext_v16qi:
6246 case X86::BI__builtin_ia32_vec_ext_v8hi:
6247 case X86::BI__builtin_ia32_vec_ext_v4si:
6248 case X86::BI__builtin_ia32_vec_ext_v2di:
6249 case X86::BI__builtin_ia32_vec_ext_v32qi:
6250 case X86::BI__builtin_ia32_vec_ext_v16hi:
6251 case X86::BI__builtin_ia32_vec_ext_v8si:
6252 case X86::BI__builtin_ia32_vec_ext_v4di:
6253 case X86::BI__builtin_ia32_vec_ext_v4sf:
6256 case X86::BI__builtin_ia32_vec_set_v4hi:
6257 case X86::BI__builtin_ia32_vec_set_v16qi:
6258 case X86::BI__builtin_ia32_vec_set_v8hi:
6259 case X86::BI__builtin_ia32_vec_set_v4si:
6260 case X86::BI__builtin_ia32_vec_set_v2di:
6261 case X86::BI__builtin_ia32_vec_set_v32qi:
6262 case X86::BI__builtin_ia32_vec_set_v16hi:
6263 case X86::BI__builtin_ia32_vec_set_v8si:
6264 case X86::BI__builtin_ia32_vec_set_v4di:
6267 case X86::BI__builtin_ia32_cvtb2mask128:
6268 case X86::BI__builtin_ia32_cvtb2mask256:
6269 case X86::BI__builtin_ia32_cvtb2mask512:
6270 case X86::BI__builtin_ia32_cvtw2mask128:
6271 case X86::BI__builtin_ia32_cvtw2mask256:
6272 case X86::BI__builtin_ia32_cvtw2mask512:
6273 case X86::BI__builtin_ia32_cvtd2mask128:
6274 case X86::BI__builtin_ia32_cvtd2mask256:
6275 case X86::BI__builtin_ia32_cvtd2mask512:
6276 case X86::BI__builtin_ia32_cvtq2mask128:
6277 case X86::BI__builtin_ia32_cvtq2mask256:
6278 case X86::BI__builtin_ia32_cvtq2mask512:
6281 case X86::BI__builtin_ia32_cvtmask2b128:
6282 case X86::BI__builtin_ia32_cvtmask2b256:
6283 case X86::BI__builtin_ia32_cvtmask2b512:
6284 case X86::BI__builtin_ia32_cvtmask2w128:
6285 case X86::BI__builtin_ia32_cvtmask2w256:
6286 case X86::BI__builtin_ia32_cvtmask2w512:
6287 case X86::BI__builtin_ia32_cvtmask2d128:
6288 case X86::BI__builtin_ia32_cvtmask2d256:
6289 case X86::BI__builtin_ia32_cvtmask2d512:
6290 case X86::BI__builtin_ia32_cvtmask2q128:
6291 case X86::BI__builtin_ia32_cvtmask2q256:
6292 case X86::BI__builtin_ia32_cvtmask2q512:
6295 case X86::BI__builtin_ia32_cvtsd2ss:
6298 case X86::BI__builtin_ia32_cvtsd2ss_round_mask:
6301 case X86::BI__builtin_ia32_cvtpd2ps:
6302 case X86::BI__builtin_ia32_cvtpd2ps256:
6304 case X86::BI__builtin_ia32_cvtpd2ps_mask:
6306 case X86::BI__builtin_ia32_cvtpd2ps512_mask:
6309 case X86::BI__builtin_ia32_cmpb128_mask:
6310 case X86::BI__builtin_ia32_cmpw128_mask:
6311 case X86::BI__builtin_ia32_cmpd128_mask:
6312 case X86::BI__builtin_ia32_cmpq128_mask:
6313 case X86::BI__builtin_ia32_cmpb256_mask:
6314 case X86::BI__builtin_ia32_cmpw256_mask:
6315 case X86::BI__builtin_ia32_cmpd256_mask:
6316 case X86::BI__builtin_ia32_cmpq256_mask:
6317 case X86::BI__builtin_ia32_cmpb512_mask:
6318 case X86::BI__builtin_ia32_cmpw512_mask:
6319 case X86::BI__builtin_ia32_cmpd512_mask:
6320 case X86::BI__builtin_ia32_cmpq512_mask:
6324 case X86::BI__builtin_ia32_ucmpb128_mask:
6325 case X86::BI__builtin_ia32_ucmpw128_mask:
6326 case X86::BI__builtin_ia32_ucmpd128_mask:
6327 case X86::BI__builtin_ia32_ucmpq128_mask:
6328 case X86::BI__builtin_ia32_ucmpb256_mask:
6329 case X86::BI__builtin_ia32_ucmpw256_mask:
6330 case X86::BI__builtin_ia32_ucmpd256_mask:
6331 case X86::BI__builtin_ia32_ucmpq256_mask:
6332 case X86::BI__builtin_ia32_ucmpb512_mask:
6333 case X86::BI__builtin_ia32_ucmpw512_mask:
6334 case X86::BI__builtin_ia32_ucmpd512_mask:
6335 case X86::BI__builtin_ia32_ucmpq512_mask:
6339 case X86::BI__builtin_ia32_vpshufbitqmb128_mask:
6340 case X86::BI__builtin_ia32_vpshufbitqmb256_mask:
6341 case X86::BI__builtin_ia32_vpshufbitqmb512_mask:
6344 case X86::BI__builtin_ia32_pslldqi128_byteshift:
6345 case X86::BI__builtin_ia32_pslldqi256_byteshift:
6346 case X86::BI__builtin_ia32_pslldqi512_byteshift:
6353 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
6354 unsigned LaneBase = (DstIdx / 16) * 16;
6355 unsigned LaneIdx = DstIdx % 16;
6356 if (LaneIdx < Shift)
6357 return std::make_pair(0, -1);
6359 return std::make_pair(0,
6360 static_cast<int>(LaneBase + LaneIdx - Shift));
6363 case X86::BI__builtin_ia32_psrldqi128_byteshift:
6364 case X86::BI__builtin_ia32_psrldqi256_byteshift:
6365 case X86::BI__builtin_ia32_psrldqi512_byteshift:
6372 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
6373 unsigned LaneBase = (DstIdx / 16) * 16;
6374 unsigned LaneIdx = DstIdx % 16;
6375 if (LaneIdx + Shift < 16)
6376 return std::make_pair(0,
6377 static_cast<int>(LaneBase + LaneIdx + Shift));
6379 return std::make_pair(0, -1);
6382 case X86::BI__builtin_ia32_palignr128:
6383 case X86::BI__builtin_ia32_palignr256:
6384 case X86::BI__builtin_ia32_palignr512:
6386 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Shift) {
6388 unsigned VecIdx = 1;
6391 int Lane = DstIdx / 16;
6392 int Offset = DstIdx % 16;
6395 unsigned ShiftedIdx = Offset + (Shift & 0xFF);
6396 if (ShiftedIdx < 16) {
6397 ElemIdx = ShiftedIdx + (Lane * 16);
6398 }
else if (ShiftedIdx < 32) {
6400 ElemIdx = (ShiftedIdx - 16) + (Lane * 16);
6403 return std::pair<unsigned, int>{VecIdx, ElemIdx};
6406 case X86::BI__builtin_ia32_alignd128:
6407 case X86::BI__builtin_ia32_alignd256:
6408 case X86::BI__builtin_ia32_alignd512:
6409 case X86::BI__builtin_ia32_alignq128:
6410 case X86::BI__builtin_ia32_alignq256:
6411 case X86::BI__builtin_ia32_alignq512: {
6412 unsigned NumElems =
Call->getType()->castAs<
VectorType>()->getNumElements();
6414 S, OpPC,
Call, [NumElems](
unsigned DstIdx,
unsigned Shift) {
6415 unsigned Imm = Shift & 0xFF;
6416 unsigned EffectiveShift = Imm & (NumElems - 1);
6417 unsigned SourcePos = DstIdx + EffectiveShift;
6418 unsigned VecIdx = SourcePos < NumElems ? 1u : 0u;
6419 unsigned ElemIdx = SourcePos & (NumElems - 1);
6420 return std::pair<unsigned, int>{VecIdx,
static_cast<int>(ElemIdx)};
6424 case clang::X86::BI__builtin_ia32_minps:
6425 case clang::X86::BI__builtin_ia32_minpd:
6426 case clang::X86::BI__builtin_ia32_minph128:
6427 case clang::X86::BI__builtin_ia32_minph256:
6428 case clang::X86::BI__builtin_ia32_minps256:
6429 case clang::X86::BI__builtin_ia32_minpd256:
6430 case clang::X86::BI__builtin_ia32_minps512:
6431 case clang::X86::BI__builtin_ia32_minpd512:
6432 case clang::X86::BI__builtin_ia32_minph512:
6436 std::optional<APSInt>) -> std::optional<APFloat> {
6437 if (A.isNaN() || A.isInfinity() || A.isDenormal() || B.isNaN() ||
6438 B.isInfinity() || B.isDenormal())
6439 return std::nullopt;
6440 if (A.isZero() && B.isZero())
6442 return llvm::minimum(A, B);
6445 case clang::X86::BI__builtin_ia32_minss:
6446 case clang::X86::BI__builtin_ia32_minsd:
6450 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
6455 case clang::X86::BI__builtin_ia32_minsd_round_mask:
6456 case clang::X86::BI__builtin_ia32_minss_round_mask:
6457 case clang::X86::BI__builtin_ia32_minsh_round_mask:
6458 case clang::X86::BI__builtin_ia32_maxsd_round_mask:
6459 case clang::X86::BI__builtin_ia32_maxss_round_mask:
6460 case clang::X86::BI__builtin_ia32_maxsh_round_mask: {
6461 bool IsMin = BuiltinID == clang::X86::BI__builtin_ia32_minsd_round_mask ||
6462 BuiltinID == clang::X86::BI__builtin_ia32_minss_round_mask ||
6463 BuiltinID == clang::X86::BI__builtin_ia32_minsh_round_mask;
6467 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
6472 case clang::X86::BI__builtin_ia32_maxps:
6473 case clang::X86::BI__builtin_ia32_maxpd:
6474 case clang::X86::BI__builtin_ia32_maxph128:
6475 case clang::X86::BI__builtin_ia32_maxph256:
6476 case clang::X86::BI__builtin_ia32_maxps256:
6477 case clang::X86::BI__builtin_ia32_maxpd256:
6478 case clang::X86::BI__builtin_ia32_maxps512:
6479 case clang::X86::BI__builtin_ia32_maxpd512:
6480 case clang::X86::BI__builtin_ia32_maxph512:
6484 std::optional<APSInt>) -> std::optional<APFloat> {
6485 if (A.isNaN() || A.isInfinity() || A.isDenormal() || B.isNaN() ||
6486 B.isInfinity() || B.isDenormal())
6487 return std::nullopt;
6488 if (A.isZero() && B.isZero())
6490 return llvm::maximum(A, B);
6493 case clang::X86::BI__builtin_ia32_maxss:
6494 case clang::X86::BI__builtin_ia32_maxsd:
6498 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
6505 diag::note_invalid_subexpr_in_const_expr)
6511 llvm_unreachable(
"Unhandled builtin ID");