4186 uint32_t BuiltinID) {
4191 switch (BuiltinID) {
4192 case Builtin::BI__builtin_is_constant_evaluated:
4195 case Builtin::BI__builtin_assume:
4196 case Builtin::BI__assume:
4199 case Builtin::BI__builtin_strcmp:
4200 case Builtin::BIstrcmp:
4201 case Builtin::BI__builtin_strncmp:
4202 case Builtin::BIstrncmp:
4203 case Builtin::BI__builtin_wcsncmp:
4204 case Builtin::BIwcsncmp:
4205 case Builtin::BI__builtin_wcscmp:
4206 case Builtin::BIwcscmp:
4209 case Builtin::BI__builtin_strlen:
4210 case Builtin::BIstrlen:
4211 case Builtin::BI__builtin_wcslen:
4212 case Builtin::BIwcslen:
4215 case Builtin::BI__builtin_nan:
4216 case Builtin::BI__builtin_nanf:
4217 case Builtin::BI__builtin_nanl:
4218 case Builtin::BI__builtin_nanf16:
4219 case Builtin::BI__builtin_nanf128:
4222 case Builtin::BI__builtin_nans:
4223 case Builtin::BI__builtin_nansf:
4224 case Builtin::BI__builtin_nansl:
4225 case Builtin::BI__builtin_nansf16:
4226 case Builtin::BI__builtin_nansf128:
4229 case Builtin::BI__builtin_huge_val:
4230 case Builtin::BI__builtin_huge_valf:
4231 case Builtin::BI__builtin_huge_vall:
4232 case Builtin::BI__builtin_huge_valf16:
4233 case Builtin::BI__builtin_huge_valf128:
4234 case Builtin::BI__builtin_inf:
4235 case Builtin::BI__builtin_inff:
4236 case Builtin::BI__builtin_infl:
4237 case Builtin::BI__builtin_inff16:
4238 case Builtin::BI__builtin_inff128:
4241 case Builtin::BI__builtin_copysign:
4242 case Builtin::BI__builtin_copysignf:
4243 case Builtin::BI__builtin_copysignl:
4244 case Builtin::BI__builtin_copysignf128:
4247 case Builtin::BI__builtin_fmin:
4248 case Builtin::BI__builtin_fminf:
4249 case Builtin::BI__builtin_fminl:
4250 case Builtin::BI__builtin_fminf16:
4251 case Builtin::BI__builtin_fminf128:
4254 case Builtin::BI__builtin_fminimum_num:
4255 case Builtin::BI__builtin_fminimum_numf:
4256 case Builtin::BI__builtin_fminimum_numl:
4257 case Builtin::BI__builtin_fminimum_numf16:
4258 case Builtin::BI__builtin_fminimum_numf128:
4261 case Builtin::BI__builtin_fmax:
4262 case Builtin::BI__builtin_fmaxf:
4263 case Builtin::BI__builtin_fmaxl:
4264 case Builtin::BI__builtin_fmaxf16:
4265 case Builtin::BI__builtin_fmaxf128:
4268 case Builtin::BI__builtin_fmaximum_num:
4269 case Builtin::BI__builtin_fmaximum_numf:
4270 case Builtin::BI__builtin_fmaximum_numl:
4271 case Builtin::BI__builtin_fmaximum_numf16:
4272 case Builtin::BI__builtin_fmaximum_numf128:
4275 case Builtin::BI__builtin_isnan:
4278 case Builtin::BI__builtin_issignaling:
4281 case Builtin::BI__builtin_isinf:
4284 case Builtin::BI__builtin_isinf_sign:
4287 case Builtin::BI__builtin_isfinite:
4290 case Builtin::BI__builtin_isnormal:
4293 case Builtin::BI__builtin_issubnormal:
4296 case Builtin::BI__builtin_iszero:
4299 case Builtin::BI__builtin_signbit:
4300 case Builtin::BI__builtin_signbitf:
4301 case Builtin::BI__builtin_signbitl:
4304 case Builtin::BI__builtin_isgreater:
4305 case Builtin::BI__builtin_isgreaterequal:
4306 case Builtin::BI__builtin_isless:
4307 case Builtin::BI__builtin_islessequal:
4308 case Builtin::BI__builtin_islessgreater:
4309 case Builtin::BI__builtin_isunordered:
4312 case Builtin::BI__builtin_isfpclass:
4315 case Builtin::BI__builtin_fpclassify:
4318 case Builtin::BI__builtin_fabs:
4319 case Builtin::BI__builtin_fabsf:
4320 case Builtin::BI__builtin_fabsl:
4321 case Builtin::BI__builtin_fabsf128:
4324 case Builtin::BI__builtin_abs:
4325 case Builtin::BI__builtin_labs:
4326 case Builtin::BI__builtin_llabs:
4329 case Builtin::BI__builtin_popcount:
4330 case Builtin::BI__builtin_popcountl:
4331 case Builtin::BI__builtin_popcountll:
4332 case Builtin::BI__builtin_popcountg:
4333 case Builtin::BI__popcnt16:
4334 case Builtin::BI__popcnt:
4335 case Builtin::BI__popcnt64:
4338 case Builtin::BI__builtin_parity:
4339 case Builtin::BI__builtin_parityl:
4340 case Builtin::BI__builtin_parityll:
4343 return APInt(Val.getBitWidth(), Val.popcount() % 2);
4345 case Builtin::BI__builtin_clrsb:
4346 case Builtin::BI__builtin_clrsbl:
4347 case Builtin::BI__builtin_clrsbll:
4350 return APInt(Val.getBitWidth(),
4351 Val.getBitWidth() - Val.getSignificantBits());
4353 case Builtin::BI__builtin_bitreverseg:
4354 case Builtin::BI__builtin_bitreverse8:
4355 case Builtin::BI__builtin_bitreverse16:
4356 case Builtin::BI__builtin_bitreverse32:
4357 case Builtin::BI__builtin_bitreverse64:
4359 S, OpPC,
Call, [](
const APSInt &Val) {
return Val.reverseBits(); });
4361 case Builtin::BI__builtin_classify_type:
4364 case Builtin::BI__builtin_expect:
4365 case Builtin::BI__builtin_expect_with_probability:
4368 case Builtin::BI__builtin_rotateleft8:
4369 case Builtin::BI__builtin_rotateleft16:
4370 case Builtin::BI__builtin_rotateleft32:
4371 case Builtin::BI__builtin_rotateleft64:
4372 case Builtin::BI__builtin_stdc_rotate_left:
4373 case Builtin::BI_rotl8:
4374 case Builtin::BI_rotl16:
4375 case Builtin::BI_rotl:
4376 case Builtin::BI_lrotl:
4377 case Builtin::BI_rotl64:
4378 case Builtin::BI__builtin_rotateright8:
4379 case Builtin::BI__builtin_rotateright16:
4380 case Builtin::BI__builtin_rotateright32:
4381 case Builtin::BI__builtin_rotateright64:
4382 case Builtin::BI__builtin_stdc_rotate_right:
4383 case Builtin::BI_rotr8:
4384 case Builtin::BI_rotr16:
4385 case Builtin::BI_rotr:
4386 case Builtin::BI_lrotr:
4387 case Builtin::BI_rotr64: {
4390 switch (BuiltinID) {
4391 case Builtin::BI__builtin_rotateright8:
4392 case Builtin::BI__builtin_rotateright16:
4393 case Builtin::BI__builtin_rotateright32:
4394 case Builtin::BI__builtin_rotateright64:
4395 case Builtin::BI__builtin_stdc_rotate_right:
4396 case Builtin::BI_rotr8:
4397 case Builtin::BI_rotr16:
4398 case Builtin::BI_rotr:
4399 case Builtin::BI_lrotr:
4400 case Builtin::BI_rotr64:
4401 IsRotateRight =
true;
4404 IsRotateRight =
false;
4411 return IsRotateRight ?
Value.rotr(Amount.getZExtValue())
4412 :
Value.rotl(Amount.getZExtValue());
4416 case Builtin::BIstdc_leading_zeros:
4417 case Builtin::BI__builtin_stdc_leading_zeros: {
4420 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4421 return APInt(ResWidth, Val.countl_zero());
4425 case Builtin::BIstdc_leading_ones:
4426 case Builtin::BI__builtin_stdc_leading_ones: {
4429 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4430 return APInt(ResWidth, Val.countl_one());
4434 case Builtin::BIstdc_trailing_zeros:
4435 case Builtin::BI__builtin_stdc_trailing_zeros: {
4438 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4439 return APInt(ResWidth, Val.countr_zero());
4443 case Builtin::BIstdc_trailing_ones:
4444 case Builtin::BI__builtin_stdc_trailing_ones: {
4447 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4448 return APInt(ResWidth, Val.countr_one());
4452 case Builtin::BIstdc_first_leading_zero:
4453 case Builtin::BI__builtin_stdc_first_leading_zero: {
4456 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4457 return APInt(ResWidth, Val.isAllOnes() ? 0 : Val.countl_one() + 1);
4461 case Builtin::BIstdc_first_leading_one:
4462 case Builtin::BI__builtin_stdc_first_leading_one: {
4465 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4466 return APInt(ResWidth, Val.isZero() ? 0 : Val.countl_zero() + 1);
4470 case Builtin::BIstdc_first_trailing_zero:
4471 case Builtin::BI__builtin_stdc_first_trailing_zero: {
4474 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4475 return APInt(ResWidth, Val.isAllOnes() ? 0 : Val.countr_one() + 1);
4479 case Builtin::BIstdc_first_trailing_one:
4480 case Builtin::BI__builtin_stdc_first_trailing_one: {
4483 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4484 return APInt(ResWidth, Val.isZero() ? 0 : Val.countr_zero() + 1);
4488 case Builtin::BIstdc_count_zeros:
4489 case Builtin::BI__builtin_stdc_count_zeros: {
4492 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4493 unsigned BitWidth = Val.getBitWidth();
4494 return APInt(ResWidth, BitWidth - Val.popcount());
4498 case Builtin::BIstdc_count_ones:
4499 case Builtin::BI__builtin_stdc_count_ones: {
4502 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4503 return APInt(ResWidth, Val.popcount());
4507 case Builtin::BIstdc_has_single_bit:
4508 case Builtin::BI__builtin_stdc_has_single_bit: {
4511 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4512 return APInt(ResWidth, Val.popcount() == 1 ? 1 : 0);
4516 case Builtin::BIstdc_bit_width:
4517 case Builtin::BI__builtin_stdc_bit_width: {
4520 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4521 unsigned BitWidth = Val.getBitWidth();
4522 return APInt(ResWidth, BitWidth - Val.countl_zero());
4526 case Builtin::BIstdc_bit_floor:
4527 case Builtin::BI__builtin_stdc_bit_floor:
4530 unsigned BitWidth = Val.getBitWidth();
4532 return APInt::getZero(BitWidth);
4533 return APInt::getOneBitSet(BitWidth,
4534 BitWidth - Val.countl_zero() - 1);
4537 case Builtin::BIstdc_bit_ceil:
4538 case Builtin::BI__builtin_stdc_bit_ceil:
4541 unsigned BitWidth = Val.getBitWidth();
4543 return APInt(BitWidth, 1);
4545 APInt ValMinusOne =
V - 1;
4546 unsigned LeadingZeros = ValMinusOne.countl_zero();
4547 if (LeadingZeros == 0)
4548 return APInt(BitWidth, 0);
4549 return APInt::getOneBitSet(BitWidth, BitWidth - LeadingZeros);
4552 case Builtin::BI__builtin_ffs:
4553 case Builtin::BI__builtin_ffsl:
4554 case Builtin::BI__builtin_ffsll:
4557 return APInt(Val.getBitWidth(),
4558 Val.isZero() ? 0u : Val.countTrailingZeros() + 1u);
4561 case Builtin::BIaddressof:
4562 case Builtin::BI__addressof:
4563 case Builtin::BI__builtin_addressof:
4567 case Builtin::BIas_const:
4568 case Builtin::BIforward:
4569 case Builtin::BIforward_like:
4570 case Builtin::BImove:
4571 case Builtin::BImove_if_noexcept:
4575 case Builtin::BI__builtin_eh_return_data_regno:
4578 case Builtin::BI__builtin_launder:
4582 case Builtin::BI__builtin_add_overflow:
4583 case Builtin::BI__builtin_sub_overflow:
4584 case Builtin::BI__builtin_mul_overflow:
4585 case Builtin::BI__builtin_sadd_overflow:
4586 case Builtin::BI__builtin_uadd_overflow:
4587 case Builtin::BI__builtin_uaddl_overflow:
4588 case Builtin::BI__builtin_uaddll_overflow:
4589 case Builtin::BI__builtin_usub_overflow:
4590 case Builtin::BI__builtin_usubl_overflow:
4591 case Builtin::BI__builtin_usubll_overflow:
4592 case Builtin::BI__builtin_umul_overflow:
4593 case Builtin::BI__builtin_umull_overflow:
4594 case Builtin::BI__builtin_umulll_overflow:
4595 case Builtin::BI__builtin_saddl_overflow:
4596 case Builtin::BI__builtin_saddll_overflow:
4597 case Builtin::BI__builtin_ssub_overflow:
4598 case Builtin::BI__builtin_ssubl_overflow:
4599 case Builtin::BI__builtin_ssubll_overflow:
4600 case Builtin::BI__builtin_smul_overflow:
4601 case Builtin::BI__builtin_smull_overflow:
4602 case Builtin::BI__builtin_smulll_overflow:
4605 case Builtin::BI__builtin_addcb:
4606 case Builtin::BI__builtin_addcs:
4607 case Builtin::BI__builtin_addc:
4608 case Builtin::BI__builtin_addcl:
4609 case Builtin::BI__builtin_addcll:
4610 case Builtin::BI__builtin_subcb:
4611 case Builtin::BI__builtin_subcs:
4612 case Builtin::BI__builtin_subc:
4613 case Builtin::BI__builtin_subcl:
4614 case Builtin::BI__builtin_subcll:
4617 case Builtin::BI__builtin_clz:
4618 case Builtin::BI__builtin_clzl:
4619 case Builtin::BI__builtin_clzll:
4620 case Builtin::BI__builtin_clzs:
4621 case Builtin::BI__builtin_clzg:
4622 case Builtin::BI__lzcnt16:
4623 case Builtin::BI__lzcnt:
4624 case Builtin::BI__lzcnt64:
4627 case Builtin::BI__builtin_ctz:
4628 case Builtin::BI__builtin_ctzl:
4629 case Builtin::BI__builtin_ctzll:
4630 case Builtin::BI__builtin_ctzs:
4631 case Builtin::BI__builtin_ctzg:
4634 case Builtin::BI__builtin_elementwise_clzg:
4635 case Builtin::BI__builtin_elementwise_ctzg:
4638 case Builtin::BI__builtin_bswapg:
4639 case Builtin::BI__builtin_bswap16:
4640 case Builtin::BI__builtin_bswap32:
4641 case Builtin::BI__builtin_bswap64:
4644 case Builtin::BI__atomic_always_lock_free:
4645 case Builtin::BI__atomic_is_lock_free:
4648 case Builtin::BI__c11_atomic_is_lock_free:
4651 case Builtin::BI__builtin_complex:
4654 case Builtin::BI__builtin_is_aligned:
4655 case Builtin::BI__builtin_align_up:
4656 case Builtin::BI__builtin_align_down:
4659 case Builtin::BI__builtin_assume_aligned:
4662 case clang::X86::BI__builtin_ia32_crc32qi:
4664 case clang::X86::BI__builtin_ia32_crc32hi:
4666 case clang::X86::BI__builtin_ia32_crc32si:
4668 case clang::X86::BI__builtin_ia32_crc32di:
4671 case clang::X86::BI__builtin_ia32_bextr_u32:
4672 case clang::X86::BI__builtin_ia32_bextr_u64:
4673 case clang::X86::BI__builtin_ia32_bextri_u32:
4674 case clang::X86::BI__builtin_ia32_bextri_u64:
4677 unsigned BitWidth = Val.getBitWidth();
4678 uint64_t Shift = Idx.extractBitsAsZExtValue(8, 0);
4679 uint64_t Length = Idx.extractBitsAsZExtValue(8, 8);
4680 if (Length > BitWidth) {
4685 if (Length == 0 || Shift >= BitWidth)
4686 return APInt(BitWidth, 0);
4688 uint64_t
Result = Val.getZExtValue() >> Shift;
4689 Result &= llvm::maskTrailingOnes<uint64_t>(Length);
4693 case clang::X86::BI__builtin_ia32_bzhi_si:
4694 case clang::X86::BI__builtin_ia32_bzhi_di:
4697 unsigned BitWidth = Val.getBitWidth();
4698 uint64_t Index = Idx.extractBitsAsZExtValue(8, 0);
4701 if (Index < BitWidth)
4702 Result.clearHighBits(BitWidth - Index);
4707 case clang::X86::BI__builtin_ia32_ktestcqi:
4708 case clang::X86::BI__builtin_ia32_ktestchi:
4709 case clang::X86::BI__builtin_ia32_ktestcsi:
4710 case clang::X86::BI__builtin_ia32_ktestcdi:
4713 return APInt(
sizeof(
unsigned char) * 8, (~A & B) == 0);
4716 case clang::X86::BI__builtin_ia32_ktestzqi:
4717 case clang::X86::BI__builtin_ia32_ktestzhi:
4718 case clang::X86::BI__builtin_ia32_ktestzsi:
4719 case clang::X86::BI__builtin_ia32_ktestzdi:
4722 return APInt(
sizeof(
unsigned char) * 8, (A & B) == 0);
4725 case clang::X86::BI__builtin_ia32_kortestcqi:
4726 case clang::X86::BI__builtin_ia32_kortestchi:
4727 case clang::X86::BI__builtin_ia32_kortestcsi:
4728 case clang::X86::BI__builtin_ia32_kortestcdi:
4731 return APInt(
sizeof(
unsigned char) * 8, ~(A | B) == 0);
4734 case clang::X86::BI__builtin_ia32_kortestzqi:
4735 case clang::X86::BI__builtin_ia32_kortestzhi:
4736 case clang::X86::BI__builtin_ia32_kortestzsi:
4737 case clang::X86::BI__builtin_ia32_kortestzdi:
4740 return APInt(
sizeof(
unsigned char) * 8, (A | B) == 0);
4743 case clang::X86::BI__builtin_ia32_kshiftliqi:
4744 case clang::X86::BI__builtin_ia32_kshiftlihi:
4745 case clang::X86::BI__builtin_ia32_kshiftlisi:
4746 case clang::X86::BI__builtin_ia32_kshiftlidi:
4749 unsigned Amt = RHS.getZExtValue() & 0xFF;
4750 if (Amt >= LHS.getBitWidth())
4751 return APInt::getZero(LHS.getBitWidth());
4752 return LHS.shl(Amt);
4755 case clang::X86::BI__builtin_ia32_kshiftriqi:
4756 case clang::X86::BI__builtin_ia32_kshiftrihi:
4757 case clang::X86::BI__builtin_ia32_kshiftrisi:
4758 case clang::X86::BI__builtin_ia32_kshiftridi:
4761 unsigned Amt = RHS.getZExtValue() & 0xFF;
4762 if (Amt >= LHS.getBitWidth())
4763 return APInt::getZero(LHS.getBitWidth());
4764 return LHS.lshr(Amt);
4767 case clang::X86::BI__builtin_ia32_lzcnt_u16:
4768 case clang::X86::BI__builtin_ia32_lzcnt_u32:
4769 case clang::X86::BI__builtin_ia32_lzcnt_u64:
4772 return APInt(Src.getBitWidth(), Src.countLeadingZeros());
4775 case clang::X86::BI__builtin_ia32_tzcnt_u16:
4776 case clang::X86::BI__builtin_ia32_tzcnt_u32:
4777 case clang::X86::BI__builtin_ia32_tzcnt_u64:
4780 return APInt(Src.getBitWidth(), Src.countTrailingZeros());
4783 case clang::X86::BI__builtin_ia32_pdep_si:
4784 case clang::X86::BI__builtin_ia32_pdep_di:
4787 unsigned BitWidth = Val.getBitWidth();
4790 for (
unsigned I = 0, P = 0; I != BitWidth; ++I) {
4792 Result.setBitVal(I, Val[P++]);
4798 case clang::X86::BI__builtin_ia32_pext_si:
4799 case clang::X86::BI__builtin_ia32_pext_di:
4802 unsigned BitWidth = Val.getBitWidth();
4805 for (
unsigned I = 0, P = 0; I != BitWidth; ++I) {
4807 Result.setBitVal(P++, Val[I]);
4813 case clang::X86::BI__builtin_ia32_addcarryx_u32:
4814 case clang::X86::BI__builtin_ia32_addcarryx_u64:
4815 case clang::X86::BI__builtin_ia32_subborrow_u32:
4816 case clang::X86::BI__builtin_ia32_subborrow_u64:
4820 case Builtin::BI__builtin_os_log_format_buffer_size:
4823 case Builtin::BI__builtin_ptrauth_string_discriminator:
4826 case Builtin::BI__builtin_infer_alloc_token:
4829 case Builtin::BI__noop:
4833 case Builtin::BI__builtin_operator_new:
4836 case Builtin::BI__builtin_operator_delete:
4839 case Builtin::BI__arithmetic_fence:
4842 case Builtin::BI__builtin_reduce_add:
4843 case Builtin::BI__builtin_reduce_mul:
4844 case Builtin::BI__builtin_reduce_and:
4845 case Builtin::BI__builtin_reduce_or:
4846 case Builtin::BI__builtin_reduce_xor:
4847 case Builtin::BI__builtin_reduce_min:
4848 case Builtin::BI__builtin_reduce_max:
4851 case Builtin::BI__builtin_elementwise_popcount:
4854 return APInt(Src.getBitWidth(), Src.popcount());
4856 case Builtin::BI__builtin_elementwise_bitreverse:
4858 S, OpPC,
Call, [](
const APSInt &Src) {
return Src.reverseBits(); });
4860 case Builtin::BI__builtin_elementwise_abs:
4863 case Builtin::BI__builtin_memcpy:
4864 case Builtin::BImemcpy:
4865 case Builtin::BI__builtin_wmemcpy:
4866 case Builtin::BIwmemcpy:
4867 case Builtin::BI__builtin_memmove:
4868 case Builtin::BImemmove:
4869 case Builtin::BI__builtin_wmemmove:
4870 case Builtin::BIwmemmove:
4873 case Builtin::BI__builtin_memcmp:
4874 case Builtin::BImemcmp:
4875 case Builtin::BI__builtin_bcmp:
4876 case Builtin::BIbcmp:
4877 case Builtin::BI__builtin_wmemcmp:
4878 case Builtin::BIwmemcmp:
4881 case Builtin::BImemchr:
4882 case Builtin::BI__builtin_memchr:
4883 case Builtin::BIstrchr:
4884 case Builtin::BI__builtin_strchr:
4885 case Builtin::BIwmemchr:
4886 case Builtin::BI__builtin_wmemchr:
4887 case Builtin::BIwcschr:
4888 case Builtin::BI__builtin_wcschr:
4889 case Builtin::BI__builtin_char_memchr:
4892 case Builtin::BI__builtin_object_size:
4893 case Builtin::BI__builtin_dynamic_object_size:
4896 case Builtin::BI__builtin_is_within_lifetime:
4899 case Builtin::BI__builtin_elementwise_add_sat:
4902 return LHS.isSigned() ? LHS.sadd_sat(RHS) : LHS.uadd_sat(RHS);
4905 case Builtin::BI__builtin_elementwise_sub_sat:
4908 return LHS.isSigned() ? LHS.ssub_sat(RHS) : LHS.usub_sat(RHS);
4910 case X86::BI__builtin_ia32_extract128i256:
4911 case X86::BI__builtin_ia32_vextractf128_pd256:
4912 case X86::BI__builtin_ia32_vextractf128_ps256:
4913 case X86::BI__builtin_ia32_vextractf128_si256:
4916 case X86::BI__builtin_ia32_extractf32x4_256_mask:
4917 case X86::BI__builtin_ia32_extractf32x4_mask:
4918 case X86::BI__builtin_ia32_extractf32x8_mask:
4919 case X86::BI__builtin_ia32_extractf64x2_256_mask:
4920 case X86::BI__builtin_ia32_extractf64x2_512_mask:
4921 case X86::BI__builtin_ia32_extractf64x4_mask:
4922 case X86::BI__builtin_ia32_extracti32x4_256_mask:
4923 case X86::BI__builtin_ia32_extracti32x4_mask:
4924 case X86::BI__builtin_ia32_extracti32x8_mask:
4925 case X86::BI__builtin_ia32_extracti64x2_256_mask:
4926 case X86::BI__builtin_ia32_extracti64x2_512_mask:
4927 case X86::BI__builtin_ia32_extracti64x4_mask:
4930 case clang::X86::BI__builtin_ia32_pmulhrsw128:
4931 case clang::X86::BI__builtin_ia32_pmulhrsw256:
4932 case clang::X86::BI__builtin_ia32_pmulhrsw512:
4935 return (llvm::APIntOps::mulsExtended(LHS, RHS).ashr(14) + 1)
4936 .extractBits(16, 1);
4939 case clang::X86::BI__builtin_ia32_movmskps:
4940 case clang::X86::BI__builtin_ia32_movmskpd:
4941 case clang::X86::BI__builtin_ia32_pmovmskb128:
4942 case clang::X86::BI__builtin_ia32_pmovmskb256:
4943 case clang::X86::BI__builtin_ia32_movmskps256:
4944 case clang::X86::BI__builtin_ia32_movmskpd256: {
4948 case X86::BI__builtin_ia32_psignb128:
4949 case X86::BI__builtin_ia32_psignb256:
4950 case X86::BI__builtin_ia32_psignw128:
4951 case X86::BI__builtin_ia32_psignw256:
4952 case X86::BI__builtin_ia32_psignd128:
4953 case X86::BI__builtin_ia32_psignd256:
4957 return APInt::getZero(AElem.getBitWidth());
4958 if (BElem.isNegative())
4963 case clang::X86::BI__builtin_ia32_pavgb128:
4964 case clang::X86::BI__builtin_ia32_pavgw128:
4965 case clang::X86::BI__builtin_ia32_pavgb256:
4966 case clang::X86::BI__builtin_ia32_pavgw256:
4967 case clang::X86::BI__builtin_ia32_pavgb512:
4968 case clang::X86::BI__builtin_ia32_pavgw512:
4970 llvm::APIntOps::avgCeilU);
4972 case clang::X86::BI__builtin_ia32_pmaddubsw128:
4973 case clang::X86::BI__builtin_ia32_pmaddubsw256:
4974 case clang::X86::BI__builtin_ia32_pmaddubsw512:
4979 unsigned BitWidth = 2 * LoLHS.getBitWidth();
4980 return (LoLHS.zext(BitWidth) * LoRHS.sext(BitWidth))
4981 .sadd_sat((HiLHS.zext(BitWidth) * HiRHS.sext(BitWidth)));
4984 case clang::X86::BI__builtin_ia32_pmaddwd128:
4985 case clang::X86::BI__builtin_ia32_pmaddwd256:
4986 case clang::X86::BI__builtin_ia32_pmaddwd512:
4991 unsigned BitWidth = 2 * LoLHS.getBitWidth();
4992 return (LoLHS.sext(BitWidth) * LoRHS.sext(BitWidth)) +
4993 (HiLHS.sext(BitWidth) * HiRHS.sext(BitWidth));
4996 case clang::X86::BI__builtin_ia32_pmulhuw128:
4997 case clang::X86::BI__builtin_ia32_pmulhuw256:
4998 case clang::X86::BI__builtin_ia32_pmulhuw512:
5000 llvm::APIntOps::mulhu);
5002 case clang::X86::BI__builtin_ia32_pmulhw128:
5003 case clang::X86::BI__builtin_ia32_pmulhw256:
5004 case clang::X86::BI__builtin_ia32_pmulhw512:
5006 llvm::APIntOps::mulhs);
5008 case clang::X86::BI__builtin_ia32_psllv2di:
5009 case clang::X86::BI__builtin_ia32_psllv4di:
5010 case clang::X86::BI__builtin_ia32_psllv4si:
5011 case clang::X86::BI__builtin_ia32_psllv8di:
5012 case clang::X86::BI__builtin_ia32_psllv8hi:
5013 case clang::X86::BI__builtin_ia32_psllv8si:
5014 case clang::X86::BI__builtin_ia32_psllv16hi:
5015 case clang::X86::BI__builtin_ia32_psllv16si:
5016 case clang::X86::BI__builtin_ia32_psllv32hi:
5017 case clang::X86::BI__builtin_ia32_psllwi128:
5018 case clang::X86::BI__builtin_ia32_psllwi256:
5019 case clang::X86::BI__builtin_ia32_psllwi512:
5020 case clang::X86::BI__builtin_ia32_pslldi128:
5021 case clang::X86::BI__builtin_ia32_pslldi256:
5022 case clang::X86::BI__builtin_ia32_pslldi512:
5023 case clang::X86::BI__builtin_ia32_psllqi128:
5024 case clang::X86::BI__builtin_ia32_psllqi256:
5025 case clang::X86::BI__builtin_ia32_psllqi512:
5028 if (RHS.uge(LHS.getBitWidth())) {
5029 return APInt::getZero(LHS.getBitWidth());
5031 return LHS.shl(RHS.getZExtValue());
5034 case clang::X86::BI__builtin_ia32_psrav4si:
5035 case clang::X86::BI__builtin_ia32_psrav8di:
5036 case clang::X86::BI__builtin_ia32_psrav8hi:
5037 case clang::X86::BI__builtin_ia32_psrav8si:
5038 case clang::X86::BI__builtin_ia32_psrav16hi:
5039 case clang::X86::BI__builtin_ia32_psrav16si:
5040 case clang::X86::BI__builtin_ia32_psrav32hi:
5041 case clang::X86::BI__builtin_ia32_psravq128:
5042 case clang::X86::BI__builtin_ia32_psravq256:
5043 case clang::X86::BI__builtin_ia32_psrawi128:
5044 case clang::X86::BI__builtin_ia32_psrawi256:
5045 case clang::X86::BI__builtin_ia32_psrawi512:
5046 case clang::X86::BI__builtin_ia32_psradi128:
5047 case clang::X86::BI__builtin_ia32_psradi256:
5048 case clang::X86::BI__builtin_ia32_psradi512:
5049 case clang::X86::BI__builtin_ia32_psraqi128:
5050 case clang::X86::BI__builtin_ia32_psraqi256:
5051 case clang::X86::BI__builtin_ia32_psraqi512:
5054 if (RHS.uge(LHS.getBitWidth())) {
5055 return LHS.ashr(LHS.getBitWidth() - 1);
5057 return LHS.ashr(RHS.getZExtValue());
5060 case clang::X86::BI__builtin_ia32_psrlv2di:
5061 case clang::X86::BI__builtin_ia32_psrlv4di:
5062 case clang::X86::BI__builtin_ia32_psrlv4si:
5063 case clang::X86::BI__builtin_ia32_psrlv8di:
5064 case clang::X86::BI__builtin_ia32_psrlv8hi:
5065 case clang::X86::BI__builtin_ia32_psrlv8si:
5066 case clang::X86::BI__builtin_ia32_psrlv16hi:
5067 case clang::X86::BI__builtin_ia32_psrlv16si:
5068 case clang::X86::BI__builtin_ia32_psrlv32hi:
5069 case clang::X86::BI__builtin_ia32_psrlwi128:
5070 case clang::X86::BI__builtin_ia32_psrlwi256:
5071 case clang::X86::BI__builtin_ia32_psrlwi512:
5072 case clang::X86::BI__builtin_ia32_psrldi128:
5073 case clang::X86::BI__builtin_ia32_psrldi256:
5074 case clang::X86::BI__builtin_ia32_psrldi512:
5075 case clang::X86::BI__builtin_ia32_psrlqi128:
5076 case clang::X86::BI__builtin_ia32_psrlqi256:
5077 case clang::X86::BI__builtin_ia32_psrlqi512:
5080 if (RHS.uge(LHS.getBitWidth())) {
5081 return APInt::getZero(LHS.getBitWidth());
5083 return LHS.lshr(RHS.getZExtValue());
5085 case clang::X86::BI__builtin_ia32_packsswb128:
5086 case clang::X86::BI__builtin_ia32_packsswb256:
5087 case clang::X86::BI__builtin_ia32_packsswb512:
5088 case clang::X86::BI__builtin_ia32_packssdw128:
5089 case clang::X86::BI__builtin_ia32_packssdw256:
5090 case clang::X86::BI__builtin_ia32_packssdw512:
5092 return APInt(Src).truncSSat(Src.getBitWidth() / 2);
5094 case clang::X86::BI__builtin_ia32_packusdw128:
5095 case clang::X86::BI__builtin_ia32_packusdw256:
5096 case clang::X86::BI__builtin_ia32_packusdw512:
5097 case clang::X86::BI__builtin_ia32_packuswb128:
5098 case clang::X86::BI__builtin_ia32_packuswb256:
5099 case clang::X86::BI__builtin_ia32_packuswb512:
5101 return APInt(Src).truncSSatU(Src.getBitWidth() / 2);
5104 case clang::X86::BI__builtin_ia32_selectss_128:
5105 case clang::X86::BI__builtin_ia32_selectsd_128:
5106 case clang::X86::BI__builtin_ia32_selectsh_128:
5107 case clang::X86::BI__builtin_ia32_selectsbf_128:
5109 case clang::X86::BI__builtin_ia32_vprotbi:
5110 case clang::X86::BI__builtin_ia32_vprotdi:
5111 case clang::X86::BI__builtin_ia32_vprotqi:
5112 case clang::X86::BI__builtin_ia32_vprotwi:
5113 case clang::X86::BI__builtin_ia32_prold128:
5114 case clang::X86::BI__builtin_ia32_prold256:
5115 case clang::X86::BI__builtin_ia32_prold512:
5116 case clang::X86::BI__builtin_ia32_prolq128:
5117 case clang::X86::BI__builtin_ia32_prolq256:
5118 case clang::X86::BI__builtin_ia32_prolq512:
5121 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotl(RHS); });
5123 case clang::X86::BI__builtin_ia32_prord128:
5124 case clang::X86::BI__builtin_ia32_prord256:
5125 case clang::X86::BI__builtin_ia32_prord512:
5126 case clang::X86::BI__builtin_ia32_prorq128:
5127 case clang::X86::BI__builtin_ia32_prorq256:
5128 case clang::X86::BI__builtin_ia32_prorq512:
5131 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotr(RHS); });
5133 case Builtin::BI__builtin_elementwise_max:
5134 case Builtin::BI__builtin_elementwise_min:
5137 case clang::X86::BI__builtin_ia32_phaddw128:
5138 case clang::X86::BI__builtin_ia32_phaddw256:
5139 case clang::X86::BI__builtin_ia32_phaddd128:
5140 case clang::X86::BI__builtin_ia32_phaddd256:
5143 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
5144 case clang::X86::BI__builtin_ia32_phaddsw128:
5145 case clang::X86::BI__builtin_ia32_phaddsw256:
5148 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.sadd_sat(RHS); });
5149 case clang::X86::BI__builtin_ia32_phsubw128:
5150 case clang::X86::BI__builtin_ia32_phsubw256:
5151 case clang::X86::BI__builtin_ia32_phsubd128:
5152 case clang::X86::BI__builtin_ia32_phsubd256:
5155 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS - RHS; });
5156 case clang::X86::BI__builtin_ia32_phsubsw128:
5157 case clang::X86::BI__builtin_ia32_phsubsw256:
5160 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.ssub_sat(RHS); });
5161 case clang::X86::BI__builtin_ia32_haddpd:
5162 case clang::X86::BI__builtin_ia32_haddps:
5163 case clang::X86::BI__builtin_ia32_haddpd256:
5164 case clang::X86::BI__builtin_ia32_haddps256:
5167 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
5172 case clang::X86::BI__builtin_ia32_hsubpd:
5173 case clang::X86::BI__builtin_ia32_hsubps:
5174 case clang::X86::BI__builtin_ia32_hsubpd256:
5175 case clang::X86::BI__builtin_ia32_hsubps256:
5178 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
5180 F.subtract(RHS, RM);
5183 case clang::X86::BI__builtin_ia32_addsubpd:
5184 case clang::X86::BI__builtin_ia32_addsubps:
5185 case clang::X86::BI__builtin_ia32_addsubpd256:
5186 case clang::X86::BI__builtin_ia32_addsubps256:
5189 case clang::X86::BI__builtin_ia32_pmuldq128:
5190 case clang::X86::BI__builtin_ia32_pmuldq256:
5191 case clang::X86::BI__builtin_ia32_pmuldq512:
5196 return llvm::APIntOps::mulsExtended(LoLHS, LoRHS);
5199 case clang::X86::BI__builtin_ia32_pmuludq128:
5200 case clang::X86::BI__builtin_ia32_pmuludq256:
5201 case clang::X86::BI__builtin_ia32_pmuludq512:
5206 return llvm::APIntOps::muluExtended(LoLHS, LoRHS);
5209 case clang::X86::BI__builtin_ia32_pclmulqdq128:
5210 case clang::X86::BI__builtin_ia32_pclmulqdq256:
5211 case clang::X86::BI__builtin_ia32_pclmulqdq512:
5214 case Builtin::BI__builtin_elementwise_fma:
5218 llvm::RoundingMode RM) {
5220 F.fusedMultiplyAdd(Y, Z, RM);
5224 case X86::BI__builtin_ia32_vpmadd52luq128:
5225 case X86::BI__builtin_ia32_vpmadd52luq256:
5226 case X86::BI__builtin_ia32_vpmadd52luq512:
5229 return A + (B.trunc(52) *
C.trunc(52)).zext(64);
5231 case X86::BI__builtin_ia32_vpmadd52huq128:
5232 case X86::BI__builtin_ia32_vpmadd52huq256:
5233 case X86::BI__builtin_ia32_vpmadd52huq512:
5236 return A + llvm::APIntOps::mulhu(B.trunc(52),
C.trunc(52)).zext(64);
5239 case X86::BI__builtin_ia32_vpshldd128:
5240 case X86::BI__builtin_ia32_vpshldd256:
5241 case X86::BI__builtin_ia32_vpshldd512:
5242 case X86::BI__builtin_ia32_vpshldq128:
5243 case X86::BI__builtin_ia32_vpshldq256:
5244 case X86::BI__builtin_ia32_vpshldq512:
5245 case X86::BI__builtin_ia32_vpshldw128:
5246 case X86::BI__builtin_ia32_vpshldw256:
5247 case X86::BI__builtin_ia32_vpshldw512:
5251 return llvm::APIntOps::fshl(Hi, Lo, Amt);
5254 case X86::BI__builtin_ia32_vpshrdd128:
5255 case X86::BI__builtin_ia32_vpshrdd256:
5256 case X86::BI__builtin_ia32_vpshrdd512:
5257 case X86::BI__builtin_ia32_vpshrdq128:
5258 case X86::BI__builtin_ia32_vpshrdq256:
5259 case X86::BI__builtin_ia32_vpshrdq512:
5260 case X86::BI__builtin_ia32_vpshrdw128:
5261 case X86::BI__builtin_ia32_vpshrdw256:
5262 case X86::BI__builtin_ia32_vpshrdw512:
5267 return llvm::APIntOps::fshr(Hi, Lo, Amt);
5269 case X86::BI__builtin_ia32_vpconflictsi_128:
5270 case X86::BI__builtin_ia32_vpconflictsi_256:
5271 case X86::BI__builtin_ia32_vpconflictsi_512:
5272 case X86::BI__builtin_ia32_vpconflictdi_128:
5273 case X86::BI__builtin_ia32_vpconflictdi_256:
5274 case X86::BI__builtin_ia32_vpconflictdi_512:
5276 case X86::BI__builtin_ia32_compressdf128_mask:
5277 case X86::BI__builtin_ia32_compressdf256_mask:
5278 case X86::BI__builtin_ia32_compressdf512_mask:
5279 case X86::BI__builtin_ia32_compressdi128_mask:
5280 case X86::BI__builtin_ia32_compressdi256_mask:
5281 case X86::BI__builtin_ia32_compressdi512_mask:
5282 case X86::BI__builtin_ia32_compresshi128_mask:
5283 case X86::BI__builtin_ia32_compresshi256_mask:
5284 case X86::BI__builtin_ia32_compresshi512_mask:
5285 case X86::BI__builtin_ia32_compressqi128_mask:
5286 case X86::BI__builtin_ia32_compressqi256_mask:
5287 case X86::BI__builtin_ia32_compressqi512_mask:
5288 case X86::BI__builtin_ia32_compresssf128_mask:
5289 case X86::BI__builtin_ia32_compresssf256_mask:
5290 case X86::BI__builtin_ia32_compresssf512_mask:
5291 case X86::BI__builtin_ia32_compresssi128_mask:
5292 case X86::BI__builtin_ia32_compresssi256_mask:
5293 case X86::BI__builtin_ia32_compresssi512_mask: {
5295 Call->getArg(0)->getType()->castAs<
VectorType>()->getNumElements();
5297 S, OpPC,
Call, [NumElems](
unsigned DstIdx,
const APInt &ShuffleMask) {
5298 APInt CompressMask = ShuffleMask.trunc(NumElems);
5299 if (DstIdx < CompressMask.popcount()) {
5300 while (DstIdx != 0) {
5301 CompressMask = CompressMask & (CompressMask - 1);
5304 return std::pair<unsigned, int>{
5305 0,
static_cast<int>(CompressMask.countr_zero())};
5307 return std::pair<unsigned, int>{1,
static_cast<int>(DstIdx)};
5310 case X86::BI__builtin_ia32_expanddf128_mask:
5311 case X86::BI__builtin_ia32_expanddf256_mask:
5312 case X86::BI__builtin_ia32_expanddf512_mask:
5313 case X86::BI__builtin_ia32_expanddi128_mask:
5314 case X86::BI__builtin_ia32_expanddi256_mask:
5315 case X86::BI__builtin_ia32_expanddi512_mask:
5316 case X86::BI__builtin_ia32_expandhi128_mask:
5317 case X86::BI__builtin_ia32_expandhi256_mask:
5318 case X86::BI__builtin_ia32_expandhi512_mask:
5319 case X86::BI__builtin_ia32_expandqi128_mask:
5320 case X86::BI__builtin_ia32_expandqi256_mask:
5321 case X86::BI__builtin_ia32_expandqi512_mask:
5322 case X86::BI__builtin_ia32_expandsf128_mask:
5323 case X86::BI__builtin_ia32_expandsf256_mask:
5324 case X86::BI__builtin_ia32_expandsf512_mask:
5325 case X86::BI__builtin_ia32_expandsi128_mask:
5326 case X86::BI__builtin_ia32_expandsi256_mask:
5327 case X86::BI__builtin_ia32_expandsi512_mask: {
5329 S, OpPC,
Call, [](
unsigned DstIdx,
const APInt &ShuffleMask) {
5332 APInt ExpandMask = ShuffleMask.trunc(DstIdx + 1);
5333 if (ExpandMask[DstIdx]) {
5334 int SrcIdx = ExpandMask.popcount() - 1;
5335 return std::pair<unsigned, int>{0, SrcIdx};
5337 return std::pair<unsigned, int>{1,
static_cast<int>(DstIdx)};
5340 case clang::X86::BI__builtin_ia32_blendpd:
5341 case clang::X86::BI__builtin_ia32_blendpd256:
5342 case clang::X86::BI__builtin_ia32_blendps:
5343 case clang::X86::BI__builtin_ia32_blendps256:
5344 case clang::X86::BI__builtin_ia32_pblendw128:
5345 case clang::X86::BI__builtin_ia32_pblendw256:
5346 case clang::X86::BI__builtin_ia32_pblendd128:
5347 case clang::X86::BI__builtin_ia32_pblendd256:
5349 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5351 unsigned MaskBit = (ShuffleMask >> (DstIdx % 8)) & 0x1;
5352 unsigned SrcVecIdx = MaskBit ? 1 : 0;
5353 return std::pair<unsigned, int>{SrcVecIdx,
static_cast<int>(DstIdx)};
5358 case clang::X86::BI__builtin_ia32_blendvpd:
5359 case clang::X86::BI__builtin_ia32_blendvpd256:
5360 case clang::X86::BI__builtin_ia32_blendvps:
5361 case clang::X86::BI__builtin_ia32_blendvps256:
5365 llvm::RoundingMode) {
return C.isNegative() ? T : F; });
5367 case clang::X86::BI__builtin_ia32_pblendvb128:
5368 case clang::X86::BI__builtin_ia32_pblendvb256:
5371 return ((
APInt)
C).isNegative() ? T : F;
5373 case X86::BI__builtin_ia32_ptestz128:
5374 case X86::BI__builtin_ia32_ptestz256:
5375 case X86::BI__builtin_ia32_vtestzps:
5376 case X86::BI__builtin_ia32_vtestzps256:
5377 case X86::BI__builtin_ia32_vtestzpd:
5378 case X86::BI__builtin_ia32_vtestzpd256:
5381 [](
const APInt &A,
const APInt &B) {
return (A & B) == 0; });
5382 case X86::BI__builtin_ia32_ptestc128:
5383 case X86::BI__builtin_ia32_ptestc256:
5384 case X86::BI__builtin_ia32_vtestcps:
5385 case X86::BI__builtin_ia32_vtestcps256:
5386 case X86::BI__builtin_ia32_vtestcpd:
5387 case X86::BI__builtin_ia32_vtestcpd256:
5390 [](
const APInt &A,
const APInt &B) {
return (~A & B) == 0; });
5391 case X86::BI__builtin_ia32_ptestnzc128:
5392 case X86::BI__builtin_ia32_ptestnzc256:
5393 case X86::BI__builtin_ia32_vtestnzcps:
5394 case X86::BI__builtin_ia32_vtestnzcps256:
5395 case X86::BI__builtin_ia32_vtestnzcpd:
5396 case X86::BI__builtin_ia32_vtestnzcpd256:
5399 return ((A & B) != 0) && ((~A & B) != 0);
5401 case X86::BI__builtin_ia32_selectb_128:
5402 case X86::BI__builtin_ia32_selectb_256:
5403 case X86::BI__builtin_ia32_selectb_512:
5404 case X86::BI__builtin_ia32_selectw_128:
5405 case X86::BI__builtin_ia32_selectw_256:
5406 case X86::BI__builtin_ia32_selectw_512:
5407 case X86::BI__builtin_ia32_selectd_128:
5408 case X86::BI__builtin_ia32_selectd_256:
5409 case X86::BI__builtin_ia32_selectd_512:
5410 case X86::BI__builtin_ia32_selectq_128:
5411 case X86::BI__builtin_ia32_selectq_256:
5412 case X86::BI__builtin_ia32_selectq_512:
5413 case X86::BI__builtin_ia32_selectph_128:
5414 case X86::BI__builtin_ia32_selectph_256:
5415 case X86::BI__builtin_ia32_selectph_512:
5416 case X86::BI__builtin_ia32_selectpbf_128:
5417 case X86::BI__builtin_ia32_selectpbf_256:
5418 case X86::BI__builtin_ia32_selectpbf_512:
5419 case X86::BI__builtin_ia32_selectps_128:
5420 case X86::BI__builtin_ia32_selectps_256:
5421 case X86::BI__builtin_ia32_selectps_512:
5422 case X86::BI__builtin_ia32_selectpd_128:
5423 case X86::BI__builtin_ia32_selectpd_256:
5424 case X86::BI__builtin_ia32_selectpd_512:
5427 case X86::BI__builtin_ia32_shufps:
5428 case X86::BI__builtin_ia32_shufps256:
5429 case X86::BI__builtin_ia32_shufps512:
5431 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5432 unsigned NumElemPerLane = 4;
5433 unsigned NumSelectableElems = NumElemPerLane / 2;
5434 unsigned BitsPerElem = 2;
5435 unsigned IndexMask = 0x3;
5436 unsigned MaskBits = 8;
5437 unsigned Lane = DstIdx / NumElemPerLane;
5438 unsigned ElemInLane = DstIdx % NumElemPerLane;
5439 unsigned LaneOffset = Lane * NumElemPerLane;
5440 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
5441 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5442 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
5443 return std::pair<unsigned, int>{SrcIdx,
5444 static_cast<int>(LaneOffset + Index)};
5446 case X86::BI__builtin_ia32_shufpd:
5447 case X86::BI__builtin_ia32_shufpd256:
5448 case X86::BI__builtin_ia32_shufpd512:
5450 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5451 unsigned NumElemPerLane = 2;
5452 unsigned NumSelectableElems = NumElemPerLane / 2;
5453 unsigned BitsPerElem = 1;
5454 unsigned IndexMask = 0x1;
5455 unsigned MaskBits = 8;
5456 unsigned Lane = DstIdx / NumElemPerLane;
5457 unsigned ElemInLane = DstIdx % NumElemPerLane;
5458 unsigned LaneOffset = Lane * NumElemPerLane;
5459 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
5460 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5461 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
5462 return std::pair<unsigned, int>{SrcIdx,
5463 static_cast<int>(LaneOffset + Index)};
5466 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v16qi:
5467 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v32qi:
5468 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v64qi:
5470 case X86::BI__builtin_ia32_vgf2p8affineqb_v16qi:
5471 case X86::BI__builtin_ia32_vgf2p8affineqb_v32qi:
5472 case X86::BI__builtin_ia32_vgf2p8affineqb_v64qi:
5475 case X86::BI__builtin_ia32_vgf2p8mulb_v16qi:
5476 case X86::BI__builtin_ia32_vgf2p8mulb_v32qi:
5477 case X86::BI__builtin_ia32_vgf2p8mulb_v64qi:
5480 case X86::BI__builtin_ia32_insertps128:
5482 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Mask) {
5484 if ((Mask & (1 << DstIdx)) != 0) {
5485 return std::pair<unsigned, int>{0, -1};
5489 unsigned SrcElem = (Mask >> 6) & 0x3;
5490 unsigned DstElem = (Mask >> 4) & 0x3;
5491 if (DstIdx == DstElem) {
5493 return std::pair<unsigned, int>{1,
static_cast<int>(SrcElem)};
5496 return std::pair<unsigned, int>{0,
static_cast<int>(DstIdx)};
5499 case X86::BI__builtin_ia32_permvarsi256:
5500 case X86::BI__builtin_ia32_permvarsf256:
5501 case X86::BI__builtin_ia32_permvardf512:
5502 case X86::BI__builtin_ia32_permvardi512:
5503 case X86::BI__builtin_ia32_permvarhi128:
5505 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5506 int Offset = ShuffleMask & 0x7;
5507 return std::pair<unsigned, int>{0, Offset};
5509 case X86::BI__builtin_ia32_permvarqi128:
5510 case X86::BI__builtin_ia32_permvarhi256:
5511 case X86::BI__builtin_ia32_permvarsi512:
5512 case X86::BI__builtin_ia32_permvarsf512:
5514 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5515 int Offset = ShuffleMask & 0xF;
5516 return std::pair<unsigned, int>{0, Offset};
5518 case X86::BI__builtin_ia32_permvardi256:
5519 case X86::BI__builtin_ia32_permvardf256:
5521 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5522 int Offset = ShuffleMask & 0x3;
5523 return std::pair<unsigned, int>{0, Offset};
5525 case X86::BI__builtin_ia32_permvarqi256:
5526 case X86::BI__builtin_ia32_permvarhi512:
5528 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5529 int Offset = ShuffleMask & 0x1F;
5530 return std::pair<unsigned, int>{0, Offset};
5532 case X86::BI__builtin_ia32_permvarqi512:
5534 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5535 int Offset = ShuffleMask & 0x3F;
5536 return std::pair<unsigned, int>{0, Offset};
5538 case X86::BI__builtin_ia32_vpermi2varq128:
5539 case X86::BI__builtin_ia32_vpermi2varpd128:
5541 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5542 int Offset = ShuffleMask & 0x1;
5543 unsigned SrcIdx = (ShuffleMask >> 1) & 0x1;
5544 return std::pair<unsigned, int>{SrcIdx, Offset};
5546 case X86::BI__builtin_ia32_vpermi2vard128:
5547 case X86::BI__builtin_ia32_vpermi2varps128:
5548 case X86::BI__builtin_ia32_vpermi2varq256:
5549 case X86::BI__builtin_ia32_vpermi2varpd256:
5551 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5552 int Offset = ShuffleMask & 0x3;
5553 unsigned SrcIdx = (ShuffleMask >> 2) & 0x1;
5554 return std::pair<unsigned, int>{SrcIdx, Offset};
5556 case X86::BI__builtin_ia32_vpermi2varhi128:
5557 case X86::BI__builtin_ia32_vpermi2vard256:
5558 case X86::BI__builtin_ia32_vpermi2varps256:
5559 case X86::BI__builtin_ia32_vpermi2varq512:
5560 case X86::BI__builtin_ia32_vpermi2varpd512:
5562 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5563 int Offset = ShuffleMask & 0x7;
5564 unsigned SrcIdx = (ShuffleMask >> 3) & 0x1;
5565 return std::pair<unsigned, int>{SrcIdx, Offset};
5567 case X86::BI__builtin_ia32_vpermi2varqi128:
5568 case X86::BI__builtin_ia32_vpermi2varhi256:
5569 case X86::BI__builtin_ia32_vpermi2vard512:
5570 case X86::BI__builtin_ia32_vpermi2varps512:
5572 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5573 int Offset = ShuffleMask & 0xF;
5574 unsigned SrcIdx = (ShuffleMask >> 4) & 0x1;
5575 return std::pair<unsigned, int>{SrcIdx, Offset};
5577 case X86::BI__builtin_ia32_vpermi2varqi256:
5578 case X86::BI__builtin_ia32_vpermi2varhi512:
5580 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5581 int Offset = ShuffleMask & 0x1F;
5582 unsigned SrcIdx = (ShuffleMask >> 5) & 0x1;
5583 return std::pair<unsigned, int>{SrcIdx, Offset};
5585 case X86::BI__builtin_ia32_vpermi2varqi512:
5587 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5588 int Offset = ShuffleMask & 0x3F;
5589 unsigned SrcIdx = (ShuffleMask >> 6) & 0x1;
5590 return std::pair<unsigned, int>{SrcIdx, Offset};
5592 case X86::BI__builtin_ia32_vperm2f128_pd256:
5593 case X86::BI__builtin_ia32_vperm2f128_ps256:
5594 case X86::BI__builtin_ia32_vperm2f128_si256:
5595 case X86::BI__builtin_ia32_permti256: {
5596 unsigned NumElements =
5597 Call->getArg(0)->getType()->castAs<
VectorType>()->getNumElements();
5598 unsigned PreservedBitsCnt = NumElements >> 2;
5601 [PreservedBitsCnt](
unsigned DstIdx,
unsigned ShuffleMask) {
5602 unsigned ControlBitsCnt = DstIdx >> PreservedBitsCnt << 2;
5603 unsigned ControlBits = ShuffleMask >> ControlBitsCnt;
5605 if (ControlBits & 0b1000)
5606 return std::make_pair(0u, -1);
5608 unsigned SrcVecIdx = (ControlBits & 0b10) >> 1;
5609 unsigned PreservedBitsMask = (1 << PreservedBitsCnt) - 1;
5610 int SrcIdx = ((ControlBits & 0b1) << PreservedBitsCnt) |
5611 (DstIdx & PreservedBitsMask);
5612 return std::make_pair(SrcVecIdx, SrcIdx);
5615 case X86::BI__builtin_ia32_pshufb128:
5616 case X86::BI__builtin_ia32_pshufb256:
5617 case X86::BI__builtin_ia32_pshufb512:
5619 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5620 uint8_t Ctlb =
static_cast<uint8_t
>(ShuffleMask);
5622 return std::make_pair(0, -1);
5624 unsigned LaneBase = (DstIdx / 16) * 16;
5625 unsigned SrcOffset = Ctlb & 0x0F;
5626 unsigned SrcIdx = LaneBase + SrcOffset;
5627 return std::make_pair(0,
static_cast<int>(SrcIdx));
5630 case X86::BI__builtin_ia32_pshuflw:
5631 case X86::BI__builtin_ia32_pshuflw256:
5632 case X86::BI__builtin_ia32_pshuflw512:
5634 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5635 unsigned LaneBase = (DstIdx / 8) * 8;
5636 unsigned LaneIdx = DstIdx % 8;
5638 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
5639 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
5642 return std::make_pair(0,
static_cast<int>(DstIdx));
5645 case X86::BI__builtin_ia32_pshufhw:
5646 case X86::BI__builtin_ia32_pshufhw256:
5647 case X86::BI__builtin_ia32_pshufhw512:
5649 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5650 unsigned LaneBase = (DstIdx / 8) * 8;
5651 unsigned LaneIdx = DstIdx % 8;
5653 unsigned Sel = (ShuffleMask >> (2 * (LaneIdx - 4))) & 0x3;
5654 return std::make_pair(0,
static_cast<int>(LaneBase + 4 + Sel));
5657 return std::make_pair(0,
static_cast<int>(DstIdx));
5660 case X86::BI__builtin_ia32_pshufd:
5661 case X86::BI__builtin_ia32_pshufd256:
5662 case X86::BI__builtin_ia32_pshufd512:
5663 case X86::BI__builtin_ia32_vpermilps:
5664 case X86::BI__builtin_ia32_vpermilps256:
5665 case X86::BI__builtin_ia32_vpermilps512:
5667 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5668 unsigned LaneBase = (DstIdx / 4) * 4;
5669 unsigned LaneIdx = DstIdx % 4;
5670 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
5671 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
5674 case X86::BI__builtin_ia32_vpermilvarpd:
5675 case X86::BI__builtin_ia32_vpermilvarpd256:
5676 case X86::BI__builtin_ia32_vpermilvarpd512:
5678 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5679 unsigned NumElemPerLane = 2;
5680 unsigned Lane = DstIdx / NumElemPerLane;
5681 unsigned Offset = ShuffleMask & 0b10 ? 1 : 0;
5682 return std::make_pair(
5683 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
5686 case X86::BI__builtin_ia32_vpermilvarps:
5687 case X86::BI__builtin_ia32_vpermilvarps256:
5688 case X86::BI__builtin_ia32_vpermilvarps512:
5690 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5691 unsigned NumElemPerLane = 4;
5692 unsigned Lane = DstIdx / NumElemPerLane;
5693 unsigned Offset = ShuffleMask & 0b11;
5694 return std::make_pair(
5695 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
5698 case X86::BI__builtin_ia32_vpermilpd:
5699 case X86::BI__builtin_ia32_vpermilpd256:
5700 case X86::BI__builtin_ia32_vpermilpd512:
5702 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Control) {
5703 unsigned NumElemPerLane = 2;
5704 unsigned BitsPerElem = 1;
5705 unsigned MaskBits = 8;
5706 unsigned IndexMask = 0x1;
5707 unsigned Lane = DstIdx / NumElemPerLane;
5708 unsigned LaneOffset = Lane * NumElemPerLane;
5709 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5710 unsigned Index = (Control >> BitIndex) & IndexMask;
5711 return std::make_pair(0,
static_cast<int>(LaneOffset + Index));
5714 case X86::BI__builtin_ia32_permdf256:
5715 case X86::BI__builtin_ia32_permdi256:
5717 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Control) {
5720 unsigned Index = (Control >> (2 * DstIdx)) & 0x3;
5721 return std::make_pair(0,
static_cast<int>(Index));
5724 case X86::BI__builtin_ia32_vpmultishiftqb128:
5725 case X86::BI__builtin_ia32_vpmultishiftqb256:
5726 case X86::BI__builtin_ia32_vpmultishiftqb512:
5728 case X86::BI__builtin_ia32_kandqi:
5729 case X86::BI__builtin_ia32_kandhi:
5730 case X86::BI__builtin_ia32_kandsi:
5731 case X86::BI__builtin_ia32_kanddi:
5734 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS & RHS; });
5736 case X86::BI__builtin_ia32_kandnqi:
5737 case X86::BI__builtin_ia32_kandnhi:
5738 case X86::BI__builtin_ia32_kandnsi:
5739 case X86::BI__builtin_ia32_kandndi:
5742 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~LHS & RHS; });
5744 case X86::BI__builtin_ia32_korqi:
5745 case X86::BI__builtin_ia32_korhi:
5746 case X86::BI__builtin_ia32_korsi:
5747 case X86::BI__builtin_ia32_kordi:
5750 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS | RHS; });
5752 case X86::BI__builtin_ia32_kxnorqi:
5753 case X86::BI__builtin_ia32_kxnorhi:
5754 case X86::BI__builtin_ia32_kxnorsi:
5755 case X86::BI__builtin_ia32_kxnordi:
5758 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~(LHS ^ RHS); });
5760 case X86::BI__builtin_ia32_kxorqi:
5761 case X86::BI__builtin_ia32_kxorhi:
5762 case X86::BI__builtin_ia32_kxorsi:
5763 case X86::BI__builtin_ia32_kxordi:
5766 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS ^ RHS; });
5768 case X86::BI__builtin_ia32_knotqi:
5769 case X86::BI__builtin_ia32_knothi:
5770 case X86::BI__builtin_ia32_knotsi:
5771 case X86::BI__builtin_ia32_knotdi:
5773 S, OpPC,
Call, [](
const APSInt &Src) {
return ~Src; });
5775 case X86::BI__builtin_ia32_kaddqi:
5776 case X86::BI__builtin_ia32_kaddhi:
5777 case X86::BI__builtin_ia32_kaddsi:
5778 case X86::BI__builtin_ia32_kadddi:
5781 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
5783 case X86::BI__builtin_ia32_kmovb:
5784 case X86::BI__builtin_ia32_kmovw:
5785 case X86::BI__builtin_ia32_kmovd:
5786 case X86::BI__builtin_ia32_kmovq:
5788 S, OpPC,
Call, [](
const APSInt &Src) {
return Src; });
5790 case X86::BI__builtin_ia32_kunpckhi:
5791 case X86::BI__builtin_ia32_kunpckdi:
5792 case X86::BI__builtin_ia32_kunpcksi:
5797 unsigned BW = A.getBitWidth();
5798 return APSInt(A.trunc(BW / 2).concat(B.trunc(BW / 2)),
5802 case X86::BI__builtin_ia32_phminposuw128:
5805 case X86::BI__builtin_ia32_psraq128:
5806 case X86::BI__builtin_ia32_psraq256:
5807 case X86::BI__builtin_ia32_psraq512:
5808 case X86::BI__builtin_ia32_psrad128:
5809 case X86::BI__builtin_ia32_psrad256:
5810 case X86::BI__builtin_ia32_psrad512:
5811 case X86::BI__builtin_ia32_psraw128:
5812 case X86::BI__builtin_ia32_psraw256:
5813 case X86::BI__builtin_ia32_psraw512:
5816 [](
const APInt &Elt, uint64_t Count) {
return Elt.ashr(Count); },
5817 [](
const APInt &Elt,
unsigned Width) {
return Elt.ashr(Width - 1); });
5819 case X86::BI__builtin_ia32_psllq128:
5820 case X86::BI__builtin_ia32_psllq256:
5821 case X86::BI__builtin_ia32_psllq512:
5822 case X86::BI__builtin_ia32_pslld128:
5823 case X86::BI__builtin_ia32_pslld256:
5824 case X86::BI__builtin_ia32_pslld512:
5825 case X86::BI__builtin_ia32_psllw128:
5826 case X86::BI__builtin_ia32_psllw256:
5827 case X86::BI__builtin_ia32_psllw512:
5830 [](
const APInt &Elt, uint64_t Count) {
return Elt.shl(Count); },
5831 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
5833 case X86::BI__builtin_ia32_psrlq128:
5834 case X86::BI__builtin_ia32_psrlq256:
5835 case X86::BI__builtin_ia32_psrlq512:
5836 case X86::BI__builtin_ia32_psrld128:
5837 case X86::BI__builtin_ia32_psrld256:
5838 case X86::BI__builtin_ia32_psrld512:
5839 case X86::BI__builtin_ia32_psrlw128:
5840 case X86::BI__builtin_ia32_psrlw256:
5841 case X86::BI__builtin_ia32_psrlw512:
5844 [](
const APInt &Elt, uint64_t Count) {
return Elt.lshr(Count); },
5845 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
5847 case X86::BI__builtin_ia32_pternlogd128_mask:
5848 case X86::BI__builtin_ia32_pternlogd256_mask:
5849 case X86::BI__builtin_ia32_pternlogd512_mask:
5850 case X86::BI__builtin_ia32_pternlogq128_mask:
5851 case X86::BI__builtin_ia32_pternlogq256_mask:
5852 case X86::BI__builtin_ia32_pternlogq512_mask:
5854 case X86::BI__builtin_ia32_pternlogd128_maskz:
5855 case X86::BI__builtin_ia32_pternlogd256_maskz:
5856 case X86::BI__builtin_ia32_pternlogd512_maskz:
5857 case X86::BI__builtin_ia32_pternlogq128_maskz:
5858 case X86::BI__builtin_ia32_pternlogq256_maskz:
5859 case X86::BI__builtin_ia32_pternlogq512_maskz:
5861 case Builtin::BI__builtin_elementwise_fshl:
5863 llvm::APIntOps::fshl);
5864 case Builtin::BI__builtin_elementwise_fshr:
5866 llvm::APIntOps::fshr);
5868 case X86::BI__builtin_ia32_shuf_f32x4_256:
5869 case X86::BI__builtin_ia32_shuf_i32x4_256:
5870 case X86::BI__builtin_ia32_shuf_f64x2_256:
5871 case X86::BI__builtin_ia32_shuf_i64x2_256:
5872 case X86::BI__builtin_ia32_shuf_f32x4:
5873 case X86::BI__builtin_ia32_shuf_i32x4:
5874 case X86::BI__builtin_ia32_shuf_f64x2:
5875 case X86::BI__builtin_ia32_shuf_i64x2: {
5881 unsigned LaneBits = 128u;
5882 unsigned NumLanes = (NumElems * ElemBits) / LaneBits;
5883 unsigned NumElemsPerLane = LaneBits / ElemBits;
5887 [NumLanes, NumElemsPerLane](
unsigned DstIdx,
unsigned ShuffleMask) {
5889 unsigned BitsPerElem = NumLanes / 2;
5890 unsigned IndexMask = (1u << BitsPerElem) - 1;
5891 unsigned Lane = DstIdx / NumElemsPerLane;
5892 unsigned SrcIdx = (Lane < NumLanes / 2) ? 0 : 1;
5893 unsigned BitIdx = BitsPerElem * Lane;
5894 unsigned SrcLaneIdx = (ShuffleMask >> BitIdx) & IndexMask;
5895 unsigned ElemInLane = DstIdx % NumElemsPerLane;
5896 unsigned IdxToPick = SrcLaneIdx * NumElemsPerLane + ElemInLane;
5897 return std::pair<unsigned, int>{SrcIdx, IdxToPick};
5901 case X86::BI__builtin_ia32_insertf32x4_256:
5902 case X86::BI__builtin_ia32_inserti32x4_256:
5903 case X86::BI__builtin_ia32_insertf64x2_256:
5904 case X86::BI__builtin_ia32_inserti64x2_256:
5905 case X86::BI__builtin_ia32_insertf32x4:
5906 case X86::BI__builtin_ia32_inserti32x4:
5907 case X86::BI__builtin_ia32_insertf64x2_512:
5908 case X86::BI__builtin_ia32_inserti64x2_512:
5909 case X86::BI__builtin_ia32_insertf32x8:
5910 case X86::BI__builtin_ia32_inserti32x8:
5911 case X86::BI__builtin_ia32_insertf64x4:
5912 case X86::BI__builtin_ia32_inserti64x4:
5913 case X86::BI__builtin_ia32_vinsertf128_ps256:
5914 case X86::BI__builtin_ia32_vinsertf128_pd256:
5915 case X86::BI__builtin_ia32_vinsertf128_si256:
5916 case X86::BI__builtin_ia32_insert128i256:
5919 case clang::X86::BI__builtin_ia32_vcvtps2ph:
5920 case clang::X86::BI__builtin_ia32_vcvtps2ph256:
5923 case X86::BI__builtin_ia32_vec_ext_v4hi:
5924 case X86::BI__builtin_ia32_vec_ext_v16qi:
5925 case X86::BI__builtin_ia32_vec_ext_v8hi:
5926 case X86::BI__builtin_ia32_vec_ext_v4si:
5927 case X86::BI__builtin_ia32_vec_ext_v2di:
5928 case X86::BI__builtin_ia32_vec_ext_v32qi:
5929 case X86::BI__builtin_ia32_vec_ext_v16hi:
5930 case X86::BI__builtin_ia32_vec_ext_v8si:
5931 case X86::BI__builtin_ia32_vec_ext_v4di:
5932 case X86::BI__builtin_ia32_vec_ext_v4sf:
5935 case X86::BI__builtin_ia32_vec_set_v4hi:
5936 case X86::BI__builtin_ia32_vec_set_v16qi:
5937 case X86::BI__builtin_ia32_vec_set_v8hi:
5938 case X86::BI__builtin_ia32_vec_set_v4si:
5939 case X86::BI__builtin_ia32_vec_set_v2di:
5940 case X86::BI__builtin_ia32_vec_set_v32qi:
5941 case X86::BI__builtin_ia32_vec_set_v16hi:
5942 case X86::BI__builtin_ia32_vec_set_v8si:
5943 case X86::BI__builtin_ia32_vec_set_v4di:
5946 case X86::BI__builtin_ia32_cvtb2mask128:
5947 case X86::BI__builtin_ia32_cvtb2mask256:
5948 case X86::BI__builtin_ia32_cvtb2mask512:
5949 case X86::BI__builtin_ia32_cvtw2mask128:
5950 case X86::BI__builtin_ia32_cvtw2mask256:
5951 case X86::BI__builtin_ia32_cvtw2mask512:
5952 case X86::BI__builtin_ia32_cvtd2mask128:
5953 case X86::BI__builtin_ia32_cvtd2mask256:
5954 case X86::BI__builtin_ia32_cvtd2mask512:
5955 case X86::BI__builtin_ia32_cvtq2mask128:
5956 case X86::BI__builtin_ia32_cvtq2mask256:
5957 case X86::BI__builtin_ia32_cvtq2mask512:
5960 case X86::BI__builtin_ia32_cvtmask2b128:
5961 case X86::BI__builtin_ia32_cvtmask2b256:
5962 case X86::BI__builtin_ia32_cvtmask2b512:
5963 case X86::BI__builtin_ia32_cvtmask2w128:
5964 case X86::BI__builtin_ia32_cvtmask2w256:
5965 case X86::BI__builtin_ia32_cvtmask2w512:
5966 case X86::BI__builtin_ia32_cvtmask2d128:
5967 case X86::BI__builtin_ia32_cvtmask2d256:
5968 case X86::BI__builtin_ia32_cvtmask2d512:
5969 case X86::BI__builtin_ia32_cvtmask2q128:
5970 case X86::BI__builtin_ia32_cvtmask2q256:
5971 case X86::BI__builtin_ia32_cvtmask2q512:
5974 case X86::BI__builtin_ia32_cvtsd2ss:
5977 case X86::BI__builtin_ia32_cvtsd2ss_round_mask:
5980 case X86::BI__builtin_ia32_cvtpd2ps:
5981 case X86::BI__builtin_ia32_cvtpd2ps256:
5983 case X86::BI__builtin_ia32_cvtpd2ps_mask:
5985 case X86::BI__builtin_ia32_cvtpd2ps512_mask:
5988 case X86::BI__builtin_ia32_cmpb128_mask:
5989 case X86::BI__builtin_ia32_cmpw128_mask:
5990 case X86::BI__builtin_ia32_cmpd128_mask:
5991 case X86::BI__builtin_ia32_cmpq128_mask:
5992 case X86::BI__builtin_ia32_cmpb256_mask:
5993 case X86::BI__builtin_ia32_cmpw256_mask:
5994 case X86::BI__builtin_ia32_cmpd256_mask:
5995 case X86::BI__builtin_ia32_cmpq256_mask:
5996 case X86::BI__builtin_ia32_cmpb512_mask:
5997 case X86::BI__builtin_ia32_cmpw512_mask:
5998 case X86::BI__builtin_ia32_cmpd512_mask:
5999 case X86::BI__builtin_ia32_cmpq512_mask:
6003 case X86::BI__builtin_ia32_ucmpb128_mask:
6004 case X86::BI__builtin_ia32_ucmpw128_mask:
6005 case X86::BI__builtin_ia32_ucmpd128_mask:
6006 case X86::BI__builtin_ia32_ucmpq128_mask:
6007 case X86::BI__builtin_ia32_ucmpb256_mask:
6008 case X86::BI__builtin_ia32_ucmpw256_mask:
6009 case X86::BI__builtin_ia32_ucmpd256_mask:
6010 case X86::BI__builtin_ia32_ucmpq256_mask:
6011 case X86::BI__builtin_ia32_ucmpb512_mask:
6012 case X86::BI__builtin_ia32_ucmpw512_mask:
6013 case X86::BI__builtin_ia32_ucmpd512_mask:
6014 case X86::BI__builtin_ia32_ucmpq512_mask:
6018 case X86::BI__builtin_ia32_vpshufbitqmb128_mask:
6019 case X86::BI__builtin_ia32_vpshufbitqmb256_mask:
6020 case X86::BI__builtin_ia32_vpshufbitqmb512_mask:
6023 case X86::BI__builtin_ia32_pslldqi128_byteshift:
6024 case X86::BI__builtin_ia32_pslldqi256_byteshift:
6025 case X86::BI__builtin_ia32_pslldqi512_byteshift:
6032 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
6033 unsigned LaneBase = (DstIdx / 16) * 16;
6034 unsigned LaneIdx = DstIdx % 16;
6035 if (LaneIdx < Shift)
6036 return std::make_pair(0, -1);
6038 return std::make_pair(0,
6039 static_cast<int>(LaneBase + LaneIdx - Shift));
6042 case X86::BI__builtin_ia32_psrldqi128_byteshift:
6043 case X86::BI__builtin_ia32_psrldqi256_byteshift:
6044 case X86::BI__builtin_ia32_psrldqi512_byteshift:
6051 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
6052 unsigned LaneBase = (DstIdx / 16) * 16;
6053 unsigned LaneIdx = DstIdx % 16;
6054 if (LaneIdx + Shift < 16)
6055 return std::make_pair(0,
6056 static_cast<int>(LaneBase + LaneIdx + Shift));
6058 return std::make_pair(0, -1);
6061 case X86::BI__builtin_ia32_palignr128:
6062 case X86::BI__builtin_ia32_palignr256:
6063 case X86::BI__builtin_ia32_palignr512:
6065 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Shift) {
6067 unsigned VecIdx = 1;
6070 int Lane = DstIdx / 16;
6071 int Offset = DstIdx % 16;
6074 unsigned ShiftedIdx = Offset + (Shift & 0xFF);
6075 if (ShiftedIdx < 16) {
6076 ElemIdx = ShiftedIdx + (Lane * 16);
6077 }
else if (ShiftedIdx < 32) {
6079 ElemIdx = (ShiftedIdx - 16) + (Lane * 16);
6082 return std::pair<unsigned, int>{VecIdx, ElemIdx};
6085 case X86::BI__builtin_ia32_alignd128:
6086 case X86::BI__builtin_ia32_alignd256:
6087 case X86::BI__builtin_ia32_alignd512:
6088 case X86::BI__builtin_ia32_alignq128:
6089 case X86::BI__builtin_ia32_alignq256:
6090 case X86::BI__builtin_ia32_alignq512: {
6091 unsigned NumElems =
Call->getType()->castAs<
VectorType>()->getNumElements();
6093 S, OpPC,
Call, [NumElems](
unsigned DstIdx,
unsigned Shift) {
6094 unsigned Imm = Shift & 0xFF;
6095 unsigned EffectiveShift = Imm & (NumElems - 1);
6096 unsigned SourcePos = DstIdx + EffectiveShift;
6097 unsigned VecIdx = SourcePos < NumElems ? 1u : 0u;
6098 unsigned ElemIdx = SourcePos & (NumElems - 1);
6099 return std::pair<unsigned, int>{VecIdx,
static_cast<int>(ElemIdx)};
6103 case clang::X86::BI__builtin_ia32_minps:
6104 case clang::X86::BI__builtin_ia32_minpd:
6105 case clang::X86::BI__builtin_ia32_minph128:
6106 case clang::X86::BI__builtin_ia32_minph256:
6107 case clang::X86::BI__builtin_ia32_minps256:
6108 case clang::X86::BI__builtin_ia32_minpd256:
6109 case clang::X86::BI__builtin_ia32_minps512:
6110 case clang::X86::BI__builtin_ia32_minpd512:
6111 case clang::X86::BI__builtin_ia32_minph512:
6115 std::optional<APSInt>) -> std::optional<APFloat> {
6116 if (A.isNaN() || A.isInfinity() || A.isDenormal() || B.isNaN() ||
6117 B.isInfinity() || B.isDenormal())
6118 return std::nullopt;
6119 if (A.isZero() && B.isZero())
6121 return llvm::minimum(A, B);
6124 case clang::X86::BI__builtin_ia32_minss:
6125 case clang::X86::BI__builtin_ia32_minsd:
6129 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
6134 case clang::X86::BI__builtin_ia32_minsd_round_mask:
6135 case clang::X86::BI__builtin_ia32_minss_round_mask:
6136 case clang::X86::BI__builtin_ia32_minsh_round_mask:
6137 case clang::X86::BI__builtin_ia32_maxsd_round_mask:
6138 case clang::X86::BI__builtin_ia32_maxss_round_mask:
6139 case clang::X86::BI__builtin_ia32_maxsh_round_mask: {
6140 bool IsMin = BuiltinID == clang::X86::BI__builtin_ia32_minsd_round_mask ||
6141 BuiltinID == clang::X86::BI__builtin_ia32_minss_round_mask ||
6142 BuiltinID == clang::X86::BI__builtin_ia32_minsh_round_mask;
6146 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
6151 case clang::X86::BI__builtin_ia32_maxps:
6152 case clang::X86::BI__builtin_ia32_maxpd:
6153 case clang::X86::BI__builtin_ia32_maxph128:
6154 case clang::X86::BI__builtin_ia32_maxph256:
6155 case clang::X86::BI__builtin_ia32_maxps256:
6156 case clang::X86::BI__builtin_ia32_maxpd256:
6157 case clang::X86::BI__builtin_ia32_maxps512:
6158 case clang::X86::BI__builtin_ia32_maxpd512:
6159 case clang::X86::BI__builtin_ia32_maxph512:
6163 std::optional<APSInt>) -> std::optional<APFloat> {
6164 if (A.isNaN() || A.isInfinity() || A.isDenormal() || B.isNaN() ||
6165 B.isInfinity() || B.isDenormal())
6166 return std::nullopt;
6167 if (A.isZero() && B.isZero())
6169 return llvm::maximum(A, B);
6172 case clang::X86::BI__builtin_ia32_maxss:
6173 case clang::X86::BI__builtin_ia32_maxsd:
6177 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
6184 diag::note_invalid_subexpr_in_const_expr)
6190 llvm_unreachable(
"Unhandled builtin ID");