4602 uint32_t BuiltinID) {
4619 switch (BuiltinID) {
4620 case Builtin::BI__builtin_is_constant_evaluated:
4623 case Builtin::BI__builtin_assume:
4624 case Builtin::BI__assume:
4627 case Builtin::BI__builtin_strcmp:
4628 case Builtin::BIstrcmp:
4629 case Builtin::BI__builtin_strncmp:
4630 case Builtin::BIstrncmp:
4631 case Builtin::BI__builtin_wcsncmp:
4632 case Builtin::BIwcsncmp:
4633 case Builtin::BI__builtin_wcscmp:
4634 case Builtin::BIwcscmp:
4637 case Builtin::BI__builtin_strlen:
4638 case Builtin::BIstrlen:
4639 case Builtin::BI__builtin_wcslen:
4640 case Builtin::BIwcslen:
4643 case Builtin::BI__builtin_nan:
4644 case Builtin::BI__builtin_nanf:
4645 case Builtin::BI__builtin_nanl:
4646 case Builtin::BI__builtin_nanf16:
4647 case Builtin::BI__builtin_nanf128:
4650 case Builtin::BI__builtin_nans:
4651 case Builtin::BI__builtin_nansf:
4652 case Builtin::BI__builtin_nansl:
4653 case Builtin::BI__builtin_nansf16:
4654 case Builtin::BI__builtin_nansf128:
4657 case Builtin::BI__builtin_huge_val:
4658 case Builtin::BI__builtin_huge_valf:
4659 case Builtin::BI__builtin_huge_vall:
4660 case Builtin::BI__builtin_huge_valf16:
4661 case Builtin::BI__builtin_huge_valf128:
4662 case Builtin::BI__builtin_inf:
4663 case Builtin::BI__builtin_inff:
4664 case Builtin::BI__builtin_infl:
4665 case Builtin::BI__builtin_inff16:
4666 case Builtin::BI__builtin_inff128:
4669 case Builtin::BI__builtin_copysign:
4670 case Builtin::BI__builtin_copysignf:
4671 case Builtin::BI__builtin_copysignl:
4672 case Builtin::BI__builtin_copysignf128:
4675 case Builtin::BI__builtin_fmin:
4676 case Builtin::BI__builtin_fminf:
4677 case Builtin::BI__builtin_fminl:
4678 case Builtin::BI__builtin_fminf16:
4679 case Builtin::BI__builtin_fminf128:
4682 case Builtin::BI__builtin_fminimum_num:
4683 case Builtin::BI__builtin_fminimum_numf:
4684 case Builtin::BI__builtin_fminimum_numl:
4685 case Builtin::BI__builtin_fminimum_numf16:
4686 case Builtin::BI__builtin_fminimum_numf128:
4689 case Builtin::BI__builtin_fmax:
4690 case Builtin::BI__builtin_fmaxf:
4691 case Builtin::BI__builtin_fmaxl:
4692 case Builtin::BI__builtin_fmaxf16:
4693 case Builtin::BI__builtin_fmaxf128:
4696 case Builtin::BI__builtin_fmaximum_num:
4697 case Builtin::BI__builtin_fmaximum_numf:
4698 case Builtin::BI__builtin_fmaximum_numl:
4699 case Builtin::BI__builtin_fmaximum_numf16:
4700 case Builtin::BI__builtin_fmaximum_numf128:
4703 case Builtin::BI__builtin_isnan:
4706 case Builtin::BI__builtin_issignaling:
4709 case Builtin::BI__builtin_isinf:
4712 case Builtin::BI__builtin_isinf_sign:
4715 case Builtin::BI__builtin_isfinite:
4718 case Builtin::BI__builtin_isnormal:
4721 case Builtin::BI__builtin_issubnormal:
4724 case Builtin::BI__builtin_iszero:
4727 case Builtin::BI__builtin_signbit:
4728 case Builtin::BI__builtin_signbitf:
4729 case Builtin::BI__builtin_signbitl:
4732 case Builtin::BI__builtin_isgreater:
4733 case Builtin::BI__builtin_isgreaterequal:
4734 case Builtin::BI__builtin_isless:
4735 case Builtin::BI__builtin_islessequal:
4736 case Builtin::BI__builtin_islessgreater:
4737 case Builtin::BI__builtin_isunordered:
4740 case Builtin::BI__builtin_isfpclass:
4743 case Builtin::BI__builtin_fpclassify:
4746 case Builtin::BI__builtin_fabs:
4747 case Builtin::BI__builtin_fabsf:
4748 case Builtin::BI__builtin_fabsl:
4749 case Builtin::BI__builtin_fabsf128:
4752 case Builtin::BI__builtin_abs:
4753 case Builtin::BI__builtin_labs:
4754 case Builtin::BI__builtin_llabs:
4757 case Builtin::BI__builtin_popcount:
4758 case Builtin::BI__builtin_popcountl:
4759 case Builtin::BI__builtin_popcountll:
4760 case Builtin::BI__builtin_popcountg:
4761 case Builtin::BI__popcnt16:
4762 case Builtin::BI__popcnt:
4763 case Builtin::BI__popcnt64:
4766 case Builtin::BI__builtin_parity:
4767 case Builtin::BI__builtin_parityl:
4768 case Builtin::BI__builtin_parityll:
4771 return APInt(Val.getBitWidth(), Val.popcount() % 2);
4773 case Builtin::BI__builtin_clrsb:
4774 case Builtin::BI__builtin_clrsbl:
4775 case Builtin::BI__builtin_clrsbll:
4778 return APInt(Val.getBitWidth(),
4779 Val.getBitWidth() - Val.getSignificantBits());
4781 case Builtin::BI__builtin_bitreverseg:
4782 case Builtin::BI__builtin_bitreverse8:
4783 case Builtin::BI__builtin_bitreverse16:
4784 case Builtin::BI__builtin_bitreverse32:
4785 case Builtin::BI__builtin_bitreverse64:
4787 S, OpPC,
Call, [](
const APSInt &Val) {
return Val.reverseBits(); });
4789 case Builtin::BI__builtin_classify_type:
4792 case Builtin::BI__builtin_expect:
4793 case Builtin::BI__builtin_expect_with_probability:
4796 case Builtin::BI__builtin_rotateleft8:
4797 case Builtin::BI__builtin_rotateleft16:
4798 case Builtin::BI__builtin_rotateleft32:
4799 case Builtin::BI__builtin_rotateleft64:
4800 case Builtin::BI__builtin_stdc_rotate_left:
4801 case Builtin::BIstdc_rotate_left_uc:
4802 case Builtin::BIstdc_rotate_left_us:
4803 case Builtin::BIstdc_rotate_left_ui:
4804 case Builtin::BIstdc_rotate_left_ul:
4805 case Builtin::BIstdc_rotate_left_ull:
4806 case Builtin::BI_rotl8:
4807 case Builtin::BI_rotl16:
4808 case Builtin::BI_rotl:
4809 case Builtin::BI_lrotl:
4810 case Builtin::BI_rotl64:
4811 case Builtin::BI__builtin_rotateright8:
4812 case Builtin::BI__builtin_rotateright16:
4813 case Builtin::BI__builtin_rotateright32:
4814 case Builtin::BI__builtin_rotateright64:
4815 case Builtin::BI__builtin_stdc_rotate_right:
4816 case Builtin::BIstdc_rotate_right_uc:
4817 case Builtin::BIstdc_rotate_right_us:
4818 case Builtin::BIstdc_rotate_right_ui:
4819 case Builtin::BIstdc_rotate_right_ul:
4820 case Builtin::BIstdc_rotate_right_ull:
4821 case Builtin::BI_rotr8:
4822 case Builtin::BI_rotr16:
4823 case Builtin::BI_rotr:
4824 case Builtin::BI_lrotr:
4825 case Builtin::BI_rotr64: {
4828 switch (BuiltinID) {
4829 case Builtin::BI__builtin_rotateright8:
4830 case Builtin::BI__builtin_rotateright16:
4831 case Builtin::BI__builtin_rotateright32:
4832 case Builtin::BI__builtin_rotateright64:
4833 case Builtin::BI__builtin_stdc_rotate_right:
4834 case Builtin::BIstdc_rotate_right_uc:
4835 case Builtin::BIstdc_rotate_right_us:
4836 case Builtin::BIstdc_rotate_right_ui:
4837 case Builtin::BIstdc_rotate_right_ul:
4838 case Builtin::BIstdc_rotate_right_ull:
4839 case Builtin::BI_rotr8:
4840 case Builtin::BI_rotr16:
4841 case Builtin::BI_rotr:
4842 case Builtin::BI_lrotr:
4843 case Builtin::BI_rotr64:
4844 IsRotateRight =
true;
4847 IsRotateRight =
false;
4854 return IsRotateRight ?
Value.rotr(Amount.getZExtValue())
4855 :
Value.rotl(Amount.getZExtValue());
4859 case Builtin::BIstdc_leading_zeros_uc:
4860 case Builtin::BIstdc_leading_zeros_us:
4861 case Builtin::BIstdc_leading_zeros_ui:
4862 case Builtin::BIstdc_leading_zeros_ul:
4863 case Builtin::BIstdc_leading_zeros_ull:
4864 case Builtin::BI__builtin_stdc_leading_zeros: {
4867 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4868 return APInt(ResWidth, Val.countl_zero());
4872 case Builtin::BIstdc_leading_ones_uc:
4873 case Builtin::BIstdc_leading_ones_us:
4874 case Builtin::BIstdc_leading_ones_ui:
4875 case Builtin::BIstdc_leading_ones_ul:
4876 case Builtin::BIstdc_leading_ones_ull:
4877 case Builtin::BI__builtin_stdc_leading_ones: {
4880 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4881 return APInt(ResWidth, Val.countl_one());
4885 case Builtin::BIstdc_trailing_zeros_uc:
4886 case Builtin::BIstdc_trailing_zeros_us:
4887 case Builtin::BIstdc_trailing_zeros_ui:
4888 case Builtin::BIstdc_trailing_zeros_ul:
4889 case Builtin::BIstdc_trailing_zeros_ull:
4890 case Builtin::BI__builtin_stdc_trailing_zeros: {
4893 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4894 return APInt(ResWidth, Val.countr_zero());
4898 case Builtin::BIstdc_trailing_ones_uc:
4899 case Builtin::BIstdc_trailing_ones_us:
4900 case Builtin::BIstdc_trailing_ones_ui:
4901 case Builtin::BIstdc_trailing_ones_ul:
4902 case Builtin::BIstdc_trailing_ones_ull:
4903 case Builtin::BI__builtin_stdc_trailing_ones: {
4906 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4907 return APInt(ResWidth, Val.countr_one());
4911 case Builtin::BIstdc_first_leading_zero_uc:
4912 case Builtin::BIstdc_first_leading_zero_us:
4913 case Builtin::BIstdc_first_leading_zero_ui:
4914 case Builtin::BIstdc_first_leading_zero_ul:
4915 case Builtin::BIstdc_first_leading_zero_ull:
4916 case Builtin::BI__builtin_stdc_first_leading_zero: {
4919 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4920 return APInt(ResWidth, Val.isAllOnes() ? 0 : Val.countl_one() + 1);
4924 case Builtin::BIstdc_first_leading_one_uc:
4925 case Builtin::BIstdc_first_leading_one_us:
4926 case Builtin::BIstdc_first_leading_one_ui:
4927 case Builtin::BIstdc_first_leading_one_ul:
4928 case Builtin::BIstdc_first_leading_one_ull:
4929 case Builtin::BI__builtin_stdc_first_leading_one: {
4932 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4933 return APInt(ResWidth, Val.isZero() ? 0 : Val.countl_zero() + 1);
4937 case Builtin::BIstdc_first_trailing_zero_uc:
4938 case Builtin::BIstdc_first_trailing_zero_us:
4939 case Builtin::BIstdc_first_trailing_zero_ui:
4940 case Builtin::BIstdc_first_trailing_zero_ul:
4941 case Builtin::BIstdc_first_trailing_zero_ull:
4942 case Builtin::BI__builtin_stdc_first_trailing_zero: {
4945 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4946 return APInt(ResWidth, Val.isAllOnes() ? 0 : Val.countr_one() + 1);
4950 case Builtin::BIstdc_first_trailing_one_uc:
4951 case Builtin::BIstdc_first_trailing_one_us:
4952 case Builtin::BIstdc_first_trailing_one_ui:
4953 case Builtin::BIstdc_first_trailing_one_ul:
4954 case Builtin::BIstdc_first_trailing_one_ull:
4955 case Builtin::BI__builtin_stdc_first_trailing_one: {
4958 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4959 return APInt(ResWidth, Val.isZero() ? 0 : Val.countr_zero() + 1);
4963 case Builtin::BIstdc_count_zeros_uc:
4964 case Builtin::BIstdc_count_zeros_us:
4965 case Builtin::BIstdc_count_zeros_ui:
4966 case Builtin::BIstdc_count_zeros_ul:
4967 case Builtin::BIstdc_count_zeros_ull:
4968 case Builtin::BI__builtin_stdc_count_zeros: {
4971 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4972 unsigned BitWidth = Val.getBitWidth();
4973 return APInt(ResWidth, BitWidth - Val.popcount());
4977 case Builtin::BIstdc_count_ones_uc:
4978 case Builtin::BIstdc_count_ones_us:
4979 case Builtin::BIstdc_count_ones_ui:
4980 case Builtin::BIstdc_count_ones_ul:
4981 case Builtin::BIstdc_count_ones_ull:
4982 case Builtin::BI__builtin_stdc_count_ones: {
4985 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4986 return APInt(ResWidth, Val.popcount());
4990 case Builtin::BIstdc_has_single_bit_uc:
4991 case Builtin::BIstdc_has_single_bit_us:
4992 case Builtin::BIstdc_has_single_bit_ui:
4993 case Builtin::BIstdc_has_single_bit_ul:
4994 case Builtin::BIstdc_has_single_bit_ull:
4995 case Builtin::BI__builtin_stdc_has_single_bit: {
4998 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4999 return APInt(ResWidth, Val.popcount() == 1 ? 1 : 0);
5003 case Builtin::BIstdc_bit_width_uc:
5004 case Builtin::BIstdc_bit_width_us:
5005 case Builtin::BIstdc_bit_width_ui:
5006 case Builtin::BIstdc_bit_width_ul:
5007 case Builtin::BIstdc_bit_width_ull:
5008 case Builtin::BI__builtin_stdc_bit_width: {
5011 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
5012 unsigned BitWidth = Val.getBitWidth();
5013 return APInt(ResWidth, BitWidth - Val.countl_zero());
5017 case Builtin::BIstdc_bit_floor_uc:
5018 case Builtin::BIstdc_bit_floor_us:
5019 case Builtin::BIstdc_bit_floor_ui:
5020 case Builtin::BIstdc_bit_floor_ul:
5021 case Builtin::BIstdc_bit_floor_ull:
5022 case Builtin::BI__builtin_stdc_bit_floor:
5025 unsigned BitWidth = Val.getBitWidth();
5027 return APInt::getZero(BitWidth);
5028 return APInt::getOneBitSet(BitWidth,
5029 BitWidth - Val.countl_zero() - 1);
5032 case Builtin::BIstdc_bit_ceil_uc:
5033 case Builtin::BIstdc_bit_ceil_us:
5034 case Builtin::BIstdc_bit_ceil_ui:
5035 case Builtin::BIstdc_bit_ceil_ul:
5036 case Builtin::BIstdc_bit_ceil_ull:
5037 case Builtin::BI__builtin_stdc_bit_ceil:
5040 unsigned BitWidth = Val.getBitWidth();
5042 return APInt(BitWidth, 1);
5044 APInt ValMinusOne =
V - 1;
5045 unsigned LeadingZeros = ValMinusOne.countl_zero();
5046 if (LeadingZeros == 0)
5047 return APInt(BitWidth, 0);
5048 return APInt::getOneBitSet(BitWidth, BitWidth - LeadingZeros);
5051 case Builtin::BI__builtin_ffs:
5052 case Builtin::BI__builtin_ffsl:
5053 case Builtin::BI__builtin_ffsll:
5056 return APInt(Val.getBitWidth(),
5057 Val.isZero() ? 0u : Val.countTrailingZeros() + 1u);
5060 case Builtin::BIaddressof:
5061 case Builtin::BI__addressof:
5062 case Builtin::BI__builtin_addressof:
5066 case Builtin::BIas_const:
5067 case Builtin::BIforward:
5068 case Builtin::BIforward_like:
5069 case Builtin::BImove:
5070 case Builtin::BImove_if_noexcept:
5074 case Builtin::BI__builtin_eh_return_data_regno:
5077 case Builtin::BI__builtin_launder:
5081 case Builtin::BI__builtin_add_overflow:
5082 case Builtin::BI__builtin_sub_overflow:
5083 case Builtin::BI__builtin_mul_overflow:
5084 case Builtin::BI__builtin_sadd_overflow:
5085 case Builtin::BI__builtin_uadd_overflow:
5086 case Builtin::BI__builtin_uaddl_overflow:
5087 case Builtin::BI__builtin_uaddll_overflow:
5088 case Builtin::BI__builtin_usub_overflow:
5089 case Builtin::BI__builtin_usubl_overflow:
5090 case Builtin::BI__builtin_usubll_overflow:
5091 case Builtin::BI__builtin_umul_overflow:
5092 case Builtin::BI__builtin_umull_overflow:
5093 case Builtin::BI__builtin_umulll_overflow:
5094 case Builtin::BI__builtin_saddl_overflow:
5095 case Builtin::BI__builtin_saddll_overflow:
5096 case Builtin::BI__builtin_ssub_overflow:
5097 case Builtin::BI__builtin_ssubl_overflow:
5098 case Builtin::BI__builtin_ssubll_overflow:
5099 case Builtin::BI__builtin_smul_overflow:
5100 case Builtin::BI__builtin_smull_overflow:
5101 case Builtin::BI__builtin_smulll_overflow:
5104 case Builtin::BI__builtin_addcb:
5105 case Builtin::BI__builtin_addcs:
5106 case Builtin::BI__builtin_addc:
5107 case Builtin::BI__builtin_addcl:
5108 case Builtin::BI__builtin_addcll:
5109 case Builtin::BI__builtin_subcb:
5110 case Builtin::BI__builtin_subcs:
5111 case Builtin::BI__builtin_subc:
5112 case Builtin::BI__builtin_subcl:
5113 case Builtin::BI__builtin_subcll:
5116 case Builtin::BI__builtin_clz:
5117 case Builtin::BI__builtin_clzl:
5118 case Builtin::BI__builtin_clzll:
5119 case Builtin::BI__builtin_clzs:
5120 case Builtin::BI__builtin_clzg:
5121 case Builtin::BI__lzcnt16:
5122 case Builtin::BI__lzcnt:
5123 case Builtin::BI__lzcnt64:
5126 case Builtin::BI__builtin_ctz:
5127 case Builtin::BI__builtin_ctzl:
5128 case Builtin::BI__builtin_ctzll:
5129 case Builtin::BI__builtin_ctzs:
5130 case Builtin::BI__builtin_ctzg:
5133 case Builtin::BI__builtin_elementwise_clzg:
5134 case Builtin::BI__builtin_elementwise_ctzg:
5137 case Builtin::BI__builtin_bswapg:
5138 case Builtin::BI__builtin_bswap16:
5139 case Builtin::BI__builtin_bswap32:
5140 case Builtin::BI__builtin_bswap64:
5141 case Builtin::BIstdc_memreverse8u8:
5142 case Builtin::BIstdc_memreverse8u16:
5143 case Builtin::BIstdc_memreverse8u32:
5144 case Builtin::BIstdc_memreverse8u64:
5147 case Builtin::BI__atomic_always_lock_free:
5148 case Builtin::BI__atomic_is_lock_free:
5151 case Builtin::BI__c11_atomic_is_lock_free:
5154 case Builtin::BI__builtin_complex:
5157 case Builtin::BI__builtin_is_aligned:
5158 case Builtin::BI__builtin_align_up:
5159 case Builtin::BI__builtin_align_down:
5162 case Builtin::BI__builtin_assume_aligned:
5165 case clang::X86::BI__builtin_ia32_crc32qi:
5167 case clang::X86::BI__builtin_ia32_crc32hi:
5169 case clang::X86::BI__builtin_ia32_crc32si:
5171 case clang::X86::BI__builtin_ia32_crc32di:
5174 case clang::X86::BI__builtin_ia32_bextr_u32:
5175 case clang::X86::BI__builtin_ia32_bextr_u64:
5176 case clang::X86::BI__builtin_ia32_bextri_u32:
5177 case clang::X86::BI__builtin_ia32_bextri_u64:
5180 unsigned BitWidth = Val.getBitWidth();
5181 uint64_t Shift = Idx.extractBitsAsZExtValue(8, 0);
5182 uint64_t Length = Idx.extractBitsAsZExtValue(8, 8);
5183 if (Length > BitWidth) {
5188 if (Length == 0 || Shift >= BitWidth)
5189 return APInt(BitWidth, 0);
5191 uint64_t
Result = Val.getZExtValue() >> Shift;
5192 Result &= llvm::maskTrailingOnes<uint64_t>(Length);
5196 case clang::X86::BI__builtin_ia32_bzhi_si:
5197 case clang::X86::BI__builtin_ia32_bzhi_di:
5200 unsigned BitWidth = Val.getBitWidth();
5201 uint64_t Index = Idx.extractBitsAsZExtValue(8, 0);
5204 if (Index < BitWidth)
5205 Result.clearHighBits(BitWidth - Index);
5210 case clang::X86::BI__builtin_ia32_ktestcqi:
5211 case clang::X86::BI__builtin_ia32_ktestchi:
5212 case clang::X86::BI__builtin_ia32_ktestcsi:
5213 case clang::X86::BI__builtin_ia32_ktestcdi:
5216 return APInt(
sizeof(
unsigned char) * 8, (~A & B) == 0);
5219 case clang::X86::BI__builtin_ia32_ktestzqi:
5220 case clang::X86::BI__builtin_ia32_ktestzhi:
5221 case clang::X86::BI__builtin_ia32_ktestzsi:
5222 case clang::X86::BI__builtin_ia32_ktestzdi:
5225 return APInt(
sizeof(
unsigned char) * 8, (A & B) == 0);
5228 case clang::X86::BI__builtin_ia32_kortestcqi:
5229 case clang::X86::BI__builtin_ia32_kortestchi:
5230 case clang::X86::BI__builtin_ia32_kortestcsi:
5231 case clang::X86::BI__builtin_ia32_kortestcdi:
5234 return APInt(
sizeof(
unsigned char) * 8, ~(A | B) == 0);
5237 case clang::X86::BI__builtin_ia32_kortestzqi:
5238 case clang::X86::BI__builtin_ia32_kortestzhi:
5239 case clang::X86::BI__builtin_ia32_kortestzsi:
5240 case clang::X86::BI__builtin_ia32_kortestzdi:
5243 return APInt(
sizeof(
unsigned char) * 8, (A | B) == 0);
5246 case clang::X86::BI__builtin_ia32_kshiftliqi:
5247 case clang::X86::BI__builtin_ia32_kshiftlihi:
5248 case clang::X86::BI__builtin_ia32_kshiftlisi:
5249 case clang::X86::BI__builtin_ia32_kshiftlidi:
5252 unsigned Amt = RHS.getZExtValue() & 0xFF;
5253 if (Amt >= LHS.getBitWidth())
5254 return APInt::getZero(LHS.getBitWidth());
5255 return LHS.shl(Amt);
5258 case clang::X86::BI__builtin_ia32_kshiftriqi:
5259 case clang::X86::BI__builtin_ia32_kshiftrihi:
5260 case clang::X86::BI__builtin_ia32_kshiftrisi:
5261 case clang::X86::BI__builtin_ia32_kshiftridi:
5264 unsigned Amt = RHS.getZExtValue() & 0xFF;
5265 if (Amt >= LHS.getBitWidth())
5266 return APInt::getZero(LHS.getBitWidth());
5267 return LHS.lshr(Amt);
5270 case clang::X86::BI__builtin_ia32_lzcnt_u16:
5271 case clang::X86::BI__builtin_ia32_lzcnt_u32:
5272 case clang::X86::BI__builtin_ia32_lzcnt_u64:
5275 return APInt(Src.getBitWidth(), Src.countLeadingZeros());
5278 case clang::X86::BI__builtin_ia32_tzcnt_u16:
5279 case clang::X86::BI__builtin_ia32_tzcnt_u32:
5280 case clang::X86::BI__builtin_ia32_tzcnt_u64:
5283 return APInt(Src.getBitWidth(), Src.countTrailingZeros());
5286 case clang::X86::BI__builtin_ia32_addcarryx_u32:
5287 case clang::X86::BI__builtin_ia32_addcarryx_u64:
5291 case clang::X86::BI__builtin_ia32_subborrow_u32:
5292 case clang::X86::BI__builtin_ia32_subborrow_u64:
5296 case Builtin::BI__builtin_os_log_format_buffer_size:
5299 case Builtin::BI__builtin_ptrauth_string_discriminator:
5302 case Builtin::BI__builtin_infer_alloc_token:
5305 case Builtin::BI__noop:
5309 case Builtin::BI__builtin_operator_new:
5312 case Builtin::BI__builtin_operator_delete:
5315 case Builtin::BI__arithmetic_fence:
5318 case Builtin::BI__builtin_reduce_add:
5319 case Builtin::BI__builtin_reduce_mul:
5320 case Builtin::BI__builtin_reduce_and:
5321 case Builtin::BI__builtin_reduce_or:
5322 case Builtin::BI__builtin_reduce_xor:
5323 case Builtin::BI__builtin_reduce_min:
5324 case Builtin::BI__builtin_reduce_max:
5327 case Builtin::BI__builtin_elementwise_popcount:
5330 return APInt(Src.getBitWidth(), Src.popcount());
5332 case Builtin::BI__builtin_elementwise_bitreverse:
5334 S, OpPC,
Call, [](
const APSInt &Src) {
return Src.reverseBits(); });
5336 case Builtin::BI__builtin_elementwise_abs:
5339 case Builtin::BI__builtin_memcpy:
5340 case Builtin::BImemcpy:
5341 case Builtin::BI__builtin_wmemcpy:
5342 case Builtin::BIwmemcpy:
5343 case Builtin::BI__builtin_memmove:
5344 case Builtin::BImemmove:
5345 case Builtin::BI__builtin_wmemmove:
5346 case Builtin::BIwmemmove:
5349 case Builtin::BI__builtin_memcmp:
5350 case Builtin::BImemcmp:
5351 case Builtin::BI__builtin_bcmp:
5352 case Builtin::BIbcmp:
5353 case Builtin::BI__builtin_wmemcmp:
5354 case Builtin::BIwmemcmp:
5357 case Builtin::BImemchr:
5358 case Builtin::BI__builtin_memchr:
5359 case Builtin::BIstrchr:
5360 case Builtin::BI__builtin_strchr:
5361 case Builtin::BIwmemchr:
5362 case Builtin::BI__builtin_wmemchr:
5363 case Builtin::BIwcschr:
5364 case Builtin::BI__builtin_wcschr:
5365 case Builtin::BI__builtin_char_memchr:
5368 case Builtin::BI__builtin_object_size:
5371 case Builtin::BI__builtin_dynamic_object_size:
5375 case Builtin::BI__builtin_is_within_lifetime:
5378 case Builtin::BI__builtin_elementwise_add_sat:
5381 return LHS.isSigned() ? LHS.sadd_sat(RHS) : LHS.uadd_sat(RHS);
5384 case Builtin::BI__builtin_elementwise_sub_sat:
5387 return LHS.isSigned() ? LHS.ssub_sat(RHS) : LHS.usub_sat(RHS);
5390 case Builtin::BI__builtin_elementwise_pdep:
5392 llvm::APIntOps::pdep);
5394 case Builtin::BI__builtin_elementwise_pext:
5396 llvm::APIntOps::pext);
5398 case X86::BI__builtin_ia32_extract128i256:
5399 case X86::BI__builtin_ia32_vextractf128_pd256:
5400 case X86::BI__builtin_ia32_vextractf128_ps256:
5401 case X86::BI__builtin_ia32_vextractf128_si256:
5404 case X86::BI__builtin_ia32_extractf32x4_256_mask:
5405 case X86::BI__builtin_ia32_extractf32x4_mask:
5406 case X86::BI__builtin_ia32_extractf32x8_mask:
5407 case X86::BI__builtin_ia32_extractf64x2_256_mask:
5408 case X86::BI__builtin_ia32_extractf64x2_512_mask:
5409 case X86::BI__builtin_ia32_extractf64x4_mask:
5410 case X86::BI__builtin_ia32_extracti32x4_256_mask:
5411 case X86::BI__builtin_ia32_extracti32x4_mask:
5412 case X86::BI__builtin_ia32_extracti32x8_mask:
5413 case X86::BI__builtin_ia32_extracti64x2_256_mask:
5414 case X86::BI__builtin_ia32_extracti64x2_512_mask:
5415 case X86::BI__builtin_ia32_extracti64x4_mask:
5418 case clang::X86::BI__builtin_ia32_pmulhrsw128:
5419 case clang::X86::BI__builtin_ia32_pmulhrsw256:
5420 case clang::X86::BI__builtin_ia32_pmulhrsw512:
5423 return (llvm::APIntOps::mulsExtended(LHS, RHS).ashr(14) + 1)
5424 .extractBits(16, 1);
5427 case clang::X86::BI__builtin_ia32_movmskps:
5428 case clang::X86::BI__builtin_ia32_movmskpd:
5429 case clang::X86::BI__builtin_ia32_pmovmskb128:
5430 case clang::X86::BI__builtin_ia32_pmovmskb256:
5431 case clang::X86::BI__builtin_ia32_movmskps256:
5432 case clang::X86::BI__builtin_ia32_movmskpd256: {
5436 case X86::BI__builtin_ia32_psignb128:
5437 case X86::BI__builtin_ia32_psignb256:
5438 case X86::BI__builtin_ia32_psignw128:
5439 case X86::BI__builtin_ia32_psignw256:
5440 case X86::BI__builtin_ia32_psignd128:
5441 case X86::BI__builtin_ia32_psignd256:
5445 return APInt::getZero(AElem.getBitWidth());
5446 if (BElem.isNegative())
5451 case clang::X86::BI__builtin_ia32_pavgb128:
5452 case clang::X86::BI__builtin_ia32_pavgw128:
5453 case clang::X86::BI__builtin_ia32_pavgb256:
5454 case clang::X86::BI__builtin_ia32_pavgw256:
5455 case clang::X86::BI__builtin_ia32_pavgb512:
5456 case clang::X86::BI__builtin_ia32_pavgw512:
5458 llvm::APIntOps::avgCeilU);
5460 case clang::X86::BI__builtin_ia32_pmaddubsw128:
5461 case clang::X86::BI__builtin_ia32_pmaddubsw256:
5462 case clang::X86::BI__builtin_ia32_pmaddubsw512:
5467 unsigned BitWidth = 2 * LoLHS.getBitWidth();
5468 return (LoLHS.zext(BitWidth) * LoRHS.sext(BitWidth))
5469 .sadd_sat((HiLHS.zext(BitWidth) * HiRHS.sext(BitWidth)));
5472 case clang::X86::BI__builtin_ia32_pmaddwd128:
5473 case clang::X86::BI__builtin_ia32_pmaddwd256:
5474 case clang::X86::BI__builtin_ia32_pmaddwd512:
5479 unsigned BitWidth = 2 * LoLHS.getBitWidth();
5480 return (LoLHS.sext(BitWidth) * LoRHS.sext(BitWidth)) +
5481 (HiLHS.sext(BitWidth) * HiRHS.sext(BitWidth));
5484 case clang::X86::BI__builtin_ia32_psadbw128:
5485 case clang::X86::BI__builtin_ia32_psadbw256:
5486 case clang::X86::BI__builtin_ia32_psadbw512:
5489 case clang::X86::BI__builtin_ia32_dbpsadbw128:
5490 case clang::X86::BI__builtin_ia32_dbpsadbw256:
5491 case clang::X86::BI__builtin_ia32_dbpsadbw512:
5494 case clang::X86::BI__builtin_ia32_mpsadbw128:
5495 case clang::X86::BI__builtin_ia32_mpsadbw256:
5498 case clang::X86::BI__builtin_ia32_pmulhuw128:
5499 case clang::X86::BI__builtin_ia32_pmulhuw256:
5500 case clang::X86::BI__builtin_ia32_pmulhuw512:
5502 llvm::APIntOps::mulhu);
5504 case clang::X86::BI__builtin_ia32_pmulhw128:
5505 case clang::X86::BI__builtin_ia32_pmulhw256:
5506 case clang::X86::BI__builtin_ia32_pmulhw512:
5508 llvm::APIntOps::mulhs);
5510 case clang::X86::BI__builtin_ia32_psllv2di:
5511 case clang::X86::BI__builtin_ia32_psllv4di:
5512 case clang::X86::BI__builtin_ia32_psllv4si:
5513 case clang::X86::BI__builtin_ia32_psllv8di:
5514 case clang::X86::BI__builtin_ia32_psllv8hi:
5515 case clang::X86::BI__builtin_ia32_psllv8si:
5516 case clang::X86::BI__builtin_ia32_psllv16hi:
5517 case clang::X86::BI__builtin_ia32_psllv16si:
5518 case clang::X86::BI__builtin_ia32_psllv32hi:
5519 case clang::X86::BI__builtin_ia32_psllwi128:
5520 case clang::X86::BI__builtin_ia32_psllwi256:
5521 case clang::X86::BI__builtin_ia32_psllwi512:
5522 case clang::X86::BI__builtin_ia32_pslldi128:
5523 case clang::X86::BI__builtin_ia32_pslldi256:
5524 case clang::X86::BI__builtin_ia32_pslldi512:
5525 case clang::X86::BI__builtin_ia32_psllqi128:
5526 case clang::X86::BI__builtin_ia32_psllqi256:
5527 case clang::X86::BI__builtin_ia32_psllqi512:
5530 if (RHS.uge(LHS.getBitWidth())) {
5531 return APInt::getZero(LHS.getBitWidth());
5533 return LHS.shl(RHS.getZExtValue());
5536 case clang::X86::BI__builtin_ia32_psrav4si:
5537 case clang::X86::BI__builtin_ia32_psrav8di:
5538 case clang::X86::BI__builtin_ia32_psrav8hi:
5539 case clang::X86::BI__builtin_ia32_psrav8si:
5540 case clang::X86::BI__builtin_ia32_psrav16hi:
5541 case clang::X86::BI__builtin_ia32_psrav16si:
5542 case clang::X86::BI__builtin_ia32_psrav32hi:
5543 case clang::X86::BI__builtin_ia32_psravq128:
5544 case clang::X86::BI__builtin_ia32_psravq256:
5545 case clang::X86::BI__builtin_ia32_psrawi128:
5546 case clang::X86::BI__builtin_ia32_psrawi256:
5547 case clang::X86::BI__builtin_ia32_psrawi512:
5548 case clang::X86::BI__builtin_ia32_psradi128:
5549 case clang::X86::BI__builtin_ia32_psradi256:
5550 case clang::X86::BI__builtin_ia32_psradi512:
5551 case clang::X86::BI__builtin_ia32_psraqi128:
5552 case clang::X86::BI__builtin_ia32_psraqi256:
5553 case clang::X86::BI__builtin_ia32_psraqi512:
5556 if (RHS.uge(LHS.getBitWidth())) {
5557 return LHS.ashr(LHS.getBitWidth() - 1);
5559 return LHS.ashr(RHS.getZExtValue());
5562 case clang::X86::BI__builtin_ia32_psrlv2di:
5563 case clang::X86::BI__builtin_ia32_psrlv4di:
5564 case clang::X86::BI__builtin_ia32_psrlv4si:
5565 case clang::X86::BI__builtin_ia32_psrlv8di:
5566 case clang::X86::BI__builtin_ia32_psrlv8hi:
5567 case clang::X86::BI__builtin_ia32_psrlv8si:
5568 case clang::X86::BI__builtin_ia32_psrlv16hi:
5569 case clang::X86::BI__builtin_ia32_psrlv16si:
5570 case clang::X86::BI__builtin_ia32_psrlv32hi:
5571 case clang::X86::BI__builtin_ia32_psrlwi128:
5572 case clang::X86::BI__builtin_ia32_psrlwi256:
5573 case clang::X86::BI__builtin_ia32_psrlwi512:
5574 case clang::X86::BI__builtin_ia32_psrldi128:
5575 case clang::X86::BI__builtin_ia32_psrldi256:
5576 case clang::X86::BI__builtin_ia32_psrldi512:
5577 case clang::X86::BI__builtin_ia32_psrlqi128:
5578 case clang::X86::BI__builtin_ia32_psrlqi256:
5579 case clang::X86::BI__builtin_ia32_psrlqi512:
5582 if (RHS.uge(LHS.getBitWidth())) {
5583 return APInt::getZero(LHS.getBitWidth());
5585 return LHS.lshr(RHS.getZExtValue());
5587 case clang::X86::BI__builtin_ia32_packsswb128:
5588 case clang::X86::BI__builtin_ia32_packsswb256:
5589 case clang::X86::BI__builtin_ia32_packsswb512:
5590 case clang::X86::BI__builtin_ia32_packssdw128:
5591 case clang::X86::BI__builtin_ia32_packssdw256:
5592 case clang::X86::BI__builtin_ia32_packssdw512:
5594 return APInt(Src).truncSSat(Src.getBitWidth() / 2);
5596 case clang::X86::BI__builtin_ia32_packusdw128:
5597 case clang::X86::BI__builtin_ia32_packusdw256:
5598 case clang::X86::BI__builtin_ia32_packusdw512:
5599 case clang::X86::BI__builtin_ia32_packuswb128:
5600 case clang::X86::BI__builtin_ia32_packuswb256:
5601 case clang::X86::BI__builtin_ia32_packuswb512:
5603 return APInt(Src).truncSSatU(Src.getBitWidth() / 2);
5606 case clang::X86::BI__builtin_ia32_selectss_128:
5607 case clang::X86::BI__builtin_ia32_selectsd_128:
5608 case clang::X86::BI__builtin_ia32_selectsh_128:
5609 case clang::X86::BI__builtin_ia32_selectsbf_128:
5611 case clang::X86::BI__builtin_ia32_vprotbi:
5612 case clang::X86::BI__builtin_ia32_vprotdi:
5613 case clang::X86::BI__builtin_ia32_vprotqi:
5614 case clang::X86::BI__builtin_ia32_vprotwi:
5615 case clang::X86::BI__builtin_ia32_prold128:
5616 case clang::X86::BI__builtin_ia32_prold256:
5617 case clang::X86::BI__builtin_ia32_prold512:
5618 case clang::X86::BI__builtin_ia32_prolq128:
5619 case clang::X86::BI__builtin_ia32_prolq256:
5620 case clang::X86::BI__builtin_ia32_prolq512:
5623 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotl(RHS); });
5625 case clang::X86::BI__builtin_ia32_prord128:
5626 case clang::X86::BI__builtin_ia32_prord256:
5627 case clang::X86::BI__builtin_ia32_prord512:
5628 case clang::X86::BI__builtin_ia32_prorq128:
5629 case clang::X86::BI__builtin_ia32_prorq256:
5630 case clang::X86::BI__builtin_ia32_prorq512:
5633 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotr(RHS); });
5635 case Builtin::BI__builtin_elementwise_max:
5636 case Builtin::BI__builtin_elementwise_min:
5639 case clang::X86::BI__builtin_ia32_phaddw128:
5640 case clang::X86::BI__builtin_ia32_phaddw256:
5641 case clang::X86::BI__builtin_ia32_phaddd128:
5642 case clang::X86::BI__builtin_ia32_phaddd256:
5645 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
5646 case clang::X86::BI__builtin_ia32_phaddsw128:
5647 case clang::X86::BI__builtin_ia32_phaddsw256:
5650 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.sadd_sat(RHS); });
5651 case clang::X86::BI__builtin_ia32_phsubw128:
5652 case clang::X86::BI__builtin_ia32_phsubw256:
5653 case clang::X86::BI__builtin_ia32_phsubd128:
5654 case clang::X86::BI__builtin_ia32_phsubd256:
5657 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS - RHS; });
5658 case clang::X86::BI__builtin_ia32_phsubsw128:
5659 case clang::X86::BI__builtin_ia32_phsubsw256:
5662 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.ssub_sat(RHS); });
5663 case clang::X86::BI__builtin_ia32_haddpd:
5664 case clang::X86::BI__builtin_ia32_haddps:
5665 case clang::X86::BI__builtin_ia32_haddpd256:
5666 case clang::X86::BI__builtin_ia32_haddps256:
5669 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
5674 case clang::X86::BI__builtin_ia32_hsubpd:
5675 case clang::X86::BI__builtin_ia32_hsubps:
5676 case clang::X86::BI__builtin_ia32_hsubpd256:
5677 case clang::X86::BI__builtin_ia32_hsubps256:
5680 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
5682 F.subtract(RHS, RM);
5685 case clang::X86::BI__builtin_ia32_addsubpd:
5686 case clang::X86::BI__builtin_ia32_addsubps:
5687 case clang::X86::BI__builtin_ia32_addsubpd256:
5688 case clang::X86::BI__builtin_ia32_addsubps256:
5691 case clang::X86::BI__builtin_ia32_pmuldq128:
5692 case clang::X86::BI__builtin_ia32_pmuldq256:
5693 case clang::X86::BI__builtin_ia32_pmuldq512:
5698 return llvm::APIntOps::mulsExtended(LoLHS, LoRHS);
5701 case clang::X86::BI__builtin_ia32_pmuludq128:
5702 case clang::X86::BI__builtin_ia32_pmuludq256:
5703 case clang::X86::BI__builtin_ia32_pmuludq512:
5708 return llvm::APIntOps::muluExtended(LoLHS, LoRHS);
5711 case clang::X86::BI__builtin_ia32_pclmulqdq128:
5712 case clang::X86::BI__builtin_ia32_pclmulqdq256:
5713 case clang::X86::BI__builtin_ia32_pclmulqdq512:
5715 case Builtin::BI__builtin_elementwise_clmul:
5717 llvm::APIntOps::clmul);
5719 case Builtin::BI__builtin_elementwise_fma:
5723 llvm::RoundingMode RM) {
5725 F.fusedMultiplyAdd(Y, Z, RM);
5729 case X86::BI__builtin_ia32_vpmadd52luq128:
5730 case X86::BI__builtin_ia32_vpmadd52luq256:
5731 case X86::BI__builtin_ia32_vpmadd52luq512:
5734 return A + (B.trunc(52) *
C.trunc(52)).zext(64);
5736 case X86::BI__builtin_ia32_vpmadd52huq128:
5737 case X86::BI__builtin_ia32_vpmadd52huq256:
5738 case X86::BI__builtin_ia32_vpmadd52huq512:
5741 return A + llvm::APIntOps::mulhu(B.trunc(52),
C.trunc(52)).zext(64);
5744 case X86::BI__builtin_ia32_vpshldd128:
5745 case X86::BI__builtin_ia32_vpshldd256:
5746 case X86::BI__builtin_ia32_vpshldd512:
5747 case X86::BI__builtin_ia32_vpshldq128:
5748 case X86::BI__builtin_ia32_vpshldq256:
5749 case X86::BI__builtin_ia32_vpshldq512:
5750 case X86::BI__builtin_ia32_vpshldw128:
5751 case X86::BI__builtin_ia32_vpshldw256:
5752 case X86::BI__builtin_ia32_vpshldw512:
5756 return llvm::APIntOps::fshl(Hi, Lo, Amt);
5759 case X86::BI__builtin_ia32_vpshrdd128:
5760 case X86::BI__builtin_ia32_vpshrdd256:
5761 case X86::BI__builtin_ia32_vpshrdd512:
5762 case X86::BI__builtin_ia32_vpshrdq128:
5763 case X86::BI__builtin_ia32_vpshrdq256:
5764 case X86::BI__builtin_ia32_vpshrdq512:
5765 case X86::BI__builtin_ia32_vpshrdw128:
5766 case X86::BI__builtin_ia32_vpshrdw256:
5767 case X86::BI__builtin_ia32_vpshrdw512:
5772 return llvm::APIntOps::fshr(Hi, Lo, Amt);
5774 case X86::BI__builtin_ia32_vpconflictsi_128:
5775 case X86::BI__builtin_ia32_vpconflictsi_256:
5776 case X86::BI__builtin_ia32_vpconflictsi_512:
5777 case X86::BI__builtin_ia32_vpconflictdi_128:
5778 case X86::BI__builtin_ia32_vpconflictdi_256:
5779 case X86::BI__builtin_ia32_vpconflictdi_512:
5781 case X86::BI__builtin_ia32_compressdf128_mask:
5782 case X86::BI__builtin_ia32_compressdf256_mask:
5783 case X86::BI__builtin_ia32_compressdf512_mask:
5784 case X86::BI__builtin_ia32_compressdi128_mask:
5785 case X86::BI__builtin_ia32_compressdi256_mask:
5786 case X86::BI__builtin_ia32_compressdi512_mask:
5787 case X86::BI__builtin_ia32_compresshi128_mask:
5788 case X86::BI__builtin_ia32_compresshi256_mask:
5789 case X86::BI__builtin_ia32_compresshi512_mask:
5790 case X86::BI__builtin_ia32_compressqi128_mask:
5791 case X86::BI__builtin_ia32_compressqi256_mask:
5792 case X86::BI__builtin_ia32_compressqi512_mask:
5793 case X86::BI__builtin_ia32_compresssf128_mask:
5794 case X86::BI__builtin_ia32_compresssf256_mask:
5795 case X86::BI__builtin_ia32_compresssf512_mask:
5796 case X86::BI__builtin_ia32_compresssi128_mask:
5797 case X86::BI__builtin_ia32_compresssi256_mask:
5798 case X86::BI__builtin_ia32_compresssi512_mask: {
5800 Call->getArg(0)->getType()->castAs<
VectorType>()->getNumElements();
5802 S, OpPC,
Call, [NumElems](
unsigned DstIdx,
const APInt &ShuffleMask) {
5803 APInt CompressMask = ShuffleMask.trunc(NumElems);
5804 if (DstIdx < CompressMask.popcount()) {
5805 while (DstIdx != 0) {
5806 CompressMask = CompressMask & (CompressMask - 1);
5809 return std::pair<unsigned, int>{
5810 0,
static_cast<int>(CompressMask.countr_zero())};
5812 return std::pair<unsigned, int>{1,
static_cast<int>(DstIdx)};
5815 case X86::BI__builtin_ia32_expanddf128_mask:
5816 case X86::BI__builtin_ia32_expanddf256_mask:
5817 case X86::BI__builtin_ia32_expanddf512_mask:
5818 case X86::BI__builtin_ia32_expanddi128_mask:
5819 case X86::BI__builtin_ia32_expanddi256_mask:
5820 case X86::BI__builtin_ia32_expanddi512_mask:
5821 case X86::BI__builtin_ia32_expandhi128_mask:
5822 case X86::BI__builtin_ia32_expandhi256_mask:
5823 case X86::BI__builtin_ia32_expandhi512_mask:
5824 case X86::BI__builtin_ia32_expandqi128_mask:
5825 case X86::BI__builtin_ia32_expandqi256_mask:
5826 case X86::BI__builtin_ia32_expandqi512_mask:
5827 case X86::BI__builtin_ia32_expandsf128_mask:
5828 case X86::BI__builtin_ia32_expandsf256_mask:
5829 case X86::BI__builtin_ia32_expandsf512_mask:
5830 case X86::BI__builtin_ia32_expandsi128_mask:
5831 case X86::BI__builtin_ia32_expandsi256_mask:
5832 case X86::BI__builtin_ia32_expandsi512_mask: {
5834 S, OpPC,
Call, [](
unsigned DstIdx,
const APInt &ShuffleMask) {
5837 APInt ExpandMask = ShuffleMask.trunc(DstIdx + 1);
5838 if (ExpandMask[DstIdx]) {
5839 int SrcIdx = ExpandMask.popcount() - 1;
5840 return std::pair<unsigned, int>{0, SrcIdx};
5842 return std::pair<unsigned, int>{1,
static_cast<int>(DstIdx)};
5845 case clang::X86::BI__builtin_ia32_blendpd:
5846 case clang::X86::BI__builtin_ia32_blendpd256:
5847 case clang::X86::BI__builtin_ia32_blendps:
5848 case clang::X86::BI__builtin_ia32_blendps256:
5849 case clang::X86::BI__builtin_ia32_pblendw128:
5850 case clang::X86::BI__builtin_ia32_pblendw256:
5851 case clang::X86::BI__builtin_ia32_pblendd128:
5852 case clang::X86::BI__builtin_ia32_pblendd256:
5854 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5856 unsigned MaskBit = (ShuffleMask >> (DstIdx % 8)) & 0x1;
5857 unsigned SrcVecIdx = MaskBit ? 1 : 0;
5858 return std::pair<unsigned, int>{SrcVecIdx,
static_cast<int>(DstIdx)};
5863 case clang::X86::BI__builtin_ia32_blendvpd:
5864 case clang::X86::BI__builtin_ia32_blendvpd256:
5865 case clang::X86::BI__builtin_ia32_blendvps:
5866 case clang::X86::BI__builtin_ia32_blendvps256:
5870 llvm::RoundingMode) {
return C.isNegative() ?
T : F; });
5872 case clang::X86::BI__builtin_ia32_pblendvb128:
5873 case clang::X86::BI__builtin_ia32_pblendvb256:
5876 return ((
APInt)
C).isNegative() ?
T : F;
5878 case X86::BI__builtin_ia32_ptestz128:
5879 case X86::BI__builtin_ia32_ptestz256:
5880 case X86::BI__builtin_ia32_vtestzps:
5881 case X86::BI__builtin_ia32_vtestzps256:
5882 case X86::BI__builtin_ia32_vtestzpd:
5883 case X86::BI__builtin_ia32_vtestzpd256:
5886 [](
const APInt &A,
const APInt &B) {
return (A & B) == 0; });
5887 case X86::BI__builtin_ia32_ptestc128:
5888 case X86::BI__builtin_ia32_ptestc256:
5889 case X86::BI__builtin_ia32_vtestcps:
5890 case X86::BI__builtin_ia32_vtestcps256:
5891 case X86::BI__builtin_ia32_vtestcpd:
5892 case X86::BI__builtin_ia32_vtestcpd256:
5895 [](
const APInt &A,
const APInt &B) {
return (~A & B) == 0; });
5896 case X86::BI__builtin_ia32_ptestnzc128:
5897 case X86::BI__builtin_ia32_ptestnzc256:
5898 case X86::BI__builtin_ia32_vtestnzcps:
5899 case X86::BI__builtin_ia32_vtestnzcps256:
5900 case X86::BI__builtin_ia32_vtestnzcpd:
5901 case X86::BI__builtin_ia32_vtestnzcpd256:
5904 return ((A & B) != 0) && ((~A & B) != 0);
5906 case X86::BI__builtin_ia32_selectb_128:
5907 case X86::BI__builtin_ia32_selectb_256:
5908 case X86::BI__builtin_ia32_selectb_512:
5909 case X86::BI__builtin_ia32_selectw_128:
5910 case X86::BI__builtin_ia32_selectw_256:
5911 case X86::BI__builtin_ia32_selectw_512:
5912 case X86::BI__builtin_ia32_selectd_128:
5913 case X86::BI__builtin_ia32_selectd_256:
5914 case X86::BI__builtin_ia32_selectd_512:
5915 case X86::BI__builtin_ia32_selectq_128:
5916 case X86::BI__builtin_ia32_selectq_256:
5917 case X86::BI__builtin_ia32_selectq_512:
5918 case X86::BI__builtin_ia32_selectph_128:
5919 case X86::BI__builtin_ia32_selectph_256:
5920 case X86::BI__builtin_ia32_selectph_512:
5921 case X86::BI__builtin_ia32_selectpbf_128:
5922 case X86::BI__builtin_ia32_selectpbf_256:
5923 case X86::BI__builtin_ia32_selectpbf_512:
5924 case X86::BI__builtin_ia32_selectps_128:
5925 case X86::BI__builtin_ia32_selectps_256:
5926 case X86::BI__builtin_ia32_selectps_512:
5927 case X86::BI__builtin_ia32_selectpd_128:
5928 case X86::BI__builtin_ia32_selectpd_256:
5929 case X86::BI__builtin_ia32_selectpd_512:
5932 case X86::BI__builtin_ia32_shufps:
5933 case X86::BI__builtin_ia32_shufps256:
5934 case X86::BI__builtin_ia32_shufps512:
5936 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5937 unsigned NumElemPerLane = 4;
5938 unsigned NumSelectableElems = NumElemPerLane / 2;
5939 unsigned BitsPerElem = 2;
5940 unsigned IndexMask = 0x3;
5941 unsigned MaskBits = 8;
5942 unsigned Lane = DstIdx / NumElemPerLane;
5943 unsigned ElemInLane = DstIdx % NumElemPerLane;
5944 unsigned LaneOffset = Lane * NumElemPerLane;
5945 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
5946 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5947 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
5948 return std::pair<unsigned, int>{SrcIdx,
5949 static_cast<int>(LaneOffset + Index)};
5951 case X86::BI__builtin_ia32_shufpd:
5952 case X86::BI__builtin_ia32_shufpd256:
5953 case X86::BI__builtin_ia32_shufpd512:
5955 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5956 unsigned NumElemPerLane = 2;
5957 unsigned NumSelectableElems = NumElemPerLane / 2;
5958 unsigned BitsPerElem = 1;
5959 unsigned IndexMask = 0x1;
5960 unsigned MaskBits = 8;
5961 unsigned Lane = DstIdx / NumElemPerLane;
5962 unsigned ElemInLane = DstIdx % NumElemPerLane;
5963 unsigned LaneOffset = Lane * NumElemPerLane;
5964 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
5965 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5966 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
5967 return std::pair<unsigned, int>{SrcIdx,
5968 static_cast<int>(LaneOffset + Index)};
5971 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v16qi:
5972 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v32qi:
5973 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v64qi:
5975 case X86::BI__builtin_ia32_vgf2p8affineqb_v16qi:
5976 case X86::BI__builtin_ia32_vgf2p8affineqb_v32qi:
5977 case X86::BI__builtin_ia32_vgf2p8affineqb_v64qi:
5980 case X86::BI__builtin_ia32_vgf2p8mulb_v16qi:
5981 case X86::BI__builtin_ia32_vgf2p8mulb_v32qi:
5982 case X86::BI__builtin_ia32_vgf2p8mulb_v64qi:
5985 case X86::BI__builtin_ia32_bmacor16x16x16_v16hi:
5986 case X86::BI__builtin_ia32_bmacor16x16x16_v32hi:
5988 case X86::BI__builtin_ia32_bmacxor16x16x16_v16hi:
5989 case X86::BI__builtin_ia32_bmacxor16x16x16_v32hi:
5992 case X86::BI__builtin_ia32_insertps128:
5994 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Mask) {
5996 if ((Mask & (1 << DstIdx)) != 0) {
5997 return std::pair<unsigned, int>{0, -1};
6001 unsigned SrcElem = (Mask >> 6) & 0x3;
6002 unsigned DstElem = (Mask >> 4) & 0x3;
6003 if (DstIdx == DstElem) {
6005 return std::pair<unsigned, int>{1,
static_cast<int>(SrcElem)};
6008 return std::pair<unsigned, int>{0,
static_cast<int>(DstIdx)};
6011 case X86::BI__builtin_ia32_permvarsi256:
6012 case X86::BI__builtin_ia32_permvarsf256:
6013 case X86::BI__builtin_ia32_permvardf512:
6014 case X86::BI__builtin_ia32_permvardi512:
6015 case X86::BI__builtin_ia32_permvarhi128:
6017 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6018 int Offset = ShuffleMask & 0x7;
6019 return std::pair<unsigned, int>{0, Offset};
6021 case X86::BI__builtin_ia32_permvarqi128:
6022 case X86::BI__builtin_ia32_permvarhi256:
6023 case X86::BI__builtin_ia32_permvarsi512:
6024 case X86::BI__builtin_ia32_permvarsf512:
6026 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6027 int Offset = ShuffleMask & 0xF;
6028 return std::pair<unsigned, int>{0, Offset};
6030 case X86::BI__builtin_ia32_permvardi256:
6031 case X86::BI__builtin_ia32_permvardf256:
6033 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6034 int Offset = ShuffleMask & 0x3;
6035 return std::pair<unsigned, int>{0, Offset};
6037 case X86::BI__builtin_ia32_permvarqi256:
6038 case X86::BI__builtin_ia32_permvarhi512:
6040 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6041 int Offset = ShuffleMask & 0x1F;
6042 return std::pair<unsigned, int>{0, Offset};
6044 case X86::BI__builtin_ia32_permvarqi512:
6046 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6047 int Offset = ShuffleMask & 0x3F;
6048 return std::pair<unsigned, int>{0, Offset};
6050 case X86::BI__builtin_ia32_vpermi2varq128:
6051 case X86::BI__builtin_ia32_vpermi2varpd128:
6053 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6054 int Offset = ShuffleMask & 0x1;
6055 unsigned SrcIdx = (ShuffleMask >> 1) & 0x1;
6056 return std::pair<unsigned, int>{SrcIdx, Offset};
6058 case X86::BI__builtin_ia32_vpermi2vard128:
6059 case X86::BI__builtin_ia32_vpermi2varps128:
6060 case X86::BI__builtin_ia32_vpermi2varq256:
6061 case X86::BI__builtin_ia32_vpermi2varpd256:
6063 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6064 int Offset = ShuffleMask & 0x3;
6065 unsigned SrcIdx = (ShuffleMask >> 2) & 0x1;
6066 return std::pair<unsigned, int>{SrcIdx, Offset};
6068 case X86::BI__builtin_ia32_vpermi2varhi128:
6069 case X86::BI__builtin_ia32_vpermi2vard256:
6070 case X86::BI__builtin_ia32_vpermi2varps256:
6071 case X86::BI__builtin_ia32_vpermi2varq512:
6072 case X86::BI__builtin_ia32_vpermi2varpd512:
6074 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6075 int Offset = ShuffleMask & 0x7;
6076 unsigned SrcIdx = (ShuffleMask >> 3) & 0x1;
6077 return std::pair<unsigned, int>{SrcIdx, Offset};
6079 case X86::BI__builtin_ia32_vpermi2varqi128:
6080 case X86::BI__builtin_ia32_vpermi2varhi256:
6081 case X86::BI__builtin_ia32_vpermi2vard512:
6082 case X86::BI__builtin_ia32_vpermi2varps512:
6084 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6085 int Offset = ShuffleMask & 0xF;
6086 unsigned SrcIdx = (ShuffleMask >> 4) & 0x1;
6087 return std::pair<unsigned, int>{SrcIdx, Offset};
6089 case X86::BI__builtin_ia32_vpermi2varqi256:
6090 case X86::BI__builtin_ia32_vpermi2varhi512:
6092 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6093 int Offset = ShuffleMask & 0x1F;
6094 unsigned SrcIdx = (ShuffleMask >> 5) & 0x1;
6095 return std::pair<unsigned, int>{SrcIdx, Offset};
6097 case X86::BI__builtin_ia32_vpermi2varqi512:
6099 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6100 int Offset = ShuffleMask & 0x3F;
6101 unsigned SrcIdx = (ShuffleMask >> 6) & 0x1;
6102 return std::pair<unsigned, int>{SrcIdx, Offset};
6104 case X86::BI__builtin_ia32_vperm2f128_pd256:
6105 case X86::BI__builtin_ia32_vperm2f128_ps256:
6106 case X86::BI__builtin_ia32_vperm2f128_si256:
6107 case X86::BI__builtin_ia32_permti256: {
6108 unsigned NumElements =
6109 Call->getArg(0)->getType()->castAs<
VectorType>()->getNumElements();
6110 unsigned PreservedBitsCnt = NumElements >> 2;
6113 [PreservedBitsCnt](
unsigned DstIdx,
unsigned ShuffleMask) {
6114 unsigned ControlBitsCnt = DstIdx >> PreservedBitsCnt << 2;
6115 unsigned ControlBits = ShuffleMask >> ControlBitsCnt;
6117 if (ControlBits & 0b1000)
6118 return std::make_pair(0u, -1);
6120 unsigned SrcVecIdx = (ControlBits & 0b10) >> 1;
6121 unsigned PreservedBitsMask = (1 << PreservedBitsCnt) - 1;
6122 int SrcIdx = ((ControlBits & 0b1) << PreservedBitsCnt) |
6123 (DstIdx & PreservedBitsMask);
6124 return std::make_pair(SrcVecIdx, SrcIdx);
6127 case X86::BI__builtin_ia32_pshufb128:
6128 case X86::BI__builtin_ia32_pshufb256:
6129 case X86::BI__builtin_ia32_pshufb512:
6131 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6132 uint8_t Ctlb =
static_cast<uint8_t
>(ShuffleMask);
6134 return std::make_pair(0, -1);
6136 unsigned LaneBase = (DstIdx / 16) * 16;
6137 unsigned SrcOffset = Ctlb & 0x0F;
6138 unsigned SrcIdx = LaneBase + SrcOffset;
6139 return std::make_pair(0,
static_cast<int>(SrcIdx));
6142 case X86::BI__builtin_ia32_pshuflw:
6143 case X86::BI__builtin_ia32_pshuflw256:
6144 case X86::BI__builtin_ia32_pshuflw512:
6146 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6147 unsigned LaneBase = (DstIdx / 8) * 8;
6148 unsigned LaneIdx = DstIdx % 8;
6150 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
6151 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
6154 return std::make_pair(0,
static_cast<int>(DstIdx));
6157 case X86::BI__builtin_ia32_pshufhw:
6158 case X86::BI__builtin_ia32_pshufhw256:
6159 case X86::BI__builtin_ia32_pshufhw512:
6161 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6162 unsigned LaneBase = (DstIdx / 8) * 8;
6163 unsigned LaneIdx = DstIdx % 8;
6165 unsigned Sel = (ShuffleMask >> (2 * (LaneIdx - 4))) & 0x3;
6166 return std::make_pair(0,
static_cast<int>(LaneBase + 4 + Sel));
6169 return std::make_pair(0,
static_cast<int>(DstIdx));
6172 case X86::BI__builtin_ia32_pshufd:
6173 case X86::BI__builtin_ia32_pshufd256:
6174 case X86::BI__builtin_ia32_pshufd512:
6175 case X86::BI__builtin_ia32_vpermilps:
6176 case X86::BI__builtin_ia32_vpermilps256:
6177 case X86::BI__builtin_ia32_vpermilps512:
6179 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6180 unsigned LaneBase = (DstIdx / 4) * 4;
6181 unsigned LaneIdx = DstIdx % 4;
6182 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
6183 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
6186 case X86::BI__builtin_ia32_vpermilvarpd:
6187 case X86::BI__builtin_ia32_vpermilvarpd256:
6188 case X86::BI__builtin_ia32_vpermilvarpd512:
6190 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6191 unsigned NumElemPerLane = 2;
6192 unsigned Lane = DstIdx / NumElemPerLane;
6193 unsigned Offset = ShuffleMask & 0b10 ? 1 : 0;
6194 return std::make_pair(
6195 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
6198 case X86::BI__builtin_ia32_vpermilvarps:
6199 case X86::BI__builtin_ia32_vpermilvarps256:
6200 case X86::BI__builtin_ia32_vpermilvarps512:
6202 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6203 unsigned NumElemPerLane = 4;
6204 unsigned Lane = DstIdx / NumElemPerLane;
6205 unsigned Offset = ShuffleMask & 0b11;
6206 return std::make_pair(
6207 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
6210 case X86::BI__builtin_ia32_vpermilpd:
6211 case X86::BI__builtin_ia32_vpermilpd256:
6212 case X86::BI__builtin_ia32_vpermilpd512:
6214 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Control) {
6215 unsigned NumElemPerLane = 2;
6216 unsigned BitsPerElem = 1;
6217 unsigned MaskBits = 8;
6218 unsigned IndexMask = 0x1;
6219 unsigned Lane = DstIdx / NumElemPerLane;
6220 unsigned LaneOffset = Lane * NumElemPerLane;
6221 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
6222 unsigned Index = (Control >> BitIndex) & IndexMask;
6223 return std::make_pair(0,
static_cast<int>(LaneOffset + Index));
6226 case X86::BI__builtin_ia32_permdf256:
6227 case X86::BI__builtin_ia32_permdi256:
6229 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Control) {
6232 unsigned Index = (Control >> (2 * DstIdx)) & 0x3;
6233 return std::make_pair(0,
static_cast<int>(Index));
6236 case X86::BI__builtin_ia32_vpmultishiftqb128:
6237 case X86::BI__builtin_ia32_vpmultishiftqb256:
6238 case X86::BI__builtin_ia32_vpmultishiftqb512:
6240 case X86::BI__builtin_ia32_kandqi:
6241 case X86::BI__builtin_ia32_kandhi:
6242 case X86::BI__builtin_ia32_kandsi:
6243 case X86::BI__builtin_ia32_kanddi:
6246 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS & RHS; });
6248 case X86::BI__builtin_ia32_kandnqi:
6249 case X86::BI__builtin_ia32_kandnhi:
6250 case X86::BI__builtin_ia32_kandnsi:
6251 case X86::BI__builtin_ia32_kandndi:
6254 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~LHS & RHS; });
6256 case X86::BI__builtin_ia32_korqi:
6257 case X86::BI__builtin_ia32_korhi:
6258 case X86::BI__builtin_ia32_korsi:
6259 case X86::BI__builtin_ia32_kordi:
6262 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS | RHS; });
6264 case X86::BI__builtin_ia32_kxnorqi:
6265 case X86::BI__builtin_ia32_kxnorhi:
6266 case X86::BI__builtin_ia32_kxnorsi:
6267 case X86::BI__builtin_ia32_kxnordi:
6270 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~(LHS ^ RHS); });
6272 case X86::BI__builtin_ia32_kxorqi:
6273 case X86::BI__builtin_ia32_kxorhi:
6274 case X86::BI__builtin_ia32_kxorsi:
6275 case X86::BI__builtin_ia32_kxordi:
6278 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS ^ RHS; });
6280 case X86::BI__builtin_ia32_knotqi:
6281 case X86::BI__builtin_ia32_knothi:
6282 case X86::BI__builtin_ia32_knotsi:
6283 case X86::BI__builtin_ia32_knotdi:
6285 S, OpPC,
Call, [](
const APSInt &Src) {
return ~Src; });
6287 case X86::BI__builtin_ia32_kaddqi:
6288 case X86::BI__builtin_ia32_kaddhi:
6289 case X86::BI__builtin_ia32_kaddsi:
6290 case X86::BI__builtin_ia32_kadddi:
6293 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
6295 case X86::BI__builtin_ia32_kmovb:
6296 case X86::BI__builtin_ia32_kmovw:
6297 case X86::BI__builtin_ia32_kmovd:
6298 case X86::BI__builtin_ia32_kmovq:
6300 S, OpPC,
Call, [](
const APSInt &Src) {
return Src; });
6302 case X86::BI__builtin_ia32_kunpckhi:
6303 case X86::BI__builtin_ia32_kunpckdi:
6304 case X86::BI__builtin_ia32_kunpcksi:
6309 unsigned BW = A.getBitWidth();
6310 return APSInt(A.trunc(BW / 2).concat(B.trunc(BW / 2)),
6314 case X86::BI__builtin_ia32_phminposuw128:
6317 case X86::BI__builtin_ia32_psraq128:
6318 case X86::BI__builtin_ia32_psraq256:
6319 case X86::BI__builtin_ia32_psraq512:
6320 case X86::BI__builtin_ia32_psrad128:
6321 case X86::BI__builtin_ia32_psrad256:
6322 case X86::BI__builtin_ia32_psrad512:
6323 case X86::BI__builtin_ia32_psraw128:
6324 case X86::BI__builtin_ia32_psraw256:
6325 case X86::BI__builtin_ia32_psraw512:
6328 [](
const APInt &Elt, uint64_t Count) {
return Elt.ashr(Count); },
6329 [](
const APInt &Elt,
unsigned Width) {
return Elt.ashr(Width - 1); });
6331 case X86::BI__builtin_ia32_psllq128:
6332 case X86::BI__builtin_ia32_psllq256:
6333 case X86::BI__builtin_ia32_psllq512:
6334 case X86::BI__builtin_ia32_pslld128:
6335 case X86::BI__builtin_ia32_pslld256:
6336 case X86::BI__builtin_ia32_pslld512:
6337 case X86::BI__builtin_ia32_psllw128:
6338 case X86::BI__builtin_ia32_psllw256:
6339 case X86::BI__builtin_ia32_psllw512:
6342 [](
const APInt &Elt, uint64_t Count) {
return Elt.shl(Count); },
6343 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
6345 case X86::BI__builtin_ia32_psrlq128:
6346 case X86::BI__builtin_ia32_psrlq256:
6347 case X86::BI__builtin_ia32_psrlq512:
6348 case X86::BI__builtin_ia32_psrld128:
6349 case X86::BI__builtin_ia32_psrld256:
6350 case X86::BI__builtin_ia32_psrld512:
6351 case X86::BI__builtin_ia32_psrlw128:
6352 case X86::BI__builtin_ia32_psrlw256:
6353 case X86::BI__builtin_ia32_psrlw512:
6356 [](
const APInt &Elt, uint64_t Count) {
return Elt.lshr(Count); },
6357 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
6359 case X86::BI__builtin_ia32_pternlogd128_mask:
6360 case X86::BI__builtin_ia32_pternlogd256_mask:
6361 case X86::BI__builtin_ia32_pternlogd512_mask:
6362 case X86::BI__builtin_ia32_pternlogq128_mask:
6363 case X86::BI__builtin_ia32_pternlogq256_mask:
6364 case X86::BI__builtin_ia32_pternlogq512_mask:
6366 case X86::BI__builtin_ia32_pternlogd128_maskz:
6367 case X86::BI__builtin_ia32_pternlogd256_maskz:
6368 case X86::BI__builtin_ia32_pternlogd512_maskz:
6369 case X86::BI__builtin_ia32_pternlogq128_maskz:
6370 case X86::BI__builtin_ia32_pternlogq256_maskz:
6371 case X86::BI__builtin_ia32_pternlogq512_maskz:
6373 case Builtin::BI__builtin_elementwise_fshl:
6375 llvm::APIntOps::fshl);
6376 case Builtin::BI__builtin_elementwise_fshr:
6378 llvm::APIntOps::fshr);
6380 case X86::BI__builtin_ia32_shuf_f32x4_256:
6381 case X86::BI__builtin_ia32_shuf_i32x4_256:
6382 case X86::BI__builtin_ia32_shuf_f64x2_256:
6383 case X86::BI__builtin_ia32_shuf_i64x2_256:
6384 case X86::BI__builtin_ia32_shuf_f32x4:
6385 case X86::BI__builtin_ia32_shuf_i32x4:
6386 case X86::BI__builtin_ia32_shuf_f64x2:
6387 case X86::BI__builtin_ia32_shuf_i64x2: {
6393 unsigned LaneBits = 128u;
6394 unsigned NumLanes = (NumElems * ElemBits) / LaneBits;
6395 unsigned NumElemsPerLane = LaneBits / ElemBits;
6399 [NumLanes, NumElemsPerLane](
unsigned DstIdx,
unsigned ShuffleMask) {
6401 unsigned BitsPerElem = NumLanes / 2;
6402 unsigned IndexMask = (1u << BitsPerElem) - 1;
6403 unsigned Lane = DstIdx / NumElemsPerLane;
6404 unsigned SrcIdx = (Lane < NumLanes / 2) ? 0 : 1;
6405 unsigned BitIdx = BitsPerElem * Lane;
6406 unsigned SrcLaneIdx = (ShuffleMask >> BitIdx) & IndexMask;
6407 unsigned ElemInLane = DstIdx % NumElemsPerLane;
6408 unsigned IdxToPick = SrcLaneIdx * NumElemsPerLane + ElemInLane;
6409 return std::pair<unsigned, int>{SrcIdx, IdxToPick};
6413 case X86::BI__builtin_ia32_insertf32x4_256:
6414 case X86::BI__builtin_ia32_inserti32x4_256:
6415 case X86::BI__builtin_ia32_insertf64x2_256:
6416 case X86::BI__builtin_ia32_inserti64x2_256:
6417 case X86::BI__builtin_ia32_insertf32x4:
6418 case X86::BI__builtin_ia32_inserti32x4:
6419 case X86::BI__builtin_ia32_insertf64x2_512:
6420 case X86::BI__builtin_ia32_inserti64x2_512:
6421 case X86::BI__builtin_ia32_insertf32x8:
6422 case X86::BI__builtin_ia32_inserti32x8:
6423 case X86::BI__builtin_ia32_insertf64x4:
6424 case X86::BI__builtin_ia32_inserti64x4:
6425 case X86::BI__builtin_ia32_vinsertf128_ps256:
6426 case X86::BI__builtin_ia32_vinsertf128_pd256:
6427 case X86::BI__builtin_ia32_vinsertf128_si256:
6428 case X86::BI__builtin_ia32_insert128i256:
6431 case clang::X86::BI__builtin_ia32_vcvtps2ph:
6432 case clang::X86::BI__builtin_ia32_vcvtps2ph256:
6435 case X86::BI__builtin_ia32_vec_ext_v4hi:
6436 case X86::BI__builtin_ia32_vec_ext_v16qi:
6437 case X86::BI__builtin_ia32_vec_ext_v8hi:
6438 case X86::BI__builtin_ia32_vec_ext_v4si:
6439 case X86::BI__builtin_ia32_vec_ext_v2di:
6440 case X86::BI__builtin_ia32_vec_ext_v32qi:
6441 case X86::BI__builtin_ia32_vec_ext_v16hi:
6442 case X86::BI__builtin_ia32_vec_ext_v8si:
6443 case X86::BI__builtin_ia32_vec_ext_v4di:
6444 case X86::BI__builtin_ia32_vec_ext_v4sf:
6447 case X86::BI__builtin_ia32_vec_set_v4hi:
6448 case X86::BI__builtin_ia32_vec_set_v16qi:
6449 case X86::BI__builtin_ia32_vec_set_v8hi:
6450 case X86::BI__builtin_ia32_vec_set_v4si:
6451 case X86::BI__builtin_ia32_vec_set_v2di:
6452 case X86::BI__builtin_ia32_vec_set_v32qi:
6453 case X86::BI__builtin_ia32_vec_set_v16hi:
6454 case X86::BI__builtin_ia32_vec_set_v8si:
6455 case X86::BI__builtin_ia32_vec_set_v4di:
6458 case X86::BI__builtin_ia32_cvtb2mask128:
6459 case X86::BI__builtin_ia32_cvtb2mask256:
6460 case X86::BI__builtin_ia32_cvtb2mask512:
6461 case X86::BI__builtin_ia32_cvtw2mask128:
6462 case X86::BI__builtin_ia32_cvtw2mask256:
6463 case X86::BI__builtin_ia32_cvtw2mask512:
6464 case X86::BI__builtin_ia32_cvtd2mask128:
6465 case X86::BI__builtin_ia32_cvtd2mask256:
6466 case X86::BI__builtin_ia32_cvtd2mask512:
6467 case X86::BI__builtin_ia32_cvtq2mask128:
6468 case X86::BI__builtin_ia32_cvtq2mask256:
6469 case X86::BI__builtin_ia32_cvtq2mask512:
6472 case X86::BI__builtin_ia32_cvtmask2b128:
6473 case X86::BI__builtin_ia32_cvtmask2b256:
6474 case X86::BI__builtin_ia32_cvtmask2b512:
6475 case X86::BI__builtin_ia32_cvtmask2w128:
6476 case X86::BI__builtin_ia32_cvtmask2w256:
6477 case X86::BI__builtin_ia32_cvtmask2w512:
6478 case X86::BI__builtin_ia32_cvtmask2d128:
6479 case X86::BI__builtin_ia32_cvtmask2d256:
6480 case X86::BI__builtin_ia32_cvtmask2d512:
6481 case X86::BI__builtin_ia32_cvtmask2q128:
6482 case X86::BI__builtin_ia32_cvtmask2q256:
6483 case X86::BI__builtin_ia32_cvtmask2q512:
6486 case X86::BI__builtin_ia32_cvtsd2ss:
6489 case X86::BI__builtin_ia32_cvtsd2ss_round_mask:
6492 case X86::BI__builtin_ia32_cvtpd2ps:
6493 case X86::BI__builtin_ia32_cvtpd2ps256:
6495 case X86::BI__builtin_ia32_cvtpd2ps_mask:
6497 case X86::BI__builtin_ia32_cvtpd2ps512_mask:
6500 case X86::BI__builtin_ia32_cmpb128_mask:
6501 case X86::BI__builtin_ia32_cmpw128_mask:
6502 case X86::BI__builtin_ia32_cmpd128_mask:
6503 case X86::BI__builtin_ia32_cmpq128_mask:
6504 case X86::BI__builtin_ia32_cmpb256_mask:
6505 case X86::BI__builtin_ia32_cmpw256_mask:
6506 case X86::BI__builtin_ia32_cmpd256_mask:
6507 case X86::BI__builtin_ia32_cmpq256_mask:
6508 case X86::BI__builtin_ia32_cmpb512_mask:
6509 case X86::BI__builtin_ia32_cmpw512_mask:
6510 case X86::BI__builtin_ia32_cmpd512_mask:
6511 case X86::BI__builtin_ia32_cmpq512_mask:
6515 case X86::BI__builtin_ia32_ucmpb128_mask:
6516 case X86::BI__builtin_ia32_ucmpw128_mask:
6517 case X86::BI__builtin_ia32_ucmpd128_mask:
6518 case X86::BI__builtin_ia32_ucmpq128_mask:
6519 case X86::BI__builtin_ia32_ucmpb256_mask:
6520 case X86::BI__builtin_ia32_ucmpw256_mask:
6521 case X86::BI__builtin_ia32_ucmpd256_mask:
6522 case X86::BI__builtin_ia32_ucmpq256_mask:
6523 case X86::BI__builtin_ia32_ucmpb512_mask:
6524 case X86::BI__builtin_ia32_ucmpw512_mask:
6525 case X86::BI__builtin_ia32_ucmpd512_mask:
6526 case X86::BI__builtin_ia32_ucmpq512_mask:
6530 case X86::BI__builtin_ia32_vpshufbitqmb128_mask:
6531 case X86::BI__builtin_ia32_vpshufbitqmb256_mask:
6532 case X86::BI__builtin_ia32_vpshufbitqmb512_mask:
6535 case X86::BI__builtin_ia32_pslldqi128_byteshift:
6536 case X86::BI__builtin_ia32_pslldqi256_byteshift:
6537 case X86::BI__builtin_ia32_pslldqi512_byteshift:
6544 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
6545 unsigned LaneBase = (DstIdx / 16) * 16;
6546 unsigned LaneIdx = DstIdx % 16;
6547 if (LaneIdx < Shift)
6548 return std::make_pair(0, -1);
6550 return std::make_pair(0,
6551 static_cast<int>(LaneBase + LaneIdx - Shift));
6554 case X86::BI__builtin_ia32_psrldqi128_byteshift:
6555 case X86::BI__builtin_ia32_psrldqi256_byteshift:
6556 case X86::BI__builtin_ia32_psrldqi512_byteshift:
6563 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
6564 unsigned LaneBase = (DstIdx / 16) * 16;
6565 unsigned LaneIdx = DstIdx % 16;
6566 if (LaneIdx + Shift < 16)
6567 return std::make_pair(0,
6568 static_cast<int>(LaneBase + LaneIdx + Shift));
6570 return std::make_pair(0, -1);
6573 case X86::BI__builtin_ia32_palignr128:
6574 case X86::BI__builtin_ia32_palignr256:
6575 case X86::BI__builtin_ia32_palignr512:
6577 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Shift) {
6579 unsigned VecIdx = 1;
6582 int Lane = DstIdx / 16;
6583 int Offset = DstIdx % 16;
6586 unsigned ShiftedIdx = Offset + (Shift & 0xFF);
6587 if (ShiftedIdx < 16) {
6588 ElemIdx = ShiftedIdx + (Lane * 16);
6589 }
else if (ShiftedIdx < 32) {
6591 ElemIdx = (ShiftedIdx - 16) + (Lane * 16);
6594 return std::pair<unsigned, int>{VecIdx, ElemIdx};
6597 case X86::BI__builtin_ia32_alignd128:
6598 case X86::BI__builtin_ia32_alignd256:
6599 case X86::BI__builtin_ia32_alignd512:
6600 case X86::BI__builtin_ia32_alignq128:
6601 case X86::BI__builtin_ia32_alignq256:
6602 case X86::BI__builtin_ia32_alignq512: {
6603 unsigned NumElems =
Call->getType()->castAs<
VectorType>()->getNumElements();
6605 S, OpPC,
Call, [NumElems](
unsigned DstIdx,
unsigned Shift) {
6606 unsigned Imm = Shift & 0xFF;
6607 unsigned EffectiveShift = Imm & (NumElems - 1);
6608 unsigned SourcePos = DstIdx + EffectiveShift;
6609 unsigned VecIdx = SourcePos < NumElems ? 1u : 0u;
6610 unsigned ElemIdx = SourcePos & (NumElems - 1);
6611 return std::pair<unsigned, int>{VecIdx,
static_cast<int>(ElemIdx)};
6615 case clang::X86::BI__builtin_ia32_minps:
6616 case clang::X86::BI__builtin_ia32_minpd:
6617 case clang::X86::BI__builtin_ia32_minph128:
6618 case clang::X86::BI__builtin_ia32_minph256:
6619 case clang::X86::BI__builtin_ia32_minps256:
6620 case clang::X86::BI__builtin_ia32_minpd256:
6621 case clang::X86::BI__builtin_ia32_minps512:
6622 case clang::X86::BI__builtin_ia32_minpd512:
6623 case clang::X86::BI__builtin_ia32_minph512:
6627 std::optional<APSInt>) -> std::optional<APFloat> {
6628 if (A.isNaN() || A.isInfinity() || A.isDenormal() || B.isNaN() ||
6629 B.isInfinity() || B.isDenormal())
6630 return std::nullopt;
6631 if (A.isZero() && B.isZero())
6633 return llvm::minimum(A, B);
6636 case clang::X86::BI__builtin_ia32_minss:
6637 case clang::X86::BI__builtin_ia32_minsd:
6641 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
6646 case clang::X86::BI__builtin_ia32_minsd_round_mask:
6647 case clang::X86::BI__builtin_ia32_minss_round_mask:
6648 case clang::X86::BI__builtin_ia32_minsh_round_mask:
6649 case clang::X86::BI__builtin_ia32_maxsd_round_mask:
6650 case clang::X86::BI__builtin_ia32_maxss_round_mask:
6651 case clang::X86::BI__builtin_ia32_maxsh_round_mask: {
6652 bool IsMin = BuiltinID == clang::X86::BI__builtin_ia32_minsd_round_mask ||
6653 BuiltinID == clang::X86::BI__builtin_ia32_minss_round_mask ||
6654 BuiltinID == clang::X86::BI__builtin_ia32_minsh_round_mask;
6658 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
6663 case clang::X86::BI__builtin_ia32_maxps:
6664 case clang::X86::BI__builtin_ia32_maxpd:
6665 case clang::X86::BI__builtin_ia32_maxph128:
6666 case clang::X86::BI__builtin_ia32_maxph256:
6667 case clang::X86::BI__builtin_ia32_maxps256:
6668 case clang::X86::BI__builtin_ia32_maxpd256:
6669 case clang::X86::BI__builtin_ia32_maxps512:
6670 case clang::X86::BI__builtin_ia32_maxpd512:
6671 case clang::X86::BI__builtin_ia32_maxph512:
6675 std::optional<APSInt>) -> std::optional<APFloat> {
6676 if (A.isNaN() || A.isInfinity() || A.isDenormal() || B.isNaN() ||
6677 B.isInfinity() || B.isDenormal())
6678 return std::nullopt;
6679 if (A.isZero() && B.isZero())
6681 return llvm::maximum(A, B);
6684 case clang::X86::BI__builtin_ia32_maxss:
6685 case clang::X86::BI__builtin_ia32_maxsd:
6689 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
6693 case X86::BI__builtin_ia32_vpdpwssd128:
6694 case X86::BI__builtin_ia32_vpdpwssd256:
6695 case X86::BI__builtin_ia32_vpdpwssd512:
6696 case X86::BI__builtin_ia32_vpdpbusd128:
6697 case X86::BI__builtin_ia32_vpdpbusd256:
6698 case X86::BI__builtin_ia32_vpdpbusd512:
6700 case X86::BI__builtin_ia32_vpdpwssds128:
6701 case X86::BI__builtin_ia32_vpdpwssds256:
6702 case X86::BI__builtin_ia32_vpdpwssds512:
6703 case X86::BI__builtin_ia32_vpdpbusds128:
6704 case X86::BI__builtin_ia32_vpdpbusds256:
6705 case X86::BI__builtin_ia32_vpdpbusds512:
6707 case X86::BI__builtin_ia32_cvtss2si:
6708 case X86::BI__builtin_ia32_cvtsd2si:
6709 case X86::BI__builtin_ia32_cvttss2si:
6710 case X86::BI__builtin_ia32_cvttsd2si:
6711 case X86::BI__builtin_ia32_cvtss2si64:
6712 case X86::BI__builtin_ia32_cvtsd2si64:
6713 case X86::BI__builtin_ia32_cvttss2si64:
6714 case X86::BI__builtin_ia32_cvttsd2si64:
6716 case X86::BI__builtin_ia32_cvtpd2dq:
6717 case X86::BI__builtin_ia32_cvttpd2dq:
6718 case X86::BI__builtin_ia32_cvtps2dq:
6719 case X86::BI__builtin_ia32_cvtpd2dq256:
6720 case X86::BI__builtin_ia32_cvtps2dq256:
6721 case X86::BI__builtin_ia32_cvttps2dq:
6722 case X86::BI__builtin_ia32_cvttpd2dq256:
6723 case X86::BI__builtin_ia32_cvttps2dq256:
6727 diag::note_invalid_subexpr_in_const_expr)
6733 llvm_unreachable(
"Unhandled builtin ID");