4257 uint32_t BuiltinID) {
4262 switch (BuiltinID) {
4263 case Builtin::BI__builtin_is_constant_evaluated:
4266 case Builtin::BI__builtin_assume:
4267 case Builtin::BI__assume:
4270 case Builtin::BI__builtin_strcmp:
4271 case Builtin::BIstrcmp:
4272 case Builtin::BI__builtin_strncmp:
4273 case Builtin::BIstrncmp:
4274 case Builtin::BI__builtin_wcsncmp:
4275 case Builtin::BIwcsncmp:
4276 case Builtin::BI__builtin_wcscmp:
4277 case Builtin::BIwcscmp:
4280 case Builtin::BI__builtin_strlen:
4281 case Builtin::BIstrlen:
4282 case Builtin::BI__builtin_wcslen:
4283 case Builtin::BIwcslen:
4286 case Builtin::BI__builtin_nan:
4287 case Builtin::BI__builtin_nanf:
4288 case Builtin::BI__builtin_nanl:
4289 case Builtin::BI__builtin_nanf16:
4290 case Builtin::BI__builtin_nanf128:
4293 case Builtin::BI__builtin_nans:
4294 case Builtin::BI__builtin_nansf:
4295 case Builtin::BI__builtin_nansl:
4296 case Builtin::BI__builtin_nansf16:
4297 case Builtin::BI__builtin_nansf128:
4300 case Builtin::BI__builtin_huge_val:
4301 case Builtin::BI__builtin_huge_valf:
4302 case Builtin::BI__builtin_huge_vall:
4303 case Builtin::BI__builtin_huge_valf16:
4304 case Builtin::BI__builtin_huge_valf128:
4305 case Builtin::BI__builtin_inf:
4306 case Builtin::BI__builtin_inff:
4307 case Builtin::BI__builtin_infl:
4308 case Builtin::BI__builtin_inff16:
4309 case Builtin::BI__builtin_inff128:
4312 case Builtin::BI__builtin_copysign:
4313 case Builtin::BI__builtin_copysignf:
4314 case Builtin::BI__builtin_copysignl:
4315 case Builtin::BI__builtin_copysignf128:
4318 case Builtin::BI__builtin_fmin:
4319 case Builtin::BI__builtin_fminf:
4320 case Builtin::BI__builtin_fminl:
4321 case Builtin::BI__builtin_fminf16:
4322 case Builtin::BI__builtin_fminf128:
4325 case Builtin::BI__builtin_fminimum_num:
4326 case Builtin::BI__builtin_fminimum_numf:
4327 case Builtin::BI__builtin_fminimum_numl:
4328 case Builtin::BI__builtin_fminimum_numf16:
4329 case Builtin::BI__builtin_fminimum_numf128:
4332 case Builtin::BI__builtin_fmax:
4333 case Builtin::BI__builtin_fmaxf:
4334 case Builtin::BI__builtin_fmaxl:
4335 case Builtin::BI__builtin_fmaxf16:
4336 case Builtin::BI__builtin_fmaxf128:
4339 case Builtin::BI__builtin_fmaximum_num:
4340 case Builtin::BI__builtin_fmaximum_numf:
4341 case Builtin::BI__builtin_fmaximum_numl:
4342 case Builtin::BI__builtin_fmaximum_numf16:
4343 case Builtin::BI__builtin_fmaximum_numf128:
4346 case Builtin::BI__builtin_isnan:
4349 case Builtin::BI__builtin_issignaling:
4352 case Builtin::BI__builtin_isinf:
4355 case Builtin::BI__builtin_isinf_sign:
4358 case Builtin::BI__builtin_isfinite:
4361 case Builtin::BI__builtin_isnormal:
4364 case Builtin::BI__builtin_issubnormal:
4367 case Builtin::BI__builtin_iszero:
4370 case Builtin::BI__builtin_signbit:
4371 case Builtin::BI__builtin_signbitf:
4372 case Builtin::BI__builtin_signbitl:
4375 case Builtin::BI__builtin_isgreater:
4376 case Builtin::BI__builtin_isgreaterequal:
4377 case Builtin::BI__builtin_isless:
4378 case Builtin::BI__builtin_islessequal:
4379 case Builtin::BI__builtin_islessgreater:
4380 case Builtin::BI__builtin_isunordered:
4383 case Builtin::BI__builtin_isfpclass:
4386 case Builtin::BI__builtin_fpclassify:
4389 case Builtin::BI__builtin_fabs:
4390 case Builtin::BI__builtin_fabsf:
4391 case Builtin::BI__builtin_fabsl:
4392 case Builtin::BI__builtin_fabsf128:
4395 case Builtin::BI__builtin_abs:
4396 case Builtin::BI__builtin_labs:
4397 case Builtin::BI__builtin_llabs:
4400 case Builtin::BI__builtin_popcount:
4401 case Builtin::BI__builtin_popcountl:
4402 case Builtin::BI__builtin_popcountll:
4403 case Builtin::BI__builtin_popcountg:
4404 case Builtin::BI__popcnt16:
4405 case Builtin::BI__popcnt:
4406 case Builtin::BI__popcnt64:
4409 case Builtin::BI__builtin_parity:
4410 case Builtin::BI__builtin_parityl:
4411 case Builtin::BI__builtin_parityll:
4414 return APInt(Val.getBitWidth(), Val.popcount() % 2);
4416 case Builtin::BI__builtin_clrsb:
4417 case Builtin::BI__builtin_clrsbl:
4418 case Builtin::BI__builtin_clrsbll:
4421 return APInt(Val.getBitWidth(),
4422 Val.getBitWidth() - Val.getSignificantBits());
4424 case Builtin::BI__builtin_bitreverseg:
4425 case Builtin::BI__builtin_bitreverse8:
4426 case Builtin::BI__builtin_bitreverse16:
4427 case Builtin::BI__builtin_bitreverse32:
4428 case Builtin::BI__builtin_bitreverse64:
4430 S, OpPC,
Call, [](
const APSInt &Val) {
return Val.reverseBits(); });
4432 case Builtin::BI__builtin_classify_type:
4435 case Builtin::BI__builtin_expect:
4436 case Builtin::BI__builtin_expect_with_probability:
4439 case Builtin::BI__builtin_rotateleft8:
4440 case Builtin::BI__builtin_rotateleft16:
4441 case Builtin::BI__builtin_rotateleft32:
4442 case Builtin::BI__builtin_rotateleft64:
4443 case Builtin::BI__builtin_stdc_rotate_left:
4444 case Builtin::BI_rotl8:
4445 case Builtin::BI_rotl16:
4446 case Builtin::BI_rotl:
4447 case Builtin::BI_lrotl:
4448 case Builtin::BI_rotl64:
4449 case Builtin::BI__builtin_rotateright8:
4450 case Builtin::BI__builtin_rotateright16:
4451 case Builtin::BI__builtin_rotateright32:
4452 case Builtin::BI__builtin_rotateright64:
4453 case Builtin::BI__builtin_stdc_rotate_right:
4454 case Builtin::BI_rotr8:
4455 case Builtin::BI_rotr16:
4456 case Builtin::BI_rotr:
4457 case Builtin::BI_lrotr:
4458 case Builtin::BI_rotr64: {
4461 switch (BuiltinID) {
4462 case Builtin::BI__builtin_rotateright8:
4463 case Builtin::BI__builtin_rotateright16:
4464 case Builtin::BI__builtin_rotateright32:
4465 case Builtin::BI__builtin_rotateright64:
4466 case Builtin::BI__builtin_stdc_rotate_right:
4467 case Builtin::BI_rotr8:
4468 case Builtin::BI_rotr16:
4469 case Builtin::BI_rotr:
4470 case Builtin::BI_lrotr:
4471 case Builtin::BI_rotr64:
4472 IsRotateRight =
true;
4475 IsRotateRight =
false;
4482 return IsRotateRight ?
Value.rotr(Amount.getZExtValue())
4483 :
Value.rotl(Amount.getZExtValue());
4487 case Builtin::BIstdc_leading_zeros_uc:
4488 case Builtin::BIstdc_leading_zeros_us:
4489 case Builtin::BIstdc_leading_zeros_ui:
4490 case Builtin::BIstdc_leading_zeros_ul:
4491 case Builtin::BIstdc_leading_zeros_ull:
4492 case Builtin::BIstdc_leading_zeros:
4493 case Builtin::BI__builtin_stdc_leading_zeros: {
4496 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4497 return APInt(ResWidth, Val.countl_zero());
4501 case Builtin::BIstdc_leading_ones_uc:
4502 case Builtin::BIstdc_leading_ones_us:
4503 case Builtin::BIstdc_leading_ones_ui:
4504 case Builtin::BIstdc_leading_ones_ul:
4505 case Builtin::BIstdc_leading_ones_ull:
4506 case Builtin::BIstdc_leading_ones:
4507 case Builtin::BI__builtin_stdc_leading_ones: {
4510 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4511 return APInt(ResWidth, Val.countl_one());
4515 case Builtin::BIstdc_trailing_zeros_uc:
4516 case Builtin::BIstdc_trailing_zeros_us:
4517 case Builtin::BIstdc_trailing_zeros_ui:
4518 case Builtin::BIstdc_trailing_zeros_ul:
4519 case Builtin::BIstdc_trailing_zeros_ull:
4520 case Builtin::BIstdc_trailing_zeros:
4521 case Builtin::BI__builtin_stdc_trailing_zeros: {
4524 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4525 return APInt(ResWidth, Val.countr_zero());
4529 case Builtin::BIstdc_trailing_ones_uc:
4530 case Builtin::BIstdc_trailing_ones_us:
4531 case Builtin::BIstdc_trailing_ones_ui:
4532 case Builtin::BIstdc_trailing_ones_ul:
4533 case Builtin::BIstdc_trailing_ones_ull:
4534 case Builtin::BIstdc_trailing_ones:
4535 case Builtin::BI__builtin_stdc_trailing_ones: {
4538 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4539 return APInt(ResWidth, Val.countr_one());
4543 case Builtin::BIstdc_first_leading_zero_uc:
4544 case Builtin::BIstdc_first_leading_zero_us:
4545 case Builtin::BIstdc_first_leading_zero_ui:
4546 case Builtin::BIstdc_first_leading_zero_ul:
4547 case Builtin::BIstdc_first_leading_zero_ull:
4548 case Builtin::BIstdc_first_leading_zero:
4549 case Builtin::BI__builtin_stdc_first_leading_zero: {
4552 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4553 return APInt(ResWidth, Val.isAllOnes() ? 0 : Val.countl_one() + 1);
4557 case Builtin::BIstdc_first_leading_one_uc:
4558 case Builtin::BIstdc_first_leading_one_us:
4559 case Builtin::BIstdc_first_leading_one_ui:
4560 case Builtin::BIstdc_first_leading_one_ul:
4561 case Builtin::BIstdc_first_leading_one_ull:
4562 case Builtin::BIstdc_first_leading_one:
4563 case Builtin::BI__builtin_stdc_first_leading_one: {
4566 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4567 return APInt(ResWidth, Val.isZero() ? 0 : Val.countl_zero() + 1);
4571 case Builtin::BIstdc_first_trailing_zero_uc:
4572 case Builtin::BIstdc_first_trailing_zero_us:
4573 case Builtin::BIstdc_first_trailing_zero_ui:
4574 case Builtin::BIstdc_first_trailing_zero_ul:
4575 case Builtin::BIstdc_first_trailing_zero_ull:
4576 case Builtin::BIstdc_first_trailing_zero:
4577 case Builtin::BI__builtin_stdc_first_trailing_zero: {
4580 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4581 return APInt(ResWidth, Val.isAllOnes() ? 0 : Val.countr_one() + 1);
4585 case Builtin::BIstdc_first_trailing_one_uc:
4586 case Builtin::BIstdc_first_trailing_one_us:
4587 case Builtin::BIstdc_first_trailing_one_ui:
4588 case Builtin::BIstdc_first_trailing_one_ul:
4589 case Builtin::BIstdc_first_trailing_one_ull:
4590 case Builtin::BIstdc_first_trailing_one:
4591 case Builtin::BI__builtin_stdc_first_trailing_one: {
4594 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4595 return APInt(ResWidth, Val.isZero() ? 0 : Val.countr_zero() + 1);
4599 case Builtin::BIstdc_count_zeros_uc:
4600 case Builtin::BIstdc_count_zeros_us:
4601 case Builtin::BIstdc_count_zeros_ui:
4602 case Builtin::BIstdc_count_zeros_ul:
4603 case Builtin::BIstdc_count_zeros_ull:
4604 case Builtin::BIstdc_count_zeros:
4605 case Builtin::BI__builtin_stdc_count_zeros: {
4608 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4609 unsigned BitWidth = Val.getBitWidth();
4610 return APInt(ResWidth, BitWidth - Val.popcount());
4614 case Builtin::BIstdc_count_ones_uc:
4615 case Builtin::BIstdc_count_ones_us:
4616 case Builtin::BIstdc_count_ones_ui:
4617 case Builtin::BIstdc_count_ones_ul:
4618 case Builtin::BIstdc_count_ones_ull:
4619 case Builtin::BIstdc_count_ones:
4620 case Builtin::BI__builtin_stdc_count_ones: {
4623 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4624 return APInt(ResWidth, Val.popcount());
4628 case Builtin::BIstdc_has_single_bit_uc:
4629 case Builtin::BIstdc_has_single_bit_us:
4630 case Builtin::BIstdc_has_single_bit_ui:
4631 case Builtin::BIstdc_has_single_bit_ul:
4632 case Builtin::BIstdc_has_single_bit_ull:
4633 case Builtin::BIstdc_has_single_bit:
4634 case Builtin::BI__builtin_stdc_has_single_bit: {
4637 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4638 return APInt(ResWidth, Val.popcount() == 1 ? 1 : 0);
4642 case Builtin::BIstdc_bit_width_uc:
4643 case Builtin::BIstdc_bit_width_us:
4644 case Builtin::BIstdc_bit_width_ui:
4645 case Builtin::BIstdc_bit_width_ul:
4646 case Builtin::BIstdc_bit_width_ull:
4647 case Builtin::BIstdc_bit_width:
4648 case Builtin::BI__builtin_stdc_bit_width: {
4651 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4652 unsigned BitWidth = Val.getBitWidth();
4653 return APInt(ResWidth, BitWidth - Val.countl_zero());
4657 case Builtin::BIstdc_bit_floor_uc:
4658 case Builtin::BIstdc_bit_floor_us:
4659 case Builtin::BIstdc_bit_floor_ui:
4660 case Builtin::BIstdc_bit_floor_ul:
4661 case Builtin::BIstdc_bit_floor_ull:
4662 case Builtin::BIstdc_bit_floor:
4663 case Builtin::BI__builtin_stdc_bit_floor:
4666 unsigned BitWidth = Val.getBitWidth();
4668 return APInt::getZero(BitWidth);
4669 return APInt::getOneBitSet(BitWidth,
4670 BitWidth - Val.countl_zero() - 1);
4673 case Builtin::BIstdc_bit_ceil_uc:
4674 case Builtin::BIstdc_bit_ceil_us:
4675 case Builtin::BIstdc_bit_ceil_ui:
4676 case Builtin::BIstdc_bit_ceil_ul:
4677 case Builtin::BIstdc_bit_ceil_ull:
4678 case Builtin::BIstdc_bit_ceil:
4679 case Builtin::BI__builtin_stdc_bit_ceil:
4682 unsigned BitWidth = Val.getBitWidth();
4684 return APInt(BitWidth, 1);
4686 APInt ValMinusOne =
V - 1;
4687 unsigned LeadingZeros = ValMinusOne.countl_zero();
4688 if (LeadingZeros == 0)
4689 return APInt(BitWidth, 0);
4690 return APInt::getOneBitSet(BitWidth, BitWidth - LeadingZeros);
4693 case Builtin::BI__builtin_ffs:
4694 case Builtin::BI__builtin_ffsl:
4695 case Builtin::BI__builtin_ffsll:
4698 return APInt(Val.getBitWidth(),
4699 Val.isZero() ? 0u : Val.countTrailingZeros() + 1u);
4702 case Builtin::BIaddressof:
4703 case Builtin::BI__addressof:
4704 case Builtin::BI__builtin_addressof:
4708 case Builtin::BIas_const:
4709 case Builtin::BIforward:
4710 case Builtin::BIforward_like:
4711 case Builtin::BImove:
4712 case Builtin::BImove_if_noexcept:
4716 case Builtin::BI__builtin_eh_return_data_regno:
4719 case Builtin::BI__builtin_launder:
4723 case Builtin::BI__builtin_add_overflow:
4724 case Builtin::BI__builtin_sub_overflow:
4725 case Builtin::BI__builtin_mul_overflow:
4726 case Builtin::BI__builtin_sadd_overflow:
4727 case Builtin::BI__builtin_uadd_overflow:
4728 case Builtin::BI__builtin_uaddl_overflow:
4729 case Builtin::BI__builtin_uaddll_overflow:
4730 case Builtin::BI__builtin_usub_overflow:
4731 case Builtin::BI__builtin_usubl_overflow:
4732 case Builtin::BI__builtin_usubll_overflow:
4733 case Builtin::BI__builtin_umul_overflow:
4734 case Builtin::BI__builtin_umull_overflow:
4735 case Builtin::BI__builtin_umulll_overflow:
4736 case Builtin::BI__builtin_saddl_overflow:
4737 case Builtin::BI__builtin_saddll_overflow:
4738 case Builtin::BI__builtin_ssub_overflow:
4739 case Builtin::BI__builtin_ssubl_overflow:
4740 case Builtin::BI__builtin_ssubll_overflow:
4741 case Builtin::BI__builtin_smul_overflow:
4742 case Builtin::BI__builtin_smull_overflow:
4743 case Builtin::BI__builtin_smulll_overflow:
4746 case Builtin::BI__builtin_addcb:
4747 case Builtin::BI__builtin_addcs:
4748 case Builtin::BI__builtin_addc:
4749 case Builtin::BI__builtin_addcl:
4750 case Builtin::BI__builtin_addcll:
4751 case Builtin::BI__builtin_subcb:
4752 case Builtin::BI__builtin_subcs:
4753 case Builtin::BI__builtin_subc:
4754 case Builtin::BI__builtin_subcl:
4755 case Builtin::BI__builtin_subcll:
4758 case Builtin::BI__builtin_clz:
4759 case Builtin::BI__builtin_clzl:
4760 case Builtin::BI__builtin_clzll:
4761 case Builtin::BI__builtin_clzs:
4762 case Builtin::BI__builtin_clzg:
4763 case Builtin::BI__lzcnt16:
4764 case Builtin::BI__lzcnt:
4765 case Builtin::BI__lzcnt64:
4768 case Builtin::BI__builtin_ctz:
4769 case Builtin::BI__builtin_ctzl:
4770 case Builtin::BI__builtin_ctzll:
4771 case Builtin::BI__builtin_ctzs:
4772 case Builtin::BI__builtin_ctzg:
4775 case Builtin::BI__builtin_elementwise_clzg:
4776 case Builtin::BI__builtin_elementwise_ctzg:
4779 case Builtin::BI__builtin_bswapg:
4780 case Builtin::BI__builtin_bswap16:
4781 case Builtin::BI__builtin_bswap32:
4782 case Builtin::BI__builtin_bswap64:
4785 case Builtin::BI__atomic_always_lock_free:
4786 case Builtin::BI__atomic_is_lock_free:
4789 case Builtin::BI__c11_atomic_is_lock_free:
4792 case Builtin::BI__builtin_complex:
4795 case Builtin::BI__builtin_is_aligned:
4796 case Builtin::BI__builtin_align_up:
4797 case Builtin::BI__builtin_align_down:
4800 case Builtin::BI__builtin_assume_aligned:
4803 case clang::X86::BI__builtin_ia32_crc32qi:
4805 case clang::X86::BI__builtin_ia32_crc32hi:
4807 case clang::X86::BI__builtin_ia32_crc32si:
4809 case clang::X86::BI__builtin_ia32_crc32di:
4812 case clang::X86::BI__builtin_ia32_bextr_u32:
4813 case clang::X86::BI__builtin_ia32_bextr_u64:
4814 case clang::X86::BI__builtin_ia32_bextri_u32:
4815 case clang::X86::BI__builtin_ia32_bextri_u64:
4818 unsigned BitWidth = Val.getBitWidth();
4819 uint64_t Shift = Idx.extractBitsAsZExtValue(8, 0);
4820 uint64_t Length = Idx.extractBitsAsZExtValue(8, 8);
4821 if (Length > BitWidth) {
4826 if (Length == 0 || Shift >= BitWidth)
4827 return APInt(BitWidth, 0);
4829 uint64_t
Result = Val.getZExtValue() >> Shift;
4830 Result &= llvm::maskTrailingOnes<uint64_t>(Length);
4834 case clang::X86::BI__builtin_ia32_bzhi_si:
4835 case clang::X86::BI__builtin_ia32_bzhi_di:
4838 unsigned BitWidth = Val.getBitWidth();
4839 uint64_t Index = Idx.extractBitsAsZExtValue(8, 0);
4842 if (Index < BitWidth)
4843 Result.clearHighBits(BitWidth - Index);
4848 case clang::X86::BI__builtin_ia32_ktestcqi:
4849 case clang::X86::BI__builtin_ia32_ktestchi:
4850 case clang::X86::BI__builtin_ia32_ktestcsi:
4851 case clang::X86::BI__builtin_ia32_ktestcdi:
4854 return APInt(
sizeof(
unsigned char) * 8, (~A & B) == 0);
4857 case clang::X86::BI__builtin_ia32_ktestzqi:
4858 case clang::X86::BI__builtin_ia32_ktestzhi:
4859 case clang::X86::BI__builtin_ia32_ktestzsi:
4860 case clang::X86::BI__builtin_ia32_ktestzdi:
4863 return APInt(
sizeof(
unsigned char) * 8, (A & B) == 0);
4866 case clang::X86::BI__builtin_ia32_kortestcqi:
4867 case clang::X86::BI__builtin_ia32_kortestchi:
4868 case clang::X86::BI__builtin_ia32_kortestcsi:
4869 case clang::X86::BI__builtin_ia32_kortestcdi:
4872 return APInt(
sizeof(
unsigned char) * 8, ~(A | B) == 0);
4875 case clang::X86::BI__builtin_ia32_kortestzqi:
4876 case clang::X86::BI__builtin_ia32_kortestzhi:
4877 case clang::X86::BI__builtin_ia32_kortestzsi:
4878 case clang::X86::BI__builtin_ia32_kortestzdi:
4881 return APInt(
sizeof(
unsigned char) * 8, (A | B) == 0);
4884 case clang::X86::BI__builtin_ia32_kshiftliqi:
4885 case clang::X86::BI__builtin_ia32_kshiftlihi:
4886 case clang::X86::BI__builtin_ia32_kshiftlisi:
4887 case clang::X86::BI__builtin_ia32_kshiftlidi:
4890 unsigned Amt = RHS.getZExtValue() & 0xFF;
4891 if (Amt >= LHS.getBitWidth())
4892 return APInt::getZero(LHS.getBitWidth());
4893 return LHS.shl(Amt);
4896 case clang::X86::BI__builtin_ia32_kshiftriqi:
4897 case clang::X86::BI__builtin_ia32_kshiftrihi:
4898 case clang::X86::BI__builtin_ia32_kshiftrisi:
4899 case clang::X86::BI__builtin_ia32_kshiftridi:
4902 unsigned Amt = RHS.getZExtValue() & 0xFF;
4903 if (Amt >= LHS.getBitWidth())
4904 return APInt::getZero(LHS.getBitWidth());
4905 return LHS.lshr(Amt);
4908 case clang::X86::BI__builtin_ia32_lzcnt_u16:
4909 case clang::X86::BI__builtin_ia32_lzcnt_u32:
4910 case clang::X86::BI__builtin_ia32_lzcnt_u64:
4913 return APInt(Src.getBitWidth(), Src.countLeadingZeros());
4916 case clang::X86::BI__builtin_ia32_tzcnt_u16:
4917 case clang::X86::BI__builtin_ia32_tzcnt_u32:
4918 case clang::X86::BI__builtin_ia32_tzcnt_u64:
4921 return APInt(Src.getBitWidth(), Src.countTrailingZeros());
4924 case clang::X86::BI__builtin_ia32_pdep_si:
4925 case clang::X86::BI__builtin_ia32_pdep_di:
4928 unsigned BitWidth = Val.getBitWidth();
4931 for (
unsigned I = 0, P = 0; I != BitWidth; ++I) {
4933 Result.setBitVal(I, Val[P++]);
4939 case clang::X86::BI__builtin_ia32_pext_si:
4940 case clang::X86::BI__builtin_ia32_pext_di:
4943 unsigned BitWidth = Val.getBitWidth();
4946 for (
unsigned I = 0, P = 0; I != BitWidth; ++I) {
4948 Result.setBitVal(P++, Val[I]);
4954 case clang::X86::BI__builtin_ia32_addcarryx_u32:
4955 case clang::X86::BI__builtin_ia32_addcarryx_u64:
4956 case clang::X86::BI__builtin_ia32_subborrow_u32:
4957 case clang::X86::BI__builtin_ia32_subborrow_u64:
4961 case Builtin::BI__builtin_os_log_format_buffer_size:
4964 case Builtin::BI__builtin_ptrauth_string_discriminator:
4967 case Builtin::BI__builtin_infer_alloc_token:
4970 case Builtin::BI__noop:
4974 case Builtin::BI__builtin_operator_new:
4977 case Builtin::BI__builtin_operator_delete:
4980 case Builtin::BI__arithmetic_fence:
4983 case Builtin::BI__builtin_reduce_add:
4984 case Builtin::BI__builtin_reduce_mul:
4985 case Builtin::BI__builtin_reduce_and:
4986 case Builtin::BI__builtin_reduce_or:
4987 case Builtin::BI__builtin_reduce_xor:
4988 case Builtin::BI__builtin_reduce_min:
4989 case Builtin::BI__builtin_reduce_max:
4992 case Builtin::BI__builtin_elementwise_popcount:
4995 return APInt(Src.getBitWidth(), Src.popcount());
4997 case Builtin::BI__builtin_elementwise_bitreverse:
4999 S, OpPC,
Call, [](
const APSInt &Src) {
return Src.reverseBits(); });
5001 case Builtin::BI__builtin_elementwise_abs:
5004 case Builtin::BI__builtin_memcpy:
5005 case Builtin::BImemcpy:
5006 case Builtin::BI__builtin_wmemcpy:
5007 case Builtin::BIwmemcpy:
5008 case Builtin::BI__builtin_memmove:
5009 case Builtin::BImemmove:
5010 case Builtin::BI__builtin_wmemmove:
5011 case Builtin::BIwmemmove:
5014 case Builtin::BI__builtin_memcmp:
5015 case Builtin::BImemcmp:
5016 case Builtin::BI__builtin_bcmp:
5017 case Builtin::BIbcmp:
5018 case Builtin::BI__builtin_wmemcmp:
5019 case Builtin::BIwmemcmp:
5022 case Builtin::BImemchr:
5023 case Builtin::BI__builtin_memchr:
5024 case Builtin::BIstrchr:
5025 case Builtin::BI__builtin_strchr:
5026 case Builtin::BIwmemchr:
5027 case Builtin::BI__builtin_wmemchr:
5028 case Builtin::BIwcschr:
5029 case Builtin::BI__builtin_wcschr:
5030 case Builtin::BI__builtin_char_memchr:
5033 case Builtin::BI__builtin_object_size:
5034 case Builtin::BI__builtin_dynamic_object_size:
5037 case Builtin::BI__builtin_is_within_lifetime:
5040 case Builtin::BI__builtin_elementwise_add_sat:
5043 return LHS.isSigned() ? LHS.sadd_sat(RHS) : LHS.uadd_sat(RHS);
5046 case Builtin::BI__builtin_elementwise_sub_sat:
5049 return LHS.isSigned() ? LHS.ssub_sat(RHS) : LHS.usub_sat(RHS);
5051 case X86::BI__builtin_ia32_extract128i256:
5052 case X86::BI__builtin_ia32_vextractf128_pd256:
5053 case X86::BI__builtin_ia32_vextractf128_ps256:
5054 case X86::BI__builtin_ia32_vextractf128_si256:
5057 case X86::BI__builtin_ia32_extractf32x4_256_mask:
5058 case X86::BI__builtin_ia32_extractf32x4_mask:
5059 case X86::BI__builtin_ia32_extractf32x8_mask:
5060 case X86::BI__builtin_ia32_extractf64x2_256_mask:
5061 case X86::BI__builtin_ia32_extractf64x2_512_mask:
5062 case X86::BI__builtin_ia32_extractf64x4_mask:
5063 case X86::BI__builtin_ia32_extracti32x4_256_mask:
5064 case X86::BI__builtin_ia32_extracti32x4_mask:
5065 case X86::BI__builtin_ia32_extracti32x8_mask:
5066 case X86::BI__builtin_ia32_extracti64x2_256_mask:
5067 case X86::BI__builtin_ia32_extracti64x2_512_mask:
5068 case X86::BI__builtin_ia32_extracti64x4_mask:
5071 case clang::X86::BI__builtin_ia32_pmulhrsw128:
5072 case clang::X86::BI__builtin_ia32_pmulhrsw256:
5073 case clang::X86::BI__builtin_ia32_pmulhrsw512:
5076 return (llvm::APIntOps::mulsExtended(LHS, RHS).ashr(14) + 1)
5077 .extractBits(16, 1);
5080 case clang::X86::BI__builtin_ia32_movmskps:
5081 case clang::X86::BI__builtin_ia32_movmskpd:
5082 case clang::X86::BI__builtin_ia32_pmovmskb128:
5083 case clang::X86::BI__builtin_ia32_pmovmskb256:
5084 case clang::X86::BI__builtin_ia32_movmskps256:
5085 case clang::X86::BI__builtin_ia32_movmskpd256: {
5089 case X86::BI__builtin_ia32_psignb128:
5090 case X86::BI__builtin_ia32_psignb256:
5091 case X86::BI__builtin_ia32_psignw128:
5092 case X86::BI__builtin_ia32_psignw256:
5093 case X86::BI__builtin_ia32_psignd128:
5094 case X86::BI__builtin_ia32_psignd256:
5098 return APInt::getZero(AElem.getBitWidth());
5099 if (BElem.isNegative())
5104 case clang::X86::BI__builtin_ia32_pavgb128:
5105 case clang::X86::BI__builtin_ia32_pavgw128:
5106 case clang::X86::BI__builtin_ia32_pavgb256:
5107 case clang::X86::BI__builtin_ia32_pavgw256:
5108 case clang::X86::BI__builtin_ia32_pavgb512:
5109 case clang::X86::BI__builtin_ia32_pavgw512:
5111 llvm::APIntOps::avgCeilU);
5113 case clang::X86::BI__builtin_ia32_pmaddubsw128:
5114 case clang::X86::BI__builtin_ia32_pmaddubsw256:
5115 case clang::X86::BI__builtin_ia32_pmaddubsw512:
5120 unsigned BitWidth = 2 * LoLHS.getBitWidth();
5121 return (LoLHS.zext(BitWidth) * LoRHS.sext(BitWidth))
5122 .sadd_sat((HiLHS.zext(BitWidth) * HiRHS.sext(BitWidth)));
5125 case clang::X86::BI__builtin_ia32_pmaddwd128:
5126 case clang::X86::BI__builtin_ia32_pmaddwd256:
5127 case clang::X86::BI__builtin_ia32_pmaddwd512:
5132 unsigned BitWidth = 2 * LoLHS.getBitWidth();
5133 return (LoLHS.sext(BitWidth) * LoRHS.sext(BitWidth)) +
5134 (HiLHS.sext(BitWidth) * HiRHS.sext(BitWidth));
5137 case clang::X86::BI__builtin_ia32_dbpsadbw128:
5138 case clang::X86::BI__builtin_ia32_dbpsadbw256:
5139 case clang::X86::BI__builtin_ia32_dbpsadbw512:
5142 case clang::X86::BI__builtin_ia32_pmulhuw128:
5143 case clang::X86::BI__builtin_ia32_pmulhuw256:
5144 case clang::X86::BI__builtin_ia32_pmulhuw512:
5146 llvm::APIntOps::mulhu);
5148 case clang::X86::BI__builtin_ia32_pmulhw128:
5149 case clang::X86::BI__builtin_ia32_pmulhw256:
5150 case clang::X86::BI__builtin_ia32_pmulhw512:
5152 llvm::APIntOps::mulhs);
5154 case clang::X86::BI__builtin_ia32_psllv2di:
5155 case clang::X86::BI__builtin_ia32_psllv4di:
5156 case clang::X86::BI__builtin_ia32_psllv4si:
5157 case clang::X86::BI__builtin_ia32_psllv8di:
5158 case clang::X86::BI__builtin_ia32_psllv8hi:
5159 case clang::X86::BI__builtin_ia32_psllv8si:
5160 case clang::X86::BI__builtin_ia32_psllv16hi:
5161 case clang::X86::BI__builtin_ia32_psllv16si:
5162 case clang::X86::BI__builtin_ia32_psllv32hi:
5163 case clang::X86::BI__builtin_ia32_psllwi128:
5164 case clang::X86::BI__builtin_ia32_psllwi256:
5165 case clang::X86::BI__builtin_ia32_psllwi512:
5166 case clang::X86::BI__builtin_ia32_pslldi128:
5167 case clang::X86::BI__builtin_ia32_pslldi256:
5168 case clang::X86::BI__builtin_ia32_pslldi512:
5169 case clang::X86::BI__builtin_ia32_psllqi128:
5170 case clang::X86::BI__builtin_ia32_psllqi256:
5171 case clang::X86::BI__builtin_ia32_psllqi512:
5174 if (RHS.uge(LHS.getBitWidth())) {
5175 return APInt::getZero(LHS.getBitWidth());
5177 return LHS.shl(RHS.getZExtValue());
5180 case clang::X86::BI__builtin_ia32_psrav4si:
5181 case clang::X86::BI__builtin_ia32_psrav8di:
5182 case clang::X86::BI__builtin_ia32_psrav8hi:
5183 case clang::X86::BI__builtin_ia32_psrav8si:
5184 case clang::X86::BI__builtin_ia32_psrav16hi:
5185 case clang::X86::BI__builtin_ia32_psrav16si:
5186 case clang::X86::BI__builtin_ia32_psrav32hi:
5187 case clang::X86::BI__builtin_ia32_psravq128:
5188 case clang::X86::BI__builtin_ia32_psravq256:
5189 case clang::X86::BI__builtin_ia32_psrawi128:
5190 case clang::X86::BI__builtin_ia32_psrawi256:
5191 case clang::X86::BI__builtin_ia32_psrawi512:
5192 case clang::X86::BI__builtin_ia32_psradi128:
5193 case clang::X86::BI__builtin_ia32_psradi256:
5194 case clang::X86::BI__builtin_ia32_psradi512:
5195 case clang::X86::BI__builtin_ia32_psraqi128:
5196 case clang::X86::BI__builtin_ia32_psraqi256:
5197 case clang::X86::BI__builtin_ia32_psraqi512:
5200 if (RHS.uge(LHS.getBitWidth())) {
5201 return LHS.ashr(LHS.getBitWidth() - 1);
5203 return LHS.ashr(RHS.getZExtValue());
5206 case clang::X86::BI__builtin_ia32_psrlv2di:
5207 case clang::X86::BI__builtin_ia32_psrlv4di:
5208 case clang::X86::BI__builtin_ia32_psrlv4si:
5209 case clang::X86::BI__builtin_ia32_psrlv8di:
5210 case clang::X86::BI__builtin_ia32_psrlv8hi:
5211 case clang::X86::BI__builtin_ia32_psrlv8si:
5212 case clang::X86::BI__builtin_ia32_psrlv16hi:
5213 case clang::X86::BI__builtin_ia32_psrlv16si:
5214 case clang::X86::BI__builtin_ia32_psrlv32hi:
5215 case clang::X86::BI__builtin_ia32_psrlwi128:
5216 case clang::X86::BI__builtin_ia32_psrlwi256:
5217 case clang::X86::BI__builtin_ia32_psrlwi512:
5218 case clang::X86::BI__builtin_ia32_psrldi128:
5219 case clang::X86::BI__builtin_ia32_psrldi256:
5220 case clang::X86::BI__builtin_ia32_psrldi512:
5221 case clang::X86::BI__builtin_ia32_psrlqi128:
5222 case clang::X86::BI__builtin_ia32_psrlqi256:
5223 case clang::X86::BI__builtin_ia32_psrlqi512:
5226 if (RHS.uge(LHS.getBitWidth())) {
5227 return APInt::getZero(LHS.getBitWidth());
5229 return LHS.lshr(RHS.getZExtValue());
5231 case clang::X86::BI__builtin_ia32_packsswb128:
5232 case clang::X86::BI__builtin_ia32_packsswb256:
5233 case clang::X86::BI__builtin_ia32_packsswb512:
5234 case clang::X86::BI__builtin_ia32_packssdw128:
5235 case clang::X86::BI__builtin_ia32_packssdw256:
5236 case clang::X86::BI__builtin_ia32_packssdw512:
5238 return APInt(Src).truncSSat(Src.getBitWidth() / 2);
5240 case clang::X86::BI__builtin_ia32_packusdw128:
5241 case clang::X86::BI__builtin_ia32_packusdw256:
5242 case clang::X86::BI__builtin_ia32_packusdw512:
5243 case clang::X86::BI__builtin_ia32_packuswb128:
5244 case clang::X86::BI__builtin_ia32_packuswb256:
5245 case clang::X86::BI__builtin_ia32_packuswb512:
5247 return APInt(Src).truncSSatU(Src.getBitWidth() / 2);
5250 case clang::X86::BI__builtin_ia32_selectss_128:
5251 case clang::X86::BI__builtin_ia32_selectsd_128:
5252 case clang::X86::BI__builtin_ia32_selectsh_128:
5253 case clang::X86::BI__builtin_ia32_selectsbf_128:
5255 case clang::X86::BI__builtin_ia32_vprotbi:
5256 case clang::X86::BI__builtin_ia32_vprotdi:
5257 case clang::X86::BI__builtin_ia32_vprotqi:
5258 case clang::X86::BI__builtin_ia32_vprotwi:
5259 case clang::X86::BI__builtin_ia32_prold128:
5260 case clang::X86::BI__builtin_ia32_prold256:
5261 case clang::X86::BI__builtin_ia32_prold512:
5262 case clang::X86::BI__builtin_ia32_prolq128:
5263 case clang::X86::BI__builtin_ia32_prolq256:
5264 case clang::X86::BI__builtin_ia32_prolq512:
5267 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotl(RHS); });
5269 case clang::X86::BI__builtin_ia32_prord128:
5270 case clang::X86::BI__builtin_ia32_prord256:
5271 case clang::X86::BI__builtin_ia32_prord512:
5272 case clang::X86::BI__builtin_ia32_prorq128:
5273 case clang::X86::BI__builtin_ia32_prorq256:
5274 case clang::X86::BI__builtin_ia32_prorq512:
5277 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotr(RHS); });
5279 case Builtin::BI__builtin_elementwise_max:
5280 case Builtin::BI__builtin_elementwise_min:
5283 case clang::X86::BI__builtin_ia32_phaddw128:
5284 case clang::X86::BI__builtin_ia32_phaddw256:
5285 case clang::X86::BI__builtin_ia32_phaddd128:
5286 case clang::X86::BI__builtin_ia32_phaddd256:
5289 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
5290 case clang::X86::BI__builtin_ia32_phaddsw128:
5291 case clang::X86::BI__builtin_ia32_phaddsw256:
5294 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.sadd_sat(RHS); });
5295 case clang::X86::BI__builtin_ia32_phsubw128:
5296 case clang::X86::BI__builtin_ia32_phsubw256:
5297 case clang::X86::BI__builtin_ia32_phsubd128:
5298 case clang::X86::BI__builtin_ia32_phsubd256:
5301 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS - RHS; });
5302 case clang::X86::BI__builtin_ia32_phsubsw128:
5303 case clang::X86::BI__builtin_ia32_phsubsw256:
5306 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.ssub_sat(RHS); });
5307 case clang::X86::BI__builtin_ia32_haddpd:
5308 case clang::X86::BI__builtin_ia32_haddps:
5309 case clang::X86::BI__builtin_ia32_haddpd256:
5310 case clang::X86::BI__builtin_ia32_haddps256:
5313 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
5318 case clang::X86::BI__builtin_ia32_hsubpd:
5319 case clang::X86::BI__builtin_ia32_hsubps:
5320 case clang::X86::BI__builtin_ia32_hsubpd256:
5321 case clang::X86::BI__builtin_ia32_hsubps256:
5324 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
5326 F.subtract(RHS, RM);
5329 case clang::X86::BI__builtin_ia32_addsubpd:
5330 case clang::X86::BI__builtin_ia32_addsubps:
5331 case clang::X86::BI__builtin_ia32_addsubpd256:
5332 case clang::X86::BI__builtin_ia32_addsubps256:
5335 case clang::X86::BI__builtin_ia32_pmuldq128:
5336 case clang::X86::BI__builtin_ia32_pmuldq256:
5337 case clang::X86::BI__builtin_ia32_pmuldq512:
5342 return llvm::APIntOps::mulsExtended(LoLHS, LoRHS);
5345 case clang::X86::BI__builtin_ia32_pmuludq128:
5346 case clang::X86::BI__builtin_ia32_pmuludq256:
5347 case clang::X86::BI__builtin_ia32_pmuludq512:
5352 return llvm::APIntOps::muluExtended(LoLHS, LoRHS);
5355 case clang::X86::BI__builtin_ia32_pclmulqdq128:
5356 case clang::X86::BI__builtin_ia32_pclmulqdq256:
5357 case clang::X86::BI__builtin_ia32_pclmulqdq512:
5360 case Builtin::BI__builtin_elementwise_fma:
5364 llvm::RoundingMode RM) {
5366 F.fusedMultiplyAdd(Y, Z, RM);
5370 case X86::BI__builtin_ia32_vpmadd52luq128:
5371 case X86::BI__builtin_ia32_vpmadd52luq256:
5372 case X86::BI__builtin_ia32_vpmadd52luq512:
5375 return A + (B.trunc(52) *
C.trunc(52)).zext(64);
5377 case X86::BI__builtin_ia32_vpmadd52huq128:
5378 case X86::BI__builtin_ia32_vpmadd52huq256:
5379 case X86::BI__builtin_ia32_vpmadd52huq512:
5382 return A + llvm::APIntOps::mulhu(B.trunc(52),
C.trunc(52)).zext(64);
5385 case X86::BI__builtin_ia32_vpshldd128:
5386 case X86::BI__builtin_ia32_vpshldd256:
5387 case X86::BI__builtin_ia32_vpshldd512:
5388 case X86::BI__builtin_ia32_vpshldq128:
5389 case X86::BI__builtin_ia32_vpshldq256:
5390 case X86::BI__builtin_ia32_vpshldq512:
5391 case X86::BI__builtin_ia32_vpshldw128:
5392 case X86::BI__builtin_ia32_vpshldw256:
5393 case X86::BI__builtin_ia32_vpshldw512:
5397 return llvm::APIntOps::fshl(Hi, Lo, Amt);
5400 case X86::BI__builtin_ia32_vpshrdd128:
5401 case X86::BI__builtin_ia32_vpshrdd256:
5402 case X86::BI__builtin_ia32_vpshrdd512:
5403 case X86::BI__builtin_ia32_vpshrdq128:
5404 case X86::BI__builtin_ia32_vpshrdq256:
5405 case X86::BI__builtin_ia32_vpshrdq512:
5406 case X86::BI__builtin_ia32_vpshrdw128:
5407 case X86::BI__builtin_ia32_vpshrdw256:
5408 case X86::BI__builtin_ia32_vpshrdw512:
5413 return llvm::APIntOps::fshr(Hi, Lo, Amt);
5415 case X86::BI__builtin_ia32_vpconflictsi_128:
5416 case X86::BI__builtin_ia32_vpconflictsi_256:
5417 case X86::BI__builtin_ia32_vpconflictsi_512:
5418 case X86::BI__builtin_ia32_vpconflictdi_128:
5419 case X86::BI__builtin_ia32_vpconflictdi_256:
5420 case X86::BI__builtin_ia32_vpconflictdi_512:
5422 case X86::BI__builtin_ia32_compressdf128_mask:
5423 case X86::BI__builtin_ia32_compressdf256_mask:
5424 case X86::BI__builtin_ia32_compressdf512_mask:
5425 case X86::BI__builtin_ia32_compressdi128_mask:
5426 case X86::BI__builtin_ia32_compressdi256_mask:
5427 case X86::BI__builtin_ia32_compressdi512_mask:
5428 case X86::BI__builtin_ia32_compresshi128_mask:
5429 case X86::BI__builtin_ia32_compresshi256_mask:
5430 case X86::BI__builtin_ia32_compresshi512_mask:
5431 case X86::BI__builtin_ia32_compressqi128_mask:
5432 case X86::BI__builtin_ia32_compressqi256_mask:
5433 case X86::BI__builtin_ia32_compressqi512_mask:
5434 case X86::BI__builtin_ia32_compresssf128_mask:
5435 case X86::BI__builtin_ia32_compresssf256_mask:
5436 case X86::BI__builtin_ia32_compresssf512_mask:
5437 case X86::BI__builtin_ia32_compresssi128_mask:
5438 case X86::BI__builtin_ia32_compresssi256_mask:
5439 case X86::BI__builtin_ia32_compresssi512_mask: {
5441 Call->getArg(0)->getType()->castAs<
VectorType>()->getNumElements();
5443 S, OpPC,
Call, [NumElems](
unsigned DstIdx,
const APInt &ShuffleMask) {
5444 APInt CompressMask = ShuffleMask.trunc(NumElems);
5445 if (DstIdx < CompressMask.popcount()) {
5446 while (DstIdx != 0) {
5447 CompressMask = CompressMask & (CompressMask - 1);
5450 return std::pair<unsigned, int>{
5451 0,
static_cast<int>(CompressMask.countr_zero())};
5453 return std::pair<unsigned, int>{1,
static_cast<int>(DstIdx)};
5456 case X86::BI__builtin_ia32_expanddf128_mask:
5457 case X86::BI__builtin_ia32_expanddf256_mask:
5458 case X86::BI__builtin_ia32_expanddf512_mask:
5459 case X86::BI__builtin_ia32_expanddi128_mask:
5460 case X86::BI__builtin_ia32_expanddi256_mask:
5461 case X86::BI__builtin_ia32_expanddi512_mask:
5462 case X86::BI__builtin_ia32_expandhi128_mask:
5463 case X86::BI__builtin_ia32_expandhi256_mask:
5464 case X86::BI__builtin_ia32_expandhi512_mask:
5465 case X86::BI__builtin_ia32_expandqi128_mask:
5466 case X86::BI__builtin_ia32_expandqi256_mask:
5467 case X86::BI__builtin_ia32_expandqi512_mask:
5468 case X86::BI__builtin_ia32_expandsf128_mask:
5469 case X86::BI__builtin_ia32_expandsf256_mask:
5470 case X86::BI__builtin_ia32_expandsf512_mask:
5471 case X86::BI__builtin_ia32_expandsi128_mask:
5472 case X86::BI__builtin_ia32_expandsi256_mask:
5473 case X86::BI__builtin_ia32_expandsi512_mask: {
5475 S, OpPC,
Call, [](
unsigned DstIdx,
const APInt &ShuffleMask) {
5478 APInt ExpandMask = ShuffleMask.trunc(DstIdx + 1);
5479 if (ExpandMask[DstIdx]) {
5480 int SrcIdx = ExpandMask.popcount() - 1;
5481 return std::pair<unsigned, int>{0, SrcIdx};
5483 return std::pair<unsigned, int>{1,
static_cast<int>(DstIdx)};
5486 case clang::X86::BI__builtin_ia32_blendpd:
5487 case clang::X86::BI__builtin_ia32_blendpd256:
5488 case clang::X86::BI__builtin_ia32_blendps:
5489 case clang::X86::BI__builtin_ia32_blendps256:
5490 case clang::X86::BI__builtin_ia32_pblendw128:
5491 case clang::X86::BI__builtin_ia32_pblendw256:
5492 case clang::X86::BI__builtin_ia32_pblendd128:
5493 case clang::X86::BI__builtin_ia32_pblendd256:
5495 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5497 unsigned MaskBit = (ShuffleMask >> (DstIdx % 8)) & 0x1;
5498 unsigned SrcVecIdx = MaskBit ? 1 : 0;
5499 return std::pair<unsigned, int>{SrcVecIdx,
static_cast<int>(DstIdx)};
5504 case clang::X86::BI__builtin_ia32_blendvpd:
5505 case clang::X86::BI__builtin_ia32_blendvpd256:
5506 case clang::X86::BI__builtin_ia32_blendvps:
5507 case clang::X86::BI__builtin_ia32_blendvps256:
5511 llvm::RoundingMode) {
return C.isNegative() ? T : F; });
5513 case clang::X86::BI__builtin_ia32_pblendvb128:
5514 case clang::X86::BI__builtin_ia32_pblendvb256:
5517 return ((
APInt)
C).isNegative() ? T : F;
5519 case X86::BI__builtin_ia32_ptestz128:
5520 case X86::BI__builtin_ia32_ptestz256:
5521 case X86::BI__builtin_ia32_vtestzps:
5522 case X86::BI__builtin_ia32_vtestzps256:
5523 case X86::BI__builtin_ia32_vtestzpd:
5524 case X86::BI__builtin_ia32_vtestzpd256:
5527 [](
const APInt &A,
const APInt &B) {
return (A & B) == 0; });
5528 case X86::BI__builtin_ia32_ptestc128:
5529 case X86::BI__builtin_ia32_ptestc256:
5530 case X86::BI__builtin_ia32_vtestcps:
5531 case X86::BI__builtin_ia32_vtestcps256:
5532 case X86::BI__builtin_ia32_vtestcpd:
5533 case X86::BI__builtin_ia32_vtestcpd256:
5536 [](
const APInt &A,
const APInt &B) {
return (~A & B) == 0; });
5537 case X86::BI__builtin_ia32_ptestnzc128:
5538 case X86::BI__builtin_ia32_ptestnzc256:
5539 case X86::BI__builtin_ia32_vtestnzcps:
5540 case X86::BI__builtin_ia32_vtestnzcps256:
5541 case X86::BI__builtin_ia32_vtestnzcpd:
5542 case X86::BI__builtin_ia32_vtestnzcpd256:
5545 return ((A & B) != 0) && ((~A & B) != 0);
5547 case X86::BI__builtin_ia32_selectb_128:
5548 case X86::BI__builtin_ia32_selectb_256:
5549 case X86::BI__builtin_ia32_selectb_512:
5550 case X86::BI__builtin_ia32_selectw_128:
5551 case X86::BI__builtin_ia32_selectw_256:
5552 case X86::BI__builtin_ia32_selectw_512:
5553 case X86::BI__builtin_ia32_selectd_128:
5554 case X86::BI__builtin_ia32_selectd_256:
5555 case X86::BI__builtin_ia32_selectd_512:
5556 case X86::BI__builtin_ia32_selectq_128:
5557 case X86::BI__builtin_ia32_selectq_256:
5558 case X86::BI__builtin_ia32_selectq_512:
5559 case X86::BI__builtin_ia32_selectph_128:
5560 case X86::BI__builtin_ia32_selectph_256:
5561 case X86::BI__builtin_ia32_selectph_512:
5562 case X86::BI__builtin_ia32_selectpbf_128:
5563 case X86::BI__builtin_ia32_selectpbf_256:
5564 case X86::BI__builtin_ia32_selectpbf_512:
5565 case X86::BI__builtin_ia32_selectps_128:
5566 case X86::BI__builtin_ia32_selectps_256:
5567 case X86::BI__builtin_ia32_selectps_512:
5568 case X86::BI__builtin_ia32_selectpd_128:
5569 case X86::BI__builtin_ia32_selectpd_256:
5570 case X86::BI__builtin_ia32_selectpd_512:
5573 case X86::BI__builtin_ia32_shufps:
5574 case X86::BI__builtin_ia32_shufps256:
5575 case X86::BI__builtin_ia32_shufps512:
5577 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5578 unsigned NumElemPerLane = 4;
5579 unsigned NumSelectableElems = NumElemPerLane / 2;
5580 unsigned BitsPerElem = 2;
5581 unsigned IndexMask = 0x3;
5582 unsigned MaskBits = 8;
5583 unsigned Lane = DstIdx / NumElemPerLane;
5584 unsigned ElemInLane = DstIdx % NumElemPerLane;
5585 unsigned LaneOffset = Lane * NumElemPerLane;
5586 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
5587 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5588 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
5589 return std::pair<unsigned, int>{SrcIdx,
5590 static_cast<int>(LaneOffset + Index)};
5592 case X86::BI__builtin_ia32_shufpd:
5593 case X86::BI__builtin_ia32_shufpd256:
5594 case X86::BI__builtin_ia32_shufpd512:
5596 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5597 unsigned NumElemPerLane = 2;
5598 unsigned NumSelectableElems = NumElemPerLane / 2;
5599 unsigned BitsPerElem = 1;
5600 unsigned IndexMask = 0x1;
5601 unsigned MaskBits = 8;
5602 unsigned Lane = DstIdx / NumElemPerLane;
5603 unsigned ElemInLane = DstIdx % NumElemPerLane;
5604 unsigned LaneOffset = Lane * NumElemPerLane;
5605 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
5606 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5607 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
5608 return std::pair<unsigned, int>{SrcIdx,
5609 static_cast<int>(LaneOffset + Index)};
5612 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v16qi:
5613 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v32qi:
5614 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v64qi:
5616 case X86::BI__builtin_ia32_vgf2p8affineqb_v16qi:
5617 case X86::BI__builtin_ia32_vgf2p8affineqb_v32qi:
5618 case X86::BI__builtin_ia32_vgf2p8affineqb_v64qi:
5621 case X86::BI__builtin_ia32_vgf2p8mulb_v16qi:
5622 case X86::BI__builtin_ia32_vgf2p8mulb_v32qi:
5623 case X86::BI__builtin_ia32_vgf2p8mulb_v64qi:
5626 case X86::BI__builtin_ia32_insertps128:
5628 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Mask) {
5630 if ((Mask & (1 << DstIdx)) != 0) {
5631 return std::pair<unsigned, int>{0, -1};
5635 unsigned SrcElem = (Mask >> 6) & 0x3;
5636 unsigned DstElem = (Mask >> 4) & 0x3;
5637 if (DstIdx == DstElem) {
5639 return std::pair<unsigned, int>{1,
static_cast<int>(SrcElem)};
5642 return std::pair<unsigned, int>{0,
static_cast<int>(DstIdx)};
5645 case X86::BI__builtin_ia32_permvarsi256:
5646 case X86::BI__builtin_ia32_permvarsf256:
5647 case X86::BI__builtin_ia32_permvardf512:
5648 case X86::BI__builtin_ia32_permvardi512:
5649 case X86::BI__builtin_ia32_permvarhi128:
5651 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5652 int Offset = ShuffleMask & 0x7;
5653 return std::pair<unsigned, int>{0, Offset};
5655 case X86::BI__builtin_ia32_permvarqi128:
5656 case X86::BI__builtin_ia32_permvarhi256:
5657 case X86::BI__builtin_ia32_permvarsi512:
5658 case X86::BI__builtin_ia32_permvarsf512:
5660 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5661 int Offset = ShuffleMask & 0xF;
5662 return std::pair<unsigned, int>{0, Offset};
5664 case X86::BI__builtin_ia32_permvardi256:
5665 case X86::BI__builtin_ia32_permvardf256:
5667 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5668 int Offset = ShuffleMask & 0x3;
5669 return std::pair<unsigned, int>{0, Offset};
5671 case X86::BI__builtin_ia32_permvarqi256:
5672 case X86::BI__builtin_ia32_permvarhi512:
5674 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5675 int Offset = ShuffleMask & 0x1F;
5676 return std::pair<unsigned, int>{0, Offset};
5678 case X86::BI__builtin_ia32_permvarqi512:
5680 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5681 int Offset = ShuffleMask & 0x3F;
5682 return std::pair<unsigned, int>{0, Offset};
5684 case X86::BI__builtin_ia32_vpermi2varq128:
5685 case X86::BI__builtin_ia32_vpermi2varpd128:
5687 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5688 int Offset = ShuffleMask & 0x1;
5689 unsigned SrcIdx = (ShuffleMask >> 1) & 0x1;
5690 return std::pair<unsigned, int>{SrcIdx, Offset};
5692 case X86::BI__builtin_ia32_vpermi2vard128:
5693 case X86::BI__builtin_ia32_vpermi2varps128:
5694 case X86::BI__builtin_ia32_vpermi2varq256:
5695 case X86::BI__builtin_ia32_vpermi2varpd256:
5697 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5698 int Offset = ShuffleMask & 0x3;
5699 unsigned SrcIdx = (ShuffleMask >> 2) & 0x1;
5700 return std::pair<unsigned, int>{SrcIdx, Offset};
5702 case X86::BI__builtin_ia32_vpermi2varhi128:
5703 case X86::BI__builtin_ia32_vpermi2vard256:
5704 case X86::BI__builtin_ia32_vpermi2varps256:
5705 case X86::BI__builtin_ia32_vpermi2varq512:
5706 case X86::BI__builtin_ia32_vpermi2varpd512:
5708 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5709 int Offset = ShuffleMask & 0x7;
5710 unsigned SrcIdx = (ShuffleMask >> 3) & 0x1;
5711 return std::pair<unsigned, int>{SrcIdx, Offset};
5713 case X86::BI__builtin_ia32_vpermi2varqi128:
5714 case X86::BI__builtin_ia32_vpermi2varhi256:
5715 case X86::BI__builtin_ia32_vpermi2vard512:
5716 case X86::BI__builtin_ia32_vpermi2varps512:
5718 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5719 int Offset = ShuffleMask & 0xF;
5720 unsigned SrcIdx = (ShuffleMask >> 4) & 0x1;
5721 return std::pair<unsigned, int>{SrcIdx, Offset};
5723 case X86::BI__builtin_ia32_vpermi2varqi256:
5724 case X86::BI__builtin_ia32_vpermi2varhi512:
5726 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5727 int Offset = ShuffleMask & 0x1F;
5728 unsigned SrcIdx = (ShuffleMask >> 5) & 0x1;
5729 return std::pair<unsigned, int>{SrcIdx, Offset};
5731 case X86::BI__builtin_ia32_vpermi2varqi512:
5733 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5734 int Offset = ShuffleMask & 0x3F;
5735 unsigned SrcIdx = (ShuffleMask >> 6) & 0x1;
5736 return std::pair<unsigned, int>{SrcIdx, Offset};
5738 case X86::BI__builtin_ia32_vperm2f128_pd256:
5739 case X86::BI__builtin_ia32_vperm2f128_ps256:
5740 case X86::BI__builtin_ia32_vperm2f128_si256:
5741 case X86::BI__builtin_ia32_permti256: {
5742 unsigned NumElements =
5743 Call->getArg(0)->getType()->castAs<
VectorType>()->getNumElements();
5744 unsigned PreservedBitsCnt = NumElements >> 2;
5747 [PreservedBitsCnt](
unsigned DstIdx,
unsigned ShuffleMask) {
5748 unsigned ControlBitsCnt = DstIdx >> PreservedBitsCnt << 2;
5749 unsigned ControlBits = ShuffleMask >> ControlBitsCnt;
5751 if (ControlBits & 0b1000)
5752 return std::make_pair(0u, -1);
5754 unsigned SrcVecIdx = (ControlBits & 0b10) >> 1;
5755 unsigned PreservedBitsMask = (1 << PreservedBitsCnt) - 1;
5756 int SrcIdx = ((ControlBits & 0b1) << PreservedBitsCnt) |
5757 (DstIdx & PreservedBitsMask);
5758 return std::make_pair(SrcVecIdx, SrcIdx);
5761 case X86::BI__builtin_ia32_pshufb128:
5762 case X86::BI__builtin_ia32_pshufb256:
5763 case X86::BI__builtin_ia32_pshufb512:
5765 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5766 uint8_t Ctlb =
static_cast<uint8_t
>(ShuffleMask);
5768 return std::make_pair(0, -1);
5770 unsigned LaneBase = (DstIdx / 16) * 16;
5771 unsigned SrcOffset = Ctlb & 0x0F;
5772 unsigned SrcIdx = LaneBase + SrcOffset;
5773 return std::make_pair(0,
static_cast<int>(SrcIdx));
5776 case X86::BI__builtin_ia32_pshuflw:
5777 case X86::BI__builtin_ia32_pshuflw256:
5778 case X86::BI__builtin_ia32_pshuflw512:
5780 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5781 unsigned LaneBase = (DstIdx / 8) * 8;
5782 unsigned LaneIdx = DstIdx % 8;
5784 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
5785 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
5788 return std::make_pair(0,
static_cast<int>(DstIdx));
5791 case X86::BI__builtin_ia32_pshufhw:
5792 case X86::BI__builtin_ia32_pshufhw256:
5793 case X86::BI__builtin_ia32_pshufhw512:
5795 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5796 unsigned LaneBase = (DstIdx / 8) * 8;
5797 unsigned LaneIdx = DstIdx % 8;
5799 unsigned Sel = (ShuffleMask >> (2 * (LaneIdx - 4))) & 0x3;
5800 return std::make_pair(0,
static_cast<int>(LaneBase + 4 + Sel));
5803 return std::make_pair(0,
static_cast<int>(DstIdx));
5806 case X86::BI__builtin_ia32_pshufd:
5807 case X86::BI__builtin_ia32_pshufd256:
5808 case X86::BI__builtin_ia32_pshufd512:
5809 case X86::BI__builtin_ia32_vpermilps:
5810 case X86::BI__builtin_ia32_vpermilps256:
5811 case X86::BI__builtin_ia32_vpermilps512:
5813 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5814 unsigned LaneBase = (DstIdx / 4) * 4;
5815 unsigned LaneIdx = DstIdx % 4;
5816 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
5817 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
5820 case X86::BI__builtin_ia32_vpermilvarpd:
5821 case X86::BI__builtin_ia32_vpermilvarpd256:
5822 case X86::BI__builtin_ia32_vpermilvarpd512:
5824 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5825 unsigned NumElemPerLane = 2;
5826 unsigned Lane = DstIdx / NumElemPerLane;
5827 unsigned Offset = ShuffleMask & 0b10 ? 1 : 0;
5828 return std::make_pair(
5829 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
5832 case X86::BI__builtin_ia32_vpermilvarps:
5833 case X86::BI__builtin_ia32_vpermilvarps256:
5834 case X86::BI__builtin_ia32_vpermilvarps512:
5836 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5837 unsigned NumElemPerLane = 4;
5838 unsigned Lane = DstIdx / NumElemPerLane;
5839 unsigned Offset = ShuffleMask & 0b11;
5840 return std::make_pair(
5841 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
5844 case X86::BI__builtin_ia32_vpermilpd:
5845 case X86::BI__builtin_ia32_vpermilpd256:
5846 case X86::BI__builtin_ia32_vpermilpd512:
5848 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Control) {
5849 unsigned NumElemPerLane = 2;
5850 unsigned BitsPerElem = 1;
5851 unsigned MaskBits = 8;
5852 unsigned IndexMask = 0x1;
5853 unsigned Lane = DstIdx / NumElemPerLane;
5854 unsigned LaneOffset = Lane * NumElemPerLane;
5855 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5856 unsigned Index = (Control >> BitIndex) & IndexMask;
5857 return std::make_pair(0,
static_cast<int>(LaneOffset + Index));
5860 case X86::BI__builtin_ia32_permdf256:
5861 case X86::BI__builtin_ia32_permdi256:
5863 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Control) {
5866 unsigned Index = (Control >> (2 * DstIdx)) & 0x3;
5867 return std::make_pair(0,
static_cast<int>(Index));
5870 case X86::BI__builtin_ia32_vpmultishiftqb128:
5871 case X86::BI__builtin_ia32_vpmultishiftqb256:
5872 case X86::BI__builtin_ia32_vpmultishiftqb512:
5874 case X86::BI__builtin_ia32_kandqi:
5875 case X86::BI__builtin_ia32_kandhi:
5876 case X86::BI__builtin_ia32_kandsi:
5877 case X86::BI__builtin_ia32_kanddi:
5880 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS & RHS; });
5882 case X86::BI__builtin_ia32_kandnqi:
5883 case X86::BI__builtin_ia32_kandnhi:
5884 case X86::BI__builtin_ia32_kandnsi:
5885 case X86::BI__builtin_ia32_kandndi:
5888 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~LHS & RHS; });
5890 case X86::BI__builtin_ia32_korqi:
5891 case X86::BI__builtin_ia32_korhi:
5892 case X86::BI__builtin_ia32_korsi:
5893 case X86::BI__builtin_ia32_kordi:
5896 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS | RHS; });
5898 case X86::BI__builtin_ia32_kxnorqi:
5899 case X86::BI__builtin_ia32_kxnorhi:
5900 case X86::BI__builtin_ia32_kxnorsi:
5901 case X86::BI__builtin_ia32_kxnordi:
5904 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~(LHS ^ RHS); });
5906 case X86::BI__builtin_ia32_kxorqi:
5907 case X86::BI__builtin_ia32_kxorhi:
5908 case X86::BI__builtin_ia32_kxorsi:
5909 case X86::BI__builtin_ia32_kxordi:
5912 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS ^ RHS; });
5914 case X86::BI__builtin_ia32_knotqi:
5915 case X86::BI__builtin_ia32_knothi:
5916 case X86::BI__builtin_ia32_knotsi:
5917 case X86::BI__builtin_ia32_knotdi:
5919 S, OpPC,
Call, [](
const APSInt &Src) {
return ~Src; });
5921 case X86::BI__builtin_ia32_kaddqi:
5922 case X86::BI__builtin_ia32_kaddhi:
5923 case X86::BI__builtin_ia32_kaddsi:
5924 case X86::BI__builtin_ia32_kadddi:
5927 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
5929 case X86::BI__builtin_ia32_kmovb:
5930 case X86::BI__builtin_ia32_kmovw:
5931 case X86::BI__builtin_ia32_kmovd:
5932 case X86::BI__builtin_ia32_kmovq:
5934 S, OpPC,
Call, [](
const APSInt &Src) {
return Src; });
5936 case X86::BI__builtin_ia32_kunpckhi:
5937 case X86::BI__builtin_ia32_kunpckdi:
5938 case X86::BI__builtin_ia32_kunpcksi:
5943 unsigned BW = A.getBitWidth();
5944 return APSInt(A.trunc(BW / 2).concat(B.trunc(BW / 2)),
5948 case X86::BI__builtin_ia32_phminposuw128:
5951 case X86::BI__builtin_ia32_psraq128:
5952 case X86::BI__builtin_ia32_psraq256:
5953 case X86::BI__builtin_ia32_psraq512:
5954 case X86::BI__builtin_ia32_psrad128:
5955 case X86::BI__builtin_ia32_psrad256:
5956 case X86::BI__builtin_ia32_psrad512:
5957 case X86::BI__builtin_ia32_psraw128:
5958 case X86::BI__builtin_ia32_psraw256:
5959 case X86::BI__builtin_ia32_psraw512:
5962 [](
const APInt &Elt, uint64_t Count) {
return Elt.ashr(Count); },
5963 [](
const APInt &Elt,
unsigned Width) {
return Elt.ashr(Width - 1); });
5965 case X86::BI__builtin_ia32_psllq128:
5966 case X86::BI__builtin_ia32_psllq256:
5967 case X86::BI__builtin_ia32_psllq512:
5968 case X86::BI__builtin_ia32_pslld128:
5969 case X86::BI__builtin_ia32_pslld256:
5970 case X86::BI__builtin_ia32_pslld512:
5971 case X86::BI__builtin_ia32_psllw128:
5972 case X86::BI__builtin_ia32_psllw256:
5973 case X86::BI__builtin_ia32_psllw512:
5976 [](
const APInt &Elt, uint64_t Count) {
return Elt.shl(Count); },
5977 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
5979 case X86::BI__builtin_ia32_psrlq128:
5980 case X86::BI__builtin_ia32_psrlq256:
5981 case X86::BI__builtin_ia32_psrlq512:
5982 case X86::BI__builtin_ia32_psrld128:
5983 case X86::BI__builtin_ia32_psrld256:
5984 case X86::BI__builtin_ia32_psrld512:
5985 case X86::BI__builtin_ia32_psrlw128:
5986 case X86::BI__builtin_ia32_psrlw256:
5987 case X86::BI__builtin_ia32_psrlw512:
5990 [](
const APInt &Elt, uint64_t Count) {
return Elt.lshr(Count); },
5991 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
5993 case X86::BI__builtin_ia32_pternlogd128_mask:
5994 case X86::BI__builtin_ia32_pternlogd256_mask:
5995 case X86::BI__builtin_ia32_pternlogd512_mask:
5996 case X86::BI__builtin_ia32_pternlogq128_mask:
5997 case X86::BI__builtin_ia32_pternlogq256_mask:
5998 case X86::BI__builtin_ia32_pternlogq512_mask:
6000 case X86::BI__builtin_ia32_pternlogd128_maskz:
6001 case X86::BI__builtin_ia32_pternlogd256_maskz:
6002 case X86::BI__builtin_ia32_pternlogd512_maskz:
6003 case X86::BI__builtin_ia32_pternlogq128_maskz:
6004 case X86::BI__builtin_ia32_pternlogq256_maskz:
6005 case X86::BI__builtin_ia32_pternlogq512_maskz:
6007 case Builtin::BI__builtin_elementwise_fshl:
6009 llvm::APIntOps::fshl);
6010 case Builtin::BI__builtin_elementwise_fshr:
6012 llvm::APIntOps::fshr);
6014 case X86::BI__builtin_ia32_shuf_f32x4_256:
6015 case X86::BI__builtin_ia32_shuf_i32x4_256:
6016 case X86::BI__builtin_ia32_shuf_f64x2_256:
6017 case X86::BI__builtin_ia32_shuf_i64x2_256:
6018 case X86::BI__builtin_ia32_shuf_f32x4:
6019 case X86::BI__builtin_ia32_shuf_i32x4:
6020 case X86::BI__builtin_ia32_shuf_f64x2:
6021 case X86::BI__builtin_ia32_shuf_i64x2: {
6027 unsigned LaneBits = 128u;
6028 unsigned NumLanes = (NumElems * ElemBits) / LaneBits;
6029 unsigned NumElemsPerLane = LaneBits / ElemBits;
6033 [NumLanes, NumElemsPerLane](
unsigned DstIdx,
unsigned ShuffleMask) {
6035 unsigned BitsPerElem = NumLanes / 2;
6036 unsigned IndexMask = (1u << BitsPerElem) - 1;
6037 unsigned Lane = DstIdx / NumElemsPerLane;
6038 unsigned SrcIdx = (Lane < NumLanes / 2) ? 0 : 1;
6039 unsigned BitIdx = BitsPerElem * Lane;
6040 unsigned SrcLaneIdx = (ShuffleMask >> BitIdx) & IndexMask;
6041 unsigned ElemInLane = DstIdx % NumElemsPerLane;
6042 unsigned IdxToPick = SrcLaneIdx * NumElemsPerLane + ElemInLane;
6043 return std::pair<unsigned, int>{SrcIdx, IdxToPick};
6047 case X86::BI__builtin_ia32_insertf32x4_256:
6048 case X86::BI__builtin_ia32_inserti32x4_256:
6049 case X86::BI__builtin_ia32_insertf64x2_256:
6050 case X86::BI__builtin_ia32_inserti64x2_256:
6051 case X86::BI__builtin_ia32_insertf32x4:
6052 case X86::BI__builtin_ia32_inserti32x4:
6053 case X86::BI__builtin_ia32_insertf64x2_512:
6054 case X86::BI__builtin_ia32_inserti64x2_512:
6055 case X86::BI__builtin_ia32_insertf32x8:
6056 case X86::BI__builtin_ia32_inserti32x8:
6057 case X86::BI__builtin_ia32_insertf64x4:
6058 case X86::BI__builtin_ia32_inserti64x4:
6059 case X86::BI__builtin_ia32_vinsertf128_ps256:
6060 case X86::BI__builtin_ia32_vinsertf128_pd256:
6061 case X86::BI__builtin_ia32_vinsertf128_si256:
6062 case X86::BI__builtin_ia32_insert128i256:
6065 case clang::X86::BI__builtin_ia32_vcvtps2ph:
6066 case clang::X86::BI__builtin_ia32_vcvtps2ph256:
6069 case X86::BI__builtin_ia32_vec_ext_v4hi:
6070 case X86::BI__builtin_ia32_vec_ext_v16qi:
6071 case X86::BI__builtin_ia32_vec_ext_v8hi:
6072 case X86::BI__builtin_ia32_vec_ext_v4si:
6073 case X86::BI__builtin_ia32_vec_ext_v2di:
6074 case X86::BI__builtin_ia32_vec_ext_v32qi:
6075 case X86::BI__builtin_ia32_vec_ext_v16hi:
6076 case X86::BI__builtin_ia32_vec_ext_v8si:
6077 case X86::BI__builtin_ia32_vec_ext_v4di:
6078 case X86::BI__builtin_ia32_vec_ext_v4sf:
6081 case X86::BI__builtin_ia32_vec_set_v4hi:
6082 case X86::BI__builtin_ia32_vec_set_v16qi:
6083 case X86::BI__builtin_ia32_vec_set_v8hi:
6084 case X86::BI__builtin_ia32_vec_set_v4si:
6085 case X86::BI__builtin_ia32_vec_set_v2di:
6086 case X86::BI__builtin_ia32_vec_set_v32qi:
6087 case X86::BI__builtin_ia32_vec_set_v16hi:
6088 case X86::BI__builtin_ia32_vec_set_v8si:
6089 case X86::BI__builtin_ia32_vec_set_v4di:
6092 case X86::BI__builtin_ia32_cvtb2mask128:
6093 case X86::BI__builtin_ia32_cvtb2mask256:
6094 case X86::BI__builtin_ia32_cvtb2mask512:
6095 case X86::BI__builtin_ia32_cvtw2mask128:
6096 case X86::BI__builtin_ia32_cvtw2mask256:
6097 case X86::BI__builtin_ia32_cvtw2mask512:
6098 case X86::BI__builtin_ia32_cvtd2mask128:
6099 case X86::BI__builtin_ia32_cvtd2mask256:
6100 case X86::BI__builtin_ia32_cvtd2mask512:
6101 case X86::BI__builtin_ia32_cvtq2mask128:
6102 case X86::BI__builtin_ia32_cvtq2mask256:
6103 case X86::BI__builtin_ia32_cvtq2mask512:
6106 case X86::BI__builtin_ia32_cvtmask2b128:
6107 case X86::BI__builtin_ia32_cvtmask2b256:
6108 case X86::BI__builtin_ia32_cvtmask2b512:
6109 case X86::BI__builtin_ia32_cvtmask2w128:
6110 case X86::BI__builtin_ia32_cvtmask2w256:
6111 case X86::BI__builtin_ia32_cvtmask2w512:
6112 case X86::BI__builtin_ia32_cvtmask2d128:
6113 case X86::BI__builtin_ia32_cvtmask2d256:
6114 case X86::BI__builtin_ia32_cvtmask2d512:
6115 case X86::BI__builtin_ia32_cvtmask2q128:
6116 case X86::BI__builtin_ia32_cvtmask2q256:
6117 case X86::BI__builtin_ia32_cvtmask2q512:
6120 case X86::BI__builtin_ia32_cvtsd2ss:
6123 case X86::BI__builtin_ia32_cvtsd2ss_round_mask:
6126 case X86::BI__builtin_ia32_cvtpd2ps:
6127 case X86::BI__builtin_ia32_cvtpd2ps256:
6129 case X86::BI__builtin_ia32_cvtpd2ps_mask:
6131 case X86::BI__builtin_ia32_cvtpd2ps512_mask:
6134 case X86::BI__builtin_ia32_cmpb128_mask:
6135 case X86::BI__builtin_ia32_cmpw128_mask:
6136 case X86::BI__builtin_ia32_cmpd128_mask:
6137 case X86::BI__builtin_ia32_cmpq128_mask:
6138 case X86::BI__builtin_ia32_cmpb256_mask:
6139 case X86::BI__builtin_ia32_cmpw256_mask:
6140 case X86::BI__builtin_ia32_cmpd256_mask:
6141 case X86::BI__builtin_ia32_cmpq256_mask:
6142 case X86::BI__builtin_ia32_cmpb512_mask:
6143 case X86::BI__builtin_ia32_cmpw512_mask:
6144 case X86::BI__builtin_ia32_cmpd512_mask:
6145 case X86::BI__builtin_ia32_cmpq512_mask:
6149 case X86::BI__builtin_ia32_ucmpb128_mask:
6150 case X86::BI__builtin_ia32_ucmpw128_mask:
6151 case X86::BI__builtin_ia32_ucmpd128_mask:
6152 case X86::BI__builtin_ia32_ucmpq128_mask:
6153 case X86::BI__builtin_ia32_ucmpb256_mask:
6154 case X86::BI__builtin_ia32_ucmpw256_mask:
6155 case X86::BI__builtin_ia32_ucmpd256_mask:
6156 case X86::BI__builtin_ia32_ucmpq256_mask:
6157 case X86::BI__builtin_ia32_ucmpb512_mask:
6158 case X86::BI__builtin_ia32_ucmpw512_mask:
6159 case X86::BI__builtin_ia32_ucmpd512_mask:
6160 case X86::BI__builtin_ia32_ucmpq512_mask:
6164 case X86::BI__builtin_ia32_vpshufbitqmb128_mask:
6165 case X86::BI__builtin_ia32_vpshufbitqmb256_mask:
6166 case X86::BI__builtin_ia32_vpshufbitqmb512_mask:
6169 case X86::BI__builtin_ia32_pslldqi128_byteshift:
6170 case X86::BI__builtin_ia32_pslldqi256_byteshift:
6171 case X86::BI__builtin_ia32_pslldqi512_byteshift:
6178 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
6179 unsigned LaneBase = (DstIdx / 16) * 16;
6180 unsigned LaneIdx = DstIdx % 16;
6181 if (LaneIdx < Shift)
6182 return std::make_pair(0, -1);
6184 return std::make_pair(0,
6185 static_cast<int>(LaneBase + LaneIdx - Shift));
6188 case X86::BI__builtin_ia32_psrldqi128_byteshift:
6189 case X86::BI__builtin_ia32_psrldqi256_byteshift:
6190 case X86::BI__builtin_ia32_psrldqi512_byteshift:
6197 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
6198 unsigned LaneBase = (DstIdx / 16) * 16;
6199 unsigned LaneIdx = DstIdx % 16;
6200 if (LaneIdx + Shift < 16)
6201 return std::make_pair(0,
6202 static_cast<int>(LaneBase + LaneIdx + Shift));
6204 return std::make_pair(0, -1);
6207 case X86::BI__builtin_ia32_palignr128:
6208 case X86::BI__builtin_ia32_palignr256:
6209 case X86::BI__builtin_ia32_palignr512:
6211 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Shift) {
6213 unsigned VecIdx = 1;
6216 int Lane = DstIdx / 16;
6217 int Offset = DstIdx % 16;
6220 unsigned ShiftedIdx = Offset + (Shift & 0xFF);
6221 if (ShiftedIdx < 16) {
6222 ElemIdx = ShiftedIdx + (Lane * 16);
6223 }
else if (ShiftedIdx < 32) {
6225 ElemIdx = (ShiftedIdx - 16) + (Lane * 16);
6228 return std::pair<unsigned, int>{VecIdx, ElemIdx};
6231 case X86::BI__builtin_ia32_alignd128:
6232 case X86::BI__builtin_ia32_alignd256:
6233 case X86::BI__builtin_ia32_alignd512:
6234 case X86::BI__builtin_ia32_alignq128:
6235 case X86::BI__builtin_ia32_alignq256:
6236 case X86::BI__builtin_ia32_alignq512: {
6237 unsigned NumElems =
Call->getType()->castAs<
VectorType>()->getNumElements();
6239 S, OpPC,
Call, [NumElems](
unsigned DstIdx,
unsigned Shift) {
6240 unsigned Imm = Shift & 0xFF;
6241 unsigned EffectiveShift = Imm & (NumElems - 1);
6242 unsigned SourcePos = DstIdx + EffectiveShift;
6243 unsigned VecIdx = SourcePos < NumElems ? 1u : 0u;
6244 unsigned ElemIdx = SourcePos & (NumElems - 1);
6245 return std::pair<unsigned, int>{VecIdx,
static_cast<int>(ElemIdx)};
6249 case clang::X86::BI__builtin_ia32_minps:
6250 case clang::X86::BI__builtin_ia32_minpd:
6251 case clang::X86::BI__builtin_ia32_minph128:
6252 case clang::X86::BI__builtin_ia32_minph256:
6253 case clang::X86::BI__builtin_ia32_minps256:
6254 case clang::X86::BI__builtin_ia32_minpd256:
6255 case clang::X86::BI__builtin_ia32_minps512:
6256 case clang::X86::BI__builtin_ia32_minpd512:
6257 case clang::X86::BI__builtin_ia32_minph512:
6261 std::optional<APSInt>) -> std::optional<APFloat> {
6262 if (A.isNaN() || A.isInfinity() || A.isDenormal() || B.isNaN() ||
6263 B.isInfinity() || B.isDenormal())
6264 return std::nullopt;
6265 if (A.isZero() && B.isZero())
6267 return llvm::minimum(A, B);
6270 case clang::X86::BI__builtin_ia32_minss:
6271 case clang::X86::BI__builtin_ia32_minsd:
6275 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
6280 case clang::X86::BI__builtin_ia32_minsd_round_mask:
6281 case clang::X86::BI__builtin_ia32_minss_round_mask:
6282 case clang::X86::BI__builtin_ia32_minsh_round_mask:
6283 case clang::X86::BI__builtin_ia32_maxsd_round_mask:
6284 case clang::X86::BI__builtin_ia32_maxss_round_mask:
6285 case clang::X86::BI__builtin_ia32_maxsh_round_mask: {
6286 bool IsMin = BuiltinID == clang::X86::BI__builtin_ia32_minsd_round_mask ||
6287 BuiltinID == clang::X86::BI__builtin_ia32_minss_round_mask ||
6288 BuiltinID == clang::X86::BI__builtin_ia32_minsh_round_mask;
6292 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
6297 case clang::X86::BI__builtin_ia32_maxps:
6298 case clang::X86::BI__builtin_ia32_maxpd:
6299 case clang::X86::BI__builtin_ia32_maxph128:
6300 case clang::X86::BI__builtin_ia32_maxph256:
6301 case clang::X86::BI__builtin_ia32_maxps256:
6302 case clang::X86::BI__builtin_ia32_maxpd256:
6303 case clang::X86::BI__builtin_ia32_maxps512:
6304 case clang::X86::BI__builtin_ia32_maxpd512:
6305 case clang::X86::BI__builtin_ia32_maxph512:
6309 std::optional<APSInt>) -> std::optional<APFloat> {
6310 if (A.isNaN() || A.isInfinity() || A.isDenormal() || B.isNaN() ||
6311 B.isInfinity() || B.isDenormal())
6312 return std::nullopt;
6313 if (A.isZero() && B.isZero())
6315 return llvm::maximum(A, B);
6318 case clang::X86::BI__builtin_ia32_maxss:
6319 case clang::X86::BI__builtin_ia32_maxsd:
6323 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
6330 diag::note_invalid_subexpr_in_const_expr)
6336 llvm_unreachable(
"Unhandled builtin ID");