4809 uint32_t BuiltinID) {
4811 switch (BuiltinID) {
4812 case Builtin::BI__builtin_is_constant_evaluated:
4815 case Builtin::BI__builtin_assume:
4816 case Builtin::BI__assume:
4819 case Builtin::BI__builtin_strcmp:
4820 case Builtin::BIstrcmp:
4821 case Builtin::BI__builtin_strncmp:
4822 case Builtin::BIstrncmp:
4823 case Builtin::BI__builtin_wcsncmp:
4824 case Builtin::BIwcsncmp:
4825 case Builtin::BI__builtin_wcscmp:
4826 case Builtin::BIwcscmp:
4829 case Builtin::BI__builtin_strlen:
4830 case Builtin::BIstrlen:
4831 case Builtin::BI__builtin_wcslen:
4832 case Builtin::BIwcslen:
4835 case Builtin::BI__builtin_nan:
4836 case Builtin::BI__builtin_nanf:
4837 case Builtin::BI__builtin_nanl:
4838 case Builtin::BI__builtin_nanf16:
4839 case Builtin::BI__builtin_nanf128:
4842 case Builtin::BI__builtin_nans:
4843 case Builtin::BI__builtin_nansf:
4844 case Builtin::BI__builtin_nansl:
4845 case Builtin::BI__builtin_nansf16:
4846 case Builtin::BI__builtin_nansf128:
4849 case Builtin::BI__builtin_huge_val:
4850 case Builtin::BI__builtin_huge_valf:
4851 case Builtin::BI__builtin_huge_vall:
4852 case Builtin::BI__builtin_huge_valf16:
4853 case Builtin::BI__builtin_huge_valf128:
4854 case Builtin::BI__builtin_inf:
4855 case Builtin::BI__builtin_inff:
4856 case Builtin::BI__builtin_infl:
4857 case Builtin::BI__builtin_inff16:
4858 case Builtin::BI__builtin_inff128:
4861 case Builtin::BI__builtin_copysign:
4862 case Builtin::BI__builtin_copysignf:
4863 case Builtin::BI__builtin_copysignl:
4864 case Builtin::BI__builtin_copysignf128:
4867 case Builtin::BI__builtin_fmin:
4868 case Builtin::BI__builtin_fminf:
4869 case Builtin::BI__builtin_fminl:
4870 case Builtin::BI__builtin_fminf16:
4871 case Builtin::BI__builtin_fminf128:
4874 case Builtin::BI__builtin_fminimum_num:
4875 case Builtin::BI__builtin_fminimum_numf:
4876 case Builtin::BI__builtin_fminimum_numl:
4877 case Builtin::BI__builtin_fminimum_numf16:
4878 case Builtin::BI__builtin_fminimum_numf128:
4881 case Builtin::BI__builtin_fmax:
4882 case Builtin::BI__builtin_fmaxf:
4883 case Builtin::BI__builtin_fmaxl:
4884 case Builtin::BI__builtin_fmaxf16:
4885 case Builtin::BI__builtin_fmaxf128:
4888 case Builtin::BI__builtin_fmaximum_num:
4889 case Builtin::BI__builtin_fmaximum_numf:
4890 case Builtin::BI__builtin_fmaximum_numl:
4891 case Builtin::BI__builtin_fmaximum_numf16:
4892 case Builtin::BI__builtin_fmaximum_numf128:
4895 case Builtin::BI__builtin_isnan:
4898 case Builtin::BI__builtin_issignaling:
4901 case Builtin::BI__builtin_isinf:
4904 case Builtin::BI__builtin_isinf_sign:
4907 case Builtin::BI__builtin_isfinite:
4910 case Builtin::BI__builtin_isnormal:
4913 case Builtin::BI__builtin_issubnormal:
4916 case Builtin::BI__builtin_iszero:
4919 case Builtin::BI__builtin_signbit:
4920 case Builtin::BI__builtin_signbitf:
4921 case Builtin::BI__builtin_signbitl:
4924 case Builtin::BI__builtin_isgreater:
4925 case Builtin::BI__builtin_isgreaterequal:
4926 case Builtin::BI__builtin_isless:
4927 case Builtin::BI__builtin_islessequal:
4928 case Builtin::BI__builtin_islessgreater:
4929 case Builtin::BI__builtin_isunordered:
4932 case Builtin::BI__builtin_isfpclass:
4935 case Builtin::BI__builtin_fpclassify:
4938 case Builtin::BI__builtin_fabs:
4939 case Builtin::BI__builtin_fabsf:
4940 case Builtin::BI__builtin_fabsl:
4941 case Builtin::BI__builtin_fabsf128:
4944 case Builtin::BI__builtin_abs:
4945 case Builtin::BI__builtin_labs:
4946 case Builtin::BI__builtin_llabs:
4949 case Builtin::BI__builtin_popcount:
4950 case Builtin::BI__builtin_popcountl:
4951 case Builtin::BI__builtin_popcountll:
4952 case Builtin::BI__builtin_popcountg:
4953 case Builtin::BI__popcnt16:
4954 case Builtin::BI__popcnt:
4955 case Builtin::BI__popcnt64:
4958 case Builtin::BI__builtin_parity:
4959 case Builtin::BI__builtin_parityl:
4960 case Builtin::BI__builtin_parityll:
4963 return APInt(Val.getBitWidth(), Val.popcount() % 2);
4965 case Builtin::BI__builtin_clrsb:
4966 case Builtin::BI__builtin_clrsbl:
4967 case Builtin::BI__builtin_clrsbll:
4970 return APInt(Val.getBitWidth(),
4971 Val.getBitWidth() - Val.getSignificantBits());
4973 case Builtin::BI__builtin_bitreverseg:
4974 case Builtin::BI__builtin_bitreverse8:
4975 case Builtin::BI__builtin_bitreverse16:
4976 case Builtin::BI__builtin_bitreverse32:
4977 case Builtin::BI__builtin_bitreverse64:
4979 S, OpPC,
Call, [](
const APSInt &Val) {
return Val.reverseBits(); });
4981 case Builtin::BI__builtin_classify_type:
4984 case Builtin::BI__builtin_expect:
4985 case Builtin::BI__builtin_expect_with_probability:
4988 case Builtin::BI__builtin_rotateleft8:
4989 case Builtin::BI__builtin_rotateleft16:
4990 case Builtin::BI__builtin_rotateleft32:
4991 case Builtin::BI__builtin_rotateleft64:
4992 case Builtin::BI__builtin_stdc_rotate_left:
4993 case Builtin::BIstdc_rotate_left_uc:
4994 case Builtin::BIstdc_rotate_left_us:
4995 case Builtin::BIstdc_rotate_left_ui:
4996 case Builtin::BIstdc_rotate_left_ul:
4997 case Builtin::BIstdc_rotate_left_ull:
4998 case Builtin::BI_rotl8:
4999 case Builtin::BI_rotl16:
5000 case Builtin::BI_rotl:
5001 case Builtin::BI_lrotl:
5002 case Builtin::BI_rotl64:
5003 case Builtin::BI__builtin_rotateright8:
5004 case Builtin::BI__builtin_rotateright16:
5005 case Builtin::BI__builtin_rotateright32:
5006 case Builtin::BI__builtin_rotateright64:
5007 case Builtin::BI__builtin_stdc_rotate_right:
5008 case Builtin::BIstdc_rotate_right_uc:
5009 case Builtin::BIstdc_rotate_right_us:
5010 case Builtin::BIstdc_rotate_right_ui:
5011 case Builtin::BIstdc_rotate_right_ul:
5012 case Builtin::BIstdc_rotate_right_ull:
5013 case Builtin::BI_rotr8:
5014 case Builtin::BI_rotr16:
5015 case Builtin::BI_rotr:
5016 case Builtin::BI_lrotr:
5017 case Builtin::BI_rotr64: {
5020 switch (BuiltinID) {
5021 case Builtin::BI__builtin_rotateright8:
5022 case Builtin::BI__builtin_rotateright16:
5023 case Builtin::BI__builtin_rotateright32:
5024 case Builtin::BI__builtin_rotateright64:
5025 case Builtin::BI__builtin_stdc_rotate_right:
5026 case Builtin::BIstdc_rotate_right_uc:
5027 case Builtin::BIstdc_rotate_right_us:
5028 case Builtin::BIstdc_rotate_right_ui:
5029 case Builtin::BIstdc_rotate_right_ul:
5030 case Builtin::BIstdc_rotate_right_ull:
5031 case Builtin::BI_rotr8:
5032 case Builtin::BI_rotr16:
5033 case Builtin::BI_rotr:
5034 case Builtin::BI_lrotr:
5035 case Builtin::BI_rotr64:
5036 IsRotateRight =
true;
5039 IsRotateRight =
false;
5046 return IsRotateRight ?
Value.rotr(Amount.getZExtValue())
5047 :
Value.rotl(Amount.getZExtValue());
5051 case Builtin::BIstdc_leading_zeros_uc:
5052 case Builtin::BIstdc_leading_zeros_us:
5053 case Builtin::BIstdc_leading_zeros_ui:
5054 case Builtin::BIstdc_leading_zeros_ul:
5055 case Builtin::BIstdc_leading_zeros_ull:
5056 case Builtin::BI__builtin_stdc_leading_zeros: {
5059 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
5060 return APInt(ResWidth, Val.countl_zero());
5064 case Builtin::BIstdc_leading_ones_uc:
5065 case Builtin::BIstdc_leading_ones_us:
5066 case Builtin::BIstdc_leading_ones_ui:
5067 case Builtin::BIstdc_leading_ones_ul:
5068 case Builtin::BIstdc_leading_ones_ull:
5069 case Builtin::BI__builtin_stdc_leading_ones: {
5072 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
5073 return APInt(ResWidth, Val.countl_one());
5077 case Builtin::BIstdc_trailing_zeros_uc:
5078 case Builtin::BIstdc_trailing_zeros_us:
5079 case Builtin::BIstdc_trailing_zeros_ui:
5080 case Builtin::BIstdc_trailing_zeros_ul:
5081 case Builtin::BIstdc_trailing_zeros_ull:
5082 case Builtin::BI__builtin_stdc_trailing_zeros: {
5085 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
5086 return APInt(ResWidth, Val.countr_zero());
5090 case Builtin::BIstdc_trailing_ones_uc:
5091 case Builtin::BIstdc_trailing_ones_us:
5092 case Builtin::BIstdc_trailing_ones_ui:
5093 case Builtin::BIstdc_trailing_ones_ul:
5094 case Builtin::BIstdc_trailing_ones_ull:
5095 case Builtin::BI__builtin_stdc_trailing_ones: {
5098 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
5099 return APInt(ResWidth, Val.countr_one());
5103 case Builtin::BIstdc_first_leading_zero_uc:
5104 case Builtin::BIstdc_first_leading_zero_us:
5105 case Builtin::BIstdc_first_leading_zero_ui:
5106 case Builtin::BIstdc_first_leading_zero_ul:
5107 case Builtin::BIstdc_first_leading_zero_ull:
5108 case Builtin::BI__builtin_stdc_first_leading_zero: {
5111 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
5112 return APInt(ResWidth, Val.isAllOnes() ? 0 : Val.countl_one() + 1);
5116 case Builtin::BIstdc_first_leading_one_uc:
5117 case Builtin::BIstdc_first_leading_one_us:
5118 case Builtin::BIstdc_first_leading_one_ui:
5119 case Builtin::BIstdc_first_leading_one_ul:
5120 case Builtin::BIstdc_first_leading_one_ull:
5121 case Builtin::BI__builtin_stdc_first_leading_one: {
5124 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
5125 return APInt(ResWidth, Val.isZero() ? 0 : Val.countl_zero() + 1);
5129 case Builtin::BIstdc_first_trailing_zero_uc:
5130 case Builtin::BIstdc_first_trailing_zero_us:
5131 case Builtin::BIstdc_first_trailing_zero_ui:
5132 case Builtin::BIstdc_first_trailing_zero_ul:
5133 case Builtin::BIstdc_first_trailing_zero_ull:
5134 case Builtin::BI__builtin_stdc_first_trailing_zero: {
5137 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
5138 return APInt(ResWidth, Val.isAllOnes() ? 0 : Val.countr_one() + 1);
5142 case Builtin::BIstdc_first_trailing_one_uc:
5143 case Builtin::BIstdc_first_trailing_one_us:
5144 case Builtin::BIstdc_first_trailing_one_ui:
5145 case Builtin::BIstdc_first_trailing_one_ul:
5146 case Builtin::BIstdc_first_trailing_one_ull:
5147 case Builtin::BI__builtin_stdc_first_trailing_one: {
5150 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
5151 return APInt(ResWidth, Val.isZero() ? 0 : Val.countr_zero() + 1);
5155 case Builtin::BIstdc_count_zeros_uc:
5156 case Builtin::BIstdc_count_zeros_us:
5157 case Builtin::BIstdc_count_zeros_ui:
5158 case Builtin::BIstdc_count_zeros_ul:
5159 case Builtin::BIstdc_count_zeros_ull:
5160 case Builtin::BI__builtin_stdc_count_zeros: {
5163 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
5164 unsigned BitWidth = Val.getBitWidth();
5165 return APInt(ResWidth, BitWidth - Val.popcount());
5169 case Builtin::BIstdc_count_ones_uc:
5170 case Builtin::BIstdc_count_ones_us:
5171 case Builtin::BIstdc_count_ones_ui:
5172 case Builtin::BIstdc_count_ones_ul:
5173 case Builtin::BIstdc_count_ones_ull:
5174 case Builtin::BI__builtin_stdc_count_ones: {
5177 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
5178 return APInt(ResWidth, Val.popcount());
5182 case Builtin::BIstdc_has_single_bit_uc:
5183 case Builtin::BIstdc_has_single_bit_us:
5184 case Builtin::BIstdc_has_single_bit_ui:
5185 case Builtin::BIstdc_has_single_bit_ul:
5186 case Builtin::BIstdc_has_single_bit_ull:
5187 case Builtin::BI__builtin_stdc_has_single_bit: {
5190 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
5191 return APInt(ResWidth, Val.popcount() == 1 ? 1 : 0);
5195 case Builtin::BIstdc_bit_width_uc:
5196 case Builtin::BIstdc_bit_width_us:
5197 case Builtin::BIstdc_bit_width_ui:
5198 case Builtin::BIstdc_bit_width_ul:
5199 case Builtin::BIstdc_bit_width_ull:
5200 case Builtin::BI__builtin_stdc_bit_width: {
5203 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
5204 unsigned BitWidth = Val.getBitWidth();
5205 return APInt(ResWidth, BitWidth - Val.countl_zero());
5209 case Builtin::BIstdc_bit_floor_uc:
5210 case Builtin::BIstdc_bit_floor_us:
5211 case Builtin::BIstdc_bit_floor_ui:
5212 case Builtin::BIstdc_bit_floor_ul:
5213 case Builtin::BIstdc_bit_floor_ull:
5214 case Builtin::BI__builtin_stdc_bit_floor:
5217 unsigned BitWidth = Val.getBitWidth();
5219 return APInt::getZero(BitWidth);
5220 return APInt::getOneBitSet(BitWidth,
5221 BitWidth - Val.countl_zero() - 1);
5224 case Builtin::BIstdc_bit_ceil_uc:
5225 case Builtin::BIstdc_bit_ceil_us:
5226 case Builtin::BIstdc_bit_ceil_ui:
5227 case Builtin::BIstdc_bit_ceil_ul:
5228 case Builtin::BIstdc_bit_ceil_ull:
5229 case Builtin::BI__builtin_stdc_bit_ceil:
5232 unsigned BitWidth = Val.getBitWidth();
5234 return APInt(BitWidth, 1);
5236 APInt ValMinusOne =
V - 1;
5237 unsigned LeadingZeros = ValMinusOne.countl_zero();
5238 if (LeadingZeros == 0)
5239 return APInt(BitWidth, 0);
5240 return APInt::getOneBitSet(BitWidth, BitWidth - LeadingZeros);
5243 case Builtin::BI__builtin_ffs:
5244 case Builtin::BI__builtin_ffsl:
5245 case Builtin::BI__builtin_ffsll:
5248 return APInt(Val.getBitWidth(),
5249 Val.isZero() ? 0u : Val.countTrailingZeros() + 1u);
5252 case Builtin::BIaddressof:
5253 case Builtin::BI__addressof:
5254 case Builtin::BI__builtin_addressof:
5258 case Builtin::BIas_const:
5259 case Builtin::BIforward:
5260 case Builtin::BIforward_like:
5261 case Builtin::BImove:
5262 case Builtin::BImove_if_noexcept:
5266 case Builtin::BI__builtin_eh_return_data_regno:
5269 case Builtin::BI__builtin_launder:
5273 case Builtin::BI__builtin_add_overflow:
5274 case Builtin::BI__builtin_sub_overflow:
5275 case Builtin::BI__builtin_mul_overflow:
5276 case Builtin::BI__builtin_sadd_overflow:
5277 case Builtin::BI__builtin_uadd_overflow:
5278 case Builtin::BI__builtin_uaddl_overflow:
5279 case Builtin::BI__builtin_uaddll_overflow:
5280 case Builtin::BI__builtin_usub_overflow:
5281 case Builtin::BI__builtin_usubl_overflow:
5282 case Builtin::BI__builtin_usubll_overflow:
5283 case Builtin::BI__builtin_umul_overflow:
5284 case Builtin::BI__builtin_umull_overflow:
5285 case Builtin::BI__builtin_umulll_overflow:
5286 case Builtin::BI__builtin_saddl_overflow:
5287 case Builtin::BI__builtin_saddll_overflow:
5288 case Builtin::BI__builtin_ssub_overflow:
5289 case Builtin::BI__builtin_ssubl_overflow:
5290 case Builtin::BI__builtin_ssubll_overflow:
5291 case Builtin::BI__builtin_smul_overflow:
5292 case Builtin::BI__builtin_smull_overflow:
5293 case Builtin::BI__builtin_smulll_overflow:
5296 case Builtin::BI__builtin_addcb:
5297 case Builtin::BI__builtin_addcs:
5298 case Builtin::BI__builtin_addc:
5299 case Builtin::BI__builtin_addcl:
5300 case Builtin::BI__builtin_addcll:
5301 case Builtin::BI__builtin_subcb:
5302 case Builtin::BI__builtin_subcs:
5303 case Builtin::BI__builtin_subc:
5304 case Builtin::BI__builtin_subcl:
5305 case Builtin::BI__builtin_subcll:
5308 case Builtin::BI__builtin_clz:
5309 case Builtin::BI__builtin_clzl:
5310 case Builtin::BI__builtin_clzll:
5311 case Builtin::BI__builtin_clzs:
5312 case Builtin::BI__builtin_clzg:
5313 case Builtin::BI__lzcnt16:
5314 case Builtin::BI__lzcnt:
5315 case Builtin::BI__lzcnt64:
5318 case Builtin::BI__builtin_ctz:
5319 case Builtin::BI__builtin_ctzl:
5320 case Builtin::BI__builtin_ctzll:
5321 case Builtin::BI__builtin_ctzs:
5322 case Builtin::BI__builtin_ctzg:
5325 case Builtin::BI__builtin_elementwise_clzg:
5326 case Builtin::BI__builtin_elementwise_ctzg:
5329 case Builtin::BI__builtin_bswapg:
5330 case Builtin::BI__builtin_bswap16:
5331 case Builtin::BI__builtin_bswap32:
5332 case Builtin::BI__builtin_bswap64:
5333 case Builtin::BIstdc_memreverse8u8:
5334 case Builtin::BIstdc_memreverse8u16:
5335 case Builtin::BIstdc_memreverse8u32:
5336 case Builtin::BIstdc_memreverse8u64:
5339 case Builtin::BIstdc_memreverse8:
5340 case Builtin::BI__builtin_stdc_memreverse8:
5343 case Builtin::BIstdc_load8_leu8:
5344 case Builtin::BIstdc_load8_leu16:
5345 case Builtin::BIstdc_load8_leu32:
5346 case Builtin::BIstdc_load8_leu64:
5347 case Builtin::BIstdc_load8_les8:
5348 case Builtin::BIstdc_load8_les16:
5349 case Builtin::BIstdc_load8_les32:
5350 case Builtin::BIstdc_load8_les64:
5354 case Builtin::BIstdc_load8_aligned_leu8:
5355 case Builtin::BIstdc_load8_aligned_leu16:
5356 case Builtin::BIstdc_load8_aligned_leu32:
5357 case Builtin::BIstdc_load8_aligned_leu64:
5358 case Builtin::BIstdc_load8_aligned_les8:
5359 case Builtin::BIstdc_load8_aligned_les16:
5360 case Builtin::BIstdc_load8_aligned_les32:
5361 case Builtin::BIstdc_load8_aligned_les64:
5365 case Builtin::BIstdc_load8_beu8:
5366 case Builtin::BIstdc_load8_beu16:
5367 case Builtin::BIstdc_load8_beu32:
5368 case Builtin::BIstdc_load8_beu64:
5369 case Builtin::BIstdc_load8_bes8:
5370 case Builtin::BIstdc_load8_bes16:
5371 case Builtin::BIstdc_load8_bes32:
5372 case Builtin::BIstdc_load8_bes64:
5376 case Builtin::BIstdc_load8_aligned_beu8:
5377 case Builtin::BIstdc_load8_aligned_beu16:
5378 case Builtin::BIstdc_load8_aligned_beu32:
5379 case Builtin::BIstdc_load8_aligned_beu64:
5380 case Builtin::BIstdc_load8_aligned_bes8:
5381 case Builtin::BIstdc_load8_aligned_bes16:
5382 case Builtin::BIstdc_load8_aligned_bes32:
5383 case Builtin::BIstdc_load8_aligned_bes64:
5387 case Builtin::BI__atomic_always_lock_free:
5388 case Builtin::BI__atomic_is_lock_free:
5391 case Builtin::BI__c11_atomic_is_lock_free:
5394 case Builtin::BI__builtin_complex:
5397 case Builtin::BI__builtin_is_aligned:
5398 case Builtin::BI__builtin_align_up:
5399 case Builtin::BI__builtin_align_down:
5402 case Builtin::BI__builtin_assume_aligned:
5405 case clang::X86::BI__builtin_ia32_crc32qi:
5407 case clang::X86::BI__builtin_ia32_crc32hi:
5409 case clang::X86::BI__builtin_ia32_crc32si:
5411 case clang::X86::BI__builtin_ia32_crc32di:
5414 case clang::X86::BI__builtin_ia32_bextr_u32:
5415 case clang::X86::BI__builtin_ia32_bextr_u64:
5416 case clang::X86::BI__builtin_ia32_bextri_u32:
5417 case clang::X86::BI__builtin_ia32_bextri_u64:
5420 unsigned BitWidth = Val.getBitWidth();
5421 uint64_t Shift = Idx.extractBitsAsZExtValue(8, 0);
5422 uint64_t Length = Idx.extractBitsAsZExtValue(8, 8);
5423 if (Length > BitWidth) {
5428 if (Length == 0 || Shift >= BitWidth)
5429 return APInt(BitWidth, 0);
5431 uint64_t
Result = Val.getZExtValue() >> Shift;
5432 Result &= llvm::maskTrailingOnes<uint64_t>(Length);
5436 case clang::X86::BI__builtin_ia32_bzhi_si:
5437 case clang::X86::BI__builtin_ia32_bzhi_di:
5440 unsigned BitWidth = Val.getBitWidth();
5441 uint64_t Index = Idx.extractBitsAsZExtValue(8, 0);
5444 if (Index < BitWidth)
5445 Result.clearHighBits(BitWidth - Index);
5450 case clang::X86::BI__builtin_ia32_ktestcqi:
5451 case clang::X86::BI__builtin_ia32_ktestchi:
5452 case clang::X86::BI__builtin_ia32_ktestcsi:
5453 case clang::X86::BI__builtin_ia32_ktestcdi:
5456 return APInt(
sizeof(
unsigned char) * 8, (~A & B) == 0);
5459 case clang::X86::BI__builtin_ia32_ktestzqi:
5460 case clang::X86::BI__builtin_ia32_ktestzhi:
5461 case clang::X86::BI__builtin_ia32_ktestzsi:
5462 case clang::X86::BI__builtin_ia32_ktestzdi:
5465 return APInt(
sizeof(
unsigned char) * 8, (A & B) == 0);
5468 case clang::X86::BI__builtin_ia32_kortestcqi:
5469 case clang::X86::BI__builtin_ia32_kortestchi:
5470 case clang::X86::BI__builtin_ia32_kortestcsi:
5471 case clang::X86::BI__builtin_ia32_kortestcdi:
5474 return APInt(
sizeof(
unsigned char) * 8, ~(A | B) == 0);
5477 case clang::X86::BI__builtin_ia32_kortestzqi:
5478 case clang::X86::BI__builtin_ia32_kortestzhi:
5479 case clang::X86::BI__builtin_ia32_kortestzsi:
5480 case clang::X86::BI__builtin_ia32_kortestzdi:
5483 return APInt(
sizeof(
unsigned char) * 8, (A | B) == 0);
5486 case clang::X86::BI__builtin_ia32_kshiftliqi:
5487 case clang::X86::BI__builtin_ia32_kshiftlihi:
5488 case clang::X86::BI__builtin_ia32_kshiftlisi:
5489 case clang::X86::BI__builtin_ia32_kshiftlidi:
5492 unsigned Amt = RHS.getZExtValue() & 0xFF;
5493 if (Amt >= LHS.getBitWidth())
5494 return APInt::getZero(LHS.getBitWidth());
5495 return LHS.shl(Amt);
5498 case clang::X86::BI__builtin_ia32_kshiftriqi:
5499 case clang::X86::BI__builtin_ia32_kshiftrihi:
5500 case clang::X86::BI__builtin_ia32_kshiftrisi:
5501 case clang::X86::BI__builtin_ia32_kshiftridi:
5504 unsigned Amt = RHS.getZExtValue() & 0xFF;
5505 if (Amt >= LHS.getBitWidth())
5506 return APInt::getZero(LHS.getBitWidth());
5507 return LHS.lshr(Amt);
5510 case clang::X86::BI__builtin_ia32_lzcnt_u16:
5511 case clang::X86::BI__builtin_ia32_lzcnt_u32:
5512 case clang::X86::BI__builtin_ia32_lzcnt_u64:
5515 return APInt(Src.getBitWidth(), Src.countLeadingZeros());
5518 case clang::X86::BI__builtin_ia32_tzcnt_u16:
5519 case clang::X86::BI__builtin_ia32_tzcnt_u32:
5520 case clang::X86::BI__builtin_ia32_tzcnt_u64:
5523 return APInt(Src.getBitWidth(), Src.countTrailingZeros());
5526 case clang::X86::BI__builtin_ia32_addcarryx_u32:
5527 case clang::X86::BI__builtin_ia32_addcarryx_u64:
5531 case clang::X86::BI__builtin_ia32_subborrow_u32:
5532 case clang::X86::BI__builtin_ia32_subborrow_u64:
5536 case Builtin::BI__builtin_os_log_format_buffer_size:
5539 case Builtin::BI__builtin_ptrauth_string_discriminator:
5542 case Builtin::BI__builtin_infer_alloc_token:
5545 case Builtin::BI__noop:
5549 case Builtin::BI__builtin_operator_new:
5552 case Builtin::BI__builtin_operator_delete:
5555 case Builtin::BI__arithmetic_fence:
5558 case Builtin::BI__builtin_reduce_add:
5559 case Builtin::BI__builtin_reduce_mul:
5560 case Builtin::BI__builtin_reduce_and:
5561 case Builtin::BI__builtin_reduce_or:
5562 case Builtin::BI__builtin_reduce_xor:
5563 case Builtin::BI__builtin_reduce_min:
5564 case Builtin::BI__builtin_reduce_max:
5567 case Builtin::BI__builtin_elementwise_popcount:
5570 return APInt(Src.getBitWidth(), Src.popcount());
5572 case Builtin::BI__builtin_elementwise_bitreverse:
5574 S, OpPC,
Call, [](
const APSInt &Src) {
return Src.reverseBits(); });
5576 case Builtin::BI__builtin_elementwise_abs:
5579 case Builtin::BI__builtin_memcpy:
5580 case Builtin::BImemcpy:
5581 case Builtin::BI__builtin_wmemcpy:
5582 case Builtin::BIwmemcpy:
5583 case Builtin::BI__builtin_memmove:
5584 case Builtin::BImemmove:
5585 case Builtin::BI__builtin_wmemmove:
5586 case Builtin::BIwmemmove:
5589 case Builtin::BI__builtin_memcmp:
5590 case Builtin::BImemcmp:
5591 case Builtin::BI__builtin_bcmp:
5592 case Builtin::BIbcmp:
5593 case Builtin::BI__builtin_wmemcmp:
5594 case Builtin::BIwmemcmp:
5597 case Builtin::BImemchr:
5598 case Builtin::BI__builtin_memchr:
5599 case Builtin::BIstrchr:
5600 case Builtin::BI__builtin_strchr:
5601 case Builtin::BIwmemchr:
5602 case Builtin::BI__builtin_wmemchr:
5603 case Builtin::BIwcschr:
5604 case Builtin::BI__builtin_wcschr:
5605 case Builtin::BI__builtin_char_memchr:
5608 case Builtin::BI__builtin_object_size:
5611 case Builtin::BI__builtin_dynamic_object_size:
5615 case Builtin::BI__builtin_is_within_lifetime:
5618 case Builtin::BI__builtin_elementwise_add_sat:
5621 return LHS.isSigned() ? LHS.sadd_sat(RHS) : LHS.uadd_sat(RHS);
5624 case Builtin::BI__builtin_elementwise_sub_sat:
5627 return LHS.isSigned() ? LHS.ssub_sat(RHS) : LHS.usub_sat(RHS);
5630 case Builtin::BI__builtin_elementwise_pdep:
5632 llvm::APIntOps::pdep);
5634 case Builtin::BI__builtin_elementwise_pext:
5636 llvm::APIntOps::pext);
5638 case X86::BI__builtin_ia32_extract128i256:
5639 case X86::BI__builtin_ia32_vextractf128_pd256:
5640 case X86::BI__builtin_ia32_vextractf128_ps256:
5641 case X86::BI__builtin_ia32_vextractf128_si256:
5644 case X86::BI__builtin_ia32_extractf32x4_256_mask:
5645 case X86::BI__builtin_ia32_extractf32x4_mask:
5646 case X86::BI__builtin_ia32_extractf32x8_mask:
5647 case X86::BI__builtin_ia32_extractf64x2_256_mask:
5648 case X86::BI__builtin_ia32_extractf64x2_512_mask:
5649 case X86::BI__builtin_ia32_extractf64x4_mask:
5650 case X86::BI__builtin_ia32_extracti32x4_256_mask:
5651 case X86::BI__builtin_ia32_extracti32x4_mask:
5652 case X86::BI__builtin_ia32_extracti32x8_mask:
5653 case X86::BI__builtin_ia32_extracti64x2_256_mask:
5654 case X86::BI__builtin_ia32_extracti64x2_512_mask:
5655 case X86::BI__builtin_ia32_extracti64x4_mask:
5658 case clang::X86::BI__builtin_ia32_pmulhrsw128:
5659 case clang::X86::BI__builtin_ia32_pmulhrsw256:
5660 case clang::X86::BI__builtin_ia32_pmulhrsw512:
5663 return (llvm::APIntOps::mulsExtended(LHS, RHS).ashr(14) + 1)
5664 .extractBits(16, 1);
5667 case clang::X86::BI__builtin_ia32_movmskps:
5668 case clang::X86::BI__builtin_ia32_movmskpd:
5669 case clang::X86::BI__builtin_ia32_pmovmskb128:
5670 case clang::X86::BI__builtin_ia32_pmovmskb256:
5671 case clang::X86::BI__builtin_ia32_movmskps256:
5672 case clang::X86::BI__builtin_ia32_movmskpd256: {
5676 case X86::BI__builtin_ia32_psignb128:
5677 case X86::BI__builtin_ia32_psignb256:
5678 case X86::BI__builtin_ia32_psignw128:
5679 case X86::BI__builtin_ia32_psignw256:
5680 case X86::BI__builtin_ia32_psignd128:
5681 case X86::BI__builtin_ia32_psignd256:
5685 return APInt::getZero(AElem.getBitWidth());
5686 if (BElem.isNegative())
5691 case clang::X86::BI__builtin_ia32_pavgb128:
5692 case clang::X86::BI__builtin_ia32_pavgw128:
5693 case clang::X86::BI__builtin_ia32_pavgb256:
5694 case clang::X86::BI__builtin_ia32_pavgw256:
5695 case clang::X86::BI__builtin_ia32_pavgb512:
5696 case clang::X86::BI__builtin_ia32_pavgw512:
5698 llvm::APIntOps::avgCeilU);
5700 case clang::X86::BI__builtin_ia32_pmaddubsw128:
5701 case clang::X86::BI__builtin_ia32_pmaddubsw256:
5702 case clang::X86::BI__builtin_ia32_pmaddubsw512:
5707 unsigned BitWidth = 2 * LoLHS.getBitWidth();
5708 return (LoLHS.zext(BitWidth) * LoRHS.sext(BitWidth))
5709 .sadd_sat((HiLHS.zext(BitWidth) * HiRHS.sext(BitWidth)));
5712 case clang::X86::BI__builtin_ia32_pmaddwd128:
5713 case clang::X86::BI__builtin_ia32_pmaddwd256:
5714 case clang::X86::BI__builtin_ia32_pmaddwd512:
5719 unsigned BitWidth = 2 * LoLHS.getBitWidth();
5720 return (LoLHS.sext(BitWidth) * LoRHS.sext(BitWidth)) +
5721 (HiLHS.sext(BitWidth) * HiRHS.sext(BitWidth));
5724 case clang::X86::BI__builtin_ia32_psadbw128:
5725 case clang::X86::BI__builtin_ia32_psadbw256:
5726 case clang::X86::BI__builtin_ia32_psadbw512:
5729 case clang::X86::BI__builtin_ia32_dbpsadbw128:
5730 case clang::X86::BI__builtin_ia32_dbpsadbw256:
5731 case clang::X86::BI__builtin_ia32_dbpsadbw512:
5734 case clang::X86::BI__builtin_ia32_mpsadbw128:
5735 case clang::X86::BI__builtin_ia32_mpsadbw256:
5738 case clang::X86::BI__builtin_ia32_pmulhuw128:
5739 case clang::X86::BI__builtin_ia32_pmulhuw256:
5740 case clang::X86::BI__builtin_ia32_pmulhuw512:
5742 llvm::APIntOps::mulhu);
5744 case clang::X86::BI__builtin_ia32_pmulhw128:
5745 case clang::X86::BI__builtin_ia32_pmulhw256:
5746 case clang::X86::BI__builtin_ia32_pmulhw512:
5748 llvm::APIntOps::mulhs);
5750 case clang::X86::BI__builtin_ia32_psllv2di:
5751 case clang::X86::BI__builtin_ia32_psllv4di:
5752 case clang::X86::BI__builtin_ia32_psllv4si:
5753 case clang::X86::BI__builtin_ia32_psllv8di:
5754 case clang::X86::BI__builtin_ia32_psllv8hi:
5755 case clang::X86::BI__builtin_ia32_psllv8si:
5756 case clang::X86::BI__builtin_ia32_psllv16hi:
5757 case clang::X86::BI__builtin_ia32_psllv16si:
5758 case clang::X86::BI__builtin_ia32_psllv32hi:
5759 case clang::X86::BI__builtin_ia32_psllwi128:
5760 case clang::X86::BI__builtin_ia32_psllwi256:
5761 case clang::X86::BI__builtin_ia32_psllwi512:
5762 case clang::X86::BI__builtin_ia32_pslldi128:
5763 case clang::X86::BI__builtin_ia32_pslldi256:
5764 case clang::X86::BI__builtin_ia32_pslldi512:
5765 case clang::X86::BI__builtin_ia32_psllqi128:
5766 case clang::X86::BI__builtin_ia32_psllqi256:
5767 case clang::X86::BI__builtin_ia32_psllqi512:
5770 if (RHS.uge(LHS.getBitWidth())) {
5771 return APInt::getZero(LHS.getBitWidth());
5773 return LHS.shl(RHS.getZExtValue());
5776 case clang::X86::BI__builtin_ia32_psrav4si:
5777 case clang::X86::BI__builtin_ia32_psrav8di:
5778 case clang::X86::BI__builtin_ia32_psrav8hi:
5779 case clang::X86::BI__builtin_ia32_psrav8si:
5780 case clang::X86::BI__builtin_ia32_psrav16hi:
5781 case clang::X86::BI__builtin_ia32_psrav16si:
5782 case clang::X86::BI__builtin_ia32_psrav32hi:
5783 case clang::X86::BI__builtin_ia32_psravq128:
5784 case clang::X86::BI__builtin_ia32_psravq256:
5785 case clang::X86::BI__builtin_ia32_psrawi128:
5786 case clang::X86::BI__builtin_ia32_psrawi256:
5787 case clang::X86::BI__builtin_ia32_psrawi512:
5788 case clang::X86::BI__builtin_ia32_psradi128:
5789 case clang::X86::BI__builtin_ia32_psradi256:
5790 case clang::X86::BI__builtin_ia32_psradi512:
5791 case clang::X86::BI__builtin_ia32_psraqi128:
5792 case clang::X86::BI__builtin_ia32_psraqi256:
5793 case clang::X86::BI__builtin_ia32_psraqi512:
5796 if (RHS.uge(LHS.getBitWidth())) {
5797 return LHS.ashr(LHS.getBitWidth() - 1);
5799 return LHS.ashr(RHS.getZExtValue());
5802 case clang::X86::BI__builtin_ia32_psrlv2di:
5803 case clang::X86::BI__builtin_ia32_psrlv4di:
5804 case clang::X86::BI__builtin_ia32_psrlv4si:
5805 case clang::X86::BI__builtin_ia32_psrlv8di:
5806 case clang::X86::BI__builtin_ia32_psrlv8hi:
5807 case clang::X86::BI__builtin_ia32_psrlv8si:
5808 case clang::X86::BI__builtin_ia32_psrlv16hi:
5809 case clang::X86::BI__builtin_ia32_psrlv16si:
5810 case clang::X86::BI__builtin_ia32_psrlv32hi:
5811 case clang::X86::BI__builtin_ia32_psrlwi128:
5812 case clang::X86::BI__builtin_ia32_psrlwi256:
5813 case clang::X86::BI__builtin_ia32_psrlwi512:
5814 case clang::X86::BI__builtin_ia32_psrldi128:
5815 case clang::X86::BI__builtin_ia32_psrldi256:
5816 case clang::X86::BI__builtin_ia32_psrldi512:
5817 case clang::X86::BI__builtin_ia32_psrlqi128:
5818 case clang::X86::BI__builtin_ia32_psrlqi256:
5819 case clang::X86::BI__builtin_ia32_psrlqi512:
5822 if (RHS.uge(LHS.getBitWidth())) {
5823 return APInt::getZero(LHS.getBitWidth());
5825 return LHS.lshr(RHS.getZExtValue());
5827 case clang::X86::BI__builtin_ia32_packsswb128:
5828 case clang::X86::BI__builtin_ia32_packsswb256:
5829 case clang::X86::BI__builtin_ia32_packsswb512:
5830 case clang::X86::BI__builtin_ia32_packssdw128:
5831 case clang::X86::BI__builtin_ia32_packssdw256:
5832 case clang::X86::BI__builtin_ia32_packssdw512:
5834 return APInt(Src).truncSSat(Src.getBitWidth() / 2);
5836 case clang::X86::BI__builtin_ia32_packusdw128:
5837 case clang::X86::BI__builtin_ia32_packusdw256:
5838 case clang::X86::BI__builtin_ia32_packusdw512:
5839 case clang::X86::BI__builtin_ia32_packuswb128:
5840 case clang::X86::BI__builtin_ia32_packuswb256:
5841 case clang::X86::BI__builtin_ia32_packuswb512:
5843 return APInt(Src).truncSSatU(Src.getBitWidth() / 2);
5846 case clang::X86::BI__builtin_ia32_selectss_128:
5847 case clang::X86::BI__builtin_ia32_selectsd_128:
5848 case clang::X86::BI__builtin_ia32_selectsh_128:
5849 case clang::X86::BI__builtin_ia32_selectsbf_128:
5851 case clang::X86::BI__builtin_ia32_vprotbi:
5852 case clang::X86::BI__builtin_ia32_vprotdi:
5853 case clang::X86::BI__builtin_ia32_vprotqi:
5854 case clang::X86::BI__builtin_ia32_vprotwi:
5855 case clang::X86::BI__builtin_ia32_prold128:
5856 case clang::X86::BI__builtin_ia32_prold256:
5857 case clang::X86::BI__builtin_ia32_prold512:
5858 case clang::X86::BI__builtin_ia32_prolq128:
5859 case clang::X86::BI__builtin_ia32_prolq256:
5860 case clang::X86::BI__builtin_ia32_prolq512:
5863 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotl(RHS); });
5865 case clang::X86::BI__builtin_ia32_prord128:
5866 case clang::X86::BI__builtin_ia32_prord256:
5867 case clang::X86::BI__builtin_ia32_prord512:
5868 case clang::X86::BI__builtin_ia32_prorq128:
5869 case clang::X86::BI__builtin_ia32_prorq256:
5870 case clang::X86::BI__builtin_ia32_prorq512:
5873 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotr(RHS); });
5875 case Builtin::BI__builtin_elementwise_max:
5876 case Builtin::BI__builtin_elementwise_min:
5879 case clang::X86::BI__builtin_ia32_phaddw128:
5880 case clang::X86::BI__builtin_ia32_phaddw256:
5881 case clang::X86::BI__builtin_ia32_phaddd128:
5882 case clang::X86::BI__builtin_ia32_phaddd256:
5885 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
5886 case clang::X86::BI__builtin_ia32_phaddsw128:
5887 case clang::X86::BI__builtin_ia32_phaddsw256:
5890 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.sadd_sat(RHS); });
5891 case clang::X86::BI__builtin_ia32_phsubw128:
5892 case clang::X86::BI__builtin_ia32_phsubw256:
5893 case clang::X86::BI__builtin_ia32_phsubd128:
5894 case clang::X86::BI__builtin_ia32_phsubd256:
5897 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS - RHS; });
5898 case clang::X86::BI__builtin_ia32_phsubsw128:
5899 case clang::X86::BI__builtin_ia32_phsubsw256:
5902 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.ssub_sat(RHS); });
5903 case clang::X86::BI__builtin_ia32_haddpd:
5904 case clang::X86::BI__builtin_ia32_haddps:
5905 case clang::X86::BI__builtin_ia32_haddpd256:
5906 case clang::X86::BI__builtin_ia32_haddps256:
5909 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
5914 case clang::X86::BI__builtin_ia32_hsubpd:
5915 case clang::X86::BI__builtin_ia32_hsubps:
5916 case clang::X86::BI__builtin_ia32_hsubpd256:
5917 case clang::X86::BI__builtin_ia32_hsubps256:
5920 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
5922 F.subtract(RHS, RM);
5925 case clang::X86::BI__builtin_ia32_addsubpd:
5926 case clang::X86::BI__builtin_ia32_addsubps:
5927 case clang::X86::BI__builtin_ia32_addsubpd256:
5928 case clang::X86::BI__builtin_ia32_addsubps256:
5931 case clang::X86::BI__builtin_ia32_pmuldq128:
5932 case clang::X86::BI__builtin_ia32_pmuldq256:
5933 case clang::X86::BI__builtin_ia32_pmuldq512:
5938 return llvm::APIntOps::mulsExtended(LoLHS, LoRHS);
5941 case clang::X86::BI__builtin_ia32_pmuludq128:
5942 case clang::X86::BI__builtin_ia32_pmuludq256:
5943 case clang::X86::BI__builtin_ia32_pmuludq512:
5948 return llvm::APIntOps::muluExtended(LoLHS, LoRHS);
5951 case clang::X86::BI__builtin_ia32_pclmulqdq128:
5952 case clang::X86::BI__builtin_ia32_pclmulqdq256:
5953 case clang::X86::BI__builtin_ia32_pclmulqdq512:
5955 case Builtin::BI__builtin_elementwise_clmul:
5957 llvm::APIntOps::clmul);
5959 case Builtin::BI__builtin_elementwise_fma:
5963 llvm::RoundingMode RM) {
5965 F.fusedMultiplyAdd(Y, Z, RM);
5969 case X86::BI__builtin_ia32_vpmadd52luq128:
5970 case X86::BI__builtin_ia32_vpmadd52luq256:
5971 case X86::BI__builtin_ia32_vpmadd52luq512:
5974 return A + (B.trunc(52) *
C.trunc(52)).zext(64);
5976 case X86::BI__builtin_ia32_vpmadd52huq128:
5977 case X86::BI__builtin_ia32_vpmadd52huq256:
5978 case X86::BI__builtin_ia32_vpmadd52huq512:
5981 return A + llvm::APIntOps::mulhu(B.trunc(52),
C.trunc(52)).zext(64);
5984 case X86::BI__builtin_ia32_vpshldd128:
5985 case X86::BI__builtin_ia32_vpshldd256:
5986 case X86::BI__builtin_ia32_vpshldd512:
5987 case X86::BI__builtin_ia32_vpshldq128:
5988 case X86::BI__builtin_ia32_vpshldq256:
5989 case X86::BI__builtin_ia32_vpshldq512:
5990 case X86::BI__builtin_ia32_vpshldw128:
5991 case X86::BI__builtin_ia32_vpshldw256:
5992 case X86::BI__builtin_ia32_vpshldw512:
5996 return llvm::APIntOps::fshl(Hi, Lo, Amt);
5999 case X86::BI__builtin_ia32_vpshrdd128:
6000 case X86::BI__builtin_ia32_vpshrdd256:
6001 case X86::BI__builtin_ia32_vpshrdd512:
6002 case X86::BI__builtin_ia32_vpshrdq128:
6003 case X86::BI__builtin_ia32_vpshrdq256:
6004 case X86::BI__builtin_ia32_vpshrdq512:
6005 case X86::BI__builtin_ia32_vpshrdw128:
6006 case X86::BI__builtin_ia32_vpshrdw256:
6007 case X86::BI__builtin_ia32_vpshrdw512:
6012 return llvm::APIntOps::fshr(Hi, Lo, Amt);
6014 case X86::BI__builtin_ia32_vpconflictsi_128:
6015 case X86::BI__builtin_ia32_vpconflictsi_256:
6016 case X86::BI__builtin_ia32_vpconflictsi_512:
6017 case X86::BI__builtin_ia32_vpconflictdi_128:
6018 case X86::BI__builtin_ia32_vpconflictdi_256:
6019 case X86::BI__builtin_ia32_vpconflictdi_512:
6021 case X86::BI__builtin_ia32_compressdf128_mask:
6022 case X86::BI__builtin_ia32_compressdf256_mask:
6023 case X86::BI__builtin_ia32_compressdf512_mask:
6024 case X86::BI__builtin_ia32_compressdi128_mask:
6025 case X86::BI__builtin_ia32_compressdi256_mask:
6026 case X86::BI__builtin_ia32_compressdi512_mask:
6027 case X86::BI__builtin_ia32_compresshi128_mask:
6028 case X86::BI__builtin_ia32_compresshi256_mask:
6029 case X86::BI__builtin_ia32_compresshi512_mask:
6030 case X86::BI__builtin_ia32_compressqi128_mask:
6031 case X86::BI__builtin_ia32_compressqi256_mask:
6032 case X86::BI__builtin_ia32_compressqi512_mask:
6033 case X86::BI__builtin_ia32_compresssf128_mask:
6034 case X86::BI__builtin_ia32_compresssf256_mask:
6035 case X86::BI__builtin_ia32_compresssf512_mask:
6036 case X86::BI__builtin_ia32_compresssi128_mask:
6037 case X86::BI__builtin_ia32_compresssi256_mask:
6038 case X86::BI__builtin_ia32_compresssi512_mask: {
6040 Call->getArg(0)->getType()->castAs<
VectorType>()->getNumElements();
6042 S, OpPC,
Call, [NumElems](
unsigned DstIdx,
const APInt &ShuffleMask) {
6043 APInt CompressMask = ShuffleMask.trunc(NumElems);
6044 if (DstIdx < CompressMask.popcount()) {
6045 while (DstIdx != 0) {
6046 CompressMask = CompressMask & (CompressMask - 1);
6049 return std::pair<unsigned, int>{
6050 0,
static_cast<int>(CompressMask.countr_zero())};
6052 return std::pair<unsigned, int>{1,
static_cast<int>(DstIdx)};
6055 case X86::BI__builtin_ia32_expanddf128_mask:
6056 case X86::BI__builtin_ia32_expanddf256_mask:
6057 case X86::BI__builtin_ia32_expanddf512_mask:
6058 case X86::BI__builtin_ia32_expanddi128_mask:
6059 case X86::BI__builtin_ia32_expanddi256_mask:
6060 case X86::BI__builtin_ia32_expanddi512_mask:
6061 case X86::BI__builtin_ia32_expandhi128_mask:
6062 case X86::BI__builtin_ia32_expandhi256_mask:
6063 case X86::BI__builtin_ia32_expandhi512_mask:
6064 case X86::BI__builtin_ia32_expandqi128_mask:
6065 case X86::BI__builtin_ia32_expandqi256_mask:
6066 case X86::BI__builtin_ia32_expandqi512_mask:
6067 case X86::BI__builtin_ia32_expandsf128_mask:
6068 case X86::BI__builtin_ia32_expandsf256_mask:
6069 case X86::BI__builtin_ia32_expandsf512_mask:
6070 case X86::BI__builtin_ia32_expandsi128_mask:
6071 case X86::BI__builtin_ia32_expandsi256_mask:
6072 case X86::BI__builtin_ia32_expandsi512_mask: {
6074 S, OpPC,
Call, [](
unsigned DstIdx,
const APInt &ShuffleMask) {
6077 APInt ExpandMask = ShuffleMask.trunc(DstIdx + 1);
6078 if (ExpandMask[DstIdx]) {
6079 int SrcIdx = ExpandMask.popcount() - 1;
6080 return std::pair<unsigned, int>{0, SrcIdx};
6082 return std::pair<unsigned, int>{1,
static_cast<int>(DstIdx)};
6085 case clang::X86::BI__builtin_ia32_blendpd:
6086 case clang::X86::BI__builtin_ia32_blendpd256:
6087 case clang::X86::BI__builtin_ia32_blendps:
6088 case clang::X86::BI__builtin_ia32_blendps256:
6089 case clang::X86::BI__builtin_ia32_pblendw128:
6090 case clang::X86::BI__builtin_ia32_pblendw256:
6091 case clang::X86::BI__builtin_ia32_pblendd128:
6092 case clang::X86::BI__builtin_ia32_pblendd256:
6094 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6096 unsigned MaskBit = (ShuffleMask >> (DstIdx % 8)) & 0x1;
6097 unsigned SrcVecIdx = MaskBit ? 1 : 0;
6098 return std::pair<unsigned, int>{SrcVecIdx,
static_cast<int>(DstIdx)};
6103 case clang::X86::BI__builtin_ia32_blendvpd:
6104 case clang::X86::BI__builtin_ia32_blendvpd256:
6105 case clang::X86::BI__builtin_ia32_blendvps:
6106 case clang::X86::BI__builtin_ia32_blendvps256:
6110 llvm::RoundingMode) {
return C.isNegative() ?
T : F; });
6112 case clang::X86::BI__builtin_ia32_pblendvb128:
6113 case clang::X86::BI__builtin_ia32_pblendvb256:
6116 return ((
APInt)
C).isNegative() ?
T : F;
6118 case X86::BI__builtin_ia32_ptestz128:
6119 case X86::BI__builtin_ia32_ptestz256:
6120 case X86::BI__builtin_ia32_vtestzps:
6121 case X86::BI__builtin_ia32_vtestzps256:
6122 case X86::BI__builtin_ia32_vtestzpd:
6123 case X86::BI__builtin_ia32_vtestzpd256:
6126 [](
const APInt &A,
const APInt &B) {
return (A & B) == 0; });
6127 case X86::BI__builtin_ia32_ptestc128:
6128 case X86::BI__builtin_ia32_ptestc256:
6129 case X86::BI__builtin_ia32_vtestcps:
6130 case X86::BI__builtin_ia32_vtestcps256:
6131 case X86::BI__builtin_ia32_vtestcpd:
6132 case X86::BI__builtin_ia32_vtestcpd256:
6135 [](
const APInt &A,
const APInt &B) {
return (~A & B) == 0; });
6136 case X86::BI__builtin_ia32_ptestnzc128:
6137 case X86::BI__builtin_ia32_ptestnzc256:
6138 case X86::BI__builtin_ia32_vtestnzcps:
6139 case X86::BI__builtin_ia32_vtestnzcps256:
6140 case X86::BI__builtin_ia32_vtestnzcpd:
6141 case X86::BI__builtin_ia32_vtestnzcpd256:
6144 return ((A & B) != 0) && ((~A & B) != 0);
6146 case X86::BI__builtin_ia32_selectb_128:
6147 case X86::BI__builtin_ia32_selectb_256:
6148 case X86::BI__builtin_ia32_selectb_512:
6149 case X86::BI__builtin_ia32_selectw_128:
6150 case X86::BI__builtin_ia32_selectw_256:
6151 case X86::BI__builtin_ia32_selectw_512:
6152 case X86::BI__builtin_ia32_selectd_128:
6153 case X86::BI__builtin_ia32_selectd_256:
6154 case X86::BI__builtin_ia32_selectd_512:
6155 case X86::BI__builtin_ia32_selectq_128:
6156 case X86::BI__builtin_ia32_selectq_256:
6157 case X86::BI__builtin_ia32_selectq_512:
6158 case X86::BI__builtin_ia32_selectph_128:
6159 case X86::BI__builtin_ia32_selectph_256:
6160 case X86::BI__builtin_ia32_selectph_512:
6161 case X86::BI__builtin_ia32_selectpbf_128:
6162 case X86::BI__builtin_ia32_selectpbf_256:
6163 case X86::BI__builtin_ia32_selectpbf_512:
6164 case X86::BI__builtin_ia32_selectps_128:
6165 case X86::BI__builtin_ia32_selectps_256:
6166 case X86::BI__builtin_ia32_selectps_512:
6167 case X86::BI__builtin_ia32_selectpd_128:
6168 case X86::BI__builtin_ia32_selectpd_256:
6169 case X86::BI__builtin_ia32_selectpd_512:
6172 case X86::BI__builtin_ia32_shufps:
6173 case X86::BI__builtin_ia32_shufps256:
6174 case X86::BI__builtin_ia32_shufps512:
6176 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6177 unsigned NumElemPerLane = 4;
6178 unsigned NumSelectableElems = NumElemPerLane / 2;
6179 unsigned BitsPerElem = 2;
6180 unsigned IndexMask = 0x3;
6181 unsigned MaskBits = 8;
6182 unsigned Lane = DstIdx / NumElemPerLane;
6183 unsigned ElemInLane = DstIdx % NumElemPerLane;
6184 unsigned LaneOffset = Lane * NumElemPerLane;
6185 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
6186 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
6187 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
6188 return std::pair<unsigned, int>{SrcIdx,
6189 static_cast<int>(LaneOffset + Index)};
6191 case X86::BI__builtin_ia32_shufpd:
6192 case X86::BI__builtin_ia32_shufpd256:
6193 case X86::BI__builtin_ia32_shufpd512:
6195 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6196 unsigned NumElemPerLane = 2;
6197 unsigned NumSelectableElems = NumElemPerLane / 2;
6198 unsigned BitsPerElem = 1;
6199 unsigned IndexMask = 0x1;
6200 unsigned MaskBits = 8;
6201 unsigned Lane = DstIdx / NumElemPerLane;
6202 unsigned ElemInLane = DstIdx % NumElemPerLane;
6203 unsigned LaneOffset = Lane * NumElemPerLane;
6204 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
6205 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
6206 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
6207 return std::pair<unsigned, int>{SrcIdx,
6208 static_cast<int>(LaneOffset + Index)};
6211 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v16qi:
6212 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v32qi:
6213 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v64qi:
6215 case X86::BI__builtin_ia32_vgf2p8affineqb_v16qi:
6216 case X86::BI__builtin_ia32_vgf2p8affineqb_v32qi:
6217 case X86::BI__builtin_ia32_vgf2p8affineqb_v64qi:
6220 case X86::BI__builtin_ia32_vgf2p8mulb_v16qi:
6221 case X86::BI__builtin_ia32_vgf2p8mulb_v32qi:
6222 case X86::BI__builtin_ia32_vgf2p8mulb_v64qi:
6225 case X86::BI__builtin_ia32_bmacor16x16x16_v16hi:
6226 case X86::BI__builtin_ia32_bmacor16x16x16_v32hi:
6228 case X86::BI__builtin_ia32_bmacxor16x16x16_v16hi:
6229 case X86::BI__builtin_ia32_bmacxor16x16x16_v32hi:
6232 case X86::BI__builtin_ia32_insertps128:
6234 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Mask) {
6236 if ((Mask & (1 << DstIdx)) != 0) {
6237 return std::pair<unsigned, int>{0, -1};
6241 unsigned SrcElem = (Mask >> 6) & 0x3;
6242 unsigned DstElem = (Mask >> 4) & 0x3;
6243 if (DstIdx == DstElem) {
6245 return std::pair<unsigned, int>{1,
static_cast<int>(SrcElem)};
6248 return std::pair<unsigned, int>{0,
static_cast<int>(DstIdx)};
6251 case X86::BI__builtin_ia32_permvarsi256:
6252 case X86::BI__builtin_ia32_permvarsf256:
6253 case X86::BI__builtin_ia32_permvardf512:
6254 case X86::BI__builtin_ia32_permvardi512:
6255 case X86::BI__builtin_ia32_permvarhi128:
6257 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6258 int Offset = ShuffleMask & 0x7;
6259 return std::pair<unsigned, int>{0, Offset};
6261 case X86::BI__builtin_ia32_permvarqi128:
6262 case X86::BI__builtin_ia32_permvarhi256:
6263 case X86::BI__builtin_ia32_permvarsi512:
6264 case X86::BI__builtin_ia32_permvarsf512:
6266 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6267 int Offset = ShuffleMask & 0xF;
6268 return std::pair<unsigned, int>{0, Offset};
6270 case X86::BI__builtin_ia32_permvardi256:
6271 case X86::BI__builtin_ia32_permvardf256:
6273 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6274 int Offset = ShuffleMask & 0x3;
6275 return std::pair<unsigned, int>{0, Offset};
6277 case X86::BI__builtin_ia32_permvarqi256:
6278 case X86::BI__builtin_ia32_permvarhi512:
6280 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6281 int Offset = ShuffleMask & 0x1F;
6282 return std::pair<unsigned, int>{0, Offset};
6284 case X86::BI__builtin_ia32_permvarqi512:
6286 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6287 int Offset = ShuffleMask & 0x3F;
6288 return std::pair<unsigned, int>{0, Offset};
6290 case X86::BI__builtin_ia32_vpermi2varq128:
6291 case X86::BI__builtin_ia32_vpermi2varpd128:
6293 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6294 int Offset = ShuffleMask & 0x1;
6295 unsigned SrcIdx = (ShuffleMask >> 1) & 0x1;
6296 return std::pair<unsigned, int>{SrcIdx, Offset};
6298 case X86::BI__builtin_ia32_vpermi2vard128:
6299 case X86::BI__builtin_ia32_vpermi2varps128:
6300 case X86::BI__builtin_ia32_vpermi2varq256:
6301 case X86::BI__builtin_ia32_vpermi2varpd256:
6303 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6304 int Offset = ShuffleMask & 0x3;
6305 unsigned SrcIdx = (ShuffleMask >> 2) & 0x1;
6306 return std::pair<unsigned, int>{SrcIdx, Offset};
6308 case X86::BI__builtin_ia32_vpermi2varhi128:
6309 case X86::BI__builtin_ia32_vpermi2vard256:
6310 case X86::BI__builtin_ia32_vpermi2varps256:
6311 case X86::BI__builtin_ia32_vpermi2varq512:
6312 case X86::BI__builtin_ia32_vpermi2varpd512:
6314 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6315 int Offset = ShuffleMask & 0x7;
6316 unsigned SrcIdx = (ShuffleMask >> 3) & 0x1;
6317 return std::pair<unsigned, int>{SrcIdx, Offset};
6319 case X86::BI__builtin_ia32_vpermi2varqi128:
6320 case X86::BI__builtin_ia32_vpermi2varhi256:
6321 case X86::BI__builtin_ia32_vpermi2vard512:
6322 case X86::BI__builtin_ia32_vpermi2varps512:
6324 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6325 int Offset = ShuffleMask & 0xF;
6326 unsigned SrcIdx = (ShuffleMask >> 4) & 0x1;
6327 return std::pair<unsigned, int>{SrcIdx, Offset};
6329 case X86::BI__builtin_ia32_vpermi2varqi256:
6330 case X86::BI__builtin_ia32_vpermi2varhi512:
6332 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6333 int Offset = ShuffleMask & 0x1F;
6334 unsigned SrcIdx = (ShuffleMask >> 5) & 0x1;
6335 return std::pair<unsigned, int>{SrcIdx, Offset};
6337 case X86::BI__builtin_ia32_vpermi2varqi512:
6339 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6340 int Offset = ShuffleMask & 0x3F;
6341 unsigned SrcIdx = (ShuffleMask >> 6) & 0x1;
6342 return std::pair<unsigned, int>{SrcIdx, Offset};
6344 case X86::BI__builtin_ia32_vperm2f128_pd256:
6345 case X86::BI__builtin_ia32_vperm2f128_ps256:
6346 case X86::BI__builtin_ia32_vperm2f128_si256:
6347 case X86::BI__builtin_ia32_permti256: {
6348 unsigned NumElements =
6349 Call->getArg(0)->getType()->castAs<
VectorType>()->getNumElements();
6350 unsigned PreservedBitsCnt = NumElements >> 2;
6353 [PreservedBitsCnt](
unsigned DstIdx,
unsigned ShuffleMask) {
6354 unsigned ControlBitsCnt = DstIdx >> PreservedBitsCnt << 2;
6355 unsigned ControlBits = ShuffleMask >> ControlBitsCnt;
6357 if (ControlBits & 0b1000)
6358 return std::make_pair(0u, -1);
6360 unsigned SrcVecIdx = (ControlBits & 0b10) >> 1;
6361 unsigned PreservedBitsMask = (1 << PreservedBitsCnt) - 1;
6362 int SrcIdx = ((ControlBits & 0b1) << PreservedBitsCnt) |
6363 (DstIdx & PreservedBitsMask);
6364 return std::make_pair(SrcVecIdx, SrcIdx);
6367 case X86::BI__builtin_ia32_pshufb128:
6368 case X86::BI__builtin_ia32_pshufb256:
6369 case X86::BI__builtin_ia32_pshufb512:
6371 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6372 uint8_t Ctlb =
static_cast<uint8_t
>(ShuffleMask);
6374 return std::make_pair(0, -1);
6376 unsigned LaneBase = (DstIdx / 16) * 16;
6377 unsigned SrcOffset = Ctlb & 0x0F;
6378 unsigned SrcIdx = LaneBase + SrcOffset;
6379 return std::make_pair(0,
static_cast<int>(SrcIdx));
6382 case X86::BI__builtin_ia32_pshuflw:
6383 case X86::BI__builtin_ia32_pshuflw256:
6384 case X86::BI__builtin_ia32_pshuflw512:
6386 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6387 unsigned LaneBase = (DstIdx / 8) * 8;
6388 unsigned LaneIdx = DstIdx % 8;
6390 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
6391 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
6394 return std::make_pair(0,
static_cast<int>(DstIdx));
6397 case X86::BI__builtin_ia32_pshufhw:
6398 case X86::BI__builtin_ia32_pshufhw256:
6399 case X86::BI__builtin_ia32_pshufhw512:
6401 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6402 unsigned LaneBase = (DstIdx / 8) * 8;
6403 unsigned LaneIdx = DstIdx % 8;
6405 unsigned Sel = (ShuffleMask >> (2 * (LaneIdx - 4))) & 0x3;
6406 return std::make_pair(0,
static_cast<int>(LaneBase + 4 + Sel));
6409 return std::make_pair(0,
static_cast<int>(DstIdx));
6412 case X86::BI__builtin_ia32_pshufd:
6413 case X86::BI__builtin_ia32_pshufd256:
6414 case X86::BI__builtin_ia32_pshufd512:
6415 case X86::BI__builtin_ia32_vpermilps:
6416 case X86::BI__builtin_ia32_vpermilps256:
6417 case X86::BI__builtin_ia32_vpermilps512:
6419 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6420 unsigned LaneBase = (DstIdx / 4) * 4;
6421 unsigned LaneIdx = DstIdx % 4;
6422 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
6423 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
6426 case X86::BI__builtin_ia32_vpermilvarpd:
6427 case X86::BI__builtin_ia32_vpermilvarpd256:
6428 case X86::BI__builtin_ia32_vpermilvarpd512:
6430 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6431 unsigned NumElemPerLane = 2;
6432 unsigned Lane = DstIdx / NumElemPerLane;
6433 unsigned Offset = ShuffleMask & 0b10 ? 1 : 0;
6434 return std::make_pair(
6435 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
6438 case X86::BI__builtin_ia32_vpermilvarps:
6439 case X86::BI__builtin_ia32_vpermilvarps256:
6440 case X86::BI__builtin_ia32_vpermilvarps512:
6442 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6443 unsigned NumElemPerLane = 4;
6444 unsigned Lane = DstIdx / NumElemPerLane;
6445 unsigned Offset = ShuffleMask & 0b11;
6446 return std::make_pair(
6447 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
6450 case X86::BI__builtin_ia32_vpermilpd:
6451 case X86::BI__builtin_ia32_vpermilpd256:
6452 case X86::BI__builtin_ia32_vpermilpd512:
6454 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Control) {
6455 unsigned NumElemPerLane = 2;
6456 unsigned BitsPerElem = 1;
6457 unsigned MaskBits = 8;
6458 unsigned IndexMask = 0x1;
6459 unsigned Lane = DstIdx / NumElemPerLane;
6460 unsigned LaneOffset = Lane * NumElemPerLane;
6461 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
6462 unsigned Index = (Control >> BitIndex) & IndexMask;
6463 return std::make_pair(0,
static_cast<int>(LaneOffset + Index));
6466 case X86::BI__builtin_ia32_permdf256:
6467 case X86::BI__builtin_ia32_permdi256:
6469 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Control) {
6472 unsigned Index = (Control >> (2 * DstIdx)) & 0x3;
6473 return std::make_pair(0,
static_cast<int>(Index));
6476 case X86::BI__builtin_ia32_vpmultishiftqb128:
6477 case X86::BI__builtin_ia32_vpmultishiftqb256:
6478 case X86::BI__builtin_ia32_vpmultishiftqb512:
6480 case X86::BI__builtin_ia32_kandqi:
6481 case X86::BI__builtin_ia32_kandhi:
6482 case X86::BI__builtin_ia32_kandsi:
6483 case X86::BI__builtin_ia32_kanddi:
6486 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS & RHS; });
6488 case X86::BI__builtin_ia32_kandnqi:
6489 case X86::BI__builtin_ia32_kandnhi:
6490 case X86::BI__builtin_ia32_kandnsi:
6491 case X86::BI__builtin_ia32_kandndi:
6494 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~LHS & RHS; });
6496 case X86::BI__builtin_ia32_korqi:
6497 case X86::BI__builtin_ia32_korhi:
6498 case X86::BI__builtin_ia32_korsi:
6499 case X86::BI__builtin_ia32_kordi:
6502 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS | RHS; });
6504 case X86::BI__builtin_ia32_kxnorqi:
6505 case X86::BI__builtin_ia32_kxnorhi:
6506 case X86::BI__builtin_ia32_kxnorsi:
6507 case X86::BI__builtin_ia32_kxnordi:
6510 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~(LHS ^ RHS); });
6512 case X86::BI__builtin_ia32_kxorqi:
6513 case X86::BI__builtin_ia32_kxorhi:
6514 case X86::BI__builtin_ia32_kxorsi:
6515 case X86::BI__builtin_ia32_kxordi:
6518 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS ^ RHS; });
6520 case X86::BI__builtin_ia32_knotqi:
6521 case X86::BI__builtin_ia32_knothi:
6522 case X86::BI__builtin_ia32_knotsi:
6523 case X86::BI__builtin_ia32_knotdi:
6525 S, OpPC,
Call, [](
const APSInt &Src) {
return ~Src; });
6527 case X86::BI__builtin_ia32_kaddqi:
6528 case X86::BI__builtin_ia32_kaddhi:
6529 case X86::BI__builtin_ia32_kaddsi:
6530 case X86::BI__builtin_ia32_kadddi:
6533 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
6535 case X86::BI__builtin_ia32_kmovb:
6536 case X86::BI__builtin_ia32_kmovw:
6537 case X86::BI__builtin_ia32_kmovd:
6538 case X86::BI__builtin_ia32_kmovq:
6540 S, OpPC,
Call, [](
const APSInt &Src) {
return Src; });
6542 case X86::BI__builtin_ia32_kunpckhi:
6543 case X86::BI__builtin_ia32_kunpckdi:
6544 case X86::BI__builtin_ia32_kunpcksi:
6549 unsigned BW = A.getBitWidth();
6550 return APSInt(A.trunc(BW / 2).concat(B.trunc(BW / 2)),
6554 case X86::BI__builtin_ia32_phminposuw128:
6557 case X86::BI__builtin_ia32_psraq128:
6558 case X86::BI__builtin_ia32_psraq256:
6559 case X86::BI__builtin_ia32_psraq512:
6560 case X86::BI__builtin_ia32_psrad128:
6561 case X86::BI__builtin_ia32_psrad256:
6562 case X86::BI__builtin_ia32_psrad512:
6563 case X86::BI__builtin_ia32_psraw128:
6564 case X86::BI__builtin_ia32_psraw256:
6565 case X86::BI__builtin_ia32_psraw512:
6568 [](
const APInt &Elt, uint64_t Count) {
return Elt.ashr(Count); },
6569 [](
const APInt &Elt,
unsigned Width) {
return Elt.ashr(Width - 1); });
6571 case X86::BI__builtin_ia32_psllq128:
6572 case X86::BI__builtin_ia32_psllq256:
6573 case X86::BI__builtin_ia32_psllq512:
6574 case X86::BI__builtin_ia32_pslld128:
6575 case X86::BI__builtin_ia32_pslld256:
6576 case X86::BI__builtin_ia32_pslld512:
6577 case X86::BI__builtin_ia32_psllw128:
6578 case X86::BI__builtin_ia32_psllw256:
6579 case X86::BI__builtin_ia32_psllw512:
6582 [](
const APInt &Elt, uint64_t Count) {
return Elt.shl(Count); },
6583 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
6585 case X86::BI__builtin_ia32_psrlq128:
6586 case X86::BI__builtin_ia32_psrlq256:
6587 case X86::BI__builtin_ia32_psrlq512:
6588 case X86::BI__builtin_ia32_psrld128:
6589 case X86::BI__builtin_ia32_psrld256:
6590 case X86::BI__builtin_ia32_psrld512:
6591 case X86::BI__builtin_ia32_psrlw128:
6592 case X86::BI__builtin_ia32_psrlw256:
6593 case X86::BI__builtin_ia32_psrlw512:
6596 [](
const APInt &Elt, uint64_t Count) {
return Elt.lshr(Count); },
6597 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
6599 case X86::BI__builtin_ia32_pternlogd128_mask:
6600 case X86::BI__builtin_ia32_pternlogd256_mask:
6601 case X86::BI__builtin_ia32_pternlogd512_mask:
6602 case X86::BI__builtin_ia32_pternlogq128_mask:
6603 case X86::BI__builtin_ia32_pternlogq256_mask:
6604 case X86::BI__builtin_ia32_pternlogq512_mask:
6606 case X86::BI__builtin_ia32_pternlogd128_maskz:
6607 case X86::BI__builtin_ia32_pternlogd256_maskz:
6608 case X86::BI__builtin_ia32_pternlogd512_maskz:
6609 case X86::BI__builtin_ia32_pternlogq128_maskz:
6610 case X86::BI__builtin_ia32_pternlogq256_maskz:
6611 case X86::BI__builtin_ia32_pternlogq512_maskz:
6613 case Builtin::BI__builtin_elementwise_fshl:
6615 llvm::APIntOps::fshl);
6616 case Builtin::BI__builtin_elementwise_fshr:
6618 llvm::APIntOps::fshr);
6620 case X86::BI__builtin_ia32_shuf_f32x4_256:
6621 case X86::BI__builtin_ia32_shuf_i32x4_256:
6622 case X86::BI__builtin_ia32_shuf_f64x2_256:
6623 case X86::BI__builtin_ia32_shuf_i64x2_256:
6624 case X86::BI__builtin_ia32_shuf_f32x4:
6625 case X86::BI__builtin_ia32_shuf_i32x4:
6626 case X86::BI__builtin_ia32_shuf_f64x2:
6627 case X86::BI__builtin_ia32_shuf_i64x2: {
6633 unsigned LaneBits = 128u;
6634 unsigned NumLanes = (NumElems * ElemBits) / LaneBits;
6635 unsigned NumElemsPerLane = LaneBits / ElemBits;
6639 [NumLanes, NumElemsPerLane](
unsigned DstIdx,
unsigned ShuffleMask) {
6641 unsigned BitsPerElem = NumLanes / 2;
6642 unsigned IndexMask = (1u << BitsPerElem) - 1;
6643 unsigned Lane = DstIdx / NumElemsPerLane;
6644 unsigned SrcIdx = (Lane < NumLanes / 2) ? 0 : 1;
6645 unsigned BitIdx = BitsPerElem * Lane;
6646 unsigned SrcLaneIdx = (ShuffleMask >> BitIdx) & IndexMask;
6647 unsigned ElemInLane = DstIdx % NumElemsPerLane;
6648 unsigned IdxToPick = SrcLaneIdx * NumElemsPerLane + ElemInLane;
6649 return std::pair<unsigned, int>{SrcIdx, IdxToPick};
6653 case X86::BI__builtin_ia32_insertf32x4_256:
6654 case X86::BI__builtin_ia32_inserti32x4_256:
6655 case X86::BI__builtin_ia32_insertf64x2_256:
6656 case X86::BI__builtin_ia32_inserti64x2_256:
6657 case X86::BI__builtin_ia32_insertf32x4:
6658 case X86::BI__builtin_ia32_inserti32x4:
6659 case X86::BI__builtin_ia32_insertf64x2_512:
6660 case X86::BI__builtin_ia32_inserti64x2_512:
6661 case X86::BI__builtin_ia32_insertf32x8:
6662 case X86::BI__builtin_ia32_inserti32x8:
6663 case X86::BI__builtin_ia32_insertf64x4:
6664 case X86::BI__builtin_ia32_inserti64x4:
6665 case X86::BI__builtin_ia32_vinsertf128_ps256:
6666 case X86::BI__builtin_ia32_vinsertf128_pd256:
6667 case X86::BI__builtin_ia32_vinsertf128_si256:
6668 case X86::BI__builtin_ia32_insert128i256:
6671 case clang::X86::BI__builtin_ia32_vcvtps2ph:
6672 case clang::X86::BI__builtin_ia32_vcvtps2ph256:
6675 case X86::BI__builtin_ia32_vec_ext_v4hi:
6676 case X86::BI__builtin_ia32_vec_ext_v16qi:
6677 case X86::BI__builtin_ia32_vec_ext_v8hi:
6678 case X86::BI__builtin_ia32_vec_ext_v4si:
6679 case X86::BI__builtin_ia32_vec_ext_v2di:
6680 case X86::BI__builtin_ia32_vec_ext_v32qi:
6681 case X86::BI__builtin_ia32_vec_ext_v16hi:
6682 case X86::BI__builtin_ia32_vec_ext_v8si:
6683 case X86::BI__builtin_ia32_vec_ext_v4di:
6684 case X86::BI__builtin_ia32_vec_ext_v4sf:
6687 case X86::BI__builtin_ia32_vec_set_v4hi:
6688 case X86::BI__builtin_ia32_vec_set_v16qi:
6689 case X86::BI__builtin_ia32_vec_set_v8hi:
6690 case X86::BI__builtin_ia32_vec_set_v4si:
6691 case X86::BI__builtin_ia32_vec_set_v2di:
6692 case X86::BI__builtin_ia32_vec_set_v32qi:
6693 case X86::BI__builtin_ia32_vec_set_v16hi:
6694 case X86::BI__builtin_ia32_vec_set_v8si:
6695 case X86::BI__builtin_ia32_vec_set_v4di:
6698 case X86::BI__builtin_ia32_cvtb2mask128:
6699 case X86::BI__builtin_ia32_cvtb2mask256:
6700 case X86::BI__builtin_ia32_cvtb2mask512:
6701 case X86::BI__builtin_ia32_cvtw2mask128:
6702 case X86::BI__builtin_ia32_cvtw2mask256:
6703 case X86::BI__builtin_ia32_cvtw2mask512:
6704 case X86::BI__builtin_ia32_cvtd2mask128:
6705 case X86::BI__builtin_ia32_cvtd2mask256:
6706 case X86::BI__builtin_ia32_cvtd2mask512:
6707 case X86::BI__builtin_ia32_cvtq2mask128:
6708 case X86::BI__builtin_ia32_cvtq2mask256:
6709 case X86::BI__builtin_ia32_cvtq2mask512:
6712 case X86::BI__builtin_ia32_cvtmask2b128:
6713 case X86::BI__builtin_ia32_cvtmask2b256:
6714 case X86::BI__builtin_ia32_cvtmask2b512:
6715 case X86::BI__builtin_ia32_cvtmask2w128:
6716 case X86::BI__builtin_ia32_cvtmask2w256:
6717 case X86::BI__builtin_ia32_cvtmask2w512:
6718 case X86::BI__builtin_ia32_cvtmask2d128:
6719 case X86::BI__builtin_ia32_cvtmask2d256:
6720 case X86::BI__builtin_ia32_cvtmask2d512:
6721 case X86::BI__builtin_ia32_cvtmask2q128:
6722 case X86::BI__builtin_ia32_cvtmask2q256:
6723 case X86::BI__builtin_ia32_cvtmask2q512:
6726 case X86::BI__builtin_ia32_cvtsd2ss:
6729 case X86::BI__builtin_ia32_cvtsd2ss_round_mask:
6732 case X86::BI__builtin_ia32_cvtpd2ps:
6733 case X86::BI__builtin_ia32_cvtpd2ps256:
6735 case X86::BI__builtin_ia32_cvtpd2ps_mask:
6737 case X86::BI__builtin_ia32_cvtpd2ps512_mask:
6740 case X86::BI__builtin_ia32_cmpb128_mask:
6741 case X86::BI__builtin_ia32_cmpw128_mask:
6742 case X86::BI__builtin_ia32_cmpd128_mask:
6743 case X86::BI__builtin_ia32_cmpq128_mask:
6744 case X86::BI__builtin_ia32_cmpb256_mask:
6745 case X86::BI__builtin_ia32_cmpw256_mask:
6746 case X86::BI__builtin_ia32_cmpd256_mask:
6747 case X86::BI__builtin_ia32_cmpq256_mask:
6748 case X86::BI__builtin_ia32_cmpb512_mask:
6749 case X86::BI__builtin_ia32_cmpw512_mask:
6750 case X86::BI__builtin_ia32_cmpd512_mask:
6751 case X86::BI__builtin_ia32_cmpq512_mask:
6755 case X86::BI__builtin_ia32_ucmpb128_mask:
6756 case X86::BI__builtin_ia32_ucmpw128_mask:
6757 case X86::BI__builtin_ia32_ucmpd128_mask:
6758 case X86::BI__builtin_ia32_ucmpq128_mask:
6759 case X86::BI__builtin_ia32_ucmpb256_mask:
6760 case X86::BI__builtin_ia32_ucmpw256_mask:
6761 case X86::BI__builtin_ia32_ucmpd256_mask:
6762 case X86::BI__builtin_ia32_ucmpq256_mask:
6763 case X86::BI__builtin_ia32_ucmpb512_mask:
6764 case X86::BI__builtin_ia32_ucmpw512_mask:
6765 case X86::BI__builtin_ia32_ucmpd512_mask:
6766 case X86::BI__builtin_ia32_ucmpq512_mask:
6770 case X86::BI__builtin_ia32_vpshufbitqmb128_mask:
6771 case X86::BI__builtin_ia32_vpshufbitqmb256_mask:
6772 case X86::BI__builtin_ia32_vpshufbitqmb512_mask:
6775 case X86::BI__builtin_ia32_pslldqi128_byteshift:
6776 case X86::BI__builtin_ia32_pslldqi256_byteshift:
6777 case X86::BI__builtin_ia32_pslldqi512_byteshift:
6784 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
6785 unsigned LaneBase = (DstIdx / 16) * 16;
6786 unsigned LaneIdx = DstIdx % 16;
6787 if (LaneIdx < Shift)
6788 return std::make_pair(0, -1);
6790 return std::make_pair(0,
6791 static_cast<int>(LaneBase + LaneIdx - Shift));
6794 case X86::BI__builtin_ia32_psrldqi128_byteshift:
6795 case X86::BI__builtin_ia32_psrldqi256_byteshift:
6796 case X86::BI__builtin_ia32_psrldqi512_byteshift:
6803 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
6804 unsigned LaneBase = (DstIdx / 16) * 16;
6805 unsigned LaneIdx = DstIdx % 16;
6806 if (LaneIdx + Shift < 16)
6807 return std::make_pair(0,
6808 static_cast<int>(LaneBase + LaneIdx + Shift));
6810 return std::make_pair(0, -1);
6813 case X86::BI__builtin_ia32_palignr128:
6814 case X86::BI__builtin_ia32_palignr256:
6815 case X86::BI__builtin_ia32_palignr512:
6817 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Shift) {
6819 unsigned VecIdx = 1;
6822 int Lane = DstIdx / 16;
6823 int Offset = DstIdx % 16;
6826 unsigned ShiftedIdx = Offset + (Shift & 0xFF);
6827 if (ShiftedIdx < 16) {
6828 ElemIdx = ShiftedIdx + (Lane * 16);
6829 }
else if (ShiftedIdx < 32) {
6831 ElemIdx = (ShiftedIdx - 16) + (Lane * 16);
6834 return std::pair<unsigned, int>{VecIdx, ElemIdx};
6837 case X86::BI__builtin_ia32_alignd128:
6838 case X86::BI__builtin_ia32_alignd256:
6839 case X86::BI__builtin_ia32_alignd512:
6840 case X86::BI__builtin_ia32_alignq128:
6841 case X86::BI__builtin_ia32_alignq256:
6842 case X86::BI__builtin_ia32_alignq512: {
6843 unsigned NumElems =
Call->getType()->castAs<
VectorType>()->getNumElements();
6845 S, OpPC,
Call, [NumElems](
unsigned DstIdx,
unsigned Shift) {
6846 unsigned Imm = Shift & 0xFF;
6847 unsigned EffectiveShift = Imm & (NumElems - 1);
6848 unsigned SourcePos = DstIdx + EffectiveShift;
6849 unsigned VecIdx = SourcePos < NumElems ? 1u : 0u;
6850 unsigned ElemIdx = SourcePos & (NumElems - 1);
6851 return std::pair<unsigned, int>{VecIdx,
static_cast<int>(ElemIdx)};
6855 case clang::X86::BI__builtin_ia32_minps:
6856 case clang::X86::BI__builtin_ia32_minpd:
6857 case clang::X86::BI__builtin_ia32_minph128:
6858 case clang::X86::BI__builtin_ia32_minph256:
6859 case clang::X86::BI__builtin_ia32_minps256:
6860 case clang::X86::BI__builtin_ia32_minpd256:
6861 case clang::X86::BI__builtin_ia32_minps512:
6862 case clang::X86::BI__builtin_ia32_minpd512:
6863 case clang::X86::BI__builtin_ia32_minph512:
6867 std::optional<APSInt>) -> std::optional<APFloat> {
6868 if (A.isNaN() || A.isInfinity() || A.isDenormal() || B.isNaN() ||
6869 B.isInfinity() || B.isDenormal())
6870 return std::nullopt;
6871 if (A.isZero() && B.isZero())
6873 return llvm::minimum(A, B);
6876 case clang::X86::BI__builtin_ia32_minss:
6877 case clang::X86::BI__builtin_ia32_minsd:
6881 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
6886 case clang::X86::BI__builtin_ia32_minsd_round_mask:
6887 case clang::X86::BI__builtin_ia32_minss_round_mask:
6888 case clang::X86::BI__builtin_ia32_minsh_round_mask:
6889 case clang::X86::BI__builtin_ia32_maxsd_round_mask:
6890 case clang::X86::BI__builtin_ia32_maxss_round_mask:
6891 case clang::X86::BI__builtin_ia32_maxsh_round_mask: {
6892 bool IsMin = BuiltinID == clang::X86::BI__builtin_ia32_minsd_round_mask ||
6893 BuiltinID == clang::X86::BI__builtin_ia32_minss_round_mask ||
6894 BuiltinID == clang::X86::BI__builtin_ia32_minsh_round_mask;
6898 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
6903 case clang::X86::BI__builtin_ia32_maxps:
6904 case clang::X86::BI__builtin_ia32_maxpd:
6905 case clang::X86::BI__builtin_ia32_maxph128:
6906 case clang::X86::BI__builtin_ia32_maxph256:
6907 case clang::X86::BI__builtin_ia32_maxps256:
6908 case clang::X86::BI__builtin_ia32_maxpd256:
6909 case clang::X86::BI__builtin_ia32_maxps512:
6910 case clang::X86::BI__builtin_ia32_maxpd512:
6911 case clang::X86::BI__builtin_ia32_maxph512:
6915 std::optional<APSInt>) -> std::optional<APFloat> {
6916 if (A.isNaN() || A.isInfinity() || A.isDenormal() || B.isNaN() ||
6917 B.isInfinity() || B.isDenormal())
6918 return std::nullopt;
6919 if (A.isZero() && B.isZero())
6921 return llvm::maximum(A, B);
6924 case clang::X86::BI__builtin_ia32_maxss:
6925 case clang::X86::BI__builtin_ia32_maxsd:
6929 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
6933 case X86::BI__builtin_ia32_vpdpwssd128:
6934 case X86::BI__builtin_ia32_vpdpwssd256:
6935 case X86::BI__builtin_ia32_vpdpwssd512:
6936 case X86::BI__builtin_ia32_vpdpbusd128:
6937 case X86::BI__builtin_ia32_vpdpbusd256:
6938 case X86::BI__builtin_ia32_vpdpbusd512:
6940 case X86::BI__builtin_ia32_vpdpwssds128:
6941 case X86::BI__builtin_ia32_vpdpwssds256:
6942 case X86::BI__builtin_ia32_vpdpwssds512:
6943 case X86::BI__builtin_ia32_vpdpbusds128:
6944 case X86::BI__builtin_ia32_vpdpbusds256:
6945 case X86::BI__builtin_ia32_vpdpbusds512:
6947 case X86::BI__builtin_ia32_cvtss2si:
6948 case X86::BI__builtin_ia32_cvtsd2si:
6949 case X86::BI__builtin_ia32_cvttss2si:
6950 case X86::BI__builtin_ia32_cvttsd2si:
6951 case X86::BI__builtin_ia32_cvtss2si64:
6952 case X86::BI__builtin_ia32_cvtsd2si64:
6953 case X86::BI__builtin_ia32_cvttss2si64:
6954 case X86::BI__builtin_ia32_cvttsd2si64:
6956 case X86::BI__builtin_ia32_cvtpd2dq:
6957 case X86::BI__builtin_ia32_cvttpd2dq:
6958 case X86::BI__builtin_ia32_cvtps2dq:
6959 case X86::BI__builtin_ia32_cvtpd2dq256:
6960 case X86::BI__builtin_ia32_cvtps2dq256:
6961 case X86::BI__builtin_ia32_cvttps2dq:
6962 case X86::BI__builtin_ia32_cvttpd2dq256:
6963 case X86::BI__builtin_ia32_cvttps2dq256:
6966 case Builtin::BI__builtin_meta_is_type:
6973 llvm_unreachable(
"Unhandled builtin ID");