4165 uint32_t BuiltinID) {
4170 switch (BuiltinID) {
4171 case Builtin::BI__builtin_is_constant_evaluated:
4174 case Builtin::BI__builtin_assume:
4175 case Builtin::BI__assume:
4178 case Builtin::BI__builtin_strcmp:
4179 case Builtin::BIstrcmp:
4180 case Builtin::BI__builtin_strncmp:
4181 case Builtin::BIstrncmp:
4182 case Builtin::BI__builtin_wcsncmp:
4183 case Builtin::BIwcsncmp:
4184 case Builtin::BI__builtin_wcscmp:
4185 case Builtin::BIwcscmp:
4188 case Builtin::BI__builtin_strlen:
4189 case Builtin::BIstrlen:
4190 case Builtin::BI__builtin_wcslen:
4191 case Builtin::BIwcslen:
4194 case Builtin::BI__builtin_nan:
4195 case Builtin::BI__builtin_nanf:
4196 case Builtin::BI__builtin_nanl:
4197 case Builtin::BI__builtin_nanf16:
4198 case Builtin::BI__builtin_nanf128:
4201 case Builtin::BI__builtin_nans:
4202 case Builtin::BI__builtin_nansf:
4203 case Builtin::BI__builtin_nansl:
4204 case Builtin::BI__builtin_nansf16:
4205 case Builtin::BI__builtin_nansf128:
4208 case Builtin::BI__builtin_huge_val:
4209 case Builtin::BI__builtin_huge_valf:
4210 case Builtin::BI__builtin_huge_vall:
4211 case Builtin::BI__builtin_huge_valf16:
4212 case Builtin::BI__builtin_huge_valf128:
4213 case Builtin::BI__builtin_inf:
4214 case Builtin::BI__builtin_inff:
4215 case Builtin::BI__builtin_infl:
4216 case Builtin::BI__builtin_inff16:
4217 case Builtin::BI__builtin_inff128:
4220 case Builtin::BI__builtin_copysign:
4221 case Builtin::BI__builtin_copysignf:
4222 case Builtin::BI__builtin_copysignl:
4223 case Builtin::BI__builtin_copysignf128:
4226 case Builtin::BI__builtin_fmin:
4227 case Builtin::BI__builtin_fminf:
4228 case Builtin::BI__builtin_fminl:
4229 case Builtin::BI__builtin_fminf16:
4230 case Builtin::BI__builtin_fminf128:
4233 case Builtin::BI__builtin_fminimum_num:
4234 case Builtin::BI__builtin_fminimum_numf:
4235 case Builtin::BI__builtin_fminimum_numl:
4236 case Builtin::BI__builtin_fminimum_numf16:
4237 case Builtin::BI__builtin_fminimum_numf128:
4240 case Builtin::BI__builtin_fmax:
4241 case Builtin::BI__builtin_fmaxf:
4242 case Builtin::BI__builtin_fmaxl:
4243 case Builtin::BI__builtin_fmaxf16:
4244 case Builtin::BI__builtin_fmaxf128:
4247 case Builtin::BI__builtin_fmaximum_num:
4248 case Builtin::BI__builtin_fmaximum_numf:
4249 case Builtin::BI__builtin_fmaximum_numl:
4250 case Builtin::BI__builtin_fmaximum_numf16:
4251 case Builtin::BI__builtin_fmaximum_numf128:
4254 case Builtin::BI__builtin_isnan:
4257 case Builtin::BI__builtin_issignaling:
4260 case Builtin::BI__builtin_isinf:
4263 case Builtin::BI__builtin_isinf_sign:
4266 case Builtin::BI__builtin_isfinite:
4269 case Builtin::BI__builtin_isnormal:
4272 case Builtin::BI__builtin_issubnormal:
4275 case Builtin::BI__builtin_iszero:
4278 case Builtin::BI__builtin_signbit:
4279 case Builtin::BI__builtin_signbitf:
4280 case Builtin::BI__builtin_signbitl:
4283 case Builtin::BI__builtin_isgreater:
4284 case Builtin::BI__builtin_isgreaterequal:
4285 case Builtin::BI__builtin_isless:
4286 case Builtin::BI__builtin_islessequal:
4287 case Builtin::BI__builtin_islessgreater:
4288 case Builtin::BI__builtin_isunordered:
4291 case Builtin::BI__builtin_isfpclass:
4294 case Builtin::BI__builtin_fpclassify:
4297 case Builtin::BI__builtin_fabs:
4298 case Builtin::BI__builtin_fabsf:
4299 case Builtin::BI__builtin_fabsl:
4300 case Builtin::BI__builtin_fabsf128:
4303 case Builtin::BI__builtin_abs:
4304 case Builtin::BI__builtin_labs:
4305 case Builtin::BI__builtin_llabs:
4308 case Builtin::BI__builtin_popcount:
4309 case Builtin::BI__builtin_popcountl:
4310 case Builtin::BI__builtin_popcountll:
4311 case Builtin::BI__builtin_popcountg:
4312 case Builtin::BI__popcnt16:
4313 case Builtin::BI__popcnt:
4314 case Builtin::BI__popcnt64:
4317 case Builtin::BI__builtin_parity:
4318 case Builtin::BI__builtin_parityl:
4319 case Builtin::BI__builtin_parityll:
4322 return APInt(Val.getBitWidth(), Val.popcount() % 2);
4324 case Builtin::BI__builtin_clrsb:
4325 case Builtin::BI__builtin_clrsbl:
4326 case Builtin::BI__builtin_clrsbll:
4329 return APInt(Val.getBitWidth(),
4330 Val.getBitWidth() - Val.getSignificantBits());
4332 case Builtin::BI__builtin_bitreverseg:
4333 case Builtin::BI__builtin_bitreverse8:
4334 case Builtin::BI__builtin_bitreverse16:
4335 case Builtin::BI__builtin_bitreverse32:
4336 case Builtin::BI__builtin_bitreverse64:
4338 S, OpPC,
Call, [](
const APSInt &Val) {
return Val.reverseBits(); });
4340 case Builtin::BI__builtin_classify_type:
4343 case Builtin::BI__builtin_expect:
4344 case Builtin::BI__builtin_expect_with_probability:
4347 case Builtin::BI__builtin_rotateleft8:
4348 case Builtin::BI__builtin_rotateleft16:
4349 case Builtin::BI__builtin_rotateleft32:
4350 case Builtin::BI__builtin_rotateleft64:
4351 case Builtin::BI__builtin_stdc_rotate_left:
4352 case Builtin::BI_rotl8:
4353 case Builtin::BI_rotl16:
4354 case Builtin::BI_rotl:
4355 case Builtin::BI_lrotl:
4356 case Builtin::BI_rotl64:
4357 case Builtin::BI__builtin_rotateright8:
4358 case Builtin::BI__builtin_rotateright16:
4359 case Builtin::BI__builtin_rotateright32:
4360 case Builtin::BI__builtin_rotateright64:
4361 case Builtin::BI__builtin_stdc_rotate_right:
4362 case Builtin::BI_rotr8:
4363 case Builtin::BI_rotr16:
4364 case Builtin::BI_rotr:
4365 case Builtin::BI_lrotr:
4366 case Builtin::BI_rotr64: {
4369 switch (BuiltinID) {
4370 case Builtin::BI__builtin_rotateright8:
4371 case Builtin::BI__builtin_rotateright16:
4372 case Builtin::BI__builtin_rotateright32:
4373 case Builtin::BI__builtin_rotateright64:
4374 case Builtin::BI__builtin_stdc_rotate_right:
4375 case Builtin::BI_rotr8:
4376 case Builtin::BI_rotr16:
4377 case Builtin::BI_rotr:
4378 case Builtin::BI_lrotr:
4379 case Builtin::BI_rotr64:
4380 IsRotateRight =
true;
4383 IsRotateRight =
false;
4390 return IsRotateRight ?
Value.rotr(Amount.getZExtValue())
4391 :
Value.rotl(Amount.getZExtValue());
4395 case Builtin::BI__builtin_ffs:
4396 case Builtin::BI__builtin_ffsl:
4397 case Builtin::BI__builtin_ffsll:
4400 return APInt(Val.getBitWidth(),
4401 Val.isZero() ? 0u : Val.countTrailingZeros() + 1u);
4404 case Builtin::BIaddressof:
4405 case Builtin::BI__addressof:
4406 case Builtin::BI__builtin_addressof:
4410 case Builtin::BIas_const:
4411 case Builtin::BIforward:
4412 case Builtin::BIforward_like:
4413 case Builtin::BImove:
4414 case Builtin::BImove_if_noexcept:
4418 case Builtin::BI__builtin_eh_return_data_regno:
4421 case Builtin::BI__builtin_launder:
4425 case Builtin::BI__builtin_add_overflow:
4426 case Builtin::BI__builtin_sub_overflow:
4427 case Builtin::BI__builtin_mul_overflow:
4428 case Builtin::BI__builtin_sadd_overflow:
4429 case Builtin::BI__builtin_uadd_overflow:
4430 case Builtin::BI__builtin_uaddl_overflow:
4431 case Builtin::BI__builtin_uaddll_overflow:
4432 case Builtin::BI__builtin_usub_overflow:
4433 case Builtin::BI__builtin_usubl_overflow:
4434 case Builtin::BI__builtin_usubll_overflow:
4435 case Builtin::BI__builtin_umul_overflow:
4436 case Builtin::BI__builtin_umull_overflow:
4437 case Builtin::BI__builtin_umulll_overflow:
4438 case Builtin::BI__builtin_saddl_overflow:
4439 case Builtin::BI__builtin_saddll_overflow:
4440 case Builtin::BI__builtin_ssub_overflow:
4441 case Builtin::BI__builtin_ssubl_overflow:
4442 case Builtin::BI__builtin_ssubll_overflow:
4443 case Builtin::BI__builtin_smul_overflow:
4444 case Builtin::BI__builtin_smull_overflow:
4445 case Builtin::BI__builtin_smulll_overflow:
4448 case Builtin::BI__builtin_addcb:
4449 case Builtin::BI__builtin_addcs:
4450 case Builtin::BI__builtin_addc:
4451 case Builtin::BI__builtin_addcl:
4452 case Builtin::BI__builtin_addcll:
4453 case Builtin::BI__builtin_subcb:
4454 case Builtin::BI__builtin_subcs:
4455 case Builtin::BI__builtin_subc:
4456 case Builtin::BI__builtin_subcl:
4457 case Builtin::BI__builtin_subcll:
4460 case Builtin::BI__builtin_clz:
4461 case Builtin::BI__builtin_clzl:
4462 case Builtin::BI__builtin_clzll:
4463 case Builtin::BI__builtin_clzs:
4464 case Builtin::BI__builtin_clzg:
4465 case Builtin::BI__lzcnt16:
4466 case Builtin::BI__lzcnt:
4467 case Builtin::BI__lzcnt64:
4470 case Builtin::BI__builtin_ctz:
4471 case Builtin::BI__builtin_ctzl:
4472 case Builtin::BI__builtin_ctzll:
4473 case Builtin::BI__builtin_ctzs:
4474 case Builtin::BI__builtin_ctzg:
4477 case Builtin::BI__builtin_elementwise_clzg:
4478 case Builtin::BI__builtin_elementwise_ctzg:
4481 case Builtin::BI__builtin_bswapg:
4482 case Builtin::BI__builtin_bswap16:
4483 case Builtin::BI__builtin_bswap32:
4484 case Builtin::BI__builtin_bswap64:
4487 case Builtin::BI__atomic_always_lock_free:
4488 case Builtin::BI__atomic_is_lock_free:
4491 case Builtin::BI__c11_atomic_is_lock_free:
4494 case Builtin::BI__builtin_complex:
4497 case Builtin::BI__builtin_is_aligned:
4498 case Builtin::BI__builtin_align_up:
4499 case Builtin::BI__builtin_align_down:
4502 case Builtin::BI__builtin_assume_aligned:
4505 case clang::X86::BI__builtin_ia32_crc32qi:
4507 case clang::X86::BI__builtin_ia32_crc32hi:
4509 case clang::X86::BI__builtin_ia32_crc32si:
4511 case clang::X86::BI__builtin_ia32_crc32di:
4514 case clang::X86::BI__builtin_ia32_bextr_u32:
4515 case clang::X86::BI__builtin_ia32_bextr_u64:
4516 case clang::X86::BI__builtin_ia32_bextri_u32:
4517 case clang::X86::BI__builtin_ia32_bextri_u64:
4520 unsigned BitWidth = Val.getBitWidth();
4521 uint64_t Shift = Idx.extractBitsAsZExtValue(8, 0);
4522 uint64_t Length = Idx.extractBitsAsZExtValue(8, 8);
4523 if (Length > BitWidth) {
4528 if (Length == 0 || Shift >= BitWidth)
4529 return APInt(BitWidth, 0);
4531 uint64_t
Result = Val.getZExtValue() >> Shift;
4532 Result &= llvm::maskTrailingOnes<uint64_t>(Length);
4536 case clang::X86::BI__builtin_ia32_bzhi_si:
4537 case clang::X86::BI__builtin_ia32_bzhi_di:
4540 unsigned BitWidth = Val.getBitWidth();
4541 uint64_t Index = Idx.extractBitsAsZExtValue(8, 0);
4544 if (Index < BitWidth)
4545 Result.clearHighBits(BitWidth - Index);
4550 case clang::X86::BI__builtin_ia32_ktestcqi:
4551 case clang::X86::BI__builtin_ia32_ktestchi:
4552 case clang::X86::BI__builtin_ia32_ktestcsi:
4553 case clang::X86::BI__builtin_ia32_ktestcdi:
4556 return APInt(
sizeof(
unsigned char) * 8, (~A & B) == 0);
4559 case clang::X86::BI__builtin_ia32_ktestzqi:
4560 case clang::X86::BI__builtin_ia32_ktestzhi:
4561 case clang::X86::BI__builtin_ia32_ktestzsi:
4562 case clang::X86::BI__builtin_ia32_ktestzdi:
4565 return APInt(
sizeof(
unsigned char) * 8, (A & B) == 0);
4568 case clang::X86::BI__builtin_ia32_kortestcqi:
4569 case clang::X86::BI__builtin_ia32_kortestchi:
4570 case clang::X86::BI__builtin_ia32_kortestcsi:
4571 case clang::X86::BI__builtin_ia32_kortestcdi:
4574 return APInt(
sizeof(
unsigned char) * 8, ~(A | B) == 0);
4577 case clang::X86::BI__builtin_ia32_kortestzqi:
4578 case clang::X86::BI__builtin_ia32_kortestzhi:
4579 case clang::X86::BI__builtin_ia32_kortestzsi:
4580 case clang::X86::BI__builtin_ia32_kortestzdi:
4583 return APInt(
sizeof(
unsigned char) * 8, (A | B) == 0);
4586 case clang::X86::BI__builtin_ia32_kshiftliqi:
4587 case clang::X86::BI__builtin_ia32_kshiftlihi:
4588 case clang::X86::BI__builtin_ia32_kshiftlisi:
4589 case clang::X86::BI__builtin_ia32_kshiftlidi:
4592 unsigned Amt = RHS.getZExtValue() & 0xFF;
4593 if (Amt >= LHS.getBitWidth())
4594 return APInt::getZero(LHS.getBitWidth());
4595 return LHS.shl(Amt);
4598 case clang::X86::BI__builtin_ia32_kshiftriqi:
4599 case clang::X86::BI__builtin_ia32_kshiftrihi:
4600 case clang::X86::BI__builtin_ia32_kshiftrisi:
4601 case clang::X86::BI__builtin_ia32_kshiftridi:
4604 unsigned Amt = RHS.getZExtValue() & 0xFF;
4605 if (Amt >= LHS.getBitWidth())
4606 return APInt::getZero(LHS.getBitWidth());
4607 return LHS.lshr(Amt);
4610 case clang::X86::BI__builtin_ia32_lzcnt_u16:
4611 case clang::X86::BI__builtin_ia32_lzcnt_u32:
4612 case clang::X86::BI__builtin_ia32_lzcnt_u64:
4615 return APInt(Src.getBitWidth(), Src.countLeadingZeros());
4618 case clang::X86::BI__builtin_ia32_tzcnt_u16:
4619 case clang::X86::BI__builtin_ia32_tzcnt_u32:
4620 case clang::X86::BI__builtin_ia32_tzcnt_u64:
4623 return APInt(Src.getBitWidth(), Src.countTrailingZeros());
4626 case clang::X86::BI__builtin_ia32_pdep_si:
4627 case clang::X86::BI__builtin_ia32_pdep_di:
4630 unsigned BitWidth = Val.getBitWidth();
4633 for (
unsigned I = 0, P = 0; I != BitWidth; ++I) {
4635 Result.setBitVal(I, Val[P++]);
4641 case clang::X86::BI__builtin_ia32_pext_si:
4642 case clang::X86::BI__builtin_ia32_pext_di:
4645 unsigned BitWidth = Val.getBitWidth();
4648 for (
unsigned I = 0, P = 0; I != BitWidth; ++I) {
4650 Result.setBitVal(P++, Val[I]);
4656 case clang::X86::BI__builtin_ia32_addcarryx_u32:
4657 case clang::X86::BI__builtin_ia32_addcarryx_u64:
4658 case clang::X86::BI__builtin_ia32_subborrow_u32:
4659 case clang::X86::BI__builtin_ia32_subborrow_u64:
4663 case Builtin::BI__builtin_os_log_format_buffer_size:
4666 case Builtin::BI__builtin_ptrauth_string_discriminator:
4669 case Builtin::BI__builtin_infer_alloc_token:
4672 case Builtin::BI__noop:
4676 case Builtin::BI__builtin_operator_new:
4679 case Builtin::BI__builtin_operator_delete:
4682 case Builtin::BI__arithmetic_fence:
4685 case Builtin::BI__builtin_reduce_add:
4686 case Builtin::BI__builtin_reduce_mul:
4687 case Builtin::BI__builtin_reduce_and:
4688 case Builtin::BI__builtin_reduce_or:
4689 case Builtin::BI__builtin_reduce_xor:
4690 case Builtin::BI__builtin_reduce_min:
4691 case Builtin::BI__builtin_reduce_max:
4694 case Builtin::BI__builtin_elementwise_popcount:
4697 return APInt(Src.getBitWidth(), Src.popcount());
4699 case Builtin::BI__builtin_elementwise_bitreverse:
4701 S, OpPC,
Call, [](
const APSInt &Src) {
return Src.reverseBits(); });
4703 case Builtin::BI__builtin_elementwise_abs:
4706 case Builtin::BI__builtin_memcpy:
4707 case Builtin::BImemcpy:
4708 case Builtin::BI__builtin_wmemcpy:
4709 case Builtin::BIwmemcpy:
4710 case Builtin::BI__builtin_memmove:
4711 case Builtin::BImemmove:
4712 case Builtin::BI__builtin_wmemmove:
4713 case Builtin::BIwmemmove:
4716 case Builtin::BI__builtin_memcmp:
4717 case Builtin::BImemcmp:
4718 case Builtin::BI__builtin_bcmp:
4719 case Builtin::BIbcmp:
4720 case Builtin::BI__builtin_wmemcmp:
4721 case Builtin::BIwmemcmp:
4724 case Builtin::BImemchr:
4725 case Builtin::BI__builtin_memchr:
4726 case Builtin::BIstrchr:
4727 case Builtin::BI__builtin_strchr:
4728 case Builtin::BIwmemchr:
4729 case Builtin::BI__builtin_wmemchr:
4730 case Builtin::BIwcschr:
4731 case Builtin::BI__builtin_wcschr:
4732 case Builtin::BI__builtin_char_memchr:
4735 case Builtin::BI__builtin_object_size:
4736 case Builtin::BI__builtin_dynamic_object_size:
4739 case Builtin::BI__builtin_is_within_lifetime:
4742 case Builtin::BI__builtin_elementwise_add_sat:
4745 return LHS.isSigned() ? LHS.sadd_sat(RHS) : LHS.uadd_sat(RHS);
4748 case Builtin::BI__builtin_elementwise_sub_sat:
4751 return LHS.isSigned() ? LHS.ssub_sat(RHS) : LHS.usub_sat(RHS);
4753 case X86::BI__builtin_ia32_extract128i256:
4754 case X86::BI__builtin_ia32_vextractf128_pd256:
4755 case X86::BI__builtin_ia32_vextractf128_ps256:
4756 case X86::BI__builtin_ia32_vextractf128_si256:
4759 case X86::BI__builtin_ia32_extractf32x4_256_mask:
4760 case X86::BI__builtin_ia32_extractf32x4_mask:
4761 case X86::BI__builtin_ia32_extractf32x8_mask:
4762 case X86::BI__builtin_ia32_extractf64x2_256_mask:
4763 case X86::BI__builtin_ia32_extractf64x2_512_mask:
4764 case X86::BI__builtin_ia32_extractf64x4_mask:
4765 case X86::BI__builtin_ia32_extracti32x4_256_mask:
4766 case X86::BI__builtin_ia32_extracti32x4_mask:
4767 case X86::BI__builtin_ia32_extracti32x8_mask:
4768 case X86::BI__builtin_ia32_extracti64x2_256_mask:
4769 case X86::BI__builtin_ia32_extracti64x2_512_mask:
4770 case X86::BI__builtin_ia32_extracti64x4_mask:
4773 case clang::X86::BI__builtin_ia32_pmulhrsw128:
4774 case clang::X86::BI__builtin_ia32_pmulhrsw256:
4775 case clang::X86::BI__builtin_ia32_pmulhrsw512:
4778 return (llvm::APIntOps::mulsExtended(LHS, RHS).ashr(14) + 1)
4779 .extractBits(16, 1);
4782 case clang::X86::BI__builtin_ia32_movmskps:
4783 case clang::X86::BI__builtin_ia32_movmskpd:
4784 case clang::X86::BI__builtin_ia32_pmovmskb128:
4785 case clang::X86::BI__builtin_ia32_pmovmskb256:
4786 case clang::X86::BI__builtin_ia32_movmskps256:
4787 case clang::X86::BI__builtin_ia32_movmskpd256: {
4791 case X86::BI__builtin_ia32_psignb128:
4792 case X86::BI__builtin_ia32_psignb256:
4793 case X86::BI__builtin_ia32_psignw128:
4794 case X86::BI__builtin_ia32_psignw256:
4795 case X86::BI__builtin_ia32_psignd128:
4796 case X86::BI__builtin_ia32_psignd256:
4800 return APInt::getZero(AElem.getBitWidth());
4801 if (BElem.isNegative())
4806 case clang::X86::BI__builtin_ia32_pavgb128:
4807 case clang::X86::BI__builtin_ia32_pavgw128:
4808 case clang::X86::BI__builtin_ia32_pavgb256:
4809 case clang::X86::BI__builtin_ia32_pavgw256:
4810 case clang::X86::BI__builtin_ia32_pavgb512:
4811 case clang::X86::BI__builtin_ia32_pavgw512:
4813 llvm::APIntOps::avgCeilU);
4815 case clang::X86::BI__builtin_ia32_pmaddubsw128:
4816 case clang::X86::BI__builtin_ia32_pmaddubsw256:
4817 case clang::X86::BI__builtin_ia32_pmaddubsw512:
4822 unsigned BitWidth = 2 * LoLHS.getBitWidth();
4823 return (LoLHS.zext(BitWidth) * LoRHS.sext(BitWidth))
4824 .sadd_sat((HiLHS.zext(BitWidth) * HiRHS.sext(BitWidth)));
4827 case clang::X86::BI__builtin_ia32_pmaddwd128:
4828 case clang::X86::BI__builtin_ia32_pmaddwd256:
4829 case clang::X86::BI__builtin_ia32_pmaddwd512:
4834 unsigned BitWidth = 2 * LoLHS.getBitWidth();
4835 return (LoLHS.sext(BitWidth) * LoRHS.sext(BitWidth)) +
4836 (HiLHS.sext(BitWidth) * HiRHS.sext(BitWidth));
4839 case clang::X86::BI__builtin_ia32_pmulhuw128:
4840 case clang::X86::BI__builtin_ia32_pmulhuw256:
4841 case clang::X86::BI__builtin_ia32_pmulhuw512:
4843 llvm::APIntOps::mulhu);
4845 case clang::X86::BI__builtin_ia32_pmulhw128:
4846 case clang::X86::BI__builtin_ia32_pmulhw256:
4847 case clang::X86::BI__builtin_ia32_pmulhw512:
4849 llvm::APIntOps::mulhs);
4851 case clang::X86::BI__builtin_ia32_psllv2di:
4852 case clang::X86::BI__builtin_ia32_psllv4di:
4853 case clang::X86::BI__builtin_ia32_psllv4si:
4854 case clang::X86::BI__builtin_ia32_psllv8di:
4855 case clang::X86::BI__builtin_ia32_psllv8hi:
4856 case clang::X86::BI__builtin_ia32_psllv8si:
4857 case clang::X86::BI__builtin_ia32_psllv16hi:
4858 case clang::X86::BI__builtin_ia32_psllv16si:
4859 case clang::X86::BI__builtin_ia32_psllv32hi:
4860 case clang::X86::BI__builtin_ia32_psllwi128:
4861 case clang::X86::BI__builtin_ia32_psllwi256:
4862 case clang::X86::BI__builtin_ia32_psllwi512:
4863 case clang::X86::BI__builtin_ia32_pslldi128:
4864 case clang::X86::BI__builtin_ia32_pslldi256:
4865 case clang::X86::BI__builtin_ia32_pslldi512:
4866 case clang::X86::BI__builtin_ia32_psllqi128:
4867 case clang::X86::BI__builtin_ia32_psllqi256:
4868 case clang::X86::BI__builtin_ia32_psllqi512:
4871 if (RHS.uge(LHS.getBitWidth())) {
4872 return APInt::getZero(LHS.getBitWidth());
4874 return LHS.shl(RHS.getZExtValue());
4877 case clang::X86::BI__builtin_ia32_psrav4si:
4878 case clang::X86::BI__builtin_ia32_psrav8di:
4879 case clang::X86::BI__builtin_ia32_psrav8hi:
4880 case clang::X86::BI__builtin_ia32_psrav8si:
4881 case clang::X86::BI__builtin_ia32_psrav16hi:
4882 case clang::X86::BI__builtin_ia32_psrav16si:
4883 case clang::X86::BI__builtin_ia32_psrav32hi:
4884 case clang::X86::BI__builtin_ia32_psravq128:
4885 case clang::X86::BI__builtin_ia32_psravq256:
4886 case clang::X86::BI__builtin_ia32_psrawi128:
4887 case clang::X86::BI__builtin_ia32_psrawi256:
4888 case clang::X86::BI__builtin_ia32_psrawi512:
4889 case clang::X86::BI__builtin_ia32_psradi128:
4890 case clang::X86::BI__builtin_ia32_psradi256:
4891 case clang::X86::BI__builtin_ia32_psradi512:
4892 case clang::X86::BI__builtin_ia32_psraqi128:
4893 case clang::X86::BI__builtin_ia32_psraqi256:
4894 case clang::X86::BI__builtin_ia32_psraqi512:
4897 if (RHS.uge(LHS.getBitWidth())) {
4898 return LHS.ashr(LHS.getBitWidth() - 1);
4900 return LHS.ashr(RHS.getZExtValue());
4903 case clang::X86::BI__builtin_ia32_psrlv2di:
4904 case clang::X86::BI__builtin_ia32_psrlv4di:
4905 case clang::X86::BI__builtin_ia32_psrlv4si:
4906 case clang::X86::BI__builtin_ia32_psrlv8di:
4907 case clang::X86::BI__builtin_ia32_psrlv8hi:
4908 case clang::X86::BI__builtin_ia32_psrlv8si:
4909 case clang::X86::BI__builtin_ia32_psrlv16hi:
4910 case clang::X86::BI__builtin_ia32_psrlv16si:
4911 case clang::X86::BI__builtin_ia32_psrlv32hi:
4912 case clang::X86::BI__builtin_ia32_psrlwi128:
4913 case clang::X86::BI__builtin_ia32_psrlwi256:
4914 case clang::X86::BI__builtin_ia32_psrlwi512:
4915 case clang::X86::BI__builtin_ia32_psrldi128:
4916 case clang::X86::BI__builtin_ia32_psrldi256:
4917 case clang::X86::BI__builtin_ia32_psrldi512:
4918 case clang::X86::BI__builtin_ia32_psrlqi128:
4919 case clang::X86::BI__builtin_ia32_psrlqi256:
4920 case clang::X86::BI__builtin_ia32_psrlqi512:
4923 if (RHS.uge(LHS.getBitWidth())) {
4924 return APInt::getZero(LHS.getBitWidth());
4926 return LHS.lshr(RHS.getZExtValue());
4928 case clang::X86::BI__builtin_ia32_packsswb128:
4929 case clang::X86::BI__builtin_ia32_packsswb256:
4930 case clang::X86::BI__builtin_ia32_packsswb512:
4931 case clang::X86::BI__builtin_ia32_packssdw128:
4932 case clang::X86::BI__builtin_ia32_packssdw256:
4933 case clang::X86::BI__builtin_ia32_packssdw512:
4935 return APInt(Src).truncSSat(Src.getBitWidth() / 2);
4937 case clang::X86::BI__builtin_ia32_packusdw128:
4938 case clang::X86::BI__builtin_ia32_packusdw256:
4939 case clang::X86::BI__builtin_ia32_packusdw512:
4940 case clang::X86::BI__builtin_ia32_packuswb128:
4941 case clang::X86::BI__builtin_ia32_packuswb256:
4942 case clang::X86::BI__builtin_ia32_packuswb512:
4944 return APInt(Src).truncSSatU(Src.getBitWidth() / 2);
4947 case clang::X86::BI__builtin_ia32_selectss_128:
4948 case clang::X86::BI__builtin_ia32_selectsd_128:
4949 case clang::X86::BI__builtin_ia32_selectsh_128:
4950 case clang::X86::BI__builtin_ia32_selectsbf_128:
4952 case clang::X86::BI__builtin_ia32_vprotbi:
4953 case clang::X86::BI__builtin_ia32_vprotdi:
4954 case clang::X86::BI__builtin_ia32_vprotqi:
4955 case clang::X86::BI__builtin_ia32_vprotwi:
4956 case clang::X86::BI__builtin_ia32_prold128:
4957 case clang::X86::BI__builtin_ia32_prold256:
4958 case clang::X86::BI__builtin_ia32_prold512:
4959 case clang::X86::BI__builtin_ia32_prolq128:
4960 case clang::X86::BI__builtin_ia32_prolq256:
4961 case clang::X86::BI__builtin_ia32_prolq512:
4964 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotl(RHS); });
4966 case clang::X86::BI__builtin_ia32_prord128:
4967 case clang::X86::BI__builtin_ia32_prord256:
4968 case clang::X86::BI__builtin_ia32_prord512:
4969 case clang::X86::BI__builtin_ia32_prorq128:
4970 case clang::X86::BI__builtin_ia32_prorq256:
4971 case clang::X86::BI__builtin_ia32_prorq512:
4974 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotr(RHS); });
4976 case Builtin::BI__builtin_elementwise_max:
4977 case Builtin::BI__builtin_elementwise_min:
4980 case clang::X86::BI__builtin_ia32_phaddw128:
4981 case clang::X86::BI__builtin_ia32_phaddw256:
4982 case clang::X86::BI__builtin_ia32_phaddd128:
4983 case clang::X86::BI__builtin_ia32_phaddd256:
4986 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
4987 case clang::X86::BI__builtin_ia32_phaddsw128:
4988 case clang::X86::BI__builtin_ia32_phaddsw256:
4991 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.sadd_sat(RHS); });
4992 case clang::X86::BI__builtin_ia32_phsubw128:
4993 case clang::X86::BI__builtin_ia32_phsubw256:
4994 case clang::X86::BI__builtin_ia32_phsubd128:
4995 case clang::X86::BI__builtin_ia32_phsubd256:
4998 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS - RHS; });
4999 case clang::X86::BI__builtin_ia32_phsubsw128:
5000 case clang::X86::BI__builtin_ia32_phsubsw256:
5003 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.ssub_sat(RHS); });
5004 case clang::X86::BI__builtin_ia32_haddpd:
5005 case clang::X86::BI__builtin_ia32_haddps:
5006 case clang::X86::BI__builtin_ia32_haddpd256:
5007 case clang::X86::BI__builtin_ia32_haddps256:
5010 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
5015 case clang::X86::BI__builtin_ia32_hsubpd:
5016 case clang::X86::BI__builtin_ia32_hsubps:
5017 case clang::X86::BI__builtin_ia32_hsubpd256:
5018 case clang::X86::BI__builtin_ia32_hsubps256:
5021 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
5023 F.subtract(RHS, RM);
5026 case clang::X86::BI__builtin_ia32_addsubpd:
5027 case clang::X86::BI__builtin_ia32_addsubps:
5028 case clang::X86::BI__builtin_ia32_addsubpd256:
5029 case clang::X86::BI__builtin_ia32_addsubps256:
5032 case clang::X86::BI__builtin_ia32_pmuldq128:
5033 case clang::X86::BI__builtin_ia32_pmuldq256:
5034 case clang::X86::BI__builtin_ia32_pmuldq512:
5039 return llvm::APIntOps::mulsExtended(LoLHS, LoRHS);
5042 case clang::X86::BI__builtin_ia32_pmuludq128:
5043 case clang::X86::BI__builtin_ia32_pmuludq256:
5044 case clang::X86::BI__builtin_ia32_pmuludq512:
5049 return llvm::APIntOps::muluExtended(LoLHS, LoRHS);
5052 case clang::X86::BI__builtin_ia32_pclmulqdq128:
5053 case clang::X86::BI__builtin_ia32_pclmulqdq256:
5054 case clang::X86::BI__builtin_ia32_pclmulqdq512:
5057 case Builtin::BI__builtin_elementwise_fma:
5061 llvm::RoundingMode RM) {
5063 F.fusedMultiplyAdd(Y, Z, RM);
5067 case X86::BI__builtin_ia32_vpmadd52luq128:
5068 case X86::BI__builtin_ia32_vpmadd52luq256:
5069 case X86::BI__builtin_ia32_vpmadd52luq512:
5072 return A + (B.trunc(52) *
C.trunc(52)).zext(64);
5074 case X86::BI__builtin_ia32_vpmadd52huq128:
5075 case X86::BI__builtin_ia32_vpmadd52huq256:
5076 case X86::BI__builtin_ia32_vpmadd52huq512:
5079 return A + llvm::APIntOps::mulhu(B.trunc(52),
C.trunc(52)).zext(64);
5082 case X86::BI__builtin_ia32_vpshldd128:
5083 case X86::BI__builtin_ia32_vpshldd256:
5084 case X86::BI__builtin_ia32_vpshldd512:
5085 case X86::BI__builtin_ia32_vpshldq128:
5086 case X86::BI__builtin_ia32_vpshldq256:
5087 case X86::BI__builtin_ia32_vpshldq512:
5088 case X86::BI__builtin_ia32_vpshldw128:
5089 case X86::BI__builtin_ia32_vpshldw256:
5090 case X86::BI__builtin_ia32_vpshldw512:
5094 return llvm::APIntOps::fshl(Hi, Lo, Amt);
5097 case X86::BI__builtin_ia32_vpshrdd128:
5098 case X86::BI__builtin_ia32_vpshrdd256:
5099 case X86::BI__builtin_ia32_vpshrdd512:
5100 case X86::BI__builtin_ia32_vpshrdq128:
5101 case X86::BI__builtin_ia32_vpshrdq256:
5102 case X86::BI__builtin_ia32_vpshrdq512:
5103 case X86::BI__builtin_ia32_vpshrdw128:
5104 case X86::BI__builtin_ia32_vpshrdw256:
5105 case X86::BI__builtin_ia32_vpshrdw512:
5110 return llvm::APIntOps::fshr(Hi, Lo, Amt);
5112 case X86::BI__builtin_ia32_vpconflictsi_128:
5113 case X86::BI__builtin_ia32_vpconflictsi_256:
5114 case X86::BI__builtin_ia32_vpconflictsi_512:
5115 case X86::BI__builtin_ia32_vpconflictdi_128:
5116 case X86::BI__builtin_ia32_vpconflictdi_256:
5117 case X86::BI__builtin_ia32_vpconflictdi_512:
5119 case clang::X86::BI__builtin_ia32_blendpd:
5120 case clang::X86::BI__builtin_ia32_blendpd256:
5121 case clang::X86::BI__builtin_ia32_blendps:
5122 case clang::X86::BI__builtin_ia32_blendps256:
5123 case clang::X86::BI__builtin_ia32_pblendw128:
5124 case clang::X86::BI__builtin_ia32_pblendw256:
5125 case clang::X86::BI__builtin_ia32_pblendd128:
5126 case clang::X86::BI__builtin_ia32_pblendd256:
5128 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5130 unsigned MaskBit = (ShuffleMask >> (DstIdx % 8)) & 0x1;
5131 unsigned SrcVecIdx = MaskBit ? 1 : 0;
5132 return std::pair<unsigned, int>{SrcVecIdx,
static_cast<int>(DstIdx)};
5137 case clang::X86::BI__builtin_ia32_blendvpd:
5138 case clang::X86::BI__builtin_ia32_blendvpd256:
5139 case clang::X86::BI__builtin_ia32_blendvps:
5140 case clang::X86::BI__builtin_ia32_blendvps256:
5144 llvm::RoundingMode) {
return C.isNegative() ? T : F; });
5146 case clang::X86::BI__builtin_ia32_pblendvb128:
5147 case clang::X86::BI__builtin_ia32_pblendvb256:
5150 return ((
APInt)
C).isNegative() ? T : F;
5152 case X86::BI__builtin_ia32_ptestz128:
5153 case X86::BI__builtin_ia32_ptestz256:
5154 case X86::BI__builtin_ia32_vtestzps:
5155 case X86::BI__builtin_ia32_vtestzps256:
5156 case X86::BI__builtin_ia32_vtestzpd:
5157 case X86::BI__builtin_ia32_vtestzpd256:
5160 [](
const APInt &A,
const APInt &B) {
return (A & B) == 0; });
5161 case X86::BI__builtin_ia32_ptestc128:
5162 case X86::BI__builtin_ia32_ptestc256:
5163 case X86::BI__builtin_ia32_vtestcps:
5164 case X86::BI__builtin_ia32_vtestcps256:
5165 case X86::BI__builtin_ia32_vtestcpd:
5166 case X86::BI__builtin_ia32_vtestcpd256:
5169 [](
const APInt &A,
const APInt &B) {
return (~A & B) == 0; });
5170 case X86::BI__builtin_ia32_ptestnzc128:
5171 case X86::BI__builtin_ia32_ptestnzc256:
5172 case X86::BI__builtin_ia32_vtestnzcps:
5173 case X86::BI__builtin_ia32_vtestnzcps256:
5174 case X86::BI__builtin_ia32_vtestnzcpd:
5175 case X86::BI__builtin_ia32_vtestnzcpd256:
5178 return ((A & B) != 0) && ((~A & B) != 0);
5180 case X86::BI__builtin_ia32_selectb_128:
5181 case X86::BI__builtin_ia32_selectb_256:
5182 case X86::BI__builtin_ia32_selectb_512:
5183 case X86::BI__builtin_ia32_selectw_128:
5184 case X86::BI__builtin_ia32_selectw_256:
5185 case X86::BI__builtin_ia32_selectw_512:
5186 case X86::BI__builtin_ia32_selectd_128:
5187 case X86::BI__builtin_ia32_selectd_256:
5188 case X86::BI__builtin_ia32_selectd_512:
5189 case X86::BI__builtin_ia32_selectq_128:
5190 case X86::BI__builtin_ia32_selectq_256:
5191 case X86::BI__builtin_ia32_selectq_512:
5192 case X86::BI__builtin_ia32_selectph_128:
5193 case X86::BI__builtin_ia32_selectph_256:
5194 case X86::BI__builtin_ia32_selectph_512:
5195 case X86::BI__builtin_ia32_selectpbf_128:
5196 case X86::BI__builtin_ia32_selectpbf_256:
5197 case X86::BI__builtin_ia32_selectpbf_512:
5198 case X86::BI__builtin_ia32_selectps_128:
5199 case X86::BI__builtin_ia32_selectps_256:
5200 case X86::BI__builtin_ia32_selectps_512:
5201 case X86::BI__builtin_ia32_selectpd_128:
5202 case X86::BI__builtin_ia32_selectpd_256:
5203 case X86::BI__builtin_ia32_selectpd_512:
5206 case X86::BI__builtin_ia32_shufps:
5207 case X86::BI__builtin_ia32_shufps256:
5208 case X86::BI__builtin_ia32_shufps512:
5210 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5211 unsigned NumElemPerLane = 4;
5212 unsigned NumSelectableElems = NumElemPerLane / 2;
5213 unsigned BitsPerElem = 2;
5214 unsigned IndexMask = 0x3;
5215 unsigned MaskBits = 8;
5216 unsigned Lane = DstIdx / NumElemPerLane;
5217 unsigned ElemInLane = DstIdx % NumElemPerLane;
5218 unsigned LaneOffset = Lane * NumElemPerLane;
5219 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
5220 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5221 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
5222 return std::pair<unsigned, int>{SrcIdx,
5223 static_cast<int>(LaneOffset + Index)};
5225 case X86::BI__builtin_ia32_shufpd:
5226 case X86::BI__builtin_ia32_shufpd256:
5227 case X86::BI__builtin_ia32_shufpd512:
5229 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5230 unsigned NumElemPerLane = 2;
5231 unsigned NumSelectableElems = NumElemPerLane / 2;
5232 unsigned BitsPerElem = 1;
5233 unsigned IndexMask = 0x1;
5234 unsigned MaskBits = 8;
5235 unsigned Lane = DstIdx / NumElemPerLane;
5236 unsigned ElemInLane = DstIdx % NumElemPerLane;
5237 unsigned LaneOffset = Lane * NumElemPerLane;
5238 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
5239 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5240 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
5241 return std::pair<unsigned, int>{SrcIdx,
5242 static_cast<int>(LaneOffset + Index)};
5245 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v16qi:
5246 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v32qi:
5247 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v64qi:
5249 case X86::BI__builtin_ia32_vgf2p8affineqb_v16qi:
5250 case X86::BI__builtin_ia32_vgf2p8affineqb_v32qi:
5251 case X86::BI__builtin_ia32_vgf2p8affineqb_v64qi:
5254 case X86::BI__builtin_ia32_vgf2p8mulb_v16qi:
5255 case X86::BI__builtin_ia32_vgf2p8mulb_v32qi:
5256 case X86::BI__builtin_ia32_vgf2p8mulb_v64qi:
5259 case X86::BI__builtin_ia32_insertps128:
5261 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Mask) {
5263 if ((Mask & (1 << DstIdx)) != 0) {
5264 return std::pair<unsigned, int>{0, -1};
5268 unsigned SrcElem = (Mask >> 6) & 0x3;
5269 unsigned DstElem = (Mask >> 4) & 0x3;
5270 if (DstIdx == DstElem) {
5272 return std::pair<unsigned, int>{1,
static_cast<int>(SrcElem)};
5275 return std::pair<unsigned, int>{0,
static_cast<int>(DstIdx)};
5278 case X86::BI__builtin_ia32_permvarsi256:
5279 case X86::BI__builtin_ia32_permvarsf256:
5280 case X86::BI__builtin_ia32_permvardf512:
5281 case X86::BI__builtin_ia32_permvardi512:
5282 case X86::BI__builtin_ia32_permvarhi128:
5284 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5285 int Offset = ShuffleMask & 0x7;
5286 return std::pair<unsigned, int>{0, Offset};
5288 case X86::BI__builtin_ia32_permvarqi128:
5289 case X86::BI__builtin_ia32_permvarhi256:
5290 case X86::BI__builtin_ia32_permvarsi512:
5291 case X86::BI__builtin_ia32_permvarsf512:
5293 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5294 int Offset = ShuffleMask & 0xF;
5295 return std::pair<unsigned, int>{0, Offset};
5297 case X86::BI__builtin_ia32_permvardi256:
5298 case X86::BI__builtin_ia32_permvardf256:
5300 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5301 int Offset = ShuffleMask & 0x3;
5302 return std::pair<unsigned, int>{0, Offset};
5304 case X86::BI__builtin_ia32_permvarqi256:
5305 case X86::BI__builtin_ia32_permvarhi512:
5307 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5308 int Offset = ShuffleMask & 0x1F;
5309 return std::pair<unsigned, int>{0, Offset};
5311 case X86::BI__builtin_ia32_permvarqi512:
5313 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5314 int Offset = ShuffleMask & 0x3F;
5315 return std::pair<unsigned, int>{0, Offset};
5317 case X86::BI__builtin_ia32_vpermi2varq128:
5318 case X86::BI__builtin_ia32_vpermi2varpd128:
5320 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5321 int Offset = ShuffleMask & 0x1;
5322 unsigned SrcIdx = (ShuffleMask >> 1) & 0x1;
5323 return std::pair<unsigned, int>{SrcIdx, Offset};
5325 case X86::BI__builtin_ia32_vpermi2vard128:
5326 case X86::BI__builtin_ia32_vpermi2varps128:
5327 case X86::BI__builtin_ia32_vpermi2varq256:
5328 case X86::BI__builtin_ia32_vpermi2varpd256:
5330 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5331 int Offset = ShuffleMask & 0x3;
5332 unsigned SrcIdx = (ShuffleMask >> 2) & 0x1;
5333 return std::pair<unsigned, int>{SrcIdx, Offset};
5335 case X86::BI__builtin_ia32_vpermi2varhi128:
5336 case X86::BI__builtin_ia32_vpermi2vard256:
5337 case X86::BI__builtin_ia32_vpermi2varps256:
5338 case X86::BI__builtin_ia32_vpermi2varq512:
5339 case X86::BI__builtin_ia32_vpermi2varpd512:
5341 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5342 int Offset = ShuffleMask & 0x7;
5343 unsigned SrcIdx = (ShuffleMask >> 3) & 0x1;
5344 return std::pair<unsigned, int>{SrcIdx, Offset};
5346 case X86::BI__builtin_ia32_vpermi2varqi128:
5347 case X86::BI__builtin_ia32_vpermi2varhi256:
5348 case X86::BI__builtin_ia32_vpermi2vard512:
5349 case X86::BI__builtin_ia32_vpermi2varps512:
5351 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5352 int Offset = ShuffleMask & 0xF;
5353 unsigned SrcIdx = (ShuffleMask >> 4) & 0x1;
5354 return std::pair<unsigned, int>{SrcIdx, Offset};
5356 case X86::BI__builtin_ia32_vpermi2varqi256:
5357 case X86::BI__builtin_ia32_vpermi2varhi512:
5359 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5360 int Offset = ShuffleMask & 0x1F;
5361 unsigned SrcIdx = (ShuffleMask >> 5) & 0x1;
5362 return std::pair<unsigned, int>{SrcIdx, Offset};
5364 case X86::BI__builtin_ia32_vpermi2varqi512:
5366 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5367 int Offset = ShuffleMask & 0x3F;
5368 unsigned SrcIdx = (ShuffleMask >> 6) & 0x1;
5369 return std::pair<unsigned, int>{SrcIdx, Offset};
5371 case X86::BI__builtin_ia32_vperm2f128_pd256:
5372 case X86::BI__builtin_ia32_vperm2f128_ps256:
5373 case X86::BI__builtin_ia32_vperm2f128_si256:
5374 case X86::BI__builtin_ia32_permti256: {
5375 unsigned NumElements =
5376 Call->getArg(0)->getType()->castAs<
VectorType>()->getNumElements();
5377 unsigned PreservedBitsCnt = NumElements >> 2;
5380 [PreservedBitsCnt](
unsigned DstIdx,
unsigned ShuffleMask) {
5381 unsigned ControlBitsCnt = DstIdx >> PreservedBitsCnt << 2;
5382 unsigned ControlBits = ShuffleMask >> ControlBitsCnt;
5384 if (ControlBits & 0b1000)
5385 return std::make_pair(0u, -1);
5387 unsigned SrcVecIdx = (ControlBits & 0b10) >> 1;
5388 unsigned PreservedBitsMask = (1 << PreservedBitsCnt) - 1;
5389 int SrcIdx = ((ControlBits & 0b1) << PreservedBitsCnt) |
5390 (DstIdx & PreservedBitsMask);
5391 return std::make_pair(SrcVecIdx, SrcIdx);
5394 case X86::BI__builtin_ia32_pshufb128:
5395 case X86::BI__builtin_ia32_pshufb256:
5396 case X86::BI__builtin_ia32_pshufb512:
5398 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5399 uint8_t Ctlb =
static_cast<uint8_t
>(ShuffleMask);
5401 return std::make_pair(0, -1);
5403 unsigned LaneBase = (DstIdx / 16) * 16;
5404 unsigned SrcOffset = Ctlb & 0x0F;
5405 unsigned SrcIdx = LaneBase + SrcOffset;
5406 return std::make_pair(0,
static_cast<int>(SrcIdx));
5409 case X86::BI__builtin_ia32_pshuflw:
5410 case X86::BI__builtin_ia32_pshuflw256:
5411 case X86::BI__builtin_ia32_pshuflw512:
5413 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5414 unsigned LaneBase = (DstIdx / 8) * 8;
5415 unsigned LaneIdx = DstIdx % 8;
5417 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
5418 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
5421 return std::make_pair(0,
static_cast<int>(DstIdx));
5424 case X86::BI__builtin_ia32_pshufhw:
5425 case X86::BI__builtin_ia32_pshufhw256:
5426 case X86::BI__builtin_ia32_pshufhw512:
5428 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5429 unsigned LaneBase = (DstIdx / 8) * 8;
5430 unsigned LaneIdx = DstIdx % 8;
5432 unsigned Sel = (ShuffleMask >> (2 * (LaneIdx - 4))) & 0x3;
5433 return std::make_pair(0,
static_cast<int>(LaneBase + 4 + Sel));
5436 return std::make_pair(0,
static_cast<int>(DstIdx));
5439 case X86::BI__builtin_ia32_pshufd:
5440 case X86::BI__builtin_ia32_pshufd256:
5441 case X86::BI__builtin_ia32_pshufd512:
5442 case X86::BI__builtin_ia32_vpermilps:
5443 case X86::BI__builtin_ia32_vpermilps256:
5444 case X86::BI__builtin_ia32_vpermilps512:
5446 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5447 unsigned LaneBase = (DstIdx / 4) * 4;
5448 unsigned LaneIdx = DstIdx % 4;
5449 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
5450 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
5453 case X86::BI__builtin_ia32_vpermilvarpd:
5454 case X86::BI__builtin_ia32_vpermilvarpd256:
5455 case X86::BI__builtin_ia32_vpermilvarpd512:
5457 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5458 unsigned NumElemPerLane = 2;
5459 unsigned Lane = DstIdx / NumElemPerLane;
5460 unsigned Offset = ShuffleMask & 0b10 ? 1 : 0;
5461 return std::make_pair(
5462 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
5465 case X86::BI__builtin_ia32_vpermilvarps:
5466 case X86::BI__builtin_ia32_vpermilvarps256:
5467 case X86::BI__builtin_ia32_vpermilvarps512:
5469 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5470 unsigned NumElemPerLane = 4;
5471 unsigned Lane = DstIdx / NumElemPerLane;
5472 unsigned Offset = ShuffleMask & 0b11;
5473 return std::make_pair(
5474 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
5477 case X86::BI__builtin_ia32_vpermilpd:
5478 case X86::BI__builtin_ia32_vpermilpd256:
5479 case X86::BI__builtin_ia32_vpermilpd512:
5481 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Control) {
5482 unsigned NumElemPerLane = 2;
5483 unsigned BitsPerElem = 1;
5484 unsigned MaskBits = 8;
5485 unsigned IndexMask = 0x1;
5486 unsigned Lane = DstIdx / NumElemPerLane;
5487 unsigned LaneOffset = Lane * NumElemPerLane;
5488 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5489 unsigned Index = (Control >> BitIndex) & IndexMask;
5490 return std::make_pair(0,
static_cast<int>(LaneOffset + Index));
5493 case X86::BI__builtin_ia32_permdf256:
5494 case X86::BI__builtin_ia32_permdi256:
5496 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Control) {
5499 unsigned Index = (Control >> (2 * DstIdx)) & 0x3;
5500 return std::make_pair(0,
static_cast<int>(Index));
5503 case X86::BI__builtin_ia32_vpmultishiftqb128:
5504 case X86::BI__builtin_ia32_vpmultishiftqb256:
5505 case X86::BI__builtin_ia32_vpmultishiftqb512:
5507 case X86::BI__builtin_ia32_kandqi:
5508 case X86::BI__builtin_ia32_kandhi:
5509 case X86::BI__builtin_ia32_kandsi:
5510 case X86::BI__builtin_ia32_kanddi:
5513 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS & RHS; });
5515 case X86::BI__builtin_ia32_kandnqi:
5516 case X86::BI__builtin_ia32_kandnhi:
5517 case X86::BI__builtin_ia32_kandnsi:
5518 case X86::BI__builtin_ia32_kandndi:
5521 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~LHS & RHS; });
5523 case X86::BI__builtin_ia32_korqi:
5524 case X86::BI__builtin_ia32_korhi:
5525 case X86::BI__builtin_ia32_korsi:
5526 case X86::BI__builtin_ia32_kordi:
5529 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS | RHS; });
5531 case X86::BI__builtin_ia32_kxnorqi:
5532 case X86::BI__builtin_ia32_kxnorhi:
5533 case X86::BI__builtin_ia32_kxnorsi:
5534 case X86::BI__builtin_ia32_kxnordi:
5537 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~(LHS ^ RHS); });
5539 case X86::BI__builtin_ia32_kxorqi:
5540 case X86::BI__builtin_ia32_kxorhi:
5541 case X86::BI__builtin_ia32_kxorsi:
5542 case X86::BI__builtin_ia32_kxordi:
5545 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS ^ RHS; });
5547 case X86::BI__builtin_ia32_knotqi:
5548 case X86::BI__builtin_ia32_knothi:
5549 case X86::BI__builtin_ia32_knotsi:
5550 case X86::BI__builtin_ia32_knotdi:
5552 S, OpPC,
Call, [](
const APSInt &Src) {
return ~Src; });
5554 case X86::BI__builtin_ia32_kaddqi:
5555 case X86::BI__builtin_ia32_kaddhi:
5556 case X86::BI__builtin_ia32_kaddsi:
5557 case X86::BI__builtin_ia32_kadddi:
5560 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
5562 case X86::BI__builtin_ia32_kmovb:
5563 case X86::BI__builtin_ia32_kmovw:
5564 case X86::BI__builtin_ia32_kmovd:
5565 case X86::BI__builtin_ia32_kmovq:
5567 S, OpPC,
Call, [](
const APSInt &Src) {
return Src; });
5569 case X86::BI__builtin_ia32_kunpckhi:
5570 case X86::BI__builtin_ia32_kunpckdi:
5571 case X86::BI__builtin_ia32_kunpcksi:
5576 unsigned BW = A.getBitWidth();
5577 return APSInt(A.trunc(BW / 2).concat(B.trunc(BW / 2)),
5581 case X86::BI__builtin_ia32_phminposuw128:
5584 case X86::BI__builtin_ia32_psraq128:
5585 case X86::BI__builtin_ia32_psraq256:
5586 case X86::BI__builtin_ia32_psraq512:
5587 case X86::BI__builtin_ia32_psrad128:
5588 case X86::BI__builtin_ia32_psrad256:
5589 case X86::BI__builtin_ia32_psrad512:
5590 case X86::BI__builtin_ia32_psraw128:
5591 case X86::BI__builtin_ia32_psraw256:
5592 case X86::BI__builtin_ia32_psraw512:
5595 [](
const APInt &Elt, uint64_t Count) {
return Elt.ashr(Count); },
5596 [](
const APInt &Elt,
unsigned Width) {
return Elt.ashr(Width - 1); });
5598 case X86::BI__builtin_ia32_psllq128:
5599 case X86::BI__builtin_ia32_psllq256:
5600 case X86::BI__builtin_ia32_psllq512:
5601 case X86::BI__builtin_ia32_pslld128:
5602 case X86::BI__builtin_ia32_pslld256:
5603 case X86::BI__builtin_ia32_pslld512:
5604 case X86::BI__builtin_ia32_psllw128:
5605 case X86::BI__builtin_ia32_psllw256:
5606 case X86::BI__builtin_ia32_psllw512:
5609 [](
const APInt &Elt, uint64_t Count) {
return Elt.shl(Count); },
5610 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
5612 case X86::BI__builtin_ia32_psrlq128:
5613 case X86::BI__builtin_ia32_psrlq256:
5614 case X86::BI__builtin_ia32_psrlq512:
5615 case X86::BI__builtin_ia32_psrld128:
5616 case X86::BI__builtin_ia32_psrld256:
5617 case X86::BI__builtin_ia32_psrld512:
5618 case X86::BI__builtin_ia32_psrlw128:
5619 case X86::BI__builtin_ia32_psrlw256:
5620 case X86::BI__builtin_ia32_psrlw512:
5623 [](
const APInt &Elt, uint64_t Count) {
return Elt.lshr(Count); },
5624 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
5626 case X86::BI__builtin_ia32_pternlogd128_mask:
5627 case X86::BI__builtin_ia32_pternlogd256_mask:
5628 case X86::BI__builtin_ia32_pternlogd512_mask:
5629 case X86::BI__builtin_ia32_pternlogq128_mask:
5630 case X86::BI__builtin_ia32_pternlogq256_mask:
5631 case X86::BI__builtin_ia32_pternlogq512_mask:
5633 case X86::BI__builtin_ia32_pternlogd128_maskz:
5634 case X86::BI__builtin_ia32_pternlogd256_maskz:
5635 case X86::BI__builtin_ia32_pternlogd512_maskz:
5636 case X86::BI__builtin_ia32_pternlogq128_maskz:
5637 case X86::BI__builtin_ia32_pternlogq256_maskz:
5638 case X86::BI__builtin_ia32_pternlogq512_maskz:
5640 case Builtin::BI__builtin_elementwise_fshl:
5642 llvm::APIntOps::fshl);
5643 case Builtin::BI__builtin_elementwise_fshr:
5645 llvm::APIntOps::fshr);
5647 case X86::BI__builtin_ia32_shuf_f32x4_256:
5648 case X86::BI__builtin_ia32_shuf_i32x4_256:
5649 case X86::BI__builtin_ia32_shuf_f64x2_256:
5650 case X86::BI__builtin_ia32_shuf_i64x2_256:
5651 case X86::BI__builtin_ia32_shuf_f32x4:
5652 case X86::BI__builtin_ia32_shuf_i32x4:
5653 case X86::BI__builtin_ia32_shuf_f64x2:
5654 case X86::BI__builtin_ia32_shuf_i64x2: {
5660 unsigned LaneBits = 128u;
5661 unsigned NumLanes = (NumElems * ElemBits) / LaneBits;
5662 unsigned NumElemsPerLane = LaneBits / ElemBits;
5666 [NumLanes, NumElemsPerLane](
unsigned DstIdx,
unsigned ShuffleMask) {
5668 unsigned BitsPerElem = NumLanes / 2;
5669 unsigned IndexMask = (1u << BitsPerElem) - 1;
5670 unsigned Lane = DstIdx / NumElemsPerLane;
5671 unsigned SrcIdx = (Lane < NumLanes / 2) ? 0 : 1;
5672 unsigned BitIdx = BitsPerElem * Lane;
5673 unsigned SrcLaneIdx = (ShuffleMask >> BitIdx) & IndexMask;
5674 unsigned ElemInLane = DstIdx % NumElemsPerLane;
5675 unsigned IdxToPick = SrcLaneIdx * NumElemsPerLane + ElemInLane;
5676 return std::pair<unsigned, int>{SrcIdx, IdxToPick};
5680 case X86::BI__builtin_ia32_insertf32x4_256:
5681 case X86::BI__builtin_ia32_inserti32x4_256:
5682 case X86::BI__builtin_ia32_insertf64x2_256:
5683 case X86::BI__builtin_ia32_inserti64x2_256:
5684 case X86::BI__builtin_ia32_insertf32x4:
5685 case X86::BI__builtin_ia32_inserti32x4:
5686 case X86::BI__builtin_ia32_insertf64x2_512:
5687 case X86::BI__builtin_ia32_inserti64x2_512:
5688 case X86::BI__builtin_ia32_insertf32x8:
5689 case X86::BI__builtin_ia32_inserti32x8:
5690 case X86::BI__builtin_ia32_insertf64x4:
5691 case X86::BI__builtin_ia32_inserti64x4:
5692 case X86::BI__builtin_ia32_vinsertf128_ps256:
5693 case X86::BI__builtin_ia32_vinsertf128_pd256:
5694 case X86::BI__builtin_ia32_vinsertf128_si256:
5695 case X86::BI__builtin_ia32_insert128i256:
5698 case clang::X86::BI__builtin_ia32_vcvtps2ph:
5699 case clang::X86::BI__builtin_ia32_vcvtps2ph256:
5702 case X86::BI__builtin_ia32_vec_ext_v4hi:
5703 case X86::BI__builtin_ia32_vec_ext_v16qi:
5704 case X86::BI__builtin_ia32_vec_ext_v8hi:
5705 case X86::BI__builtin_ia32_vec_ext_v4si:
5706 case X86::BI__builtin_ia32_vec_ext_v2di:
5707 case X86::BI__builtin_ia32_vec_ext_v32qi:
5708 case X86::BI__builtin_ia32_vec_ext_v16hi:
5709 case X86::BI__builtin_ia32_vec_ext_v8si:
5710 case X86::BI__builtin_ia32_vec_ext_v4di:
5711 case X86::BI__builtin_ia32_vec_ext_v4sf:
5714 case X86::BI__builtin_ia32_vec_set_v4hi:
5715 case X86::BI__builtin_ia32_vec_set_v16qi:
5716 case X86::BI__builtin_ia32_vec_set_v8hi:
5717 case X86::BI__builtin_ia32_vec_set_v4si:
5718 case X86::BI__builtin_ia32_vec_set_v2di:
5719 case X86::BI__builtin_ia32_vec_set_v32qi:
5720 case X86::BI__builtin_ia32_vec_set_v16hi:
5721 case X86::BI__builtin_ia32_vec_set_v8si:
5722 case X86::BI__builtin_ia32_vec_set_v4di:
5725 case X86::BI__builtin_ia32_cvtb2mask128:
5726 case X86::BI__builtin_ia32_cvtb2mask256:
5727 case X86::BI__builtin_ia32_cvtb2mask512:
5728 case X86::BI__builtin_ia32_cvtw2mask128:
5729 case X86::BI__builtin_ia32_cvtw2mask256:
5730 case X86::BI__builtin_ia32_cvtw2mask512:
5731 case X86::BI__builtin_ia32_cvtd2mask128:
5732 case X86::BI__builtin_ia32_cvtd2mask256:
5733 case X86::BI__builtin_ia32_cvtd2mask512:
5734 case X86::BI__builtin_ia32_cvtq2mask128:
5735 case X86::BI__builtin_ia32_cvtq2mask256:
5736 case X86::BI__builtin_ia32_cvtq2mask512:
5739 case X86::BI__builtin_ia32_cvtmask2b128:
5740 case X86::BI__builtin_ia32_cvtmask2b256:
5741 case X86::BI__builtin_ia32_cvtmask2b512:
5742 case X86::BI__builtin_ia32_cvtmask2w128:
5743 case X86::BI__builtin_ia32_cvtmask2w256:
5744 case X86::BI__builtin_ia32_cvtmask2w512:
5745 case X86::BI__builtin_ia32_cvtmask2d128:
5746 case X86::BI__builtin_ia32_cvtmask2d256:
5747 case X86::BI__builtin_ia32_cvtmask2d512:
5748 case X86::BI__builtin_ia32_cvtmask2q128:
5749 case X86::BI__builtin_ia32_cvtmask2q256:
5750 case X86::BI__builtin_ia32_cvtmask2q512:
5753 case X86::BI__builtin_ia32_cvtsd2ss:
5756 case X86::BI__builtin_ia32_cvtsd2ss_round_mask:
5759 case X86::BI__builtin_ia32_cvtpd2ps:
5760 case X86::BI__builtin_ia32_cvtpd2ps256:
5762 case X86::BI__builtin_ia32_cvtpd2ps_mask:
5764 case X86::BI__builtin_ia32_cvtpd2ps512_mask:
5767 case X86::BI__builtin_ia32_cmpb128_mask:
5768 case X86::BI__builtin_ia32_cmpw128_mask:
5769 case X86::BI__builtin_ia32_cmpd128_mask:
5770 case X86::BI__builtin_ia32_cmpq128_mask:
5771 case X86::BI__builtin_ia32_cmpb256_mask:
5772 case X86::BI__builtin_ia32_cmpw256_mask:
5773 case X86::BI__builtin_ia32_cmpd256_mask:
5774 case X86::BI__builtin_ia32_cmpq256_mask:
5775 case X86::BI__builtin_ia32_cmpb512_mask:
5776 case X86::BI__builtin_ia32_cmpw512_mask:
5777 case X86::BI__builtin_ia32_cmpd512_mask:
5778 case X86::BI__builtin_ia32_cmpq512_mask:
5782 case X86::BI__builtin_ia32_ucmpb128_mask:
5783 case X86::BI__builtin_ia32_ucmpw128_mask:
5784 case X86::BI__builtin_ia32_ucmpd128_mask:
5785 case X86::BI__builtin_ia32_ucmpq128_mask:
5786 case X86::BI__builtin_ia32_ucmpb256_mask:
5787 case X86::BI__builtin_ia32_ucmpw256_mask:
5788 case X86::BI__builtin_ia32_ucmpd256_mask:
5789 case X86::BI__builtin_ia32_ucmpq256_mask:
5790 case X86::BI__builtin_ia32_ucmpb512_mask:
5791 case X86::BI__builtin_ia32_ucmpw512_mask:
5792 case X86::BI__builtin_ia32_ucmpd512_mask:
5793 case X86::BI__builtin_ia32_ucmpq512_mask:
5797 case X86::BI__builtin_ia32_vpshufbitqmb128_mask:
5798 case X86::BI__builtin_ia32_vpshufbitqmb256_mask:
5799 case X86::BI__builtin_ia32_vpshufbitqmb512_mask:
5802 case X86::BI__builtin_ia32_pslldqi128_byteshift:
5803 case X86::BI__builtin_ia32_pslldqi256_byteshift:
5804 case X86::BI__builtin_ia32_pslldqi512_byteshift:
5811 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
5812 unsigned LaneBase = (DstIdx / 16) * 16;
5813 unsigned LaneIdx = DstIdx % 16;
5814 if (LaneIdx < Shift)
5815 return std::make_pair(0, -1);
5817 return std::make_pair(0,
5818 static_cast<int>(LaneBase + LaneIdx - Shift));
5821 case X86::BI__builtin_ia32_psrldqi128_byteshift:
5822 case X86::BI__builtin_ia32_psrldqi256_byteshift:
5823 case X86::BI__builtin_ia32_psrldqi512_byteshift:
5830 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
5831 unsigned LaneBase = (DstIdx / 16) * 16;
5832 unsigned LaneIdx = DstIdx % 16;
5833 if (LaneIdx + Shift < 16)
5834 return std::make_pair(0,
5835 static_cast<int>(LaneBase + LaneIdx + Shift));
5837 return std::make_pair(0, -1);
5840 case X86::BI__builtin_ia32_palignr128:
5841 case X86::BI__builtin_ia32_palignr256:
5842 case X86::BI__builtin_ia32_palignr512:
5844 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Shift) {
5846 unsigned VecIdx = 1;
5849 int Lane = DstIdx / 16;
5850 int Offset = DstIdx % 16;
5853 unsigned ShiftedIdx = Offset + (Shift & 0xFF);
5854 if (ShiftedIdx < 16) {
5855 ElemIdx = ShiftedIdx + (Lane * 16);
5856 }
else if (ShiftedIdx < 32) {
5858 ElemIdx = (ShiftedIdx - 16) + (Lane * 16);
5861 return std::pair<unsigned, int>{VecIdx, ElemIdx};
5864 case X86::BI__builtin_ia32_alignd128:
5865 case X86::BI__builtin_ia32_alignd256:
5866 case X86::BI__builtin_ia32_alignd512:
5867 case X86::BI__builtin_ia32_alignq128:
5868 case X86::BI__builtin_ia32_alignq256:
5869 case X86::BI__builtin_ia32_alignq512: {
5870 unsigned NumElems =
Call->getType()->castAs<
VectorType>()->getNumElements();
5872 S, OpPC,
Call, [NumElems](
unsigned DstIdx,
unsigned Shift) {
5873 unsigned Imm = Shift & 0xFF;
5874 unsigned EffectiveShift = Imm & (NumElems - 1);
5875 unsigned SourcePos = DstIdx + EffectiveShift;
5876 unsigned VecIdx = SourcePos < NumElems ? 1u : 0u;
5877 unsigned ElemIdx = SourcePos & (NumElems - 1);
5878 return std::pair<unsigned, int>{VecIdx,
static_cast<int>(ElemIdx)};
5882 case clang::X86::BI__builtin_ia32_minps:
5883 case clang::X86::BI__builtin_ia32_minpd:
5884 case clang::X86::BI__builtin_ia32_minph128:
5885 case clang::X86::BI__builtin_ia32_minph256:
5886 case clang::X86::BI__builtin_ia32_minps256:
5887 case clang::X86::BI__builtin_ia32_minpd256:
5888 case clang::X86::BI__builtin_ia32_minps512:
5889 case clang::X86::BI__builtin_ia32_minpd512:
5890 case clang::X86::BI__builtin_ia32_minph512:
5894 std::optional<APSInt>) -> std::optional<APFloat> {
5895 if (A.isNaN() || A.isInfinity() || A.isDenormal() || B.isNaN() ||
5896 B.isInfinity() || B.isDenormal())
5897 return std::nullopt;
5898 if (A.isZero() && B.isZero())
5900 return llvm::minimum(A, B);
5903 case clang::X86::BI__builtin_ia32_minss:
5904 case clang::X86::BI__builtin_ia32_minsd:
5908 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
5913 case clang::X86::BI__builtin_ia32_minsd_round_mask:
5914 case clang::X86::BI__builtin_ia32_minss_round_mask:
5915 case clang::X86::BI__builtin_ia32_minsh_round_mask:
5916 case clang::X86::BI__builtin_ia32_maxsd_round_mask:
5917 case clang::X86::BI__builtin_ia32_maxss_round_mask:
5918 case clang::X86::BI__builtin_ia32_maxsh_round_mask: {
5919 bool IsMin = BuiltinID == clang::X86::BI__builtin_ia32_minsd_round_mask ||
5920 BuiltinID == clang::X86::BI__builtin_ia32_minss_round_mask ||
5921 BuiltinID == clang::X86::BI__builtin_ia32_minsh_round_mask;
5925 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
5930 case clang::X86::BI__builtin_ia32_maxps:
5931 case clang::X86::BI__builtin_ia32_maxpd:
5932 case clang::X86::BI__builtin_ia32_maxph128:
5933 case clang::X86::BI__builtin_ia32_maxph256:
5934 case clang::X86::BI__builtin_ia32_maxps256:
5935 case clang::X86::BI__builtin_ia32_maxpd256:
5936 case clang::X86::BI__builtin_ia32_maxps512:
5937 case clang::X86::BI__builtin_ia32_maxpd512:
5938 case clang::X86::BI__builtin_ia32_maxph512:
5942 std::optional<APSInt>) -> std::optional<APFloat> {
5943 if (A.isNaN() || A.isInfinity() || A.isDenormal() || B.isNaN() ||
5944 B.isInfinity() || B.isDenormal())
5945 return std::nullopt;
5946 if (A.isZero() && B.isZero())
5948 return llvm::maximum(A, B);
5951 case clang::X86::BI__builtin_ia32_maxss:
5952 case clang::X86::BI__builtin_ia32_maxsd:
5956 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
5963 diag::note_invalid_subexpr_in_const_expr)
5969 llvm_unreachable(
"Unhandled builtin ID");