4425 uint32_t BuiltinID) {
4430 switch (BuiltinID) {
4431 case Builtin::BI__builtin_is_constant_evaluated:
4434 case Builtin::BI__builtin_assume:
4435 case Builtin::BI__assume:
4438 case Builtin::BI__builtin_strcmp:
4439 case Builtin::BIstrcmp:
4440 case Builtin::BI__builtin_strncmp:
4441 case Builtin::BIstrncmp:
4442 case Builtin::BI__builtin_wcsncmp:
4443 case Builtin::BIwcsncmp:
4444 case Builtin::BI__builtin_wcscmp:
4445 case Builtin::BIwcscmp:
4448 case Builtin::BI__builtin_strlen:
4449 case Builtin::BIstrlen:
4450 case Builtin::BI__builtin_wcslen:
4451 case Builtin::BIwcslen:
4454 case Builtin::BI__builtin_nan:
4455 case Builtin::BI__builtin_nanf:
4456 case Builtin::BI__builtin_nanl:
4457 case Builtin::BI__builtin_nanf16:
4458 case Builtin::BI__builtin_nanf128:
4461 case Builtin::BI__builtin_nans:
4462 case Builtin::BI__builtin_nansf:
4463 case Builtin::BI__builtin_nansl:
4464 case Builtin::BI__builtin_nansf16:
4465 case Builtin::BI__builtin_nansf128:
4468 case Builtin::BI__builtin_huge_val:
4469 case Builtin::BI__builtin_huge_valf:
4470 case Builtin::BI__builtin_huge_vall:
4471 case Builtin::BI__builtin_huge_valf16:
4472 case Builtin::BI__builtin_huge_valf128:
4473 case Builtin::BI__builtin_inf:
4474 case Builtin::BI__builtin_inff:
4475 case Builtin::BI__builtin_infl:
4476 case Builtin::BI__builtin_inff16:
4477 case Builtin::BI__builtin_inff128:
4480 case Builtin::BI__builtin_copysign:
4481 case Builtin::BI__builtin_copysignf:
4482 case Builtin::BI__builtin_copysignl:
4483 case Builtin::BI__builtin_copysignf128:
4486 case Builtin::BI__builtin_fmin:
4487 case Builtin::BI__builtin_fminf:
4488 case Builtin::BI__builtin_fminl:
4489 case Builtin::BI__builtin_fminf16:
4490 case Builtin::BI__builtin_fminf128:
4493 case Builtin::BI__builtin_fminimum_num:
4494 case Builtin::BI__builtin_fminimum_numf:
4495 case Builtin::BI__builtin_fminimum_numl:
4496 case Builtin::BI__builtin_fminimum_numf16:
4497 case Builtin::BI__builtin_fminimum_numf128:
4500 case Builtin::BI__builtin_fmax:
4501 case Builtin::BI__builtin_fmaxf:
4502 case Builtin::BI__builtin_fmaxl:
4503 case Builtin::BI__builtin_fmaxf16:
4504 case Builtin::BI__builtin_fmaxf128:
4507 case Builtin::BI__builtin_fmaximum_num:
4508 case Builtin::BI__builtin_fmaximum_numf:
4509 case Builtin::BI__builtin_fmaximum_numl:
4510 case Builtin::BI__builtin_fmaximum_numf16:
4511 case Builtin::BI__builtin_fmaximum_numf128:
4514 case Builtin::BI__builtin_isnan:
4517 case Builtin::BI__builtin_issignaling:
4520 case Builtin::BI__builtin_isinf:
4523 case Builtin::BI__builtin_isinf_sign:
4526 case Builtin::BI__builtin_isfinite:
4529 case Builtin::BI__builtin_isnormal:
4532 case Builtin::BI__builtin_issubnormal:
4535 case Builtin::BI__builtin_iszero:
4538 case Builtin::BI__builtin_signbit:
4539 case Builtin::BI__builtin_signbitf:
4540 case Builtin::BI__builtin_signbitl:
4543 case Builtin::BI__builtin_isgreater:
4544 case Builtin::BI__builtin_isgreaterequal:
4545 case Builtin::BI__builtin_isless:
4546 case Builtin::BI__builtin_islessequal:
4547 case Builtin::BI__builtin_islessgreater:
4548 case Builtin::BI__builtin_isunordered:
4551 case Builtin::BI__builtin_isfpclass:
4554 case Builtin::BI__builtin_fpclassify:
4557 case Builtin::BI__builtin_fabs:
4558 case Builtin::BI__builtin_fabsf:
4559 case Builtin::BI__builtin_fabsl:
4560 case Builtin::BI__builtin_fabsf128:
4563 case Builtin::BI__builtin_abs:
4564 case Builtin::BI__builtin_labs:
4565 case Builtin::BI__builtin_llabs:
4568 case Builtin::BI__builtin_popcount:
4569 case Builtin::BI__builtin_popcountl:
4570 case Builtin::BI__builtin_popcountll:
4571 case Builtin::BI__builtin_popcountg:
4572 case Builtin::BI__popcnt16:
4573 case Builtin::BI__popcnt:
4574 case Builtin::BI__popcnt64:
4577 case Builtin::BI__builtin_parity:
4578 case Builtin::BI__builtin_parityl:
4579 case Builtin::BI__builtin_parityll:
4582 return APInt(Val.getBitWidth(), Val.popcount() % 2);
4584 case Builtin::BI__builtin_clrsb:
4585 case Builtin::BI__builtin_clrsbl:
4586 case Builtin::BI__builtin_clrsbll:
4589 return APInt(Val.getBitWidth(),
4590 Val.getBitWidth() - Val.getSignificantBits());
4592 case Builtin::BI__builtin_bitreverseg:
4593 case Builtin::BI__builtin_bitreverse8:
4594 case Builtin::BI__builtin_bitreverse16:
4595 case Builtin::BI__builtin_bitreverse32:
4596 case Builtin::BI__builtin_bitreverse64:
4598 S, OpPC,
Call, [](
const APSInt &Val) {
return Val.reverseBits(); });
4600 case Builtin::BI__builtin_classify_type:
4603 case Builtin::BI__builtin_expect:
4604 case Builtin::BI__builtin_expect_with_probability:
4607 case Builtin::BI__builtin_rotateleft8:
4608 case Builtin::BI__builtin_rotateleft16:
4609 case Builtin::BI__builtin_rotateleft32:
4610 case Builtin::BI__builtin_rotateleft64:
4611 case Builtin::BI__builtin_stdc_rotate_left:
4612 case Builtin::BI_rotl8:
4613 case Builtin::BI_rotl16:
4614 case Builtin::BI_rotl:
4615 case Builtin::BI_lrotl:
4616 case Builtin::BI_rotl64:
4617 case Builtin::BI__builtin_rotateright8:
4618 case Builtin::BI__builtin_rotateright16:
4619 case Builtin::BI__builtin_rotateright32:
4620 case Builtin::BI__builtin_rotateright64:
4621 case Builtin::BI__builtin_stdc_rotate_right:
4622 case Builtin::BI_rotr8:
4623 case Builtin::BI_rotr16:
4624 case Builtin::BI_rotr:
4625 case Builtin::BI_lrotr:
4626 case Builtin::BI_rotr64: {
4629 switch (BuiltinID) {
4630 case Builtin::BI__builtin_rotateright8:
4631 case Builtin::BI__builtin_rotateright16:
4632 case Builtin::BI__builtin_rotateright32:
4633 case Builtin::BI__builtin_rotateright64:
4634 case Builtin::BI__builtin_stdc_rotate_right:
4635 case Builtin::BI_rotr8:
4636 case Builtin::BI_rotr16:
4637 case Builtin::BI_rotr:
4638 case Builtin::BI_lrotr:
4639 case Builtin::BI_rotr64:
4640 IsRotateRight =
true;
4643 IsRotateRight =
false;
4650 return IsRotateRight ?
Value.rotr(Amount.getZExtValue())
4651 :
Value.rotl(Amount.getZExtValue());
4655 case Builtin::BIstdc_leading_zeros_uc:
4656 case Builtin::BIstdc_leading_zeros_us:
4657 case Builtin::BIstdc_leading_zeros_ui:
4658 case Builtin::BIstdc_leading_zeros_ul:
4659 case Builtin::BIstdc_leading_zeros_ull:
4660 case Builtin::BIstdc_leading_zeros:
4661 case Builtin::BI__builtin_stdc_leading_zeros: {
4664 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4665 return APInt(ResWidth, Val.countl_zero());
4669 case Builtin::BIstdc_leading_ones_uc:
4670 case Builtin::BIstdc_leading_ones_us:
4671 case Builtin::BIstdc_leading_ones_ui:
4672 case Builtin::BIstdc_leading_ones_ul:
4673 case Builtin::BIstdc_leading_ones_ull:
4674 case Builtin::BIstdc_leading_ones:
4675 case Builtin::BI__builtin_stdc_leading_ones: {
4678 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4679 return APInt(ResWidth, Val.countl_one());
4683 case Builtin::BIstdc_trailing_zeros_uc:
4684 case Builtin::BIstdc_trailing_zeros_us:
4685 case Builtin::BIstdc_trailing_zeros_ui:
4686 case Builtin::BIstdc_trailing_zeros_ul:
4687 case Builtin::BIstdc_trailing_zeros_ull:
4688 case Builtin::BIstdc_trailing_zeros:
4689 case Builtin::BI__builtin_stdc_trailing_zeros: {
4692 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4693 return APInt(ResWidth, Val.countr_zero());
4697 case Builtin::BIstdc_trailing_ones_uc:
4698 case Builtin::BIstdc_trailing_ones_us:
4699 case Builtin::BIstdc_trailing_ones_ui:
4700 case Builtin::BIstdc_trailing_ones_ul:
4701 case Builtin::BIstdc_trailing_ones_ull:
4702 case Builtin::BIstdc_trailing_ones:
4703 case Builtin::BI__builtin_stdc_trailing_ones: {
4706 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4707 return APInt(ResWidth, Val.countr_one());
4711 case Builtin::BIstdc_first_leading_zero_uc:
4712 case Builtin::BIstdc_first_leading_zero_us:
4713 case Builtin::BIstdc_first_leading_zero_ui:
4714 case Builtin::BIstdc_first_leading_zero_ul:
4715 case Builtin::BIstdc_first_leading_zero_ull:
4716 case Builtin::BIstdc_first_leading_zero:
4717 case Builtin::BI__builtin_stdc_first_leading_zero: {
4720 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4721 return APInt(ResWidth, Val.isAllOnes() ? 0 : Val.countl_one() + 1);
4725 case Builtin::BIstdc_first_leading_one_uc:
4726 case Builtin::BIstdc_first_leading_one_us:
4727 case Builtin::BIstdc_first_leading_one_ui:
4728 case Builtin::BIstdc_first_leading_one_ul:
4729 case Builtin::BIstdc_first_leading_one_ull:
4730 case Builtin::BIstdc_first_leading_one:
4731 case Builtin::BI__builtin_stdc_first_leading_one: {
4734 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4735 return APInt(ResWidth, Val.isZero() ? 0 : Val.countl_zero() + 1);
4739 case Builtin::BIstdc_first_trailing_zero_uc:
4740 case Builtin::BIstdc_first_trailing_zero_us:
4741 case Builtin::BIstdc_first_trailing_zero_ui:
4742 case Builtin::BIstdc_first_trailing_zero_ul:
4743 case Builtin::BIstdc_first_trailing_zero_ull:
4744 case Builtin::BIstdc_first_trailing_zero:
4745 case Builtin::BI__builtin_stdc_first_trailing_zero: {
4748 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4749 return APInt(ResWidth, Val.isAllOnes() ? 0 : Val.countr_one() + 1);
4753 case Builtin::BIstdc_first_trailing_one_uc:
4754 case Builtin::BIstdc_first_trailing_one_us:
4755 case Builtin::BIstdc_first_trailing_one_ui:
4756 case Builtin::BIstdc_first_trailing_one_ul:
4757 case Builtin::BIstdc_first_trailing_one_ull:
4758 case Builtin::BIstdc_first_trailing_one:
4759 case Builtin::BI__builtin_stdc_first_trailing_one: {
4762 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4763 return APInt(ResWidth, Val.isZero() ? 0 : Val.countr_zero() + 1);
4767 case Builtin::BIstdc_count_zeros_uc:
4768 case Builtin::BIstdc_count_zeros_us:
4769 case Builtin::BIstdc_count_zeros_ui:
4770 case Builtin::BIstdc_count_zeros_ul:
4771 case Builtin::BIstdc_count_zeros_ull:
4772 case Builtin::BIstdc_count_zeros:
4773 case Builtin::BI__builtin_stdc_count_zeros: {
4776 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4777 unsigned BitWidth = Val.getBitWidth();
4778 return APInt(ResWidth, BitWidth - Val.popcount());
4782 case Builtin::BIstdc_count_ones_uc:
4783 case Builtin::BIstdc_count_ones_us:
4784 case Builtin::BIstdc_count_ones_ui:
4785 case Builtin::BIstdc_count_ones_ul:
4786 case Builtin::BIstdc_count_ones_ull:
4787 case Builtin::BIstdc_count_ones:
4788 case Builtin::BI__builtin_stdc_count_ones: {
4791 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4792 return APInt(ResWidth, Val.popcount());
4796 case Builtin::BIstdc_has_single_bit_uc:
4797 case Builtin::BIstdc_has_single_bit_us:
4798 case Builtin::BIstdc_has_single_bit_ui:
4799 case Builtin::BIstdc_has_single_bit_ul:
4800 case Builtin::BIstdc_has_single_bit_ull:
4801 case Builtin::BIstdc_has_single_bit:
4802 case Builtin::BI__builtin_stdc_has_single_bit: {
4805 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4806 return APInt(ResWidth, Val.popcount() == 1 ? 1 : 0);
4810 case Builtin::BIstdc_bit_width_uc:
4811 case Builtin::BIstdc_bit_width_us:
4812 case Builtin::BIstdc_bit_width_ui:
4813 case Builtin::BIstdc_bit_width_ul:
4814 case Builtin::BIstdc_bit_width_ull:
4815 case Builtin::BIstdc_bit_width:
4816 case Builtin::BI__builtin_stdc_bit_width: {
4819 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
4820 unsigned BitWidth = Val.getBitWidth();
4821 return APInt(ResWidth, BitWidth - Val.countl_zero());
4825 case Builtin::BIstdc_bit_floor_uc:
4826 case Builtin::BIstdc_bit_floor_us:
4827 case Builtin::BIstdc_bit_floor_ui:
4828 case Builtin::BIstdc_bit_floor_ul:
4829 case Builtin::BIstdc_bit_floor_ull:
4830 case Builtin::BIstdc_bit_floor:
4831 case Builtin::BI__builtin_stdc_bit_floor:
4834 unsigned BitWidth = Val.getBitWidth();
4836 return APInt::getZero(BitWidth);
4837 return APInt::getOneBitSet(BitWidth,
4838 BitWidth - Val.countl_zero() - 1);
4841 case Builtin::BIstdc_bit_ceil_uc:
4842 case Builtin::BIstdc_bit_ceil_us:
4843 case Builtin::BIstdc_bit_ceil_ui:
4844 case Builtin::BIstdc_bit_ceil_ul:
4845 case Builtin::BIstdc_bit_ceil_ull:
4846 case Builtin::BIstdc_bit_ceil:
4847 case Builtin::BI__builtin_stdc_bit_ceil:
4850 unsigned BitWidth = Val.getBitWidth();
4852 return APInt(BitWidth, 1);
4854 APInt ValMinusOne =
V - 1;
4855 unsigned LeadingZeros = ValMinusOne.countl_zero();
4856 if (LeadingZeros == 0)
4857 return APInt(BitWidth, 0);
4858 return APInt::getOneBitSet(BitWidth, BitWidth - LeadingZeros);
4861 case Builtin::BI__builtin_ffs:
4862 case Builtin::BI__builtin_ffsl:
4863 case Builtin::BI__builtin_ffsll:
4866 return APInt(Val.getBitWidth(),
4867 Val.isZero() ? 0u : Val.countTrailingZeros() + 1u);
4870 case Builtin::BIaddressof:
4871 case Builtin::BI__addressof:
4872 case Builtin::BI__builtin_addressof:
4876 case Builtin::BIas_const:
4877 case Builtin::BIforward:
4878 case Builtin::BIforward_like:
4879 case Builtin::BImove:
4880 case Builtin::BImove_if_noexcept:
4884 case Builtin::BI__builtin_eh_return_data_regno:
4887 case Builtin::BI__builtin_launder:
4891 case Builtin::BI__builtin_add_overflow:
4892 case Builtin::BI__builtin_sub_overflow:
4893 case Builtin::BI__builtin_mul_overflow:
4894 case Builtin::BI__builtin_sadd_overflow:
4895 case Builtin::BI__builtin_uadd_overflow:
4896 case Builtin::BI__builtin_uaddl_overflow:
4897 case Builtin::BI__builtin_uaddll_overflow:
4898 case Builtin::BI__builtin_usub_overflow:
4899 case Builtin::BI__builtin_usubl_overflow:
4900 case Builtin::BI__builtin_usubll_overflow:
4901 case Builtin::BI__builtin_umul_overflow:
4902 case Builtin::BI__builtin_umull_overflow:
4903 case Builtin::BI__builtin_umulll_overflow:
4904 case Builtin::BI__builtin_saddl_overflow:
4905 case Builtin::BI__builtin_saddll_overflow:
4906 case Builtin::BI__builtin_ssub_overflow:
4907 case Builtin::BI__builtin_ssubl_overflow:
4908 case Builtin::BI__builtin_ssubll_overflow:
4909 case Builtin::BI__builtin_smul_overflow:
4910 case Builtin::BI__builtin_smull_overflow:
4911 case Builtin::BI__builtin_smulll_overflow:
4914 case Builtin::BI__builtin_addcb:
4915 case Builtin::BI__builtin_addcs:
4916 case Builtin::BI__builtin_addc:
4917 case Builtin::BI__builtin_addcl:
4918 case Builtin::BI__builtin_addcll:
4919 case Builtin::BI__builtin_subcb:
4920 case Builtin::BI__builtin_subcs:
4921 case Builtin::BI__builtin_subc:
4922 case Builtin::BI__builtin_subcl:
4923 case Builtin::BI__builtin_subcll:
4926 case Builtin::BI__builtin_clz:
4927 case Builtin::BI__builtin_clzl:
4928 case Builtin::BI__builtin_clzll:
4929 case Builtin::BI__builtin_clzs:
4930 case Builtin::BI__builtin_clzg:
4931 case Builtin::BI__lzcnt16:
4932 case Builtin::BI__lzcnt:
4933 case Builtin::BI__lzcnt64:
4936 case Builtin::BI__builtin_ctz:
4937 case Builtin::BI__builtin_ctzl:
4938 case Builtin::BI__builtin_ctzll:
4939 case Builtin::BI__builtin_ctzs:
4940 case Builtin::BI__builtin_ctzg:
4943 case Builtin::BI__builtin_elementwise_clzg:
4944 case Builtin::BI__builtin_elementwise_ctzg:
4947 case Builtin::BI__builtin_bswapg:
4948 case Builtin::BI__builtin_bswap16:
4949 case Builtin::BI__builtin_bswap32:
4950 case Builtin::BI__builtin_bswap64:
4953 case Builtin::BI__atomic_always_lock_free:
4954 case Builtin::BI__atomic_is_lock_free:
4957 case Builtin::BI__c11_atomic_is_lock_free:
4960 case Builtin::BI__builtin_complex:
4963 case Builtin::BI__builtin_is_aligned:
4964 case Builtin::BI__builtin_align_up:
4965 case Builtin::BI__builtin_align_down:
4968 case Builtin::BI__builtin_assume_aligned:
4971 case clang::X86::BI__builtin_ia32_crc32qi:
4973 case clang::X86::BI__builtin_ia32_crc32hi:
4975 case clang::X86::BI__builtin_ia32_crc32si:
4977 case clang::X86::BI__builtin_ia32_crc32di:
4980 case clang::X86::BI__builtin_ia32_bextr_u32:
4981 case clang::X86::BI__builtin_ia32_bextr_u64:
4982 case clang::X86::BI__builtin_ia32_bextri_u32:
4983 case clang::X86::BI__builtin_ia32_bextri_u64:
4986 unsigned BitWidth = Val.getBitWidth();
4987 uint64_t Shift = Idx.extractBitsAsZExtValue(8, 0);
4988 uint64_t Length = Idx.extractBitsAsZExtValue(8, 8);
4989 if (Length > BitWidth) {
4994 if (Length == 0 || Shift >= BitWidth)
4995 return APInt(BitWidth, 0);
4997 uint64_t
Result = Val.getZExtValue() >> Shift;
4998 Result &= llvm::maskTrailingOnes<uint64_t>(Length);
5002 case clang::X86::BI__builtin_ia32_bzhi_si:
5003 case clang::X86::BI__builtin_ia32_bzhi_di:
5006 unsigned BitWidth = Val.getBitWidth();
5007 uint64_t Index = Idx.extractBitsAsZExtValue(8, 0);
5010 if (Index < BitWidth)
5011 Result.clearHighBits(BitWidth - Index);
5016 case clang::X86::BI__builtin_ia32_ktestcqi:
5017 case clang::X86::BI__builtin_ia32_ktestchi:
5018 case clang::X86::BI__builtin_ia32_ktestcsi:
5019 case clang::X86::BI__builtin_ia32_ktestcdi:
5022 return APInt(
sizeof(
unsigned char) * 8, (~A & B) == 0);
5025 case clang::X86::BI__builtin_ia32_ktestzqi:
5026 case clang::X86::BI__builtin_ia32_ktestzhi:
5027 case clang::X86::BI__builtin_ia32_ktestzsi:
5028 case clang::X86::BI__builtin_ia32_ktestzdi:
5031 return APInt(
sizeof(
unsigned char) * 8, (A & B) == 0);
5034 case clang::X86::BI__builtin_ia32_kortestcqi:
5035 case clang::X86::BI__builtin_ia32_kortestchi:
5036 case clang::X86::BI__builtin_ia32_kortestcsi:
5037 case clang::X86::BI__builtin_ia32_kortestcdi:
5040 return APInt(
sizeof(
unsigned char) * 8, ~(A | B) == 0);
5043 case clang::X86::BI__builtin_ia32_kortestzqi:
5044 case clang::X86::BI__builtin_ia32_kortestzhi:
5045 case clang::X86::BI__builtin_ia32_kortestzsi:
5046 case clang::X86::BI__builtin_ia32_kortestzdi:
5049 return APInt(
sizeof(
unsigned char) * 8, (A | B) == 0);
5052 case clang::X86::BI__builtin_ia32_kshiftliqi:
5053 case clang::X86::BI__builtin_ia32_kshiftlihi:
5054 case clang::X86::BI__builtin_ia32_kshiftlisi:
5055 case clang::X86::BI__builtin_ia32_kshiftlidi:
5058 unsigned Amt = RHS.getZExtValue() & 0xFF;
5059 if (Amt >= LHS.getBitWidth())
5060 return APInt::getZero(LHS.getBitWidth());
5061 return LHS.shl(Amt);
5064 case clang::X86::BI__builtin_ia32_kshiftriqi:
5065 case clang::X86::BI__builtin_ia32_kshiftrihi:
5066 case clang::X86::BI__builtin_ia32_kshiftrisi:
5067 case clang::X86::BI__builtin_ia32_kshiftridi:
5070 unsigned Amt = RHS.getZExtValue() & 0xFF;
5071 if (Amt >= LHS.getBitWidth())
5072 return APInt::getZero(LHS.getBitWidth());
5073 return LHS.lshr(Amt);
5076 case clang::X86::BI__builtin_ia32_lzcnt_u16:
5077 case clang::X86::BI__builtin_ia32_lzcnt_u32:
5078 case clang::X86::BI__builtin_ia32_lzcnt_u64:
5081 return APInt(Src.getBitWidth(), Src.countLeadingZeros());
5084 case clang::X86::BI__builtin_ia32_tzcnt_u16:
5085 case clang::X86::BI__builtin_ia32_tzcnt_u32:
5086 case clang::X86::BI__builtin_ia32_tzcnt_u64:
5089 return APInt(Src.getBitWidth(), Src.countTrailingZeros());
5092 case clang::X86::BI__builtin_ia32_pdep_si:
5093 case clang::X86::BI__builtin_ia32_pdep_di:
5096 unsigned BitWidth = Val.getBitWidth();
5099 for (
unsigned I = 0, P = 0; I != BitWidth; ++I) {
5101 Result.setBitVal(I, Val[P++]);
5107 case clang::X86::BI__builtin_ia32_pext_si:
5108 case clang::X86::BI__builtin_ia32_pext_di:
5111 unsigned BitWidth = Val.getBitWidth();
5114 for (
unsigned I = 0, P = 0; I != BitWidth; ++I) {
5116 Result.setBitVal(P++, Val[I]);
5122 case clang::X86::BI__builtin_ia32_addcarryx_u32:
5123 case clang::X86::BI__builtin_ia32_addcarryx_u64:
5124 case clang::X86::BI__builtin_ia32_subborrow_u32:
5125 case clang::X86::BI__builtin_ia32_subborrow_u64:
5129 case Builtin::BI__builtin_os_log_format_buffer_size:
5132 case Builtin::BI__builtin_ptrauth_string_discriminator:
5135 case Builtin::BI__builtin_infer_alloc_token:
5138 case Builtin::BI__noop:
5142 case Builtin::BI__builtin_operator_new:
5145 case Builtin::BI__builtin_operator_delete:
5148 case Builtin::BI__arithmetic_fence:
5151 case Builtin::BI__builtin_reduce_add:
5152 case Builtin::BI__builtin_reduce_mul:
5153 case Builtin::BI__builtin_reduce_and:
5154 case Builtin::BI__builtin_reduce_or:
5155 case Builtin::BI__builtin_reduce_xor:
5156 case Builtin::BI__builtin_reduce_min:
5157 case Builtin::BI__builtin_reduce_max:
5160 case Builtin::BI__builtin_elementwise_popcount:
5163 return APInt(Src.getBitWidth(), Src.popcount());
5165 case Builtin::BI__builtin_elementwise_bitreverse:
5167 S, OpPC,
Call, [](
const APSInt &Src) {
return Src.reverseBits(); });
5169 case Builtin::BI__builtin_elementwise_abs:
5172 case Builtin::BI__builtin_memcpy:
5173 case Builtin::BImemcpy:
5174 case Builtin::BI__builtin_wmemcpy:
5175 case Builtin::BIwmemcpy:
5176 case Builtin::BI__builtin_memmove:
5177 case Builtin::BImemmove:
5178 case Builtin::BI__builtin_wmemmove:
5179 case Builtin::BIwmemmove:
5182 case Builtin::BI__builtin_memcmp:
5183 case Builtin::BImemcmp:
5184 case Builtin::BI__builtin_bcmp:
5185 case Builtin::BIbcmp:
5186 case Builtin::BI__builtin_wmemcmp:
5187 case Builtin::BIwmemcmp:
5190 case Builtin::BImemchr:
5191 case Builtin::BI__builtin_memchr:
5192 case Builtin::BIstrchr:
5193 case Builtin::BI__builtin_strchr:
5194 case Builtin::BIwmemchr:
5195 case Builtin::BI__builtin_wmemchr:
5196 case Builtin::BIwcschr:
5197 case Builtin::BI__builtin_wcschr:
5198 case Builtin::BI__builtin_char_memchr:
5201 case Builtin::BI__builtin_object_size:
5202 case Builtin::BI__builtin_dynamic_object_size:
5205 case Builtin::BI__builtin_is_within_lifetime:
5208 case Builtin::BI__builtin_elementwise_add_sat:
5211 return LHS.isSigned() ? LHS.sadd_sat(RHS) : LHS.uadd_sat(RHS);
5214 case Builtin::BI__builtin_elementwise_sub_sat:
5217 return LHS.isSigned() ? LHS.ssub_sat(RHS) : LHS.usub_sat(RHS);
5219 case X86::BI__builtin_ia32_extract128i256:
5220 case X86::BI__builtin_ia32_vextractf128_pd256:
5221 case X86::BI__builtin_ia32_vextractf128_ps256:
5222 case X86::BI__builtin_ia32_vextractf128_si256:
5225 case X86::BI__builtin_ia32_extractf32x4_256_mask:
5226 case X86::BI__builtin_ia32_extractf32x4_mask:
5227 case X86::BI__builtin_ia32_extractf32x8_mask:
5228 case X86::BI__builtin_ia32_extractf64x2_256_mask:
5229 case X86::BI__builtin_ia32_extractf64x2_512_mask:
5230 case X86::BI__builtin_ia32_extractf64x4_mask:
5231 case X86::BI__builtin_ia32_extracti32x4_256_mask:
5232 case X86::BI__builtin_ia32_extracti32x4_mask:
5233 case X86::BI__builtin_ia32_extracti32x8_mask:
5234 case X86::BI__builtin_ia32_extracti64x2_256_mask:
5235 case X86::BI__builtin_ia32_extracti64x2_512_mask:
5236 case X86::BI__builtin_ia32_extracti64x4_mask:
5239 case clang::X86::BI__builtin_ia32_pmulhrsw128:
5240 case clang::X86::BI__builtin_ia32_pmulhrsw256:
5241 case clang::X86::BI__builtin_ia32_pmulhrsw512:
5244 return (llvm::APIntOps::mulsExtended(LHS, RHS).ashr(14) + 1)
5245 .extractBits(16, 1);
5248 case clang::X86::BI__builtin_ia32_movmskps:
5249 case clang::X86::BI__builtin_ia32_movmskpd:
5250 case clang::X86::BI__builtin_ia32_pmovmskb128:
5251 case clang::X86::BI__builtin_ia32_pmovmskb256:
5252 case clang::X86::BI__builtin_ia32_movmskps256:
5253 case clang::X86::BI__builtin_ia32_movmskpd256: {
5257 case X86::BI__builtin_ia32_psignb128:
5258 case X86::BI__builtin_ia32_psignb256:
5259 case X86::BI__builtin_ia32_psignw128:
5260 case X86::BI__builtin_ia32_psignw256:
5261 case X86::BI__builtin_ia32_psignd128:
5262 case X86::BI__builtin_ia32_psignd256:
5266 return APInt::getZero(AElem.getBitWidth());
5267 if (BElem.isNegative())
5272 case clang::X86::BI__builtin_ia32_pavgb128:
5273 case clang::X86::BI__builtin_ia32_pavgw128:
5274 case clang::X86::BI__builtin_ia32_pavgb256:
5275 case clang::X86::BI__builtin_ia32_pavgw256:
5276 case clang::X86::BI__builtin_ia32_pavgb512:
5277 case clang::X86::BI__builtin_ia32_pavgw512:
5279 llvm::APIntOps::avgCeilU);
5281 case clang::X86::BI__builtin_ia32_pmaddubsw128:
5282 case clang::X86::BI__builtin_ia32_pmaddubsw256:
5283 case clang::X86::BI__builtin_ia32_pmaddubsw512:
5288 unsigned BitWidth = 2 * LoLHS.getBitWidth();
5289 return (LoLHS.zext(BitWidth) * LoRHS.sext(BitWidth))
5290 .sadd_sat((HiLHS.zext(BitWidth) * HiRHS.sext(BitWidth)));
5293 case clang::X86::BI__builtin_ia32_pmaddwd128:
5294 case clang::X86::BI__builtin_ia32_pmaddwd256:
5295 case clang::X86::BI__builtin_ia32_pmaddwd512:
5300 unsigned BitWidth = 2 * LoLHS.getBitWidth();
5301 return (LoLHS.sext(BitWidth) * LoRHS.sext(BitWidth)) +
5302 (HiLHS.sext(BitWidth) * HiRHS.sext(BitWidth));
5305 case clang::X86::BI__builtin_ia32_dbpsadbw128:
5306 case clang::X86::BI__builtin_ia32_dbpsadbw256:
5307 case clang::X86::BI__builtin_ia32_dbpsadbw512:
5310 case clang::X86::BI__builtin_ia32_pmulhuw128:
5311 case clang::X86::BI__builtin_ia32_pmulhuw256:
5312 case clang::X86::BI__builtin_ia32_pmulhuw512:
5314 llvm::APIntOps::mulhu);
5316 case clang::X86::BI__builtin_ia32_pmulhw128:
5317 case clang::X86::BI__builtin_ia32_pmulhw256:
5318 case clang::X86::BI__builtin_ia32_pmulhw512:
5320 llvm::APIntOps::mulhs);
5322 case clang::X86::BI__builtin_ia32_psllv2di:
5323 case clang::X86::BI__builtin_ia32_psllv4di:
5324 case clang::X86::BI__builtin_ia32_psllv4si:
5325 case clang::X86::BI__builtin_ia32_psllv8di:
5326 case clang::X86::BI__builtin_ia32_psllv8hi:
5327 case clang::X86::BI__builtin_ia32_psllv8si:
5328 case clang::X86::BI__builtin_ia32_psllv16hi:
5329 case clang::X86::BI__builtin_ia32_psllv16si:
5330 case clang::X86::BI__builtin_ia32_psllv32hi:
5331 case clang::X86::BI__builtin_ia32_psllwi128:
5332 case clang::X86::BI__builtin_ia32_psllwi256:
5333 case clang::X86::BI__builtin_ia32_psllwi512:
5334 case clang::X86::BI__builtin_ia32_pslldi128:
5335 case clang::X86::BI__builtin_ia32_pslldi256:
5336 case clang::X86::BI__builtin_ia32_pslldi512:
5337 case clang::X86::BI__builtin_ia32_psllqi128:
5338 case clang::X86::BI__builtin_ia32_psllqi256:
5339 case clang::X86::BI__builtin_ia32_psllqi512:
5342 if (RHS.uge(LHS.getBitWidth())) {
5343 return APInt::getZero(LHS.getBitWidth());
5345 return LHS.shl(RHS.getZExtValue());
5348 case clang::X86::BI__builtin_ia32_psrav4si:
5349 case clang::X86::BI__builtin_ia32_psrav8di:
5350 case clang::X86::BI__builtin_ia32_psrav8hi:
5351 case clang::X86::BI__builtin_ia32_psrav8si:
5352 case clang::X86::BI__builtin_ia32_psrav16hi:
5353 case clang::X86::BI__builtin_ia32_psrav16si:
5354 case clang::X86::BI__builtin_ia32_psrav32hi:
5355 case clang::X86::BI__builtin_ia32_psravq128:
5356 case clang::X86::BI__builtin_ia32_psravq256:
5357 case clang::X86::BI__builtin_ia32_psrawi128:
5358 case clang::X86::BI__builtin_ia32_psrawi256:
5359 case clang::X86::BI__builtin_ia32_psrawi512:
5360 case clang::X86::BI__builtin_ia32_psradi128:
5361 case clang::X86::BI__builtin_ia32_psradi256:
5362 case clang::X86::BI__builtin_ia32_psradi512:
5363 case clang::X86::BI__builtin_ia32_psraqi128:
5364 case clang::X86::BI__builtin_ia32_psraqi256:
5365 case clang::X86::BI__builtin_ia32_psraqi512:
5368 if (RHS.uge(LHS.getBitWidth())) {
5369 return LHS.ashr(LHS.getBitWidth() - 1);
5371 return LHS.ashr(RHS.getZExtValue());
5374 case clang::X86::BI__builtin_ia32_psrlv2di:
5375 case clang::X86::BI__builtin_ia32_psrlv4di:
5376 case clang::X86::BI__builtin_ia32_psrlv4si:
5377 case clang::X86::BI__builtin_ia32_psrlv8di:
5378 case clang::X86::BI__builtin_ia32_psrlv8hi:
5379 case clang::X86::BI__builtin_ia32_psrlv8si:
5380 case clang::X86::BI__builtin_ia32_psrlv16hi:
5381 case clang::X86::BI__builtin_ia32_psrlv16si:
5382 case clang::X86::BI__builtin_ia32_psrlv32hi:
5383 case clang::X86::BI__builtin_ia32_psrlwi128:
5384 case clang::X86::BI__builtin_ia32_psrlwi256:
5385 case clang::X86::BI__builtin_ia32_psrlwi512:
5386 case clang::X86::BI__builtin_ia32_psrldi128:
5387 case clang::X86::BI__builtin_ia32_psrldi256:
5388 case clang::X86::BI__builtin_ia32_psrldi512:
5389 case clang::X86::BI__builtin_ia32_psrlqi128:
5390 case clang::X86::BI__builtin_ia32_psrlqi256:
5391 case clang::X86::BI__builtin_ia32_psrlqi512:
5394 if (RHS.uge(LHS.getBitWidth())) {
5395 return APInt::getZero(LHS.getBitWidth());
5397 return LHS.lshr(RHS.getZExtValue());
5399 case clang::X86::BI__builtin_ia32_packsswb128:
5400 case clang::X86::BI__builtin_ia32_packsswb256:
5401 case clang::X86::BI__builtin_ia32_packsswb512:
5402 case clang::X86::BI__builtin_ia32_packssdw128:
5403 case clang::X86::BI__builtin_ia32_packssdw256:
5404 case clang::X86::BI__builtin_ia32_packssdw512:
5406 return APInt(Src).truncSSat(Src.getBitWidth() / 2);
5408 case clang::X86::BI__builtin_ia32_packusdw128:
5409 case clang::X86::BI__builtin_ia32_packusdw256:
5410 case clang::X86::BI__builtin_ia32_packusdw512:
5411 case clang::X86::BI__builtin_ia32_packuswb128:
5412 case clang::X86::BI__builtin_ia32_packuswb256:
5413 case clang::X86::BI__builtin_ia32_packuswb512:
5415 return APInt(Src).truncSSatU(Src.getBitWidth() / 2);
5418 case clang::X86::BI__builtin_ia32_selectss_128:
5419 case clang::X86::BI__builtin_ia32_selectsd_128:
5420 case clang::X86::BI__builtin_ia32_selectsh_128:
5421 case clang::X86::BI__builtin_ia32_selectsbf_128:
5423 case clang::X86::BI__builtin_ia32_vprotbi:
5424 case clang::X86::BI__builtin_ia32_vprotdi:
5425 case clang::X86::BI__builtin_ia32_vprotqi:
5426 case clang::X86::BI__builtin_ia32_vprotwi:
5427 case clang::X86::BI__builtin_ia32_prold128:
5428 case clang::X86::BI__builtin_ia32_prold256:
5429 case clang::X86::BI__builtin_ia32_prold512:
5430 case clang::X86::BI__builtin_ia32_prolq128:
5431 case clang::X86::BI__builtin_ia32_prolq256:
5432 case clang::X86::BI__builtin_ia32_prolq512:
5435 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotl(RHS); });
5437 case clang::X86::BI__builtin_ia32_prord128:
5438 case clang::X86::BI__builtin_ia32_prord256:
5439 case clang::X86::BI__builtin_ia32_prord512:
5440 case clang::X86::BI__builtin_ia32_prorq128:
5441 case clang::X86::BI__builtin_ia32_prorq256:
5442 case clang::X86::BI__builtin_ia32_prorq512:
5445 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotr(RHS); });
5447 case Builtin::BI__builtin_elementwise_max:
5448 case Builtin::BI__builtin_elementwise_min:
5451 case clang::X86::BI__builtin_ia32_phaddw128:
5452 case clang::X86::BI__builtin_ia32_phaddw256:
5453 case clang::X86::BI__builtin_ia32_phaddd128:
5454 case clang::X86::BI__builtin_ia32_phaddd256:
5457 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
5458 case clang::X86::BI__builtin_ia32_phaddsw128:
5459 case clang::X86::BI__builtin_ia32_phaddsw256:
5462 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.sadd_sat(RHS); });
5463 case clang::X86::BI__builtin_ia32_phsubw128:
5464 case clang::X86::BI__builtin_ia32_phsubw256:
5465 case clang::X86::BI__builtin_ia32_phsubd128:
5466 case clang::X86::BI__builtin_ia32_phsubd256:
5469 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS - RHS; });
5470 case clang::X86::BI__builtin_ia32_phsubsw128:
5471 case clang::X86::BI__builtin_ia32_phsubsw256:
5474 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.ssub_sat(RHS); });
5475 case clang::X86::BI__builtin_ia32_haddpd:
5476 case clang::X86::BI__builtin_ia32_haddps:
5477 case clang::X86::BI__builtin_ia32_haddpd256:
5478 case clang::X86::BI__builtin_ia32_haddps256:
5481 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
5486 case clang::X86::BI__builtin_ia32_hsubpd:
5487 case clang::X86::BI__builtin_ia32_hsubps:
5488 case clang::X86::BI__builtin_ia32_hsubpd256:
5489 case clang::X86::BI__builtin_ia32_hsubps256:
5492 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
5494 F.subtract(RHS, RM);
5497 case clang::X86::BI__builtin_ia32_addsubpd:
5498 case clang::X86::BI__builtin_ia32_addsubps:
5499 case clang::X86::BI__builtin_ia32_addsubpd256:
5500 case clang::X86::BI__builtin_ia32_addsubps256:
5503 case clang::X86::BI__builtin_ia32_pmuldq128:
5504 case clang::X86::BI__builtin_ia32_pmuldq256:
5505 case clang::X86::BI__builtin_ia32_pmuldq512:
5510 return llvm::APIntOps::mulsExtended(LoLHS, LoRHS);
5513 case clang::X86::BI__builtin_ia32_pmuludq128:
5514 case clang::X86::BI__builtin_ia32_pmuludq256:
5515 case clang::X86::BI__builtin_ia32_pmuludq512:
5520 return llvm::APIntOps::muluExtended(LoLHS, LoRHS);
5523 case clang::X86::BI__builtin_ia32_pclmulqdq128:
5524 case clang::X86::BI__builtin_ia32_pclmulqdq256:
5525 case clang::X86::BI__builtin_ia32_pclmulqdq512:
5528 case Builtin::BI__builtin_elementwise_fma:
5532 llvm::RoundingMode RM) {
5534 F.fusedMultiplyAdd(Y, Z, RM);
5538 case X86::BI__builtin_ia32_vpmadd52luq128:
5539 case X86::BI__builtin_ia32_vpmadd52luq256:
5540 case X86::BI__builtin_ia32_vpmadd52luq512:
5543 return A + (B.trunc(52) *
C.trunc(52)).zext(64);
5545 case X86::BI__builtin_ia32_vpmadd52huq128:
5546 case X86::BI__builtin_ia32_vpmadd52huq256:
5547 case X86::BI__builtin_ia32_vpmadd52huq512:
5550 return A + llvm::APIntOps::mulhu(B.trunc(52),
C.trunc(52)).zext(64);
5553 case X86::BI__builtin_ia32_vpshldd128:
5554 case X86::BI__builtin_ia32_vpshldd256:
5555 case X86::BI__builtin_ia32_vpshldd512:
5556 case X86::BI__builtin_ia32_vpshldq128:
5557 case X86::BI__builtin_ia32_vpshldq256:
5558 case X86::BI__builtin_ia32_vpshldq512:
5559 case X86::BI__builtin_ia32_vpshldw128:
5560 case X86::BI__builtin_ia32_vpshldw256:
5561 case X86::BI__builtin_ia32_vpshldw512:
5565 return llvm::APIntOps::fshl(Hi, Lo, Amt);
5568 case X86::BI__builtin_ia32_vpshrdd128:
5569 case X86::BI__builtin_ia32_vpshrdd256:
5570 case X86::BI__builtin_ia32_vpshrdd512:
5571 case X86::BI__builtin_ia32_vpshrdq128:
5572 case X86::BI__builtin_ia32_vpshrdq256:
5573 case X86::BI__builtin_ia32_vpshrdq512:
5574 case X86::BI__builtin_ia32_vpshrdw128:
5575 case X86::BI__builtin_ia32_vpshrdw256:
5576 case X86::BI__builtin_ia32_vpshrdw512:
5581 return llvm::APIntOps::fshr(Hi, Lo, Amt);
5583 case X86::BI__builtin_ia32_vpconflictsi_128:
5584 case X86::BI__builtin_ia32_vpconflictsi_256:
5585 case X86::BI__builtin_ia32_vpconflictsi_512:
5586 case X86::BI__builtin_ia32_vpconflictdi_128:
5587 case X86::BI__builtin_ia32_vpconflictdi_256:
5588 case X86::BI__builtin_ia32_vpconflictdi_512:
5590 case X86::BI__builtin_ia32_compressdf128_mask:
5591 case X86::BI__builtin_ia32_compressdf256_mask:
5592 case X86::BI__builtin_ia32_compressdf512_mask:
5593 case X86::BI__builtin_ia32_compressdi128_mask:
5594 case X86::BI__builtin_ia32_compressdi256_mask:
5595 case X86::BI__builtin_ia32_compressdi512_mask:
5596 case X86::BI__builtin_ia32_compresshi128_mask:
5597 case X86::BI__builtin_ia32_compresshi256_mask:
5598 case X86::BI__builtin_ia32_compresshi512_mask:
5599 case X86::BI__builtin_ia32_compressqi128_mask:
5600 case X86::BI__builtin_ia32_compressqi256_mask:
5601 case X86::BI__builtin_ia32_compressqi512_mask:
5602 case X86::BI__builtin_ia32_compresssf128_mask:
5603 case X86::BI__builtin_ia32_compresssf256_mask:
5604 case X86::BI__builtin_ia32_compresssf512_mask:
5605 case X86::BI__builtin_ia32_compresssi128_mask:
5606 case X86::BI__builtin_ia32_compresssi256_mask:
5607 case X86::BI__builtin_ia32_compresssi512_mask: {
5609 Call->getArg(0)->getType()->castAs<
VectorType>()->getNumElements();
5611 S, OpPC,
Call, [NumElems](
unsigned DstIdx,
const APInt &ShuffleMask) {
5612 APInt CompressMask = ShuffleMask.trunc(NumElems);
5613 if (DstIdx < CompressMask.popcount()) {
5614 while (DstIdx != 0) {
5615 CompressMask = CompressMask & (CompressMask - 1);
5618 return std::pair<unsigned, int>{
5619 0,
static_cast<int>(CompressMask.countr_zero())};
5621 return std::pair<unsigned, int>{1,
static_cast<int>(DstIdx)};
5624 case X86::BI__builtin_ia32_expanddf128_mask:
5625 case X86::BI__builtin_ia32_expanddf256_mask:
5626 case X86::BI__builtin_ia32_expanddf512_mask:
5627 case X86::BI__builtin_ia32_expanddi128_mask:
5628 case X86::BI__builtin_ia32_expanddi256_mask:
5629 case X86::BI__builtin_ia32_expanddi512_mask:
5630 case X86::BI__builtin_ia32_expandhi128_mask:
5631 case X86::BI__builtin_ia32_expandhi256_mask:
5632 case X86::BI__builtin_ia32_expandhi512_mask:
5633 case X86::BI__builtin_ia32_expandqi128_mask:
5634 case X86::BI__builtin_ia32_expandqi256_mask:
5635 case X86::BI__builtin_ia32_expandqi512_mask:
5636 case X86::BI__builtin_ia32_expandsf128_mask:
5637 case X86::BI__builtin_ia32_expandsf256_mask:
5638 case X86::BI__builtin_ia32_expandsf512_mask:
5639 case X86::BI__builtin_ia32_expandsi128_mask:
5640 case X86::BI__builtin_ia32_expandsi256_mask:
5641 case X86::BI__builtin_ia32_expandsi512_mask: {
5643 S, OpPC,
Call, [](
unsigned DstIdx,
const APInt &ShuffleMask) {
5646 APInt ExpandMask = ShuffleMask.trunc(DstIdx + 1);
5647 if (ExpandMask[DstIdx]) {
5648 int SrcIdx = ExpandMask.popcount() - 1;
5649 return std::pair<unsigned, int>{0, SrcIdx};
5651 return std::pair<unsigned, int>{1,
static_cast<int>(DstIdx)};
5654 case clang::X86::BI__builtin_ia32_blendpd:
5655 case clang::X86::BI__builtin_ia32_blendpd256:
5656 case clang::X86::BI__builtin_ia32_blendps:
5657 case clang::X86::BI__builtin_ia32_blendps256:
5658 case clang::X86::BI__builtin_ia32_pblendw128:
5659 case clang::X86::BI__builtin_ia32_pblendw256:
5660 case clang::X86::BI__builtin_ia32_pblendd128:
5661 case clang::X86::BI__builtin_ia32_pblendd256:
5663 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5665 unsigned MaskBit = (ShuffleMask >> (DstIdx % 8)) & 0x1;
5666 unsigned SrcVecIdx = MaskBit ? 1 : 0;
5667 return std::pair<unsigned, int>{SrcVecIdx,
static_cast<int>(DstIdx)};
5672 case clang::X86::BI__builtin_ia32_blendvpd:
5673 case clang::X86::BI__builtin_ia32_blendvpd256:
5674 case clang::X86::BI__builtin_ia32_blendvps:
5675 case clang::X86::BI__builtin_ia32_blendvps256:
5679 llvm::RoundingMode) {
return C.isNegative() ? T : F; });
5681 case clang::X86::BI__builtin_ia32_pblendvb128:
5682 case clang::X86::BI__builtin_ia32_pblendvb256:
5685 return ((
APInt)
C).isNegative() ? T : F;
5687 case X86::BI__builtin_ia32_ptestz128:
5688 case X86::BI__builtin_ia32_ptestz256:
5689 case X86::BI__builtin_ia32_vtestzps:
5690 case X86::BI__builtin_ia32_vtestzps256:
5691 case X86::BI__builtin_ia32_vtestzpd:
5692 case X86::BI__builtin_ia32_vtestzpd256:
5695 [](
const APInt &A,
const APInt &B) {
return (A & B) == 0; });
5696 case X86::BI__builtin_ia32_ptestc128:
5697 case X86::BI__builtin_ia32_ptestc256:
5698 case X86::BI__builtin_ia32_vtestcps:
5699 case X86::BI__builtin_ia32_vtestcps256:
5700 case X86::BI__builtin_ia32_vtestcpd:
5701 case X86::BI__builtin_ia32_vtestcpd256:
5704 [](
const APInt &A,
const APInt &B) {
return (~A & B) == 0; });
5705 case X86::BI__builtin_ia32_ptestnzc128:
5706 case X86::BI__builtin_ia32_ptestnzc256:
5707 case X86::BI__builtin_ia32_vtestnzcps:
5708 case X86::BI__builtin_ia32_vtestnzcps256:
5709 case X86::BI__builtin_ia32_vtestnzcpd:
5710 case X86::BI__builtin_ia32_vtestnzcpd256:
5713 return ((A & B) != 0) && ((~A & B) != 0);
5715 case X86::BI__builtin_ia32_selectb_128:
5716 case X86::BI__builtin_ia32_selectb_256:
5717 case X86::BI__builtin_ia32_selectb_512:
5718 case X86::BI__builtin_ia32_selectw_128:
5719 case X86::BI__builtin_ia32_selectw_256:
5720 case X86::BI__builtin_ia32_selectw_512:
5721 case X86::BI__builtin_ia32_selectd_128:
5722 case X86::BI__builtin_ia32_selectd_256:
5723 case X86::BI__builtin_ia32_selectd_512:
5724 case X86::BI__builtin_ia32_selectq_128:
5725 case X86::BI__builtin_ia32_selectq_256:
5726 case X86::BI__builtin_ia32_selectq_512:
5727 case X86::BI__builtin_ia32_selectph_128:
5728 case X86::BI__builtin_ia32_selectph_256:
5729 case X86::BI__builtin_ia32_selectph_512:
5730 case X86::BI__builtin_ia32_selectpbf_128:
5731 case X86::BI__builtin_ia32_selectpbf_256:
5732 case X86::BI__builtin_ia32_selectpbf_512:
5733 case X86::BI__builtin_ia32_selectps_128:
5734 case X86::BI__builtin_ia32_selectps_256:
5735 case X86::BI__builtin_ia32_selectps_512:
5736 case X86::BI__builtin_ia32_selectpd_128:
5737 case X86::BI__builtin_ia32_selectpd_256:
5738 case X86::BI__builtin_ia32_selectpd_512:
5741 case X86::BI__builtin_ia32_shufps:
5742 case X86::BI__builtin_ia32_shufps256:
5743 case X86::BI__builtin_ia32_shufps512:
5745 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5746 unsigned NumElemPerLane = 4;
5747 unsigned NumSelectableElems = NumElemPerLane / 2;
5748 unsigned BitsPerElem = 2;
5749 unsigned IndexMask = 0x3;
5750 unsigned MaskBits = 8;
5751 unsigned Lane = DstIdx / NumElemPerLane;
5752 unsigned ElemInLane = DstIdx % NumElemPerLane;
5753 unsigned LaneOffset = Lane * NumElemPerLane;
5754 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
5755 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5756 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
5757 return std::pair<unsigned, int>{SrcIdx,
5758 static_cast<int>(LaneOffset + Index)};
5760 case X86::BI__builtin_ia32_shufpd:
5761 case X86::BI__builtin_ia32_shufpd256:
5762 case X86::BI__builtin_ia32_shufpd512:
5764 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5765 unsigned NumElemPerLane = 2;
5766 unsigned NumSelectableElems = NumElemPerLane / 2;
5767 unsigned BitsPerElem = 1;
5768 unsigned IndexMask = 0x1;
5769 unsigned MaskBits = 8;
5770 unsigned Lane = DstIdx / NumElemPerLane;
5771 unsigned ElemInLane = DstIdx % NumElemPerLane;
5772 unsigned LaneOffset = Lane * NumElemPerLane;
5773 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
5774 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5775 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
5776 return std::pair<unsigned, int>{SrcIdx,
5777 static_cast<int>(LaneOffset + Index)};
5780 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v16qi:
5781 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v32qi:
5782 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v64qi:
5784 case X86::BI__builtin_ia32_vgf2p8affineqb_v16qi:
5785 case X86::BI__builtin_ia32_vgf2p8affineqb_v32qi:
5786 case X86::BI__builtin_ia32_vgf2p8affineqb_v64qi:
5789 case X86::BI__builtin_ia32_vgf2p8mulb_v16qi:
5790 case X86::BI__builtin_ia32_vgf2p8mulb_v32qi:
5791 case X86::BI__builtin_ia32_vgf2p8mulb_v64qi:
5794 case X86::BI__builtin_ia32_insertps128:
5796 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Mask) {
5798 if ((Mask & (1 << DstIdx)) != 0) {
5799 return std::pair<unsigned, int>{0, -1};
5803 unsigned SrcElem = (Mask >> 6) & 0x3;
5804 unsigned DstElem = (Mask >> 4) & 0x3;
5805 if (DstIdx == DstElem) {
5807 return std::pair<unsigned, int>{1,
static_cast<int>(SrcElem)};
5810 return std::pair<unsigned, int>{0,
static_cast<int>(DstIdx)};
5813 case X86::BI__builtin_ia32_permvarsi256:
5814 case X86::BI__builtin_ia32_permvarsf256:
5815 case X86::BI__builtin_ia32_permvardf512:
5816 case X86::BI__builtin_ia32_permvardi512:
5817 case X86::BI__builtin_ia32_permvarhi128:
5819 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5820 int Offset = ShuffleMask & 0x7;
5821 return std::pair<unsigned, int>{0, Offset};
5823 case X86::BI__builtin_ia32_permvarqi128:
5824 case X86::BI__builtin_ia32_permvarhi256:
5825 case X86::BI__builtin_ia32_permvarsi512:
5826 case X86::BI__builtin_ia32_permvarsf512:
5828 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5829 int Offset = ShuffleMask & 0xF;
5830 return std::pair<unsigned, int>{0, Offset};
5832 case X86::BI__builtin_ia32_permvardi256:
5833 case X86::BI__builtin_ia32_permvardf256:
5835 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5836 int Offset = ShuffleMask & 0x3;
5837 return std::pair<unsigned, int>{0, Offset};
5839 case X86::BI__builtin_ia32_permvarqi256:
5840 case X86::BI__builtin_ia32_permvarhi512:
5842 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5843 int Offset = ShuffleMask & 0x1F;
5844 return std::pair<unsigned, int>{0, Offset};
5846 case X86::BI__builtin_ia32_permvarqi512:
5848 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5849 int Offset = ShuffleMask & 0x3F;
5850 return std::pair<unsigned, int>{0, Offset};
5852 case X86::BI__builtin_ia32_vpermi2varq128:
5853 case X86::BI__builtin_ia32_vpermi2varpd128:
5855 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5856 int Offset = ShuffleMask & 0x1;
5857 unsigned SrcIdx = (ShuffleMask >> 1) & 0x1;
5858 return std::pair<unsigned, int>{SrcIdx, Offset};
5860 case X86::BI__builtin_ia32_vpermi2vard128:
5861 case X86::BI__builtin_ia32_vpermi2varps128:
5862 case X86::BI__builtin_ia32_vpermi2varq256:
5863 case X86::BI__builtin_ia32_vpermi2varpd256:
5865 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5866 int Offset = ShuffleMask & 0x3;
5867 unsigned SrcIdx = (ShuffleMask >> 2) & 0x1;
5868 return std::pair<unsigned, int>{SrcIdx, Offset};
5870 case X86::BI__builtin_ia32_vpermi2varhi128:
5871 case X86::BI__builtin_ia32_vpermi2vard256:
5872 case X86::BI__builtin_ia32_vpermi2varps256:
5873 case X86::BI__builtin_ia32_vpermi2varq512:
5874 case X86::BI__builtin_ia32_vpermi2varpd512:
5876 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5877 int Offset = ShuffleMask & 0x7;
5878 unsigned SrcIdx = (ShuffleMask >> 3) & 0x1;
5879 return std::pair<unsigned, int>{SrcIdx, Offset};
5881 case X86::BI__builtin_ia32_vpermi2varqi128:
5882 case X86::BI__builtin_ia32_vpermi2varhi256:
5883 case X86::BI__builtin_ia32_vpermi2vard512:
5884 case X86::BI__builtin_ia32_vpermi2varps512:
5886 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5887 int Offset = ShuffleMask & 0xF;
5888 unsigned SrcIdx = (ShuffleMask >> 4) & 0x1;
5889 return std::pair<unsigned, int>{SrcIdx, Offset};
5891 case X86::BI__builtin_ia32_vpermi2varqi256:
5892 case X86::BI__builtin_ia32_vpermi2varhi512:
5894 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5895 int Offset = ShuffleMask & 0x1F;
5896 unsigned SrcIdx = (ShuffleMask >> 5) & 0x1;
5897 return std::pair<unsigned, int>{SrcIdx, Offset};
5899 case X86::BI__builtin_ia32_vpermi2varqi512:
5901 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5902 int Offset = ShuffleMask & 0x3F;
5903 unsigned SrcIdx = (ShuffleMask >> 6) & 0x1;
5904 return std::pair<unsigned, int>{SrcIdx, Offset};
5906 case X86::BI__builtin_ia32_vperm2f128_pd256:
5907 case X86::BI__builtin_ia32_vperm2f128_ps256:
5908 case X86::BI__builtin_ia32_vperm2f128_si256:
5909 case X86::BI__builtin_ia32_permti256: {
5910 unsigned NumElements =
5911 Call->getArg(0)->getType()->castAs<
VectorType>()->getNumElements();
5912 unsigned PreservedBitsCnt = NumElements >> 2;
5915 [PreservedBitsCnt](
unsigned DstIdx,
unsigned ShuffleMask) {
5916 unsigned ControlBitsCnt = DstIdx >> PreservedBitsCnt << 2;
5917 unsigned ControlBits = ShuffleMask >> ControlBitsCnt;
5919 if (ControlBits & 0b1000)
5920 return std::make_pair(0u, -1);
5922 unsigned SrcVecIdx = (ControlBits & 0b10) >> 1;
5923 unsigned PreservedBitsMask = (1 << PreservedBitsCnt) - 1;
5924 int SrcIdx = ((ControlBits & 0b1) << PreservedBitsCnt) |
5925 (DstIdx & PreservedBitsMask);
5926 return std::make_pair(SrcVecIdx, SrcIdx);
5929 case X86::BI__builtin_ia32_pshufb128:
5930 case X86::BI__builtin_ia32_pshufb256:
5931 case X86::BI__builtin_ia32_pshufb512:
5933 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5934 uint8_t Ctlb =
static_cast<uint8_t
>(ShuffleMask);
5936 return std::make_pair(0, -1);
5938 unsigned LaneBase = (DstIdx / 16) * 16;
5939 unsigned SrcOffset = Ctlb & 0x0F;
5940 unsigned SrcIdx = LaneBase + SrcOffset;
5941 return std::make_pair(0,
static_cast<int>(SrcIdx));
5944 case X86::BI__builtin_ia32_pshuflw:
5945 case X86::BI__builtin_ia32_pshuflw256:
5946 case X86::BI__builtin_ia32_pshuflw512:
5948 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5949 unsigned LaneBase = (DstIdx / 8) * 8;
5950 unsigned LaneIdx = DstIdx % 8;
5952 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
5953 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
5956 return std::make_pair(0,
static_cast<int>(DstIdx));
5959 case X86::BI__builtin_ia32_pshufhw:
5960 case X86::BI__builtin_ia32_pshufhw256:
5961 case X86::BI__builtin_ia32_pshufhw512:
5963 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5964 unsigned LaneBase = (DstIdx / 8) * 8;
5965 unsigned LaneIdx = DstIdx % 8;
5967 unsigned Sel = (ShuffleMask >> (2 * (LaneIdx - 4))) & 0x3;
5968 return std::make_pair(0,
static_cast<int>(LaneBase + 4 + Sel));
5971 return std::make_pair(0,
static_cast<int>(DstIdx));
5974 case X86::BI__builtin_ia32_pshufd:
5975 case X86::BI__builtin_ia32_pshufd256:
5976 case X86::BI__builtin_ia32_pshufd512:
5977 case X86::BI__builtin_ia32_vpermilps:
5978 case X86::BI__builtin_ia32_vpermilps256:
5979 case X86::BI__builtin_ia32_vpermilps512:
5981 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5982 unsigned LaneBase = (DstIdx / 4) * 4;
5983 unsigned LaneIdx = DstIdx % 4;
5984 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
5985 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
5988 case X86::BI__builtin_ia32_vpermilvarpd:
5989 case X86::BI__builtin_ia32_vpermilvarpd256:
5990 case X86::BI__builtin_ia32_vpermilvarpd512:
5992 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5993 unsigned NumElemPerLane = 2;
5994 unsigned Lane = DstIdx / NumElemPerLane;
5995 unsigned Offset = ShuffleMask & 0b10 ? 1 : 0;
5996 return std::make_pair(
5997 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
6000 case X86::BI__builtin_ia32_vpermilvarps:
6001 case X86::BI__builtin_ia32_vpermilvarps256:
6002 case X86::BI__builtin_ia32_vpermilvarps512:
6004 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6005 unsigned NumElemPerLane = 4;
6006 unsigned Lane = DstIdx / NumElemPerLane;
6007 unsigned Offset = ShuffleMask & 0b11;
6008 return std::make_pair(
6009 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
6012 case X86::BI__builtin_ia32_vpermilpd:
6013 case X86::BI__builtin_ia32_vpermilpd256:
6014 case X86::BI__builtin_ia32_vpermilpd512:
6016 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Control) {
6017 unsigned NumElemPerLane = 2;
6018 unsigned BitsPerElem = 1;
6019 unsigned MaskBits = 8;
6020 unsigned IndexMask = 0x1;
6021 unsigned Lane = DstIdx / NumElemPerLane;
6022 unsigned LaneOffset = Lane * NumElemPerLane;
6023 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
6024 unsigned Index = (Control >> BitIndex) & IndexMask;
6025 return std::make_pair(0,
static_cast<int>(LaneOffset + Index));
6028 case X86::BI__builtin_ia32_permdf256:
6029 case X86::BI__builtin_ia32_permdi256:
6031 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Control) {
6034 unsigned Index = (Control >> (2 * DstIdx)) & 0x3;
6035 return std::make_pair(0,
static_cast<int>(Index));
6038 case X86::BI__builtin_ia32_vpmultishiftqb128:
6039 case X86::BI__builtin_ia32_vpmultishiftqb256:
6040 case X86::BI__builtin_ia32_vpmultishiftqb512:
6042 case X86::BI__builtin_ia32_kandqi:
6043 case X86::BI__builtin_ia32_kandhi:
6044 case X86::BI__builtin_ia32_kandsi:
6045 case X86::BI__builtin_ia32_kanddi:
6048 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS & RHS; });
6050 case X86::BI__builtin_ia32_kandnqi:
6051 case X86::BI__builtin_ia32_kandnhi:
6052 case X86::BI__builtin_ia32_kandnsi:
6053 case X86::BI__builtin_ia32_kandndi:
6056 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~LHS & RHS; });
6058 case X86::BI__builtin_ia32_korqi:
6059 case X86::BI__builtin_ia32_korhi:
6060 case X86::BI__builtin_ia32_korsi:
6061 case X86::BI__builtin_ia32_kordi:
6064 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS | RHS; });
6066 case X86::BI__builtin_ia32_kxnorqi:
6067 case X86::BI__builtin_ia32_kxnorhi:
6068 case X86::BI__builtin_ia32_kxnorsi:
6069 case X86::BI__builtin_ia32_kxnordi:
6072 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~(LHS ^ RHS); });
6074 case X86::BI__builtin_ia32_kxorqi:
6075 case X86::BI__builtin_ia32_kxorhi:
6076 case X86::BI__builtin_ia32_kxorsi:
6077 case X86::BI__builtin_ia32_kxordi:
6080 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS ^ RHS; });
6082 case X86::BI__builtin_ia32_knotqi:
6083 case X86::BI__builtin_ia32_knothi:
6084 case X86::BI__builtin_ia32_knotsi:
6085 case X86::BI__builtin_ia32_knotdi:
6087 S, OpPC,
Call, [](
const APSInt &Src) {
return ~Src; });
6089 case X86::BI__builtin_ia32_kaddqi:
6090 case X86::BI__builtin_ia32_kaddhi:
6091 case X86::BI__builtin_ia32_kaddsi:
6092 case X86::BI__builtin_ia32_kadddi:
6095 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
6097 case X86::BI__builtin_ia32_kmovb:
6098 case X86::BI__builtin_ia32_kmovw:
6099 case X86::BI__builtin_ia32_kmovd:
6100 case X86::BI__builtin_ia32_kmovq:
6102 S, OpPC,
Call, [](
const APSInt &Src) {
return Src; });
6104 case X86::BI__builtin_ia32_kunpckhi:
6105 case X86::BI__builtin_ia32_kunpckdi:
6106 case X86::BI__builtin_ia32_kunpcksi:
6111 unsigned BW = A.getBitWidth();
6112 return APSInt(A.trunc(BW / 2).concat(B.trunc(BW / 2)),
6116 case X86::BI__builtin_ia32_phminposuw128:
6119 case X86::BI__builtin_ia32_psraq128:
6120 case X86::BI__builtin_ia32_psraq256:
6121 case X86::BI__builtin_ia32_psraq512:
6122 case X86::BI__builtin_ia32_psrad128:
6123 case X86::BI__builtin_ia32_psrad256:
6124 case X86::BI__builtin_ia32_psrad512:
6125 case X86::BI__builtin_ia32_psraw128:
6126 case X86::BI__builtin_ia32_psraw256:
6127 case X86::BI__builtin_ia32_psraw512:
6130 [](
const APInt &Elt, uint64_t Count) {
return Elt.ashr(Count); },
6131 [](
const APInt &Elt,
unsigned Width) {
return Elt.ashr(Width - 1); });
6133 case X86::BI__builtin_ia32_psllq128:
6134 case X86::BI__builtin_ia32_psllq256:
6135 case X86::BI__builtin_ia32_psllq512:
6136 case X86::BI__builtin_ia32_pslld128:
6137 case X86::BI__builtin_ia32_pslld256:
6138 case X86::BI__builtin_ia32_pslld512:
6139 case X86::BI__builtin_ia32_psllw128:
6140 case X86::BI__builtin_ia32_psllw256:
6141 case X86::BI__builtin_ia32_psllw512:
6144 [](
const APInt &Elt, uint64_t Count) {
return Elt.shl(Count); },
6145 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
6147 case X86::BI__builtin_ia32_psrlq128:
6148 case X86::BI__builtin_ia32_psrlq256:
6149 case X86::BI__builtin_ia32_psrlq512:
6150 case X86::BI__builtin_ia32_psrld128:
6151 case X86::BI__builtin_ia32_psrld256:
6152 case X86::BI__builtin_ia32_psrld512:
6153 case X86::BI__builtin_ia32_psrlw128:
6154 case X86::BI__builtin_ia32_psrlw256:
6155 case X86::BI__builtin_ia32_psrlw512:
6158 [](
const APInt &Elt, uint64_t Count) {
return Elt.lshr(Count); },
6159 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
6161 case X86::BI__builtin_ia32_pternlogd128_mask:
6162 case X86::BI__builtin_ia32_pternlogd256_mask:
6163 case X86::BI__builtin_ia32_pternlogd512_mask:
6164 case X86::BI__builtin_ia32_pternlogq128_mask:
6165 case X86::BI__builtin_ia32_pternlogq256_mask:
6166 case X86::BI__builtin_ia32_pternlogq512_mask:
6168 case X86::BI__builtin_ia32_pternlogd128_maskz:
6169 case X86::BI__builtin_ia32_pternlogd256_maskz:
6170 case X86::BI__builtin_ia32_pternlogd512_maskz:
6171 case X86::BI__builtin_ia32_pternlogq128_maskz:
6172 case X86::BI__builtin_ia32_pternlogq256_maskz:
6173 case X86::BI__builtin_ia32_pternlogq512_maskz:
6175 case Builtin::BI__builtin_elementwise_fshl:
6177 llvm::APIntOps::fshl);
6178 case Builtin::BI__builtin_elementwise_fshr:
6180 llvm::APIntOps::fshr);
6182 case X86::BI__builtin_ia32_shuf_f32x4_256:
6183 case X86::BI__builtin_ia32_shuf_i32x4_256:
6184 case X86::BI__builtin_ia32_shuf_f64x2_256:
6185 case X86::BI__builtin_ia32_shuf_i64x2_256:
6186 case X86::BI__builtin_ia32_shuf_f32x4:
6187 case X86::BI__builtin_ia32_shuf_i32x4:
6188 case X86::BI__builtin_ia32_shuf_f64x2:
6189 case X86::BI__builtin_ia32_shuf_i64x2: {
6195 unsigned LaneBits = 128u;
6196 unsigned NumLanes = (NumElems * ElemBits) / LaneBits;
6197 unsigned NumElemsPerLane = LaneBits / ElemBits;
6201 [NumLanes, NumElemsPerLane](
unsigned DstIdx,
unsigned ShuffleMask) {
6203 unsigned BitsPerElem = NumLanes / 2;
6204 unsigned IndexMask = (1u << BitsPerElem) - 1;
6205 unsigned Lane = DstIdx / NumElemsPerLane;
6206 unsigned SrcIdx = (Lane < NumLanes / 2) ? 0 : 1;
6207 unsigned BitIdx = BitsPerElem * Lane;
6208 unsigned SrcLaneIdx = (ShuffleMask >> BitIdx) & IndexMask;
6209 unsigned ElemInLane = DstIdx % NumElemsPerLane;
6210 unsigned IdxToPick = SrcLaneIdx * NumElemsPerLane + ElemInLane;
6211 return std::pair<unsigned, int>{SrcIdx, IdxToPick};
6215 case X86::BI__builtin_ia32_insertf32x4_256:
6216 case X86::BI__builtin_ia32_inserti32x4_256:
6217 case X86::BI__builtin_ia32_insertf64x2_256:
6218 case X86::BI__builtin_ia32_inserti64x2_256:
6219 case X86::BI__builtin_ia32_insertf32x4:
6220 case X86::BI__builtin_ia32_inserti32x4:
6221 case X86::BI__builtin_ia32_insertf64x2_512:
6222 case X86::BI__builtin_ia32_inserti64x2_512:
6223 case X86::BI__builtin_ia32_insertf32x8:
6224 case X86::BI__builtin_ia32_inserti32x8:
6225 case X86::BI__builtin_ia32_insertf64x4:
6226 case X86::BI__builtin_ia32_inserti64x4:
6227 case X86::BI__builtin_ia32_vinsertf128_ps256:
6228 case X86::BI__builtin_ia32_vinsertf128_pd256:
6229 case X86::BI__builtin_ia32_vinsertf128_si256:
6230 case X86::BI__builtin_ia32_insert128i256:
6233 case clang::X86::BI__builtin_ia32_vcvtps2ph:
6234 case clang::X86::BI__builtin_ia32_vcvtps2ph256:
6237 case X86::BI__builtin_ia32_vec_ext_v4hi:
6238 case X86::BI__builtin_ia32_vec_ext_v16qi:
6239 case X86::BI__builtin_ia32_vec_ext_v8hi:
6240 case X86::BI__builtin_ia32_vec_ext_v4si:
6241 case X86::BI__builtin_ia32_vec_ext_v2di:
6242 case X86::BI__builtin_ia32_vec_ext_v32qi:
6243 case X86::BI__builtin_ia32_vec_ext_v16hi:
6244 case X86::BI__builtin_ia32_vec_ext_v8si:
6245 case X86::BI__builtin_ia32_vec_ext_v4di:
6246 case X86::BI__builtin_ia32_vec_ext_v4sf:
6249 case X86::BI__builtin_ia32_vec_set_v4hi:
6250 case X86::BI__builtin_ia32_vec_set_v16qi:
6251 case X86::BI__builtin_ia32_vec_set_v8hi:
6252 case X86::BI__builtin_ia32_vec_set_v4si:
6253 case X86::BI__builtin_ia32_vec_set_v2di:
6254 case X86::BI__builtin_ia32_vec_set_v32qi:
6255 case X86::BI__builtin_ia32_vec_set_v16hi:
6256 case X86::BI__builtin_ia32_vec_set_v8si:
6257 case X86::BI__builtin_ia32_vec_set_v4di:
6260 case X86::BI__builtin_ia32_cvtb2mask128:
6261 case X86::BI__builtin_ia32_cvtb2mask256:
6262 case X86::BI__builtin_ia32_cvtb2mask512:
6263 case X86::BI__builtin_ia32_cvtw2mask128:
6264 case X86::BI__builtin_ia32_cvtw2mask256:
6265 case X86::BI__builtin_ia32_cvtw2mask512:
6266 case X86::BI__builtin_ia32_cvtd2mask128:
6267 case X86::BI__builtin_ia32_cvtd2mask256:
6268 case X86::BI__builtin_ia32_cvtd2mask512:
6269 case X86::BI__builtin_ia32_cvtq2mask128:
6270 case X86::BI__builtin_ia32_cvtq2mask256:
6271 case X86::BI__builtin_ia32_cvtq2mask512:
6274 case X86::BI__builtin_ia32_cvtmask2b128:
6275 case X86::BI__builtin_ia32_cvtmask2b256:
6276 case X86::BI__builtin_ia32_cvtmask2b512:
6277 case X86::BI__builtin_ia32_cvtmask2w128:
6278 case X86::BI__builtin_ia32_cvtmask2w256:
6279 case X86::BI__builtin_ia32_cvtmask2w512:
6280 case X86::BI__builtin_ia32_cvtmask2d128:
6281 case X86::BI__builtin_ia32_cvtmask2d256:
6282 case X86::BI__builtin_ia32_cvtmask2d512:
6283 case X86::BI__builtin_ia32_cvtmask2q128:
6284 case X86::BI__builtin_ia32_cvtmask2q256:
6285 case X86::BI__builtin_ia32_cvtmask2q512:
6288 case X86::BI__builtin_ia32_cvtsd2ss:
6291 case X86::BI__builtin_ia32_cvtsd2ss_round_mask:
6294 case X86::BI__builtin_ia32_cvtpd2ps:
6295 case X86::BI__builtin_ia32_cvtpd2ps256:
6297 case X86::BI__builtin_ia32_cvtpd2ps_mask:
6299 case X86::BI__builtin_ia32_cvtpd2ps512_mask:
6302 case X86::BI__builtin_ia32_cmpb128_mask:
6303 case X86::BI__builtin_ia32_cmpw128_mask:
6304 case X86::BI__builtin_ia32_cmpd128_mask:
6305 case X86::BI__builtin_ia32_cmpq128_mask:
6306 case X86::BI__builtin_ia32_cmpb256_mask:
6307 case X86::BI__builtin_ia32_cmpw256_mask:
6308 case X86::BI__builtin_ia32_cmpd256_mask:
6309 case X86::BI__builtin_ia32_cmpq256_mask:
6310 case X86::BI__builtin_ia32_cmpb512_mask:
6311 case X86::BI__builtin_ia32_cmpw512_mask:
6312 case X86::BI__builtin_ia32_cmpd512_mask:
6313 case X86::BI__builtin_ia32_cmpq512_mask:
6317 case X86::BI__builtin_ia32_ucmpb128_mask:
6318 case X86::BI__builtin_ia32_ucmpw128_mask:
6319 case X86::BI__builtin_ia32_ucmpd128_mask:
6320 case X86::BI__builtin_ia32_ucmpq128_mask:
6321 case X86::BI__builtin_ia32_ucmpb256_mask:
6322 case X86::BI__builtin_ia32_ucmpw256_mask:
6323 case X86::BI__builtin_ia32_ucmpd256_mask:
6324 case X86::BI__builtin_ia32_ucmpq256_mask:
6325 case X86::BI__builtin_ia32_ucmpb512_mask:
6326 case X86::BI__builtin_ia32_ucmpw512_mask:
6327 case X86::BI__builtin_ia32_ucmpd512_mask:
6328 case X86::BI__builtin_ia32_ucmpq512_mask:
6332 case X86::BI__builtin_ia32_vpshufbitqmb128_mask:
6333 case X86::BI__builtin_ia32_vpshufbitqmb256_mask:
6334 case X86::BI__builtin_ia32_vpshufbitqmb512_mask:
6337 case X86::BI__builtin_ia32_pslldqi128_byteshift:
6338 case X86::BI__builtin_ia32_pslldqi256_byteshift:
6339 case X86::BI__builtin_ia32_pslldqi512_byteshift:
6346 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
6347 unsigned LaneBase = (DstIdx / 16) * 16;
6348 unsigned LaneIdx = DstIdx % 16;
6349 if (LaneIdx < Shift)
6350 return std::make_pair(0, -1);
6352 return std::make_pair(0,
6353 static_cast<int>(LaneBase + LaneIdx - Shift));
6356 case X86::BI__builtin_ia32_psrldqi128_byteshift:
6357 case X86::BI__builtin_ia32_psrldqi256_byteshift:
6358 case X86::BI__builtin_ia32_psrldqi512_byteshift:
6365 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
6366 unsigned LaneBase = (DstIdx / 16) * 16;
6367 unsigned LaneIdx = DstIdx % 16;
6368 if (LaneIdx + Shift < 16)
6369 return std::make_pair(0,
6370 static_cast<int>(LaneBase + LaneIdx + Shift));
6372 return std::make_pair(0, -1);
6375 case X86::BI__builtin_ia32_palignr128:
6376 case X86::BI__builtin_ia32_palignr256:
6377 case X86::BI__builtin_ia32_palignr512:
6379 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Shift) {
6381 unsigned VecIdx = 1;
6384 int Lane = DstIdx / 16;
6385 int Offset = DstIdx % 16;
6388 unsigned ShiftedIdx = Offset + (Shift & 0xFF);
6389 if (ShiftedIdx < 16) {
6390 ElemIdx = ShiftedIdx + (Lane * 16);
6391 }
else if (ShiftedIdx < 32) {
6393 ElemIdx = (ShiftedIdx - 16) + (Lane * 16);
6396 return std::pair<unsigned, int>{VecIdx, ElemIdx};
6399 case X86::BI__builtin_ia32_alignd128:
6400 case X86::BI__builtin_ia32_alignd256:
6401 case X86::BI__builtin_ia32_alignd512:
6402 case X86::BI__builtin_ia32_alignq128:
6403 case X86::BI__builtin_ia32_alignq256:
6404 case X86::BI__builtin_ia32_alignq512: {
6405 unsigned NumElems =
Call->getType()->castAs<
VectorType>()->getNumElements();
6407 S, OpPC,
Call, [NumElems](
unsigned DstIdx,
unsigned Shift) {
6408 unsigned Imm = Shift & 0xFF;
6409 unsigned EffectiveShift = Imm & (NumElems - 1);
6410 unsigned SourcePos = DstIdx + EffectiveShift;
6411 unsigned VecIdx = SourcePos < NumElems ? 1u : 0u;
6412 unsigned ElemIdx = SourcePos & (NumElems - 1);
6413 return std::pair<unsigned, int>{VecIdx,
static_cast<int>(ElemIdx)};
6417 case clang::X86::BI__builtin_ia32_minps:
6418 case clang::X86::BI__builtin_ia32_minpd:
6419 case clang::X86::BI__builtin_ia32_minph128:
6420 case clang::X86::BI__builtin_ia32_minph256:
6421 case clang::X86::BI__builtin_ia32_minps256:
6422 case clang::X86::BI__builtin_ia32_minpd256:
6423 case clang::X86::BI__builtin_ia32_minps512:
6424 case clang::X86::BI__builtin_ia32_minpd512:
6425 case clang::X86::BI__builtin_ia32_minph512:
6429 std::optional<APSInt>) -> std::optional<APFloat> {
6430 if (A.isNaN() || A.isInfinity() || A.isDenormal() || B.isNaN() ||
6431 B.isInfinity() || B.isDenormal())
6432 return std::nullopt;
6433 if (A.isZero() && B.isZero())
6435 return llvm::minimum(A, B);
6438 case clang::X86::BI__builtin_ia32_minss:
6439 case clang::X86::BI__builtin_ia32_minsd:
6443 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
6448 case clang::X86::BI__builtin_ia32_minsd_round_mask:
6449 case clang::X86::BI__builtin_ia32_minss_round_mask:
6450 case clang::X86::BI__builtin_ia32_minsh_round_mask:
6451 case clang::X86::BI__builtin_ia32_maxsd_round_mask:
6452 case clang::X86::BI__builtin_ia32_maxss_round_mask:
6453 case clang::X86::BI__builtin_ia32_maxsh_round_mask: {
6454 bool IsMin = BuiltinID == clang::X86::BI__builtin_ia32_minsd_round_mask ||
6455 BuiltinID == clang::X86::BI__builtin_ia32_minss_round_mask ||
6456 BuiltinID == clang::X86::BI__builtin_ia32_minsh_round_mask;
6460 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
6465 case clang::X86::BI__builtin_ia32_maxps:
6466 case clang::X86::BI__builtin_ia32_maxpd:
6467 case clang::X86::BI__builtin_ia32_maxph128:
6468 case clang::X86::BI__builtin_ia32_maxph256:
6469 case clang::X86::BI__builtin_ia32_maxps256:
6470 case clang::X86::BI__builtin_ia32_maxpd256:
6471 case clang::X86::BI__builtin_ia32_maxps512:
6472 case clang::X86::BI__builtin_ia32_maxpd512:
6473 case clang::X86::BI__builtin_ia32_maxph512:
6477 std::optional<APSInt>) -> std::optional<APFloat> {
6478 if (A.isNaN() || A.isInfinity() || A.isDenormal() || B.isNaN() ||
6479 B.isInfinity() || B.isDenormal())
6480 return std::nullopt;
6481 if (A.isZero() && B.isZero())
6483 return llvm::maximum(A, B);
6486 case clang::X86::BI__builtin_ia32_maxss:
6487 case clang::X86::BI__builtin_ia32_maxsd:
6491 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
6498 diag::note_invalid_subexpr_in_const_expr)
6504 llvm_unreachable(
"Unhandled builtin ID");