4161 uint32_t BuiltinID) {
4166 switch (BuiltinID) {
4167 case Builtin::BI__builtin_is_constant_evaluated:
4170 case Builtin::BI__builtin_assume:
4171 case Builtin::BI__assume:
4174 case Builtin::BI__builtin_strcmp:
4175 case Builtin::BIstrcmp:
4176 case Builtin::BI__builtin_strncmp:
4177 case Builtin::BIstrncmp:
4178 case Builtin::BI__builtin_wcsncmp:
4179 case Builtin::BIwcsncmp:
4180 case Builtin::BI__builtin_wcscmp:
4181 case Builtin::BIwcscmp:
4184 case Builtin::BI__builtin_strlen:
4185 case Builtin::BIstrlen:
4186 case Builtin::BI__builtin_wcslen:
4187 case Builtin::BIwcslen:
4190 case Builtin::BI__builtin_nan:
4191 case Builtin::BI__builtin_nanf:
4192 case Builtin::BI__builtin_nanl:
4193 case Builtin::BI__builtin_nanf16:
4194 case Builtin::BI__builtin_nanf128:
4197 case Builtin::BI__builtin_nans:
4198 case Builtin::BI__builtin_nansf:
4199 case Builtin::BI__builtin_nansl:
4200 case Builtin::BI__builtin_nansf16:
4201 case Builtin::BI__builtin_nansf128:
4204 case Builtin::BI__builtin_huge_val:
4205 case Builtin::BI__builtin_huge_valf:
4206 case Builtin::BI__builtin_huge_vall:
4207 case Builtin::BI__builtin_huge_valf16:
4208 case Builtin::BI__builtin_huge_valf128:
4209 case Builtin::BI__builtin_inf:
4210 case Builtin::BI__builtin_inff:
4211 case Builtin::BI__builtin_infl:
4212 case Builtin::BI__builtin_inff16:
4213 case Builtin::BI__builtin_inff128:
4216 case Builtin::BI__builtin_copysign:
4217 case Builtin::BI__builtin_copysignf:
4218 case Builtin::BI__builtin_copysignl:
4219 case Builtin::BI__builtin_copysignf128:
4222 case Builtin::BI__builtin_fmin:
4223 case Builtin::BI__builtin_fminf:
4224 case Builtin::BI__builtin_fminl:
4225 case Builtin::BI__builtin_fminf16:
4226 case Builtin::BI__builtin_fminf128:
4229 case Builtin::BI__builtin_fminimum_num:
4230 case Builtin::BI__builtin_fminimum_numf:
4231 case Builtin::BI__builtin_fminimum_numl:
4232 case Builtin::BI__builtin_fminimum_numf16:
4233 case Builtin::BI__builtin_fminimum_numf128:
4236 case Builtin::BI__builtin_fmax:
4237 case Builtin::BI__builtin_fmaxf:
4238 case Builtin::BI__builtin_fmaxl:
4239 case Builtin::BI__builtin_fmaxf16:
4240 case Builtin::BI__builtin_fmaxf128:
4243 case Builtin::BI__builtin_fmaximum_num:
4244 case Builtin::BI__builtin_fmaximum_numf:
4245 case Builtin::BI__builtin_fmaximum_numl:
4246 case Builtin::BI__builtin_fmaximum_numf16:
4247 case Builtin::BI__builtin_fmaximum_numf128:
4250 case Builtin::BI__builtin_isnan:
4253 case Builtin::BI__builtin_issignaling:
4256 case Builtin::BI__builtin_isinf:
4259 case Builtin::BI__builtin_isinf_sign:
4262 case Builtin::BI__builtin_isfinite:
4265 case Builtin::BI__builtin_isnormal:
4268 case Builtin::BI__builtin_issubnormal:
4271 case Builtin::BI__builtin_iszero:
4274 case Builtin::BI__builtin_signbit:
4275 case Builtin::BI__builtin_signbitf:
4276 case Builtin::BI__builtin_signbitl:
4279 case Builtin::BI__builtin_isgreater:
4280 case Builtin::BI__builtin_isgreaterequal:
4281 case Builtin::BI__builtin_isless:
4282 case Builtin::BI__builtin_islessequal:
4283 case Builtin::BI__builtin_islessgreater:
4284 case Builtin::BI__builtin_isunordered:
4287 case Builtin::BI__builtin_isfpclass:
4290 case Builtin::BI__builtin_fpclassify:
4293 case Builtin::BI__builtin_fabs:
4294 case Builtin::BI__builtin_fabsf:
4295 case Builtin::BI__builtin_fabsl:
4296 case Builtin::BI__builtin_fabsf128:
4299 case Builtin::BI__builtin_abs:
4300 case Builtin::BI__builtin_labs:
4301 case Builtin::BI__builtin_llabs:
4304 case Builtin::BI__builtin_popcount:
4305 case Builtin::BI__builtin_popcountl:
4306 case Builtin::BI__builtin_popcountll:
4307 case Builtin::BI__builtin_popcountg:
4308 case Builtin::BI__popcnt16:
4309 case Builtin::BI__popcnt:
4310 case Builtin::BI__popcnt64:
4313 case Builtin::BI__builtin_parity:
4314 case Builtin::BI__builtin_parityl:
4315 case Builtin::BI__builtin_parityll:
4318 return APInt(Val.getBitWidth(), Val.popcount() % 2);
4320 case Builtin::BI__builtin_clrsb:
4321 case Builtin::BI__builtin_clrsbl:
4322 case Builtin::BI__builtin_clrsbll:
4325 return APInt(Val.getBitWidth(),
4326 Val.getBitWidth() - Val.getSignificantBits());
4328 case Builtin::BI__builtin_bitreverseg:
4329 case Builtin::BI__builtin_bitreverse8:
4330 case Builtin::BI__builtin_bitreverse16:
4331 case Builtin::BI__builtin_bitreverse32:
4332 case Builtin::BI__builtin_bitreverse64:
4334 S, OpPC,
Call, [](
const APSInt &Val) {
return Val.reverseBits(); });
4336 case Builtin::BI__builtin_classify_type:
4339 case Builtin::BI__builtin_expect:
4340 case Builtin::BI__builtin_expect_with_probability:
4343 case Builtin::BI__builtin_rotateleft8:
4344 case Builtin::BI__builtin_rotateleft16:
4345 case Builtin::BI__builtin_rotateleft32:
4346 case Builtin::BI__builtin_rotateleft64:
4347 case Builtin::BI__builtin_stdc_rotate_left:
4348 case Builtin::BI_rotl8:
4349 case Builtin::BI_rotl16:
4350 case Builtin::BI_rotl:
4351 case Builtin::BI_lrotl:
4352 case Builtin::BI_rotl64:
4353 case Builtin::BI__builtin_rotateright8:
4354 case Builtin::BI__builtin_rotateright16:
4355 case Builtin::BI__builtin_rotateright32:
4356 case Builtin::BI__builtin_rotateright64:
4357 case Builtin::BI__builtin_stdc_rotate_right:
4358 case Builtin::BI_rotr8:
4359 case Builtin::BI_rotr16:
4360 case Builtin::BI_rotr:
4361 case Builtin::BI_lrotr:
4362 case Builtin::BI_rotr64: {
4365 switch (BuiltinID) {
4366 case Builtin::BI__builtin_rotateright8:
4367 case Builtin::BI__builtin_rotateright16:
4368 case Builtin::BI__builtin_rotateright32:
4369 case Builtin::BI__builtin_rotateright64:
4370 case Builtin::BI__builtin_stdc_rotate_right:
4371 case Builtin::BI_rotr8:
4372 case Builtin::BI_rotr16:
4373 case Builtin::BI_rotr:
4374 case Builtin::BI_lrotr:
4375 case Builtin::BI_rotr64:
4376 IsRotateRight =
true;
4379 IsRotateRight =
false;
4386 return IsRotateRight ?
Value.rotr(Amount.getZExtValue())
4387 :
Value.rotl(Amount.getZExtValue());
4391 case Builtin::BI__builtin_ffs:
4392 case Builtin::BI__builtin_ffsl:
4393 case Builtin::BI__builtin_ffsll:
4396 return APInt(Val.getBitWidth(),
4397 Val.isZero() ? 0u : Val.countTrailingZeros() + 1u);
4400 case Builtin::BIaddressof:
4401 case Builtin::BI__addressof:
4402 case Builtin::BI__builtin_addressof:
4406 case Builtin::BIas_const:
4407 case Builtin::BIforward:
4408 case Builtin::BIforward_like:
4409 case Builtin::BImove:
4410 case Builtin::BImove_if_noexcept:
4414 case Builtin::BI__builtin_eh_return_data_regno:
4417 case Builtin::BI__builtin_launder:
4421 case Builtin::BI__builtin_add_overflow:
4422 case Builtin::BI__builtin_sub_overflow:
4423 case Builtin::BI__builtin_mul_overflow:
4424 case Builtin::BI__builtin_sadd_overflow:
4425 case Builtin::BI__builtin_uadd_overflow:
4426 case Builtin::BI__builtin_uaddl_overflow:
4427 case Builtin::BI__builtin_uaddll_overflow:
4428 case Builtin::BI__builtin_usub_overflow:
4429 case Builtin::BI__builtin_usubl_overflow:
4430 case Builtin::BI__builtin_usubll_overflow:
4431 case Builtin::BI__builtin_umul_overflow:
4432 case Builtin::BI__builtin_umull_overflow:
4433 case Builtin::BI__builtin_umulll_overflow:
4434 case Builtin::BI__builtin_saddl_overflow:
4435 case Builtin::BI__builtin_saddll_overflow:
4436 case Builtin::BI__builtin_ssub_overflow:
4437 case Builtin::BI__builtin_ssubl_overflow:
4438 case Builtin::BI__builtin_ssubll_overflow:
4439 case Builtin::BI__builtin_smul_overflow:
4440 case Builtin::BI__builtin_smull_overflow:
4441 case Builtin::BI__builtin_smulll_overflow:
4444 case Builtin::BI__builtin_addcb:
4445 case Builtin::BI__builtin_addcs:
4446 case Builtin::BI__builtin_addc:
4447 case Builtin::BI__builtin_addcl:
4448 case Builtin::BI__builtin_addcll:
4449 case Builtin::BI__builtin_subcb:
4450 case Builtin::BI__builtin_subcs:
4451 case Builtin::BI__builtin_subc:
4452 case Builtin::BI__builtin_subcl:
4453 case Builtin::BI__builtin_subcll:
4456 case Builtin::BI__builtin_clz:
4457 case Builtin::BI__builtin_clzl:
4458 case Builtin::BI__builtin_clzll:
4459 case Builtin::BI__builtin_clzs:
4460 case Builtin::BI__builtin_clzg:
4461 case Builtin::BI__lzcnt16:
4462 case Builtin::BI__lzcnt:
4463 case Builtin::BI__lzcnt64:
4466 case Builtin::BI__builtin_ctz:
4467 case Builtin::BI__builtin_ctzl:
4468 case Builtin::BI__builtin_ctzll:
4469 case Builtin::BI__builtin_ctzs:
4470 case Builtin::BI__builtin_ctzg:
4473 case Builtin::BI__builtin_elementwise_clzg:
4474 case Builtin::BI__builtin_elementwise_ctzg:
4477 case Builtin::BI__builtin_bswapg:
4478 case Builtin::BI__builtin_bswap16:
4479 case Builtin::BI__builtin_bswap32:
4480 case Builtin::BI__builtin_bswap64:
4483 case Builtin::BI__atomic_always_lock_free:
4484 case Builtin::BI__atomic_is_lock_free:
4487 case Builtin::BI__c11_atomic_is_lock_free:
4490 case Builtin::BI__builtin_complex:
4493 case Builtin::BI__builtin_is_aligned:
4494 case Builtin::BI__builtin_align_up:
4495 case Builtin::BI__builtin_align_down:
4498 case Builtin::BI__builtin_assume_aligned:
4501 case clang::X86::BI__builtin_ia32_crc32qi:
4503 case clang::X86::BI__builtin_ia32_crc32hi:
4505 case clang::X86::BI__builtin_ia32_crc32si:
4507 case clang::X86::BI__builtin_ia32_crc32di:
4510 case clang::X86::BI__builtin_ia32_bextr_u32:
4511 case clang::X86::BI__builtin_ia32_bextr_u64:
4512 case clang::X86::BI__builtin_ia32_bextri_u32:
4513 case clang::X86::BI__builtin_ia32_bextri_u64:
4516 unsigned BitWidth = Val.getBitWidth();
4517 uint64_t Shift = Idx.extractBitsAsZExtValue(8, 0);
4518 uint64_t Length = Idx.extractBitsAsZExtValue(8, 8);
4519 if (Length > BitWidth) {
4524 if (Length == 0 || Shift >= BitWidth)
4525 return APInt(BitWidth, 0);
4527 uint64_t
Result = Val.getZExtValue() >> Shift;
4528 Result &= llvm::maskTrailingOnes<uint64_t>(Length);
4532 case clang::X86::BI__builtin_ia32_bzhi_si:
4533 case clang::X86::BI__builtin_ia32_bzhi_di:
4536 unsigned BitWidth = Val.getBitWidth();
4537 uint64_t Index = Idx.extractBitsAsZExtValue(8, 0);
4540 if (Index < BitWidth)
4541 Result.clearHighBits(BitWidth - Index);
4546 case clang::X86::BI__builtin_ia32_ktestcqi:
4547 case clang::X86::BI__builtin_ia32_ktestchi:
4548 case clang::X86::BI__builtin_ia32_ktestcsi:
4549 case clang::X86::BI__builtin_ia32_ktestcdi:
4552 return APInt(
sizeof(
unsigned char) * 8, (~A & B) == 0);
4555 case clang::X86::BI__builtin_ia32_ktestzqi:
4556 case clang::X86::BI__builtin_ia32_ktestzhi:
4557 case clang::X86::BI__builtin_ia32_ktestzsi:
4558 case clang::X86::BI__builtin_ia32_ktestzdi:
4561 return APInt(
sizeof(
unsigned char) * 8, (A & B) == 0);
4564 case clang::X86::BI__builtin_ia32_kortestcqi:
4565 case clang::X86::BI__builtin_ia32_kortestchi:
4566 case clang::X86::BI__builtin_ia32_kortestcsi:
4567 case clang::X86::BI__builtin_ia32_kortestcdi:
4570 return APInt(
sizeof(
unsigned char) * 8, ~(A | B) == 0);
4573 case clang::X86::BI__builtin_ia32_kortestzqi:
4574 case clang::X86::BI__builtin_ia32_kortestzhi:
4575 case clang::X86::BI__builtin_ia32_kortestzsi:
4576 case clang::X86::BI__builtin_ia32_kortestzdi:
4579 return APInt(
sizeof(
unsigned char) * 8, (A | B) == 0);
4582 case clang::X86::BI__builtin_ia32_kshiftliqi:
4583 case clang::X86::BI__builtin_ia32_kshiftlihi:
4584 case clang::X86::BI__builtin_ia32_kshiftlisi:
4585 case clang::X86::BI__builtin_ia32_kshiftlidi:
4588 unsigned Amt = RHS.getZExtValue() & 0xFF;
4589 if (Amt >= LHS.getBitWidth())
4590 return APInt::getZero(LHS.getBitWidth());
4591 return LHS.shl(Amt);
4594 case clang::X86::BI__builtin_ia32_kshiftriqi:
4595 case clang::X86::BI__builtin_ia32_kshiftrihi:
4596 case clang::X86::BI__builtin_ia32_kshiftrisi:
4597 case clang::X86::BI__builtin_ia32_kshiftridi:
4600 unsigned Amt = RHS.getZExtValue() & 0xFF;
4601 if (Amt >= LHS.getBitWidth())
4602 return APInt::getZero(LHS.getBitWidth());
4603 return LHS.lshr(Amt);
4606 case clang::X86::BI__builtin_ia32_lzcnt_u16:
4607 case clang::X86::BI__builtin_ia32_lzcnt_u32:
4608 case clang::X86::BI__builtin_ia32_lzcnt_u64:
4611 return APInt(Src.getBitWidth(), Src.countLeadingZeros());
4614 case clang::X86::BI__builtin_ia32_tzcnt_u16:
4615 case clang::X86::BI__builtin_ia32_tzcnt_u32:
4616 case clang::X86::BI__builtin_ia32_tzcnt_u64:
4619 return APInt(Src.getBitWidth(), Src.countTrailingZeros());
4622 case clang::X86::BI__builtin_ia32_pdep_si:
4623 case clang::X86::BI__builtin_ia32_pdep_di:
4626 unsigned BitWidth = Val.getBitWidth();
4629 for (
unsigned I = 0, P = 0; I != BitWidth; ++I) {
4631 Result.setBitVal(I, Val[P++]);
4637 case clang::X86::BI__builtin_ia32_pext_si:
4638 case clang::X86::BI__builtin_ia32_pext_di:
4641 unsigned BitWidth = Val.getBitWidth();
4644 for (
unsigned I = 0, P = 0; I != BitWidth; ++I) {
4646 Result.setBitVal(P++, Val[I]);
4652 case clang::X86::BI__builtin_ia32_addcarryx_u32:
4653 case clang::X86::BI__builtin_ia32_addcarryx_u64:
4654 case clang::X86::BI__builtin_ia32_subborrow_u32:
4655 case clang::X86::BI__builtin_ia32_subborrow_u64:
4659 case Builtin::BI__builtin_os_log_format_buffer_size:
4662 case Builtin::BI__builtin_ptrauth_string_discriminator:
4665 case Builtin::BI__builtin_infer_alloc_token:
4668 case Builtin::BI__noop:
4672 case Builtin::BI__builtin_operator_new:
4675 case Builtin::BI__builtin_operator_delete:
4678 case Builtin::BI__arithmetic_fence:
4681 case Builtin::BI__builtin_reduce_add:
4682 case Builtin::BI__builtin_reduce_mul:
4683 case Builtin::BI__builtin_reduce_and:
4684 case Builtin::BI__builtin_reduce_or:
4685 case Builtin::BI__builtin_reduce_xor:
4686 case Builtin::BI__builtin_reduce_min:
4687 case Builtin::BI__builtin_reduce_max:
4690 case Builtin::BI__builtin_elementwise_popcount:
4693 return APInt(Src.getBitWidth(), Src.popcount());
4695 case Builtin::BI__builtin_elementwise_bitreverse:
4697 S, OpPC,
Call, [](
const APSInt &Src) {
return Src.reverseBits(); });
4699 case Builtin::BI__builtin_elementwise_abs:
4702 case Builtin::BI__builtin_memcpy:
4703 case Builtin::BImemcpy:
4704 case Builtin::BI__builtin_wmemcpy:
4705 case Builtin::BIwmemcpy:
4706 case Builtin::BI__builtin_memmove:
4707 case Builtin::BImemmove:
4708 case Builtin::BI__builtin_wmemmove:
4709 case Builtin::BIwmemmove:
4712 case Builtin::BI__builtin_memcmp:
4713 case Builtin::BImemcmp:
4714 case Builtin::BI__builtin_bcmp:
4715 case Builtin::BIbcmp:
4716 case Builtin::BI__builtin_wmemcmp:
4717 case Builtin::BIwmemcmp:
4720 case Builtin::BImemchr:
4721 case Builtin::BI__builtin_memchr:
4722 case Builtin::BIstrchr:
4723 case Builtin::BI__builtin_strchr:
4724 case Builtin::BIwmemchr:
4725 case Builtin::BI__builtin_wmemchr:
4726 case Builtin::BIwcschr:
4727 case Builtin::BI__builtin_wcschr:
4728 case Builtin::BI__builtin_char_memchr:
4731 case Builtin::BI__builtin_object_size:
4732 case Builtin::BI__builtin_dynamic_object_size:
4735 case Builtin::BI__builtin_is_within_lifetime:
4738 case Builtin::BI__builtin_elementwise_add_sat:
4741 return LHS.isSigned() ? LHS.sadd_sat(RHS) : LHS.uadd_sat(RHS);
4744 case Builtin::BI__builtin_elementwise_sub_sat:
4747 return LHS.isSigned() ? LHS.ssub_sat(RHS) : LHS.usub_sat(RHS);
4749 case X86::BI__builtin_ia32_extract128i256:
4750 case X86::BI__builtin_ia32_vextractf128_pd256:
4751 case X86::BI__builtin_ia32_vextractf128_ps256:
4752 case X86::BI__builtin_ia32_vextractf128_si256:
4755 case X86::BI__builtin_ia32_extractf32x4_256_mask:
4756 case X86::BI__builtin_ia32_extractf32x4_mask:
4757 case X86::BI__builtin_ia32_extractf32x8_mask:
4758 case X86::BI__builtin_ia32_extractf64x2_256_mask:
4759 case X86::BI__builtin_ia32_extractf64x2_512_mask:
4760 case X86::BI__builtin_ia32_extractf64x4_mask:
4761 case X86::BI__builtin_ia32_extracti32x4_256_mask:
4762 case X86::BI__builtin_ia32_extracti32x4_mask:
4763 case X86::BI__builtin_ia32_extracti32x8_mask:
4764 case X86::BI__builtin_ia32_extracti64x2_256_mask:
4765 case X86::BI__builtin_ia32_extracti64x2_512_mask:
4766 case X86::BI__builtin_ia32_extracti64x4_mask:
4769 case clang::X86::BI__builtin_ia32_pmulhrsw128:
4770 case clang::X86::BI__builtin_ia32_pmulhrsw256:
4771 case clang::X86::BI__builtin_ia32_pmulhrsw512:
4774 return (llvm::APIntOps::mulsExtended(LHS, RHS).ashr(14) + 1)
4775 .extractBits(16, 1);
4778 case clang::X86::BI__builtin_ia32_movmskps:
4779 case clang::X86::BI__builtin_ia32_movmskpd:
4780 case clang::X86::BI__builtin_ia32_pmovmskb128:
4781 case clang::X86::BI__builtin_ia32_pmovmskb256:
4782 case clang::X86::BI__builtin_ia32_movmskps256:
4783 case clang::X86::BI__builtin_ia32_movmskpd256: {
4787 case X86::BI__builtin_ia32_psignb128:
4788 case X86::BI__builtin_ia32_psignb256:
4789 case X86::BI__builtin_ia32_psignw128:
4790 case X86::BI__builtin_ia32_psignw256:
4791 case X86::BI__builtin_ia32_psignd128:
4792 case X86::BI__builtin_ia32_psignd256:
4796 return APInt::getZero(AElem.getBitWidth());
4797 if (BElem.isNegative())
4802 case clang::X86::BI__builtin_ia32_pavgb128:
4803 case clang::X86::BI__builtin_ia32_pavgw128:
4804 case clang::X86::BI__builtin_ia32_pavgb256:
4805 case clang::X86::BI__builtin_ia32_pavgw256:
4806 case clang::X86::BI__builtin_ia32_pavgb512:
4807 case clang::X86::BI__builtin_ia32_pavgw512:
4809 llvm::APIntOps::avgCeilU);
4811 case clang::X86::BI__builtin_ia32_pmaddubsw128:
4812 case clang::X86::BI__builtin_ia32_pmaddubsw256:
4813 case clang::X86::BI__builtin_ia32_pmaddubsw512:
4818 unsigned BitWidth = 2 * LoLHS.getBitWidth();
4819 return (LoLHS.zext(BitWidth) * LoRHS.sext(BitWidth))
4820 .sadd_sat((HiLHS.zext(BitWidth) * HiRHS.sext(BitWidth)));
4823 case clang::X86::BI__builtin_ia32_pmaddwd128:
4824 case clang::X86::BI__builtin_ia32_pmaddwd256:
4825 case clang::X86::BI__builtin_ia32_pmaddwd512:
4830 unsigned BitWidth = 2 * LoLHS.getBitWidth();
4831 return (LoLHS.sext(BitWidth) * LoRHS.sext(BitWidth)) +
4832 (HiLHS.sext(BitWidth) * HiRHS.sext(BitWidth));
4835 case clang::X86::BI__builtin_ia32_pmulhuw128:
4836 case clang::X86::BI__builtin_ia32_pmulhuw256:
4837 case clang::X86::BI__builtin_ia32_pmulhuw512:
4839 llvm::APIntOps::mulhu);
4841 case clang::X86::BI__builtin_ia32_pmulhw128:
4842 case clang::X86::BI__builtin_ia32_pmulhw256:
4843 case clang::X86::BI__builtin_ia32_pmulhw512:
4845 llvm::APIntOps::mulhs);
4847 case clang::X86::BI__builtin_ia32_psllv2di:
4848 case clang::X86::BI__builtin_ia32_psllv4di:
4849 case clang::X86::BI__builtin_ia32_psllv4si:
4850 case clang::X86::BI__builtin_ia32_psllv8di:
4851 case clang::X86::BI__builtin_ia32_psllv8hi:
4852 case clang::X86::BI__builtin_ia32_psllv8si:
4853 case clang::X86::BI__builtin_ia32_psllv16hi:
4854 case clang::X86::BI__builtin_ia32_psllv16si:
4855 case clang::X86::BI__builtin_ia32_psllv32hi:
4856 case clang::X86::BI__builtin_ia32_psllwi128:
4857 case clang::X86::BI__builtin_ia32_psllwi256:
4858 case clang::X86::BI__builtin_ia32_psllwi512:
4859 case clang::X86::BI__builtin_ia32_pslldi128:
4860 case clang::X86::BI__builtin_ia32_pslldi256:
4861 case clang::X86::BI__builtin_ia32_pslldi512:
4862 case clang::X86::BI__builtin_ia32_psllqi128:
4863 case clang::X86::BI__builtin_ia32_psllqi256:
4864 case clang::X86::BI__builtin_ia32_psllqi512:
4867 if (RHS.uge(LHS.getBitWidth())) {
4868 return APInt::getZero(LHS.getBitWidth());
4870 return LHS.shl(RHS.getZExtValue());
4873 case clang::X86::BI__builtin_ia32_psrav4si:
4874 case clang::X86::BI__builtin_ia32_psrav8di:
4875 case clang::X86::BI__builtin_ia32_psrav8hi:
4876 case clang::X86::BI__builtin_ia32_psrav8si:
4877 case clang::X86::BI__builtin_ia32_psrav16hi:
4878 case clang::X86::BI__builtin_ia32_psrav16si:
4879 case clang::X86::BI__builtin_ia32_psrav32hi:
4880 case clang::X86::BI__builtin_ia32_psravq128:
4881 case clang::X86::BI__builtin_ia32_psravq256:
4882 case clang::X86::BI__builtin_ia32_psrawi128:
4883 case clang::X86::BI__builtin_ia32_psrawi256:
4884 case clang::X86::BI__builtin_ia32_psrawi512:
4885 case clang::X86::BI__builtin_ia32_psradi128:
4886 case clang::X86::BI__builtin_ia32_psradi256:
4887 case clang::X86::BI__builtin_ia32_psradi512:
4888 case clang::X86::BI__builtin_ia32_psraqi128:
4889 case clang::X86::BI__builtin_ia32_psraqi256:
4890 case clang::X86::BI__builtin_ia32_psraqi512:
4893 if (RHS.uge(LHS.getBitWidth())) {
4894 return LHS.ashr(LHS.getBitWidth() - 1);
4896 return LHS.ashr(RHS.getZExtValue());
4899 case clang::X86::BI__builtin_ia32_psrlv2di:
4900 case clang::X86::BI__builtin_ia32_psrlv4di:
4901 case clang::X86::BI__builtin_ia32_psrlv4si:
4902 case clang::X86::BI__builtin_ia32_psrlv8di:
4903 case clang::X86::BI__builtin_ia32_psrlv8hi:
4904 case clang::X86::BI__builtin_ia32_psrlv8si:
4905 case clang::X86::BI__builtin_ia32_psrlv16hi:
4906 case clang::X86::BI__builtin_ia32_psrlv16si:
4907 case clang::X86::BI__builtin_ia32_psrlv32hi:
4908 case clang::X86::BI__builtin_ia32_psrlwi128:
4909 case clang::X86::BI__builtin_ia32_psrlwi256:
4910 case clang::X86::BI__builtin_ia32_psrlwi512:
4911 case clang::X86::BI__builtin_ia32_psrldi128:
4912 case clang::X86::BI__builtin_ia32_psrldi256:
4913 case clang::X86::BI__builtin_ia32_psrldi512:
4914 case clang::X86::BI__builtin_ia32_psrlqi128:
4915 case clang::X86::BI__builtin_ia32_psrlqi256:
4916 case clang::X86::BI__builtin_ia32_psrlqi512:
4919 if (RHS.uge(LHS.getBitWidth())) {
4920 return APInt::getZero(LHS.getBitWidth());
4922 return LHS.lshr(RHS.getZExtValue());
4924 case clang::X86::BI__builtin_ia32_packsswb128:
4925 case clang::X86::BI__builtin_ia32_packsswb256:
4926 case clang::X86::BI__builtin_ia32_packsswb512:
4927 case clang::X86::BI__builtin_ia32_packssdw128:
4928 case clang::X86::BI__builtin_ia32_packssdw256:
4929 case clang::X86::BI__builtin_ia32_packssdw512:
4931 return APInt(Src).truncSSat(Src.getBitWidth() / 2);
4933 case clang::X86::BI__builtin_ia32_packusdw128:
4934 case clang::X86::BI__builtin_ia32_packusdw256:
4935 case clang::X86::BI__builtin_ia32_packusdw512:
4936 case clang::X86::BI__builtin_ia32_packuswb128:
4937 case clang::X86::BI__builtin_ia32_packuswb256:
4938 case clang::X86::BI__builtin_ia32_packuswb512:
4940 return APInt(Src).truncSSatU(Src.getBitWidth() / 2);
4943 case clang::X86::BI__builtin_ia32_selectss_128:
4944 case clang::X86::BI__builtin_ia32_selectsd_128:
4945 case clang::X86::BI__builtin_ia32_selectsh_128:
4946 case clang::X86::BI__builtin_ia32_selectsbf_128:
4948 case clang::X86::BI__builtin_ia32_vprotbi:
4949 case clang::X86::BI__builtin_ia32_vprotdi:
4950 case clang::X86::BI__builtin_ia32_vprotqi:
4951 case clang::X86::BI__builtin_ia32_vprotwi:
4952 case clang::X86::BI__builtin_ia32_prold128:
4953 case clang::X86::BI__builtin_ia32_prold256:
4954 case clang::X86::BI__builtin_ia32_prold512:
4955 case clang::X86::BI__builtin_ia32_prolq128:
4956 case clang::X86::BI__builtin_ia32_prolq256:
4957 case clang::X86::BI__builtin_ia32_prolq512:
4960 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotl(RHS); });
4962 case clang::X86::BI__builtin_ia32_prord128:
4963 case clang::X86::BI__builtin_ia32_prord256:
4964 case clang::X86::BI__builtin_ia32_prord512:
4965 case clang::X86::BI__builtin_ia32_prorq128:
4966 case clang::X86::BI__builtin_ia32_prorq256:
4967 case clang::X86::BI__builtin_ia32_prorq512:
4970 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotr(RHS); });
4972 case Builtin::BI__builtin_elementwise_max:
4973 case Builtin::BI__builtin_elementwise_min:
4976 case clang::X86::BI__builtin_ia32_phaddw128:
4977 case clang::X86::BI__builtin_ia32_phaddw256:
4978 case clang::X86::BI__builtin_ia32_phaddd128:
4979 case clang::X86::BI__builtin_ia32_phaddd256:
4982 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
4983 case clang::X86::BI__builtin_ia32_phaddsw128:
4984 case clang::X86::BI__builtin_ia32_phaddsw256:
4987 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.sadd_sat(RHS); });
4988 case clang::X86::BI__builtin_ia32_phsubw128:
4989 case clang::X86::BI__builtin_ia32_phsubw256:
4990 case clang::X86::BI__builtin_ia32_phsubd128:
4991 case clang::X86::BI__builtin_ia32_phsubd256:
4994 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS - RHS; });
4995 case clang::X86::BI__builtin_ia32_phsubsw128:
4996 case clang::X86::BI__builtin_ia32_phsubsw256:
4999 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.ssub_sat(RHS); });
5000 case clang::X86::BI__builtin_ia32_haddpd:
5001 case clang::X86::BI__builtin_ia32_haddps:
5002 case clang::X86::BI__builtin_ia32_haddpd256:
5003 case clang::X86::BI__builtin_ia32_haddps256:
5006 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
5011 case clang::X86::BI__builtin_ia32_hsubpd:
5012 case clang::X86::BI__builtin_ia32_hsubps:
5013 case clang::X86::BI__builtin_ia32_hsubpd256:
5014 case clang::X86::BI__builtin_ia32_hsubps256:
5017 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
5019 F.subtract(RHS, RM);
5022 case clang::X86::BI__builtin_ia32_addsubpd:
5023 case clang::X86::BI__builtin_ia32_addsubps:
5024 case clang::X86::BI__builtin_ia32_addsubpd256:
5025 case clang::X86::BI__builtin_ia32_addsubps256:
5028 case clang::X86::BI__builtin_ia32_pmuldq128:
5029 case clang::X86::BI__builtin_ia32_pmuldq256:
5030 case clang::X86::BI__builtin_ia32_pmuldq512:
5035 return llvm::APIntOps::mulsExtended(LoLHS, LoRHS);
5038 case clang::X86::BI__builtin_ia32_pmuludq128:
5039 case clang::X86::BI__builtin_ia32_pmuludq256:
5040 case clang::X86::BI__builtin_ia32_pmuludq512:
5045 return llvm::APIntOps::muluExtended(LoLHS, LoRHS);
5048 case clang::X86::BI__builtin_ia32_pclmulqdq128:
5049 case clang::X86::BI__builtin_ia32_pclmulqdq256:
5050 case clang::X86::BI__builtin_ia32_pclmulqdq512:
5053 case Builtin::BI__builtin_elementwise_fma:
5057 llvm::RoundingMode RM) {
5059 F.fusedMultiplyAdd(Y, Z, RM);
5063 case X86::BI__builtin_ia32_vpmadd52luq128:
5064 case X86::BI__builtin_ia32_vpmadd52luq256:
5065 case X86::BI__builtin_ia32_vpmadd52luq512:
5068 return A + (B.trunc(52) *
C.trunc(52)).zext(64);
5070 case X86::BI__builtin_ia32_vpmadd52huq128:
5071 case X86::BI__builtin_ia32_vpmadd52huq256:
5072 case X86::BI__builtin_ia32_vpmadd52huq512:
5075 return A + llvm::APIntOps::mulhu(B.trunc(52),
C.trunc(52)).zext(64);
5078 case X86::BI__builtin_ia32_vpshldd128:
5079 case X86::BI__builtin_ia32_vpshldd256:
5080 case X86::BI__builtin_ia32_vpshldd512:
5081 case X86::BI__builtin_ia32_vpshldq128:
5082 case X86::BI__builtin_ia32_vpshldq256:
5083 case X86::BI__builtin_ia32_vpshldq512:
5084 case X86::BI__builtin_ia32_vpshldw128:
5085 case X86::BI__builtin_ia32_vpshldw256:
5086 case X86::BI__builtin_ia32_vpshldw512:
5090 return llvm::APIntOps::fshl(Hi, Lo, Amt);
5093 case X86::BI__builtin_ia32_vpshrdd128:
5094 case X86::BI__builtin_ia32_vpshrdd256:
5095 case X86::BI__builtin_ia32_vpshrdd512:
5096 case X86::BI__builtin_ia32_vpshrdq128:
5097 case X86::BI__builtin_ia32_vpshrdq256:
5098 case X86::BI__builtin_ia32_vpshrdq512:
5099 case X86::BI__builtin_ia32_vpshrdw128:
5100 case X86::BI__builtin_ia32_vpshrdw256:
5101 case X86::BI__builtin_ia32_vpshrdw512:
5106 return llvm::APIntOps::fshr(Hi, Lo, Amt);
5108 case X86::BI__builtin_ia32_vpconflictsi_128:
5109 case X86::BI__builtin_ia32_vpconflictsi_256:
5110 case X86::BI__builtin_ia32_vpconflictsi_512:
5111 case X86::BI__builtin_ia32_vpconflictdi_128:
5112 case X86::BI__builtin_ia32_vpconflictdi_256:
5113 case X86::BI__builtin_ia32_vpconflictdi_512:
5115 case clang::X86::BI__builtin_ia32_blendpd:
5116 case clang::X86::BI__builtin_ia32_blendpd256:
5117 case clang::X86::BI__builtin_ia32_blendps:
5118 case clang::X86::BI__builtin_ia32_blendps256:
5119 case clang::X86::BI__builtin_ia32_pblendw128:
5120 case clang::X86::BI__builtin_ia32_pblendw256:
5121 case clang::X86::BI__builtin_ia32_pblendd128:
5122 case clang::X86::BI__builtin_ia32_pblendd256:
5124 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5126 unsigned MaskBit = (ShuffleMask >> (DstIdx % 8)) & 0x1;
5127 unsigned SrcVecIdx = MaskBit ? 1 : 0;
5128 return std::pair<unsigned, int>{SrcVecIdx,
static_cast<int>(DstIdx)};
5133 case clang::X86::BI__builtin_ia32_blendvpd:
5134 case clang::X86::BI__builtin_ia32_blendvpd256:
5135 case clang::X86::BI__builtin_ia32_blendvps:
5136 case clang::X86::BI__builtin_ia32_blendvps256:
5140 llvm::RoundingMode) {
return C.isNegative() ? T : F; });
5142 case clang::X86::BI__builtin_ia32_pblendvb128:
5143 case clang::X86::BI__builtin_ia32_pblendvb256:
5146 return ((
APInt)
C).isNegative() ? T : F;
5148 case X86::BI__builtin_ia32_ptestz128:
5149 case X86::BI__builtin_ia32_ptestz256:
5150 case X86::BI__builtin_ia32_vtestzps:
5151 case X86::BI__builtin_ia32_vtestzps256:
5152 case X86::BI__builtin_ia32_vtestzpd:
5153 case X86::BI__builtin_ia32_vtestzpd256:
5156 [](
const APInt &A,
const APInt &B) {
return (A & B) == 0; });
5157 case X86::BI__builtin_ia32_ptestc128:
5158 case X86::BI__builtin_ia32_ptestc256:
5159 case X86::BI__builtin_ia32_vtestcps:
5160 case X86::BI__builtin_ia32_vtestcps256:
5161 case X86::BI__builtin_ia32_vtestcpd:
5162 case X86::BI__builtin_ia32_vtestcpd256:
5165 [](
const APInt &A,
const APInt &B) {
return (~A & B) == 0; });
5166 case X86::BI__builtin_ia32_ptestnzc128:
5167 case X86::BI__builtin_ia32_ptestnzc256:
5168 case X86::BI__builtin_ia32_vtestnzcps:
5169 case X86::BI__builtin_ia32_vtestnzcps256:
5170 case X86::BI__builtin_ia32_vtestnzcpd:
5171 case X86::BI__builtin_ia32_vtestnzcpd256:
5174 return ((A & B) != 0) && ((~A & B) != 0);
5176 case X86::BI__builtin_ia32_selectb_128:
5177 case X86::BI__builtin_ia32_selectb_256:
5178 case X86::BI__builtin_ia32_selectb_512:
5179 case X86::BI__builtin_ia32_selectw_128:
5180 case X86::BI__builtin_ia32_selectw_256:
5181 case X86::BI__builtin_ia32_selectw_512:
5182 case X86::BI__builtin_ia32_selectd_128:
5183 case X86::BI__builtin_ia32_selectd_256:
5184 case X86::BI__builtin_ia32_selectd_512:
5185 case X86::BI__builtin_ia32_selectq_128:
5186 case X86::BI__builtin_ia32_selectq_256:
5187 case X86::BI__builtin_ia32_selectq_512:
5188 case X86::BI__builtin_ia32_selectph_128:
5189 case X86::BI__builtin_ia32_selectph_256:
5190 case X86::BI__builtin_ia32_selectph_512:
5191 case X86::BI__builtin_ia32_selectpbf_128:
5192 case X86::BI__builtin_ia32_selectpbf_256:
5193 case X86::BI__builtin_ia32_selectpbf_512:
5194 case X86::BI__builtin_ia32_selectps_128:
5195 case X86::BI__builtin_ia32_selectps_256:
5196 case X86::BI__builtin_ia32_selectps_512:
5197 case X86::BI__builtin_ia32_selectpd_128:
5198 case X86::BI__builtin_ia32_selectpd_256:
5199 case X86::BI__builtin_ia32_selectpd_512:
5202 case X86::BI__builtin_ia32_shufps:
5203 case X86::BI__builtin_ia32_shufps256:
5204 case X86::BI__builtin_ia32_shufps512:
5206 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5207 unsigned NumElemPerLane = 4;
5208 unsigned NumSelectableElems = NumElemPerLane / 2;
5209 unsigned BitsPerElem = 2;
5210 unsigned IndexMask = 0x3;
5211 unsigned MaskBits = 8;
5212 unsigned Lane = DstIdx / NumElemPerLane;
5213 unsigned ElemInLane = DstIdx % NumElemPerLane;
5214 unsigned LaneOffset = Lane * NumElemPerLane;
5215 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
5216 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5217 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
5218 return std::pair<unsigned, int>{SrcIdx,
5219 static_cast<int>(LaneOffset + Index)};
5221 case X86::BI__builtin_ia32_shufpd:
5222 case X86::BI__builtin_ia32_shufpd256:
5223 case X86::BI__builtin_ia32_shufpd512:
5225 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5226 unsigned NumElemPerLane = 2;
5227 unsigned NumSelectableElems = NumElemPerLane / 2;
5228 unsigned BitsPerElem = 1;
5229 unsigned IndexMask = 0x1;
5230 unsigned MaskBits = 8;
5231 unsigned Lane = DstIdx / NumElemPerLane;
5232 unsigned ElemInLane = DstIdx % NumElemPerLane;
5233 unsigned LaneOffset = Lane * NumElemPerLane;
5234 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
5235 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5236 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
5237 return std::pair<unsigned, int>{SrcIdx,
5238 static_cast<int>(LaneOffset + Index)};
5241 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v16qi:
5242 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v32qi:
5243 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v64qi:
5245 case X86::BI__builtin_ia32_vgf2p8affineqb_v16qi:
5246 case X86::BI__builtin_ia32_vgf2p8affineqb_v32qi:
5247 case X86::BI__builtin_ia32_vgf2p8affineqb_v64qi:
5250 case X86::BI__builtin_ia32_vgf2p8mulb_v16qi:
5251 case X86::BI__builtin_ia32_vgf2p8mulb_v32qi:
5252 case X86::BI__builtin_ia32_vgf2p8mulb_v64qi:
5255 case X86::BI__builtin_ia32_insertps128:
5257 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Mask) {
5259 if ((Mask & (1 << DstIdx)) != 0) {
5260 return std::pair<unsigned, int>{0, -1};
5264 unsigned SrcElem = (Mask >> 6) & 0x3;
5265 unsigned DstElem = (Mask >> 4) & 0x3;
5266 if (DstIdx == DstElem) {
5268 return std::pair<unsigned, int>{1,
static_cast<int>(SrcElem)};
5271 return std::pair<unsigned, int>{0,
static_cast<int>(DstIdx)};
5274 case X86::BI__builtin_ia32_permvarsi256:
5275 case X86::BI__builtin_ia32_permvarsf256:
5276 case X86::BI__builtin_ia32_permvardf512:
5277 case X86::BI__builtin_ia32_permvardi512:
5278 case X86::BI__builtin_ia32_permvarhi128:
5280 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5281 int Offset = ShuffleMask & 0x7;
5282 return std::pair<unsigned, int>{0, Offset};
5284 case X86::BI__builtin_ia32_permvarqi128:
5285 case X86::BI__builtin_ia32_permvarhi256:
5286 case X86::BI__builtin_ia32_permvarsi512:
5287 case X86::BI__builtin_ia32_permvarsf512:
5289 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5290 int Offset = ShuffleMask & 0xF;
5291 return std::pair<unsigned, int>{0, Offset};
5293 case X86::BI__builtin_ia32_permvardi256:
5294 case X86::BI__builtin_ia32_permvardf256:
5296 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5297 int Offset = ShuffleMask & 0x3;
5298 return std::pair<unsigned, int>{0, Offset};
5300 case X86::BI__builtin_ia32_permvarqi256:
5301 case X86::BI__builtin_ia32_permvarhi512:
5303 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5304 int Offset = ShuffleMask & 0x1F;
5305 return std::pair<unsigned, int>{0, Offset};
5307 case X86::BI__builtin_ia32_permvarqi512:
5309 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5310 int Offset = ShuffleMask & 0x3F;
5311 return std::pair<unsigned, int>{0, Offset};
5313 case X86::BI__builtin_ia32_vpermi2varq128:
5314 case X86::BI__builtin_ia32_vpermi2varpd128:
5316 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5317 int Offset = ShuffleMask & 0x1;
5318 unsigned SrcIdx = (ShuffleMask >> 1) & 0x1;
5319 return std::pair<unsigned, int>{SrcIdx, Offset};
5321 case X86::BI__builtin_ia32_vpermi2vard128:
5322 case X86::BI__builtin_ia32_vpermi2varps128:
5323 case X86::BI__builtin_ia32_vpermi2varq256:
5324 case X86::BI__builtin_ia32_vpermi2varpd256:
5326 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5327 int Offset = ShuffleMask & 0x3;
5328 unsigned SrcIdx = (ShuffleMask >> 2) & 0x1;
5329 return std::pair<unsigned, int>{SrcIdx, Offset};
5331 case X86::BI__builtin_ia32_vpermi2varhi128:
5332 case X86::BI__builtin_ia32_vpermi2vard256:
5333 case X86::BI__builtin_ia32_vpermi2varps256:
5334 case X86::BI__builtin_ia32_vpermi2varq512:
5335 case X86::BI__builtin_ia32_vpermi2varpd512:
5337 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5338 int Offset = ShuffleMask & 0x7;
5339 unsigned SrcIdx = (ShuffleMask >> 3) & 0x1;
5340 return std::pair<unsigned, int>{SrcIdx, Offset};
5342 case X86::BI__builtin_ia32_vpermi2varqi128:
5343 case X86::BI__builtin_ia32_vpermi2varhi256:
5344 case X86::BI__builtin_ia32_vpermi2vard512:
5345 case X86::BI__builtin_ia32_vpermi2varps512:
5347 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5348 int Offset = ShuffleMask & 0xF;
5349 unsigned SrcIdx = (ShuffleMask >> 4) & 0x1;
5350 return std::pair<unsigned, int>{SrcIdx, Offset};
5352 case X86::BI__builtin_ia32_vpermi2varqi256:
5353 case X86::BI__builtin_ia32_vpermi2varhi512:
5355 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5356 int Offset = ShuffleMask & 0x1F;
5357 unsigned SrcIdx = (ShuffleMask >> 5) & 0x1;
5358 return std::pair<unsigned, int>{SrcIdx, Offset};
5360 case X86::BI__builtin_ia32_vpermi2varqi512:
5362 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5363 int Offset = ShuffleMask & 0x3F;
5364 unsigned SrcIdx = (ShuffleMask >> 6) & 0x1;
5365 return std::pair<unsigned, int>{SrcIdx, Offset};
5367 case X86::BI__builtin_ia32_vperm2f128_pd256:
5368 case X86::BI__builtin_ia32_vperm2f128_ps256:
5369 case X86::BI__builtin_ia32_vperm2f128_si256:
5370 case X86::BI__builtin_ia32_permti256: {
5371 unsigned NumElements =
5372 Call->getArg(0)->getType()->castAs<
VectorType>()->getNumElements();
5373 unsigned PreservedBitsCnt = NumElements >> 2;
5376 [PreservedBitsCnt](
unsigned DstIdx,
unsigned ShuffleMask) {
5377 unsigned ControlBitsCnt = DstIdx >> PreservedBitsCnt << 2;
5378 unsigned ControlBits = ShuffleMask >> ControlBitsCnt;
5380 if (ControlBits & 0b1000)
5381 return std::make_pair(0u, -1);
5383 unsigned SrcVecIdx = (ControlBits & 0b10) >> 1;
5384 unsigned PreservedBitsMask = (1 << PreservedBitsCnt) - 1;
5385 int SrcIdx = ((ControlBits & 0b1) << PreservedBitsCnt) |
5386 (DstIdx & PreservedBitsMask);
5387 return std::make_pair(SrcVecIdx, SrcIdx);
5390 case X86::BI__builtin_ia32_pshufb128:
5391 case X86::BI__builtin_ia32_pshufb256:
5392 case X86::BI__builtin_ia32_pshufb512:
5394 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5395 uint8_t Ctlb =
static_cast<uint8_t
>(ShuffleMask);
5397 return std::make_pair(0, -1);
5399 unsigned LaneBase = (DstIdx / 16) * 16;
5400 unsigned SrcOffset = Ctlb & 0x0F;
5401 unsigned SrcIdx = LaneBase + SrcOffset;
5402 return std::make_pair(0,
static_cast<int>(SrcIdx));
5405 case X86::BI__builtin_ia32_pshuflw:
5406 case X86::BI__builtin_ia32_pshuflw256:
5407 case X86::BI__builtin_ia32_pshuflw512:
5409 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5410 unsigned LaneBase = (DstIdx / 8) * 8;
5411 unsigned LaneIdx = DstIdx % 8;
5413 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
5414 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
5417 return std::make_pair(0,
static_cast<int>(DstIdx));
5420 case X86::BI__builtin_ia32_pshufhw:
5421 case X86::BI__builtin_ia32_pshufhw256:
5422 case X86::BI__builtin_ia32_pshufhw512:
5424 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5425 unsigned LaneBase = (DstIdx / 8) * 8;
5426 unsigned LaneIdx = DstIdx % 8;
5428 unsigned Sel = (ShuffleMask >> (2 * (LaneIdx - 4))) & 0x3;
5429 return std::make_pair(0,
static_cast<int>(LaneBase + 4 + Sel));
5432 return std::make_pair(0,
static_cast<int>(DstIdx));
5435 case X86::BI__builtin_ia32_pshufd:
5436 case X86::BI__builtin_ia32_pshufd256:
5437 case X86::BI__builtin_ia32_pshufd512:
5438 case X86::BI__builtin_ia32_vpermilps:
5439 case X86::BI__builtin_ia32_vpermilps256:
5440 case X86::BI__builtin_ia32_vpermilps512:
5442 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5443 unsigned LaneBase = (DstIdx / 4) * 4;
5444 unsigned LaneIdx = DstIdx % 4;
5445 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
5446 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
5449 case X86::BI__builtin_ia32_vpermilvarpd:
5450 case X86::BI__builtin_ia32_vpermilvarpd256:
5451 case X86::BI__builtin_ia32_vpermilvarpd512:
5453 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5454 unsigned NumElemPerLane = 2;
5455 unsigned Lane = DstIdx / NumElemPerLane;
5456 unsigned Offset = ShuffleMask & 0b10 ? 1 : 0;
5457 return std::make_pair(
5458 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
5461 case X86::BI__builtin_ia32_vpermilvarps:
5462 case X86::BI__builtin_ia32_vpermilvarps256:
5463 case X86::BI__builtin_ia32_vpermilvarps512:
5465 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5466 unsigned NumElemPerLane = 4;
5467 unsigned Lane = DstIdx / NumElemPerLane;
5468 unsigned Offset = ShuffleMask & 0b11;
5469 return std::make_pair(
5470 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
5473 case X86::BI__builtin_ia32_vpermilpd:
5474 case X86::BI__builtin_ia32_vpermilpd256:
5475 case X86::BI__builtin_ia32_vpermilpd512:
5477 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Control) {
5478 unsigned NumElemPerLane = 2;
5479 unsigned BitsPerElem = 1;
5480 unsigned MaskBits = 8;
5481 unsigned IndexMask = 0x1;
5482 unsigned Lane = DstIdx / NumElemPerLane;
5483 unsigned LaneOffset = Lane * NumElemPerLane;
5484 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5485 unsigned Index = (Control >> BitIndex) & IndexMask;
5486 return std::make_pair(0,
static_cast<int>(LaneOffset + Index));
5489 case X86::BI__builtin_ia32_permdf256:
5490 case X86::BI__builtin_ia32_permdi256:
5492 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Control) {
5495 unsigned Index = (Control >> (2 * DstIdx)) & 0x3;
5496 return std::make_pair(0,
static_cast<int>(Index));
5499 case X86::BI__builtin_ia32_vpmultishiftqb128:
5500 case X86::BI__builtin_ia32_vpmultishiftqb256:
5501 case X86::BI__builtin_ia32_vpmultishiftqb512:
5503 case X86::BI__builtin_ia32_kandqi:
5504 case X86::BI__builtin_ia32_kandhi:
5505 case X86::BI__builtin_ia32_kandsi:
5506 case X86::BI__builtin_ia32_kanddi:
5509 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS & RHS; });
5511 case X86::BI__builtin_ia32_kandnqi:
5512 case X86::BI__builtin_ia32_kandnhi:
5513 case X86::BI__builtin_ia32_kandnsi:
5514 case X86::BI__builtin_ia32_kandndi:
5517 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~LHS & RHS; });
5519 case X86::BI__builtin_ia32_korqi:
5520 case X86::BI__builtin_ia32_korhi:
5521 case X86::BI__builtin_ia32_korsi:
5522 case X86::BI__builtin_ia32_kordi:
5525 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS | RHS; });
5527 case X86::BI__builtin_ia32_kxnorqi:
5528 case X86::BI__builtin_ia32_kxnorhi:
5529 case X86::BI__builtin_ia32_kxnorsi:
5530 case X86::BI__builtin_ia32_kxnordi:
5533 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~(LHS ^ RHS); });
5535 case X86::BI__builtin_ia32_kxorqi:
5536 case X86::BI__builtin_ia32_kxorhi:
5537 case X86::BI__builtin_ia32_kxorsi:
5538 case X86::BI__builtin_ia32_kxordi:
5541 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS ^ RHS; });
5543 case X86::BI__builtin_ia32_knotqi:
5544 case X86::BI__builtin_ia32_knothi:
5545 case X86::BI__builtin_ia32_knotsi:
5546 case X86::BI__builtin_ia32_knotdi:
5548 S, OpPC,
Call, [](
const APSInt &Src) {
return ~Src; });
5550 case X86::BI__builtin_ia32_kaddqi:
5551 case X86::BI__builtin_ia32_kaddhi:
5552 case X86::BI__builtin_ia32_kaddsi:
5553 case X86::BI__builtin_ia32_kadddi:
5556 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
5558 case X86::BI__builtin_ia32_kmovb:
5559 case X86::BI__builtin_ia32_kmovw:
5560 case X86::BI__builtin_ia32_kmovd:
5561 case X86::BI__builtin_ia32_kmovq:
5563 S, OpPC,
Call, [](
const APSInt &Src) {
return Src; });
5565 case X86::BI__builtin_ia32_kunpckhi:
5566 case X86::BI__builtin_ia32_kunpckdi:
5567 case X86::BI__builtin_ia32_kunpcksi:
5572 unsigned BW = A.getBitWidth();
5573 return APSInt(A.trunc(BW / 2).concat(B.trunc(BW / 2)),
5577 case X86::BI__builtin_ia32_phminposuw128:
5580 case X86::BI__builtin_ia32_psraq128:
5581 case X86::BI__builtin_ia32_psraq256:
5582 case X86::BI__builtin_ia32_psraq512:
5583 case X86::BI__builtin_ia32_psrad128:
5584 case X86::BI__builtin_ia32_psrad256:
5585 case X86::BI__builtin_ia32_psrad512:
5586 case X86::BI__builtin_ia32_psraw128:
5587 case X86::BI__builtin_ia32_psraw256:
5588 case X86::BI__builtin_ia32_psraw512:
5591 [](
const APInt &Elt, uint64_t Count) {
return Elt.ashr(Count); },
5592 [](
const APInt &Elt,
unsigned Width) {
return Elt.ashr(Width - 1); });
5594 case X86::BI__builtin_ia32_psllq128:
5595 case X86::BI__builtin_ia32_psllq256:
5596 case X86::BI__builtin_ia32_psllq512:
5597 case X86::BI__builtin_ia32_pslld128:
5598 case X86::BI__builtin_ia32_pslld256:
5599 case X86::BI__builtin_ia32_pslld512:
5600 case X86::BI__builtin_ia32_psllw128:
5601 case X86::BI__builtin_ia32_psllw256:
5602 case X86::BI__builtin_ia32_psllw512:
5605 [](
const APInt &Elt, uint64_t Count) {
return Elt.shl(Count); },
5606 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
5608 case X86::BI__builtin_ia32_psrlq128:
5609 case X86::BI__builtin_ia32_psrlq256:
5610 case X86::BI__builtin_ia32_psrlq512:
5611 case X86::BI__builtin_ia32_psrld128:
5612 case X86::BI__builtin_ia32_psrld256:
5613 case X86::BI__builtin_ia32_psrld512:
5614 case X86::BI__builtin_ia32_psrlw128:
5615 case X86::BI__builtin_ia32_psrlw256:
5616 case X86::BI__builtin_ia32_psrlw512:
5619 [](
const APInt &Elt, uint64_t Count) {
return Elt.lshr(Count); },
5620 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
5622 case X86::BI__builtin_ia32_pternlogd128_mask:
5623 case X86::BI__builtin_ia32_pternlogd256_mask:
5624 case X86::BI__builtin_ia32_pternlogd512_mask:
5625 case X86::BI__builtin_ia32_pternlogq128_mask:
5626 case X86::BI__builtin_ia32_pternlogq256_mask:
5627 case X86::BI__builtin_ia32_pternlogq512_mask:
5629 case X86::BI__builtin_ia32_pternlogd128_maskz:
5630 case X86::BI__builtin_ia32_pternlogd256_maskz:
5631 case X86::BI__builtin_ia32_pternlogd512_maskz:
5632 case X86::BI__builtin_ia32_pternlogq128_maskz:
5633 case X86::BI__builtin_ia32_pternlogq256_maskz:
5634 case X86::BI__builtin_ia32_pternlogq512_maskz:
5636 case Builtin::BI__builtin_elementwise_fshl:
5638 llvm::APIntOps::fshl);
5639 case Builtin::BI__builtin_elementwise_fshr:
5641 llvm::APIntOps::fshr);
5643 case X86::BI__builtin_ia32_shuf_f32x4_256:
5644 case X86::BI__builtin_ia32_shuf_i32x4_256:
5645 case X86::BI__builtin_ia32_shuf_f64x2_256:
5646 case X86::BI__builtin_ia32_shuf_i64x2_256:
5647 case X86::BI__builtin_ia32_shuf_f32x4:
5648 case X86::BI__builtin_ia32_shuf_i32x4:
5649 case X86::BI__builtin_ia32_shuf_f64x2:
5650 case X86::BI__builtin_ia32_shuf_i64x2: {
5656 unsigned LaneBits = 128u;
5657 unsigned NumLanes = (NumElems * ElemBits) / LaneBits;
5658 unsigned NumElemsPerLane = LaneBits / ElemBits;
5662 [NumLanes, NumElemsPerLane](
unsigned DstIdx,
unsigned ShuffleMask) {
5664 unsigned BitsPerElem = NumLanes / 2;
5665 unsigned IndexMask = (1u << BitsPerElem) - 1;
5666 unsigned Lane = DstIdx / NumElemsPerLane;
5667 unsigned SrcIdx = (Lane < NumLanes / 2) ? 0 : 1;
5668 unsigned BitIdx = BitsPerElem * Lane;
5669 unsigned SrcLaneIdx = (ShuffleMask >> BitIdx) & IndexMask;
5670 unsigned ElemInLane = DstIdx % NumElemsPerLane;
5671 unsigned IdxToPick = SrcLaneIdx * NumElemsPerLane + ElemInLane;
5672 return std::pair<unsigned, int>{SrcIdx, IdxToPick};
5676 case X86::BI__builtin_ia32_insertf32x4_256:
5677 case X86::BI__builtin_ia32_inserti32x4_256:
5678 case X86::BI__builtin_ia32_insertf64x2_256:
5679 case X86::BI__builtin_ia32_inserti64x2_256:
5680 case X86::BI__builtin_ia32_insertf32x4:
5681 case X86::BI__builtin_ia32_inserti32x4:
5682 case X86::BI__builtin_ia32_insertf64x2_512:
5683 case X86::BI__builtin_ia32_inserti64x2_512:
5684 case X86::BI__builtin_ia32_insertf32x8:
5685 case X86::BI__builtin_ia32_inserti32x8:
5686 case X86::BI__builtin_ia32_insertf64x4:
5687 case X86::BI__builtin_ia32_inserti64x4:
5688 case X86::BI__builtin_ia32_vinsertf128_ps256:
5689 case X86::BI__builtin_ia32_vinsertf128_pd256:
5690 case X86::BI__builtin_ia32_vinsertf128_si256:
5691 case X86::BI__builtin_ia32_insert128i256:
5694 case clang::X86::BI__builtin_ia32_vcvtps2ph:
5695 case clang::X86::BI__builtin_ia32_vcvtps2ph256:
5698 case X86::BI__builtin_ia32_vec_ext_v4hi:
5699 case X86::BI__builtin_ia32_vec_ext_v16qi:
5700 case X86::BI__builtin_ia32_vec_ext_v8hi:
5701 case X86::BI__builtin_ia32_vec_ext_v4si:
5702 case X86::BI__builtin_ia32_vec_ext_v2di:
5703 case X86::BI__builtin_ia32_vec_ext_v32qi:
5704 case X86::BI__builtin_ia32_vec_ext_v16hi:
5705 case X86::BI__builtin_ia32_vec_ext_v8si:
5706 case X86::BI__builtin_ia32_vec_ext_v4di:
5707 case X86::BI__builtin_ia32_vec_ext_v4sf:
5710 case X86::BI__builtin_ia32_vec_set_v4hi:
5711 case X86::BI__builtin_ia32_vec_set_v16qi:
5712 case X86::BI__builtin_ia32_vec_set_v8hi:
5713 case X86::BI__builtin_ia32_vec_set_v4si:
5714 case X86::BI__builtin_ia32_vec_set_v2di:
5715 case X86::BI__builtin_ia32_vec_set_v32qi:
5716 case X86::BI__builtin_ia32_vec_set_v16hi:
5717 case X86::BI__builtin_ia32_vec_set_v8si:
5718 case X86::BI__builtin_ia32_vec_set_v4di:
5721 case X86::BI__builtin_ia32_cvtb2mask128:
5722 case X86::BI__builtin_ia32_cvtb2mask256:
5723 case X86::BI__builtin_ia32_cvtb2mask512:
5724 case X86::BI__builtin_ia32_cvtw2mask128:
5725 case X86::BI__builtin_ia32_cvtw2mask256:
5726 case X86::BI__builtin_ia32_cvtw2mask512:
5727 case X86::BI__builtin_ia32_cvtd2mask128:
5728 case X86::BI__builtin_ia32_cvtd2mask256:
5729 case X86::BI__builtin_ia32_cvtd2mask512:
5730 case X86::BI__builtin_ia32_cvtq2mask128:
5731 case X86::BI__builtin_ia32_cvtq2mask256:
5732 case X86::BI__builtin_ia32_cvtq2mask512:
5735 case X86::BI__builtin_ia32_cvtmask2b128:
5736 case X86::BI__builtin_ia32_cvtmask2b256:
5737 case X86::BI__builtin_ia32_cvtmask2b512:
5738 case X86::BI__builtin_ia32_cvtmask2w128:
5739 case X86::BI__builtin_ia32_cvtmask2w256:
5740 case X86::BI__builtin_ia32_cvtmask2w512:
5741 case X86::BI__builtin_ia32_cvtmask2d128:
5742 case X86::BI__builtin_ia32_cvtmask2d256:
5743 case X86::BI__builtin_ia32_cvtmask2d512:
5744 case X86::BI__builtin_ia32_cvtmask2q128:
5745 case X86::BI__builtin_ia32_cvtmask2q256:
5746 case X86::BI__builtin_ia32_cvtmask2q512:
5749 case X86::BI__builtin_ia32_cvtsd2ss:
5752 case X86::BI__builtin_ia32_cvtsd2ss_round_mask:
5755 case X86::BI__builtin_ia32_cvtpd2ps:
5756 case X86::BI__builtin_ia32_cvtpd2ps256:
5758 case X86::BI__builtin_ia32_cvtpd2ps_mask:
5760 case X86::BI__builtin_ia32_cvtpd2ps512_mask:
5763 case X86::BI__builtin_ia32_cmpb128_mask:
5764 case X86::BI__builtin_ia32_cmpw128_mask:
5765 case X86::BI__builtin_ia32_cmpd128_mask:
5766 case X86::BI__builtin_ia32_cmpq128_mask:
5767 case X86::BI__builtin_ia32_cmpb256_mask:
5768 case X86::BI__builtin_ia32_cmpw256_mask:
5769 case X86::BI__builtin_ia32_cmpd256_mask:
5770 case X86::BI__builtin_ia32_cmpq256_mask:
5771 case X86::BI__builtin_ia32_cmpb512_mask:
5772 case X86::BI__builtin_ia32_cmpw512_mask:
5773 case X86::BI__builtin_ia32_cmpd512_mask:
5774 case X86::BI__builtin_ia32_cmpq512_mask:
5778 case X86::BI__builtin_ia32_ucmpb128_mask:
5779 case X86::BI__builtin_ia32_ucmpw128_mask:
5780 case X86::BI__builtin_ia32_ucmpd128_mask:
5781 case X86::BI__builtin_ia32_ucmpq128_mask:
5782 case X86::BI__builtin_ia32_ucmpb256_mask:
5783 case X86::BI__builtin_ia32_ucmpw256_mask:
5784 case X86::BI__builtin_ia32_ucmpd256_mask:
5785 case X86::BI__builtin_ia32_ucmpq256_mask:
5786 case X86::BI__builtin_ia32_ucmpb512_mask:
5787 case X86::BI__builtin_ia32_ucmpw512_mask:
5788 case X86::BI__builtin_ia32_ucmpd512_mask:
5789 case X86::BI__builtin_ia32_ucmpq512_mask:
5793 case X86::BI__builtin_ia32_vpshufbitqmb128_mask:
5794 case X86::BI__builtin_ia32_vpshufbitqmb256_mask:
5795 case X86::BI__builtin_ia32_vpshufbitqmb512_mask:
5798 case X86::BI__builtin_ia32_pslldqi128_byteshift:
5799 case X86::BI__builtin_ia32_pslldqi256_byteshift:
5800 case X86::BI__builtin_ia32_pslldqi512_byteshift:
5807 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
5808 unsigned LaneBase = (DstIdx / 16) * 16;
5809 unsigned LaneIdx = DstIdx % 16;
5810 if (LaneIdx < Shift)
5811 return std::make_pair(0, -1);
5813 return std::make_pair(0,
5814 static_cast<int>(LaneBase + LaneIdx - Shift));
5817 case X86::BI__builtin_ia32_psrldqi128_byteshift:
5818 case X86::BI__builtin_ia32_psrldqi256_byteshift:
5819 case X86::BI__builtin_ia32_psrldqi512_byteshift:
5826 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
5827 unsigned LaneBase = (DstIdx / 16) * 16;
5828 unsigned LaneIdx = DstIdx % 16;
5829 if (LaneIdx + Shift < 16)
5830 return std::make_pair(0,
5831 static_cast<int>(LaneBase + LaneIdx + Shift));
5833 return std::make_pair(0, -1);
5836 case X86::BI__builtin_ia32_palignr128:
5837 case X86::BI__builtin_ia32_palignr256:
5838 case X86::BI__builtin_ia32_palignr512:
5840 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Shift) {
5842 unsigned VecIdx = 1;
5845 int Lane = DstIdx / 16;
5846 int Offset = DstIdx % 16;
5849 unsigned ShiftedIdx = Offset + (Shift & 0xFF);
5850 if (ShiftedIdx < 16) {
5851 ElemIdx = ShiftedIdx + (Lane * 16);
5852 }
else if (ShiftedIdx < 32) {
5854 ElemIdx = (ShiftedIdx - 16) + (Lane * 16);
5857 return std::pair<unsigned, int>{VecIdx, ElemIdx};
5860 case X86::BI__builtin_ia32_alignd128:
5861 case X86::BI__builtin_ia32_alignd256:
5862 case X86::BI__builtin_ia32_alignd512:
5863 case X86::BI__builtin_ia32_alignq128:
5864 case X86::BI__builtin_ia32_alignq256:
5865 case X86::BI__builtin_ia32_alignq512: {
5866 unsigned NumElems =
Call->getType()->castAs<
VectorType>()->getNumElements();
5868 S, OpPC,
Call, [NumElems](
unsigned DstIdx,
unsigned Shift) {
5869 unsigned Imm = Shift & 0xFF;
5870 unsigned EffectiveShift = Imm & (NumElems - 1);
5871 unsigned SourcePos = DstIdx + EffectiveShift;
5872 unsigned VecIdx = SourcePos < NumElems ? 1u : 0u;
5873 unsigned ElemIdx = SourcePos & (NumElems - 1);
5874 return std::pair<unsigned, int>{VecIdx,
static_cast<int>(ElemIdx)};
5878 case clang::X86::BI__builtin_ia32_minps:
5879 case clang::X86::BI__builtin_ia32_minpd:
5880 case clang::X86::BI__builtin_ia32_minph128:
5881 case clang::X86::BI__builtin_ia32_minph256:
5882 case clang::X86::BI__builtin_ia32_minps256:
5883 case clang::X86::BI__builtin_ia32_minpd256:
5884 case clang::X86::BI__builtin_ia32_minps512:
5885 case clang::X86::BI__builtin_ia32_minpd512:
5886 case clang::X86::BI__builtin_ia32_minph512:
5890 std::optional<APSInt>) -> std::optional<APFloat> {
5891 if (A.isNaN() || A.isInfinity() || A.isDenormal() || B.isNaN() ||
5892 B.isInfinity() || B.isDenormal())
5893 return std::nullopt;
5894 if (A.isZero() && B.isZero())
5896 return llvm::minimum(A, B);
5899 case clang::X86::BI__builtin_ia32_minss:
5900 case clang::X86::BI__builtin_ia32_minsd:
5904 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
5909 case clang::X86::BI__builtin_ia32_minsd_round_mask:
5910 case clang::X86::BI__builtin_ia32_minss_round_mask:
5911 case clang::X86::BI__builtin_ia32_minsh_round_mask:
5912 case clang::X86::BI__builtin_ia32_maxsd_round_mask:
5913 case clang::X86::BI__builtin_ia32_maxss_round_mask:
5914 case clang::X86::BI__builtin_ia32_maxsh_round_mask: {
5915 bool IsMin = BuiltinID == clang::X86::BI__builtin_ia32_minsd_round_mask ||
5916 BuiltinID == clang::X86::BI__builtin_ia32_minss_round_mask ||
5917 BuiltinID == clang::X86::BI__builtin_ia32_minsh_round_mask;
5921 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
5926 case clang::X86::BI__builtin_ia32_maxps:
5927 case clang::X86::BI__builtin_ia32_maxpd:
5928 case clang::X86::BI__builtin_ia32_maxph128:
5929 case clang::X86::BI__builtin_ia32_maxph256:
5930 case clang::X86::BI__builtin_ia32_maxps256:
5931 case clang::X86::BI__builtin_ia32_maxpd256:
5932 case clang::X86::BI__builtin_ia32_maxps512:
5933 case clang::X86::BI__builtin_ia32_maxpd512:
5934 case clang::X86::BI__builtin_ia32_maxph512:
5938 std::optional<APSInt>) -> std::optional<APFloat> {
5939 if (A.isNaN() || A.isInfinity() || A.isDenormal() || B.isNaN() ||
5940 B.isInfinity() || B.isDenormal())
5941 return std::nullopt;
5942 if (A.isZero() && B.isZero())
5944 return llvm::maximum(A, B);
5947 case clang::X86::BI__builtin_ia32_maxss:
5948 case clang::X86::BI__builtin_ia32_maxsd:
5952 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
5959 diag::note_invalid_subexpr_in_const_expr)
5965 llvm_unreachable(
"Unhandled builtin ID");