4787 uint32_t BuiltinID) {
4789 switch (BuiltinID) {
4790 case Builtin::BI__builtin_is_constant_evaluated:
4793 case Builtin::BI__builtin_assume:
4794 case Builtin::BI__assume:
4797 case Builtin::BI__builtin_strcmp:
4798 case Builtin::BIstrcmp:
4799 case Builtin::BI__builtin_strncmp:
4800 case Builtin::BIstrncmp:
4801 case Builtin::BI__builtin_wcsncmp:
4802 case Builtin::BIwcsncmp:
4803 case Builtin::BI__builtin_wcscmp:
4804 case Builtin::BIwcscmp:
4807 case Builtin::BI__builtin_strlen:
4808 case Builtin::BIstrlen:
4809 case Builtin::BI__builtin_wcslen:
4810 case Builtin::BIwcslen:
4813 case Builtin::BI__builtin_nan:
4814 case Builtin::BI__builtin_nanf:
4815 case Builtin::BI__builtin_nanl:
4816 case Builtin::BI__builtin_nanf16:
4817 case Builtin::BI__builtin_nanf128:
4820 case Builtin::BI__builtin_nans:
4821 case Builtin::BI__builtin_nansf:
4822 case Builtin::BI__builtin_nansl:
4823 case Builtin::BI__builtin_nansf16:
4824 case Builtin::BI__builtin_nansf128:
4827 case Builtin::BI__builtin_huge_val:
4828 case Builtin::BI__builtin_huge_valf:
4829 case Builtin::BI__builtin_huge_vall:
4830 case Builtin::BI__builtin_huge_valf16:
4831 case Builtin::BI__builtin_huge_valf128:
4832 case Builtin::BI__builtin_inf:
4833 case Builtin::BI__builtin_inff:
4834 case Builtin::BI__builtin_infl:
4835 case Builtin::BI__builtin_inff16:
4836 case Builtin::BI__builtin_inff128:
4839 case Builtin::BI__builtin_copysign:
4840 case Builtin::BI__builtin_copysignf:
4841 case Builtin::BI__builtin_copysignl:
4842 case Builtin::BI__builtin_copysignf128:
4845 case Builtin::BI__builtin_fmin:
4846 case Builtin::BI__builtin_fminf:
4847 case Builtin::BI__builtin_fminl:
4848 case Builtin::BI__builtin_fminf16:
4849 case Builtin::BI__builtin_fminf128:
4852 case Builtin::BI__builtin_fminimum_num:
4853 case Builtin::BI__builtin_fminimum_numf:
4854 case Builtin::BI__builtin_fminimum_numl:
4855 case Builtin::BI__builtin_fminimum_numf16:
4856 case Builtin::BI__builtin_fminimum_numf128:
4859 case Builtin::BI__builtin_fmax:
4860 case Builtin::BI__builtin_fmaxf:
4861 case Builtin::BI__builtin_fmaxl:
4862 case Builtin::BI__builtin_fmaxf16:
4863 case Builtin::BI__builtin_fmaxf128:
4866 case Builtin::BI__builtin_fmaximum_num:
4867 case Builtin::BI__builtin_fmaximum_numf:
4868 case Builtin::BI__builtin_fmaximum_numl:
4869 case Builtin::BI__builtin_fmaximum_numf16:
4870 case Builtin::BI__builtin_fmaximum_numf128:
4873 case Builtin::BI__builtin_isnan:
4876 case Builtin::BI__builtin_issignaling:
4879 case Builtin::BI__builtin_isinf:
4882 case Builtin::BI__builtin_isinf_sign:
4885 case Builtin::BI__builtin_isfinite:
4888 case Builtin::BI__builtin_isnormal:
4891 case Builtin::BI__builtin_issubnormal:
4894 case Builtin::BI__builtin_iszero:
4897 case Builtin::BI__builtin_signbit:
4898 case Builtin::BI__builtin_signbitf:
4899 case Builtin::BI__builtin_signbitl:
4902 case Builtin::BI__builtin_isgreater:
4903 case Builtin::BI__builtin_isgreaterequal:
4904 case Builtin::BI__builtin_isless:
4905 case Builtin::BI__builtin_islessequal:
4906 case Builtin::BI__builtin_islessgreater:
4907 case Builtin::BI__builtin_isunordered:
4910 case Builtin::BI__builtin_isfpclass:
4913 case Builtin::BI__builtin_fpclassify:
4916 case Builtin::BI__builtin_fabs:
4917 case Builtin::BI__builtin_fabsf:
4918 case Builtin::BI__builtin_fabsl:
4919 case Builtin::BI__builtin_fabsf128:
4922 case Builtin::BI__builtin_abs:
4923 case Builtin::BI__builtin_labs:
4924 case Builtin::BI__builtin_llabs:
4927 case Builtin::BI__builtin_popcount:
4928 case Builtin::BI__builtin_popcountl:
4929 case Builtin::BI__builtin_popcountll:
4930 case Builtin::BI__builtin_popcountg:
4931 case Builtin::BI__popcnt16:
4932 case Builtin::BI__popcnt:
4933 case Builtin::BI__popcnt64:
4936 case Builtin::BI__builtin_parity:
4937 case Builtin::BI__builtin_parityl:
4938 case Builtin::BI__builtin_parityll:
4941 return APInt(Val.getBitWidth(), Val.popcount() % 2);
4943 case Builtin::BI__builtin_clrsb:
4944 case Builtin::BI__builtin_clrsbl:
4945 case Builtin::BI__builtin_clrsbll:
4948 return APInt(Val.getBitWidth(),
4949 Val.getBitWidth() - Val.getSignificantBits());
4951 case Builtin::BI__builtin_bitreverseg:
4952 case Builtin::BI__builtin_bitreverse8:
4953 case Builtin::BI__builtin_bitreverse16:
4954 case Builtin::BI__builtin_bitreverse32:
4955 case Builtin::BI__builtin_bitreverse64:
4957 S, OpPC,
Call, [](
const APSInt &Val) {
return Val.reverseBits(); });
4959 case Builtin::BI__builtin_classify_type:
4962 case Builtin::BI__builtin_expect:
4963 case Builtin::BI__builtin_expect_with_probability:
4966 case Builtin::BI__builtin_rotateleft8:
4967 case Builtin::BI__builtin_rotateleft16:
4968 case Builtin::BI__builtin_rotateleft32:
4969 case Builtin::BI__builtin_rotateleft64:
4970 case Builtin::BI__builtin_stdc_rotate_left:
4971 case Builtin::BIstdc_rotate_left_uc:
4972 case Builtin::BIstdc_rotate_left_us:
4973 case Builtin::BIstdc_rotate_left_ui:
4974 case Builtin::BIstdc_rotate_left_ul:
4975 case Builtin::BIstdc_rotate_left_ull:
4976 case Builtin::BI_rotl8:
4977 case Builtin::BI_rotl16:
4978 case Builtin::BI_rotl:
4979 case Builtin::BI_lrotl:
4980 case Builtin::BI_rotl64:
4981 case Builtin::BI__builtin_rotateright8:
4982 case Builtin::BI__builtin_rotateright16:
4983 case Builtin::BI__builtin_rotateright32:
4984 case Builtin::BI__builtin_rotateright64:
4985 case Builtin::BI__builtin_stdc_rotate_right:
4986 case Builtin::BIstdc_rotate_right_uc:
4987 case Builtin::BIstdc_rotate_right_us:
4988 case Builtin::BIstdc_rotate_right_ui:
4989 case Builtin::BIstdc_rotate_right_ul:
4990 case Builtin::BIstdc_rotate_right_ull:
4991 case Builtin::BI_rotr8:
4992 case Builtin::BI_rotr16:
4993 case Builtin::BI_rotr:
4994 case Builtin::BI_lrotr:
4995 case Builtin::BI_rotr64: {
4998 switch (BuiltinID) {
4999 case Builtin::BI__builtin_rotateright8:
5000 case Builtin::BI__builtin_rotateright16:
5001 case Builtin::BI__builtin_rotateright32:
5002 case Builtin::BI__builtin_rotateright64:
5003 case Builtin::BI__builtin_stdc_rotate_right:
5004 case Builtin::BIstdc_rotate_right_uc:
5005 case Builtin::BIstdc_rotate_right_us:
5006 case Builtin::BIstdc_rotate_right_ui:
5007 case Builtin::BIstdc_rotate_right_ul:
5008 case Builtin::BIstdc_rotate_right_ull:
5009 case Builtin::BI_rotr8:
5010 case Builtin::BI_rotr16:
5011 case Builtin::BI_rotr:
5012 case Builtin::BI_lrotr:
5013 case Builtin::BI_rotr64:
5014 IsRotateRight =
true;
5017 IsRotateRight =
false;
5024 return IsRotateRight ?
Value.rotr(Amount.getZExtValue())
5025 :
Value.rotl(Amount.getZExtValue());
5029 case Builtin::BIstdc_leading_zeros_uc:
5030 case Builtin::BIstdc_leading_zeros_us:
5031 case Builtin::BIstdc_leading_zeros_ui:
5032 case Builtin::BIstdc_leading_zeros_ul:
5033 case Builtin::BIstdc_leading_zeros_ull:
5034 case Builtin::BI__builtin_stdc_leading_zeros: {
5037 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
5038 return APInt(ResWidth, Val.countl_zero());
5042 case Builtin::BIstdc_leading_ones_uc:
5043 case Builtin::BIstdc_leading_ones_us:
5044 case Builtin::BIstdc_leading_ones_ui:
5045 case Builtin::BIstdc_leading_ones_ul:
5046 case Builtin::BIstdc_leading_ones_ull:
5047 case Builtin::BI__builtin_stdc_leading_ones: {
5050 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
5051 return APInt(ResWidth, Val.countl_one());
5055 case Builtin::BIstdc_trailing_zeros_uc:
5056 case Builtin::BIstdc_trailing_zeros_us:
5057 case Builtin::BIstdc_trailing_zeros_ui:
5058 case Builtin::BIstdc_trailing_zeros_ul:
5059 case Builtin::BIstdc_trailing_zeros_ull:
5060 case Builtin::BI__builtin_stdc_trailing_zeros: {
5063 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
5064 return APInt(ResWidth, Val.countr_zero());
5068 case Builtin::BIstdc_trailing_ones_uc:
5069 case Builtin::BIstdc_trailing_ones_us:
5070 case Builtin::BIstdc_trailing_ones_ui:
5071 case Builtin::BIstdc_trailing_ones_ul:
5072 case Builtin::BIstdc_trailing_ones_ull:
5073 case Builtin::BI__builtin_stdc_trailing_ones: {
5076 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
5077 return APInt(ResWidth, Val.countr_one());
5081 case Builtin::BIstdc_first_leading_zero_uc:
5082 case Builtin::BIstdc_first_leading_zero_us:
5083 case Builtin::BIstdc_first_leading_zero_ui:
5084 case Builtin::BIstdc_first_leading_zero_ul:
5085 case Builtin::BIstdc_first_leading_zero_ull:
5086 case Builtin::BI__builtin_stdc_first_leading_zero: {
5089 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
5090 return APInt(ResWidth, Val.isAllOnes() ? 0 : Val.countl_one() + 1);
5094 case Builtin::BIstdc_first_leading_one_uc:
5095 case Builtin::BIstdc_first_leading_one_us:
5096 case Builtin::BIstdc_first_leading_one_ui:
5097 case Builtin::BIstdc_first_leading_one_ul:
5098 case Builtin::BIstdc_first_leading_one_ull:
5099 case Builtin::BI__builtin_stdc_first_leading_one: {
5102 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
5103 return APInt(ResWidth, Val.isZero() ? 0 : Val.countl_zero() + 1);
5107 case Builtin::BIstdc_first_trailing_zero_uc:
5108 case Builtin::BIstdc_first_trailing_zero_us:
5109 case Builtin::BIstdc_first_trailing_zero_ui:
5110 case Builtin::BIstdc_first_trailing_zero_ul:
5111 case Builtin::BIstdc_first_trailing_zero_ull:
5112 case Builtin::BI__builtin_stdc_first_trailing_zero: {
5115 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
5116 return APInt(ResWidth, Val.isAllOnes() ? 0 : Val.countr_one() + 1);
5120 case Builtin::BIstdc_first_trailing_one_uc:
5121 case Builtin::BIstdc_first_trailing_one_us:
5122 case Builtin::BIstdc_first_trailing_one_ui:
5123 case Builtin::BIstdc_first_trailing_one_ul:
5124 case Builtin::BIstdc_first_trailing_one_ull:
5125 case Builtin::BI__builtin_stdc_first_trailing_one: {
5128 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
5129 return APInt(ResWidth, Val.isZero() ? 0 : Val.countr_zero() + 1);
5133 case Builtin::BIstdc_count_zeros_uc:
5134 case Builtin::BIstdc_count_zeros_us:
5135 case Builtin::BIstdc_count_zeros_ui:
5136 case Builtin::BIstdc_count_zeros_ul:
5137 case Builtin::BIstdc_count_zeros_ull:
5138 case Builtin::BI__builtin_stdc_count_zeros: {
5141 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
5142 unsigned BitWidth = Val.getBitWidth();
5143 return APInt(ResWidth, BitWidth - Val.popcount());
5147 case Builtin::BIstdc_count_ones_uc:
5148 case Builtin::BIstdc_count_ones_us:
5149 case Builtin::BIstdc_count_ones_ui:
5150 case Builtin::BIstdc_count_ones_ul:
5151 case Builtin::BIstdc_count_ones_ull:
5152 case Builtin::BI__builtin_stdc_count_ones: {
5155 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
5156 return APInt(ResWidth, Val.popcount());
5160 case Builtin::BIstdc_has_single_bit_uc:
5161 case Builtin::BIstdc_has_single_bit_us:
5162 case Builtin::BIstdc_has_single_bit_ui:
5163 case Builtin::BIstdc_has_single_bit_ul:
5164 case Builtin::BIstdc_has_single_bit_ull:
5165 case Builtin::BI__builtin_stdc_has_single_bit: {
5168 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
5169 return APInt(ResWidth, Val.popcount() == 1 ? 1 : 0);
5173 case Builtin::BIstdc_bit_width_uc:
5174 case Builtin::BIstdc_bit_width_us:
5175 case Builtin::BIstdc_bit_width_ui:
5176 case Builtin::BIstdc_bit_width_ul:
5177 case Builtin::BIstdc_bit_width_ull:
5178 case Builtin::BI__builtin_stdc_bit_width: {
5181 S, OpPC,
Call, [ResWidth](
const APSInt &Val) {
5182 unsigned BitWidth = Val.getBitWidth();
5183 return APInt(ResWidth, BitWidth - Val.countl_zero());
5187 case Builtin::BIstdc_bit_floor_uc:
5188 case Builtin::BIstdc_bit_floor_us:
5189 case Builtin::BIstdc_bit_floor_ui:
5190 case Builtin::BIstdc_bit_floor_ul:
5191 case Builtin::BIstdc_bit_floor_ull:
5192 case Builtin::BI__builtin_stdc_bit_floor:
5195 unsigned BitWidth = Val.getBitWidth();
5197 return APInt::getZero(BitWidth);
5198 return APInt::getOneBitSet(BitWidth,
5199 BitWidth - Val.countl_zero() - 1);
5202 case Builtin::BIstdc_bit_ceil_uc:
5203 case Builtin::BIstdc_bit_ceil_us:
5204 case Builtin::BIstdc_bit_ceil_ui:
5205 case Builtin::BIstdc_bit_ceil_ul:
5206 case Builtin::BIstdc_bit_ceil_ull:
5207 case Builtin::BI__builtin_stdc_bit_ceil:
5210 unsigned BitWidth = Val.getBitWidth();
5212 return APInt(BitWidth, 1);
5214 APInt ValMinusOne =
V - 1;
5215 unsigned LeadingZeros = ValMinusOne.countl_zero();
5216 if (LeadingZeros == 0)
5217 return APInt(BitWidth, 0);
5218 return APInt::getOneBitSet(BitWidth, BitWidth - LeadingZeros);
5221 case Builtin::BI__builtin_ffs:
5222 case Builtin::BI__builtin_ffsl:
5223 case Builtin::BI__builtin_ffsll:
5226 return APInt(Val.getBitWidth(),
5227 Val.isZero() ? 0u : Val.countTrailingZeros() + 1u);
5230 case Builtin::BIaddressof:
5231 case Builtin::BI__addressof:
5232 case Builtin::BI__builtin_addressof:
5236 case Builtin::BIas_const:
5237 case Builtin::BIforward:
5238 case Builtin::BIforward_like:
5239 case Builtin::BImove:
5240 case Builtin::BImove_if_noexcept:
5244 case Builtin::BI__builtin_eh_return_data_regno:
5247 case Builtin::BI__builtin_launder:
5251 case Builtin::BI__builtin_add_overflow:
5252 case Builtin::BI__builtin_sub_overflow:
5253 case Builtin::BI__builtin_mul_overflow:
5254 case Builtin::BI__builtin_sadd_overflow:
5255 case Builtin::BI__builtin_uadd_overflow:
5256 case Builtin::BI__builtin_uaddl_overflow:
5257 case Builtin::BI__builtin_uaddll_overflow:
5258 case Builtin::BI__builtin_usub_overflow:
5259 case Builtin::BI__builtin_usubl_overflow:
5260 case Builtin::BI__builtin_usubll_overflow:
5261 case Builtin::BI__builtin_umul_overflow:
5262 case Builtin::BI__builtin_umull_overflow:
5263 case Builtin::BI__builtin_umulll_overflow:
5264 case Builtin::BI__builtin_saddl_overflow:
5265 case Builtin::BI__builtin_saddll_overflow:
5266 case Builtin::BI__builtin_ssub_overflow:
5267 case Builtin::BI__builtin_ssubl_overflow:
5268 case Builtin::BI__builtin_ssubll_overflow:
5269 case Builtin::BI__builtin_smul_overflow:
5270 case Builtin::BI__builtin_smull_overflow:
5271 case Builtin::BI__builtin_smulll_overflow:
5274 case Builtin::BI__builtin_addcb:
5275 case Builtin::BI__builtin_addcs:
5276 case Builtin::BI__builtin_addc:
5277 case Builtin::BI__builtin_addcl:
5278 case Builtin::BI__builtin_addcll:
5279 case Builtin::BI__builtin_subcb:
5280 case Builtin::BI__builtin_subcs:
5281 case Builtin::BI__builtin_subc:
5282 case Builtin::BI__builtin_subcl:
5283 case Builtin::BI__builtin_subcll:
5286 case Builtin::BI__builtin_clz:
5287 case Builtin::BI__builtin_clzl:
5288 case Builtin::BI__builtin_clzll:
5289 case Builtin::BI__builtin_clzs:
5290 case Builtin::BI__builtin_clzg:
5291 case Builtin::BI__lzcnt16:
5292 case Builtin::BI__lzcnt:
5293 case Builtin::BI__lzcnt64:
5296 case Builtin::BI__builtin_ctz:
5297 case Builtin::BI__builtin_ctzl:
5298 case Builtin::BI__builtin_ctzll:
5299 case Builtin::BI__builtin_ctzs:
5300 case Builtin::BI__builtin_ctzg:
5303 case Builtin::BI__builtin_elementwise_clzg:
5304 case Builtin::BI__builtin_elementwise_ctzg:
5307 case Builtin::BI__builtin_bswapg:
5308 case Builtin::BI__builtin_bswap16:
5309 case Builtin::BI__builtin_bswap32:
5310 case Builtin::BI__builtin_bswap64:
5311 case Builtin::BIstdc_memreverse8u8:
5312 case Builtin::BIstdc_memreverse8u16:
5313 case Builtin::BIstdc_memreverse8u32:
5314 case Builtin::BIstdc_memreverse8u64:
5317 case Builtin::BIstdc_memreverse8:
5318 case Builtin::BI__builtin_stdc_memreverse8:
5321 case Builtin::BIstdc_load8_leu8:
5322 case Builtin::BIstdc_load8_leu16:
5323 case Builtin::BIstdc_load8_leu32:
5324 case Builtin::BIstdc_load8_leu64:
5325 case Builtin::BIstdc_load8_les8:
5326 case Builtin::BIstdc_load8_les16:
5327 case Builtin::BIstdc_load8_les32:
5328 case Builtin::BIstdc_load8_les64:
5332 case Builtin::BIstdc_load8_aligned_leu8:
5333 case Builtin::BIstdc_load8_aligned_leu16:
5334 case Builtin::BIstdc_load8_aligned_leu32:
5335 case Builtin::BIstdc_load8_aligned_leu64:
5336 case Builtin::BIstdc_load8_aligned_les8:
5337 case Builtin::BIstdc_load8_aligned_les16:
5338 case Builtin::BIstdc_load8_aligned_les32:
5339 case Builtin::BIstdc_load8_aligned_les64:
5343 case Builtin::BIstdc_load8_beu8:
5344 case Builtin::BIstdc_load8_beu16:
5345 case Builtin::BIstdc_load8_beu32:
5346 case Builtin::BIstdc_load8_beu64:
5347 case Builtin::BIstdc_load8_bes8:
5348 case Builtin::BIstdc_load8_bes16:
5349 case Builtin::BIstdc_load8_bes32:
5350 case Builtin::BIstdc_load8_bes64:
5354 case Builtin::BIstdc_load8_aligned_beu8:
5355 case Builtin::BIstdc_load8_aligned_beu16:
5356 case Builtin::BIstdc_load8_aligned_beu32:
5357 case Builtin::BIstdc_load8_aligned_beu64:
5358 case Builtin::BIstdc_load8_aligned_bes8:
5359 case Builtin::BIstdc_load8_aligned_bes16:
5360 case Builtin::BIstdc_load8_aligned_bes32:
5361 case Builtin::BIstdc_load8_aligned_bes64:
5365 case Builtin::BI__atomic_always_lock_free:
5366 case Builtin::BI__atomic_is_lock_free:
5369 case Builtin::BI__c11_atomic_is_lock_free:
5372 case Builtin::BI__builtin_complex:
5375 case Builtin::BI__builtin_is_aligned:
5376 case Builtin::BI__builtin_align_up:
5377 case Builtin::BI__builtin_align_down:
5380 case Builtin::BI__builtin_assume_aligned:
5383 case clang::X86::BI__builtin_ia32_crc32qi:
5385 case clang::X86::BI__builtin_ia32_crc32hi:
5387 case clang::X86::BI__builtin_ia32_crc32si:
5389 case clang::X86::BI__builtin_ia32_crc32di:
5392 case clang::X86::BI__builtin_ia32_bextr_u32:
5393 case clang::X86::BI__builtin_ia32_bextr_u64:
5394 case clang::X86::BI__builtin_ia32_bextri_u32:
5395 case clang::X86::BI__builtin_ia32_bextri_u64:
5398 unsigned BitWidth = Val.getBitWidth();
5399 uint64_t Shift = Idx.extractBitsAsZExtValue(8, 0);
5400 uint64_t Length = Idx.extractBitsAsZExtValue(8, 8);
5401 if (Length > BitWidth) {
5406 if (Length == 0 || Shift >= BitWidth)
5407 return APInt(BitWidth, 0);
5409 uint64_t
Result = Val.getZExtValue() >> Shift;
5410 Result &= llvm::maskTrailingOnes<uint64_t>(Length);
5414 case clang::X86::BI__builtin_ia32_bzhi_si:
5415 case clang::X86::BI__builtin_ia32_bzhi_di:
5418 unsigned BitWidth = Val.getBitWidth();
5419 uint64_t Index = Idx.extractBitsAsZExtValue(8, 0);
5422 if (Index < BitWidth)
5423 Result.clearHighBits(BitWidth - Index);
5428 case clang::X86::BI__builtin_ia32_ktestcqi:
5429 case clang::X86::BI__builtin_ia32_ktestchi:
5430 case clang::X86::BI__builtin_ia32_ktestcsi:
5431 case clang::X86::BI__builtin_ia32_ktestcdi:
5434 return APInt(
sizeof(
unsigned char) * 8, (~A & B) == 0);
5437 case clang::X86::BI__builtin_ia32_ktestzqi:
5438 case clang::X86::BI__builtin_ia32_ktestzhi:
5439 case clang::X86::BI__builtin_ia32_ktestzsi:
5440 case clang::X86::BI__builtin_ia32_ktestzdi:
5443 return APInt(
sizeof(
unsigned char) * 8, (A & B) == 0);
5446 case clang::X86::BI__builtin_ia32_kortestcqi:
5447 case clang::X86::BI__builtin_ia32_kortestchi:
5448 case clang::X86::BI__builtin_ia32_kortestcsi:
5449 case clang::X86::BI__builtin_ia32_kortestcdi:
5452 return APInt(
sizeof(
unsigned char) * 8, ~(A | B) == 0);
5455 case clang::X86::BI__builtin_ia32_kortestzqi:
5456 case clang::X86::BI__builtin_ia32_kortestzhi:
5457 case clang::X86::BI__builtin_ia32_kortestzsi:
5458 case clang::X86::BI__builtin_ia32_kortestzdi:
5461 return APInt(
sizeof(
unsigned char) * 8, (A | B) == 0);
5464 case clang::X86::BI__builtin_ia32_kshiftliqi:
5465 case clang::X86::BI__builtin_ia32_kshiftlihi:
5466 case clang::X86::BI__builtin_ia32_kshiftlisi:
5467 case clang::X86::BI__builtin_ia32_kshiftlidi:
5470 unsigned Amt = RHS.getZExtValue() & 0xFF;
5471 if (Amt >= LHS.getBitWidth())
5472 return APInt::getZero(LHS.getBitWidth());
5473 return LHS.shl(Amt);
5476 case clang::X86::BI__builtin_ia32_kshiftriqi:
5477 case clang::X86::BI__builtin_ia32_kshiftrihi:
5478 case clang::X86::BI__builtin_ia32_kshiftrisi:
5479 case clang::X86::BI__builtin_ia32_kshiftridi:
5482 unsigned Amt = RHS.getZExtValue() & 0xFF;
5483 if (Amt >= LHS.getBitWidth())
5484 return APInt::getZero(LHS.getBitWidth());
5485 return LHS.lshr(Amt);
5488 case clang::X86::BI__builtin_ia32_lzcnt_u16:
5489 case clang::X86::BI__builtin_ia32_lzcnt_u32:
5490 case clang::X86::BI__builtin_ia32_lzcnt_u64:
5493 return APInt(Src.getBitWidth(), Src.countLeadingZeros());
5496 case clang::X86::BI__builtin_ia32_tzcnt_u16:
5497 case clang::X86::BI__builtin_ia32_tzcnt_u32:
5498 case clang::X86::BI__builtin_ia32_tzcnt_u64:
5501 return APInt(Src.getBitWidth(), Src.countTrailingZeros());
5504 case clang::X86::BI__builtin_ia32_addcarryx_u32:
5505 case clang::X86::BI__builtin_ia32_addcarryx_u64:
5509 case clang::X86::BI__builtin_ia32_subborrow_u32:
5510 case clang::X86::BI__builtin_ia32_subborrow_u64:
5514 case Builtin::BI__builtin_os_log_format_buffer_size:
5517 case Builtin::BI__builtin_ptrauth_string_discriminator:
5520 case Builtin::BI__builtin_infer_alloc_token:
5523 case Builtin::BI__noop:
5527 case Builtin::BI__builtin_operator_new:
5530 case Builtin::BI__builtin_operator_delete:
5533 case Builtin::BI__arithmetic_fence:
5536 case Builtin::BI__builtin_reduce_add:
5537 case Builtin::BI__builtin_reduce_mul:
5538 case Builtin::BI__builtin_reduce_and:
5539 case Builtin::BI__builtin_reduce_or:
5540 case Builtin::BI__builtin_reduce_xor:
5541 case Builtin::BI__builtin_reduce_min:
5542 case Builtin::BI__builtin_reduce_max:
5545 case Builtin::BI__builtin_elementwise_popcount:
5548 return APInt(Src.getBitWidth(), Src.popcount());
5550 case Builtin::BI__builtin_elementwise_bitreverse:
5552 S, OpPC,
Call, [](
const APSInt &Src) {
return Src.reverseBits(); });
5554 case Builtin::BI__builtin_elementwise_abs:
5557 case Builtin::BI__builtin_memcpy:
5558 case Builtin::BImemcpy:
5559 case Builtin::BI__builtin_wmemcpy:
5560 case Builtin::BIwmemcpy:
5561 case Builtin::BI__builtin_memmove:
5562 case Builtin::BImemmove:
5563 case Builtin::BI__builtin_wmemmove:
5564 case Builtin::BIwmemmove:
5567 case Builtin::BI__builtin_memcmp:
5568 case Builtin::BImemcmp:
5569 case Builtin::BI__builtin_bcmp:
5570 case Builtin::BIbcmp:
5571 case Builtin::BI__builtin_wmemcmp:
5572 case Builtin::BIwmemcmp:
5575 case Builtin::BImemchr:
5576 case Builtin::BI__builtin_memchr:
5577 case Builtin::BIstrchr:
5578 case Builtin::BI__builtin_strchr:
5579 case Builtin::BIwmemchr:
5580 case Builtin::BI__builtin_wmemchr:
5581 case Builtin::BIwcschr:
5582 case Builtin::BI__builtin_wcschr:
5583 case Builtin::BI__builtin_char_memchr:
5586 case Builtin::BI__builtin_object_size:
5589 case Builtin::BI__builtin_dynamic_object_size:
5593 case Builtin::BI__builtin_is_within_lifetime:
5596 case Builtin::BI__builtin_elementwise_add_sat:
5599 return LHS.isSigned() ? LHS.sadd_sat(RHS) : LHS.uadd_sat(RHS);
5602 case Builtin::BI__builtin_elementwise_sub_sat:
5605 return LHS.isSigned() ? LHS.ssub_sat(RHS) : LHS.usub_sat(RHS);
5608 case Builtin::BI__builtin_elementwise_pdep:
5610 llvm::APIntOps::pdep);
5612 case Builtin::BI__builtin_elementwise_pext:
5614 llvm::APIntOps::pext);
5616 case X86::BI__builtin_ia32_extract128i256:
5617 case X86::BI__builtin_ia32_vextractf128_pd256:
5618 case X86::BI__builtin_ia32_vextractf128_ps256:
5619 case X86::BI__builtin_ia32_vextractf128_si256:
5622 case X86::BI__builtin_ia32_extractf32x4_256_mask:
5623 case X86::BI__builtin_ia32_extractf32x4_mask:
5624 case X86::BI__builtin_ia32_extractf32x8_mask:
5625 case X86::BI__builtin_ia32_extractf64x2_256_mask:
5626 case X86::BI__builtin_ia32_extractf64x2_512_mask:
5627 case X86::BI__builtin_ia32_extractf64x4_mask:
5628 case X86::BI__builtin_ia32_extracti32x4_256_mask:
5629 case X86::BI__builtin_ia32_extracti32x4_mask:
5630 case X86::BI__builtin_ia32_extracti32x8_mask:
5631 case X86::BI__builtin_ia32_extracti64x2_256_mask:
5632 case X86::BI__builtin_ia32_extracti64x2_512_mask:
5633 case X86::BI__builtin_ia32_extracti64x4_mask:
5636 case clang::X86::BI__builtin_ia32_pmulhrsw128:
5637 case clang::X86::BI__builtin_ia32_pmulhrsw256:
5638 case clang::X86::BI__builtin_ia32_pmulhrsw512:
5641 return (llvm::APIntOps::mulsExtended(LHS, RHS).ashr(14) + 1)
5642 .extractBits(16, 1);
5645 case clang::X86::BI__builtin_ia32_movmskps:
5646 case clang::X86::BI__builtin_ia32_movmskpd:
5647 case clang::X86::BI__builtin_ia32_pmovmskb128:
5648 case clang::X86::BI__builtin_ia32_pmovmskb256:
5649 case clang::X86::BI__builtin_ia32_movmskps256:
5650 case clang::X86::BI__builtin_ia32_movmskpd256: {
5654 case X86::BI__builtin_ia32_psignb128:
5655 case X86::BI__builtin_ia32_psignb256:
5656 case X86::BI__builtin_ia32_psignw128:
5657 case X86::BI__builtin_ia32_psignw256:
5658 case X86::BI__builtin_ia32_psignd128:
5659 case X86::BI__builtin_ia32_psignd256:
5663 return APInt::getZero(AElem.getBitWidth());
5664 if (BElem.isNegative())
5669 case clang::X86::BI__builtin_ia32_pavgb128:
5670 case clang::X86::BI__builtin_ia32_pavgw128:
5671 case clang::X86::BI__builtin_ia32_pavgb256:
5672 case clang::X86::BI__builtin_ia32_pavgw256:
5673 case clang::X86::BI__builtin_ia32_pavgb512:
5674 case clang::X86::BI__builtin_ia32_pavgw512:
5676 llvm::APIntOps::avgCeilU);
5678 case clang::X86::BI__builtin_ia32_pmaddubsw128:
5679 case clang::X86::BI__builtin_ia32_pmaddubsw256:
5680 case clang::X86::BI__builtin_ia32_pmaddubsw512:
5685 unsigned BitWidth = 2 * LoLHS.getBitWidth();
5686 return (LoLHS.zext(BitWidth) * LoRHS.sext(BitWidth))
5687 .sadd_sat((HiLHS.zext(BitWidth) * HiRHS.sext(BitWidth)));
5690 case clang::X86::BI__builtin_ia32_pmaddwd128:
5691 case clang::X86::BI__builtin_ia32_pmaddwd256:
5692 case clang::X86::BI__builtin_ia32_pmaddwd512:
5697 unsigned BitWidth = 2 * LoLHS.getBitWidth();
5698 return (LoLHS.sext(BitWidth) * LoRHS.sext(BitWidth)) +
5699 (HiLHS.sext(BitWidth) * HiRHS.sext(BitWidth));
5702 case clang::X86::BI__builtin_ia32_psadbw128:
5703 case clang::X86::BI__builtin_ia32_psadbw256:
5704 case clang::X86::BI__builtin_ia32_psadbw512:
5707 case clang::X86::BI__builtin_ia32_dbpsadbw128:
5708 case clang::X86::BI__builtin_ia32_dbpsadbw256:
5709 case clang::X86::BI__builtin_ia32_dbpsadbw512:
5712 case clang::X86::BI__builtin_ia32_mpsadbw128:
5713 case clang::X86::BI__builtin_ia32_mpsadbw256:
5716 case clang::X86::BI__builtin_ia32_pmulhuw128:
5717 case clang::X86::BI__builtin_ia32_pmulhuw256:
5718 case clang::X86::BI__builtin_ia32_pmulhuw512:
5720 llvm::APIntOps::mulhu);
5722 case clang::X86::BI__builtin_ia32_pmulhw128:
5723 case clang::X86::BI__builtin_ia32_pmulhw256:
5724 case clang::X86::BI__builtin_ia32_pmulhw512:
5726 llvm::APIntOps::mulhs);
5728 case clang::X86::BI__builtin_ia32_psllv2di:
5729 case clang::X86::BI__builtin_ia32_psllv4di:
5730 case clang::X86::BI__builtin_ia32_psllv4si:
5731 case clang::X86::BI__builtin_ia32_psllv8di:
5732 case clang::X86::BI__builtin_ia32_psllv8hi:
5733 case clang::X86::BI__builtin_ia32_psllv8si:
5734 case clang::X86::BI__builtin_ia32_psllv16hi:
5735 case clang::X86::BI__builtin_ia32_psllv16si:
5736 case clang::X86::BI__builtin_ia32_psllv32hi:
5737 case clang::X86::BI__builtin_ia32_psllwi128:
5738 case clang::X86::BI__builtin_ia32_psllwi256:
5739 case clang::X86::BI__builtin_ia32_psllwi512:
5740 case clang::X86::BI__builtin_ia32_pslldi128:
5741 case clang::X86::BI__builtin_ia32_pslldi256:
5742 case clang::X86::BI__builtin_ia32_pslldi512:
5743 case clang::X86::BI__builtin_ia32_psllqi128:
5744 case clang::X86::BI__builtin_ia32_psllqi256:
5745 case clang::X86::BI__builtin_ia32_psllqi512:
5748 if (RHS.uge(LHS.getBitWidth())) {
5749 return APInt::getZero(LHS.getBitWidth());
5751 return LHS.shl(RHS.getZExtValue());
5754 case clang::X86::BI__builtin_ia32_psrav4si:
5755 case clang::X86::BI__builtin_ia32_psrav8di:
5756 case clang::X86::BI__builtin_ia32_psrav8hi:
5757 case clang::X86::BI__builtin_ia32_psrav8si:
5758 case clang::X86::BI__builtin_ia32_psrav16hi:
5759 case clang::X86::BI__builtin_ia32_psrav16si:
5760 case clang::X86::BI__builtin_ia32_psrav32hi:
5761 case clang::X86::BI__builtin_ia32_psravq128:
5762 case clang::X86::BI__builtin_ia32_psravq256:
5763 case clang::X86::BI__builtin_ia32_psrawi128:
5764 case clang::X86::BI__builtin_ia32_psrawi256:
5765 case clang::X86::BI__builtin_ia32_psrawi512:
5766 case clang::X86::BI__builtin_ia32_psradi128:
5767 case clang::X86::BI__builtin_ia32_psradi256:
5768 case clang::X86::BI__builtin_ia32_psradi512:
5769 case clang::X86::BI__builtin_ia32_psraqi128:
5770 case clang::X86::BI__builtin_ia32_psraqi256:
5771 case clang::X86::BI__builtin_ia32_psraqi512:
5774 if (RHS.uge(LHS.getBitWidth())) {
5775 return LHS.ashr(LHS.getBitWidth() - 1);
5777 return LHS.ashr(RHS.getZExtValue());
5780 case clang::X86::BI__builtin_ia32_psrlv2di:
5781 case clang::X86::BI__builtin_ia32_psrlv4di:
5782 case clang::X86::BI__builtin_ia32_psrlv4si:
5783 case clang::X86::BI__builtin_ia32_psrlv8di:
5784 case clang::X86::BI__builtin_ia32_psrlv8hi:
5785 case clang::X86::BI__builtin_ia32_psrlv8si:
5786 case clang::X86::BI__builtin_ia32_psrlv16hi:
5787 case clang::X86::BI__builtin_ia32_psrlv16si:
5788 case clang::X86::BI__builtin_ia32_psrlv32hi:
5789 case clang::X86::BI__builtin_ia32_psrlwi128:
5790 case clang::X86::BI__builtin_ia32_psrlwi256:
5791 case clang::X86::BI__builtin_ia32_psrlwi512:
5792 case clang::X86::BI__builtin_ia32_psrldi128:
5793 case clang::X86::BI__builtin_ia32_psrldi256:
5794 case clang::X86::BI__builtin_ia32_psrldi512:
5795 case clang::X86::BI__builtin_ia32_psrlqi128:
5796 case clang::X86::BI__builtin_ia32_psrlqi256:
5797 case clang::X86::BI__builtin_ia32_psrlqi512:
5800 if (RHS.uge(LHS.getBitWidth())) {
5801 return APInt::getZero(LHS.getBitWidth());
5803 return LHS.lshr(RHS.getZExtValue());
5805 case clang::X86::BI__builtin_ia32_packsswb128:
5806 case clang::X86::BI__builtin_ia32_packsswb256:
5807 case clang::X86::BI__builtin_ia32_packsswb512:
5808 case clang::X86::BI__builtin_ia32_packssdw128:
5809 case clang::X86::BI__builtin_ia32_packssdw256:
5810 case clang::X86::BI__builtin_ia32_packssdw512:
5812 return APInt(Src).truncSSat(Src.getBitWidth() / 2);
5814 case clang::X86::BI__builtin_ia32_packusdw128:
5815 case clang::X86::BI__builtin_ia32_packusdw256:
5816 case clang::X86::BI__builtin_ia32_packusdw512:
5817 case clang::X86::BI__builtin_ia32_packuswb128:
5818 case clang::X86::BI__builtin_ia32_packuswb256:
5819 case clang::X86::BI__builtin_ia32_packuswb512:
5821 return APInt(Src).truncSSatU(Src.getBitWidth() / 2);
5824 case clang::X86::BI__builtin_ia32_selectss_128:
5825 case clang::X86::BI__builtin_ia32_selectsd_128:
5826 case clang::X86::BI__builtin_ia32_selectsh_128:
5827 case clang::X86::BI__builtin_ia32_selectsbf_128:
5829 case clang::X86::BI__builtin_ia32_vprotbi:
5830 case clang::X86::BI__builtin_ia32_vprotdi:
5831 case clang::X86::BI__builtin_ia32_vprotqi:
5832 case clang::X86::BI__builtin_ia32_vprotwi:
5833 case clang::X86::BI__builtin_ia32_prold128:
5834 case clang::X86::BI__builtin_ia32_prold256:
5835 case clang::X86::BI__builtin_ia32_prold512:
5836 case clang::X86::BI__builtin_ia32_prolq128:
5837 case clang::X86::BI__builtin_ia32_prolq256:
5838 case clang::X86::BI__builtin_ia32_prolq512:
5841 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotl(RHS); });
5843 case clang::X86::BI__builtin_ia32_prord128:
5844 case clang::X86::BI__builtin_ia32_prord256:
5845 case clang::X86::BI__builtin_ia32_prord512:
5846 case clang::X86::BI__builtin_ia32_prorq128:
5847 case clang::X86::BI__builtin_ia32_prorq256:
5848 case clang::X86::BI__builtin_ia32_prorq512:
5851 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotr(RHS); });
5853 case Builtin::BI__builtin_elementwise_max:
5854 case Builtin::BI__builtin_elementwise_min:
5857 case clang::X86::BI__builtin_ia32_phaddw128:
5858 case clang::X86::BI__builtin_ia32_phaddw256:
5859 case clang::X86::BI__builtin_ia32_phaddd128:
5860 case clang::X86::BI__builtin_ia32_phaddd256:
5863 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
5864 case clang::X86::BI__builtin_ia32_phaddsw128:
5865 case clang::X86::BI__builtin_ia32_phaddsw256:
5868 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.sadd_sat(RHS); });
5869 case clang::X86::BI__builtin_ia32_phsubw128:
5870 case clang::X86::BI__builtin_ia32_phsubw256:
5871 case clang::X86::BI__builtin_ia32_phsubd128:
5872 case clang::X86::BI__builtin_ia32_phsubd256:
5875 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS - RHS; });
5876 case clang::X86::BI__builtin_ia32_phsubsw128:
5877 case clang::X86::BI__builtin_ia32_phsubsw256:
5880 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.ssub_sat(RHS); });
5881 case clang::X86::BI__builtin_ia32_haddpd:
5882 case clang::X86::BI__builtin_ia32_haddps:
5883 case clang::X86::BI__builtin_ia32_haddpd256:
5884 case clang::X86::BI__builtin_ia32_haddps256:
5887 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
5892 case clang::X86::BI__builtin_ia32_hsubpd:
5893 case clang::X86::BI__builtin_ia32_hsubps:
5894 case clang::X86::BI__builtin_ia32_hsubpd256:
5895 case clang::X86::BI__builtin_ia32_hsubps256:
5898 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
5900 F.subtract(RHS, RM);
5903 case clang::X86::BI__builtin_ia32_addsubpd:
5904 case clang::X86::BI__builtin_ia32_addsubps:
5905 case clang::X86::BI__builtin_ia32_addsubpd256:
5906 case clang::X86::BI__builtin_ia32_addsubps256:
5909 case clang::X86::BI__builtin_ia32_pmuldq128:
5910 case clang::X86::BI__builtin_ia32_pmuldq256:
5911 case clang::X86::BI__builtin_ia32_pmuldq512:
5916 return llvm::APIntOps::mulsExtended(LoLHS, LoRHS);
5919 case clang::X86::BI__builtin_ia32_pmuludq128:
5920 case clang::X86::BI__builtin_ia32_pmuludq256:
5921 case clang::X86::BI__builtin_ia32_pmuludq512:
5926 return llvm::APIntOps::muluExtended(LoLHS, LoRHS);
5929 case clang::X86::BI__builtin_ia32_pclmulqdq128:
5930 case clang::X86::BI__builtin_ia32_pclmulqdq256:
5931 case clang::X86::BI__builtin_ia32_pclmulqdq512:
5933 case Builtin::BI__builtin_elementwise_clmul:
5935 llvm::APIntOps::clmul);
5937 case Builtin::BI__builtin_elementwise_fma:
5941 llvm::RoundingMode RM) {
5943 F.fusedMultiplyAdd(Y, Z, RM);
5947 case X86::BI__builtin_ia32_vpmadd52luq128:
5948 case X86::BI__builtin_ia32_vpmadd52luq256:
5949 case X86::BI__builtin_ia32_vpmadd52luq512:
5952 return A + (B.trunc(52) *
C.trunc(52)).zext(64);
5954 case X86::BI__builtin_ia32_vpmadd52huq128:
5955 case X86::BI__builtin_ia32_vpmadd52huq256:
5956 case X86::BI__builtin_ia32_vpmadd52huq512:
5959 return A + llvm::APIntOps::mulhu(B.trunc(52),
C.trunc(52)).zext(64);
5962 case X86::BI__builtin_ia32_vpshldd128:
5963 case X86::BI__builtin_ia32_vpshldd256:
5964 case X86::BI__builtin_ia32_vpshldd512:
5965 case X86::BI__builtin_ia32_vpshldq128:
5966 case X86::BI__builtin_ia32_vpshldq256:
5967 case X86::BI__builtin_ia32_vpshldq512:
5968 case X86::BI__builtin_ia32_vpshldw128:
5969 case X86::BI__builtin_ia32_vpshldw256:
5970 case X86::BI__builtin_ia32_vpshldw512:
5974 return llvm::APIntOps::fshl(Hi, Lo, Amt);
5977 case X86::BI__builtin_ia32_vpshrdd128:
5978 case X86::BI__builtin_ia32_vpshrdd256:
5979 case X86::BI__builtin_ia32_vpshrdd512:
5980 case X86::BI__builtin_ia32_vpshrdq128:
5981 case X86::BI__builtin_ia32_vpshrdq256:
5982 case X86::BI__builtin_ia32_vpshrdq512:
5983 case X86::BI__builtin_ia32_vpshrdw128:
5984 case X86::BI__builtin_ia32_vpshrdw256:
5985 case X86::BI__builtin_ia32_vpshrdw512:
5990 return llvm::APIntOps::fshr(Hi, Lo, Amt);
5992 case X86::BI__builtin_ia32_vpconflictsi_128:
5993 case X86::BI__builtin_ia32_vpconflictsi_256:
5994 case X86::BI__builtin_ia32_vpconflictsi_512:
5995 case X86::BI__builtin_ia32_vpconflictdi_128:
5996 case X86::BI__builtin_ia32_vpconflictdi_256:
5997 case X86::BI__builtin_ia32_vpconflictdi_512:
5999 case X86::BI__builtin_ia32_compressdf128_mask:
6000 case X86::BI__builtin_ia32_compressdf256_mask:
6001 case X86::BI__builtin_ia32_compressdf512_mask:
6002 case X86::BI__builtin_ia32_compressdi128_mask:
6003 case X86::BI__builtin_ia32_compressdi256_mask:
6004 case X86::BI__builtin_ia32_compressdi512_mask:
6005 case X86::BI__builtin_ia32_compresshi128_mask:
6006 case X86::BI__builtin_ia32_compresshi256_mask:
6007 case X86::BI__builtin_ia32_compresshi512_mask:
6008 case X86::BI__builtin_ia32_compressqi128_mask:
6009 case X86::BI__builtin_ia32_compressqi256_mask:
6010 case X86::BI__builtin_ia32_compressqi512_mask:
6011 case X86::BI__builtin_ia32_compresssf128_mask:
6012 case X86::BI__builtin_ia32_compresssf256_mask:
6013 case X86::BI__builtin_ia32_compresssf512_mask:
6014 case X86::BI__builtin_ia32_compresssi128_mask:
6015 case X86::BI__builtin_ia32_compresssi256_mask:
6016 case X86::BI__builtin_ia32_compresssi512_mask: {
6018 Call->getArg(0)->getType()->castAs<
VectorType>()->getNumElements();
6020 S, OpPC,
Call, [NumElems](
unsigned DstIdx,
const APInt &ShuffleMask) {
6021 APInt CompressMask = ShuffleMask.trunc(NumElems);
6022 if (DstIdx < CompressMask.popcount()) {
6023 while (DstIdx != 0) {
6024 CompressMask = CompressMask & (CompressMask - 1);
6027 return std::pair<unsigned, int>{
6028 0,
static_cast<int>(CompressMask.countr_zero())};
6030 return std::pair<unsigned, int>{1,
static_cast<int>(DstIdx)};
6033 case X86::BI__builtin_ia32_expanddf128_mask:
6034 case X86::BI__builtin_ia32_expanddf256_mask:
6035 case X86::BI__builtin_ia32_expanddf512_mask:
6036 case X86::BI__builtin_ia32_expanddi128_mask:
6037 case X86::BI__builtin_ia32_expanddi256_mask:
6038 case X86::BI__builtin_ia32_expanddi512_mask:
6039 case X86::BI__builtin_ia32_expandhi128_mask:
6040 case X86::BI__builtin_ia32_expandhi256_mask:
6041 case X86::BI__builtin_ia32_expandhi512_mask:
6042 case X86::BI__builtin_ia32_expandqi128_mask:
6043 case X86::BI__builtin_ia32_expandqi256_mask:
6044 case X86::BI__builtin_ia32_expandqi512_mask:
6045 case X86::BI__builtin_ia32_expandsf128_mask:
6046 case X86::BI__builtin_ia32_expandsf256_mask:
6047 case X86::BI__builtin_ia32_expandsf512_mask:
6048 case X86::BI__builtin_ia32_expandsi128_mask:
6049 case X86::BI__builtin_ia32_expandsi256_mask:
6050 case X86::BI__builtin_ia32_expandsi512_mask: {
6052 S, OpPC,
Call, [](
unsigned DstIdx,
const APInt &ShuffleMask) {
6055 APInt ExpandMask = ShuffleMask.trunc(DstIdx + 1);
6056 if (ExpandMask[DstIdx]) {
6057 int SrcIdx = ExpandMask.popcount() - 1;
6058 return std::pair<unsigned, int>{0, SrcIdx};
6060 return std::pair<unsigned, int>{1,
static_cast<int>(DstIdx)};
6063 case clang::X86::BI__builtin_ia32_blendpd:
6064 case clang::X86::BI__builtin_ia32_blendpd256:
6065 case clang::X86::BI__builtin_ia32_blendps:
6066 case clang::X86::BI__builtin_ia32_blendps256:
6067 case clang::X86::BI__builtin_ia32_pblendw128:
6068 case clang::X86::BI__builtin_ia32_pblendw256:
6069 case clang::X86::BI__builtin_ia32_pblendd128:
6070 case clang::X86::BI__builtin_ia32_pblendd256:
6072 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6074 unsigned MaskBit = (ShuffleMask >> (DstIdx % 8)) & 0x1;
6075 unsigned SrcVecIdx = MaskBit ? 1 : 0;
6076 return std::pair<unsigned, int>{SrcVecIdx,
static_cast<int>(DstIdx)};
6081 case clang::X86::BI__builtin_ia32_blendvpd:
6082 case clang::X86::BI__builtin_ia32_blendvpd256:
6083 case clang::X86::BI__builtin_ia32_blendvps:
6084 case clang::X86::BI__builtin_ia32_blendvps256:
6088 llvm::RoundingMode) {
return C.isNegative() ?
T : F; });
6090 case clang::X86::BI__builtin_ia32_pblendvb128:
6091 case clang::X86::BI__builtin_ia32_pblendvb256:
6094 return ((
APInt)
C).isNegative() ?
T : F;
6096 case X86::BI__builtin_ia32_ptestz128:
6097 case X86::BI__builtin_ia32_ptestz256:
6098 case X86::BI__builtin_ia32_vtestzps:
6099 case X86::BI__builtin_ia32_vtestzps256:
6100 case X86::BI__builtin_ia32_vtestzpd:
6101 case X86::BI__builtin_ia32_vtestzpd256:
6104 [](
const APInt &A,
const APInt &B) {
return (A & B) == 0; });
6105 case X86::BI__builtin_ia32_ptestc128:
6106 case X86::BI__builtin_ia32_ptestc256:
6107 case X86::BI__builtin_ia32_vtestcps:
6108 case X86::BI__builtin_ia32_vtestcps256:
6109 case X86::BI__builtin_ia32_vtestcpd:
6110 case X86::BI__builtin_ia32_vtestcpd256:
6113 [](
const APInt &A,
const APInt &B) {
return (~A & B) == 0; });
6114 case X86::BI__builtin_ia32_ptestnzc128:
6115 case X86::BI__builtin_ia32_ptestnzc256:
6116 case X86::BI__builtin_ia32_vtestnzcps:
6117 case X86::BI__builtin_ia32_vtestnzcps256:
6118 case X86::BI__builtin_ia32_vtestnzcpd:
6119 case X86::BI__builtin_ia32_vtestnzcpd256:
6122 return ((A & B) != 0) && ((~A & B) != 0);
6124 case X86::BI__builtin_ia32_selectb_128:
6125 case X86::BI__builtin_ia32_selectb_256:
6126 case X86::BI__builtin_ia32_selectb_512:
6127 case X86::BI__builtin_ia32_selectw_128:
6128 case X86::BI__builtin_ia32_selectw_256:
6129 case X86::BI__builtin_ia32_selectw_512:
6130 case X86::BI__builtin_ia32_selectd_128:
6131 case X86::BI__builtin_ia32_selectd_256:
6132 case X86::BI__builtin_ia32_selectd_512:
6133 case X86::BI__builtin_ia32_selectq_128:
6134 case X86::BI__builtin_ia32_selectq_256:
6135 case X86::BI__builtin_ia32_selectq_512:
6136 case X86::BI__builtin_ia32_selectph_128:
6137 case X86::BI__builtin_ia32_selectph_256:
6138 case X86::BI__builtin_ia32_selectph_512:
6139 case X86::BI__builtin_ia32_selectpbf_128:
6140 case X86::BI__builtin_ia32_selectpbf_256:
6141 case X86::BI__builtin_ia32_selectpbf_512:
6142 case X86::BI__builtin_ia32_selectps_128:
6143 case X86::BI__builtin_ia32_selectps_256:
6144 case X86::BI__builtin_ia32_selectps_512:
6145 case X86::BI__builtin_ia32_selectpd_128:
6146 case X86::BI__builtin_ia32_selectpd_256:
6147 case X86::BI__builtin_ia32_selectpd_512:
6150 case X86::BI__builtin_ia32_shufps:
6151 case X86::BI__builtin_ia32_shufps256:
6152 case X86::BI__builtin_ia32_shufps512:
6154 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6155 unsigned NumElemPerLane = 4;
6156 unsigned NumSelectableElems = NumElemPerLane / 2;
6157 unsigned BitsPerElem = 2;
6158 unsigned IndexMask = 0x3;
6159 unsigned MaskBits = 8;
6160 unsigned Lane = DstIdx / NumElemPerLane;
6161 unsigned ElemInLane = DstIdx % NumElemPerLane;
6162 unsigned LaneOffset = Lane * NumElemPerLane;
6163 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
6164 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
6165 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
6166 return std::pair<unsigned, int>{SrcIdx,
6167 static_cast<int>(LaneOffset + Index)};
6169 case X86::BI__builtin_ia32_shufpd:
6170 case X86::BI__builtin_ia32_shufpd256:
6171 case X86::BI__builtin_ia32_shufpd512:
6173 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6174 unsigned NumElemPerLane = 2;
6175 unsigned NumSelectableElems = NumElemPerLane / 2;
6176 unsigned BitsPerElem = 1;
6177 unsigned IndexMask = 0x1;
6178 unsigned MaskBits = 8;
6179 unsigned Lane = DstIdx / NumElemPerLane;
6180 unsigned ElemInLane = DstIdx % NumElemPerLane;
6181 unsigned LaneOffset = Lane * NumElemPerLane;
6182 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
6183 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
6184 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
6185 return std::pair<unsigned, int>{SrcIdx,
6186 static_cast<int>(LaneOffset + Index)};
6189 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v16qi:
6190 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v32qi:
6191 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v64qi:
6193 case X86::BI__builtin_ia32_vgf2p8affineqb_v16qi:
6194 case X86::BI__builtin_ia32_vgf2p8affineqb_v32qi:
6195 case X86::BI__builtin_ia32_vgf2p8affineqb_v64qi:
6198 case X86::BI__builtin_ia32_vgf2p8mulb_v16qi:
6199 case X86::BI__builtin_ia32_vgf2p8mulb_v32qi:
6200 case X86::BI__builtin_ia32_vgf2p8mulb_v64qi:
6203 case X86::BI__builtin_ia32_bmacor16x16x16_v16hi:
6204 case X86::BI__builtin_ia32_bmacor16x16x16_v32hi:
6206 case X86::BI__builtin_ia32_bmacxor16x16x16_v16hi:
6207 case X86::BI__builtin_ia32_bmacxor16x16x16_v32hi:
6210 case X86::BI__builtin_ia32_insertps128:
6212 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Mask) {
6214 if ((Mask & (1 << DstIdx)) != 0) {
6215 return std::pair<unsigned, int>{0, -1};
6219 unsigned SrcElem = (Mask >> 6) & 0x3;
6220 unsigned DstElem = (Mask >> 4) & 0x3;
6221 if (DstIdx == DstElem) {
6223 return std::pair<unsigned, int>{1,
static_cast<int>(SrcElem)};
6226 return std::pair<unsigned, int>{0,
static_cast<int>(DstIdx)};
6229 case X86::BI__builtin_ia32_permvarsi256:
6230 case X86::BI__builtin_ia32_permvarsf256:
6231 case X86::BI__builtin_ia32_permvardf512:
6232 case X86::BI__builtin_ia32_permvardi512:
6233 case X86::BI__builtin_ia32_permvarhi128:
6235 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6236 int Offset = ShuffleMask & 0x7;
6237 return std::pair<unsigned, int>{0, Offset};
6239 case X86::BI__builtin_ia32_permvarqi128:
6240 case X86::BI__builtin_ia32_permvarhi256:
6241 case X86::BI__builtin_ia32_permvarsi512:
6242 case X86::BI__builtin_ia32_permvarsf512:
6244 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6245 int Offset = ShuffleMask & 0xF;
6246 return std::pair<unsigned, int>{0, Offset};
6248 case X86::BI__builtin_ia32_permvardi256:
6249 case X86::BI__builtin_ia32_permvardf256:
6251 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6252 int Offset = ShuffleMask & 0x3;
6253 return std::pair<unsigned, int>{0, Offset};
6255 case X86::BI__builtin_ia32_permvarqi256:
6256 case X86::BI__builtin_ia32_permvarhi512:
6258 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6259 int Offset = ShuffleMask & 0x1F;
6260 return std::pair<unsigned, int>{0, Offset};
6262 case X86::BI__builtin_ia32_permvarqi512:
6264 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6265 int Offset = ShuffleMask & 0x3F;
6266 return std::pair<unsigned, int>{0, Offset};
6268 case X86::BI__builtin_ia32_vpermi2varq128:
6269 case X86::BI__builtin_ia32_vpermi2varpd128:
6271 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6272 int Offset = ShuffleMask & 0x1;
6273 unsigned SrcIdx = (ShuffleMask >> 1) & 0x1;
6274 return std::pair<unsigned, int>{SrcIdx, Offset};
6276 case X86::BI__builtin_ia32_vpermi2vard128:
6277 case X86::BI__builtin_ia32_vpermi2varps128:
6278 case X86::BI__builtin_ia32_vpermi2varq256:
6279 case X86::BI__builtin_ia32_vpermi2varpd256:
6281 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6282 int Offset = ShuffleMask & 0x3;
6283 unsigned SrcIdx = (ShuffleMask >> 2) & 0x1;
6284 return std::pair<unsigned, int>{SrcIdx, Offset};
6286 case X86::BI__builtin_ia32_vpermi2varhi128:
6287 case X86::BI__builtin_ia32_vpermi2vard256:
6288 case X86::BI__builtin_ia32_vpermi2varps256:
6289 case X86::BI__builtin_ia32_vpermi2varq512:
6290 case X86::BI__builtin_ia32_vpermi2varpd512:
6292 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6293 int Offset = ShuffleMask & 0x7;
6294 unsigned SrcIdx = (ShuffleMask >> 3) & 0x1;
6295 return std::pair<unsigned, int>{SrcIdx, Offset};
6297 case X86::BI__builtin_ia32_vpermi2varqi128:
6298 case X86::BI__builtin_ia32_vpermi2varhi256:
6299 case X86::BI__builtin_ia32_vpermi2vard512:
6300 case X86::BI__builtin_ia32_vpermi2varps512:
6302 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6303 int Offset = ShuffleMask & 0xF;
6304 unsigned SrcIdx = (ShuffleMask >> 4) & 0x1;
6305 return std::pair<unsigned, int>{SrcIdx, Offset};
6307 case X86::BI__builtin_ia32_vpermi2varqi256:
6308 case X86::BI__builtin_ia32_vpermi2varhi512:
6310 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6311 int Offset = ShuffleMask & 0x1F;
6312 unsigned SrcIdx = (ShuffleMask >> 5) & 0x1;
6313 return std::pair<unsigned, int>{SrcIdx, Offset};
6315 case X86::BI__builtin_ia32_vpermi2varqi512:
6317 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6318 int Offset = ShuffleMask & 0x3F;
6319 unsigned SrcIdx = (ShuffleMask >> 6) & 0x1;
6320 return std::pair<unsigned, int>{SrcIdx, Offset};
6322 case X86::BI__builtin_ia32_vperm2f128_pd256:
6323 case X86::BI__builtin_ia32_vperm2f128_ps256:
6324 case X86::BI__builtin_ia32_vperm2f128_si256:
6325 case X86::BI__builtin_ia32_permti256: {
6326 unsigned NumElements =
6327 Call->getArg(0)->getType()->castAs<
VectorType>()->getNumElements();
6328 unsigned PreservedBitsCnt = NumElements >> 2;
6331 [PreservedBitsCnt](
unsigned DstIdx,
unsigned ShuffleMask) {
6332 unsigned ControlBitsCnt = DstIdx >> PreservedBitsCnt << 2;
6333 unsigned ControlBits = ShuffleMask >> ControlBitsCnt;
6335 if (ControlBits & 0b1000)
6336 return std::make_pair(0u, -1);
6338 unsigned SrcVecIdx = (ControlBits & 0b10) >> 1;
6339 unsigned PreservedBitsMask = (1 << PreservedBitsCnt) - 1;
6340 int SrcIdx = ((ControlBits & 0b1) << PreservedBitsCnt) |
6341 (DstIdx & PreservedBitsMask);
6342 return std::make_pair(SrcVecIdx, SrcIdx);
6345 case X86::BI__builtin_ia32_pshufb128:
6346 case X86::BI__builtin_ia32_pshufb256:
6347 case X86::BI__builtin_ia32_pshufb512:
6349 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6350 uint8_t Ctlb =
static_cast<uint8_t
>(ShuffleMask);
6352 return std::make_pair(0, -1);
6354 unsigned LaneBase = (DstIdx / 16) * 16;
6355 unsigned SrcOffset = Ctlb & 0x0F;
6356 unsigned SrcIdx = LaneBase + SrcOffset;
6357 return std::make_pair(0,
static_cast<int>(SrcIdx));
6360 case X86::BI__builtin_ia32_pshuflw:
6361 case X86::BI__builtin_ia32_pshuflw256:
6362 case X86::BI__builtin_ia32_pshuflw512:
6364 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6365 unsigned LaneBase = (DstIdx / 8) * 8;
6366 unsigned LaneIdx = DstIdx % 8;
6368 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
6369 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
6372 return std::make_pair(0,
static_cast<int>(DstIdx));
6375 case X86::BI__builtin_ia32_pshufhw:
6376 case X86::BI__builtin_ia32_pshufhw256:
6377 case X86::BI__builtin_ia32_pshufhw512:
6379 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6380 unsigned LaneBase = (DstIdx / 8) * 8;
6381 unsigned LaneIdx = DstIdx % 8;
6383 unsigned Sel = (ShuffleMask >> (2 * (LaneIdx - 4))) & 0x3;
6384 return std::make_pair(0,
static_cast<int>(LaneBase + 4 + Sel));
6387 return std::make_pair(0,
static_cast<int>(DstIdx));
6390 case X86::BI__builtin_ia32_pshufd:
6391 case X86::BI__builtin_ia32_pshufd256:
6392 case X86::BI__builtin_ia32_pshufd512:
6393 case X86::BI__builtin_ia32_vpermilps:
6394 case X86::BI__builtin_ia32_vpermilps256:
6395 case X86::BI__builtin_ia32_vpermilps512:
6397 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6398 unsigned LaneBase = (DstIdx / 4) * 4;
6399 unsigned LaneIdx = DstIdx % 4;
6400 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
6401 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
6404 case X86::BI__builtin_ia32_vpermilvarpd:
6405 case X86::BI__builtin_ia32_vpermilvarpd256:
6406 case X86::BI__builtin_ia32_vpermilvarpd512:
6408 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6409 unsigned NumElemPerLane = 2;
6410 unsigned Lane = DstIdx / NumElemPerLane;
6411 unsigned Offset = ShuffleMask & 0b10 ? 1 : 0;
6412 return std::make_pair(
6413 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
6416 case X86::BI__builtin_ia32_vpermilvarps:
6417 case X86::BI__builtin_ia32_vpermilvarps256:
6418 case X86::BI__builtin_ia32_vpermilvarps512:
6420 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
6421 unsigned NumElemPerLane = 4;
6422 unsigned Lane = DstIdx / NumElemPerLane;
6423 unsigned Offset = ShuffleMask & 0b11;
6424 return std::make_pair(
6425 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
6428 case X86::BI__builtin_ia32_vpermilpd:
6429 case X86::BI__builtin_ia32_vpermilpd256:
6430 case X86::BI__builtin_ia32_vpermilpd512:
6432 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Control) {
6433 unsigned NumElemPerLane = 2;
6434 unsigned BitsPerElem = 1;
6435 unsigned MaskBits = 8;
6436 unsigned IndexMask = 0x1;
6437 unsigned Lane = DstIdx / NumElemPerLane;
6438 unsigned LaneOffset = Lane * NumElemPerLane;
6439 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
6440 unsigned Index = (Control >> BitIndex) & IndexMask;
6441 return std::make_pair(0,
static_cast<int>(LaneOffset + Index));
6444 case X86::BI__builtin_ia32_permdf256:
6445 case X86::BI__builtin_ia32_permdi256:
6447 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Control) {
6450 unsigned Index = (Control >> (2 * DstIdx)) & 0x3;
6451 return std::make_pair(0,
static_cast<int>(Index));
6454 case X86::BI__builtin_ia32_vpmultishiftqb128:
6455 case X86::BI__builtin_ia32_vpmultishiftqb256:
6456 case X86::BI__builtin_ia32_vpmultishiftqb512:
6458 case X86::BI__builtin_ia32_kandqi:
6459 case X86::BI__builtin_ia32_kandhi:
6460 case X86::BI__builtin_ia32_kandsi:
6461 case X86::BI__builtin_ia32_kanddi:
6464 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS & RHS; });
6466 case X86::BI__builtin_ia32_kandnqi:
6467 case X86::BI__builtin_ia32_kandnhi:
6468 case X86::BI__builtin_ia32_kandnsi:
6469 case X86::BI__builtin_ia32_kandndi:
6472 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~LHS & RHS; });
6474 case X86::BI__builtin_ia32_korqi:
6475 case X86::BI__builtin_ia32_korhi:
6476 case X86::BI__builtin_ia32_korsi:
6477 case X86::BI__builtin_ia32_kordi:
6480 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS | RHS; });
6482 case X86::BI__builtin_ia32_kxnorqi:
6483 case X86::BI__builtin_ia32_kxnorhi:
6484 case X86::BI__builtin_ia32_kxnorsi:
6485 case X86::BI__builtin_ia32_kxnordi:
6488 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~(LHS ^ RHS); });
6490 case X86::BI__builtin_ia32_kxorqi:
6491 case X86::BI__builtin_ia32_kxorhi:
6492 case X86::BI__builtin_ia32_kxorsi:
6493 case X86::BI__builtin_ia32_kxordi:
6496 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS ^ RHS; });
6498 case X86::BI__builtin_ia32_knotqi:
6499 case X86::BI__builtin_ia32_knothi:
6500 case X86::BI__builtin_ia32_knotsi:
6501 case X86::BI__builtin_ia32_knotdi:
6503 S, OpPC,
Call, [](
const APSInt &Src) {
return ~Src; });
6505 case X86::BI__builtin_ia32_kaddqi:
6506 case X86::BI__builtin_ia32_kaddhi:
6507 case X86::BI__builtin_ia32_kaddsi:
6508 case X86::BI__builtin_ia32_kadddi:
6511 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
6513 case X86::BI__builtin_ia32_kmovb:
6514 case X86::BI__builtin_ia32_kmovw:
6515 case X86::BI__builtin_ia32_kmovd:
6516 case X86::BI__builtin_ia32_kmovq:
6518 S, OpPC,
Call, [](
const APSInt &Src) {
return Src; });
6520 case X86::BI__builtin_ia32_kunpckhi:
6521 case X86::BI__builtin_ia32_kunpckdi:
6522 case X86::BI__builtin_ia32_kunpcksi:
6527 unsigned BW = A.getBitWidth();
6528 return APSInt(A.trunc(BW / 2).concat(B.trunc(BW / 2)),
6532 case X86::BI__builtin_ia32_phminposuw128:
6535 case X86::BI__builtin_ia32_psraq128:
6536 case X86::BI__builtin_ia32_psraq256:
6537 case X86::BI__builtin_ia32_psraq512:
6538 case X86::BI__builtin_ia32_psrad128:
6539 case X86::BI__builtin_ia32_psrad256:
6540 case X86::BI__builtin_ia32_psrad512:
6541 case X86::BI__builtin_ia32_psraw128:
6542 case X86::BI__builtin_ia32_psraw256:
6543 case X86::BI__builtin_ia32_psraw512:
6546 [](
const APInt &Elt, uint64_t Count) {
return Elt.ashr(Count); },
6547 [](
const APInt &Elt,
unsigned Width) {
return Elt.ashr(Width - 1); });
6549 case X86::BI__builtin_ia32_psllq128:
6550 case X86::BI__builtin_ia32_psllq256:
6551 case X86::BI__builtin_ia32_psllq512:
6552 case X86::BI__builtin_ia32_pslld128:
6553 case X86::BI__builtin_ia32_pslld256:
6554 case X86::BI__builtin_ia32_pslld512:
6555 case X86::BI__builtin_ia32_psllw128:
6556 case X86::BI__builtin_ia32_psllw256:
6557 case X86::BI__builtin_ia32_psllw512:
6560 [](
const APInt &Elt, uint64_t Count) {
return Elt.shl(Count); },
6561 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
6563 case X86::BI__builtin_ia32_psrlq128:
6564 case X86::BI__builtin_ia32_psrlq256:
6565 case X86::BI__builtin_ia32_psrlq512:
6566 case X86::BI__builtin_ia32_psrld128:
6567 case X86::BI__builtin_ia32_psrld256:
6568 case X86::BI__builtin_ia32_psrld512:
6569 case X86::BI__builtin_ia32_psrlw128:
6570 case X86::BI__builtin_ia32_psrlw256:
6571 case X86::BI__builtin_ia32_psrlw512:
6574 [](
const APInt &Elt, uint64_t Count) {
return Elt.lshr(Count); },
6575 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
6577 case X86::BI__builtin_ia32_pternlogd128_mask:
6578 case X86::BI__builtin_ia32_pternlogd256_mask:
6579 case X86::BI__builtin_ia32_pternlogd512_mask:
6580 case X86::BI__builtin_ia32_pternlogq128_mask:
6581 case X86::BI__builtin_ia32_pternlogq256_mask:
6582 case X86::BI__builtin_ia32_pternlogq512_mask:
6584 case X86::BI__builtin_ia32_pternlogd128_maskz:
6585 case X86::BI__builtin_ia32_pternlogd256_maskz:
6586 case X86::BI__builtin_ia32_pternlogd512_maskz:
6587 case X86::BI__builtin_ia32_pternlogq128_maskz:
6588 case X86::BI__builtin_ia32_pternlogq256_maskz:
6589 case X86::BI__builtin_ia32_pternlogq512_maskz:
6591 case Builtin::BI__builtin_elementwise_fshl:
6593 llvm::APIntOps::fshl);
6594 case Builtin::BI__builtin_elementwise_fshr:
6596 llvm::APIntOps::fshr);
6598 case X86::BI__builtin_ia32_shuf_f32x4_256:
6599 case X86::BI__builtin_ia32_shuf_i32x4_256:
6600 case X86::BI__builtin_ia32_shuf_f64x2_256:
6601 case X86::BI__builtin_ia32_shuf_i64x2_256:
6602 case X86::BI__builtin_ia32_shuf_f32x4:
6603 case X86::BI__builtin_ia32_shuf_i32x4:
6604 case X86::BI__builtin_ia32_shuf_f64x2:
6605 case X86::BI__builtin_ia32_shuf_i64x2: {
6611 unsigned LaneBits = 128u;
6612 unsigned NumLanes = (NumElems * ElemBits) / LaneBits;
6613 unsigned NumElemsPerLane = LaneBits / ElemBits;
6617 [NumLanes, NumElemsPerLane](
unsigned DstIdx,
unsigned ShuffleMask) {
6619 unsigned BitsPerElem = NumLanes / 2;
6620 unsigned IndexMask = (1u << BitsPerElem) - 1;
6621 unsigned Lane = DstIdx / NumElemsPerLane;
6622 unsigned SrcIdx = (Lane < NumLanes / 2) ? 0 : 1;
6623 unsigned BitIdx = BitsPerElem * Lane;
6624 unsigned SrcLaneIdx = (ShuffleMask >> BitIdx) & IndexMask;
6625 unsigned ElemInLane = DstIdx % NumElemsPerLane;
6626 unsigned IdxToPick = SrcLaneIdx * NumElemsPerLane + ElemInLane;
6627 return std::pair<unsigned, int>{SrcIdx, IdxToPick};
6631 case X86::BI__builtin_ia32_insertf32x4_256:
6632 case X86::BI__builtin_ia32_inserti32x4_256:
6633 case X86::BI__builtin_ia32_insertf64x2_256:
6634 case X86::BI__builtin_ia32_inserti64x2_256:
6635 case X86::BI__builtin_ia32_insertf32x4:
6636 case X86::BI__builtin_ia32_inserti32x4:
6637 case X86::BI__builtin_ia32_insertf64x2_512:
6638 case X86::BI__builtin_ia32_inserti64x2_512:
6639 case X86::BI__builtin_ia32_insertf32x8:
6640 case X86::BI__builtin_ia32_inserti32x8:
6641 case X86::BI__builtin_ia32_insertf64x4:
6642 case X86::BI__builtin_ia32_inserti64x4:
6643 case X86::BI__builtin_ia32_vinsertf128_ps256:
6644 case X86::BI__builtin_ia32_vinsertf128_pd256:
6645 case X86::BI__builtin_ia32_vinsertf128_si256:
6646 case X86::BI__builtin_ia32_insert128i256:
6649 case clang::X86::BI__builtin_ia32_vcvtps2ph:
6650 case clang::X86::BI__builtin_ia32_vcvtps2ph256:
6653 case X86::BI__builtin_ia32_vec_ext_v4hi:
6654 case X86::BI__builtin_ia32_vec_ext_v16qi:
6655 case X86::BI__builtin_ia32_vec_ext_v8hi:
6656 case X86::BI__builtin_ia32_vec_ext_v4si:
6657 case X86::BI__builtin_ia32_vec_ext_v2di:
6658 case X86::BI__builtin_ia32_vec_ext_v32qi:
6659 case X86::BI__builtin_ia32_vec_ext_v16hi:
6660 case X86::BI__builtin_ia32_vec_ext_v8si:
6661 case X86::BI__builtin_ia32_vec_ext_v4di:
6662 case X86::BI__builtin_ia32_vec_ext_v4sf:
6665 case X86::BI__builtin_ia32_vec_set_v4hi:
6666 case X86::BI__builtin_ia32_vec_set_v16qi:
6667 case X86::BI__builtin_ia32_vec_set_v8hi:
6668 case X86::BI__builtin_ia32_vec_set_v4si:
6669 case X86::BI__builtin_ia32_vec_set_v2di:
6670 case X86::BI__builtin_ia32_vec_set_v32qi:
6671 case X86::BI__builtin_ia32_vec_set_v16hi:
6672 case X86::BI__builtin_ia32_vec_set_v8si:
6673 case X86::BI__builtin_ia32_vec_set_v4di:
6676 case X86::BI__builtin_ia32_cvtb2mask128:
6677 case X86::BI__builtin_ia32_cvtb2mask256:
6678 case X86::BI__builtin_ia32_cvtb2mask512:
6679 case X86::BI__builtin_ia32_cvtw2mask128:
6680 case X86::BI__builtin_ia32_cvtw2mask256:
6681 case X86::BI__builtin_ia32_cvtw2mask512:
6682 case X86::BI__builtin_ia32_cvtd2mask128:
6683 case X86::BI__builtin_ia32_cvtd2mask256:
6684 case X86::BI__builtin_ia32_cvtd2mask512:
6685 case X86::BI__builtin_ia32_cvtq2mask128:
6686 case X86::BI__builtin_ia32_cvtq2mask256:
6687 case X86::BI__builtin_ia32_cvtq2mask512:
6690 case X86::BI__builtin_ia32_cvtmask2b128:
6691 case X86::BI__builtin_ia32_cvtmask2b256:
6692 case X86::BI__builtin_ia32_cvtmask2b512:
6693 case X86::BI__builtin_ia32_cvtmask2w128:
6694 case X86::BI__builtin_ia32_cvtmask2w256:
6695 case X86::BI__builtin_ia32_cvtmask2w512:
6696 case X86::BI__builtin_ia32_cvtmask2d128:
6697 case X86::BI__builtin_ia32_cvtmask2d256:
6698 case X86::BI__builtin_ia32_cvtmask2d512:
6699 case X86::BI__builtin_ia32_cvtmask2q128:
6700 case X86::BI__builtin_ia32_cvtmask2q256:
6701 case X86::BI__builtin_ia32_cvtmask2q512:
6704 case X86::BI__builtin_ia32_cvtsd2ss:
6707 case X86::BI__builtin_ia32_cvtsd2ss_round_mask:
6710 case X86::BI__builtin_ia32_cvtpd2ps:
6711 case X86::BI__builtin_ia32_cvtpd2ps256:
6713 case X86::BI__builtin_ia32_cvtpd2ps_mask:
6715 case X86::BI__builtin_ia32_cvtpd2ps512_mask:
6718 case X86::BI__builtin_ia32_cmpb128_mask:
6719 case X86::BI__builtin_ia32_cmpw128_mask:
6720 case X86::BI__builtin_ia32_cmpd128_mask:
6721 case X86::BI__builtin_ia32_cmpq128_mask:
6722 case X86::BI__builtin_ia32_cmpb256_mask:
6723 case X86::BI__builtin_ia32_cmpw256_mask:
6724 case X86::BI__builtin_ia32_cmpd256_mask:
6725 case X86::BI__builtin_ia32_cmpq256_mask:
6726 case X86::BI__builtin_ia32_cmpb512_mask:
6727 case X86::BI__builtin_ia32_cmpw512_mask:
6728 case X86::BI__builtin_ia32_cmpd512_mask:
6729 case X86::BI__builtin_ia32_cmpq512_mask:
6733 case X86::BI__builtin_ia32_ucmpb128_mask:
6734 case X86::BI__builtin_ia32_ucmpw128_mask:
6735 case X86::BI__builtin_ia32_ucmpd128_mask:
6736 case X86::BI__builtin_ia32_ucmpq128_mask:
6737 case X86::BI__builtin_ia32_ucmpb256_mask:
6738 case X86::BI__builtin_ia32_ucmpw256_mask:
6739 case X86::BI__builtin_ia32_ucmpd256_mask:
6740 case X86::BI__builtin_ia32_ucmpq256_mask:
6741 case X86::BI__builtin_ia32_ucmpb512_mask:
6742 case X86::BI__builtin_ia32_ucmpw512_mask:
6743 case X86::BI__builtin_ia32_ucmpd512_mask:
6744 case X86::BI__builtin_ia32_ucmpq512_mask:
6748 case X86::BI__builtin_ia32_vpshufbitqmb128_mask:
6749 case X86::BI__builtin_ia32_vpshufbitqmb256_mask:
6750 case X86::BI__builtin_ia32_vpshufbitqmb512_mask:
6753 case X86::BI__builtin_ia32_pslldqi128_byteshift:
6754 case X86::BI__builtin_ia32_pslldqi256_byteshift:
6755 case X86::BI__builtin_ia32_pslldqi512_byteshift:
6762 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
6763 unsigned LaneBase = (DstIdx / 16) * 16;
6764 unsigned LaneIdx = DstIdx % 16;
6765 if (LaneIdx < Shift)
6766 return std::make_pair(0, -1);
6768 return std::make_pair(0,
6769 static_cast<int>(LaneBase + LaneIdx - Shift));
6772 case X86::BI__builtin_ia32_psrldqi128_byteshift:
6773 case X86::BI__builtin_ia32_psrldqi256_byteshift:
6774 case X86::BI__builtin_ia32_psrldqi512_byteshift:
6781 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
6782 unsigned LaneBase = (DstIdx / 16) * 16;
6783 unsigned LaneIdx = DstIdx % 16;
6784 if (LaneIdx + Shift < 16)
6785 return std::make_pair(0,
6786 static_cast<int>(LaneBase + LaneIdx + Shift));
6788 return std::make_pair(0, -1);
6791 case X86::BI__builtin_ia32_palignr128:
6792 case X86::BI__builtin_ia32_palignr256:
6793 case X86::BI__builtin_ia32_palignr512:
6795 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Shift) {
6797 unsigned VecIdx = 1;
6800 int Lane = DstIdx / 16;
6801 int Offset = DstIdx % 16;
6804 unsigned ShiftedIdx = Offset + (Shift & 0xFF);
6805 if (ShiftedIdx < 16) {
6806 ElemIdx = ShiftedIdx + (Lane * 16);
6807 }
else if (ShiftedIdx < 32) {
6809 ElemIdx = (ShiftedIdx - 16) + (Lane * 16);
6812 return std::pair<unsigned, int>{VecIdx, ElemIdx};
6815 case X86::BI__builtin_ia32_alignd128:
6816 case X86::BI__builtin_ia32_alignd256:
6817 case X86::BI__builtin_ia32_alignd512:
6818 case X86::BI__builtin_ia32_alignq128:
6819 case X86::BI__builtin_ia32_alignq256:
6820 case X86::BI__builtin_ia32_alignq512: {
6821 unsigned NumElems =
Call->getType()->castAs<
VectorType>()->getNumElements();
6823 S, OpPC,
Call, [NumElems](
unsigned DstIdx,
unsigned Shift) {
6824 unsigned Imm = Shift & 0xFF;
6825 unsigned EffectiveShift = Imm & (NumElems - 1);
6826 unsigned SourcePos = DstIdx + EffectiveShift;
6827 unsigned VecIdx = SourcePos < NumElems ? 1u : 0u;
6828 unsigned ElemIdx = SourcePos & (NumElems - 1);
6829 return std::pair<unsigned, int>{VecIdx,
static_cast<int>(ElemIdx)};
6833 case clang::X86::BI__builtin_ia32_minps:
6834 case clang::X86::BI__builtin_ia32_minpd:
6835 case clang::X86::BI__builtin_ia32_minph128:
6836 case clang::X86::BI__builtin_ia32_minph256:
6837 case clang::X86::BI__builtin_ia32_minps256:
6838 case clang::X86::BI__builtin_ia32_minpd256:
6839 case clang::X86::BI__builtin_ia32_minps512:
6840 case clang::X86::BI__builtin_ia32_minpd512:
6841 case clang::X86::BI__builtin_ia32_minph512:
6845 std::optional<APSInt>) -> std::optional<APFloat> {
6846 if (A.isNaN() || A.isInfinity() || A.isDenormal() || B.isNaN() ||
6847 B.isInfinity() || B.isDenormal())
6848 return std::nullopt;
6849 if (A.isZero() && B.isZero())
6851 return llvm::minimum(A, B);
6854 case clang::X86::BI__builtin_ia32_minss:
6855 case clang::X86::BI__builtin_ia32_minsd:
6859 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
6864 case clang::X86::BI__builtin_ia32_minsd_round_mask:
6865 case clang::X86::BI__builtin_ia32_minss_round_mask:
6866 case clang::X86::BI__builtin_ia32_minsh_round_mask:
6867 case clang::X86::BI__builtin_ia32_maxsd_round_mask:
6868 case clang::X86::BI__builtin_ia32_maxss_round_mask:
6869 case clang::X86::BI__builtin_ia32_maxsh_round_mask: {
6870 bool IsMin = BuiltinID == clang::X86::BI__builtin_ia32_minsd_round_mask ||
6871 BuiltinID == clang::X86::BI__builtin_ia32_minss_round_mask ||
6872 BuiltinID == clang::X86::BI__builtin_ia32_minsh_round_mask;
6876 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
6881 case clang::X86::BI__builtin_ia32_maxps:
6882 case clang::X86::BI__builtin_ia32_maxpd:
6883 case clang::X86::BI__builtin_ia32_maxph128:
6884 case clang::X86::BI__builtin_ia32_maxph256:
6885 case clang::X86::BI__builtin_ia32_maxps256:
6886 case clang::X86::BI__builtin_ia32_maxpd256:
6887 case clang::X86::BI__builtin_ia32_maxps512:
6888 case clang::X86::BI__builtin_ia32_maxpd512:
6889 case clang::X86::BI__builtin_ia32_maxph512:
6893 std::optional<APSInt>) -> std::optional<APFloat> {
6894 if (A.isNaN() || A.isInfinity() || A.isDenormal() || B.isNaN() ||
6895 B.isInfinity() || B.isDenormal())
6896 return std::nullopt;
6897 if (A.isZero() && B.isZero())
6899 return llvm::maximum(A, B);
6902 case clang::X86::BI__builtin_ia32_maxss:
6903 case clang::X86::BI__builtin_ia32_maxsd:
6907 std::optional<APSInt> RoundingMode) -> std::optional<APFloat> {
6911 case X86::BI__builtin_ia32_vpdpwssd128:
6912 case X86::BI__builtin_ia32_vpdpwssd256:
6913 case X86::BI__builtin_ia32_vpdpwssd512:
6914 case X86::BI__builtin_ia32_vpdpbusd128:
6915 case X86::BI__builtin_ia32_vpdpbusd256:
6916 case X86::BI__builtin_ia32_vpdpbusd512:
6918 case X86::BI__builtin_ia32_vpdpwssds128:
6919 case X86::BI__builtin_ia32_vpdpwssds256:
6920 case X86::BI__builtin_ia32_vpdpwssds512:
6921 case X86::BI__builtin_ia32_vpdpbusds128:
6922 case X86::BI__builtin_ia32_vpdpbusds256:
6923 case X86::BI__builtin_ia32_vpdpbusds512:
6925 case X86::BI__builtin_ia32_cvtss2si:
6926 case X86::BI__builtin_ia32_cvtsd2si:
6927 case X86::BI__builtin_ia32_cvttss2si:
6928 case X86::BI__builtin_ia32_cvttsd2si:
6929 case X86::BI__builtin_ia32_cvtss2si64:
6930 case X86::BI__builtin_ia32_cvtsd2si64:
6931 case X86::BI__builtin_ia32_cvttss2si64:
6932 case X86::BI__builtin_ia32_cvttsd2si64:
6934 case X86::BI__builtin_ia32_cvtpd2dq:
6935 case X86::BI__builtin_ia32_cvttpd2dq:
6936 case X86::BI__builtin_ia32_cvtps2dq:
6937 case X86::BI__builtin_ia32_cvtpd2dq256:
6938 case X86::BI__builtin_ia32_cvtps2dq256:
6939 case X86::BI__builtin_ia32_cvttps2dq:
6940 case X86::BI__builtin_ia32_cvttpd2dq256:
6941 case X86::BI__builtin_ia32_cvttps2dq256:
6944 case Builtin::BI__builtin_meta_is_type:
6951 llvm_unreachable(
"Unhandled builtin ID");