3987 uint32_t BuiltinID) {
3992 switch (BuiltinID) {
3993 case Builtin::BI__builtin_is_constant_evaluated:
3996 case Builtin::BI__builtin_assume:
3997 case Builtin::BI__assume:
4000 case Builtin::BI__builtin_strcmp:
4001 case Builtin::BIstrcmp:
4002 case Builtin::BI__builtin_strncmp:
4003 case Builtin::BIstrncmp:
4004 case Builtin::BI__builtin_wcsncmp:
4005 case Builtin::BIwcsncmp:
4006 case Builtin::BI__builtin_wcscmp:
4007 case Builtin::BIwcscmp:
4010 case Builtin::BI__builtin_strlen:
4011 case Builtin::BIstrlen:
4012 case Builtin::BI__builtin_wcslen:
4013 case Builtin::BIwcslen:
4016 case Builtin::BI__builtin_nan:
4017 case Builtin::BI__builtin_nanf:
4018 case Builtin::BI__builtin_nanl:
4019 case Builtin::BI__builtin_nanf16:
4020 case Builtin::BI__builtin_nanf128:
4023 case Builtin::BI__builtin_nans:
4024 case Builtin::BI__builtin_nansf:
4025 case Builtin::BI__builtin_nansl:
4026 case Builtin::BI__builtin_nansf16:
4027 case Builtin::BI__builtin_nansf128:
4030 case Builtin::BI__builtin_huge_val:
4031 case Builtin::BI__builtin_huge_valf:
4032 case Builtin::BI__builtin_huge_vall:
4033 case Builtin::BI__builtin_huge_valf16:
4034 case Builtin::BI__builtin_huge_valf128:
4035 case Builtin::BI__builtin_inf:
4036 case Builtin::BI__builtin_inff:
4037 case Builtin::BI__builtin_infl:
4038 case Builtin::BI__builtin_inff16:
4039 case Builtin::BI__builtin_inff128:
4042 case Builtin::BI__builtin_copysign:
4043 case Builtin::BI__builtin_copysignf:
4044 case Builtin::BI__builtin_copysignl:
4045 case Builtin::BI__builtin_copysignf128:
4048 case Builtin::BI__builtin_fmin:
4049 case Builtin::BI__builtin_fminf:
4050 case Builtin::BI__builtin_fminl:
4051 case Builtin::BI__builtin_fminf16:
4052 case Builtin::BI__builtin_fminf128:
4055 case Builtin::BI__builtin_fminimum_num:
4056 case Builtin::BI__builtin_fminimum_numf:
4057 case Builtin::BI__builtin_fminimum_numl:
4058 case Builtin::BI__builtin_fminimum_numf16:
4059 case Builtin::BI__builtin_fminimum_numf128:
4062 case Builtin::BI__builtin_fmax:
4063 case Builtin::BI__builtin_fmaxf:
4064 case Builtin::BI__builtin_fmaxl:
4065 case Builtin::BI__builtin_fmaxf16:
4066 case Builtin::BI__builtin_fmaxf128:
4069 case Builtin::BI__builtin_fmaximum_num:
4070 case Builtin::BI__builtin_fmaximum_numf:
4071 case Builtin::BI__builtin_fmaximum_numl:
4072 case Builtin::BI__builtin_fmaximum_numf16:
4073 case Builtin::BI__builtin_fmaximum_numf128:
4076 case Builtin::BI__builtin_isnan:
4079 case Builtin::BI__builtin_issignaling:
4082 case Builtin::BI__builtin_isinf:
4085 case Builtin::BI__builtin_isinf_sign:
4088 case Builtin::BI__builtin_isfinite:
4091 case Builtin::BI__builtin_isnormal:
4094 case Builtin::BI__builtin_issubnormal:
4097 case Builtin::BI__builtin_iszero:
4100 case Builtin::BI__builtin_signbit:
4101 case Builtin::BI__builtin_signbitf:
4102 case Builtin::BI__builtin_signbitl:
4105 case Builtin::BI__builtin_isgreater:
4106 case Builtin::BI__builtin_isgreaterequal:
4107 case Builtin::BI__builtin_isless:
4108 case Builtin::BI__builtin_islessequal:
4109 case Builtin::BI__builtin_islessgreater:
4110 case Builtin::BI__builtin_isunordered:
4113 case Builtin::BI__builtin_isfpclass:
4116 case Builtin::BI__builtin_fpclassify:
4119 case Builtin::BI__builtin_fabs:
4120 case Builtin::BI__builtin_fabsf:
4121 case Builtin::BI__builtin_fabsl:
4122 case Builtin::BI__builtin_fabsf128:
4125 case Builtin::BI__builtin_abs:
4126 case Builtin::BI__builtin_labs:
4127 case Builtin::BI__builtin_llabs:
4130 case Builtin::BI__builtin_popcount:
4131 case Builtin::BI__builtin_popcountl:
4132 case Builtin::BI__builtin_popcountll:
4133 case Builtin::BI__builtin_popcountg:
4134 case Builtin::BI__popcnt16:
4135 case Builtin::BI__popcnt:
4136 case Builtin::BI__popcnt64:
4139 case Builtin::BI__builtin_parity:
4140 case Builtin::BI__builtin_parityl:
4141 case Builtin::BI__builtin_parityll:
4144 return APInt(Val.getBitWidth(), Val.popcount() % 2);
4146 case Builtin::BI__builtin_clrsb:
4147 case Builtin::BI__builtin_clrsbl:
4148 case Builtin::BI__builtin_clrsbll:
4151 return APInt(Val.getBitWidth(),
4152 Val.getBitWidth() - Val.getSignificantBits());
4154 case Builtin::BI__builtin_bitreverse8:
4155 case Builtin::BI__builtin_bitreverse16:
4156 case Builtin::BI__builtin_bitreverse32:
4157 case Builtin::BI__builtin_bitreverse64:
4159 S, OpPC,
Call, [](
const APSInt &Val) {
return Val.reverseBits(); });
4161 case Builtin::BI__builtin_classify_type:
4164 case Builtin::BI__builtin_expect:
4165 case Builtin::BI__builtin_expect_with_probability:
4168 case Builtin::BI__builtin_rotateleft8:
4169 case Builtin::BI__builtin_rotateleft16:
4170 case Builtin::BI__builtin_rotateleft32:
4171 case Builtin::BI__builtin_rotateleft64:
4172 case Builtin::BI_rotl8:
4173 case Builtin::BI_rotl16:
4174 case Builtin::BI_rotl:
4175 case Builtin::BI_lrotl:
4176 case Builtin::BI_rotl64:
4179 return Value.rotl(Amount);
4182 case Builtin::BI__builtin_rotateright8:
4183 case Builtin::BI__builtin_rotateright16:
4184 case Builtin::BI__builtin_rotateright32:
4185 case Builtin::BI__builtin_rotateright64:
4186 case Builtin::BI_rotr8:
4187 case Builtin::BI_rotr16:
4188 case Builtin::BI_rotr:
4189 case Builtin::BI_lrotr:
4190 case Builtin::BI_rotr64:
4193 return Value.rotr(Amount);
4196 case Builtin::BI__builtin_ffs:
4197 case Builtin::BI__builtin_ffsl:
4198 case Builtin::BI__builtin_ffsll:
4201 return APInt(Val.getBitWidth(),
4202 Val.isZero() ? 0u : Val.countTrailingZeros() + 1u);
4205 case Builtin::BIaddressof:
4206 case Builtin::BI__addressof:
4207 case Builtin::BI__builtin_addressof:
4211 case Builtin::BIas_const:
4212 case Builtin::BIforward:
4213 case Builtin::BIforward_like:
4214 case Builtin::BImove:
4215 case Builtin::BImove_if_noexcept:
4219 case Builtin::BI__builtin_eh_return_data_regno:
4222 case Builtin::BI__builtin_launder:
4226 case Builtin::BI__builtin_add_overflow:
4227 case Builtin::BI__builtin_sub_overflow:
4228 case Builtin::BI__builtin_mul_overflow:
4229 case Builtin::BI__builtin_sadd_overflow:
4230 case Builtin::BI__builtin_uadd_overflow:
4231 case Builtin::BI__builtin_uaddl_overflow:
4232 case Builtin::BI__builtin_uaddll_overflow:
4233 case Builtin::BI__builtin_usub_overflow:
4234 case Builtin::BI__builtin_usubl_overflow:
4235 case Builtin::BI__builtin_usubll_overflow:
4236 case Builtin::BI__builtin_umul_overflow:
4237 case Builtin::BI__builtin_umull_overflow:
4238 case Builtin::BI__builtin_umulll_overflow:
4239 case Builtin::BI__builtin_saddl_overflow:
4240 case Builtin::BI__builtin_saddll_overflow:
4241 case Builtin::BI__builtin_ssub_overflow:
4242 case Builtin::BI__builtin_ssubl_overflow:
4243 case Builtin::BI__builtin_ssubll_overflow:
4244 case Builtin::BI__builtin_smul_overflow:
4245 case Builtin::BI__builtin_smull_overflow:
4246 case Builtin::BI__builtin_smulll_overflow:
4249 case Builtin::BI__builtin_addcb:
4250 case Builtin::BI__builtin_addcs:
4251 case Builtin::BI__builtin_addc:
4252 case Builtin::BI__builtin_addcl:
4253 case Builtin::BI__builtin_addcll:
4254 case Builtin::BI__builtin_subcb:
4255 case Builtin::BI__builtin_subcs:
4256 case Builtin::BI__builtin_subc:
4257 case Builtin::BI__builtin_subcl:
4258 case Builtin::BI__builtin_subcll:
4261 case Builtin::BI__builtin_clz:
4262 case Builtin::BI__builtin_clzl:
4263 case Builtin::BI__builtin_clzll:
4264 case Builtin::BI__builtin_clzs:
4265 case Builtin::BI__builtin_clzg:
4266 case Builtin::BI__lzcnt16:
4267 case Builtin::BI__lzcnt:
4268 case Builtin::BI__lzcnt64:
4271 case Builtin::BI__builtin_ctz:
4272 case Builtin::BI__builtin_ctzl:
4273 case Builtin::BI__builtin_ctzll:
4274 case Builtin::BI__builtin_ctzs:
4275 case Builtin::BI__builtin_ctzg:
4278 case Builtin::BI__builtin_elementwise_clzg:
4279 case Builtin::BI__builtin_elementwise_ctzg:
4282 case Builtin::BI__builtin_bswapg:
4283 case Builtin::BI__builtin_bswap16:
4284 case Builtin::BI__builtin_bswap32:
4285 case Builtin::BI__builtin_bswap64:
4288 case Builtin::BI__atomic_always_lock_free:
4289 case Builtin::BI__atomic_is_lock_free:
4292 case Builtin::BI__c11_atomic_is_lock_free:
4295 case Builtin::BI__builtin_complex:
4298 case Builtin::BI__builtin_is_aligned:
4299 case Builtin::BI__builtin_align_up:
4300 case Builtin::BI__builtin_align_down:
4303 case Builtin::BI__builtin_assume_aligned:
4306 case clang::X86::BI__builtin_ia32_bextr_u32:
4307 case clang::X86::BI__builtin_ia32_bextr_u64:
4308 case clang::X86::BI__builtin_ia32_bextri_u32:
4309 case clang::X86::BI__builtin_ia32_bextri_u64:
4312 unsigned BitWidth = Val.getBitWidth();
4313 uint64_t Shift = Idx.extractBitsAsZExtValue(8, 0);
4314 uint64_t Length = Idx.extractBitsAsZExtValue(8, 8);
4315 if (Length > BitWidth) {
4320 if (Length == 0 || Shift >= BitWidth)
4321 return APInt(BitWidth, 0);
4323 uint64_t
Result = Val.getZExtValue() >> Shift;
4324 Result &= llvm::maskTrailingOnes<uint64_t>(Length);
4328 case clang::X86::BI__builtin_ia32_bzhi_si:
4329 case clang::X86::BI__builtin_ia32_bzhi_di:
4332 unsigned BitWidth = Val.getBitWidth();
4333 uint64_t Index = Idx.extractBitsAsZExtValue(8, 0);
4336 if (Index < BitWidth)
4337 Result.clearHighBits(BitWidth - Index);
4342 case clang::X86::BI__builtin_ia32_ktestcqi:
4343 case clang::X86::BI__builtin_ia32_ktestchi:
4344 case clang::X86::BI__builtin_ia32_ktestcsi:
4345 case clang::X86::BI__builtin_ia32_ktestcdi:
4348 return APInt(
sizeof(
unsigned char) * 8, (~A & B) == 0);
4351 case clang::X86::BI__builtin_ia32_ktestzqi:
4352 case clang::X86::BI__builtin_ia32_ktestzhi:
4353 case clang::X86::BI__builtin_ia32_ktestzsi:
4354 case clang::X86::BI__builtin_ia32_ktestzdi:
4357 return APInt(
sizeof(
unsigned char) * 8, (A & B) == 0);
4360 case clang::X86::BI__builtin_ia32_kortestcqi:
4361 case clang::X86::BI__builtin_ia32_kortestchi:
4362 case clang::X86::BI__builtin_ia32_kortestcsi:
4363 case clang::X86::BI__builtin_ia32_kortestcdi:
4366 return APInt(
sizeof(
unsigned char) * 8, ~(A | B) == 0);
4369 case clang::X86::BI__builtin_ia32_kortestzqi:
4370 case clang::X86::BI__builtin_ia32_kortestzhi:
4371 case clang::X86::BI__builtin_ia32_kortestzsi:
4372 case clang::X86::BI__builtin_ia32_kortestzdi:
4375 return APInt(
sizeof(
unsigned char) * 8, (A | B) == 0);
4378 case clang::X86::BI__builtin_ia32_kshiftliqi:
4379 case clang::X86::BI__builtin_ia32_kshiftlihi:
4380 case clang::X86::BI__builtin_ia32_kshiftlisi:
4381 case clang::X86::BI__builtin_ia32_kshiftlidi:
4384 unsigned Amt = RHS.getZExtValue() & 0xFF;
4385 if (Amt >= LHS.getBitWidth())
4386 return APInt::getZero(LHS.getBitWidth());
4387 return LHS.shl(Amt);
4390 case clang::X86::BI__builtin_ia32_kshiftriqi:
4391 case clang::X86::BI__builtin_ia32_kshiftrihi:
4392 case clang::X86::BI__builtin_ia32_kshiftrisi:
4393 case clang::X86::BI__builtin_ia32_kshiftridi:
4396 unsigned Amt = RHS.getZExtValue() & 0xFF;
4397 if (Amt >= LHS.getBitWidth())
4398 return APInt::getZero(LHS.getBitWidth());
4399 return LHS.lshr(Amt);
4402 case clang::X86::BI__builtin_ia32_lzcnt_u16:
4403 case clang::X86::BI__builtin_ia32_lzcnt_u32:
4404 case clang::X86::BI__builtin_ia32_lzcnt_u64:
4407 return APInt(Src.getBitWidth(), Src.countLeadingZeros());
4410 case clang::X86::BI__builtin_ia32_tzcnt_u16:
4411 case clang::X86::BI__builtin_ia32_tzcnt_u32:
4412 case clang::X86::BI__builtin_ia32_tzcnt_u64:
4415 return APInt(Src.getBitWidth(), Src.countTrailingZeros());
4418 case clang::X86::BI__builtin_ia32_pdep_si:
4419 case clang::X86::BI__builtin_ia32_pdep_di:
4422 unsigned BitWidth = Val.getBitWidth();
4425 for (
unsigned I = 0, P = 0; I != BitWidth; ++I) {
4427 Result.setBitVal(I, Val[P++]);
4433 case clang::X86::BI__builtin_ia32_pext_si:
4434 case clang::X86::BI__builtin_ia32_pext_di:
4437 unsigned BitWidth = Val.getBitWidth();
4440 for (
unsigned I = 0, P = 0; I != BitWidth; ++I) {
4442 Result.setBitVal(P++, Val[I]);
4448 case clang::X86::BI__builtin_ia32_addcarryx_u32:
4449 case clang::X86::BI__builtin_ia32_addcarryx_u64:
4450 case clang::X86::BI__builtin_ia32_subborrow_u32:
4451 case clang::X86::BI__builtin_ia32_subborrow_u64:
4455 case Builtin::BI__builtin_os_log_format_buffer_size:
4458 case Builtin::BI__builtin_ptrauth_string_discriminator:
4461 case Builtin::BI__builtin_infer_alloc_token:
4464 case Builtin::BI__noop:
4468 case Builtin::BI__builtin_operator_new:
4471 case Builtin::BI__builtin_operator_delete:
4474 case Builtin::BI__arithmetic_fence:
4477 case Builtin::BI__builtin_reduce_add:
4478 case Builtin::BI__builtin_reduce_mul:
4479 case Builtin::BI__builtin_reduce_and:
4480 case Builtin::BI__builtin_reduce_or:
4481 case Builtin::BI__builtin_reduce_xor:
4482 case Builtin::BI__builtin_reduce_min:
4483 case Builtin::BI__builtin_reduce_max:
4486 case Builtin::BI__builtin_elementwise_popcount:
4489 return APInt(Src.getBitWidth(), Src.popcount());
4491 case Builtin::BI__builtin_elementwise_bitreverse:
4493 S, OpPC,
Call, [](
const APSInt &Src) {
return Src.reverseBits(); });
4495 case Builtin::BI__builtin_elementwise_abs:
4498 case Builtin::BI__builtin_memcpy:
4499 case Builtin::BImemcpy:
4500 case Builtin::BI__builtin_wmemcpy:
4501 case Builtin::BIwmemcpy:
4502 case Builtin::BI__builtin_memmove:
4503 case Builtin::BImemmove:
4504 case Builtin::BI__builtin_wmemmove:
4505 case Builtin::BIwmemmove:
4508 case Builtin::BI__builtin_memcmp:
4509 case Builtin::BImemcmp:
4510 case Builtin::BI__builtin_bcmp:
4511 case Builtin::BIbcmp:
4512 case Builtin::BI__builtin_wmemcmp:
4513 case Builtin::BIwmemcmp:
4516 case Builtin::BImemchr:
4517 case Builtin::BI__builtin_memchr:
4518 case Builtin::BIstrchr:
4519 case Builtin::BI__builtin_strchr:
4520 case Builtin::BIwmemchr:
4521 case Builtin::BI__builtin_wmemchr:
4522 case Builtin::BIwcschr:
4523 case Builtin::BI__builtin_wcschr:
4524 case Builtin::BI__builtin_char_memchr:
4527 case Builtin::BI__builtin_object_size:
4528 case Builtin::BI__builtin_dynamic_object_size:
4531 case Builtin::BI__builtin_is_within_lifetime:
4534 case Builtin::BI__builtin_elementwise_add_sat:
4537 return LHS.isSigned() ? LHS.sadd_sat(RHS) : LHS.uadd_sat(RHS);
4540 case Builtin::BI__builtin_elementwise_sub_sat:
4543 return LHS.isSigned() ? LHS.ssub_sat(RHS) : LHS.usub_sat(RHS);
4545 case X86::BI__builtin_ia32_extract128i256:
4546 case X86::BI__builtin_ia32_vextractf128_pd256:
4547 case X86::BI__builtin_ia32_vextractf128_ps256:
4548 case X86::BI__builtin_ia32_vextractf128_si256:
4551 case X86::BI__builtin_ia32_extractf32x4_256_mask:
4552 case X86::BI__builtin_ia32_extractf32x4_mask:
4553 case X86::BI__builtin_ia32_extractf32x8_mask:
4554 case X86::BI__builtin_ia32_extractf64x2_256_mask:
4555 case X86::BI__builtin_ia32_extractf64x2_512_mask:
4556 case X86::BI__builtin_ia32_extractf64x4_mask:
4557 case X86::BI__builtin_ia32_extracti32x4_256_mask:
4558 case X86::BI__builtin_ia32_extracti32x4_mask:
4559 case X86::BI__builtin_ia32_extracti32x8_mask:
4560 case X86::BI__builtin_ia32_extracti64x2_256_mask:
4561 case X86::BI__builtin_ia32_extracti64x2_512_mask:
4562 case X86::BI__builtin_ia32_extracti64x4_mask:
4565 case clang::X86::BI__builtin_ia32_pmulhrsw128:
4566 case clang::X86::BI__builtin_ia32_pmulhrsw256:
4567 case clang::X86::BI__builtin_ia32_pmulhrsw512:
4570 return (llvm::APIntOps::mulsExtended(LHS, RHS).ashr(14) + 1)
4571 .extractBits(16, 1);
4574 case clang::X86::BI__builtin_ia32_movmskps:
4575 case clang::X86::BI__builtin_ia32_movmskpd:
4576 case clang::X86::BI__builtin_ia32_pmovmskb128:
4577 case clang::X86::BI__builtin_ia32_pmovmskb256:
4578 case clang::X86::BI__builtin_ia32_movmskps256:
4579 case clang::X86::BI__builtin_ia32_movmskpd256: {
4583 case X86::BI__builtin_ia32_psignb128:
4584 case X86::BI__builtin_ia32_psignb256:
4585 case X86::BI__builtin_ia32_psignw128:
4586 case X86::BI__builtin_ia32_psignw256:
4587 case X86::BI__builtin_ia32_psignd128:
4588 case X86::BI__builtin_ia32_psignd256:
4592 return APInt::getZero(AElem.getBitWidth());
4593 if (BElem.isNegative())
4598 case clang::X86::BI__builtin_ia32_pavgb128:
4599 case clang::X86::BI__builtin_ia32_pavgw128:
4600 case clang::X86::BI__builtin_ia32_pavgb256:
4601 case clang::X86::BI__builtin_ia32_pavgw256:
4602 case clang::X86::BI__builtin_ia32_pavgb512:
4603 case clang::X86::BI__builtin_ia32_pavgw512:
4605 llvm::APIntOps::avgCeilU);
4607 case clang::X86::BI__builtin_ia32_pmaddubsw128:
4608 case clang::X86::BI__builtin_ia32_pmaddubsw256:
4609 case clang::X86::BI__builtin_ia32_pmaddubsw512:
4614 unsigned BitWidth = 2 * LoLHS.getBitWidth();
4615 return (LoLHS.zext(BitWidth) * LoRHS.sext(BitWidth))
4616 .sadd_sat((HiLHS.zext(BitWidth) * HiRHS.sext(BitWidth)));
4619 case clang::X86::BI__builtin_ia32_pmaddwd128:
4620 case clang::X86::BI__builtin_ia32_pmaddwd256:
4621 case clang::X86::BI__builtin_ia32_pmaddwd512:
4626 unsigned BitWidth = 2 * LoLHS.getBitWidth();
4627 return (LoLHS.sext(BitWidth) * LoRHS.sext(BitWidth)) +
4628 (HiLHS.sext(BitWidth) * HiRHS.sext(BitWidth));
4631 case clang::X86::BI__builtin_ia32_pmulhuw128:
4632 case clang::X86::BI__builtin_ia32_pmulhuw256:
4633 case clang::X86::BI__builtin_ia32_pmulhuw512:
4635 llvm::APIntOps::mulhu);
4637 case clang::X86::BI__builtin_ia32_pmulhw128:
4638 case clang::X86::BI__builtin_ia32_pmulhw256:
4639 case clang::X86::BI__builtin_ia32_pmulhw512:
4641 llvm::APIntOps::mulhs);
4643 case clang::X86::BI__builtin_ia32_psllv2di:
4644 case clang::X86::BI__builtin_ia32_psllv4di:
4645 case clang::X86::BI__builtin_ia32_psllv4si:
4646 case clang::X86::BI__builtin_ia32_psllv8di:
4647 case clang::X86::BI__builtin_ia32_psllv8hi:
4648 case clang::X86::BI__builtin_ia32_psllv8si:
4649 case clang::X86::BI__builtin_ia32_psllv16hi:
4650 case clang::X86::BI__builtin_ia32_psllv16si:
4651 case clang::X86::BI__builtin_ia32_psllv32hi:
4652 case clang::X86::BI__builtin_ia32_psllwi128:
4653 case clang::X86::BI__builtin_ia32_psllwi256:
4654 case clang::X86::BI__builtin_ia32_psllwi512:
4655 case clang::X86::BI__builtin_ia32_pslldi128:
4656 case clang::X86::BI__builtin_ia32_pslldi256:
4657 case clang::X86::BI__builtin_ia32_pslldi512:
4658 case clang::X86::BI__builtin_ia32_psllqi128:
4659 case clang::X86::BI__builtin_ia32_psllqi256:
4660 case clang::X86::BI__builtin_ia32_psllqi512:
4663 if (RHS.uge(LHS.getBitWidth())) {
4664 return APInt::getZero(LHS.getBitWidth());
4666 return LHS.shl(RHS.getZExtValue());
4669 case clang::X86::BI__builtin_ia32_psrav4si:
4670 case clang::X86::BI__builtin_ia32_psrav8di:
4671 case clang::X86::BI__builtin_ia32_psrav8hi:
4672 case clang::X86::BI__builtin_ia32_psrav8si:
4673 case clang::X86::BI__builtin_ia32_psrav16hi:
4674 case clang::X86::BI__builtin_ia32_psrav16si:
4675 case clang::X86::BI__builtin_ia32_psrav32hi:
4676 case clang::X86::BI__builtin_ia32_psravq128:
4677 case clang::X86::BI__builtin_ia32_psravq256:
4678 case clang::X86::BI__builtin_ia32_psrawi128:
4679 case clang::X86::BI__builtin_ia32_psrawi256:
4680 case clang::X86::BI__builtin_ia32_psrawi512:
4681 case clang::X86::BI__builtin_ia32_psradi128:
4682 case clang::X86::BI__builtin_ia32_psradi256:
4683 case clang::X86::BI__builtin_ia32_psradi512:
4684 case clang::X86::BI__builtin_ia32_psraqi128:
4685 case clang::X86::BI__builtin_ia32_psraqi256:
4686 case clang::X86::BI__builtin_ia32_psraqi512:
4689 if (RHS.uge(LHS.getBitWidth())) {
4690 return LHS.ashr(LHS.getBitWidth() - 1);
4692 return LHS.ashr(RHS.getZExtValue());
4695 case clang::X86::BI__builtin_ia32_psrlv2di:
4696 case clang::X86::BI__builtin_ia32_psrlv4di:
4697 case clang::X86::BI__builtin_ia32_psrlv4si:
4698 case clang::X86::BI__builtin_ia32_psrlv8di:
4699 case clang::X86::BI__builtin_ia32_psrlv8hi:
4700 case clang::X86::BI__builtin_ia32_psrlv8si:
4701 case clang::X86::BI__builtin_ia32_psrlv16hi:
4702 case clang::X86::BI__builtin_ia32_psrlv16si:
4703 case clang::X86::BI__builtin_ia32_psrlv32hi:
4704 case clang::X86::BI__builtin_ia32_psrlwi128:
4705 case clang::X86::BI__builtin_ia32_psrlwi256:
4706 case clang::X86::BI__builtin_ia32_psrlwi512:
4707 case clang::X86::BI__builtin_ia32_psrldi128:
4708 case clang::X86::BI__builtin_ia32_psrldi256:
4709 case clang::X86::BI__builtin_ia32_psrldi512:
4710 case clang::X86::BI__builtin_ia32_psrlqi128:
4711 case clang::X86::BI__builtin_ia32_psrlqi256:
4712 case clang::X86::BI__builtin_ia32_psrlqi512:
4715 if (RHS.uge(LHS.getBitWidth())) {
4716 return APInt::getZero(LHS.getBitWidth());
4718 return LHS.lshr(RHS.getZExtValue());
4720 case clang::X86::BI__builtin_ia32_packsswb128:
4721 case clang::X86::BI__builtin_ia32_packsswb256:
4722 case clang::X86::BI__builtin_ia32_packsswb512:
4723 case clang::X86::BI__builtin_ia32_packssdw128:
4724 case clang::X86::BI__builtin_ia32_packssdw256:
4725 case clang::X86::BI__builtin_ia32_packssdw512:
4727 return APInt(Src).truncSSat(Src.getBitWidth() / 2);
4729 case clang::X86::BI__builtin_ia32_packusdw128:
4730 case clang::X86::BI__builtin_ia32_packusdw256:
4731 case clang::X86::BI__builtin_ia32_packusdw512:
4732 case clang::X86::BI__builtin_ia32_packuswb128:
4733 case clang::X86::BI__builtin_ia32_packuswb256:
4734 case clang::X86::BI__builtin_ia32_packuswb512:
4736 unsigned DstBits = Src.getBitWidth() / 2;
4737 if (Src.isNegative())
4738 return APInt::getZero(DstBits);
4739 if (Src.isIntN(DstBits))
4740 return APInt(Src).trunc(DstBits);
4741 return APInt::getAllOnes(DstBits);
4744 case clang::X86::BI__builtin_ia32_selectss_128:
4745 case clang::X86::BI__builtin_ia32_selectsd_128:
4746 case clang::X86::BI__builtin_ia32_selectsh_128:
4747 case clang::X86::BI__builtin_ia32_selectsbf_128:
4749 case clang::X86::BI__builtin_ia32_vprotbi:
4750 case clang::X86::BI__builtin_ia32_vprotdi:
4751 case clang::X86::BI__builtin_ia32_vprotqi:
4752 case clang::X86::BI__builtin_ia32_vprotwi:
4753 case clang::X86::BI__builtin_ia32_prold128:
4754 case clang::X86::BI__builtin_ia32_prold256:
4755 case clang::X86::BI__builtin_ia32_prold512:
4756 case clang::X86::BI__builtin_ia32_prolq128:
4757 case clang::X86::BI__builtin_ia32_prolq256:
4758 case clang::X86::BI__builtin_ia32_prolq512:
4761 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotl(RHS); });
4763 case clang::X86::BI__builtin_ia32_prord128:
4764 case clang::X86::BI__builtin_ia32_prord256:
4765 case clang::X86::BI__builtin_ia32_prord512:
4766 case clang::X86::BI__builtin_ia32_prorq128:
4767 case clang::X86::BI__builtin_ia32_prorq256:
4768 case clang::X86::BI__builtin_ia32_prorq512:
4771 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotr(RHS); });
4773 case Builtin::BI__builtin_elementwise_max:
4774 case Builtin::BI__builtin_elementwise_min:
4777 case clang::X86::BI__builtin_ia32_phaddw128:
4778 case clang::X86::BI__builtin_ia32_phaddw256:
4779 case clang::X86::BI__builtin_ia32_phaddd128:
4780 case clang::X86::BI__builtin_ia32_phaddd256:
4783 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
4784 case clang::X86::BI__builtin_ia32_phaddsw128:
4785 case clang::X86::BI__builtin_ia32_phaddsw256:
4788 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.sadd_sat(RHS); });
4789 case clang::X86::BI__builtin_ia32_phsubw128:
4790 case clang::X86::BI__builtin_ia32_phsubw256:
4791 case clang::X86::BI__builtin_ia32_phsubd128:
4792 case clang::X86::BI__builtin_ia32_phsubd256:
4795 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS - RHS; });
4796 case clang::X86::BI__builtin_ia32_phsubsw128:
4797 case clang::X86::BI__builtin_ia32_phsubsw256:
4800 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.ssub_sat(RHS); });
4801 case clang::X86::BI__builtin_ia32_haddpd:
4802 case clang::X86::BI__builtin_ia32_haddps:
4803 case clang::X86::BI__builtin_ia32_haddpd256:
4804 case clang::X86::BI__builtin_ia32_haddps256:
4807 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
4812 case clang::X86::BI__builtin_ia32_hsubpd:
4813 case clang::X86::BI__builtin_ia32_hsubps:
4814 case clang::X86::BI__builtin_ia32_hsubpd256:
4815 case clang::X86::BI__builtin_ia32_hsubps256:
4818 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
4820 F.subtract(RHS, RM);
4823 case clang::X86::BI__builtin_ia32_addsubpd:
4824 case clang::X86::BI__builtin_ia32_addsubps:
4825 case clang::X86::BI__builtin_ia32_addsubpd256:
4826 case clang::X86::BI__builtin_ia32_addsubps256:
4829 case clang::X86::BI__builtin_ia32_pmuldq128:
4830 case clang::X86::BI__builtin_ia32_pmuldq256:
4831 case clang::X86::BI__builtin_ia32_pmuldq512:
4836 return llvm::APIntOps::mulsExtended(LoLHS, LoRHS);
4839 case clang::X86::BI__builtin_ia32_pmuludq128:
4840 case clang::X86::BI__builtin_ia32_pmuludq256:
4841 case clang::X86::BI__builtin_ia32_pmuludq512:
4846 return llvm::APIntOps::muluExtended(LoLHS, LoRHS);
4849 case clang::X86::BI__builtin_ia32_pclmulqdq128:
4850 case clang::X86::BI__builtin_ia32_pclmulqdq256:
4851 case clang::X86::BI__builtin_ia32_pclmulqdq512:
4854 case Builtin::BI__builtin_elementwise_fma:
4858 llvm::RoundingMode RM) {
4860 F.fusedMultiplyAdd(Y, Z, RM);
4864 case X86::BI__builtin_ia32_vpmadd52luq128:
4865 case X86::BI__builtin_ia32_vpmadd52luq256:
4866 case X86::BI__builtin_ia32_vpmadd52luq512:
4869 return A + (B.trunc(52) *
C.trunc(52)).zext(64);
4871 case X86::BI__builtin_ia32_vpmadd52huq128:
4872 case X86::BI__builtin_ia32_vpmadd52huq256:
4873 case X86::BI__builtin_ia32_vpmadd52huq512:
4876 return A + llvm::APIntOps::mulhu(B.trunc(52),
C.trunc(52)).zext(64);
4879 case X86::BI__builtin_ia32_vpshldd128:
4880 case X86::BI__builtin_ia32_vpshldd256:
4881 case X86::BI__builtin_ia32_vpshldd512:
4882 case X86::BI__builtin_ia32_vpshldq128:
4883 case X86::BI__builtin_ia32_vpshldq256:
4884 case X86::BI__builtin_ia32_vpshldq512:
4885 case X86::BI__builtin_ia32_vpshldw128:
4886 case X86::BI__builtin_ia32_vpshldw256:
4887 case X86::BI__builtin_ia32_vpshldw512:
4891 return llvm::APIntOps::fshl(Hi, Lo, Amt);
4894 case X86::BI__builtin_ia32_vpshrdd128:
4895 case X86::BI__builtin_ia32_vpshrdd256:
4896 case X86::BI__builtin_ia32_vpshrdd512:
4897 case X86::BI__builtin_ia32_vpshrdq128:
4898 case X86::BI__builtin_ia32_vpshrdq256:
4899 case X86::BI__builtin_ia32_vpshrdq512:
4900 case X86::BI__builtin_ia32_vpshrdw128:
4901 case X86::BI__builtin_ia32_vpshrdw256:
4902 case X86::BI__builtin_ia32_vpshrdw512:
4907 return llvm::APIntOps::fshr(Hi, Lo, Amt);
4909 case X86::BI__builtin_ia32_vpconflictsi_128:
4910 case X86::BI__builtin_ia32_vpconflictsi_256:
4911 case X86::BI__builtin_ia32_vpconflictsi_512:
4912 case X86::BI__builtin_ia32_vpconflictdi_128:
4913 case X86::BI__builtin_ia32_vpconflictdi_256:
4914 case X86::BI__builtin_ia32_vpconflictdi_512:
4916 case clang::X86::BI__builtin_ia32_blendpd:
4917 case clang::X86::BI__builtin_ia32_blendpd256:
4918 case clang::X86::BI__builtin_ia32_blendps:
4919 case clang::X86::BI__builtin_ia32_blendps256:
4920 case clang::X86::BI__builtin_ia32_pblendw128:
4921 case clang::X86::BI__builtin_ia32_pblendw256:
4922 case clang::X86::BI__builtin_ia32_pblendd128:
4923 case clang::X86::BI__builtin_ia32_pblendd256:
4925 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
4927 unsigned MaskBit = (ShuffleMask >> (DstIdx % 8)) & 0x1;
4928 unsigned SrcVecIdx = MaskBit ? 1 : 0;
4929 return std::pair<unsigned, int>{SrcVecIdx,
static_cast<int>(DstIdx)};
4934 case clang::X86::BI__builtin_ia32_blendvpd:
4935 case clang::X86::BI__builtin_ia32_blendvpd256:
4936 case clang::X86::BI__builtin_ia32_blendvps:
4937 case clang::X86::BI__builtin_ia32_blendvps256:
4941 llvm::RoundingMode) {
return C.isNegative() ?
T : F; });
4943 case clang::X86::BI__builtin_ia32_pblendvb128:
4944 case clang::X86::BI__builtin_ia32_pblendvb256:
4947 return ((
APInt)
C).isNegative() ?
T : F;
4949 case X86::BI__builtin_ia32_ptestz128:
4950 case X86::BI__builtin_ia32_ptestz256:
4951 case X86::BI__builtin_ia32_vtestzps:
4952 case X86::BI__builtin_ia32_vtestzps256:
4953 case X86::BI__builtin_ia32_vtestzpd:
4954 case X86::BI__builtin_ia32_vtestzpd256:
4957 [](
const APInt &A,
const APInt &B) {
return (A & B) == 0; });
4958 case X86::BI__builtin_ia32_ptestc128:
4959 case X86::BI__builtin_ia32_ptestc256:
4960 case X86::BI__builtin_ia32_vtestcps:
4961 case X86::BI__builtin_ia32_vtestcps256:
4962 case X86::BI__builtin_ia32_vtestcpd:
4963 case X86::BI__builtin_ia32_vtestcpd256:
4966 [](
const APInt &A,
const APInt &B) {
return (~A & B) == 0; });
4967 case X86::BI__builtin_ia32_ptestnzc128:
4968 case X86::BI__builtin_ia32_ptestnzc256:
4969 case X86::BI__builtin_ia32_vtestnzcps:
4970 case X86::BI__builtin_ia32_vtestnzcps256:
4971 case X86::BI__builtin_ia32_vtestnzcpd:
4972 case X86::BI__builtin_ia32_vtestnzcpd256:
4975 return ((A & B) != 0) && ((~A & B) != 0);
4977 case X86::BI__builtin_ia32_selectb_128:
4978 case X86::BI__builtin_ia32_selectb_256:
4979 case X86::BI__builtin_ia32_selectb_512:
4980 case X86::BI__builtin_ia32_selectw_128:
4981 case X86::BI__builtin_ia32_selectw_256:
4982 case X86::BI__builtin_ia32_selectw_512:
4983 case X86::BI__builtin_ia32_selectd_128:
4984 case X86::BI__builtin_ia32_selectd_256:
4985 case X86::BI__builtin_ia32_selectd_512:
4986 case X86::BI__builtin_ia32_selectq_128:
4987 case X86::BI__builtin_ia32_selectq_256:
4988 case X86::BI__builtin_ia32_selectq_512:
4989 case X86::BI__builtin_ia32_selectph_128:
4990 case X86::BI__builtin_ia32_selectph_256:
4991 case X86::BI__builtin_ia32_selectph_512:
4992 case X86::BI__builtin_ia32_selectpbf_128:
4993 case X86::BI__builtin_ia32_selectpbf_256:
4994 case X86::BI__builtin_ia32_selectpbf_512:
4995 case X86::BI__builtin_ia32_selectps_128:
4996 case X86::BI__builtin_ia32_selectps_256:
4997 case X86::BI__builtin_ia32_selectps_512:
4998 case X86::BI__builtin_ia32_selectpd_128:
4999 case X86::BI__builtin_ia32_selectpd_256:
5000 case X86::BI__builtin_ia32_selectpd_512:
5003 case X86::BI__builtin_ia32_shufps:
5004 case X86::BI__builtin_ia32_shufps256:
5005 case X86::BI__builtin_ia32_shufps512:
5007 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5008 unsigned NumElemPerLane = 4;
5009 unsigned NumSelectableElems = NumElemPerLane / 2;
5010 unsigned BitsPerElem = 2;
5011 unsigned IndexMask = 0x3;
5012 unsigned MaskBits = 8;
5013 unsigned Lane = DstIdx / NumElemPerLane;
5014 unsigned ElemInLane = DstIdx % NumElemPerLane;
5015 unsigned LaneOffset = Lane * NumElemPerLane;
5016 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
5017 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5018 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
5019 return std::pair<unsigned, int>{SrcIdx,
5020 static_cast<int>(LaneOffset + Index)};
5022 case X86::BI__builtin_ia32_shufpd:
5023 case X86::BI__builtin_ia32_shufpd256:
5024 case X86::BI__builtin_ia32_shufpd512:
5026 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5027 unsigned NumElemPerLane = 2;
5028 unsigned NumSelectableElems = NumElemPerLane / 2;
5029 unsigned BitsPerElem = 1;
5030 unsigned IndexMask = 0x1;
5031 unsigned MaskBits = 8;
5032 unsigned Lane = DstIdx / NumElemPerLane;
5033 unsigned ElemInLane = DstIdx % NumElemPerLane;
5034 unsigned LaneOffset = Lane * NumElemPerLane;
5035 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
5036 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5037 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
5038 return std::pair<unsigned, int>{SrcIdx,
5039 static_cast<int>(LaneOffset + Index)};
5042 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v16qi:
5043 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v32qi:
5044 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v64qi:
5046 case X86::BI__builtin_ia32_vgf2p8affineqb_v16qi:
5047 case X86::BI__builtin_ia32_vgf2p8affineqb_v32qi:
5048 case X86::BI__builtin_ia32_vgf2p8affineqb_v64qi:
5051 case X86::BI__builtin_ia32_vgf2p8mulb_v16qi:
5052 case X86::BI__builtin_ia32_vgf2p8mulb_v32qi:
5053 case X86::BI__builtin_ia32_vgf2p8mulb_v64qi:
5056 case X86::BI__builtin_ia32_insertps128:
5058 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Mask) {
5060 if ((Mask & (1 << DstIdx)) != 0) {
5061 return std::pair<unsigned, int>{0, -1};
5065 unsigned SrcElem = (Mask >> 6) & 0x3;
5066 unsigned DstElem = (Mask >> 4) & 0x3;
5067 if (DstIdx == DstElem) {
5069 return std::pair<unsigned, int>{1,
static_cast<int>(SrcElem)};
5072 return std::pair<unsigned, int>{0,
static_cast<int>(DstIdx)};
5075 case X86::BI__builtin_ia32_permvarsi256:
5076 case X86::BI__builtin_ia32_permvarsf256:
5077 case X86::BI__builtin_ia32_permvardf512:
5078 case X86::BI__builtin_ia32_permvardi512:
5079 case X86::BI__builtin_ia32_permvarhi128:
5081 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5082 int Offset = ShuffleMask & 0x7;
5083 return std::pair<unsigned, int>{0, Offset};
5085 case X86::BI__builtin_ia32_permvarqi128:
5086 case X86::BI__builtin_ia32_permvarhi256:
5087 case X86::BI__builtin_ia32_permvarsi512:
5088 case X86::BI__builtin_ia32_permvarsf512:
5090 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5091 int Offset = ShuffleMask & 0xF;
5092 return std::pair<unsigned, int>{0, Offset};
5094 case X86::BI__builtin_ia32_permvardi256:
5095 case X86::BI__builtin_ia32_permvardf256:
5097 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5098 int Offset = ShuffleMask & 0x3;
5099 return std::pair<unsigned, int>{0, Offset};
5101 case X86::BI__builtin_ia32_permvarqi256:
5102 case X86::BI__builtin_ia32_permvarhi512:
5104 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5105 int Offset = ShuffleMask & 0x1F;
5106 return std::pair<unsigned, int>{0, Offset};
5108 case X86::BI__builtin_ia32_permvarqi512:
5110 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5111 int Offset = ShuffleMask & 0x3F;
5112 return std::pair<unsigned, int>{0, Offset};
5114 case X86::BI__builtin_ia32_vpermi2varq128:
5115 case X86::BI__builtin_ia32_vpermi2varpd128:
5117 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5118 int Offset = ShuffleMask & 0x1;
5119 unsigned SrcIdx = (ShuffleMask >> 1) & 0x1;
5120 return std::pair<unsigned, int>{SrcIdx, Offset};
5122 case X86::BI__builtin_ia32_vpermi2vard128:
5123 case X86::BI__builtin_ia32_vpermi2varps128:
5124 case X86::BI__builtin_ia32_vpermi2varq256:
5125 case X86::BI__builtin_ia32_vpermi2varpd256:
5127 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5128 int Offset = ShuffleMask & 0x3;
5129 unsigned SrcIdx = (ShuffleMask >> 2) & 0x1;
5130 return std::pair<unsigned, int>{SrcIdx, Offset};
5132 case X86::BI__builtin_ia32_vpermi2varhi128:
5133 case X86::BI__builtin_ia32_vpermi2vard256:
5134 case X86::BI__builtin_ia32_vpermi2varps256:
5135 case X86::BI__builtin_ia32_vpermi2varq512:
5136 case X86::BI__builtin_ia32_vpermi2varpd512:
5138 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5139 int Offset = ShuffleMask & 0x7;
5140 unsigned SrcIdx = (ShuffleMask >> 3) & 0x1;
5141 return std::pair<unsigned, int>{SrcIdx, Offset};
5143 case X86::BI__builtin_ia32_vpermi2varqi128:
5144 case X86::BI__builtin_ia32_vpermi2varhi256:
5145 case X86::BI__builtin_ia32_vpermi2vard512:
5146 case X86::BI__builtin_ia32_vpermi2varps512:
5148 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5149 int Offset = ShuffleMask & 0xF;
5150 unsigned SrcIdx = (ShuffleMask >> 4) & 0x1;
5151 return std::pair<unsigned, int>{SrcIdx, Offset};
5153 case X86::BI__builtin_ia32_vpermi2varqi256:
5154 case X86::BI__builtin_ia32_vpermi2varhi512:
5156 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5157 int Offset = ShuffleMask & 0x1F;
5158 unsigned SrcIdx = (ShuffleMask >> 5) & 0x1;
5159 return std::pair<unsigned, int>{SrcIdx, Offset};
5161 case X86::BI__builtin_ia32_vpermi2varqi512:
5163 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5164 int Offset = ShuffleMask & 0x3F;
5165 unsigned SrcIdx = (ShuffleMask >> 6) & 0x1;
5166 return std::pair<unsigned, int>{SrcIdx, Offset};
5168 case X86::BI__builtin_ia32_pshufb128:
5169 case X86::BI__builtin_ia32_pshufb256:
5170 case X86::BI__builtin_ia32_pshufb512:
5172 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5173 uint8_t Ctlb =
static_cast<uint8_t
>(ShuffleMask);
5175 return std::make_pair(0, -1);
5177 unsigned LaneBase = (DstIdx / 16) * 16;
5178 unsigned SrcOffset = Ctlb & 0x0F;
5179 unsigned SrcIdx = LaneBase + SrcOffset;
5180 return std::make_pair(0,
static_cast<int>(SrcIdx));
5183 case X86::BI__builtin_ia32_pshuflw:
5184 case X86::BI__builtin_ia32_pshuflw256:
5185 case X86::BI__builtin_ia32_pshuflw512:
5187 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5188 unsigned LaneBase = (DstIdx / 8) * 8;
5189 unsigned LaneIdx = DstIdx % 8;
5191 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
5192 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
5195 return std::make_pair(0,
static_cast<int>(DstIdx));
5198 case X86::BI__builtin_ia32_pshufhw:
5199 case X86::BI__builtin_ia32_pshufhw256:
5200 case X86::BI__builtin_ia32_pshufhw512:
5202 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5203 unsigned LaneBase = (DstIdx / 8) * 8;
5204 unsigned LaneIdx = DstIdx % 8;
5206 unsigned Sel = (ShuffleMask >> (2 * (LaneIdx - 4))) & 0x3;
5207 return std::make_pair(0,
static_cast<int>(LaneBase + 4 + Sel));
5210 return std::make_pair(0,
static_cast<int>(DstIdx));
5213 case X86::BI__builtin_ia32_pshufd:
5214 case X86::BI__builtin_ia32_pshufd256:
5215 case X86::BI__builtin_ia32_pshufd512:
5216 case X86::BI__builtin_ia32_vpermilps:
5217 case X86::BI__builtin_ia32_vpermilps256:
5218 case X86::BI__builtin_ia32_vpermilps512:
5220 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5221 unsigned LaneBase = (DstIdx / 4) * 4;
5222 unsigned LaneIdx = DstIdx % 4;
5223 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
5224 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
5227 case X86::BI__builtin_ia32_vpermilvarpd:
5228 case X86::BI__builtin_ia32_vpermilvarpd256:
5229 case X86::BI__builtin_ia32_vpermilvarpd512:
5231 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5232 unsigned NumElemPerLane = 2;
5233 unsigned Lane = DstIdx / NumElemPerLane;
5234 unsigned Offset = ShuffleMask & 0b10 ? 1 : 0;
5235 return std::make_pair(
5236 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
5239 case X86::BI__builtin_ia32_vpermilvarps:
5240 case X86::BI__builtin_ia32_vpermilvarps256:
5241 case X86::BI__builtin_ia32_vpermilvarps512:
5243 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5244 unsigned NumElemPerLane = 4;
5245 unsigned Lane = DstIdx / NumElemPerLane;
5246 unsigned Offset = ShuffleMask & 0b11;
5247 return std::make_pair(
5248 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
5251 case X86::BI__builtin_ia32_vpermilpd:
5252 case X86::BI__builtin_ia32_vpermilpd256:
5253 case X86::BI__builtin_ia32_vpermilpd512:
5255 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Control) {
5256 unsigned NumElemPerLane = 2;
5257 unsigned BitsPerElem = 1;
5258 unsigned MaskBits = 8;
5259 unsigned IndexMask = 0x1;
5260 unsigned Lane = DstIdx / NumElemPerLane;
5261 unsigned LaneOffset = Lane * NumElemPerLane;
5262 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5263 unsigned Index = (Control >> BitIndex) & IndexMask;
5264 return std::make_pair(0,
static_cast<int>(LaneOffset + Index));
5267 case X86::BI__builtin_ia32_permdf256:
5268 case X86::BI__builtin_ia32_permdi256:
5270 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Control) {
5273 unsigned Index = (Control >> (2 * DstIdx)) & 0x3;
5274 return std::make_pair(0,
static_cast<int>(Index));
5277 case X86::BI__builtin_ia32_vpmultishiftqb128:
5278 case X86::BI__builtin_ia32_vpmultishiftqb256:
5279 case X86::BI__builtin_ia32_vpmultishiftqb512:
5281 case X86::BI__builtin_ia32_kandqi:
5282 case X86::BI__builtin_ia32_kandhi:
5283 case X86::BI__builtin_ia32_kandsi:
5284 case X86::BI__builtin_ia32_kanddi:
5287 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS & RHS; });
5289 case X86::BI__builtin_ia32_kandnqi:
5290 case X86::BI__builtin_ia32_kandnhi:
5291 case X86::BI__builtin_ia32_kandnsi:
5292 case X86::BI__builtin_ia32_kandndi:
5295 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~LHS & RHS; });
5297 case X86::BI__builtin_ia32_korqi:
5298 case X86::BI__builtin_ia32_korhi:
5299 case X86::BI__builtin_ia32_korsi:
5300 case X86::BI__builtin_ia32_kordi:
5303 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS | RHS; });
5305 case X86::BI__builtin_ia32_kxnorqi:
5306 case X86::BI__builtin_ia32_kxnorhi:
5307 case X86::BI__builtin_ia32_kxnorsi:
5308 case X86::BI__builtin_ia32_kxnordi:
5311 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~(LHS ^ RHS); });
5313 case X86::BI__builtin_ia32_kxorqi:
5314 case X86::BI__builtin_ia32_kxorhi:
5315 case X86::BI__builtin_ia32_kxorsi:
5316 case X86::BI__builtin_ia32_kxordi:
5319 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS ^ RHS; });
5321 case X86::BI__builtin_ia32_knotqi:
5322 case X86::BI__builtin_ia32_knothi:
5323 case X86::BI__builtin_ia32_knotsi:
5324 case X86::BI__builtin_ia32_knotdi:
5326 S, OpPC,
Call, [](
const APSInt &Src) {
return ~Src; });
5328 case X86::BI__builtin_ia32_kaddqi:
5329 case X86::BI__builtin_ia32_kaddhi:
5330 case X86::BI__builtin_ia32_kaddsi:
5331 case X86::BI__builtin_ia32_kadddi:
5334 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
5336 case X86::BI__builtin_ia32_kmovb:
5337 case X86::BI__builtin_ia32_kmovw:
5338 case X86::BI__builtin_ia32_kmovd:
5339 case X86::BI__builtin_ia32_kmovq:
5341 S, OpPC,
Call, [](
const APSInt &Src) {
return Src; });
5343 case X86::BI__builtin_ia32_kunpckhi:
5344 case X86::BI__builtin_ia32_kunpckdi:
5345 case X86::BI__builtin_ia32_kunpcksi:
5350 unsigned BW = A.getBitWidth();
5351 return APSInt(A.trunc(BW / 2).concat(B.trunc(BW / 2)),
5355 case X86::BI__builtin_ia32_phminposuw128:
5358 case X86::BI__builtin_ia32_psraq128:
5359 case X86::BI__builtin_ia32_psraq256:
5360 case X86::BI__builtin_ia32_psraq512:
5361 case X86::BI__builtin_ia32_psrad128:
5362 case X86::BI__builtin_ia32_psrad256:
5363 case X86::BI__builtin_ia32_psrad512:
5364 case X86::BI__builtin_ia32_psraw128:
5365 case X86::BI__builtin_ia32_psraw256:
5366 case X86::BI__builtin_ia32_psraw512:
5369 [](
const APInt &Elt, uint64_t Count) {
return Elt.ashr(Count); },
5370 [](
const APInt &Elt,
unsigned Width) {
return Elt.ashr(Width - 1); });
5372 case X86::BI__builtin_ia32_psllq128:
5373 case X86::BI__builtin_ia32_psllq256:
5374 case X86::BI__builtin_ia32_psllq512:
5375 case X86::BI__builtin_ia32_pslld128:
5376 case X86::BI__builtin_ia32_pslld256:
5377 case X86::BI__builtin_ia32_pslld512:
5378 case X86::BI__builtin_ia32_psllw128:
5379 case X86::BI__builtin_ia32_psllw256:
5380 case X86::BI__builtin_ia32_psllw512:
5383 [](
const APInt &Elt, uint64_t Count) {
return Elt.shl(Count); },
5384 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
5386 case X86::BI__builtin_ia32_psrlq128:
5387 case X86::BI__builtin_ia32_psrlq256:
5388 case X86::BI__builtin_ia32_psrlq512:
5389 case X86::BI__builtin_ia32_psrld128:
5390 case X86::BI__builtin_ia32_psrld256:
5391 case X86::BI__builtin_ia32_psrld512:
5392 case X86::BI__builtin_ia32_psrlw128:
5393 case X86::BI__builtin_ia32_psrlw256:
5394 case X86::BI__builtin_ia32_psrlw512:
5397 [](
const APInt &Elt, uint64_t Count) {
return Elt.lshr(Count); },
5398 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
5400 case X86::BI__builtin_ia32_pternlogd128_mask:
5401 case X86::BI__builtin_ia32_pternlogd256_mask:
5402 case X86::BI__builtin_ia32_pternlogd512_mask:
5403 case X86::BI__builtin_ia32_pternlogq128_mask:
5404 case X86::BI__builtin_ia32_pternlogq256_mask:
5405 case X86::BI__builtin_ia32_pternlogq512_mask:
5407 case X86::BI__builtin_ia32_pternlogd128_maskz:
5408 case X86::BI__builtin_ia32_pternlogd256_maskz:
5409 case X86::BI__builtin_ia32_pternlogd512_maskz:
5410 case X86::BI__builtin_ia32_pternlogq128_maskz:
5411 case X86::BI__builtin_ia32_pternlogq256_maskz:
5412 case X86::BI__builtin_ia32_pternlogq512_maskz:
5414 case Builtin::BI__builtin_elementwise_fshl:
5416 llvm::APIntOps::fshl);
5417 case Builtin::BI__builtin_elementwise_fshr:
5419 llvm::APIntOps::fshr);
5421 case X86::BI__builtin_ia32_shuf_f32x4_256:
5422 case X86::BI__builtin_ia32_shuf_i32x4_256:
5423 case X86::BI__builtin_ia32_shuf_f64x2_256:
5424 case X86::BI__builtin_ia32_shuf_i64x2_256:
5425 case X86::BI__builtin_ia32_shuf_f32x4:
5426 case X86::BI__builtin_ia32_shuf_i32x4:
5427 case X86::BI__builtin_ia32_shuf_f64x2:
5428 case X86::BI__builtin_ia32_shuf_i64x2: {
5434 unsigned LaneBits = 128u;
5435 unsigned NumLanes = (NumElems * ElemBits) / LaneBits;
5436 unsigned NumElemsPerLane = LaneBits / ElemBits;
5440 [NumLanes, NumElemsPerLane](
unsigned DstIdx,
unsigned ShuffleMask) {
5442 unsigned BitsPerElem = NumLanes / 2;
5443 unsigned IndexMask = (1u << BitsPerElem) - 1;
5444 unsigned Lane = DstIdx / NumElemsPerLane;
5445 unsigned SrcIdx = (Lane < NumLanes / 2) ? 0 : 1;
5446 unsigned BitIdx = BitsPerElem * Lane;
5447 unsigned SrcLaneIdx = (ShuffleMask >> BitIdx) & IndexMask;
5448 unsigned ElemInLane = DstIdx % NumElemsPerLane;
5449 unsigned IdxToPick = SrcLaneIdx * NumElemsPerLane + ElemInLane;
5450 return std::pair<unsigned, int>{SrcIdx, IdxToPick};
5454 case X86::BI__builtin_ia32_insertf32x4_256:
5455 case X86::BI__builtin_ia32_inserti32x4_256:
5456 case X86::BI__builtin_ia32_insertf64x2_256:
5457 case X86::BI__builtin_ia32_inserti64x2_256:
5458 case X86::BI__builtin_ia32_insertf32x4:
5459 case X86::BI__builtin_ia32_inserti32x4:
5460 case X86::BI__builtin_ia32_insertf64x2_512:
5461 case X86::BI__builtin_ia32_inserti64x2_512:
5462 case X86::BI__builtin_ia32_insertf32x8:
5463 case X86::BI__builtin_ia32_inserti32x8:
5464 case X86::BI__builtin_ia32_insertf64x4:
5465 case X86::BI__builtin_ia32_inserti64x4:
5466 case X86::BI__builtin_ia32_vinsertf128_ps256:
5467 case X86::BI__builtin_ia32_vinsertf128_pd256:
5468 case X86::BI__builtin_ia32_vinsertf128_si256:
5469 case X86::BI__builtin_ia32_insert128i256:
5472 case clang::X86::BI__builtin_ia32_vcvtps2ph:
5473 case clang::X86::BI__builtin_ia32_vcvtps2ph256:
5476 case X86::BI__builtin_ia32_vec_ext_v4hi:
5477 case X86::BI__builtin_ia32_vec_ext_v16qi:
5478 case X86::BI__builtin_ia32_vec_ext_v8hi:
5479 case X86::BI__builtin_ia32_vec_ext_v4si:
5480 case X86::BI__builtin_ia32_vec_ext_v2di:
5481 case X86::BI__builtin_ia32_vec_ext_v32qi:
5482 case X86::BI__builtin_ia32_vec_ext_v16hi:
5483 case X86::BI__builtin_ia32_vec_ext_v8si:
5484 case X86::BI__builtin_ia32_vec_ext_v4di:
5485 case X86::BI__builtin_ia32_vec_ext_v4sf:
5488 case X86::BI__builtin_ia32_vec_set_v4hi:
5489 case X86::BI__builtin_ia32_vec_set_v16qi:
5490 case X86::BI__builtin_ia32_vec_set_v8hi:
5491 case X86::BI__builtin_ia32_vec_set_v4si:
5492 case X86::BI__builtin_ia32_vec_set_v2di:
5493 case X86::BI__builtin_ia32_vec_set_v32qi:
5494 case X86::BI__builtin_ia32_vec_set_v16hi:
5495 case X86::BI__builtin_ia32_vec_set_v8si:
5496 case X86::BI__builtin_ia32_vec_set_v4di:
5499 case X86::BI__builtin_ia32_cvtb2mask128:
5500 case X86::BI__builtin_ia32_cvtb2mask256:
5501 case X86::BI__builtin_ia32_cvtb2mask512:
5502 case X86::BI__builtin_ia32_cvtw2mask128:
5503 case X86::BI__builtin_ia32_cvtw2mask256:
5504 case X86::BI__builtin_ia32_cvtw2mask512:
5505 case X86::BI__builtin_ia32_cvtd2mask128:
5506 case X86::BI__builtin_ia32_cvtd2mask256:
5507 case X86::BI__builtin_ia32_cvtd2mask512:
5508 case X86::BI__builtin_ia32_cvtq2mask128:
5509 case X86::BI__builtin_ia32_cvtq2mask256:
5510 case X86::BI__builtin_ia32_cvtq2mask512:
5513 case X86::BI__builtin_ia32_cvtsd2ss:
5516 case X86::BI__builtin_ia32_cvtsd2ss_round_mask:
5519 case X86::BI__builtin_ia32_cvtpd2ps:
5520 case X86::BI__builtin_ia32_cvtpd2ps256:
5522 case X86::BI__builtin_ia32_cvtpd2ps_mask:
5524 case X86::BI__builtin_ia32_cvtpd2ps512_mask:
5527 case X86::BI__builtin_ia32_cmpb128_mask:
5528 case X86::BI__builtin_ia32_cmpw128_mask:
5529 case X86::BI__builtin_ia32_cmpd128_mask:
5530 case X86::BI__builtin_ia32_cmpq128_mask:
5531 case X86::BI__builtin_ia32_cmpb256_mask:
5532 case X86::BI__builtin_ia32_cmpw256_mask:
5533 case X86::BI__builtin_ia32_cmpd256_mask:
5534 case X86::BI__builtin_ia32_cmpq256_mask:
5535 case X86::BI__builtin_ia32_cmpb512_mask:
5536 case X86::BI__builtin_ia32_cmpw512_mask:
5537 case X86::BI__builtin_ia32_cmpd512_mask:
5538 case X86::BI__builtin_ia32_cmpq512_mask:
5542 case X86::BI__builtin_ia32_ucmpb128_mask:
5543 case X86::BI__builtin_ia32_ucmpw128_mask:
5544 case X86::BI__builtin_ia32_ucmpd128_mask:
5545 case X86::BI__builtin_ia32_ucmpq128_mask:
5546 case X86::BI__builtin_ia32_ucmpb256_mask:
5547 case X86::BI__builtin_ia32_ucmpw256_mask:
5548 case X86::BI__builtin_ia32_ucmpd256_mask:
5549 case X86::BI__builtin_ia32_ucmpq256_mask:
5550 case X86::BI__builtin_ia32_ucmpb512_mask:
5551 case X86::BI__builtin_ia32_ucmpw512_mask:
5552 case X86::BI__builtin_ia32_ucmpd512_mask:
5553 case X86::BI__builtin_ia32_ucmpq512_mask:
5557 case X86::BI__builtin_ia32_vpshufbitqmb128_mask:
5558 case X86::BI__builtin_ia32_vpshufbitqmb256_mask:
5559 case X86::BI__builtin_ia32_vpshufbitqmb512_mask:
5562 case X86::BI__builtin_ia32_pslldqi128_byteshift:
5563 case X86::BI__builtin_ia32_pslldqi256_byteshift:
5564 case X86::BI__builtin_ia32_pslldqi512_byteshift:
5571 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
5572 unsigned LaneBase = (DstIdx / 16) * 16;
5573 unsigned LaneIdx = DstIdx % 16;
5574 if (LaneIdx < Shift)
5575 return std::make_pair(0, -1);
5577 return std::make_pair(0,
5578 static_cast<int>(LaneBase + LaneIdx - Shift));
5581 case X86::BI__builtin_ia32_psrldqi128_byteshift:
5582 case X86::BI__builtin_ia32_psrldqi256_byteshift:
5583 case X86::BI__builtin_ia32_psrldqi512_byteshift:
5590 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
5591 unsigned LaneBase = (DstIdx / 16) * 16;
5592 unsigned LaneIdx = DstIdx % 16;
5593 if (LaneIdx + Shift < 16)
5594 return std::make_pair(0,
5595 static_cast<int>(LaneBase + LaneIdx + Shift));
5597 return std::make_pair(0, -1);
5600 case X86::BI__builtin_ia32_palignr128:
5601 case X86::BI__builtin_ia32_palignr256:
5602 case X86::BI__builtin_ia32_palignr512:
5604 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Shift) {
5606 unsigned VecIdx = 1;
5609 int Lane = DstIdx / 16;
5610 int Offset = DstIdx % 16;
5613 unsigned ShiftedIdx = Offset + (Shift & 0xFF);
5614 if (ShiftedIdx < 16) {
5615 ElemIdx = ShiftedIdx + (Lane * 16);
5616 }
else if (ShiftedIdx < 32) {
5618 ElemIdx = (ShiftedIdx - 16) + (Lane * 16);
5621 return std::pair<unsigned, int>{VecIdx, ElemIdx};
5624 case X86::BI__builtin_ia32_alignd128:
5625 case X86::BI__builtin_ia32_alignd256:
5626 case X86::BI__builtin_ia32_alignd512:
5627 case X86::BI__builtin_ia32_alignq128:
5628 case X86::BI__builtin_ia32_alignq256:
5629 case X86::BI__builtin_ia32_alignq512: {
5630 unsigned NumElems =
Call->getType()->castAs<
VectorType>()->getNumElements();
5632 S, OpPC,
Call, [NumElems](
unsigned DstIdx,
unsigned Shift) {
5633 unsigned Imm = Shift & 0xFF;
5634 unsigned EffectiveShift = Imm & (NumElems - 1);
5635 unsigned SourcePos = DstIdx + EffectiveShift;
5636 unsigned VecIdx = SourcePos < NumElems ? 1u : 0u;
5637 unsigned ElemIdx = SourcePos & (NumElems - 1);
5638 return std::pair<unsigned, int>{VecIdx,
static_cast<int>(ElemIdx)};
5644 diag::note_invalid_subexpr_in_const_expr)
5650 llvm_unreachable(
"Unhandled builtin ID");