clang 18.0.0git
ARM.cpp
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1//===- ARM.cpp ------------------------------------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#include "ABIInfoImpl.h"
10#include "TargetInfo.h"
11
12using namespace clang;
13using namespace clang::CodeGen;
14
15//===----------------------------------------------------------------------===//
16// ARM ABI Implementation
17//===----------------------------------------------------------------------===//
18
19namespace {
20
21class ARMABIInfo : public ABIInfo {
23 bool IsFloatABISoftFP;
24
25public:
26 ARMABIInfo(CodeGenTypes &CGT, ARMABIKind Kind) : ABIInfo(CGT), Kind(Kind) {
27 setCCs();
28 IsFloatABISoftFP = CGT.getCodeGenOpts().FloatABI == "softfp" ||
29 CGT.getCodeGenOpts().FloatABI == ""; // default
30 }
31
32 bool isEABI() const {
33 switch (getTarget().getTriple().getEnvironment()) {
34 case llvm::Triple::Android:
35 case llvm::Triple::EABI:
36 case llvm::Triple::EABIHF:
37 case llvm::Triple::GNUEABI:
38 case llvm::Triple::GNUEABIHF:
39 case llvm::Triple::MuslEABI:
40 case llvm::Triple::MuslEABIHF:
41 return true;
42 default:
43 return getTarget().getTriple().isOHOSFamily();
44 }
45 }
46
47 bool isEABIHF() const {
48 switch (getTarget().getTriple().getEnvironment()) {
49 case llvm::Triple::EABIHF:
50 case llvm::Triple::GNUEABIHF:
51 case llvm::Triple::MuslEABIHF:
52 return true;
53 default:
54 return false;
55 }
56 }
57
58 ARMABIKind getABIKind() const { return Kind; }
59
60 bool allowBFloatArgsAndRet() const override {
61 return !IsFloatABISoftFP && getTarget().hasBFloat16Type();
62 }
63
64private:
65 ABIArgInfo classifyReturnType(QualType RetTy, bool isVariadic,
66 unsigned functionCallConv) const;
67 ABIArgInfo classifyArgumentType(QualType RetTy, bool isVariadic,
68 unsigned functionCallConv) const;
69 ABIArgInfo classifyHomogeneousAggregate(QualType Ty, const Type *Base,
70 uint64_t Members) const;
71 ABIArgInfo coerceIllegalVector(QualType Ty) const;
72 bool isIllegalVectorType(QualType Ty) const;
73 bool containsAnyFP16Vectors(QualType Ty) const;
74
75 bool isHomogeneousAggregateBaseType(QualType Ty) const override;
77 uint64_t Members) const override;
79
80 bool isEffectivelyAAPCS_VFP(unsigned callConvention, bool acceptHalf) const;
81
82 void computeInfo(CGFunctionInfo &FI) const override;
83
85 QualType Ty) const override;
86
87 llvm::CallingConv::ID getLLVMDefaultCC() const;
88 llvm::CallingConv::ID getABIDefaultCC() const;
89 void setCCs();
90};
91
92class ARMSwiftABIInfo : public SwiftABIInfo {
93public:
94 explicit ARMSwiftABIInfo(CodeGenTypes &CGT)
95 : SwiftABIInfo(CGT, /*SwiftErrorInRegister=*/true) {}
96
97 bool isLegalVectorType(CharUnits VectorSize, llvm::Type *EltTy,
98 unsigned NumElts) const override;
99};
100
101class ARMTargetCodeGenInfo : public TargetCodeGenInfo {
102public:
103 ARMTargetCodeGenInfo(CodeGenTypes &CGT, ARMABIKind K)
104 : TargetCodeGenInfo(std::make_unique<ARMABIInfo>(CGT, K)) {
105 SwiftInfo = std::make_unique<ARMSwiftABIInfo>(CGT);
106 }
107
108 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const override {
109 return 13;
110 }
111
112 StringRef getARCRetainAutoreleasedReturnValueMarker() const override {
113 return "mov\tr7, r7\t\t// marker for objc_retainAutoreleaseReturnValue";
114 }
115
117 llvm::Value *Address) const override {
118 llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4);
119
120 // 0-15 are the 16 integer registers.
121 AssignToArrayRange(CGF.Builder, Address, Four8, 0, 15);
122 return false;
123 }
124
125 unsigned getSizeOfUnwindException() const override {
126 if (getABIInfo<ARMABIInfo>().isEABI())
127 return 88;
129 }
130
131 void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
132 CodeGen::CodeGenModule &CGM) const override {
133 if (GV->isDeclaration())
134 return;
135 const FunctionDecl *FD = dyn_cast_or_null<FunctionDecl>(D);
136 if (!FD)
137 return;
138 auto *Fn = cast<llvm::Function>(GV);
139
140 if (const auto *TA = FD->getAttr<TargetAttr>()) {
142 CGM.getTarget().parseTargetAttr(TA->getFeaturesStr());
143 if (!Attr.BranchProtection.empty()) {
145 StringRef DiagMsg;
146 StringRef Arch =
147 Attr.CPU.empty() ? CGM.getTarget().getTargetOpts().CPU : Attr.CPU;
148 if (!CGM.getTarget().validateBranchProtection(Attr.BranchProtection,
149 Arch, BPI, DiagMsg)) {
150 CGM.getDiags().Report(
151 D->getLocation(),
152 diag::warn_target_unsupported_branch_protection_attribute)
153 << Arch;
154 } else {
155 static const char *SignReturnAddrStr[] = {"none", "non-leaf", "all"};
156 assert(static_cast<unsigned>(BPI.SignReturnAddr) <= 2 &&
157 "Unexpected SignReturnAddressScopeKind");
158 Fn->addFnAttr(
159 "sign-return-address",
160 SignReturnAddrStr[static_cast<int>(BPI.SignReturnAddr)]);
161
162 Fn->addFnAttr("branch-target-enforcement",
163 BPI.BranchTargetEnforcement ? "true" : "false");
164 }
165 } else if (CGM.getLangOpts().BranchTargetEnforcement ||
167 // If the Branch Protection attribute is missing, validate the target
168 // Architecture attribute against Branch Protection command line
169 // settings.
171 CGM.getDiags().Report(
172 D->getLocation(),
173 diag::warn_target_unsupported_branch_protection_attribute)
174 << Attr.CPU;
175 }
176 }
177
178 const ARMInterruptAttr *Attr = FD->getAttr<ARMInterruptAttr>();
179 if (!Attr)
180 return;
181
182 const char *Kind;
183 switch (Attr->getInterrupt()) {
184 case ARMInterruptAttr::Generic: Kind = ""; break;
185 case ARMInterruptAttr::IRQ: Kind = "IRQ"; break;
186 case ARMInterruptAttr::FIQ: Kind = "FIQ"; break;
187 case ARMInterruptAttr::SWI: Kind = "SWI"; break;
188 case ARMInterruptAttr::ABORT: Kind = "ABORT"; break;
189 case ARMInterruptAttr::UNDEF: Kind = "UNDEF"; break;
190 }
191
192 Fn->addFnAttr("interrupt", Kind);
193
194 ARMABIKind ABI = getABIInfo<ARMABIInfo>().getABIKind();
195 if (ABI == ARMABIKind::APCS)
196 return;
197
198 // AAPCS guarantees that sp will be 8-byte aligned on any public interface,
199 // however this is not necessarily true on taking any interrupt. Instruct
200 // the backend to perform a realignment as part of the function prologue.
201 llvm::AttrBuilder B(Fn->getContext());
202 B.addStackAlignmentAttr(8);
203 Fn->addFnAttrs(B);
204 }
205};
206
207class WindowsARMTargetCodeGenInfo : public ARMTargetCodeGenInfo {
208public:
209 WindowsARMTargetCodeGenInfo(CodeGenTypes &CGT, ARMABIKind K)
210 : ARMTargetCodeGenInfo(CGT, K) {}
211
212 void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
213 CodeGen::CodeGenModule &CGM) const override;
214
215 void getDependentLibraryOption(llvm::StringRef Lib,
216 llvm::SmallString<24> &Opt) const override {
217 Opt = "/DEFAULTLIB:" + qualifyWindowsLibrary(Lib);
218 }
219
220 void getDetectMismatchOption(llvm::StringRef Name, llvm::StringRef Value,
221 llvm::SmallString<32> &Opt) const override {
222 Opt = "/FAILIFMISMATCH:\"" + Name.str() + "=" + Value.str() + "\"";
223 }
224};
225
226void WindowsARMTargetCodeGenInfo::setTargetAttributes(
227 const Decl *D, llvm::GlobalValue *GV, CodeGen::CodeGenModule &CGM) const {
228 ARMTargetCodeGenInfo::setTargetAttributes(D, GV, CGM);
229 if (GV->isDeclaration())
230 return;
231 addStackProbeTargetAttributes(D, GV, CGM);
232}
233}
234
235void ARMABIInfo::computeInfo(CGFunctionInfo &FI) const {
236 if (!::classifyReturnType(getCXXABI(), FI, *this))
239
240 for (auto &I : FI.arguments())
241 I.info = classifyArgumentType(I.type, FI.isVariadic(),
243
244
245 // Always honor user-specified calling convention.
246 if (FI.getCallingConvention() != llvm::CallingConv::C)
247 return;
248
249 llvm::CallingConv::ID cc = getRuntimeCC();
250 if (cc != llvm::CallingConv::C)
252}
253
254/// Return the default calling convention that LLVM will use.
255llvm::CallingConv::ID ARMABIInfo::getLLVMDefaultCC() const {
256 // The default calling convention that LLVM will infer.
257 if (isEABIHF() || getTarget().getTriple().isWatchABI())
258 return llvm::CallingConv::ARM_AAPCS_VFP;
259 else if (isEABI())
260 return llvm::CallingConv::ARM_AAPCS;
261 else
262 return llvm::CallingConv::ARM_APCS;
263}
264
265/// Return the calling convention that our ABI would like us to use
266/// as the C calling convention.
267llvm::CallingConv::ID ARMABIInfo::getABIDefaultCC() const {
268 switch (getABIKind()) {
269 case ARMABIKind::APCS:
270 return llvm::CallingConv::ARM_APCS;
271 case ARMABIKind::AAPCS:
272 return llvm::CallingConv::ARM_AAPCS;
273 case ARMABIKind::AAPCS_VFP:
274 return llvm::CallingConv::ARM_AAPCS_VFP;
275 case ARMABIKind::AAPCS16_VFP:
276 return llvm::CallingConv::ARM_AAPCS_VFP;
277 }
278 llvm_unreachable("bad ABI kind");
279}
280
281void ARMABIInfo::setCCs() {
282 assert(getRuntimeCC() == llvm::CallingConv::C);
283
284 // Don't muddy up the IR with a ton of explicit annotations if
285 // they'd just match what LLVM will infer from the triple.
286 llvm::CallingConv::ID abiCC = getABIDefaultCC();
287 if (abiCC != getLLVMDefaultCC())
288 RuntimeCC = abiCC;
289}
290
291ABIArgInfo ARMABIInfo::coerceIllegalVector(QualType Ty) const {
292 uint64_t Size = getContext().getTypeSize(Ty);
293 if (Size <= 32) {
294 llvm::Type *ResType =
295 llvm::Type::getInt32Ty(getVMContext());
296 return ABIArgInfo::getDirect(ResType);
297 }
298 if (Size == 64 || Size == 128) {
299 auto *ResType = llvm::FixedVectorType::get(
300 llvm::Type::getInt32Ty(getVMContext()), Size / 32);
301 return ABIArgInfo::getDirect(ResType);
302 }
303 return getNaturalAlignIndirect(Ty, /*ByVal=*/false);
304}
305
306ABIArgInfo ARMABIInfo::classifyHomogeneousAggregate(QualType Ty,
307 const Type *Base,
308 uint64_t Members) const {
309 assert(Base && "Base class should be set for homogeneous aggregate");
310 // Base can be a floating-point or a vector.
311 if (const VectorType *VT = Base->getAs<VectorType>()) {
312 // FP16 vectors should be converted to integer vectors
313 if (!getTarget().hasLegalHalfType() && containsAnyFP16Vectors(Ty)) {
314 uint64_t Size = getContext().getTypeSize(VT);
315 auto *NewVecTy = llvm::FixedVectorType::get(
316 llvm::Type::getInt32Ty(getVMContext()), Size / 32);
317 llvm::Type *Ty = llvm::ArrayType::get(NewVecTy, Members);
318 return ABIArgInfo::getDirect(Ty, 0, nullptr, false);
319 }
320 }
321 unsigned Align = 0;
322 if (getABIKind() == ARMABIKind::AAPCS ||
323 getABIKind() == ARMABIKind::AAPCS_VFP) {
324 // For alignment adjusted HFAs, cap the argument alignment to 8, leave it
325 // default otherwise.
326 Align = getContext().getTypeUnadjustedAlignInChars(Ty).getQuantity();
327 unsigned BaseAlign = getContext().getTypeAlignInChars(Base).getQuantity();
328 Align = (Align > BaseAlign && Align >= 8) ? 8 : 0;
329 }
330 return ABIArgInfo::getDirect(nullptr, 0, nullptr, false, Align);
331}
332
333ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty, bool isVariadic,
334 unsigned functionCallConv) const {
335 // 6.1.2.1 The following argument types are VFP CPRCs:
336 // A single-precision floating-point type (including promoted
337 // half-precision types); A double-precision floating-point type;
338 // A 64-bit or 128-bit containerized vector type; Homogeneous Aggregate
339 // with a Base Type of a single- or double-precision floating-point type,
340 // 64-bit containerized vectors or 128-bit containerized vectors with one
341 // to four Elements.
342 // Variadic functions should always marshal to the base standard.
343 bool IsAAPCS_VFP =
344 !isVariadic && isEffectivelyAAPCS_VFP(functionCallConv, /* AAPCS16 */ false);
345
347
348 // Handle illegal vector types here.
349 if (isIllegalVectorType(Ty))
350 return coerceIllegalVector(Ty);
351
352 if (!isAggregateTypeForABI(Ty)) {
353 // Treat an enum type as its underlying type.
354 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) {
355 Ty = EnumTy->getDecl()->getIntegerType();
356 }
357
358 if (const auto *EIT = Ty->getAs<BitIntType>())
359 if (EIT->getNumBits() > 64)
360 return getNaturalAlignIndirect(Ty, /*ByVal=*/true);
361
362 return (isPromotableIntegerTypeForABI(Ty) ? ABIArgInfo::getExtend(Ty)
364 }
365
366 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI())) {
367 return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory);
368 }
369
370 // Ignore empty records.
371 if (isEmptyRecord(getContext(), Ty, true))
372 return ABIArgInfo::getIgnore();
373
374 if (IsAAPCS_VFP) {
375 // Homogeneous Aggregates need to be expanded when we can fit the aggregate
376 // into VFP registers.
377 const Type *Base = nullptr;
378 uint64_t Members = 0;
379 if (isHomogeneousAggregate(Ty, Base, Members))
380 return classifyHomogeneousAggregate(Ty, Base, Members);
381 } else if (getABIKind() == ARMABIKind::AAPCS16_VFP) {
382 // WatchOS does have homogeneous aggregates. Note that we intentionally use
383 // this convention even for a variadic function: the backend will use GPRs
384 // if needed.
385 const Type *Base = nullptr;
386 uint64_t Members = 0;
387 if (isHomogeneousAggregate(Ty, Base, Members)) {
388 assert(Base && Members <= 4 && "unexpected homogeneous aggregate");
389 llvm::Type *Ty =
390 llvm::ArrayType::get(CGT.ConvertType(QualType(Base, 0)), Members);
391 return ABIArgInfo::getDirect(Ty, 0, nullptr, false);
392 }
393 }
394
395 if (getABIKind() == ARMABIKind::AAPCS16_VFP &&
396 getContext().getTypeSizeInChars(Ty) > CharUnits::fromQuantity(16)) {
397 // WatchOS is adopting the 64-bit AAPCS rule on composite types: if they're
398 // bigger than 128-bits, they get placed in space allocated by the caller,
399 // and a pointer is passed.
401 CharUnits::fromQuantity(getContext().getTypeAlign(Ty) / 8), false);
402 }
403
404 // Support byval for ARM.
405 // The ABI alignment for APCS is 4-byte and for AAPCS at least 4-byte and at
406 // most 8-byte. We realign the indirect argument if type alignment is bigger
407 // than ABI alignment.
408 uint64_t ABIAlign = 4;
409 uint64_t TyAlign;
410 if (getABIKind() == ARMABIKind::AAPCS_VFP ||
411 getABIKind() == ARMABIKind::AAPCS) {
412 TyAlign = getContext().getTypeUnadjustedAlignInChars(Ty).getQuantity();
413 ABIAlign = std::clamp(TyAlign, (uint64_t)4, (uint64_t)8);
414 } else {
415 TyAlign = getContext().getTypeAlignInChars(Ty).getQuantity();
416 }
417 if (getContext().getTypeSizeInChars(Ty) > CharUnits::fromQuantity(64)) {
418 assert(getABIKind() != ARMABIKind::AAPCS16_VFP && "unexpected byval");
420 /*ByVal=*/true,
421 /*Realign=*/TyAlign > ABIAlign);
422 }
423
424 // On RenderScript, coerce Aggregates <= 64 bytes to an integer array of
425 // same size and alignment.
426 if (getTarget().isRenderScriptTarget()) {
427 return coerceToIntArray(Ty, getContext(), getVMContext());
428 }
429
430 // Otherwise, pass by coercing to a structure of the appropriate size.
431 llvm::Type* ElemTy;
432 unsigned SizeRegs;
433 // FIXME: Try to match the types of the arguments more accurately where
434 // we can.
435 if (TyAlign <= 4) {
436 ElemTy = llvm::Type::getInt32Ty(getVMContext());
437 SizeRegs = (getContext().getTypeSize(Ty) + 31) / 32;
438 } else {
439 ElemTy = llvm::Type::getInt64Ty(getVMContext());
440 SizeRegs = (getContext().getTypeSize(Ty) + 63) / 64;
441 }
442
443 return ABIArgInfo::getDirect(llvm::ArrayType::get(ElemTy, SizeRegs));
444}
445
446static bool isIntegerLikeType(QualType Ty, ASTContext &Context,
447 llvm::LLVMContext &VMContext) {
448 // APCS, C Language Calling Conventions, Non-Simple Return Values: A structure
449 // is called integer-like if its size is less than or equal to one word, and
450 // the offset of each of its addressable sub-fields is zero.
451
452 uint64_t Size = Context.getTypeSize(Ty);
453
454 // Check that the type fits in a word.
455 if (Size > 32)
456 return false;
457
458 // FIXME: Handle vector types!
459 if (Ty->isVectorType())
460 return false;
461
462 // Float types are never treated as "integer like".
463 if (Ty->isRealFloatingType())
464 return false;
465
466 // If this is a builtin or pointer type then it is ok.
467 if (Ty->getAs<BuiltinType>() || Ty->isPointerType())
468 return true;
469
470 // Small complex integer types are "integer like".
471 if (const ComplexType *CT = Ty->getAs<ComplexType>())
472 return isIntegerLikeType(CT->getElementType(), Context, VMContext);
473
474 // Single element and zero sized arrays should be allowed, by the definition
475 // above, but they are not.
476
477 // Otherwise, it must be a record type.
478 const RecordType *RT = Ty->getAs<RecordType>();
479 if (!RT) return false;
480
481 // Ignore records with flexible arrays.
482 const RecordDecl *RD = RT->getDecl();
483 if (RD->hasFlexibleArrayMember())
484 return false;
485
486 // Check that all sub-fields are at offset 0, and are themselves "integer
487 // like".
488 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD);
489
490 bool HadField = false;
491 unsigned idx = 0;
492 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
493 i != e; ++i, ++idx) {
494 const FieldDecl *FD = *i;
495
496 // Bit-fields are not addressable, we only need to verify they are "integer
497 // like". We still have to disallow a subsequent non-bitfield, for example:
498 // struct { int : 0; int x }
499 // is non-integer like according to gcc.
500 if (FD->isBitField()) {
501 if (!RD->isUnion())
502 HadField = true;
503
504 if (!isIntegerLikeType(FD->getType(), Context, VMContext))
505 return false;
506
507 continue;
508 }
509
510 // Check if this field is at offset 0.
511 if (Layout.getFieldOffset(idx) != 0)
512 return false;
513
514 if (!isIntegerLikeType(FD->getType(), Context, VMContext))
515 return false;
516
517 // Only allow at most one field in a structure. This doesn't match the
518 // wording above, but follows gcc in situations with a field following an
519 // empty structure.
520 if (!RD->isUnion()) {
521 if (HadField)
522 return false;
523
524 HadField = true;
525 }
526 }
527
528 return true;
529}
530
531ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy, bool isVariadic,
532 unsigned functionCallConv) const {
533
534 // Variadic functions should always marshal to the base standard.
535 bool IsAAPCS_VFP =
536 !isVariadic && isEffectivelyAAPCS_VFP(functionCallConv, /* AAPCS16 */ true);
537
538 if (RetTy->isVoidType())
539 return ABIArgInfo::getIgnore();
540
541 if (const VectorType *VT = RetTy->getAs<VectorType>()) {
542 // Large vector types should be returned via memory.
543 if (getContext().getTypeSize(RetTy) > 128)
544 return getNaturalAlignIndirect(RetTy);
545 // TODO: FP16/BF16 vectors should be converted to integer vectors
546 // This check is similar to isIllegalVectorType - refactor?
547 if ((!getTarget().hasLegalHalfType() &&
548 (VT->getElementType()->isFloat16Type() ||
549 VT->getElementType()->isHalfType())) ||
550 (IsFloatABISoftFP &&
551 VT->getElementType()->isBFloat16Type()))
552 return coerceIllegalVector(RetTy);
553 }
554
555 if (!isAggregateTypeForABI(RetTy)) {
556 // Treat an enum type as its underlying type.
557 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
558 RetTy = EnumTy->getDecl()->getIntegerType();
559
560 if (const auto *EIT = RetTy->getAs<BitIntType>())
561 if (EIT->getNumBits() > 64)
562 return getNaturalAlignIndirect(RetTy, /*ByVal=*/false);
563
564 return isPromotableIntegerTypeForABI(RetTy) ? ABIArgInfo::getExtend(RetTy)
565 : ABIArgInfo::getDirect();
566 }
567
568 // Are we following APCS?
569 if (getABIKind() == ARMABIKind::APCS) {
570 if (isEmptyRecord(getContext(), RetTy, false))
571 return ABIArgInfo::getIgnore();
572
573 // Complex types are all returned as packed integers.
574 //
575 // FIXME: Consider using 2 x vector types if the back end handles them
576 // correctly.
577 if (RetTy->isAnyComplexType())
578 return ABIArgInfo::getDirect(llvm::IntegerType::get(
579 getVMContext(), getContext().getTypeSize(RetTy)));
580
581 // Integer like structures are returned in r0.
582 if (isIntegerLikeType(RetTy, getContext(), getVMContext())) {
583 // Return in the smallest viable integer type.
584 uint64_t Size = getContext().getTypeSize(RetTy);
585 if (Size <= 8)
586 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext()));
587 if (Size <= 16)
588 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext()));
589 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext()));
590 }
591
592 // Otherwise return in memory.
593 return getNaturalAlignIndirect(RetTy);
594 }
595
596 // Otherwise this is an AAPCS variant.
597
598 if (isEmptyRecord(getContext(), RetTy, true))
599 return ABIArgInfo::getIgnore();
600
601 // Check for homogeneous aggregates with AAPCS-VFP.
602 if (IsAAPCS_VFP) {
603 const Type *Base = nullptr;
604 uint64_t Members = 0;
605 if (isHomogeneousAggregate(RetTy, Base, Members))
606 return classifyHomogeneousAggregate(RetTy, Base, Members);
607 }
608
609 // Aggregates <= 4 bytes are returned in r0; other aggregates
610 // are returned indirectly.
611 uint64_t Size = getContext().getTypeSize(RetTy);
612 if (Size <= 32) {
613 // On RenderScript, coerce Aggregates <= 4 bytes to an integer array of
614 // same size and alignment.
615 if (getTarget().isRenderScriptTarget()) {
616 return coerceToIntArray(RetTy, getContext(), getVMContext());
617 }
618 if (getDataLayout().isBigEndian())
619 // Return in 32 bit integer integer type (as if loaded by LDR, AAPCS 5.4)
620 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext()));
621
622 // Return in the smallest viable integer type.
623 if (Size <= 8)
624 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext()));
625 if (Size <= 16)
626 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext()));
627 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext()));
628 } else if (Size <= 128 && getABIKind() == ARMABIKind::AAPCS16_VFP) {
629 llvm::Type *Int32Ty = llvm::Type::getInt32Ty(getVMContext());
630 llvm::Type *CoerceTy =
631 llvm::ArrayType::get(Int32Ty, llvm::alignTo(Size, 32) / 32);
632 return ABIArgInfo::getDirect(CoerceTy);
633 }
634
635 return getNaturalAlignIndirect(RetTy);
636}
637
638/// isIllegalVector - check whether Ty is an illegal vector type.
639bool ARMABIInfo::isIllegalVectorType(QualType Ty) const {
640 if (const VectorType *VT = Ty->getAs<VectorType> ()) {
641 // On targets that don't support half, fp16 or bfloat, they are expanded
642 // into float, and we don't want the ABI to depend on whether or not they
643 // are supported in hardware. Thus return false to coerce vectors of these
644 // types into integer vectors.
645 // We do not depend on hasLegalHalfType for bfloat as it is a
646 // separate IR type.
647 if ((!getTarget().hasLegalHalfType() &&
648 (VT->getElementType()->isFloat16Type() ||
649 VT->getElementType()->isHalfType())) ||
650 (IsFloatABISoftFP &&
651 VT->getElementType()->isBFloat16Type()))
652 return true;
653 if (isAndroid()) {
654 // Android shipped using Clang 3.1, which supported a slightly different
655 // vector ABI. The primary differences were that 3-element vector types
656 // were legal, and so were sub 32-bit vectors (i.e. <2 x i8>). This path
657 // accepts that legacy behavior for Android only.
658 // Check whether VT is legal.
659 unsigned NumElements = VT->getNumElements();
660 // NumElements should be power of 2 or equal to 3.
661 if (!llvm::isPowerOf2_32(NumElements) && NumElements != 3)
662 return true;
663 } else {
664 // Check whether VT is legal.
665 unsigned NumElements = VT->getNumElements();
666 uint64_t Size = getContext().getTypeSize(VT);
667 // NumElements should be power of 2.
668 if (!llvm::isPowerOf2_32(NumElements))
669 return true;
670 // Size should be greater than 32 bits.
671 return Size <= 32;
672 }
673 }
674 return false;
675}
676
677/// Return true if a type contains any 16-bit floating point vectors
678bool ARMABIInfo::containsAnyFP16Vectors(QualType Ty) const {
679 if (const ConstantArrayType *AT = getContext().getAsConstantArrayType(Ty)) {
680 uint64_t NElements = AT->getSize().getZExtValue();
681 if (NElements == 0)
682 return false;
683 return containsAnyFP16Vectors(AT->getElementType());
684 } else if (const RecordType *RT = Ty->getAs<RecordType>()) {
685 const RecordDecl *RD = RT->getDecl();
686
687 // If this is a C++ record, check the bases first.
688 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD))
689 if (llvm::any_of(CXXRD->bases(), [this](const CXXBaseSpecifier &B) {
690 return containsAnyFP16Vectors(B.getType());
691 }))
692 return true;
693
694 if (llvm::any_of(RD->fields(), [this](FieldDecl *FD) {
695 return FD && containsAnyFP16Vectors(FD->getType());
696 }))
697 return true;
698
699 return false;
700 } else {
701 if (const VectorType *VT = Ty->getAs<VectorType>())
702 return (VT->getElementType()->isFloat16Type() ||
703 VT->getElementType()->isBFloat16Type() ||
704 VT->getElementType()->isHalfType());
705 return false;
706 }
707}
708
709bool ARMSwiftABIInfo::isLegalVectorType(CharUnits VectorSize, llvm::Type *EltTy,
710 unsigned NumElts) const {
711 if (!llvm::isPowerOf2_32(NumElts))
712 return false;
713 unsigned size = CGT.getDataLayout().getTypeStoreSizeInBits(EltTy);
714 if (size > 64)
715 return false;
716 if (VectorSize.getQuantity() != 8 &&
717 (VectorSize.getQuantity() != 16 || NumElts == 1))
718 return false;
719 return true;
720}
721
722bool ARMABIInfo::isHomogeneousAggregateBaseType(QualType Ty) const {
723 // Homogeneous aggregates for AAPCS-VFP must have base types of float,
724 // double, or 64-bit or 128-bit vectors.
725 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) {
726 if (BT->getKind() == BuiltinType::Float ||
727 BT->getKind() == BuiltinType::Double ||
728 BT->getKind() == BuiltinType::LongDouble)
729 return true;
730 } else if (const VectorType *VT = Ty->getAs<VectorType>()) {
731 unsigned VecSize = getContext().getTypeSize(VT);
732 if (VecSize == 64 || VecSize == 128)
733 return true;
734 }
735 return false;
736}
737
738bool ARMABIInfo::isHomogeneousAggregateSmallEnough(const Type *Base,
739 uint64_t Members) const {
740 return Members <= 4;
741}
742
743bool ARMABIInfo::isZeroLengthBitfieldPermittedInHomogeneousAggregate() const {
744 // AAPCS32 says that the rule for whether something is a homogeneous
745 // aggregate is applied to the output of the data layout decision. So
746 // anything that doesn't affect the data layout also does not affect
747 // homogeneity. In particular, zero-length bitfields don't stop a struct
748 // being homogeneous.
749 return true;
750}
751
752bool ARMABIInfo::isEffectivelyAAPCS_VFP(unsigned callConvention,
753 bool acceptHalf) const {
754 // Give precedence to user-specified calling conventions.
755 if (callConvention != llvm::CallingConv::C)
756 return (callConvention == llvm::CallingConv::ARM_AAPCS_VFP);
757 else
758 return (getABIKind() == ARMABIKind::AAPCS_VFP) ||
759 (acceptHalf && (getABIKind() == ARMABIKind::AAPCS16_VFP));
760}
761
762Address ARMABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
763 QualType Ty) const {
765
766 // Empty records are ignored for parameter passing purposes.
767 if (isEmptyRecord(getContext(), Ty, true)) {
768 VAListAddr = VAListAddr.withElementType(CGF.Int8PtrTy);
769 auto *Load = CGF.Builder.CreateLoad(VAListAddr);
770 return Address(Load, CGF.ConvertTypeForMem(Ty), SlotSize);
771 }
772
773 CharUnits TySize = getContext().getTypeSizeInChars(Ty);
774 CharUnits TyAlignForABI = getContext().getTypeUnadjustedAlignInChars(Ty);
775
776 // Use indirect if size of the illegal vector is bigger than 16 bytes.
777 bool IsIndirect = false;
778 const Type *Base = nullptr;
779 uint64_t Members = 0;
780 if (TySize > CharUnits::fromQuantity(16) && isIllegalVectorType(Ty)) {
781 IsIndirect = true;
782
783 // ARMv7k passes structs bigger than 16 bytes indirectly, in space
784 // allocated by the caller.
785 } else if (TySize > CharUnits::fromQuantity(16) &&
786 getABIKind() == ARMABIKind::AAPCS16_VFP &&
787 !isHomogeneousAggregate(Ty, Base, Members)) {
788 IsIndirect = true;
789
790 // Otherwise, bound the type's ABI alignment.
791 // The ABI alignment for 64-bit or 128-bit vectors is 8 for AAPCS and 4 for
792 // APCS. For AAPCS, the ABI alignment is at least 4-byte and at most 8-byte.
793 // Our callers should be prepared to handle an under-aligned address.
794 } else if (getABIKind() == ARMABIKind::AAPCS_VFP ||
795 getABIKind() == ARMABIKind::AAPCS) {
796 TyAlignForABI = std::max(TyAlignForABI, CharUnits::fromQuantity(4));
797 TyAlignForABI = std::min(TyAlignForABI, CharUnits::fromQuantity(8));
798 } else if (getABIKind() == ARMABIKind::AAPCS16_VFP) {
799 // ARMv7k allows type alignment up to 16 bytes.
800 TyAlignForABI = std::max(TyAlignForABI, CharUnits::fromQuantity(4));
801 TyAlignForABI = std::min(TyAlignForABI, CharUnits::fromQuantity(16));
802 } else {
803 TyAlignForABI = CharUnits::fromQuantity(4);
804 }
805
806 TypeInfoChars TyInfo(TySize, TyAlignForABI, AlignRequirementKind::None);
807 return emitVoidPtrVAArg(CGF, VAListAddr, Ty, IsIndirect, TyInfo,
808 SlotSize, /*AllowHigherAlign*/ true);
809}
810
811std::unique_ptr<TargetCodeGenInfo>
813 return std::make_unique<ARMTargetCodeGenInfo>(CGM.getTypes(), Kind);
814}
815
816std::unique_ptr<TargetCodeGenInfo>
818 return std::make_unique<WindowsARMTargetCodeGenInfo>(CGM.getTypes(), K);
819}
static bool isIntegerLikeType(QualType Ty, ASTContext &Context, llvm::LLVMContext &VMContext)
Definition: ARM.cpp:446
Holds long-lived AST nodes (such as types and decls) that can be referred to throughout the semantic ...
Definition: ASTContext.h:182
const ASTRecordLayout & getASTRecordLayout(const RecordDecl *D) const
Get or compute information about the layout of the specified record (struct/union/class) D,...
uint64_t getTypeSize(QualType T) const
Return the size of the specified (complete) type T, in bits.
Definition: ASTContext.h:2307
ASTRecordLayout - This class contains layout information for one RecordDecl, which is a struct/union/...
Definition: RecordLayout.h:38
uint64_t getFieldOffset(unsigned FieldNo) const
getFieldOffset - Get the offset of the given field index, in bits.
Definition: RecordLayout.h:200
Attr - This represents one attribute.
Definition: Attr.h:41
A fixed int type of a specified bitwidth.
Definition: Type.h:6664
This class is used for builtin types like 'int'.
Definition: Type.h:2738
Represents a base class of a C++ class.
Definition: DeclCXX.h:146
Represents a C++ struct/union/class.
Definition: DeclCXX.h:258
CharUnits - This is an opaque type for sizes expressed in character units.
Definition: CharUnits.h:38
QuantityType getQuantity() const
getQuantity - Get the raw integer representation of this quantity.
Definition: CharUnits.h:185
static CharUnits fromQuantity(QuantityType Quantity)
fromQuantity - Construct a CharUnits quantity from a raw integer type.
Definition: CharUnits.h:63
std::string FloatABI
The ABI to use for passing floating point arguments.
ABIArgInfo - Helper class to encapsulate information about how a specific C type should be passed to ...
static ABIArgInfo getIgnore()
static ABIArgInfo getIndirect(CharUnits Alignment, bool ByVal=true, bool Realign=false, llvm::Type *Padding=nullptr)
static ABIArgInfo getDirect(llvm::Type *T=nullptr, unsigned Offset=0, llvm::Type *Padding=nullptr, bool CanBeFlattened=true, unsigned Align=0)
static ABIArgInfo getExtend(QualType Ty, llvm::Type *T=nullptr)
ABIInfo - Target specific hooks for defining how a type should be passed or returned from functions.
Definition: ABIInfo.h:44
virtual bool allowBFloatArgsAndRet() const
Definition: ABIInfo.h:55
virtual bool isHomogeneousAggregateBaseType(QualType Ty) const
Definition: ABIInfo.cpp:47
virtual CodeGen::Address EmitVAArg(CodeGen::CodeGenFunction &CGF, CodeGen::Address VAListAddr, QualType Ty) const =0
EmitVAArg - Emit the target dependent code to load a value of.
virtual bool isHomogeneousAggregateSmallEnough(const Type *Base, uint64_t Members) const
Definition: ABIInfo.cpp:51
const TargetInfo & getTarget() const
Definition: ABIInfo.cpp:30
virtual bool isZeroLengthBitfieldPermittedInHomogeneousAggregate() const
Definition: ABIInfo.cpp:56
virtual void computeInfo(CodeGen::CGFunctionInfo &FI) const =0
An aligned address.
Definition: Address.h:29
Address withElementType(llvm::Type *ElemTy) const
Return address with different element type, but same pointer and alignment.
Definition: Address.h:100
llvm::LoadInst * CreateLoad(Address Addr, const llvm::Twine &Name="")
Definition: CGBuilder.h:71
RecordArgABI
Specify how one should pass an argument of a record type.
Definition: CGCXXABI.h:154
@ RAA_DirectInMemory
Pass it on the stack using its defined layout.
Definition: CGCXXABI.h:162
CGFunctionInfo - Class to encapsulate the information about a function definition.
unsigned getCallingConvention() const
getCallingConvention - Return the user specified calling convention, which has been translated into a...
CanQualType getReturnType() const
MutableArrayRef< ArgInfo > arguments()
void setEffectiveCallingConvention(unsigned Value)
CodeGenFunction - This class organizes the per-function state that is used while generating LLVM code...
llvm::Type * ConvertTypeForMem(QualType T)
This class organizes the cross-function state that is used while generating LLVM code.
DiagnosticsEngine & getDiags() const
const LangOptions & getLangOpts() const
const TargetInfo & getTarget() const
This class organizes the cross-module state that is used while lowering AST types to LLVM types.
Definition: CodeGenTypes.h:54
llvm::Type * ConvertType(QualType T)
ConvertType - Convert type T into a llvm::Type.
const CodeGenOptions & getCodeGenOpts() const
const llvm::DataLayout & getDataLayout() const
Definition: CodeGenTypes.h:104
Target specific hooks for defining how a type should be passed or returned from functions with one of...
Definition: ABIInfo.h:118
virtual bool isLegalVectorType(CharUnits VectorSize, llvm::Type *EltTy, unsigned NumElts) const
Returns true if the given vector type is legal from Swift's calling convention perspective.
Definition: ABIInfo.cpp:226
TargetCodeGenInfo - This class organizes various target-specific codegeneration issues,...
Definition: TargetInfo.h:46
virtual unsigned getSizeOfUnwindException() const
Determines the size of struct _Unwind_Exception on this platform, in 8-bit units.
Definition: TargetInfo.cpp:76
virtual StringRef getARCRetainAutoreleasedReturnValueMarker() const
Retrieve the address of a function to call immediately before calling objc_retainAutoreleasedReturnVa...
Definition: TargetInfo.h:200
virtual bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, llvm::Value *Address) const
Initializes the given DWARF EH register-size table, a char*.
Definition: TargetInfo.h:125
virtual void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV, CodeGen::CodeGenModule &M) const
setTargetAttributes - Provides a convenient hook to handle extra target-specific attributes for the g...
Definition: TargetInfo.h:75
virtual int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const
Determines the DWARF register number for the stack pointer, for exception-handling purposes.
Definition: TargetInfo.h:117
Complex values, per C99 6.2.5p11.
Definition: Type.h:2843
Represents the canonical version of C arrays with a specified constant size.
Definition: Type.h:3184
specific_decl_iterator - Iterates over a subrange of declarations stored in a DeclContext,...
Definition: DeclBase.h:2340
Decl - This represents one declaration (or definition), e.g.
Definition: DeclBase.h:85
T * getAttr() const
Definition: DeclBase.h:577
SourceLocation getLocation() const
Definition: DeclBase.h:444
DiagnosticBuilder Report(SourceLocation Loc, unsigned DiagID)
Issue the message to the client.
Definition: Diagnostic.h:1547
A helper class that allows the use of isa/cast/dyncast to detect TagType objects of enums.
Definition: Type.h:4997
Represents a member of a struct/union/class.
Definition: Decl.h:3015
bool isBitField() const
Determines whether this field is a bitfield.
Definition: Decl.h:3106
Represents a function declaration or definition.
Definition: Decl.h:1957
bool hasSignReturnAddress() const
Check if return address signing is enabled.
Definition: LangOptions.h:615
A (possibly-)qualified type.
Definition: Type.h:736
Represents a struct/union/class.
Definition: Decl.h:4117
bool hasFlexibleArrayMember() const
Definition: Decl.h:4150
field_iterator field_end() const
Definition: Decl.h:4326
field_range fields() const
Definition: Decl.h:4323
field_iterator field_begin() const
Definition: Decl.cpp:5006
A helper class that allows the use of isa/cast/dyncast to detect TagType objects of structs/unions/cl...
Definition: Type.h:4971
RecordDecl * getDecl() const
Definition: Type.h:4981
bool isUnion() const
Definition: Decl.h:3739
TargetOptions & getTargetOpts() const
Retrieve the target options.
Definition: TargetInfo.h:304
const llvm::Triple & getTriple() const
Returns the target triple of the primary target.
Definition: TargetInfo.h:1218
virtual bool isBranchProtectionSupportedArch(StringRef Arch) const
Determine if the Architecture in this TargetInfo supports branch protection.
Definition: TargetInfo.h:1380
virtual ParsedTargetAttr parseTargetAttr(StringRef Str) const
Definition: TargetInfo.cpp:537
virtual bool hasBFloat16Type() const
Determine whether the _BFloat16 type is supported on this target.
Definition: TargetInfo.h:675
virtual bool validateBranchProtection(StringRef Spec, StringRef Arch, BranchProtectionInfo &BPI, StringRef &Err) const
Determine if this TargetInfo supports the given branch protection specification.
Definition: TargetInfo.h:1386
std::string CPU
If given, the name of the target CPU to generate code for.
Definition: TargetOptions.h:36
The base class of the type hierarchy.
Definition: Type.h:1602
bool isVoidType() const
Definition: Type.h:7352
bool isPointerType() const
Definition: Type.h:7033
bool isAnyComplexType() const
Definition: Type.h:7131
bool isVectorType() const
Definition: Type.h:7135
bool isRealFloatingType() const
Floating point categories.
Definition: Type.cpp:2203
const T * getAs() const
Member-template getAs<specific type>'.
Definition: Type.h:7558
QualType getType() const
Definition: Decl.h:715
Represents a GCC generic vector type.
Definition: Type.h:3507
ABIArgInfo classifyArgumentType(CodeGenModule &CGM, CanQualType type)
Classify the rules for how to pass a particular type.
std::unique_ptr< TargetCodeGenInfo > createARMTargetCodeGenInfo(CodeGenModule &CGM, ARMABIKind Kind)
Definition: ARM.cpp:812
CGCXXABI::RecordArgABI getRecordArgABI(const RecordType *RT, CGCXXABI &CXXABI)
bool classifyReturnType(const CGCXXABI &CXXABI, CGFunctionInfo &FI, const ABIInfo &Info)
Address emitVoidPtrVAArg(CodeGenFunction &CGF, Address VAListAddr, QualType ValueTy, bool IsIndirect, TypeInfoChars ValueInfo, CharUnits SlotSizeAndAlign, bool AllowHigherAlign, bool ForceRightAdjust=false)
Emit va_arg for a platform using the common void* representation, where arguments are simply emitted ...
ABIArgInfo coerceToIntArray(QualType Ty, ASTContext &Context, llvm::LLVMContext &LLVMContext)
Definition: ABIInfoImpl.cpp:79
bool isAggregateTypeForABI(QualType T)
std::unique_ptr< TargetCodeGenInfo > createWindowsARMTargetCodeGenInfo(CodeGenModule &CGM, ARMABIKind K)
Definition: ARM.cpp:817
void AssignToArrayRange(CodeGen::CGBuilderTy &Builder, llvm::Value *Array, llvm::Value *Value, unsigned FirstIndex, unsigned LastIndex)
Definition: ABIInfoImpl.cpp:89
QualType useFirstFieldIfTransparentUnion(QualType Ty)
Pass transparent unions as if they were the type of the first element.
bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays, bool AsIfNoUniqueAddr=false)
isEmptyRecord - Return true iff a structure contains only empty fields.
bool Load(InterpState &S, CodePtr OpPC)
Definition: Interp.h:1286
unsigned long uint64_t
Definition: Format.h:5202
#define true
Definition: stdbool.h:21
llvm::IntegerType * Int8Ty
i8, i16, i32, and i64
Contains information gathered from parsing the contents of TargetAttr.
Definition: TargetInfo.h:55
LangOptions::SignReturnAddressScopeKind SignReturnAddr
Definition: TargetInfo.h:1371