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17 #include "llvm/ADT/StringExtras.h"
18 #include "llvm/ADT/StringRef.h"
19 #include "llvm/ADT/StringSwitch.h"
20 #include "llvm/Support/X86TargetParser.h"
26 #define BUILTIN(ID, TYPE, ATTRS) \
27 {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr},
28 #define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) \
29 {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, FEATURE},
30 #define TARGET_HEADER_BUILTIN(ID, TYPE, ATTRS, HEADER, LANGS, FEATURE) \
31 {#ID, TYPE, ATTRS, HEADER, LANGS, FEATURE},
32 #include "clang/Basic/BuiltinsX86.def"
34 #define BUILTIN(ID, TYPE, ATTRS) \
35 {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr},
36 #define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) \
37 {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, FEATURE},
38 #define TARGET_HEADER_BUILTIN(ID, TYPE, ATTRS, HEADER, LANGS, FEATURE) \
39 {#ID, TYPE, ATTRS, HEADER, LANGS, FEATURE},
40 #include "clang/Basic/BuiltinsX86_64.def"
44 "ax",
"dx",
"cx",
"bx",
"si",
"di",
"bp",
"sp",
45 "st",
"st(1)",
"st(2)",
"st(3)",
"st(4)",
"st(5)",
"st(6)",
"st(7)",
46 "argp",
"flags",
"fpcr",
"fpsr",
"dirflag",
"frame",
"xmm0",
"xmm1",
47 "xmm2",
"xmm3",
"xmm4",
"xmm5",
"xmm6",
"xmm7",
"mm0",
"mm1",
48 "mm2",
"mm3",
"mm4",
"mm5",
"mm6",
"mm7",
"r8",
"r9",
49 "r10",
"r11",
"r12",
"r13",
"r14",
"r15",
"xmm8",
"xmm9",
50 "xmm10",
"xmm11",
"xmm12",
"xmm13",
"xmm14",
"xmm15",
"ymm0",
"ymm1",
51 "ymm2",
"ymm3",
"ymm4",
"ymm5",
"ymm6",
"ymm7",
"ymm8",
"ymm9",
52 "ymm10",
"ymm11",
"ymm12",
"ymm13",
"ymm14",
"ymm15",
"xmm16",
"xmm17",
53 "xmm18",
"xmm19",
"xmm20",
"xmm21",
"xmm22",
"xmm23",
"xmm24",
"xmm25",
54 "xmm26",
"xmm27",
"xmm28",
"xmm29",
"xmm30",
"xmm31",
"ymm16",
"ymm17",
55 "ymm18",
"ymm19",
"ymm20",
"ymm21",
"ymm22",
"ymm23",
"ymm24",
"ymm25",
56 "ymm26",
"ymm27",
"ymm28",
"ymm29",
"ymm30",
"ymm31",
"zmm0",
"zmm1",
57 "zmm2",
"zmm3",
"zmm4",
"zmm5",
"zmm6",
"zmm7",
"zmm8",
"zmm9",
58 "zmm10",
"zmm11",
"zmm12",
"zmm13",
"zmm14",
"zmm15",
"zmm16",
"zmm17",
59 "zmm18",
"zmm19",
"zmm20",
"zmm21",
"zmm22",
"zmm23",
"zmm24",
"zmm25",
60 "zmm26",
"zmm27",
"zmm28",
"zmm29",
"zmm30",
"zmm31",
"k0",
"k1",
61 "k2",
"k3",
"k4",
"k5",
"k6",
"k7",
62 "cr0",
"cr2",
"cr3",
"cr4",
"cr8",
63 "dr0",
"dr1",
"dr2",
"dr3",
"dr6",
"dr7",
64 "bnd0",
"bnd1",
"bnd2",
"bnd3",
65 "tmm0",
"tmm1",
"tmm2",
"tmm3",
"tmm4",
"tmm5",
"tmm6",
"tmm7",
69 {{
"al",
"ah",
"eax",
"rax"}, 0},
70 {{
"bl",
"bh",
"ebx",
"rbx"}, 3},
71 {{
"cl",
"ch",
"ecx",
"rcx"}, 2},
72 {{
"dl",
"dh",
"edx",
"rdx"}, 1},
77 {{
"r8d",
"r8w",
"r8b"}, 38},
78 {{
"r9d",
"r9w",
"r9b"}, 39},
79 {{
"r10d",
"r10w",
"r10b"}, 40},
80 {{
"r11d",
"r11w",
"r11b"}, 41},
81 {{
"r12d",
"r12w",
"r12b"}, 42},
82 {{
"r13d",
"r13w",
"r13b"}, 43},
83 {{
"r14d",
"r14w",
"r14b"}, 44},
84 {{
"r15d",
"r15w",
"r15b"}, 45},
90 using namespace clang;
107 const std::vector<std::string> &FeaturesVec)
const {
110 if (
getTriple().getArch() == llvm::Triple::x86_64)
113 using namespace llvm::X86;
116 getFeaturesForCPU(
CPU, CPUFeatures);
117 for (
auto &F : CPUFeatures)
120 std::vector<std::string> UpdatedFeaturesVec;
121 for (
const auto &Feature : FeaturesVec) {
123 if (Feature ==
"+general-regs-only") {
124 UpdatedFeaturesVec.push_back(
"-x87");
125 UpdatedFeaturesVec.push_back(
"-mmx");
126 UpdatedFeaturesVec.push_back(
"-sse");
130 UpdatedFeaturesVec.push_back(Feature);
140 auto I = Features.find(
"sse4.2");
141 if (I != Features.end() && I->getValue() &&
142 !llvm::is_contained(UpdatedFeaturesVec,
"-popcnt"))
143 Features[
"popcnt"] =
true;
147 I = Features.find(
"sse");
148 if (I != Features.end() && I->getValue() &&
149 !llvm::is_contained(UpdatedFeaturesVec,
"-mmx"))
150 Features[
"mmx"] =
true;
153 I = Features.find(
"avx");
154 if (I != Features.end() && I->getValue() &&
155 !llvm::is_contained(UpdatedFeaturesVec,
"-xsave"))
156 Features[
"xsave"] =
true;
159 I = Features.find(
"sse4.2");
160 if (I != Features.end() && I->getValue() &&
161 !llvm::is_contained(UpdatedFeaturesVec,
"-crc32"))
162 Features[
"crc32"] =
true;
168 StringRef Name,
bool Enabled)
const {
169 if (Name ==
"sse4") {
180 Features[Name] = Enabled;
181 llvm::X86::updateImpliedFeatures(Name, Enabled, Features);
188 for (
const auto &Feature : Features) {
189 if (Feature[0] !=
'+')
192 if (Feature ==
"+aes") {
194 }
else if (Feature ==
"+vaes") {
196 }
else if (Feature ==
"+pclmul") {
198 }
else if (Feature ==
"+vpclmulqdq") {
199 HasVPCLMULQDQ =
true;
200 }
else if (Feature ==
"+lzcnt") {
202 }
else if (Feature ==
"+rdrnd") {
204 }
else if (Feature ==
"+fsgsbase") {
206 }
else if (Feature ==
"+bmi") {
208 }
else if (Feature ==
"+bmi2") {
210 }
else if (Feature ==
"+popcnt") {
212 }
else if (Feature ==
"+rtm") {
214 }
else if (Feature ==
"+prfchw") {
216 }
else if (Feature ==
"+rdseed") {
218 }
else if (Feature ==
"+adx") {
220 }
else if (Feature ==
"+tbm") {
222 }
else if (Feature ==
"+lwp") {
224 }
else if (Feature ==
"+fma") {
226 }
else if (Feature ==
"+f16c") {
228 }
else if (Feature ==
"+gfni") {
230 }
else if (Feature ==
"+avx512cd") {
232 }
else if (Feature ==
"+avx512vpopcntdq") {
233 HasAVX512VPOPCNTDQ =
true;
234 }
else if (Feature ==
"+avx512vnni") {
235 HasAVX512VNNI =
true;
236 }
else if (Feature ==
"+avx512bf16") {
237 HasAVX512BF16 =
true;
238 }
else if (Feature ==
"+avx512er") {
240 }
else if (Feature ==
"+avx512fp16") {
241 HasAVX512FP16 =
true;
243 }
else if (Feature ==
"+avx512pf") {
245 }
else if (Feature ==
"+avx512dq") {
247 }
else if (Feature ==
"+avx512bitalg") {
248 HasAVX512BITALG =
true;
249 }
else if (Feature ==
"+avx512bw") {
251 }
else if (Feature ==
"+avx512vl") {
253 }
else if (Feature ==
"+avx512vbmi") {
254 HasAVX512VBMI =
true;
255 }
else if (Feature ==
"+avx512vbmi2") {
256 HasAVX512VBMI2 =
true;
257 }
else if (Feature ==
"+avx512ifma") {
258 HasAVX512IFMA =
true;
259 }
else if (Feature ==
"+avx512vp2intersect") {
260 HasAVX512VP2INTERSECT =
true;
261 }
else if (Feature ==
"+sha") {
263 }
else if (Feature ==
"+shstk") {
265 }
else if (Feature ==
"+movbe") {
267 }
else if (Feature ==
"+sgx") {
269 }
else if (Feature ==
"+cx8") {
271 }
else if (Feature ==
"+cx16") {
273 }
else if (Feature ==
"+fxsr") {
275 }
else if (Feature ==
"+xsave") {
277 }
else if (Feature ==
"+xsaveopt") {
279 }
else if (Feature ==
"+xsavec") {
281 }
else if (Feature ==
"+xsaves") {
283 }
else if (Feature ==
"+mwaitx") {
285 }
else if (Feature ==
"+pku") {
287 }
else if (Feature ==
"+clflushopt") {
288 HasCLFLUSHOPT =
true;
289 }
else if (Feature ==
"+clwb") {
291 }
else if (Feature ==
"+wbnoinvd") {
293 }
else if (Feature ==
"+prefetchwt1") {
294 HasPREFETCHWT1 =
true;
295 }
else if (Feature ==
"+clzero") {
297 }
else if (Feature ==
"+cldemote") {
299 }
else if (Feature ==
"+rdpid") {
301 }
else if (Feature ==
"+kl") {
303 }
else if (Feature ==
"+widekl") {
305 }
else if (Feature ==
"+retpoline-external-thunk") {
306 HasRetpolineExternalThunk =
true;
307 }
else if (Feature ==
"+sahf") {
309 }
else if (Feature ==
"+waitpkg") {
311 }
else if (Feature ==
"+movdiri") {
313 }
else if (Feature ==
"+movdir64b") {
315 }
else if (Feature ==
"+pconfig") {
317 }
else if (Feature ==
"+ptwrite") {
319 }
else if (Feature ==
"+invpcid") {
321 }
else if (Feature ==
"+enqcmd") {
323 }
else if (Feature ==
"+hreset") {
325 }
else if (Feature ==
"+amx-bf16") {
327 }
else if (Feature ==
"+amx-int8") {
329 }
else if (Feature ==
"+amx-tile") {
331 }
else if (Feature ==
"+avxvnni") {
333 }
else if (Feature ==
"+serialize") {
335 }
else if (Feature ==
"+tsxldtrk") {
337 }
else if (Feature ==
"+uintr") {
339 }
else if (Feature ==
"+crc32") {
341 }
else if (Feature ==
"+x87") {
345 X86SSEEnum
Level = llvm::StringSwitch<X86SSEEnum>(Feature)
346 .Case(
"+avx512f", AVX512F)
349 .Case(
"+sse4.2", SSE42)
350 .Case(
"+sse4.1", SSE41)
351 .Case(
"+ssse3", SSSE3)
358 MMX3DNowEnum ThreeDNowLevel = llvm::StringSwitch<MMX3DNowEnum>(Feature)
359 .Case(
"+3dnowa", AMD3DNowAthlon)
360 .Case(
"+3dnow", AMD3DNow)
362 .Default(NoMMX3DNow);
363 MMX3DNowLevel =
std::max(MMX3DNowLevel, ThreeDNowLevel);
365 XOPEnum XLevel = llvm::StringSwitch<XOPEnum>(Feature)
368 .Case(
"+sse4a", SSE4A)
370 XOPLevel =
std::max(XOPLevel, XLevel);
377 Diags.
Report(diag::err_target_unsupported_fpmath)
398 Builder.defineMacro(
"__GCC_ASM_FLAG_OUTPUTS__");
401 if (CodeModel ==
"default")
403 Builder.defineMacro(
"__code_model_" + CodeModel +
"__");
406 if (
getTriple().getArch() == llvm::Triple::x86_64) {
407 Builder.defineMacro(
"__amd64__");
408 Builder.defineMacro(
"__amd64");
409 Builder.defineMacro(
"__x86_64");
410 Builder.defineMacro(
"__x86_64__");
411 if (
getTriple().getArchName() ==
"x86_64h") {
412 Builder.defineMacro(
"__x86_64h");
413 Builder.defineMacro(
"__x86_64h__");
419 Builder.defineMacro(
"__SEG_GS");
420 Builder.defineMacro(
"__SEG_FS");
421 Builder.defineMacro(
"__seg_gs",
"__attribute__((address_space(256)))");
422 Builder.defineMacro(
"__seg_fs",
"__attribute__((address_space(257)))");
427 using namespace llvm::X86;
433 Builder.defineMacro(
"__tune_i386__");
442 Builder.defineMacro(
"__pentium_mmx__");
443 Builder.defineMacro(
"__tune_pentium_mmx__");
452 Builder.defineMacro(
"__tune_pentium3__");
456 Builder.defineMacro(
"__tune_pentium2__");
484 case CK_GoldmontPlus:
496 case CK_SkylakeClient:
497 case CK_SkylakeServer:
501 case CK_IcelakeClient:
503 case CK_IcelakeServer:
505 case CK_SapphireRapids:
520 Builder.defineMacro(
"__tune_lakemont__");
523 Builder.defineMacro(
"__k6_2__");
524 Builder.defineMacro(
"__tune_k6_2__");
527 if (
CPU != CK_K6_2) {
531 Builder.defineMacro(
"__k6_3__");
532 Builder.defineMacro(
"__tune_k6_3__");
541 if (SSELevel != NoSSE) {
542 Builder.defineMacro(
"__athlon_sse__");
543 Builder.defineMacro(
"__tune_athlon_sse__");
591 Builder.defineMacro(
"__REGISTER_PREFIX__",
"");
596 Builder.defineMacro(
"__NO_MATH_INLINES");
599 Builder.defineMacro(
"__AES__");
602 Builder.defineMacro(
"__VAES__");
605 Builder.defineMacro(
"__PCLMUL__");
608 Builder.defineMacro(
"__VPCLMULQDQ__");
612 if (HasLAHFSAHF ||
getTriple().getArch() == llvm::Triple::x86)
613 Builder.defineMacro(
"__LAHF_SAHF__");
616 Builder.defineMacro(
"__LZCNT__");
619 Builder.defineMacro(
"__RDRND__");
622 Builder.defineMacro(
"__FSGSBASE__");
625 Builder.defineMacro(
"__BMI__");
628 Builder.defineMacro(
"__BMI2__");
631 Builder.defineMacro(
"__POPCNT__");
634 Builder.defineMacro(
"__RTM__");
637 Builder.defineMacro(
"__PRFCHW__");
640 Builder.defineMacro(
"__RDSEED__");
643 Builder.defineMacro(
"__ADX__");
646 Builder.defineMacro(
"__TBM__");
649 Builder.defineMacro(
"__LWP__");
652 Builder.defineMacro(
"__MWAITX__");
655 Builder.defineMacro(
"__MOVBE__");
659 Builder.defineMacro(
"__XOP__");
662 Builder.defineMacro(
"__FMA4__");
665 Builder.defineMacro(
"__SSE4A__");
672 Builder.defineMacro(
"__FMA__");
675 Builder.defineMacro(
"__F16C__");
678 Builder.defineMacro(
"__GFNI__");
681 Builder.defineMacro(
"__AVX512CD__");
682 if (HasAVX512VPOPCNTDQ)
683 Builder.defineMacro(
"__AVX512VPOPCNTDQ__");
685 Builder.defineMacro(
"__AVX512VNNI__");
687 Builder.defineMacro(
"__AVX512BF16__");
689 Builder.defineMacro(
"__AVX512ER__");
691 Builder.defineMacro(
"__AVX512FP16__");
693 Builder.defineMacro(
"__AVX512PF__");
695 Builder.defineMacro(
"__AVX512DQ__");
697 Builder.defineMacro(
"__AVX512BITALG__");
699 Builder.defineMacro(
"__AVX512BW__");
701 Builder.defineMacro(
"__AVX512VL__");
703 Builder.defineMacro(
"__AVX512VBMI__");
705 Builder.defineMacro(
"__AVX512VBMI2__");
707 Builder.defineMacro(
"__AVX512IFMA__");
708 if (HasAVX512VP2INTERSECT)
709 Builder.defineMacro(
"__AVX512VP2INTERSECT__");
711 Builder.defineMacro(
"__SHA__");
714 Builder.defineMacro(
"__FXSR__");
716 Builder.defineMacro(
"__XSAVE__");
718 Builder.defineMacro(
"__XSAVEOPT__");
720 Builder.defineMacro(
"__XSAVEC__");
722 Builder.defineMacro(
"__XSAVES__");
724 Builder.defineMacro(
"__PKU__");
726 Builder.defineMacro(
"__CLFLUSHOPT__");
728 Builder.defineMacro(
"__CLWB__");
730 Builder.defineMacro(
"__WBNOINVD__");
732 Builder.defineMacro(
"__SHSTK__");
734 Builder.defineMacro(
"__SGX__");
736 Builder.defineMacro(
"__PREFETCHWT1__");
738 Builder.defineMacro(
"__CLZERO__");
740 Builder.defineMacro(
"__KL__");
742 Builder.defineMacro(
"__WIDEKL__");
744 Builder.defineMacro(
"__RDPID__");
746 Builder.defineMacro(
"__CLDEMOTE__");
748 Builder.defineMacro(
"__WAITPKG__");
750 Builder.defineMacro(
"__MOVDIRI__");
752 Builder.defineMacro(
"__MOVDIR64B__");
754 Builder.defineMacro(
"__PCONFIG__");
756 Builder.defineMacro(
"__PTWRITE__");
758 Builder.defineMacro(
"__INVPCID__");
760 Builder.defineMacro(
"__ENQCMD__");
762 Builder.defineMacro(
"__HRESET__");
764 Builder.defineMacro(
"__AMXTILE__");
766 Builder.defineMacro(
"__AMXINT8__");
768 Builder.defineMacro(
"__AMXBF16__");
770 Builder.defineMacro(
"__AVXVNNI__");
772 Builder.defineMacro(
"__SERIALIZE__");
774 Builder.defineMacro(
"__TSXLDTRK__");
776 Builder.defineMacro(
"__UINTR__");
778 Builder.defineMacro(
"__CRC32__");
783 Builder.defineMacro(
"__AVX512F__");
786 Builder.defineMacro(
"__AVX2__");
789 Builder.defineMacro(
"__AVX__");
792 Builder.defineMacro(
"__SSE4_2__");
795 Builder.defineMacro(
"__SSE4_1__");
798 Builder.defineMacro(
"__SSSE3__");
801 Builder.defineMacro(
"__SSE3__");
804 Builder.defineMacro(
"__SSE2__");
805 Builder.defineMacro(
"__SSE2_MATH__");
808 Builder.defineMacro(
"__SSE__");
809 Builder.defineMacro(
"__SSE_MATH__");
815 if (Opts.MicrosoftExt &&
getTriple().getArch() == llvm::Triple::x86) {
825 Builder.defineMacro(
"_M_IX86_FP", Twine(2));
828 Builder.defineMacro(
"_M_IX86_FP", Twine(1));
831 Builder.defineMacro(
"_M_IX86_FP", Twine(0));
837 switch (MMX3DNowLevel) {
839 Builder.defineMacro(
"__3dNOW_A__");
842 Builder.defineMacro(
"__3dNOW__");
845 Builder.defineMacro(
"__MMX__");
851 if (
CPU >= CK_i486 ||
CPU == CK_None) {
852 Builder.defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
853 Builder.defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
854 Builder.defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
857 Builder.defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
858 if (HasCX16 &&
getTriple().getArch() == llvm::Triple::x86_64)
859 Builder.defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_16");
862 Builder.defineMacro(
"__SIZEOF_FLOAT128__",
"16");
866 return llvm::StringSwitch<bool>(Name)
868 .Case(
"3dnowa",
true)
871 .Case(
"amx-bf16",
true)
872 .Case(
"amx-int8",
true)
873 .Case(
"amx-tile",
true)
876 .Case(
"avx512f",
true)
877 .Case(
"avx512cd",
true)
878 .Case(
"avx512vpopcntdq",
true)
879 .Case(
"avx512vnni",
true)
880 .Case(
"avx512bf16",
true)
881 .Case(
"avx512er",
true)
882 .Case(
"avx512fp16",
true)
883 .Case(
"avx512pf",
true)
884 .Case(
"avx512dq",
true)
885 .Case(
"avx512bitalg",
true)
886 .Case(
"avx512bw",
true)
887 .Case(
"avx512vl",
true)
888 .Case(
"avx512vbmi",
true)
889 .Case(
"avx512vbmi2",
true)
890 .Case(
"avx512ifma",
true)
891 .Case(
"avx512vp2intersect",
true)
892 .Case(
"avxvnni",
true)
895 .Case(
"cldemote",
true)
896 .Case(
"clflushopt",
true)
898 .Case(
"clzero",
true)
901 .Case(
"enqcmd",
true)
905 .Case(
"fsgsbase",
true)
907 .Case(
"general-regs-only",
true)
909 .Case(
"hreset",
true)
910 .Case(
"invpcid",
true)
912 .Case(
"widekl",
true)
917 .Case(
"movdiri",
true)
918 .Case(
"movdir64b",
true)
919 .Case(
"mwaitx",
true)
920 .Case(
"pclmul",
true)
921 .Case(
"pconfig",
true)
923 .Case(
"popcnt",
true)
924 .Case(
"prefetchwt1",
true)
925 .Case(
"prfchw",
true)
926 .Case(
"ptwrite",
true)
929 .Case(
"rdseed",
true)
932 .Case(
"serialize",
true)
941 .Case(
"sse4.1",
true)
942 .Case(
"sse4.2",
true)
945 .Case(
"tsxldtrk",
true)
948 .Case(
"vpclmulqdq",
true)
949 .Case(
"wbnoinvd",
true)
950 .Case(
"waitpkg",
true)
954 .Case(
"xsavec",
true)
955 .Case(
"xsaves",
true)
956 .Case(
"xsaveopt",
true)
961 return llvm::StringSwitch<bool>(Feature)
964 .Case(
"amx-bf16", HasAMXBF16)
965 .Case(
"amx-int8", HasAMXINT8)
966 .Case(
"amx-tile", HasAMXTILE)
967 .Case(
"avxvnni", HasAVXVNNI)
968 .Case(
"avx", SSELevel >= AVX)
969 .Case(
"avx2", SSELevel >= AVX2)
970 .Case(
"avx512f", SSELevel >= AVX512F)
971 .Case(
"avx512cd", HasAVX512CD)
972 .Case(
"avx512vpopcntdq", HasAVX512VPOPCNTDQ)
973 .Case(
"avx512vnni", HasAVX512VNNI)
974 .Case(
"avx512bf16", HasAVX512BF16)
975 .Case(
"avx512er", HasAVX512ER)
976 .Case(
"avx512fp16", HasAVX512FP16)
977 .Case(
"avx512pf", HasAVX512PF)
978 .Case(
"avx512dq", HasAVX512DQ)
979 .Case(
"avx512bitalg", HasAVX512BITALG)
980 .Case(
"avx512bw", HasAVX512BW)
981 .Case(
"avx512vl", HasAVX512VL)
982 .Case(
"avx512vbmi", HasAVX512VBMI)
983 .Case(
"avx512vbmi2", HasAVX512VBMI2)
984 .Case(
"avx512ifma", HasAVX512IFMA)
985 .Case(
"avx512vp2intersect", HasAVX512VP2INTERSECT)
987 .Case(
"bmi2", HasBMI2)
988 .Case(
"cldemote", HasCLDEMOTE)
989 .Case(
"clflushopt", HasCLFLUSHOPT)
990 .Case(
"clwb", HasCLWB)
991 .Case(
"clzero", HasCLZERO)
992 .Case(
"crc32", HasCRC32)
994 .Case(
"cx16", HasCX16)
995 .Case(
"enqcmd", HasENQCMD)
996 .Case(
"f16c", HasF16C)
998 .Case(
"fma4", XOPLevel >= FMA4)
999 .Case(
"fsgsbase", HasFSGSBASE)
1000 .Case(
"fxsr", HasFXSR)
1001 .Case(
"gfni", HasGFNI)
1002 .Case(
"hreset", HasHRESET)
1003 .Case(
"invpcid", HasINVPCID)
1005 .Case(
"widekl", HasWIDEKL)
1006 .Case(
"lwp", HasLWP)
1007 .Case(
"lzcnt", HasLZCNT)
1008 .Case(
"mm3dnow", MMX3DNowLevel >= AMD3DNow)
1009 .Case(
"mm3dnowa", MMX3DNowLevel >= AMD3DNowAthlon)
1010 .Case(
"mmx", MMX3DNowLevel >= MMX)
1011 .Case(
"movbe", HasMOVBE)
1012 .Case(
"movdiri", HasMOVDIRI)
1013 .Case(
"movdir64b", HasMOVDIR64B)
1014 .Case(
"mwaitx", HasMWAITX)
1015 .Case(
"pclmul", HasPCLMUL)
1016 .Case(
"pconfig", HasPCONFIG)
1017 .Case(
"pku", HasPKU)
1018 .Case(
"popcnt", HasPOPCNT)
1019 .Case(
"prefetchwt1", HasPREFETCHWT1)
1020 .Case(
"prfchw", HasPRFCHW)
1021 .Case(
"ptwrite", HasPTWRITE)
1022 .Case(
"rdpid", HasRDPID)
1023 .Case(
"rdrnd", HasRDRND)
1024 .Case(
"rdseed", HasRDSEED)
1025 .Case(
"retpoline-external-thunk", HasRetpolineExternalThunk)
1026 .Case(
"rtm", HasRTM)
1027 .Case(
"sahf", HasLAHFSAHF)
1028 .Case(
"serialize", HasSERIALIZE)
1029 .Case(
"sgx", HasSGX)
1030 .Case(
"sha", HasSHA)
1031 .Case(
"shstk", HasSHSTK)
1032 .Case(
"sse", SSELevel >= SSE1)
1033 .Case(
"sse2", SSELevel >= SSE2)
1034 .Case(
"sse3", SSELevel >= SSE3)
1035 .Case(
"ssse3", SSELevel >= SSSE3)
1036 .Case(
"sse4.1", SSELevel >= SSE41)
1037 .Case(
"sse4.2", SSELevel >= SSE42)
1038 .Case(
"sse4a", XOPLevel >= SSE4A)
1039 .Case(
"tbm", HasTBM)
1040 .Case(
"tsxldtrk", HasTSXLDTRK)
1041 .Case(
"uintr", HasUINTR)
1042 .Case(
"vaes", HasVAES)
1043 .Case(
"vpclmulqdq", HasVPCLMULQDQ)
1044 .Case(
"wbnoinvd", HasWBNOINVD)
1045 .Case(
"waitpkg", HasWAITPKG)
1047 .Case(
"x86_32",
getTriple().getArch() == llvm::Triple::x86)
1048 .Case(
"x86_64",
getTriple().getArch() == llvm::Triple::x86_64)
1049 .Case(
"x87", HasX87)
1050 .Case(
"xop", XOPLevel >= XOP)
1051 .Case(
"xsave", HasXSAVE)
1052 .Case(
"xsavec", HasXSAVEC)
1053 .Case(
"xsaves", HasXSAVES)
1054 .Case(
"xsaveopt", HasXSAVEOPT)
1064 return llvm::StringSwitch<bool>(FeatureStr)
1065 #define X86_FEATURE_COMPAT(ENUM, STR, PRIORITY) .Case(STR, true)
1066 #include "llvm/Support/X86TargetParser.def"
1071 return llvm::StringSwitch<llvm::X86::ProcessorFeatures>(Name)
1072 #define X86_FEATURE_COMPAT(ENUM, STR, PRIORITY) \
1073 .Case(STR, llvm::X86::FEATURE_##ENUM)
1075 #include "llvm/Support/X86TargetParser.def"
1084 using namespace llvm::X86;
1085 CPUKind
Kind = parseArchX86(Name);
1086 if (
Kind != CK_None) {
1087 ProcessorFeatures KeyFeature = getKeyFeature(
Kind);
1088 return (getFeaturePriority(KeyFeature) << 1) + 1;
1093 return getFeaturePriority(
getFeature(Name)) << 1;
1097 return llvm::StringSwitch<bool>(Name)
1098 #define CPU_SPECIFIC(NAME, TUNE_NAME, MANGLING, FEATURES) .Case(NAME, true)
1099 #define CPU_SPECIFIC_ALIAS(NEW_NAME, TUNE_NAME, NAME) .Case(NEW_NAME, true)
1100 #include "llvm/Support/X86TargetParser.def"
1105 return llvm::StringSwitch<StringRef>(Name)
1106 #define CPU_SPECIFIC_ALIAS(NEW_NAME, TUNE_NAME, NAME) .Case(NEW_NAME, NAME)
1107 #include "llvm/Support/X86TargetParser.def"
1113 #define CPU_SPECIFIC(NAME, TUNE_NAME, MANGLING, FEATURES) .Case(NAME, MANGLING)
1114 #include "llvm/Support/X86TargetParser.def"
1120 StringRef WholeList =
1122 #define CPU_SPECIFIC(NAME, TUNE_NAME, MANGLING, FEATURES) .Case(NAME, FEATURES)
1123 #include "llvm/Support/X86TargetParser.def"
1125 WholeList.split(Features,
',', -1,
false);
1129 return llvm::StringSwitch<StringRef>(Name)
1130 #define CPU_SPECIFIC(NAME, TUNE_NAME, MANGLING, FEATURES) .Case(NAME, TUNE_NAME)
1131 #define CPU_SPECIFIC_ALIAS(NEW_NAME, TUNE_NAME, NAME) .Case(NEW_NAME, TUNE_NAME)
1132 #include "llvm/Support/X86TargetParser.def"
1141 return llvm::StringSwitch<bool>(FeatureStr)
1142 #define X86_VENDOR(ENUM, STRING) .Case(STRING, true)
1143 #define X86_CPU_TYPE_ALIAS(ENUM, ALIAS) .Case(ALIAS, true)
1144 #define X86_CPU_TYPE(ENUM, STR) .Case(STR, true)
1145 #define X86_CPU_SUBTYPE(ENUM, STR) .Case(STR, true)
1146 #include "llvm/Support/X86TargetParser.def"
1151 auto RV = llvm::StringSwitch<unsigned>(Name)
1299 using namespace llvm::X86;
1339 case CK_GoldmontPlus:
1343 case CK_SandyBridge:
1347 case CK_SkylakeClient:
1348 case CK_SkylakeServer:
1349 case CK_Cascadelake:
1354 case CK_SapphireRapids:
1355 case CK_IcelakeClient:
1357 case CK_IcelakeServer:
1395 llvm_unreachable(
"Unknown CPU kind");
1399 StringRef Constraint,
1400 unsigned Size)
const {
1402 while (Constraint[0] ==
'=' || Constraint[0] ==
'+' || Constraint[0] ==
'&')
1403 Constraint = Constraint.substr(1);
1409 StringRef Constraint,
1410 unsigned Size)
const {
1415 StringRef Constraint,
1416 unsigned Size)
const {
1417 switch (Constraint[0]) {
1430 switch (Constraint[1]) {
1441 return Size <= 512
U;
1444 return Size <= 256
U;
1446 return Size <= 128
U;
1452 if (SSELevel < SSE2)
1461 return Size <= 512
U;
1464 return Size <= 256
U;
1465 return Size <= 128
U;
1473 switch (*Constraint) {
1477 Constraint += Len - 1;
1500 switch (Constraint[1]) {
1524 bool Only64Bit =
getTriple().getArch() != llvm::Triple::x86;
1525 llvm::X86::fillValidCPUArchList(Values, Only64Bit);
1529 llvm::X86::fillValidTuneCPUList(Values);
__DEVICE__ int max(int __a, int __b)
enum clang::targets::X86TargetInfo::FPMathKind FPMath
Optional< unsigned > getCPUCacheLineSize() const override
ArrayRef< TargetInfo::AddlRegName > getGCCAddlRegNames() const override
static unsigned matchAsmCCConstraint(const char *&Name)
bool isValidFeatureName(StringRef Name) const override
Determine whether this TargetInfo supports the given feature.
void getCPUSpecificCPUDispatchFeatures(StringRef Name, llvm::SmallVectorImpl< StringRef > &Features) const override
Concrete class used by the front-end to report problems and issues.
bool validateInputSize(const llvm::StringMap< bool > &FeatureMap, StringRef Constraint, unsigned Size) const override
bool validateCpuIs(StringRef Name) const override
void fillValidCPUList(SmallVectorImpl< StringRef > &Values) const override
Fill a SmallVectorImpl with the valid values to setCPU.
void setRequiresImmediate(int Min, int Max)
ArrayRef< Builtin::Info > getTargetBuiltins() const override
Return information about target-specific builtins for the current primary target, and info about whic...
unsigned short SimdDefaultAlign
void fillValidTuneCPUList(SmallVectorImpl< StringRef > &Values) const override
Fill a SmallVectorImpl with the valid values for tuning CPU.
void setFeatureEnabled(llvm::StringMap< bool > &Features, StringRef Name, bool Enabled) const final
Enable or disable a specific target feature; the feature name must be valid.
bool setFPMath(StringRef Name) override
Use the specified unit for FP math.
virtual bool initFeatureMap(llvm::StringMap< bool > &Features, DiagnosticsEngine &Diags, StringRef CPU, const std::vector< std::string > &FeatureVec) const
Initialize the map with the default set of target features for the CPU this should include all legal ...
static const char *const GCCRegNames[]
void DefineStd(MacroBuilder &Builder, StringRef MacroName, const LangOptions &Opts)
DefineStd - Define a macro name and standard variants.
unsigned multiVersionSortPriority(StringRef Name) const override
bool validateCPUSpecificCPUDispatch(StringRef Name) const override
bool initFeatureMap(llvm::StringMap< bool > &Features, DiagnosticsEngine &Diags, StringRef CPU, const std::vector< std::string > &FeaturesVec) const override
Initialize the map with the default set of target features for the CPU this should include all legal ...
std::string ConstraintStr
const llvm::Triple & getTriple() const
Returns the target triple of the primary target.
bool hasFeature(StringRef Feature) const final
Determine whether the given target has the given feature.
TargetOptions & getTargetOpts() const
Retrieve the target options.
bool handleTargetFeatures(std::vector< std::string > &Features, DiagnosticsEngine &Diags) override
handleTargetFeatures - Perform initialization based on the user configured set of features.
static llvm::X86::ProcessorFeatures getFeature(StringRef Name)
const llvm::fltSemantics * LongDoubleFormat
ArrayRef< Builtin::Info > getTargetBuiltins() const override
Return information about target-specific builtins for the current primary target, and info about whic...
StringRef getCPUSpecificTuneName(StringRef Name) const override
bool validateCpuSupports(StringRef Name) const override
bool validateOutputSize(const llvm::StringMap< bool > &FeatureMap, StringRef Constraint, unsigned Size) const override
Keeps track of the various options that can be enabled, which controls the dialect of C or C++ that i...
const TargetInfo::AddlRegName AddlRegNames[]
std::string convertConstraint(const char *&Constraint) const override
virtual bool hasFeatureEnabled(const llvm::StringMap< bool > &Features, StringRef Name) const
Check if target has a given feature enabled.
char CPUSpecificManglingCharacter(StringRef Name) const override
virtual bool validateOperandSize(const llvm::StringMap< bool > &FeatureMap, StringRef Constraint, unsigned Size) const
const Builtin::Info BuiltinInfoX86[]
void defineCPUMacros(MacroBuilder &Builder, StringRef CPUName, bool Tuning)
bool validateAsmConstraint(const char *&Name, TargetInfo::ConstraintInfo &info) const override
ArrayRef< const char * > getGCCRegNames() const override
void getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const override
X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro definitions for this parti...
DiagnosticBuilder Report(SourceLocation Loc, unsigned DiagID)
Issue the message to the client.
static StringRef CPUSpecificCPUDispatchNameDealias(StringRef Name)