clang 17.0.0git
X86.h
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1//===--- X86.h - Declare X86 target feature support -------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file declares X86 TargetInfo objects.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_X86_H
14#define LLVM_CLANG_LIB_BASIC_TARGETS_X86_H
15
16#include "OSTargets.h"
20#include "llvm/Support/Compiler.h"
21#include "llvm/TargetParser/Triple.h"
22#include "llvm/TargetParser/X86TargetParser.h"
23#include <optional>
24
25namespace clang {
26namespace targets {
27
28static const unsigned X86AddrSpaceMap[] = {
29 0, // Default
30 0, // opencl_global
31 0, // opencl_local
32 0, // opencl_constant
33 0, // opencl_private
34 0, // opencl_generic
35 0, // opencl_global_device
36 0, // opencl_global_host
37 0, // cuda_device
38 0, // cuda_constant
39 0, // cuda_shared
40 0, // sycl_global
41 0, // sycl_global_device
42 0, // sycl_global_host
43 0, // sycl_local
44 0, // sycl_private
45 270, // ptr32_sptr
46 271, // ptr32_uptr
47 272, // ptr64
48 0, // hlsl_groupshared
49 // Wasm address space values for this target are dummy values,
50 // as it is only enabled for Wasm targets.
51 20, // wasm_funcref
52};
53
54// X86 target abstract base class; x86-32 and x86-64 are very close, so
55// most of the implementation can be shared.
56class LLVM_LIBRARY_VISIBILITY X86TargetInfo : public TargetInfo {
57
58 enum X86SSEEnum {
59 NoSSE,
60 SSE1,
61 SSE2,
62 SSE3,
63 SSSE3,
64 SSE41,
65 SSE42,
66 AVX,
67 AVX2,
68 AVX512F
69 } SSELevel = NoSSE;
70 enum MMX3DNowEnum {
71 NoMMX3DNow,
72 MMX,
73 AMD3DNow,
74 AMD3DNowAthlon
75 } MMX3DNowLevel = NoMMX3DNow;
76 enum XOPEnum { NoXOP, SSE4A, FMA4, XOP } XOPLevel = NoXOP;
77 enum AddrSpace { ptr32_sptr = 270, ptr32_uptr = 271, ptr64 = 272 };
78
79 bool HasAES = false;
80 bool HasVAES = false;
81 bool HasPCLMUL = false;
82 bool HasVPCLMULQDQ = false;
83 bool HasGFNI = false;
84 bool HasLZCNT = false;
85 bool HasRDRND = false;
86 bool HasFSGSBASE = false;
87 bool HasBMI = false;
88 bool HasBMI2 = false;
89 bool HasPOPCNT = false;
90 bool HasRTM = false;
91 bool HasPRFCHW = false;
92 bool HasRDSEED = false;
93 bool HasADX = false;
94 bool HasTBM = false;
95 bool HasLWP = false;
96 bool HasFMA = false;
97 bool HasF16C = false;
98 bool HasAVX512CD = false;
99 bool HasAVX512VPOPCNTDQ = false;
100 bool HasAVX512VNNI = false;
101 bool HasAVX512FP16 = false;
102 bool HasAVX512BF16 = false;
103 bool HasAVX512ER = false;
104 bool HasAVX512PF = false;
105 bool HasAVX512DQ = false;
106 bool HasAVX512BITALG = false;
107 bool HasAVX512BW = false;
108 bool HasAVX512VL = false;
109 bool HasAVX512VBMI = false;
110 bool HasAVX512VBMI2 = false;
111 bool HasAVXIFMA = false;
112 bool HasAVX512IFMA = false;
113 bool HasAVX512VP2INTERSECT = false;
114 bool HasSHA = false;
115 bool HasSHSTK = false;
116 bool HasSGX = false;
117 bool HasCX8 = false;
118 bool HasCX16 = false;
119 bool HasFXSR = false;
120 bool HasXSAVE = false;
121 bool HasXSAVEOPT = false;
122 bool HasXSAVEC = false;
123 bool HasXSAVES = false;
124 bool HasMWAITX = false;
125 bool HasCLZERO = false;
126 bool HasCLDEMOTE = false;
127 bool HasPCONFIG = false;
128 bool HasPKU = false;
129 bool HasCLFLUSHOPT = false;
130 bool HasCLWB = false;
131 bool HasMOVBE = false;
132 bool HasPREFETCHI = false;
133 bool HasPREFETCHWT1 = false;
134 bool HasRDPID = false;
135 bool HasRDPRU = false;
136 bool HasRetpolineExternalThunk = false;
137 bool HasLAHFSAHF = false;
138 bool HasWBNOINVD = false;
139 bool HasWAITPKG = false;
140 bool HasMOVDIRI = false;
141 bool HasMOVDIR64B = false;
142 bool HasPTWRITE = false;
143 bool HasINVPCID = false;
144 bool HasENQCMD = false;
145 bool HasAMXFP16 = false;
146 bool HasCMPCCXADD = false;
147 bool HasRAOINT = false;
148 bool HasAVXVNNIINT8 = false;
149 bool HasAVXNECONVERT = false;
150 bool HasKL = false; // For key locker
151 bool HasWIDEKL = false; // For wide key locker
152 bool HasHRESET = false;
153 bool HasAVXVNNI = false;
154 bool HasAMXTILE = false;
155 bool HasAMXINT8 = false;
156 bool HasAMXBF16 = false;
157 bool HasSERIALIZE = false;
158 bool HasTSXLDTRK = false;
159 bool HasUINTR = false;
160 bool HasCRC32 = false;
161 bool HasX87 = false;
162
163protected:
164 llvm::X86::CPUKind CPU = llvm::X86::CK_None;
165
166 enum FPMathKind { FP_Default, FP_SSE, FP_387 } FPMath = FP_Default;
167
168public:
169 X86TargetInfo(const llvm::Triple &Triple, const TargetOptions &)
170 : TargetInfo(Triple) {
171 BFloat16Width = BFloat16Align = 16;
172 BFloat16Format = &llvm::APFloat::BFloat();
173 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended();
174 AddrSpaceMap = &X86AddrSpaceMap;
175 HasStrictFP = true;
176
177 bool IsWinCOFF =
178 getTriple().isOSWindows() && getTriple().isOSBinFormatCOFF();
179 if (IsWinCOFF)
180 MaxVectorAlign = MaxTLSAlign = 8192u * getCharWidth();
181 }
182
183 const char *getLongDoubleMangling() const override {
184 return LongDoubleFormat == &llvm::APFloat::IEEEquad() ? "g" : "e";
185 }
186
188 // X87 evaluates with 80 bits "long double" precision.
189 return SSELevel == NoSSE ? LangOptions::FPEvalMethodKind::FEM_Extended
190 : LangOptions::FPEvalMethodKind::FEM_Source;
191 }
192
193 // EvalMethod `source` is not supported for targets with `NoSSE` feature.
194 bool supportSourceEvalMethod() const override { return SSELevel > NoSSE; }
195
196 ArrayRef<const char *> getGCCRegNames() const override;
197
199 return std::nullopt;
200 }
201
202 ArrayRef<TargetInfo::AddlRegName> getGCCAddlRegNames() const override;
203
204 bool isSPRegName(StringRef RegName) const override {
205 return RegName.equals("esp") || RegName.equals("rsp");
206 }
207
208 bool validateCpuSupports(StringRef Name) const override;
209
210 bool validateCpuIs(StringRef Name) const override;
211
212 bool validateCPUSpecificCPUDispatch(StringRef Name) const override;
213
214 char CPUSpecificManglingCharacter(StringRef Name) const override;
215
216 void getCPUSpecificCPUDispatchFeatures(
217 StringRef Name,
218 llvm::SmallVectorImpl<StringRef> &Features) const override;
219
220 StringRef getCPUSpecificTuneName(StringRef Name) const override;
221
222 std::optional<unsigned> getCPUCacheLineSize() const override;
223
224 bool validateAsmConstraint(const char *&Name,
225 TargetInfo::ConstraintInfo &info) const override;
226
227 bool validateGlobalRegisterVariable(StringRef RegName, unsigned RegSize,
228 bool &HasSizeMismatch) const override {
229 // esp and ebp are the only 32-bit registers the x86 backend can currently
230 // handle.
231 if (RegName.equals("esp") || RegName.equals("ebp")) {
232 // Check that the register size is 32-bit.
233 HasSizeMismatch = RegSize != 32;
234 return true;
235 }
236
237 return false;
238 }
239
240 bool validateOutputSize(const llvm::StringMap<bool> &FeatureMap,
241 StringRef Constraint, unsigned Size) const override;
242
243 bool validateInputSize(const llvm::StringMap<bool> &FeatureMap,
244 StringRef Constraint, unsigned Size) const override;
245
246 bool
248 if (CPU == llvm::X86::CK_None || CPU >= llvm::X86::CK_PentiumPro)
249 return true;
250 return TargetInfo::checkCFProtectionReturnSupported(Diags);
251 };
252
253 bool
255 if (CPU == llvm::X86::CK_None || CPU >= llvm::X86::CK_PentiumPro)
256 return true;
257 return TargetInfo::checkCFProtectionBranchSupported(Diags);
258 };
259
260 virtual bool validateOperandSize(const llvm::StringMap<bool> &FeatureMap,
261 StringRef Constraint, unsigned Size) const;
262
263 std::string convertConstraint(const char *&Constraint) const override;
264 const char *getClobbers() const override {
265 return "~{dirflag},~{fpsr},~{flags}";
266 }
267
268 StringRef getConstraintRegister(StringRef Constraint,
269 StringRef Expression) const override {
270 StringRef::iterator I, E;
271 for (I = Constraint.begin(), E = Constraint.end(); I != E; ++I) {
272 if (isalpha(*I) || *I == '@')
273 break;
274 }
275 if (I == E)
276 return "";
277 switch (*I) {
278 // For the register constraints, return the matching register name
279 case 'a':
280 return "ax";
281 case 'b':
282 return "bx";
283 case 'c':
284 return "cx";
285 case 'd':
286 return "dx";
287 case 'S':
288 return "si";
289 case 'D':
290 return "di";
291 // In case the constraint is 'r' we need to return Expression
292 case 'r':
293 return Expression;
294 // Double letters Y<x> constraints
295 case 'Y':
296 if ((++I != E) && ((*I == '0') || (*I == 'z')))
297 return "xmm0";
298 break;
299 default:
300 break;
301 }
302 return "";
303 }
304
305 bool useFP16ConversionIntrinsics() const override {
306 return false;
307 }
308
309 void getTargetDefines(const LangOptions &Opts,
310 MacroBuilder &Builder) const override;
311
312 void setFeatureEnabled(llvm::StringMap<bool> &Features, StringRef Name,
313 bool Enabled) const final;
314
315 bool
316 initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags,
317 StringRef CPU,
318 const std::vector<std::string> &FeaturesVec) const override;
319
320 bool isValidFeatureName(StringRef Name) const override;
321
322 bool hasFeature(StringRef Feature) const final;
323
324 bool handleTargetFeatures(std::vector<std::string> &Features,
325 DiagnosticsEngine &Diags) override;
326
327 StringRef getABI() const override {
328 if (getTriple().getArch() == llvm::Triple::x86_64 && SSELevel >= AVX512F)
329 return "avx512";
330 if (getTriple().getArch() == llvm::Triple::x86_64 && SSELevel >= AVX)
331 return "avx";
332 if (getTriple().getArch() == llvm::Triple::x86 &&
333 MMX3DNowLevel == NoMMX3DNow)
334 return "no-mmx";
335 return "";
336 }
337
338 bool supportsTargetAttributeTune() const override {
339 return true;
340 }
341
342 bool isValidCPUName(StringRef Name) const override {
343 bool Only64Bit = getTriple().getArch() != llvm::Triple::x86;
344 return llvm::X86::parseArchX86(Name, Only64Bit) != llvm::X86::CK_None;
345 }
346
347 bool isValidTuneCPUName(StringRef Name) const override {
348 if (Name == "generic")
349 return true;
350
351 // Allow 32-bit only CPUs regardless of 64-bit mode unlike isValidCPUName.
352 // NOTE: gcc rejects 32-bit mtune CPUs in 64-bit mode. But being lenient
353 // since mtune was ignored by clang for so long.
354 return llvm::X86::parseTuneCPU(Name) != llvm::X86::CK_None;
355 }
356
357 void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
358 void fillValidTuneCPUList(SmallVectorImpl<StringRef> &Values) const override;
359
360 bool setCPU(const std::string &Name) override {
361 bool Only64Bit = getTriple().getArch() != llvm::Triple::x86;
362 CPU = llvm::X86::parseArchX86(Name, Only64Bit);
363 return CPU != llvm::X86::CK_None;
364 }
365
366 unsigned multiVersionSortPriority(StringRef Name) const override;
367
368 bool setFPMath(StringRef Name) override;
369
370 bool supportsExtendIntArgs() const override {
371 return getTriple().getArch() != llvm::Triple::x86;
372 }
373
375 // Most of the non-ARM calling conventions are i386 conventions.
376 switch (CC) {
377 case CC_X86ThisCall:
378 case CC_X86FastCall:
379 case CC_X86StdCall:
380 case CC_X86VectorCall:
381 case CC_X86RegCall:
382 case CC_C:
383 case CC_PreserveMost:
384 case CC_Swift:
385 case CC_X86Pascal:
386 case CC_IntelOclBicc:
387 case CC_OpenCLKernel:
388 return CCCR_OK;
389 case CC_SwiftAsync:
390 return CCCR_Error;
391 default:
392 return CCCR_Warning;
393 }
394 }
395
396 bool checkArithmeticFenceSupported() const override { return true; }
397
399 return CC_C;
400 }
401
402 bool hasSjLjLowering() const override { return true; }
403
404 void setSupportedOpenCLOpts() override { supportAllOpenCLOpts(); }
405
406 uint64_t getPointerWidthV(LangAS AS) const override {
407 unsigned TargetAddrSpace = getTargetAddressSpace(AS);
408 if (TargetAddrSpace == ptr32_sptr || TargetAddrSpace == ptr32_uptr)
409 return 32;
410 if (TargetAddrSpace == ptr64)
411 return 64;
412 return PointerWidth;
413 }
414
415 uint64_t getPointerAlignV(LangAS AddrSpace) const override {
416 return getPointerWidthV(AddrSpace);
417 }
418
419 const char *getBFloat16Mangling() const override { return "u6__bf16"; };
420};
421
422// X86-32 generic target
423class LLVM_LIBRARY_VISIBILITY X86_32TargetInfo : public X86TargetInfo {
424public:
425 X86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
426 : X86TargetInfo(Triple, Opts) {
427 DoubleAlign = LongLongAlign = 32;
428 LongDoubleWidth = 96;
429 LongDoubleAlign = 32;
430 SuitableAlign = 128;
431 resetDataLayout(
432 Triple.isOSBinFormatMachO()
433 ? "e-m:o-p:32:32-p270:32:32-p271:32:32-p272:64:64-f64:32:64-"
434 "f80:32-n8:16:32-S128"
435 : "e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-f64:32:64-"
436 "f80:32-n8:16:32-S128",
437 Triple.isOSBinFormatMachO() ? "_" : "");
438 SizeType = UnsignedInt;
439 PtrDiffType = SignedInt;
440 IntPtrType = SignedInt;
441 RegParmMax = 3;
442
443 // Use fpret for all types.
444 RealTypeUsesObjCFPRetMask =
445 (unsigned)(FloatModeKind::Float | FloatModeKind::Double |
446 FloatModeKind::LongDouble);
447
448 // x86-32 has atomics up to 8 bytes
449 MaxAtomicPromoteWidth = 64;
450 MaxAtomicInlineWidth = 32;
451 }
452
454 return TargetInfo::CharPtrBuiltinVaList;
455 }
456
457 int getEHDataRegisterNumber(unsigned RegNo) const override {
458 if (RegNo == 0)
459 return 0;
460 if (RegNo == 1)
461 return 2;
462 return -1;
463 }
464
465 bool validateOperandSize(const llvm::StringMap<bool> &FeatureMap,
466 StringRef Constraint, unsigned Size) const override {
467 switch (Constraint[0]) {
468 default:
469 break;
470 case 'R':
471 case 'q':
472 case 'Q':
473 case 'a':
474 case 'b':
475 case 'c':
476 case 'd':
477 case 'S':
478 case 'D':
479 return Size <= 32;
480 case 'A':
481 return Size <= 64;
482 }
483
484 return X86TargetInfo::validateOperandSize(FeatureMap, Constraint, Size);
485 }
486
487 void setMaxAtomicWidth() override {
488 if (hasFeature("cx8"))
489 MaxAtomicInlineWidth = 64;
490 }
491
492 ArrayRef<Builtin::Info> getTargetBuiltins() const override;
493
494 bool hasBitIntType() const override { return true; }
495 size_t getMaxBitIntWidth() const override {
496 return llvm::IntegerType::MAX_INT_BITS;
497 }
498};
499
500class LLVM_LIBRARY_VISIBILITY NetBSDI386TargetInfo
501 : public NetBSDTargetInfo<X86_32TargetInfo> {
502public:
503 NetBSDI386TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
504 : NetBSDTargetInfo<X86_32TargetInfo>(Triple, Opts) {}
505
507 VersionTuple OsVersion = getTriple().getOSVersion();
508 // New NetBSD uses the default rounding mode.
509 if (OsVersion >= VersionTuple(6, 99, 26) || OsVersion.getMajor() == 0)
510 return X86_32TargetInfo::getFPEvalMethod();
511 // NetBSD before 6.99.26 defaults to "double" rounding.
512 return LangOptions::FPEvalMethodKind::FEM_Double;
513 }
514};
515
516class LLVM_LIBRARY_VISIBILITY OpenBSDI386TargetInfo
517 : public OpenBSDTargetInfo<X86_32TargetInfo> {
518public:
519 OpenBSDI386TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
520 : OpenBSDTargetInfo<X86_32TargetInfo>(Triple, Opts) {
521 SizeType = UnsignedLong;
522 IntPtrType = SignedLong;
523 PtrDiffType = SignedLong;
524 }
525};
526
527class LLVM_LIBRARY_VISIBILITY DarwinI386TargetInfo
528 : public DarwinTargetInfo<X86_32TargetInfo> {
529public:
530 DarwinI386TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
531 : DarwinTargetInfo<X86_32TargetInfo>(Triple, Opts) {
532 LongDoubleWidth = 128;
533 LongDoubleAlign = 128;
534 SuitableAlign = 128;
535 MaxVectorAlign = 256;
536 // The watchOS simulator uses the builtin bool type for Objective-C.
537 llvm::Triple T = llvm::Triple(Triple);
538 if (T.isWatchOS())
539 UseSignedCharForObjCBool = false;
540 SizeType = UnsignedLong;
541 IntPtrType = SignedLong;
542 resetDataLayout("e-m:o-p:32:32-p270:32:32-p271:32:32-p272:64:64-f64:32:64-"
543 "f80:128-n8:16:32-S128", "_");
544 HasAlignMac68kSupport = true;
545 }
546
547 bool handleTargetFeatures(std::vector<std::string> &Features,
548 DiagnosticsEngine &Diags) override {
550 Diags))
551 return false;
552 // We now know the features we have: we can decide how to align vectors.
553 MaxVectorAlign =
554 hasFeature("avx512f") ? 512 : hasFeature("avx") ? 256 : 128;
555 return true;
556 }
557};
558
559// x86-32 Windows target
560class LLVM_LIBRARY_VISIBILITY WindowsX86_32TargetInfo
561 : public WindowsTargetInfo<X86_32TargetInfo> {
562public:
563 WindowsX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
564 : WindowsTargetInfo<X86_32TargetInfo>(Triple, Opts) {
565 DoubleAlign = LongLongAlign = 64;
566 bool IsWinCOFF =
567 getTriple().isOSWindows() && getTriple().isOSBinFormatCOFF();
568 bool IsMSVC = getTriple().isWindowsMSVCEnvironment();
569 std::string Layout = IsWinCOFF ? "e-m:x" : "e-m:e";
570 Layout += "-p:32:32-p270:32:32-p271:32:32-p272:64:64-i64:64-";
571 Layout += IsMSVC ? "f80:128" : "f80:32";
572 Layout += "-n8:16:32-a:0:32-S32";
573 resetDataLayout(Layout, IsWinCOFF ? "_" : "");
574 }
575};
576
577// x86-32 Windows Visual Studio target
578class LLVM_LIBRARY_VISIBILITY MicrosoftX86_32TargetInfo
579 : public WindowsX86_32TargetInfo {
580public:
581 MicrosoftX86_32TargetInfo(const llvm::Triple &Triple,
582 const TargetOptions &Opts)
583 : WindowsX86_32TargetInfo(Triple, Opts) {
584 LongDoubleWidth = LongDoubleAlign = 64;
585 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
586 }
587
589 MacroBuilder &Builder) const override {
590 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
591 // The value of the following reflects processor type.
592 // 300=386, 400=486, 500=Pentium, 600=Blend (default)
593 // We lost the original triple, so we use the default.
594 Builder.defineMacro("_M_IX86", "600");
595 }
596};
597
598// x86-32 MinGW target
599class LLVM_LIBRARY_VISIBILITY MinGWX86_32TargetInfo
600 : public WindowsX86_32TargetInfo {
601public:
602 MinGWX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
603 : WindowsX86_32TargetInfo(Triple, Opts) {
604 HasFloat128 = true;
605 }
606
608 MacroBuilder &Builder) const override {
609 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
610 Builder.defineMacro("_X86_");
611 }
612};
613
614// x86-32 Cygwin target
615class LLVM_LIBRARY_VISIBILITY CygwinX86_32TargetInfo : public X86_32TargetInfo {
616public:
617 CygwinX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
618 : X86_32TargetInfo(Triple, Opts) {
619 this->WCharType = TargetInfo::UnsignedShort;
620 DoubleAlign = LongLongAlign = 64;
621 resetDataLayout("e-m:x-p:32:32-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:"
622 "32-n8:16:32-a:0:32-S32",
623 "_");
624 }
625
627 MacroBuilder &Builder) const override {
628 X86_32TargetInfo::getTargetDefines(Opts, Builder);
629 Builder.defineMacro("_X86_");
630 Builder.defineMacro("__CYGWIN__");
631 Builder.defineMacro("__CYGWIN32__");
632 addCygMingDefines(Opts, Builder);
633 DefineStd(Builder, "unix", Opts);
634 if (Opts.CPlusPlus)
635 Builder.defineMacro("_GNU_SOURCE");
636 }
637};
638
639// x86-32 Haiku target
640class LLVM_LIBRARY_VISIBILITY HaikuX86_32TargetInfo
641 : public HaikuTargetInfo<X86_32TargetInfo> {
642public:
643 HaikuX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
644 : HaikuTargetInfo<X86_32TargetInfo>(Triple, Opts) {}
645
647 MacroBuilder &Builder) const override {
649 Builder.defineMacro("__INTEL__");
650 }
651};
652
653// X86-32 MCU target
654class LLVM_LIBRARY_VISIBILITY MCUX86_32TargetInfo : public X86_32TargetInfo {
655public:
656 MCUX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
657 : X86_32TargetInfo(Triple, Opts) {
658 LongDoubleWidth = 64;
659 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
660 resetDataLayout("e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-i64:32-f64:"
661 "32-f128:32-n8:16:32-a:0:32-S32");
662 WIntType = UnsignedInt;
663 }
664
666 // On MCU we support only C calling convention.
667 return CC == CC_C ? CCCR_OK : CCCR_Warning;
668 }
669
671 MacroBuilder &Builder) const override {
672 X86_32TargetInfo::getTargetDefines(Opts, Builder);
673 Builder.defineMacro("__iamcu");
674 Builder.defineMacro("__iamcu__");
675 }
676
677 bool allowsLargerPreferedTypeAlignment() const override { return false; }
678};
679
680// x86-32 RTEMS target
681class LLVM_LIBRARY_VISIBILITY RTEMSX86_32TargetInfo : public X86_32TargetInfo {
682public:
683 RTEMSX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
684 : X86_32TargetInfo(Triple, Opts) {
685 SizeType = UnsignedLong;
686 IntPtrType = SignedLong;
687 PtrDiffType = SignedLong;
688 }
689
691 MacroBuilder &Builder) const override {
692 X86_32TargetInfo::getTargetDefines(Opts, Builder);
693 Builder.defineMacro("__INTEL__");
694 Builder.defineMacro("__rtems__");
695 }
696};
697
698// x86-64 generic target
699class LLVM_LIBRARY_VISIBILITY X86_64TargetInfo : public X86TargetInfo {
700public:
701 X86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
702 : X86TargetInfo(Triple, Opts) {
703 const bool IsX32 = getTriple().isX32();
704 bool IsWinCOFF =
705 getTriple().isOSWindows() && getTriple().isOSBinFormatCOFF();
706 LongWidth = LongAlign = PointerWidth = PointerAlign = IsX32 ? 32 : 64;
707 LongDoubleWidth = 128;
708 LongDoubleAlign = 128;
709 LargeArrayMinWidth = 128;
710 LargeArrayAlign = 128;
711 SuitableAlign = 128;
712 SizeType = IsX32 ? UnsignedInt : UnsignedLong;
713 PtrDiffType = IsX32 ? SignedInt : SignedLong;
714 IntPtrType = IsX32 ? SignedInt : SignedLong;
715 IntMaxType = IsX32 ? SignedLongLong : SignedLong;
716 Int64Type = IsX32 ? SignedLongLong : SignedLong;
717 RegParmMax = 6;
718
719 // Pointers are 32-bit in x32.
720 resetDataLayout(IsX32 ? "e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-"
721 "i64:64-f80:128-n8:16:32:64-S128"
722 : IsWinCOFF ? "e-m:w-p270:32:32-p271:32:32-p272:64:"
723 "64-i64:64-f80:128-n8:16:32:64-S128"
724 : "e-m:e-p270:32:32-p271:32:32-p272:64:"
725 "64-i64:64-f80:128-n8:16:32:64-S128");
726
727 // Use fpret only for long double.
728 RealTypeUsesObjCFPRetMask = (unsigned)FloatModeKind::LongDouble;
729
730 // Use fp2ret for _Complex long double.
731 ComplexLongDoubleUsesFP2Ret = true;
732
733 // Make __builtin_ms_va_list available.
734 HasBuiltinMSVaList = true;
735
736 // x86-64 has atomics up to 16 bytes.
737 MaxAtomicPromoteWidth = 128;
738 MaxAtomicInlineWidth = 64;
739 }
740
742 return TargetInfo::X86_64ABIBuiltinVaList;
743 }
744
745 int getEHDataRegisterNumber(unsigned RegNo) const override {
746 if (RegNo == 0)
747 return 0;
748 if (RegNo == 1)
749 return 1;
750 return -1;
751 }
752
754 switch (CC) {
755 case CC_C:
756 case CC_Swift:
757 case CC_SwiftAsync:
758 case CC_X86VectorCall:
759 case CC_IntelOclBicc:
760 case CC_Win64:
761 case CC_PreserveMost:
762 case CC_PreserveAll:
763 case CC_X86RegCall:
764 case CC_OpenCLKernel:
765 return CCCR_OK;
766 default:
767 return CCCR_Warning;
768 }
769 }
770
772 return CC_C;
773 }
774
775 // for x32 we need it here explicitly
776 bool hasInt128Type() const override { return true; }
777
778 unsigned getUnwindWordWidth() const override { return 64; }
779
780 unsigned getRegisterWidth() const override { return 64; }
781
782 bool validateGlobalRegisterVariable(StringRef RegName, unsigned RegSize,
783 bool &HasSizeMismatch) const override {
784 // rsp and rbp are the only 64-bit registers the x86 backend can currently
785 // handle.
786 if (RegName.equals("rsp") || RegName.equals("rbp")) {
787 // Check that the register size is 64-bit.
788 HasSizeMismatch = RegSize != 64;
789 return true;
790 }
791
792 // Check if the register is a 32-bit register the backend can handle.
793 return X86TargetInfo::validateGlobalRegisterVariable(RegName, RegSize,
794 HasSizeMismatch);
795 }
796
797 void setMaxAtomicWidth() override {
798 if (hasFeature("cx16"))
799 MaxAtomicInlineWidth = 128;
800 }
801
802 ArrayRef<Builtin::Info> getTargetBuiltins() const override;
803
804 bool hasBitIntType() const override { return true; }
805 size_t getMaxBitIntWidth() const override {
806 return llvm::IntegerType::MAX_INT_BITS;
807 }
808};
809
810// x86-64 Windows target
811class LLVM_LIBRARY_VISIBILITY WindowsX86_64TargetInfo
812 : public WindowsTargetInfo<X86_64TargetInfo> {
813public:
814 WindowsX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
815 : WindowsTargetInfo<X86_64TargetInfo>(Triple, Opts) {
816 LongWidth = LongAlign = 32;
817 DoubleAlign = LongLongAlign = 64;
818 IntMaxType = SignedLongLong;
819 Int64Type = SignedLongLong;
820 SizeType = UnsignedLongLong;
821 PtrDiffType = SignedLongLong;
822 IntPtrType = SignedLongLong;
823 }
824
825 BuiltinVaListKind getBuiltinVaListKind() const override {
826 return TargetInfo::CharPtrBuiltinVaList;
827 }
828
829 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
830 switch (CC) {
831 case CC_X86StdCall:
832 case CC_X86ThisCall:
833 case CC_X86FastCall:
834 return CCCR_Ignore;
835 case CC_C:
836 case CC_X86VectorCall:
837 case CC_IntelOclBicc:
838 case CC_PreserveMost:
839 case CC_PreserveAll:
840 case CC_X86_64SysV:
841 case CC_Swift:
842 case CC_SwiftAsync:
843 case CC_X86RegCall:
844 case CC_OpenCLKernel:
845 return CCCR_OK;
846 default:
847 return CCCR_Warning;
848 }
849 }
850};
851
852// x86-64 Windows Visual Studio target
853class LLVM_LIBRARY_VISIBILITY MicrosoftX86_64TargetInfo
854 : public WindowsX86_64TargetInfo {
855public:
856 MicrosoftX86_64TargetInfo(const llvm::Triple &Triple,
857 const TargetOptions &Opts)
858 : WindowsX86_64TargetInfo(Triple, Opts) {
859 LongDoubleWidth = LongDoubleAlign = 64;
860 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
861 }
862
864 MacroBuilder &Builder) const override {
865 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
866 Builder.defineMacro("_M_X64", "100");
867 Builder.defineMacro("_M_AMD64", "100");
868 }
869
871 getCallingConvKind(bool ClangABICompat4) const override {
872 return CCK_MicrosoftWin64;
873 }
874};
875
876// x86-64 MinGW target
877class LLVM_LIBRARY_VISIBILITY MinGWX86_64TargetInfo
878 : public WindowsX86_64TargetInfo {
879public:
880 MinGWX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
881 : WindowsX86_64TargetInfo(Triple, Opts) {
882 // Mingw64 rounds long double size and alignment up to 16 bytes, but sticks
883 // with x86 FP ops. Weird.
884 LongDoubleWidth = LongDoubleAlign = 128;
885 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended();
886 HasFloat128 = true;
887 }
888};
889
890// x86-64 Cygwin target
891class LLVM_LIBRARY_VISIBILITY CygwinX86_64TargetInfo : public X86_64TargetInfo {
892public:
893 CygwinX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
894 : X86_64TargetInfo(Triple, Opts) {
895 this->WCharType = TargetInfo::UnsignedShort;
896 TLSSupported = false;
897 }
898
900 MacroBuilder &Builder) const override {
901 X86_64TargetInfo::getTargetDefines(Opts, Builder);
902 Builder.defineMacro("__x86_64__");
903 Builder.defineMacro("__CYGWIN__");
904 Builder.defineMacro("__CYGWIN64__");
905 addCygMingDefines(Opts, Builder);
906 DefineStd(Builder, "unix", Opts);
907 if (Opts.CPlusPlus)
908 Builder.defineMacro("_GNU_SOURCE");
909 }
910};
911
912class LLVM_LIBRARY_VISIBILITY DarwinX86_64TargetInfo
913 : public DarwinTargetInfo<X86_64TargetInfo> {
914public:
915 DarwinX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
916 : DarwinTargetInfo<X86_64TargetInfo>(Triple, Opts) {
917 Int64Type = SignedLongLong;
918 // The 64-bit iOS simulator uses the builtin bool type for Objective-C.
919 llvm::Triple T = llvm::Triple(Triple);
920 if (T.isiOS())
921 UseSignedCharForObjCBool = false;
922 resetDataLayout("e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:"
923 "16:32:64-S128", "_");
924 }
925
926 bool handleTargetFeatures(std::vector<std::string> &Features,
927 DiagnosticsEngine &Diags) override {
929 Diags))
930 return false;
931 // We now know the features we have: we can decide how to align vectors.
932 MaxVectorAlign =
933 hasFeature("avx512f") ? 512 : hasFeature("avx") ? 256 : 128;
934 return true;
935 }
936};
937
938class LLVM_LIBRARY_VISIBILITY OpenBSDX86_64TargetInfo
939 : public OpenBSDTargetInfo<X86_64TargetInfo> {
940public:
941 OpenBSDX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
942 : OpenBSDTargetInfo<X86_64TargetInfo>(Triple, Opts) {
943 IntMaxType = SignedLongLong;
944 Int64Type = SignedLongLong;
945 }
946};
947
948// x86_32 Android target
949class LLVM_LIBRARY_VISIBILITY AndroidX86_32TargetInfo
950 : public LinuxTargetInfo<X86_32TargetInfo> {
951public:
952 AndroidX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
953 : LinuxTargetInfo<X86_32TargetInfo>(Triple, Opts) {
954 SuitableAlign = 32;
955 LongDoubleWidth = 64;
956 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
957 }
958};
959
960// x86_64 Android target
961class LLVM_LIBRARY_VISIBILITY AndroidX86_64TargetInfo
962 : public LinuxTargetInfo<X86_64TargetInfo> {
963public:
964 AndroidX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
965 : LinuxTargetInfo<X86_64TargetInfo>(Triple, Opts) {
966 LongDoubleFormat = &llvm::APFloat::IEEEquad();
967 }
968};
969
970// x86_32 OHOS target
971class LLVM_LIBRARY_VISIBILITY OHOSX86_32TargetInfo
972 : public OHOSTargetInfo<X86_32TargetInfo> {
973public:
974 OHOSX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
975 : OHOSTargetInfo<X86_32TargetInfo>(Triple, Opts) {
976 SuitableAlign = 32;
977 LongDoubleWidth = 64;
978 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
979 }
980};
981
982// x86_64 OHOS target
983class LLVM_LIBRARY_VISIBILITY OHOSX86_64TargetInfo
984 : public OHOSTargetInfo<X86_64TargetInfo> {
985public:
986 OHOSX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
987 : OHOSTargetInfo<X86_64TargetInfo>(Triple, Opts) {
988 LongDoubleFormat = &llvm::APFloat::IEEEquad();
989 }
990};
991} // namespace targets
992} // namespace clang
993#endif // LLVM_CLANG_LIB_BASIC_TARGETS_X86_H
Provides LLVM's BitmaskEnum facility to enumeration types declared in namespace clang.
static unsigned getCharWidth(tok::TokenKind kind, const TargetInfo &Target)
static bool hasFeature(StringRef Feature, const LangOptions &LangOpts, const TargetInfo &Target)
Determine whether a translation unit built using the current language options has the given feature.
Definition: Module.cpp:101
Defines the clang::TargetOptions class.
Concrete class used by the front-end to report problems and issues.
Definition: Diagnostic.h:192
Keeps track of the various options that can be enabled, which controls the dialect of C or C++ that i...
Definition: LangOptions.h:82
FPEvalMethodKind
Possible float expression evaluation method choices.
Definition: LangOptions.h:282
Exposes information about the current target.
Definition: TargetInfo.h:206
BuiltinVaListKind
The different kinds of __builtin_va_list types defined by the target implementation.
Definition: TargetInfo.h:287
Options for controlling the target.
Definition: TargetOptions.h:26
AndroidX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:952
AndroidX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:964
void getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const override
X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro definitions for this parti...
Definition: X86.h:626
CygwinX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:617
void getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const override
X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro definitions for this parti...
Definition: X86.h:899
CygwinX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:893
DarwinI386TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:530
bool handleTargetFeatures(std::vector< std::string > &Features, DiagnosticsEngine &Diags) override
Definition: X86.h:547
DarwinX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:915
bool handleTargetFeatures(std::vector< std::string > &Features, DiagnosticsEngine &Diags) override
Definition: X86.h:926
HaikuX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:643
void getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const override
Definition: X86.h:646
MCUX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:656
bool allowsLargerPreferedTypeAlignment() const override
Whether target allows to overalign ABI-specified preferred alignment.
Definition: X86.h:677
void getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const override
X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro definitions for this parti...
Definition: X86.h:670
CallingConvCheckResult checkCallingConvention(CallingConv CC) const override
Determines whether a given calling convention is valid for the target.
Definition: X86.h:665
void getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const override
Definition: X86.h:588
MicrosoftX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:581
void getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const override
Definition: X86.h:863
TargetInfo::CallingConvKind getCallingConvKind(bool ClangABICompat4) const override
Definition: X86.h:871
MicrosoftX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:856
void getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const override
Definition: X86.h:607
MinGWX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:602
MinGWX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:880
LangOptions::FPEvalMethodKind getFPEvalMethod() const override
Definition: X86.h:506
NetBSDI386TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:503
OHOSX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:974
OHOSX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:986
OpenBSDI386TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:519
OpenBSDX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:941
RTEMSX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:683
void getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const override
X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro definitions for this parti...
Definition: X86.h:690
WindowsX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:563
WindowsX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:814
BuiltinVaListKind getBuiltinVaListKind() const override
Definition: X86.h:825
CallingConvCheckResult checkCallingConvention(CallingConv CC) const override
Definition: X86.h:829
bool isSPRegName(StringRef RegName) const override
Definition: X86.h:204
bool isValidTuneCPUName(StringRef Name) const override
brief Determine whether this TargetInfo supports the given CPU name for
Definition: X86.h:347
bool isValidCPUName(StringRef Name) const override
brief Determine whether this TargetInfo supports the given CPU name.
Definition: X86.h:342
bool setCPU(const std::string &Name) override
Target the specified CPU.
Definition: X86.h:360
X86TargetInfo(const llvm::Triple &Triple, const TargetOptions &)
Definition: X86.h:169
bool supportsExtendIntArgs() const override
Whether the option -fextend-arguments={32,64} is supported on the target.
Definition: X86.h:370
CallingConv getDefaultCallingConv() const override
Gets the default calling convention for the given target and declaration context.
Definition: X86.h:398
bool useFP16ConversionIntrinsics() const override
Check whether llvm intrinsics such as llvm.convert.to.fp16 should be used to convert to and from __fp...
Definition: X86.h:305
bool hasSjLjLowering() const override
Controls if __builtin_longjmp / __builtin_setjmp can be lowered to llvm.eh.sjlj.longjmp / llvm....
Definition: X86.h:402
const char * getBFloat16Mangling() const override
Return the mangled code of bfloat.
Definition: X86.h:419
CallingConvCheckResult checkCallingConvention(CallingConv CC) const override
Determines whether a given calling convention is valid for the target.
Definition: X86.h:374
bool checkCFProtectionBranchSupported(DiagnosticsEngine &Diags) const override
Check if the target supports CFProtection branch.
Definition: X86.h:254
StringRef getConstraintRegister(StringRef Constraint, StringRef Expression) const override
Extracts a register from the passed constraint (if it is a single-register constraint) and the asm la...
Definition: X86.h:268
const char * getClobbers() const override
Returns a string of target-specific clobbers, in LLVM format.
Definition: X86.h:264
bool supportSourceEvalMethod() const override
Definition: X86.h:194
bool checkCFProtectionReturnSupported(DiagnosticsEngine &Diags) const override
Check if the target supports CFProtection return.
Definition: X86.h:247
LangOptions::FPEvalMethodKind getFPEvalMethod() const override
Return the value for the C99 FLT_EVAL_METHOD macro.
Definition: X86.h:187
uint64_t getPointerWidthV(LangAS AS) const override
Definition: X86.h:406
void setSupportedOpenCLOpts() override
Set supported OpenCL extensions and optional core features.
Definition: X86.h:404
bool supportsTargetAttributeTune() const override
brief Determine whether this TargetInfo supports tune in target attribute.
Definition: X86.h:338
const char * getLongDoubleMangling() const override
Return the mangled code of long double.
Definition: X86.h:183
bool checkArithmeticFenceSupported() const override
Controls if __arithmetic_fence is supported in the targeted backend.
Definition: X86.h:396
bool validateGlobalRegisterVariable(StringRef RegName, unsigned RegSize, bool &HasSizeMismatch) const override
Validate register name used for global register variables.
Definition: X86.h:227
StringRef getABI() const override
Get the ABI currently in use.
Definition: X86.h:327
ArrayRef< TargetInfo::GCCRegAlias > getGCCRegAliases() const override
Definition: X86.h:198
uint64_t getPointerAlignV(LangAS AddrSpace) const override
Definition: X86.h:415
X86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:425
size_t getMaxBitIntWidth() const override
Definition: X86.h:495
void setMaxAtomicWidth() override
Set the maximum inline or promote width lock-free atomic operation for the given target.
Definition: X86.h:487
int getEHDataRegisterNumber(unsigned RegNo) const override
Return the register number that __builtin_eh_return_regno would return with the specified argument.
Definition: X86.h:457
bool hasBitIntType() const override
Determine whether the _BitInt type is supported on this target.
Definition: X86.h:494
bool validateOperandSize(const llvm::StringMap< bool > &FeatureMap, StringRef Constraint, unsigned Size) const override
Definition: X86.h:465
BuiltinVaListKind getBuiltinVaListKind() const override
Returns the kind of __builtin_va_list type that should be used with this target.
Definition: X86.h:453
bool validateGlobalRegisterVariable(StringRef RegName, unsigned RegSize, bool &HasSizeMismatch) const override
Validate register name used for global register variables.
Definition: X86.h:782
bool hasInt128Type() const override
Determine whether the __int128 type is supported on this target.
Definition: X86.h:776
CallingConvCheckResult checkCallingConvention(CallingConv CC) const override
Determines whether a given calling convention is valid for the target.
Definition: X86.h:753
CallingConv getDefaultCallingConv() const override
Gets the default calling convention for the given target and declaration context.
Definition: X86.h:771
bool hasBitIntType() const override
Determine whether the _BitInt type is supported on this target.
Definition: X86.h:804
int getEHDataRegisterNumber(unsigned RegNo) const override
Return the register number that __builtin_eh_return_regno would return with the specified argument.
Definition: X86.h:745
void setMaxAtomicWidth() override
Set the maximum inline or promote width lock-free atomic operation for the given target.
Definition: X86.h:797
size_t getMaxBitIntWidth() const override
Definition: X86.h:805
BuiltinVaListKind getBuiltinVaListKind() const override
Returns the kind of __builtin_va_list type that should be used with this target.
Definition: X86.h:741
X86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:701
unsigned getUnwindWordWidth() const override
Definition: X86.h:778
unsigned getRegisterWidth() const override
Return the "preferred" register width on this target.
Definition: X86.h:780
Defines the clang::TargetInfo interface.
static const unsigned X86AddrSpaceMap[]
Definition: X86.h:28
void DefineStd(MacroBuilder &Builder, StringRef MacroName, const LangOptions &Opts)
DefineStd - Define a macro name and standard variants.
Definition: Targets.cpp:59
void addCygMingDefines(const LangOptions &Opts, MacroBuilder &Builder)
Definition: Targets.cpp:82
LangAS
Defines the address space values used by the address space qualifier of QualType.
Definition: AddressSpaces.h:25
CallingConv
CallingConv - Specifies the calling convention that a function uses.
Definition: Specifiers.h:266
@ CC_X86Pascal
Definition: Specifiers.h:272
@ CC_Swift
Definition: Specifiers.h:281
@ CC_IntelOclBicc
Definition: Specifiers.h:278
@ CC_OpenCLKernel
Definition: Specifiers.h:280
@ CC_PreserveMost
Definition: Specifiers.h:283
@ CC_Win64
Definition: Specifiers.h:273
@ CC_X86ThisCall
Definition: Specifiers.h:270
@ CC_C
Definition: Specifiers.h:267
@ CC_SwiftAsync
Definition: Specifiers.h:282
@ CC_X86RegCall
Definition: Specifiers.h:275
@ CC_X86VectorCall
Definition: Specifiers.h:271
@ CC_X86StdCall
Definition: Specifiers.h:268
@ CC_X86_64SysV
Definition: Specifiers.h:274
@ CC_PreserveAll
Definition: Specifiers.h:284
@ CC_X86FastCall
Definition: Specifiers.h:269