clang 18.0.0git
X86.h
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1//===--- X86.h - Declare X86 target feature support -------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file declares X86 TargetInfo objects.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_X86_H
14#define LLVM_CLANG_LIB_BASIC_TARGETS_X86_H
15
16#include "OSTargets.h"
20#include "llvm/Support/Compiler.h"
21#include "llvm/TargetParser/Triple.h"
22#include "llvm/TargetParser/X86TargetParser.h"
23#include <optional>
24
25namespace clang {
26namespace targets {
27
28static const unsigned X86AddrSpaceMap[] = {
29 0, // Default
30 0, // opencl_global
31 0, // opencl_local
32 0, // opencl_constant
33 0, // opencl_private
34 0, // opencl_generic
35 0, // opencl_global_device
36 0, // opencl_global_host
37 0, // cuda_device
38 0, // cuda_constant
39 0, // cuda_shared
40 0, // sycl_global
41 0, // sycl_global_device
42 0, // sycl_global_host
43 0, // sycl_local
44 0, // sycl_private
45 270, // ptr32_sptr
46 271, // ptr32_uptr
47 272, // ptr64
48 0, // hlsl_groupshared
49 // Wasm address space values for this target are dummy values,
50 // as it is only enabled for Wasm targets.
51 20, // wasm_funcref
52};
53
54// X86 target abstract base class; x86-32 and x86-64 are very close, so
55// most of the implementation can be shared.
56class LLVM_LIBRARY_VISIBILITY X86TargetInfo : public TargetInfo {
57
58 enum X86SSEEnum {
59 NoSSE,
60 SSE1,
61 SSE2,
62 SSE3,
63 SSSE3,
64 SSE41,
65 SSE42,
66 AVX,
67 AVX2,
68 AVX512F
69 } SSELevel = NoSSE;
70 enum MMX3DNowEnum {
71 NoMMX3DNow,
72 MMX,
73 AMD3DNow,
74 AMD3DNowAthlon
75 } MMX3DNowLevel = NoMMX3DNow;
76 enum XOPEnum { NoXOP, SSE4A, FMA4, XOP } XOPLevel = NoXOP;
77 enum AddrSpace { ptr32_sptr = 270, ptr32_uptr = 271, ptr64 = 272 };
78
79 bool HasAES = false;
80 bool HasVAES = false;
81 bool HasPCLMUL = false;
82 bool HasVPCLMULQDQ = false;
83 bool HasGFNI = false;
84 bool HasLZCNT = false;
85 bool HasRDRND = false;
86 bool HasFSGSBASE = false;
87 bool HasBMI = false;
88 bool HasBMI2 = false;
89 bool HasPOPCNT = false;
90 bool HasRTM = false;
91 bool HasPRFCHW = false;
92 bool HasRDSEED = false;
93 bool HasADX = false;
94 bool HasTBM = false;
95 bool HasLWP = false;
96 bool HasFMA = false;
97 bool HasF16C = false;
98 bool HasEVEX512 = false;
99 bool HasAVX512CD = false;
100 bool HasAVX512VPOPCNTDQ = false;
101 bool HasAVX512VNNI = false;
102 bool HasAVX512FP16 = false;
103 bool HasAVX512BF16 = false;
104 bool HasAVX512ER = false;
105 bool HasAVX512PF = false;
106 bool HasAVX512DQ = false;
107 bool HasAVX512BITALG = false;
108 bool HasAVX512BW = false;
109 bool HasAVX512VL = false;
110 bool HasAVX512VBMI = false;
111 bool HasAVX512VBMI2 = false;
112 bool HasAVXIFMA = false;
113 bool HasAVX512IFMA = false;
114 bool HasAVX512VP2INTERSECT = false;
115 bool HasSHA = false;
116 bool HasSHA512 = false;
117 bool HasSHSTK = false;
118 bool HasSM3 = false;
119 bool HasSGX = false;
120 bool HasSM4 = false;
121 bool HasCX8 = false;
122 bool HasCX16 = false;
123 bool HasFXSR = false;
124 bool HasXSAVE = false;
125 bool HasXSAVEOPT = false;
126 bool HasXSAVEC = false;
127 bool HasXSAVES = false;
128 bool HasMWAITX = false;
129 bool HasCLZERO = false;
130 bool HasCLDEMOTE = false;
131 bool HasPCONFIG = false;
132 bool HasPKU = false;
133 bool HasCLFLUSHOPT = false;
134 bool HasCLWB = false;
135 bool HasMOVBE = false;
136 bool HasPREFETCHI = false;
137 bool HasPREFETCHWT1 = false;
138 bool HasRDPID = false;
139 bool HasRDPRU = false;
140 bool HasRetpolineExternalThunk = false;
141 bool HasLAHFSAHF = false;
142 bool HasWBNOINVD = false;
143 bool HasWAITPKG = false;
144 bool HasMOVDIRI = false;
145 bool HasMOVDIR64B = false;
146 bool HasPTWRITE = false;
147 bool HasINVPCID = false;
148 bool HasENQCMD = false;
149 bool HasAVXVNNIINT16 = false;
150 bool HasAMXFP16 = false;
151 bool HasCMPCCXADD = false;
152 bool HasRAOINT = false;
153 bool HasAVXVNNIINT8 = false;
154 bool HasAVXNECONVERT = false;
155 bool HasKL = false; // For key locker
156 bool HasWIDEKL = false; // For wide key locker
157 bool HasHRESET = false;
158 bool HasAVXVNNI = false;
159 bool HasAMXTILE = false;
160 bool HasAMXINT8 = false;
161 bool HasAMXBF16 = false;
162 bool HasAMXCOMPLEX = false;
163 bool HasSERIALIZE = false;
164 bool HasTSXLDTRK = false;
165 bool HasUINTR = false;
166 bool HasCRC32 = false;
167 bool HasX87 = false;
168
169protected:
170 llvm::X86::CPUKind CPU = llvm::X86::CK_None;
171
172 enum FPMathKind { FP_Default, FP_SSE, FP_387 } FPMath = FP_Default;
173
174public:
175 X86TargetInfo(const llvm::Triple &Triple, const TargetOptions &)
176 : TargetInfo(Triple) {
177 BFloat16Width = BFloat16Align = 16;
178 BFloat16Format = &llvm::APFloat::BFloat();
179 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended();
180 AddrSpaceMap = &X86AddrSpaceMap;
181 HasStrictFP = true;
182
183 bool IsWinCOFF =
184 getTriple().isOSWindows() && getTriple().isOSBinFormatCOFF();
185 if (IsWinCOFF)
186 MaxVectorAlign = MaxTLSAlign = 8192u * getCharWidth();
187 }
188
189 const char *getLongDoubleMangling() const override {
190 return LongDoubleFormat == &llvm::APFloat::IEEEquad() ? "g" : "e";
191 }
192
194 // X87 evaluates with 80 bits "long double" precision.
195 return SSELevel == NoSSE ? LangOptions::FPEvalMethodKind::FEM_Extended
196 : LangOptions::FPEvalMethodKind::FEM_Source;
197 }
198
199 // EvalMethod `source` is not supported for targets with `NoSSE` feature.
200 bool supportSourceEvalMethod() const override { return SSELevel > NoSSE; }
201
202 ArrayRef<const char *> getGCCRegNames() const override;
203
205 return std::nullopt;
206 }
207
208 ArrayRef<TargetInfo::AddlRegName> getGCCAddlRegNames() const override;
209
210 bool isSPRegName(StringRef RegName) const override {
211 return RegName.equals("esp") || RegName.equals("rsp");
212 }
213
214 bool validateCpuSupports(StringRef FeatureStr) const override;
215
216 bool validateCpuIs(StringRef FeatureStr) const override;
217
218 bool validateCPUSpecificCPUDispatch(StringRef Name) const override;
219
220 char CPUSpecificManglingCharacter(StringRef Name) const override;
221
222 void getCPUSpecificCPUDispatchFeatures(
223 StringRef Name,
224 llvm::SmallVectorImpl<StringRef> &Features) const override;
225
226 std::optional<unsigned> getCPUCacheLineSize() const override;
227
228 bool validateAsmConstraint(const char *&Name,
229 TargetInfo::ConstraintInfo &info) const override;
230
231 bool validateGlobalRegisterVariable(StringRef RegName, unsigned RegSize,
232 bool &HasSizeMismatch) const override {
233 // esp and ebp are the only 32-bit registers the x86 backend can currently
234 // handle.
235 if (RegName.equals("esp") || RegName.equals("ebp")) {
236 // Check that the register size is 32-bit.
237 HasSizeMismatch = RegSize != 32;
238 return true;
239 }
240
241 return false;
242 }
243
244 bool validateOutputSize(const llvm::StringMap<bool> &FeatureMap,
245 StringRef Constraint, unsigned Size) const override;
246
247 bool validateInputSize(const llvm::StringMap<bool> &FeatureMap,
248 StringRef Constraint, unsigned Size) const override;
249
250 bool
252 if (CPU == llvm::X86::CK_None || CPU >= llvm::X86::CK_PentiumPro)
253 return true;
254 return TargetInfo::checkCFProtectionReturnSupported(Diags);
255 };
256
257 bool
259 if (CPU == llvm::X86::CK_None || CPU >= llvm::X86::CK_PentiumPro)
260 return true;
261 return TargetInfo::checkCFProtectionBranchSupported(Diags);
262 };
263
264 virtual bool validateOperandSize(const llvm::StringMap<bool> &FeatureMap,
265 StringRef Constraint, unsigned Size) const;
266
267 std::string convertConstraint(const char *&Constraint) const override;
268 std::string_view getClobbers() const override {
269 return "~{dirflag},~{fpsr},~{flags}";
270 }
271
272 StringRef getConstraintRegister(StringRef Constraint,
273 StringRef Expression) const override {
274 StringRef::iterator I, E;
275 for (I = Constraint.begin(), E = Constraint.end(); I != E; ++I) {
276 if (isalpha(*I) || *I == '@')
277 break;
278 }
279 if (I == E)
280 return "";
281 switch (*I) {
282 // For the register constraints, return the matching register name
283 case 'a':
284 return "ax";
285 case 'b':
286 return "bx";
287 case 'c':
288 return "cx";
289 case 'd':
290 return "dx";
291 case 'S':
292 return "si";
293 case 'D':
294 return "di";
295 // In case the constraint is 'r' we need to return Expression
296 case 'r':
297 return Expression;
298 // Double letters Y<x> constraints
299 case 'Y':
300 if ((++I != E) && ((*I == '0') || (*I == 'z')))
301 return "xmm0";
302 break;
303 default:
304 break;
305 }
306 return "";
307 }
308
309 bool useFP16ConversionIntrinsics() const override {
310 return false;
311 }
312
313 void getTargetDefines(const LangOptions &Opts,
314 MacroBuilder &Builder) const override;
315
316 void setFeatureEnabled(llvm::StringMap<bool> &Features, StringRef Name,
317 bool Enabled) const final;
318
319 bool
320 initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags,
321 StringRef CPU,
322 const std::vector<std::string> &FeaturesVec) const override;
323
324 bool isValidFeatureName(StringRef Name) const override;
325
326 bool hasFeature(StringRef Feature) const final;
327
328 bool handleTargetFeatures(std::vector<std::string> &Features,
329 DiagnosticsEngine &Diags) override;
330
331 StringRef getABI() const override {
332 if (getTriple().getArch() == llvm::Triple::x86_64 && SSELevel >= AVX512F)
333 return "avx512";
334 if (getTriple().getArch() == llvm::Triple::x86_64 && SSELevel >= AVX)
335 return "avx";
336 if (getTriple().getArch() == llvm::Triple::x86 &&
337 MMX3DNowLevel == NoMMX3DNow)
338 return "no-mmx";
339 return "";
340 }
341
342 bool supportsTargetAttributeTune() const override {
343 return true;
344 }
345
346 bool isValidCPUName(StringRef Name) const override {
347 bool Only64Bit = getTriple().getArch() != llvm::Triple::x86;
348 return llvm::X86::parseArchX86(Name, Only64Bit) != llvm::X86::CK_None;
349 }
350
351 bool isValidTuneCPUName(StringRef Name) const override {
352 if (Name == "generic")
353 return true;
354
355 // Allow 32-bit only CPUs regardless of 64-bit mode unlike isValidCPUName.
356 // NOTE: gcc rejects 32-bit mtune CPUs in 64-bit mode. But being lenient
357 // since mtune was ignored by clang for so long.
358 return llvm::X86::parseTuneCPU(Name) != llvm::X86::CK_None;
359 }
360
361 void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
362 void fillValidTuneCPUList(SmallVectorImpl<StringRef> &Values) const override;
363
364 bool setCPU(const std::string &Name) override {
365 bool Only64Bit = getTriple().getArch() != llvm::Triple::x86;
366 CPU = llvm::X86::parseArchX86(Name, Only64Bit);
367 return CPU != llvm::X86::CK_None;
368 }
369
370 unsigned multiVersionSortPriority(StringRef Name) const override;
371
372 bool setFPMath(StringRef Name) override;
373
374 bool supportsExtendIntArgs() const override {
375 return getTriple().getArch() != llvm::Triple::x86;
376 }
377
379 // Most of the non-ARM calling conventions are i386 conventions.
380 switch (CC) {
381 case CC_X86ThisCall:
382 case CC_X86FastCall:
383 case CC_X86StdCall:
384 case CC_X86VectorCall:
385 case CC_X86RegCall:
386 case CC_C:
387 case CC_PreserveMost:
388 case CC_Swift:
389 case CC_X86Pascal:
390 case CC_IntelOclBicc:
391 case CC_OpenCLKernel:
392 return CCCR_OK;
393 case CC_SwiftAsync:
394 return CCCR_Error;
395 default:
396 return CCCR_Warning;
397 }
398 }
399
400 bool checkArithmeticFenceSupported() const override { return true; }
401
403 return CC_C;
404 }
405
406 bool hasSjLjLowering() const override { return true; }
407
408 void setSupportedOpenCLOpts() override { supportAllOpenCLOpts(); }
409
410 uint64_t getPointerWidthV(LangAS AS) const override {
411 unsigned TargetAddrSpace = getTargetAddressSpace(AS);
412 if (TargetAddrSpace == ptr32_sptr || TargetAddrSpace == ptr32_uptr)
413 return 32;
414 if (TargetAddrSpace == ptr64)
415 return 64;
416 return PointerWidth;
417 }
418
419 uint64_t getPointerAlignV(LangAS AddrSpace) const override {
420 return getPointerWidthV(AddrSpace);
421 }
422
423};
424
425// X86-32 generic target
426class LLVM_LIBRARY_VISIBILITY X86_32TargetInfo : public X86TargetInfo {
427public:
428 X86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
429 : X86TargetInfo(Triple, Opts) {
430 DoubleAlign = LongLongAlign = 32;
431 LongDoubleWidth = 96;
432 LongDoubleAlign = 32;
433 SuitableAlign = 128;
434 resetDataLayout(
435 Triple.isOSBinFormatMachO()
436 ? "e-m:o-p:32:32-p270:32:32-p271:32:32-p272:64:64-f64:32:64-"
437 "f80:32-n8:16:32-S128"
438 : "e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-f64:32:64-"
439 "f80:32-n8:16:32-S128",
440 Triple.isOSBinFormatMachO() ? "_" : "");
441 SizeType = UnsignedInt;
442 PtrDiffType = SignedInt;
443 IntPtrType = SignedInt;
444 RegParmMax = 3;
445
446 // Use fpret for all types.
447 RealTypeUsesObjCFPRetMask =
448 (unsigned)(FloatModeKind::Float | FloatModeKind::Double |
449 FloatModeKind::LongDouble);
450
451 // x86-32 has atomics up to 8 bytes
452 MaxAtomicPromoteWidth = 64;
453 MaxAtomicInlineWidth = 32;
454 }
455
457 return TargetInfo::CharPtrBuiltinVaList;
458 }
459
460 int getEHDataRegisterNumber(unsigned RegNo) const override {
461 if (RegNo == 0)
462 return 0;
463 if (RegNo == 1)
464 return 2;
465 return -1;
466 }
467
468 bool validateOperandSize(const llvm::StringMap<bool> &FeatureMap,
469 StringRef Constraint, unsigned Size) const override {
470 switch (Constraint[0]) {
471 default:
472 break;
473 case 'R':
474 case 'q':
475 case 'Q':
476 case 'a':
477 case 'b':
478 case 'c':
479 case 'd':
480 case 'S':
481 case 'D':
482 return Size <= 32;
483 case 'A':
484 return Size <= 64;
485 }
486
487 return X86TargetInfo::validateOperandSize(FeatureMap, Constraint, Size);
488 }
489
490 void setMaxAtomicWidth() override {
491 if (hasFeature("cx8"))
492 MaxAtomicInlineWidth = 64;
493 }
494
495 ArrayRef<Builtin::Info> getTargetBuiltins() const override;
496
497 bool hasBitIntType() const override { return true; }
498 size_t getMaxBitIntWidth() const override {
499 return llvm::IntegerType::MAX_INT_BITS;
500 }
501};
502
503class LLVM_LIBRARY_VISIBILITY NetBSDI386TargetInfo
504 : public NetBSDTargetInfo<X86_32TargetInfo> {
505public:
506 NetBSDI386TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
507 : NetBSDTargetInfo<X86_32TargetInfo>(Triple, Opts) {}
508
510 VersionTuple OsVersion = getTriple().getOSVersion();
511 // New NetBSD uses the default rounding mode.
512 if (OsVersion >= VersionTuple(6, 99, 26) || OsVersion.getMajor() == 0)
513 return X86_32TargetInfo::getFPEvalMethod();
514 // NetBSD before 6.99.26 defaults to "double" rounding.
515 return LangOptions::FPEvalMethodKind::FEM_Double;
516 }
517};
518
519class LLVM_LIBRARY_VISIBILITY OpenBSDI386TargetInfo
520 : public OpenBSDTargetInfo<X86_32TargetInfo> {
521public:
522 OpenBSDI386TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
523 : OpenBSDTargetInfo<X86_32TargetInfo>(Triple, Opts) {
524 SizeType = UnsignedLong;
525 IntPtrType = SignedLong;
526 PtrDiffType = SignedLong;
527 }
528};
529
530class LLVM_LIBRARY_VISIBILITY DarwinI386TargetInfo
531 : public DarwinTargetInfo<X86_32TargetInfo> {
532public:
533 DarwinI386TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
534 : DarwinTargetInfo<X86_32TargetInfo>(Triple, Opts) {
535 LongDoubleWidth = 128;
536 LongDoubleAlign = 128;
537 SuitableAlign = 128;
538 MaxVectorAlign = 256;
539 // The watchOS simulator uses the builtin bool type for Objective-C.
540 llvm::Triple T = llvm::Triple(Triple);
541 if (T.isWatchOS())
542 UseSignedCharForObjCBool = false;
543 SizeType = UnsignedLong;
544 IntPtrType = SignedLong;
545 resetDataLayout("e-m:o-p:32:32-p270:32:32-p271:32:32-p272:64:64-f64:32:64-"
546 "f80:128-n8:16:32-S128", "_");
547 HasAlignMac68kSupport = true;
548 }
549
550 bool handleTargetFeatures(std::vector<std::string> &Features,
551 DiagnosticsEngine &Diags) override {
553 Diags))
554 return false;
555 // We now know the features we have: we can decide how to align vectors.
556 MaxVectorAlign =
557 hasFeature("avx512f") ? 512 : hasFeature("avx") ? 256 : 128;
558 return true;
559 }
560};
561
562// x86-32 Windows target
563class LLVM_LIBRARY_VISIBILITY WindowsX86_32TargetInfo
564 : public WindowsTargetInfo<X86_32TargetInfo> {
565public:
566 WindowsX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
567 : WindowsTargetInfo<X86_32TargetInfo>(Triple, Opts) {
568 DoubleAlign = LongLongAlign = 64;
569 bool IsWinCOFF =
570 getTriple().isOSWindows() && getTriple().isOSBinFormatCOFF();
571 bool IsMSVC = getTriple().isWindowsMSVCEnvironment();
572 std::string Layout = IsWinCOFF ? "e-m:x" : "e-m:e";
573 Layout += "-p:32:32-p270:32:32-p271:32:32-p272:64:64-i64:64-";
574 Layout += IsMSVC ? "f80:128" : "f80:32";
575 Layout += "-n8:16:32-a:0:32-S32";
576 resetDataLayout(Layout, IsWinCOFF ? "_" : "");
577 }
578};
579
580// x86-32 Windows Visual Studio target
581class LLVM_LIBRARY_VISIBILITY MicrosoftX86_32TargetInfo
582 : public WindowsX86_32TargetInfo {
583public:
584 MicrosoftX86_32TargetInfo(const llvm::Triple &Triple,
585 const TargetOptions &Opts)
586 : WindowsX86_32TargetInfo(Triple, Opts) {
587 LongDoubleWidth = LongDoubleAlign = 64;
588 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
589 }
590
592 MacroBuilder &Builder) const override {
593 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
594 // The value of the following reflects processor type.
595 // 300=386, 400=486, 500=Pentium, 600=Blend (default)
596 // We lost the original triple, so we use the default.
597 Builder.defineMacro("_M_IX86", "600");
598 }
599};
600
601// x86-32 MinGW target
602class LLVM_LIBRARY_VISIBILITY MinGWX86_32TargetInfo
603 : public WindowsX86_32TargetInfo {
604public:
605 MinGWX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
606 : WindowsX86_32TargetInfo(Triple, Opts) {
607 HasFloat128 = true;
608 }
609
611 MacroBuilder &Builder) const override {
612 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
613 Builder.defineMacro("_X86_");
614 }
615};
616
617// x86-32 Cygwin target
618class LLVM_LIBRARY_VISIBILITY CygwinX86_32TargetInfo : public X86_32TargetInfo {
619public:
620 CygwinX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
621 : X86_32TargetInfo(Triple, Opts) {
622 this->WCharType = TargetInfo::UnsignedShort;
623 DoubleAlign = LongLongAlign = 64;
624 resetDataLayout("e-m:x-p:32:32-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:"
625 "32-n8:16:32-a:0:32-S32",
626 "_");
627 }
628
630 MacroBuilder &Builder) const override {
631 X86_32TargetInfo::getTargetDefines(Opts, Builder);
632 Builder.defineMacro("_X86_");
633 Builder.defineMacro("__CYGWIN__");
634 Builder.defineMacro("__CYGWIN32__");
635 addCygMingDefines(Opts, Builder);
636 DefineStd(Builder, "unix", Opts);
637 if (Opts.CPlusPlus)
638 Builder.defineMacro("_GNU_SOURCE");
639 }
640};
641
642// x86-32 Haiku target
643class LLVM_LIBRARY_VISIBILITY HaikuX86_32TargetInfo
644 : public HaikuTargetInfo<X86_32TargetInfo> {
645public:
646 HaikuX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
647 : HaikuTargetInfo<X86_32TargetInfo>(Triple, Opts) {}
648
650 MacroBuilder &Builder) const override {
652 Builder.defineMacro("__INTEL__");
653 }
654};
655
656// X86-32 MCU target
657class LLVM_LIBRARY_VISIBILITY MCUX86_32TargetInfo : public X86_32TargetInfo {
658public:
659 MCUX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
660 : X86_32TargetInfo(Triple, Opts) {
661 LongDoubleWidth = 64;
662 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
663 resetDataLayout("e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-i64:32-f64:"
664 "32-f128:32-n8:16:32-a:0:32-S32");
665 WIntType = UnsignedInt;
666 }
667
669 // On MCU we support only C calling convention.
670 return CC == CC_C ? CCCR_OK : CCCR_Warning;
671 }
672
674 MacroBuilder &Builder) const override {
675 X86_32TargetInfo::getTargetDefines(Opts, Builder);
676 Builder.defineMacro("__iamcu");
677 Builder.defineMacro("__iamcu__");
678 }
679
680 bool allowsLargerPreferedTypeAlignment() const override { return false; }
681};
682
683// x86-32 RTEMS target
684class LLVM_LIBRARY_VISIBILITY RTEMSX86_32TargetInfo : public X86_32TargetInfo {
685public:
686 RTEMSX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
687 : X86_32TargetInfo(Triple, Opts) {
688 SizeType = UnsignedLong;
689 IntPtrType = SignedLong;
690 PtrDiffType = SignedLong;
691 }
692
694 MacroBuilder &Builder) const override {
695 X86_32TargetInfo::getTargetDefines(Opts, Builder);
696 Builder.defineMacro("__INTEL__");
697 Builder.defineMacro("__rtems__");
698 }
699};
700
701// x86-64 generic target
702class LLVM_LIBRARY_VISIBILITY X86_64TargetInfo : public X86TargetInfo {
703public:
704 X86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
705 : X86TargetInfo(Triple, Opts) {
706 const bool IsX32 = getTriple().isX32();
707 bool IsWinCOFF =
708 getTriple().isOSWindows() && getTriple().isOSBinFormatCOFF();
709 LongWidth = LongAlign = PointerWidth = PointerAlign = IsX32 ? 32 : 64;
710 LongDoubleWidth = 128;
711 LongDoubleAlign = 128;
712 LargeArrayMinWidth = 128;
713 LargeArrayAlign = 128;
714 SuitableAlign = 128;
715 SizeType = IsX32 ? UnsignedInt : UnsignedLong;
716 PtrDiffType = IsX32 ? SignedInt : SignedLong;
717 IntPtrType = IsX32 ? SignedInt : SignedLong;
718 IntMaxType = IsX32 ? SignedLongLong : SignedLong;
719 Int64Type = IsX32 ? SignedLongLong : SignedLong;
720 RegParmMax = 6;
721
722 // Pointers are 32-bit in x32.
723 resetDataLayout(IsX32 ? "e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-"
724 "i64:64-f80:128-n8:16:32:64-S128"
725 : IsWinCOFF ? "e-m:w-p270:32:32-p271:32:32-p272:64:"
726 "64-i64:64-f80:128-n8:16:32:64-S128"
727 : "e-m:e-p270:32:32-p271:32:32-p272:64:"
728 "64-i64:64-f80:128-n8:16:32:64-S128");
729
730 // Use fpret only for long double.
731 RealTypeUsesObjCFPRetMask = (unsigned)FloatModeKind::LongDouble;
732
733 // Use fp2ret for _Complex long double.
734 ComplexLongDoubleUsesFP2Ret = true;
735
736 // Make __builtin_ms_va_list available.
737 HasBuiltinMSVaList = true;
738
739 // x86-64 has atomics up to 16 bytes.
740 MaxAtomicPromoteWidth = 128;
741 MaxAtomicInlineWidth = 64;
742 }
743
745 return TargetInfo::X86_64ABIBuiltinVaList;
746 }
747
748 int getEHDataRegisterNumber(unsigned RegNo) const override {
749 if (RegNo == 0)
750 return 0;
751 if (RegNo == 1)
752 return 1;
753 return -1;
754 }
755
757 switch (CC) {
758 case CC_C:
759 case CC_Swift:
760 case CC_SwiftAsync:
761 case CC_X86VectorCall:
762 case CC_IntelOclBicc:
763 case CC_Win64:
764 case CC_PreserveMost:
765 case CC_PreserveAll:
766 case CC_X86RegCall:
767 case CC_OpenCLKernel:
768 return CCCR_OK;
769 default:
770 return CCCR_Warning;
771 }
772 }
773
775 return CC_C;
776 }
777
778 // for x32 we need it here explicitly
779 bool hasInt128Type() const override { return true; }
780
781 unsigned getUnwindWordWidth() const override { return 64; }
782
783 unsigned getRegisterWidth() const override { return 64; }
784
785 bool validateGlobalRegisterVariable(StringRef RegName, unsigned RegSize,
786 bool &HasSizeMismatch) const override {
787 // rsp and rbp are the only 64-bit registers the x86 backend can currently
788 // handle.
789 if (RegName.equals("rsp") || RegName.equals("rbp")) {
790 // Check that the register size is 64-bit.
791 HasSizeMismatch = RegSize != 64;
792 return true;
793 }
794
795 // Check if the register is a 32-bit register the backend can handle.
796 return X86TargetInfo::validateGlobalRegisterVariable(RegName, RegSize,
797 HasSizeMismatch);
798 }
799
800 void setMaxAtomicWidth() override {
801 if (hasFeature("cx16"))
802 MaxAtomicInlineWidth = 128;
803 }
804
805 ArrayRef<Builtin::Info> getTargetBuiltins() const override;
806
807 bool hasBitIntType() const override { return true; }
808 size_t getMaxBitIntWidth() const override {
809 return llvm::IntegerType::MAX_INT_BITS;
810 }
811};
812
813// x86-64 Windows target
814class LLVM_LIBRARY_VISIBILITY WindowsX86_64TargetInfo
815 : public WindowsTargetInfo<X86_64TargetInfo> {
816public:
817 WindowsX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
818 : WindowsTargetInfo<X86_64TargetInfo>(Triple, Opts) {
819 LongWidth = LongAlign = 32;
820 DoubleAlign = LongLongAlign = 64;
821 IntMaxType = SignedLongLong;
822 Int64Type = SignedLongLong;
823 SizeType = UnsignedLongLong;
824 PtrDiffType = SignedLongLong;
825 IntPtrType = SignedLongLong;
826 }
827
828 BuiltinVaListKind getBuiltinVaListKind() const override {
829 return TargetInfo::CharPtrBuiltinVaList;
830 }
831
832 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
833 switch (CC) {
834 case CC_X86StdCall:
835 case CC_X86ThisCall:
836 case CC_X86FastCall:
837 return CCCR_Ignore;
838 case CC_C:
839 case CC_X86VectorCall:
840 case CC_IntelOclBicc:
841 case CC_PreserveMost:
842 case CC_PreserveAll:
843 case CC_X86_64SysV:
844 case CC_Swift:
845 case CC_SwiftAsync:
846 case CC_X86RegCall:
847 case CC_OpenCLKernel:
848 return CCCR_OK;
849 default:
850 return CCCR_Warning;
851 }
852 }
853};
854
855// x86-64 Windows Visual Studio target
856class LLVM_LIBRARY_VISIBILITY MicrosoftX86_64TargetInfo
857 : public WindowsX86_64TargetInfo {
858public:
859 MicrosoftX86_64TargetInfo(const llvm::Triple &Triple,
860 const TargetOptions &Opts)
861 : WindowsX86_64TargetInfo(Triple, Opts) {
862 LongDoubleWidth = LongDoubleAlign = 64;
863 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
864 }
865
867 MacroBuilder &Builder) const override {
868 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
869 Builder.defineMacro("_M_X64", "100");
870 Builder.defineMacro("_M_AMD64", "100");
871 }
872
874 getCallingConvKind(bool ClangABICompat4) const override {
875 return CCK_MicrosoftWin64;
876 }
877};
878
879// x86-64 MinGW target
880class LLVM_LIBRARY_VISIBILITY MinGWX86_64TargetInfo
881 : public WindowsX86_64TargetInfo {
882public:
883 MinGWX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
884 : WindowsX86_64TargetInfo(Triple, Opts) {
885 // Mingw64 rounds long double size and alignment up to 16 bytes, but sticks
886 // with x86 FP ops. Weird.
887 LongDoubleWidth = LongDoubleAlign = 128;
888 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended();
889 HasFloat128 = true;
890 }
891};
892
893// x86-64 Cygwin target
894class LLVM_LIBRARY_VISIBILITY CygwinX86_64TargetInfo : public X86_64TargetInfo {
895public:
896 CygwinX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
897 : X86_64TargetInfo(Triple, Opts) {
898 this->WCharType = TargetInfo::UnsignedShort;
899 TLSSupported = false;
900 }
901
903 MacroBuilder &Builder) const override {
904 X86_64TargetInfo::getTargetDefines(Opts, Builder);
905 Builder.defineMacro("__x86_64__");
906 Builder.defineMacro("__CYGWIN__");
907 Builder.defineMacro("__CYGWIN64__");
908 addCygMingDefines(Opts, Builder);
909 DefineStd(Builder, "unix", Opts);
910 if (Opts.CPlusPlus)
911 Builder.defineMacro("_GNU_SOURCE");
912 }
913};
914
915class LLVM_LIBRARY_VISIBILITY DarwinX86_64TargetInfo
916 : public DarwinTargetInfo<X86_64TargetInfo> {
917public:
918 DarwinX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
919 : DarwinTargetInfo<X86_64TargetInfo>(Triple, Opts) {
920 Int64Type = SignedLongLong;
921 // The 64-bit iOS simulator uses the builtin bool type for Objective-C.
922 llvm::Triple T = llvm::Triple(Triple);
923 if (T.isiOS())
924 UseSignedCharForObjCBool = false;
925 resetDataLayout("e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:"
926 "16:32:64-S128", "_");
927 }
928
929 bool handleTargetFeatures(std::vector<std::string> &Features,
930 DiagnosticsEngine &Diags) override {
932 Diags))
933 return false;
934 // We now know the features we have: we can decide how to align vectors.
935 MaxVectorAlign =
936 hasFeature("avx512f") ? 512 : hasFeature("avx") ? 256 : 128;
937 return true;
938 }
939};
940
941class LLVM_LIBRARY_VISIBILITY OpenBSDX86_64TargetInfo
942 : public OpenBSDTargetInfo<X86_64TargetInfo> {
943public:
944 OpenBSDX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
945 : OpenBSDTargetInfo<X86_64TargetInfo>(Triple, Opts) {
946 IntMaxType = SignedLongLong;
947 Int64Type = SignedLongLong;
948 }
949};
950
951// x86_32 Android target
952class LLVM_LIBRARY_VISIBILITY AndroidX86_32TargetInfo
953 : public LinuxTargetInfo<X86_32TargetInfo> {
954public:
955 AndroidX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
956 : LinuxTargetInfo<X86_32TargetInfo>(Triple, Opts) {
957 SuitableAlign = 32;
958 LongDoubleWidth = 64;
959 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
960 }
961};
962
963// x86_64 Android target
964class LLVM_LIBRARY_VISIBILITY AndroidX86_64TargetInfo
965 : public LinuxTargetInfo<X86_64TargetInfo> {
966public:
967 AndroidX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
968 : LinuxTargetInfo<X86_64TargetInfo>(Triple, Opts) {
969 LongDoubleFormat = &llvm::APFloat::IEEEquad();
970 }
971};
972
973// x86_32 OHOS target
974class LLVM_LIBRARY_VISIBILITY OHOSX86_32TargetInfo
975 : public OHOSTargetInfo<X86_32TargetInfo> {
976public:
977 OHOSX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
978 : OHOSTargetInfo<X86_32TargetInfo>(Triple, Opts) {
979 SuitableAlign = 32;
980 LongDoubleWidth = 64;
981 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
982 }
983};
984
985// x86_64 OHOS target
986class LLVM_LIBRARY_VISIBILITY OHOSX86_64TargetInfo
987 : public OHOSTargetInfo<X86_64TargetInfo> {
988public:
989 OHOSX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
990 : OHOSTargetInfo<X86_64TargetInfo>(Triple, Opts) {
991 LongDoubleFormat = &llvm::APFloat::IEEEquad();
992 }
993};
994} // namespace targets
995} // namespace clang
996#endif // LLVM_CLANG_LIB_BASIC_TARGETS_X86_H
Provides LLVM's BitmaskEnum facility to enumeration types declared in namespace clang.
static unsigned getCharWidth(tok::TokenKind kind, const TargetInfo &Target)
static bool hasFeature(StringRef Feature, const LangOptions &LangOpts, const TargetInfo &Target)
Determine whether a translation unit built using the current language options has the given feature.
Definition: Module.cpp:100
Defines the clang::TargetOptions class.
Concrete class used by the front-end to report problems and issues.
Definition: Diagnostic.h:192
Keeps track of the various options that can be enabled, which controls the dialect of C or C++ that i...
Definition: LangOptions.h:83
FPEvalMethodKind
Possible float expression evaluation method choices.
Definition: LangOptions.h:292
Exposes information about the current target.
Definition: TargetInfo.h:207
BuiltinVaListKind
The different kinds of __builtin_va_list types defined by the target implementation.
Definition: TargetInfo.h:297
Options for controlling the target.
Definition: TargetOptions.h:26
AndroidX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:955
AndroidX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:967
void getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const override
X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro definitions for this parti...
Definition: X86.h:629
CygwinX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:620
void getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const override
X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro definitions for this parti...
Definition: X86.h:902
CygwinX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:896
DarwinI386TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:533
bool handleTargetFeatures(std::vector< std::string > &Features, DiagnosticsEngine &Diags) override
Definition: X86.h:550
DarwinX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:918
bool handleTargetFeatures(std::vector< std::string > &Features, DiagnosticsEngine &Diags) override
Definition: X86.h:929
HaikuX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:646
void getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const override
Definition: X86.h:649
MCUX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:659
bool allowsLargerPreferedTypeAlignment() const override
Whether target allows to overalign ABI-specified preferred alignment.
Definition: X86.h:680
void getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const override
X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro definitions for this parti...
Definition: X86.h:673
CallingConvCheckResult checkCallingConvention(CallingConv CC) const override
Determines whether a given calling convention is valid for the target.
Definition: X86.h:668
void getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const override
Definition: X86.h:591
MicrosoftX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:584
void getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const override
Definition: X86.h:866
TargetInfo::CallingConvKind getCallingConvKind(bool ClangABICompat4) const override
Definition: X86.h:874
MicrosoftX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:859
void getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const override
Definition: X86.h:610
MinGWX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:605
MinGWX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:883
LangOptions::FPEvalMethodKind getFPEvalMethod() const override
Definition: X86.h:509
NetBSDI386TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:506
OHOSX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:977
OHOSX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:989
OpenBSDI386TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:522
OpenBSDX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:944
RTEMSX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:686
void getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const override
X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro definitions for this parti...
Definition: X86.h:693
WindowsX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:566
WindowsX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:817
BuiltinVaListKind getBuiltinVaListKind() const override
Definition: X86.h:828
CallingConvCheckResult checkCallingConvention(CallingConv CC) const override
Definition: X86.h:832
bool isSPRegName(StringRef RegName) const override
Definition: X86.h:210
bool isValidTuneCPUName(StringRef Name) const override
brief Determine whether this TargetInfo supports the given CPU name for
Definition: X86.h:351
bool isValidCPUName(StringRef Name) const override
brief Determine whether this TargetInfo supports the given CPU name.
Definition: X86.h:346
bool setCPU(const std::string &Name) override
Target the specified CPU.
Definition: X86.h:364
X86TargetInfo(const llvm::Triple &Triple, const TargetOptions &)
Definition: X86.h:175
bool supportsExtendIntArgs() const override
Whether the option -fextend-arguments={32,64} is supported on the target.
Definition: X86.h:374
CallingConv getDefaultCallingConv() const override
Gets the default calling convention for the given target and declaration context.
Definition: X86.h:402
bool useFP16ConversionIntrinsics() const override
Check whether llvm intrinsics such as llvm.convert.to.fp16 should be used to convert to and from __fp...
Definition: X86.h:309
bool hasSjLjLowering() const override
Controls if __builtin_longjmp / __builtin_setjmp can be lowered to llvm.eh.sjlj.longjmp / llvm....
Definition: X86.h:406
CallingConvCheckResult checkCallingConvention(CallingConv CC) const override
Determines whether a given calling convention is valid for the target.
Definition: X86.h:378
bool checkCFProtectionBranchSupported(DiagnosticsEngine &Diags) const override
Check if the target supports CFProtection branch.
Definition: X86.h:258
StringRef getConstraintRegister(StringRef Constraint, StringRef Expression) const override
Extracts a register from the passed constraint (if it is a single-register constraint) and the asm la...
Definition: X86.h:272
std::string_view getClobbers() const override
Returns a string of target-specific clobbers, in LLVM format.
Definition: X86.h:268
bool supportSourceEvalMethod() const override
Definition: X86.h:200
bool checkCFProtectionReturnSupported(DiagnosticsEngine &Diags) const override
Check if the target supports CFProtection return.
Definition: X86.h:251
LangOptions::FPEvalMethodKind getFPEvalMethod() const override
Return the value for the C99 FLT_EVAL_METHOD macro.
Definition: X86.h:193
uint64_t getPointerWidthV(LangAS AS) const override
Definition: X86.h:410
void setSupportedOpenCLOpts() override
Set supported OpenCL extensions and optional core features.
Definition: X86.h:408
bool supportsTargetAttributeTune() const override
brief Determine whether this TargetInfo supports tune in target attribute.
Definition: X86.h:342
const char * getLongDoubleMangling() const override
Return the mangled code of long double.
Definition: X86.h:189
bool checkArithmeticFenceSupported() const override
Controls if __arithmetic_fence is supported in the targeted backend.
Definition: X86.h:400
bool validateGlobalRegisterVariable(StringRef RegName, unsigned RegSize, bool &HasSizeMismatch) const override
Validate register name used for global register variables.
Definition: X86.h:231
StringRef getABI() const override
Get the ABI currently in use.
Definition: X86.h:331
ArrayRef< TargetInfo::GCCRegAlias > getGCCRegAliases() const override
Definition: X86.h:204
uint64_t getPointerAlignV(LangAS AddrSpace) const override
Definition: X86.h:419
X86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:428
size_t getMaxBitIntWidth() const override
Definition: X86.h:498
void setMaxAtomicWidth() override
Set the maximum inline or promote width lock-free atomic operation for the given target.
Definition: X86.h:490
int getEHDataRegisterNumber(unsigned RegNo) const override
Return the register number that __builtin_eh_return_regno would return with the specified argument.
Definition: X86.h:460
bool hasBitIntType() const override
Determine whether the _BitInt type is supported on this target.
Definition: X86.h:497
bool validateOperandSize(const llvm::StringMap< bool > &FeatureMap, StringRef Constraint, unsigned Size) const override
Definition: X86.h:468
BuiltinVaListKind getBuiltinVaListKind() const override
Returns the kind of __builtin_va_list type that should be used with this target.
Definition: X86.h:456
bool validateGlobalRegisterVariable(StringRef RegName, unsigned RegSize, bool &HasSizeMismatch) const override
Validate register name used for global register variables.
Definition: X86.h:785
bool hasInt128Type() const override
Determine whether the __int128 type is supported on this target.
Definition: X86.h:779
CallingConvCheckResult checkCallingConvention(CallingConv CC) const override
Determines whether a given calling convention is valid for the target.
Definition: X86.h:756
CallingConv getDefaultCallingConv() const override
Gets the default calling convention for the given target and declaration context.
Definition: X86.h:774
bool hasBitIntType() const override
Determine whether the _BitInt type is supported on this target.
Definition: X86.h:807
int getEHDataRegisterNumber(unsigned RegNo) const override
Return the register number that __builtin_eh_return_regno would return with the specified argument.
Definition: X86.h:748
void setMaxAtomicWidth() override
Set the maximum inline or promote width lock-free atomic operation for the given target.
Definition: X86.h:800
size_t getMaxBitIntWidth() const override
Definition: X86.h:808
BuiltinVaListKind getBuiltinVaListKind() const override
Returns the kind of __builtin_va_list type that should be used with this target.
Definition: X86.h:744
X86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: X86.h:704
unsigned getUnwindWordWidth() const override
Definition: X86.h:781
unsigned getRegisterWidth() const override
Return the "preferred" register width on this target.
Definition: X86.h:783
Defines the clang::TargetInfo interface.
static const unsigned X86AddrSpaceMap[]
Definition: X86.h:28
void DefineStd(MacroBuilder &Builder, StringRef MacroName, const LangOptions &Opts)
DefineStd - Define a macro name and standard variants.
Definition: Targets.cpp:60
void addCygMingDefines(const LangOptions &Opts, MacroBuilder &Builder)
Definition: Targets.cpp:83
LangAS
Defines the address space values used by the address space qualifier of QualType.
Definition: AddressSpaces.h:25
CallingConv
CallingConv - Specifies the calling convention that a function uses.
Definition: Specifiers.h:269
@ CC_X86Pascal
Definition: Specifiers.h:275
@ CC_Swift
Definition: Specifiers.h:284
@ CC_IntelOclBicc
Definition: Specifiers.h:281
@ CC_OpenCLKernel
Definition: Specifiers.h:283
@ CC_PreserveMost
Definition: Specifiers.h:286
@ CC_Win64
Definition: Specifiers.h:276
@ CC_X86ThisCall
Definition: Specifiers.h:273
@ CC_C
Definition: Specifiers.h:270
@ CC_SwiftAsync
Definition: Specifiers.h:285
@ CC_X86RegCall
Definition: Specifiers.h:278
@ CC_X86VectorCall
Definition: Specifiers.h:274
@ CC_X86StdCall
Definition: Specifiers.h:271
@ CC_X86_64SysV
Definition: Specifiers.h:277
@ CC_PreserveAll
Definition: Specifiers.h:287
@ CC_X86FastCall
Definition: Specifiers.h:272