clang  8.0.0svn
SemaChecking.cpp
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1 //===- SemaChecking.cpp - Extra Semantic Checking -------------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements extra semantic analysis beyond what is enforced
11 // by the C type system.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #include "clang/AST/APValue.h"
16 #include "clang/AST/ASTContext.h"
17 #include "clang/AST/Attr.h"
18 #include "clang/AST/AttrIterator.h"
19 #include "clang/AST/CharUnits.h"
20 #include "clang/AST/Decl.h"
21 #include "clang/AST/DeclBase.h"
22 #include "clang/AST/DeclCXX.h"
23 #include "clang/AST/DeclObjC.h"
26 #include "clang/AST/Expr.h"
27 #include "clang/AST/ExprCXX.h"
28 #include "clang/AST/ExprObjC.h"
29 #include "clang/AST/ExprOpenMP.h"
30 #include "clang/AST/FormatString.h"
31 #include "clang/AST/NSAPI.h"
34 #include "clang/AST/Stmt.h"
35 #include "clang/AST/TemplateBase.h"
36 #include "clang/AST/Type.h"
37 #include "clang/AST/TypeLoc.h"
40 #include "clang/Basic/CharInfo.h"
41 #include "clang/Basic/Diagnostic.h"
43 #include "clang/Basic/LLVM.h"
50 #include "clang/Basic/Specifiers.h"
51 #include "clang/Basic/SyncScope.h"
54 #include "clang/Basic/TargetInfo.h"
55 #include "clang/Basic/TypeTraits.h"
56 #include "clang/Lex/Lexer.h" // TODO: Extract static functions to fix layering.
58 #include "clang/Sema/Lookup.h"
59 #include "clang/Sema/Ownership.h"
60 #include "clang/Sema/Scope.h"
61 #include "clang/Sema/ScopeInfo.h"
62 #include "clang/Sema/Sema.h"
64 #include "llvm/ADT/APFloat.h"
65 #include "llvm/ADT/APInt.h"
66 #include "llvm/ADT/APSInt.h"
67 #include "llvm/ADT/ArrayRef.h"
68 #include "llvm/ADT/DenseMap.h"
69 #include "llvm/ADT/FoldingSet.h"
70 #include "llvm/ADT/None.h"
71 #include "llvm/ADT/Optional.h"
72 #include "llvm/ADT/STLExtras.h"
73 #include "llvm/ADT/SmallBitVector.h"
74 #include "llvm/ADT/SmallPtrSet.h"
75 #include "llvm/ADT/SmallString.h"
76 #include "llvm/ADT/SmallVector.h"
77 #include "llvm/ADT/StringRef.h"
78 #include "llvm/ADT/StringSwitch.h"
79 #include "llvm/ADT/Triple.h"
80 #include "llvm/Support/AtomicOrdering.h"
81 #include "llvm/Support/Casting.h"
82 #include "llvm/Support/Compiler.h"
83 #include "llvm/Support/ConvertUTF.h"
84 #include "llvm/Support/ErrorHandling.h"
85 #include "llvm/Support/Format.h"
86 #include "llvm/Support/Locale.h"
87 #include "llvm/Support/MathExtras.h"
88 #include "llvm/Support/raw_ostream.h"
89 #include <algorithm>
90 #include <cassert>
91 #include <cstddef>
92 #include <cstdint>
93 #include <functional>
94 #include <limits>
95 #include <string>
96 #include <tuple>
97 #include <utility>
98 
99 using namespace clang;
100 using namespace sema;
101 
103  unsigned ByteNo) const {
104  return SL->getLocationOfByte(ByteNo, getSourceManager(), LangOpts,
105  Context.getTargetInfo());
106 }
107 
108 /// Checks that a call expression's argument count is the desired number.
109 /// This is useful when doing custom type-checking. Returns true on error.
110 static bool checkArgCount(Sema &S, CallExpr *call, unsigned desiredArgCount) {
111  unsigned argCount = call->getNumArgs();
112  if (argCount == desiredArgCount) return false;
113 
114  if (argCount < desiredArgCount)
115  return S.Diag(call->getEndLoc(), diag::err_typecheck_call_too_few_args)
116  << 0 /*function call*/ << desiredArgCount << argCount
117  << call->getSourceRange();
118 
119  // Highlight all the excess arguments.
120  SourceRange range(call->getArg(desiredArgCount)->getBeginLoc(),
121  call->getArg(argCount - 1)->getEndLoc());
122 
123  return S.Diag(range.getBegin(), diag::err_typecheck_call_too_many_args)
124  << 0 /*function call*/ << desiredArgCount << argCount
125  << call->getArg(1)->getSourceRange();
126 }
127 
128 /// Check that the first argument to __builtin_annotation is an integer
129 /// and the second argument is a non-wide string literal.
130 static bool SemaBuiltinAnnotation(Sema &S, CallExpr *TheCall) {
131  if (checkArgCount(S, TheCall, 2))
132  return true;
133 
134  // First argument should be an integer.
135  Expr *ValArg = TheCall->getArg(0);
136  QualType Ty = ValArg->getType();
137  if (!Ty->isIntegerType()) {
138  S.Diag(ValArg->getBeginLoc(), diag::err_builtin_annotation_first_arg)
139  << ValArg->getSourceRange();
140  return true;
141  }
142 
143  // Second argument should be a constant string.
144  Expr *StrArg = TheCall->getArg(1)->IgnoreParenCasts();
145  StringLiteral *Literal = dyn_cast<StringLiteral>(StrArg);
146  if (!Literal || !Literal->isAscii()) {
147  S.Diag(StrArg->getBeginLoc(), diag::err_builtin_annotation_second_arg)
148  << StrArg->getSourceRange();
149  return true;
150  }
151 
152  TheCall->setType(Ty);
153  return false;
154 }
155 
156 static bool SemaBuiltinMSVCAnnotation(Sema &S, CallExpr *TheCall) {
157  // We need at least one argument.
158  if (TheCall->getNumArgs() < 1) {
159  S.Diag(TheCall->getEndLoc(), diag::err_typecheck_call_too_few_args_at_least)
160  << 0 << 1 << TheCall->getNumArgs()
161  << TheCall->getCallee()->getSourceRange();
162  return true;
163  }
164 
165  // All arguments should be wide string literals.
166  for (Expr *Arg : TheCall->arguments()) {
167  auto *Literal = dyn_cast<StringLiteral>(Arg->IgnoreParenCasts());
168  if (!Literal || !Literal->isWide()) {
169  S.Diag(Arg->getBeginLoc(), diag::err_msvc_annotation_wide_str)
170  << Arg->getSourceRange();
171  return true;
172  }
173  }
174 
175  return false;
176 }
177 
178 /// Check that the argument to __builtin_addressof is a glvalue, and set the
179 /// result type to the corresponding pointer type.
180 static bool SemaBuiltinAddressof(Sema &S, CallExpr *TheCall) {
181  if (checkArgCount(S, TheCall, 1))
182  return true;
183 
184  ExprResult Arg(TheCall->getArg(0));
185  QualType ResultType = S.CheckAddressOfOperand(Arg, TheCall->getBeginLoc());
186  if (ResultType.isNull())
187  return true;
188 
189  TheCall->setArg(0, Arg.get());
190  TheCall->setType(ResultType);
191  return false;
192 }
193 
194 static bool SemaBuiltinOverflow(Sema &S, CallExpr *TheCall) {
195  if (checkArgCount(S, TheCall, 3))
196  return true;
197 
198  // First two arguments should be integers.
199  for (unsigned I = 0; I < 2; ++I) {
200  ExprResult Arg = TheCall->getArg(I);
201  QualType Ty = Arg.get()->getType();
202  if (!Ty->isIntegerType()) {
203  S.Diag(Arg.get()->getBeginLoc(), diag::err_overflow_builtin_must_be_int)
204  << Ty << Arg.get()->getSourceRange();
205  return true;
206  }
208  S.getASTContext(), Ty, /*consume*/ false);
209  Arg = S.PerformCopyInitialization(Entity, SourceLocation(), Arg);
210  if (Arg.isInvalid())
211  return true;
212  TheCall->setArg(I, Arg.get());
213  }
214 
215  // Third argument should be a pointer to a non-const integer.
216  // IRGen correctly handles volatile, restrict, and address spaces, and
217  // the other qualifiers aren't possible.
218  {
219  ExprResult Arg = TheCall->getArg(2);
220  QualType Ty = Arg.get()->getType();
221  const auto *PtrTy = Ty->getAs<PointerType>();
222  if (!(PtrTy && PtrTy->getPointeeType()->isIntegerType() &&
223  !PtrTy->getPointeeType().isConstQualified())) {
224  S.Diag(Arg.get()->getBeginLoc(),
225  diag::err_overflow_builtin_must_be_ptr_int)
226  << Ty << Arg.get()->getSourceRange();
227  return true;
228  }
230  S.getASTContext(), Ty, /*consume*/ false);
231  Arg = S.PerformCopyInitialization(Entity, SourceLocation(), Arg);
232  if (Arg.isInvalid())
233  return true;
234  TheCall->setArg(2, Arg.get());
235  }
236  return false;
237 }
238 
239 static void SemaBuiltinMemChkCall(Sema &S, FunctionDecl *FDecl,
240  CallExpr *TheCall, unsigned SizeIdx,
241  unsigned DstSizeIdx,
242  StringRef LikelyMacroName) {
243  if (TheCall->getNumArgs() <= SizeIdx ||
244  TheCall->getNumArgs() <= DstSizeIdx)
245  return;
246 
247  const Expr *SizeArg = TheCall->getArg(SizeIdx);
248  const Expr *DstSizeArg = TheCall->getArg(DstSizeIdx);
249 
250  Expr::EvalResult SizeResult, DstSizeResult;
251 
252  // find out if both sizes are known at compile time
253  if (!SizeArg->EvaluateAsInt(SizeResult, S.Context) ||
254  !DstSizeArg->EvaluateAsInt(DstSizeResult, S.Context))
255  return;
256 
257  llvm::APSInt Size = SizeResult.Val.getInt();
258  llvm::APSInt DstSize = DstSizeResult.Val.getInt();
259 
260  if (Size.ule(DstSize))
261  return;
262 
263  // Confirmed overflow, so generate the diagnostic.
264  StringRef FunctionName = FDecl->getName();
265  SourceLocation SL = TheCall->getBeginLoc();
267  // If we're in an expansion of a macro whose name corresponds to this builtin,
268  // use the simple macro name and location.
269  if (SL.isMacroID() && Lexer::getImmediateMacroName(SL, SM, S.getLangOpts()) ==
270  LikelyMacroName) {
271  FunctionName = LikelyMacroName;
272  SL = SM.getImmediateMacroCallerLoc(SL);
273  }
274 
275  S.Diag(SL, diag::warn_memcpy_chk_overflow)
276  << FunctionName << DstSize.toString(/*Radix=*/10)
277  << Size.toString(/*Radix=*/10);
278 }
279 
280 static bool SemaBuiltinCallWithStaticChain(Sema &S, CallExpr *BuiltinCall) {
281  if (checkArgCount(S, BuiltinCall, 2))
282  return true;
283 
284  SourceLocation BuiltinLoc = BuiltinCall->getBeginLoc();
285  Expr *Builtin = BuiltinCall->getCallee()->IgnoreImpCasts();
286  Expr *Call = BuiltinCall->getArg(0);
287  Expr *Chain = BuiltinCall->getArg(1);
288 
289  if (Call->getStmtClass() != Stmt::CallExprClass) {
290  S.Diag(BuiltinLoc, diag::err_first_argument_to_cwsc_not_call)
291  << Call->getSourceRange();
292  return true;
293  }
294 
295  auto CE = cast<CallExpr>(Call);
296  if (CE->getCallee()->getType()->isBlockPointerType()) {
297  S.Diag(BuiltinLoc, diag::err_first_argument_to_cwsc_block_call)
298  << Call->getSourceRange();
299  return true;
300  }
301 
302  const Decl *TargetDecl = CE->getCalleeDecl();
303  if (const FunctionDecl *FD = dyn_cast_or_null<FunctionDecl>(TargetDecl))
304  if (FD->getBuiltinID()) {
305  S.Diag(BuiltinLoc, diag::err_first_argument_to_cwsc_builtin_call)
306  << Call->getSourceRange();
307  return true;
308  }
309 
310  if (isa<CXXPseudoDestructorExpr>(CE->getCallee()->IgnoreParens())) {
311  S.Diag(BuiltinLoc, diag::err_first_argument_to_cwsc_pdtor_call)
312  << Call->getSourceRange();
313  return true;
314  }
315 
316  ExprResult ChainResult = S.UsualUnaryConversions(Chain);
317  if (ChainResult.isInvalid())
318  return true;
319  if (!ChainResult.get()->getType()->isPointerType()) {
320  S.Diag(BuiltinLoc, diag::err_second_argument_to_cwsc_not_pointer)
321  << Chain->getSourceRange();
322  return true;
323  }
324 
325  QualType ReturnTy = CE->getCallReturnType(S.Context);
326  QualType ArgTys[2] = { ReturnTy, ChainResult.get()->getType() };
327  QualType BuiltinTy = S.Context.getFunctionType(
328  ReturnTy, ArgTys, FunctionProtoType::ExtProtoInfo());
329  QualType BuiltinPtrTy = S.Context.getPointerType(BuiltinTy);
330 
331  Builtin =
332  S.ImpCastExprToType(Builtin, BuiltinPtrTy, CK_BuiltinFnToFnPtr).get();
333 
334  BuiltinCall->setType(CE->getType());
335  BuiltinCall->setValueKind(CE->getValueKind());
336  BuiltinCall->setObjectKind(CE->getObjectKind());
337  BuiltinCall->setCallee(Builtin);
338  BuiltinCall->setArg(1, ChainResult.get());
339 
340  return false;
341 }
342 
343 static bool SemaBuiltinSEHScopeCheck(Sema &SemaRef, CallExpr *TheCall,
344  Scope::ScopeFlags NeededScopeFlags,
345  unsigned DiagID) {
346  // Scopes aren't available during instantiation. Fortunately, builtin
347  // functions cannot be template args so they cannot be formed through template
348  // instantiation. Therefore checking once during the parse is sufficient.
349  if (SemaRef.inTemplateInstantiation())
350  return false;
351 
352  Scope *S = SemaRef.getCurScope();
353  while (S && !S->isSEHExceptScope())
354  S = S->getParent();
355  if (!S || !(S->getFlags() & NeededScopeFlags)) {
356  auto *DRE = cast<DeclRefExpr>(TheCall->getCallee()->IgnoreParenCasts());
357  SemaRef.Diag(TheCall->getExprLoc(), DiagID)
358  << DRE->getDecl()->getIdentifier();
359  return true;
360  }
361 
362  return false;
363 }
364 
365 static inline bool isBlockPointer(Expr *Arg) {
366  return Arg->getType()->isBlockPointerType();
367 }
368 
369 /// OpenCL C v2.0, s6.13.17.2 - Checks that the block parameters are all local
370 /// void*, which is a requirement of device side enqueue.
371 static bool checkOpenCLBlockArgs(Sema &S, Expr *BlockArg) {
372  const BlockPointerType *BPT =
373  cast<BlockPointerType>(BlockArg->getType().getCanonicalType());
374  ArrayRef<QualType> Params =
375  BPT->getPointeeType()->getAs<FunctionProtoType>()->getParamTypes();
376  unsigned ArgCounter = 0;
377  bool IllegalParams = false;
378  // Iterate through the block parameters until either one is found that is not
379  // a local void*, or the block is valid.
380  for (ArrayRef<QualType>::iterator I = Params.begin(), E = Params.end();
381  I != E; ++I, ++ArgCounter) {
382  if (!(*I)->isPointerType() || !(*I)->getPointeeType()->isVoidType() ||
383  (*I)->getPointeeType().getQualifiers().getAddressSpace() !=
385  // Get the location of the error. If a block literal has been passed
386  // (BlockExpr) then we can point straight to the offending argument,
387  // else we just point to the variable reference.
388  SourceLocation ErrorLoc;
389  if (isa<BlockExpr>(BlockArg)) {
390  BlockDecl *BD = cast<BlockExpr>(BlockArg)->getBlockDecl();
391  ErrorLoc = BD->getParamDecl(ArgCounter)->getBeginLoc();
392  } else if (isa<DeclRefExpr>(BlockArg)) {
393  ErrorLoc = cast<DeclRefExpr>(BlockArg)->getBeginLoc();
394  }
395  S.Diag(ErrorLoc,
396  diag::err_opencl_enqueue_kernel_blocks_non_local_void_args);
397  IllegalParams = true;
398  }
399  }
400 
401  return IllegalParams;
402 }
403 
404 static bool checkOpenCLSubgroupExt(Sema &S, CallExpr *Call) {
405  if (!S.getOpenCLOptions().isEnabled("cl_khr_subgroups")) {
406  S.Diag(Call->getBeginLoc(), diag::err_opencl_requires_extension)
407  << 1 << Call->getDirectCallee() << "cl_khr_subgroups";
408  return true;
409  }
410  return false;
411 }
412 
413 static bool SemaOpenCLBuiltinNDRangeAndBlock(Sema &S, CallExpr *TheCall) {
414  if (checkArgCount(S, TheCall, 2))
415  return true;
416 
417  if (checkOpenCLSubgroupExt(S, TheCall))
418  return true;
419 
420  // First argument is an ndrange_t type.
421  Expr *NDRangeArg = TheCall->getArg(0);
422  if (NDRangeArg->getType().getUnqualifiedType().getAsString() != "ndrange_t") {
423  S.Diag(NDRangeArg->getBeginLoc(), diag::err_opencl_builtin_expected_type)
424  << TheCall->getDirectCallee() << "'ndrange_t'";
425  return true;
426  }
427 
428  Expr *BlockArg = TheCall->getArg(1);
429  if (!isBlockPointer(BlockArg)) {
430  S.Diag(BlockArg->getBeginLoc(), diag::err_opencl_builtin_expected_type)
431  << TheCall->getDirectCallee() << "block";
432  return true;
433  }
434  return checkOpenCLBlockArgs(S, BlockArg);
435 }
436 
437 /// OpenCL C v2.0, s6.13.17.6 - Check the argument to the
438 /// get_kernel_work_group_size
439 /// and get_kernel_preferred_work_group_size_multiple builtin functions.
441  if (checkArgCount(S, TheCall, 1))
442  return true;
443 
444  Expr *BlockArg = TheCall->getArg(0);
445  if (!isBlockPointer(BlockArg)) {
446  S.Diag(BlockArg->getBeginLoc(), diag::err_opencl_builtin_expected_type)
447  << TheCall->getDirectCallee() << "block";
448  return true;
449  }
450  return checkOpenCLBlockArgs(S, BlockArg);
451 }
452 
453 /// Diagnose integer type and any valid implicit conversion to it.
454 static bool checkOpenCLEnqueueIntType(Sema &S, Expr *E,
455  const QualType &IntType);
456 
458  unsigned Start, unsigned End) {
459  bool IllegalParams = false;
460  for (unsigned I = Start; I <= End; ++I)
461  IllegalParams |= checkOpenCLEnqueueIntType(S, TheCall->getArg(I),
462  S.Context.getSizeType());
463  return IllegalParams;
464 }
465 
466 /// OpenCL v2.0, s6.13.17.1 - Check that sizes are provided for all
467 /// 'local void*' parameter of passed block.
469  Expr *BlockArg,
470  unsigned NumNonVarArgs) {
471  const BlockPointerType *BPT =
472  cast<BlockPointerType>(BlockArg->getType().getCanonicalType());
473  unsigned NumBlockParams =
474  BPT->getPointeeType()->getAs<FunctionProtoType>()->getNumParams();
475  unsigned TotalNumArgs = TheCall->getNumArgs();
476 
477  // For each argument passed to the block, a corresponding uint needs to
478  // be passed to describe the size of the local memory.
479  if (TotalNumArgs != NumBlockParams + NumNonVarArgs) {
480  S.Diag(TheCall->getBeginLoc(),
481  diag::err_opencl_enqueue_kernel_local_size_args);
482  return true;
483  }
484 
485  // Check that the sizes of the local memory are specified by integers.
486  return checkOpenCLEnqueueLocalSizeArgs(S, TheCall, NumNonVarArgs,
487  TotalNumArgs - 1);
488 }
489 
490 /// OpenCL C v2.0, s6.13.17 - Enqueue kernel function contains four different
491 /// overload formats specified in Table 6.13.17.1.
492 /// int enqueue_kernel(queue_t queue,
493 /// kernel_enqueue_flags_t flags,
494 /// const ndrange_t ndrange,
495 /// void (^block)(void))
496 /// int enqueue_kernel(queue_t queue,
497 /// kernel_enqueue_flags_t flags,
498 /// const ndrange_t ndrange,
499 /// uint num_events_in_wait_list,
500 /// clk_event_t *event_wait_list,
501 /// clk_event_t *event_ret,
502 /// void (^block)(void))
503 /// int enqueue_kernel(queue_t queue,
504 /// kernel_enqueue_flags_t flags,
505 /// const ndrange_t ndrange,
506 /// void (^block)(local void*, ...),
507 /// uint size0, ...)
508 /// int enqueue_kernel(queue_t queue,
509 /// kernel_enqueue_flags_t flags,
510 /// const ndrange_t ndrange,
511 /// uint num_events_in_wait_list,
512 /// clk_event_t *event_wait_list,
513 /// clk_event_t *event_ret,
514 /// void (^block)(local void*, ...),
515 /// uint size0, ...)
516 static bool SemaOpenCLBuiltinEnqueueKernel(Sema &S, CallExpr *TheCall) {
517  unsigned NumArgs = TheCall->getNumArgs();
518 
519  if (NumArgs < 4) {
520  S.Diag(TheCall->getBeginLoc(), diag::err_typecheck_call_too_few_args);
521  return true;
522  }
523 
524  Expr *Arg0 = TheCall->getArg(0);
525  Expr *Arg1 = TheCall->getArg(1);
526  Expr *Arg2 = TheCall->getArg(2);
527  Expr *Arg3 = TheCall->getArg(3);
528 
529  // First argument always needs to be a queue_t type.
530  if (!Arg0->getType()->isQueueT()) {
531  S.Diag(TheCall->getArg(0)->getBeginLoc(),
532  diag::err_opencl_builtin_expected_type)
533  << TheCall->getDirectCallee() << S.Context.OCLQueueTy;
534  return true;
535  }
536 
537  // Second argument always needs to be a kernel_enqueue_flags_t enum value.
538  if (!Arg1->getType()->isIntegerType()) {
539  S.Diag(TheCall->getArg(1)->getBeginLoc(),
540  diag::err_opencl_builtin_expected_type)
541  << TheCall->getDirectCallee() << "'kernel_enqueue_flags_t' (i.e. uint)";
542  return true;
543  }
544 
545  // Third argument is always an ndrange_t type.
546  if (Arg2->getType().getUnqualifiedType().getAsString() != "ndrange_t") {
547  S.Diag(TheCall->getArg(2)->getBeginLoc(),
548  diag::err_opencl_builtin_expected_type)
549  << TheCall->getDirectCallee() << "'ndrange_t'";
550  return true;
551  }
552 
553  // With four arguments, there is only one form that the function could be
554  // called in: no events and no variable arguments.
555  if (NumArgs == 4) {
556  // check that the last argument is the right block type.
557  if (!isBlockPointer(Arg3)) {
558  S.Diag(Arg3->getBeginLoc(), diag::err_opencl_builtin_expected_type)
559  << TheCall->getDirectCallee() << "block";
560  return true;
561  }
562  // we have a block type, check the prototype
563  const BlockPointerType *BPT =
564  cast<BlockPointerType>(Arg3->getType().getCanonicalType());
565  if (BPT->getPointeeType()->getAs<FunctionProtoType>()->getNumParams() > 0) {
566  S.Diag(Arg3->getBeginLoc(),
567  diag::err_opencl_enqueue_kernel_blocks_no_args);
568  return true;
569  }
570  return false;
571  }
572  // we can have block + varargs.
573  if (isBlockPointer(Arg3))
574  return (checkOpenCLBlockArgs(S, Arg3) ||
575  checkOpenCLEnqueueVariadicArgs(S, TheCall, Arg3, 4));
576  // last two cases with either exactly 7 args or 7 args and varargs.
577  if (NumArgs >= 7) {
578  // check common block argument.
579  Expr *Arg6 = TheCall->getArg(6);
580  if (!isBlockPointer(Arg6)) {
581  S.Diag(Arg6->getBeginLoc(), diag::err_opencl_builtin_expected_type)
582  << TheCall->getDirectCallee() << "block";
583  return true;
584  }
585  if (checkOpenCLBlockArgs(S, Arg6))
586  return true;
587 
588  // Forth argument has to be any integer type.
589  if (!Arg3->getType()->isIntegerType()) {
590  S.Diag(TheCall->getArg(3)->getBeginLoc(),
591  diag::err_opencl_builtin_expected_type)
592  << TheCall->getDirectCallee() << "integer";
593  return true;
594  }
595  // check remaining common arguments.
596  Expr *Arg4 = TheCall->getArg(4);
597  Expr *Arg5 = TheCall->getArg(5);
598 
599  // Fifth argument is always passed as a pointer to clk_event_t.
600  if (!Arg4->isNullPointerConstant(S.Context,
603  S.Diag(TheCall->getArg(4)->getBeginLoc(),
604  diag::err_opencl_builtin_expected_type)
605  << TheCall->getDirectCallee()
607  return true;
608  }
609 
610  // Sixth argument is always passed as a pointer to clk_event_t.
611  if (!Arg5->isNullPointerConstant(S.Context,
613  !(Arg5->getType()->isPointerType() &&
614  Arg5->getType()->getPointeeType()->isClkEventT())) {
615  S.Diag(TheCall->getArg(5)->getBeginLoc(),
616  diag::err_opencl_builtin_expected_type)
617  << TheCall->getDirectCallee()
619  return true;
620  }
621 
622  if (NumArgs == 7)
623  return false;
624 
625  return checkOpenCLEnqueueVariadicArgs(S, TheCall, Arg6, 7);
626  }
627 
628  // None of the specific case has been detected, give generic error
629  S.Diag(TheCall->getBeginLoc(),
630  diag::err_opencl_enqueue_kernel_incorrect_args);
631  return true;
632 }
633 
634 /// Returns OpenCL access qual.
635 static OpenCLAccessAttr *getOpenCLArgAccess(const Decl *D) {
636  return D->getAttr<OpenCLAccessAttr>();
637 }
638 
639 /// Returns true if pipe element type is different from the pointer.
640 static bool checkOpenCLPipeArg(Sema &S, CallExpr *Call) {
641  const Expr *Arg0 = Call->getArg(0);
642  // First argument type should always be pipe.
643  if (!Arg0->getType()->isPipeType()) {
644  S.Diag(Call->getBeginLoc(), diag::err_opencl_builtin_pipe_first_arg)
645  << Call->getDirectCallee() << Arg0->getSourceRange();
646  return true;
647  }
648  OpenCLAccessAttr *AccessQual =
649  getOpenCLArgAccess(cast<DeclRefExpr>(Arg0)->getDecl());
650  // Validates the access qualifier is compatible with the call.
651  // OpenCL v2.0 s6.13.16 - The access qualifiers for pipe should only be
652  // read_only and write_only, and assumed to be read_only if no qualifier is
653  // specified.
654  switch (Call->getDirectCallee()->getBuiltinID()) {
655  case Builtin::BIread_pipe:
656  case Builtin::BIreserve_read_pipe:
657  case Builtin::BIcommit_read_pipe:
658  case Builtin::BIwork_group_reserve_read_pipe:
659  case Builtin::BIsub_group_reserve_read_pipe:
660  case Builtin::BIwork_group_commit_read_pipe:
661  case Builtin::BIsub_group_commit_read_pipe:
662  if (!(!AccessQual || AccessQual->isReadOnly())) {
663  S.Diag(Arg0->getBeginLoc(),
664  diag::err_opencl_builtin_pipe_invalid_access_modifier)
665  << "read_only" << Arg0->getSourceRange();
666  return true;
667  }
668  break;
669  case Builtin::BIwrite_pipe:
670  case Builtin::BIreserve_write_pipe:
671  case Builtin::BIcommit_write_pipe:
672  case Builtin::BIwork_group_reserve_write_pipe:
673  case Builtin::BIsub_group_reserve_write_pipe:
674  case Builtin::BIwork_group_commit_write_pipe:
675  case Builtin::BIsub_group_commit_write_pipe:
676  if (!(AccessQual && AccessQual->isWriteOnly())) {
677  S.Diag(Arg0->getBeginLoc(),
678  diag::err_opencl_builtin_pipe_invalid_access_modifier)
679  << "write_only" << Arg0->getSourceRange();
680  return true;
681  }
682  break;
683  default:
684  break;
685  }
686  return false;
687 }
688 
689 /// Returns true if pipe element type is different from the pointer.
690 static bool checkOpenCLPipePacketType(Sema &S, CallExpr *Call, unsigned Idx) {
691  const Expr *Arg0 = Call->getArg(0);
692  const Expr *ArgIdx = Call->getArg(Idx);
693  const PipeType *PipeTy = cast<PipeType>(Arg0->getType());
694  const QualType EltTy = PipeTy->getElementType();
695  const PointerType *ArgTy = ArgIdx->getType()->getAs<PointerType>();
696  // The Idx argument should be a pointer and the type of the pointer and
697  // the type of pipe element should also be the same.
698  if (!ArgTy ||
699  !S.Context.hasSameType(
700  EltTy, ArgTy->getPointeeType()->getCanonicalTypeInternal())) {
701  S.Diag(Call->getBeginLoc(), diag::err_opencl_builtin_pipe_invalid_arg)
702  << Call->getDirectCallee() << S.Context.getPointerType(EltTy)
703  << ArgIdx->getType() << ArgIdx->getSourceRange();
704  return true;
705  }
706  return false;
707 }
708 
709 // Performs semantic analysis for the read/write_pipe call.
710 // \param S Reference to the semantic analyzer.
711 // \param Call A pointer to the builtin call.
712 // \return True if a semantic error has been found, false otherwise.
713 static bool SemaBuiltinRWPipe(Sema &S, CallExpr *Call) {
714  // OpenCL v2.0 s6.13.16.2 - The built-in read/write
715  // functions have two forms.
716  switch (Call->getNumArgs()) {
717  case 2:
718  if (checkOpenCLPipeArg(S, Call))
719  return true;
720  // The call with 2 arguments should be
721  // read/write_pipe(pipe T, T*).
722  // Check packet type T.
723  if (checkOpenCLPipePacketType(S, Call, 1))
724  return true;
725  break;
726 
727  case 4: {
728  if (checkOpenCLPipeArg(S, Call))
729  return true;
730  // The call with 4 arguments should be
731  // read/write_pipe(pipe T, reserve_id_t, uint, T*).
732  // Check reserve_id_t.
733  if (!Call->getArg(1)->getType()->isReserveIDT()) {
734  S.Diag(Call->getBeginLoc(), diag::err_opencl_builtin_pipe_invalid_arg)
735  << Call->getDirectCallee() << S.Context.OCLReserveIDTy
736  << Call->getArg(1)->getType() << Call->getArg(1)->getSourceRange();
737  return true;
738  }
739 
740  // Check the index.
741  const Expr *Arg2 = Call->getArg(2);
742  if (!Arg2->getType()->isIntegerType() &&
743  !Arg2->getType()->isUnsignedIntegerType()) {
744  S.Diag(Call->getBeginLoc(), diag::err_opencl_builtin_pipe_invalid_arg)
745  << Call->getDirectCallee() << S.Context.UnsignedIntTy
746  << Arg2->getType() << Arg2->getSourceRange();
747  return true;
748  }
749 
750  // Check packet type T.
751  if (checkOpenCLPipePacketType(S, Call, 3))
752  return true;
753  } break;
754  default:
755  S.Diag(Call->getBeginLoc(), diag::err_opencl_builtin_pipe_arg_num)
756  << Call->getDirectCallee() << Call->getSourceRange();
757  return true;
758  }
759 
760  return false;
761 }
762 
763 // Performs a semantic analysis on the {work_group_/sub_group_
764 // /_}reserve_{read/write}_pipe
765 // \param S Reference to the semantic analyzer.
766 // \param Call The call to the builtin function to be analyzed.
767 // \return True if a semantic error was found, false otherwise.
768 static bool SemaBuiltinReserveRWPipe(Sema &S, CallExpr *Call) {
769  if (checkArgCount(S, Call, 2))
770  return true;
771 
772  if (checkOpenCLPipeArg(S, Call))
773  return true;
774 
775  // Check the reserve size.
776  if (!Call->getArg(1)->getType()->isIntegerType() &&
777  !Call->getArg(1)->getType()->isUnsignedIntegerType()) {
778  S.Diag(Call->getBeginLoc(), diag::err_opencl_builtin_pipe_invalid_arg)
779  << Call->getDirectCallee() << S.Context.UnsignedIntTy
780  << Call->getArg(1)->getType() << Call->getArg(1)->getSourceRange();
781  return true;
782  }
783 
784  // Since return type of reserve_read/write_pipe built-in function is
785  // reserve_id_t, which is not defined in the builtin def file , we used int
786  // as return type and need to override the return type of these functions.
787  Call->setType(S.Context.OCLReserveIDTy);
788 
789  return false;
790 }
791 
792 // Performs a semantic analysis on {work_group_/sub_group_
793 // /_}commit_{read/write}_pipe
794 // \param S Reference to the semantic analyzer.
795 // \param Call The call to the builtin function to be analyzed.
796 // \return True if a semantic error was found, false otherwise.
797 static bool SemaBuiltinCommitRWPipe(Sema &S, CallExpr *Call) {
798  if (checkArgCount(S, Call, 2))
799  return true;
800 
801  if (checkOpenCLPipeArg(S, Call))
802  return true;
803 
804  // Check reserve_id_t.
805  if (!Call->getArg(1)->getType()->isReserveIDT()) {
806  S.Diag(Call->getBeginLoc(), diag::err_opencl_builtin_pipe_invalid_arg)
807  << Call->getDirectCallee() << S.Context.OCLReserveIDTy
808  << Call->getArg(1)->getType() << Call->getArg(1)->getSourceRange();
809  return true;
810  }
811 
812  return false;
813 }
814 
815 // Performs a semantic analysis on the call to built-in Pipe
816 // Query Functions.
817 // \param S Reference to the semantic analyzer.
818 // \param Call The call to the builtin function to be analyzed.
819 // \return True if a semantic error was found, false otherwise.
820 static bool SemaBuiltinPipePackets(Sema &S, CallExpr *Call) {
821  if (checkArgCount(S, Call, 1))
822  return true;
823 
824  if (!Call->getArg(0)->getType()->isPipeType()) {
825  S.Diag(Call->getBeginLoc(), diag::err_opencl_builtin_pipe_first_arg)
826  << Call->getDirectCallee() << Call->getArg(0)->getSourceRange();
827  return true;
828  }
829 
830  return false;
831 }
832 
833 // OpenCL v2.0 s6.13.9 - Address space qualifier functions.
834 // Performs semantic analysis for the to_global/local/private call.
835 // \param S Reference to the semantic analyzer.
836 // \param BuiltinID ID of the builtin function.
837 // \param Call A pointer to the builtin call.
838 // \return True if a semantic error has been found, false otherwise.
839 static bool SemaOpenCLBuiltinToAddr(Sema &S, unsigned BuiltinID,
840  CallExpr *Call) {
841  if (Call->getNumArgs() != 1) {
842  S.Diag(Call->getBeginLoc(), diag::err_opencl_builtin_to_addr_arg_num)
843  << Call->getDirectCallee() << Call->getSourceRange();
844  return true;
845  }
846 
847  auto RT = Call->getArg(0)->getType();
848  if (!RT->isPointerType() || RT->getPointeeType()
849  .getAddressSpace() == LangAS::opencl_constant) {
850  S.Diag(Call->getBeginLoc(), diag::err_opencl_builtin_to_addr_invalid_arg)
851  << Call->getArg(0) << Call->getDirectCallee() << Call->getSourceRange();
852  return true;
853  }
854 
855  if (RT->getPointeeType().getAddressSpace() != LangAS::opencl_generic) {
856  S.Diag(Call->getArg(0)->getBeginLoc(),
857  diag::warn_opencl_generic_address_space_arg)
858  << Call->getDirectCallee()->getNameInfo().getAsString()
859  << Call->getArg(0)->getSourceRange();
860  }
861 
862  RT = RT->getPointeeType();
863  auto Qual = RT.getQualifiers();
864  switch (BuiltinID) {
865  case Builtin::BIto_global:
866  Qual.setAddressSpace(LangAS::opencl_global);
867  break;
868  case Builtin::BIto_local:
869  Qual.setAddressSpace(LangAS::opencl_local);
870  break;
871  case Builtin::BIto_private:
872  Qual.setAddressSpace(LangAS::opencl_private);
873  break;
874  default:
875  llvm_unreachable("Invalid builtin function");
876  }
878  RT.getUnqualifiedType(), Qual)));
879 
880  return false;
881 }
882 
883 // Emit an error and return true if the current architecture is not in the list
884 // of supported architectures.
885 static bool
886 CheckBuiltinTargetSupport(Sema &S, unsigned BuiltinID, CallExpr *TheCall,
887  ArrayRef<llvm::Triple::ArchType> SupportedArchs) {
888  llvm::Triple::ArchType CurArch =
889  S.getASTContext().getTargetInfo().getTriple().getArch();
890  if (llvm::is_contained(SupportedArchs, CurArch))
891  return false;
892  S.Diag(TheCall->getBeginLoc(), diag::err_builtin_target_unsupported)
893  << TheCall->getSourceRange();
894  return true;
895 }
896 
898 Sema::CheckBuiltinFunctionCall(FunctionDecl *FDecl, unsigned BuiltinID,
899  CallExpr *TheCall) {
900  ExprResult TheCallResult(TheCall);
901 
902  // Find out if any arguments are required to be integer constant expressions.
903  unsigned ICEArguments = 0;
905  Context.GetBuiltinType(BuiltinID, Error, &ICEArguments);
906  if (Error != ASTContext::GE_None)
907  ICEArguments = 0; // Don't diagnose previously diagnosed errors.
908 
909  // If any arguments are required to be ICE's, check and diagnose.
910  for (unsigned ArgNo = 0; ICEArguments != 0; ++ArgNo) {
911  // Skip arguments not required to be ICE's.
912  if ((ICEArguments & (1 << ArgNo)) == 0) continue;
913 
914  llvm::APSInt Result;
915  if (SemaBuiltinConstantArg(TheCall, ArgNo, Result))
916  return true;
917  ICEArguments &= ~(1 << ArgNo);
918  }
919 
920  switch (BuiltinID) {
921  case Builtin::BI__builtin___CFStringMakeConstantString:
922  assert(TheCall->getNumArgs() == 1 &&
923  "Wrong # arguments to builtin CFStringMakeConstantString");
924  if (CheckObjCString(TheCall->getArg(0)))
925  return ExprError();
926  break;
927  case Builtin::BI__builtin_ms_va_start:
928  case Builtin::BI__builtin_stdarg_start:
929  case Builtin::BI__builtin_va_start:
930  if (SemaBuiltinVAStart(BuiltinID, TheCall))
931  return ExprError();
932  break;
933  case Builtin::BI__va_start: {
934  switch (Context.getTargetInfo().getTriple().getArch()) {
935  case llvm::Triple::aarch64:
936  case llvm::Triple::arm:
937  case llvm::Triple::thumb:
938  if (SemaBuiltinVAStartARMMicrosoft(TheCall))
939  return ExprError();
940  break;
941  default:
942  if (SemaBuiltinVAStart(BuiltinID, TheCall))
943  return ExprError();
944  break;
945  }
946  break;
947  }
948 
949  // The acquire, release, and no fence variants are ARM and AArch64 only.
950  case Builtin::BI_interlockedbittestandset_acq:
951  case Builtin::BI_interlockedbittestandset_rel:
952  case Builtin::BI_interlockedbittestandset_nf:
953  case Builtin::BI_interlockedbittestandreset_acq:
954  case Builtin::BI_interlockedbittestandreset_rel:
955  case Builtin::BI_interlockedbittestandreset_nf:
957  *this, BuiltinID, TheCall,
958  {llvm::Triple::arm, llvm::Triple::thumb, llvm::Triple::aarch64}))
959  return ExprError();
960  break;
961 
962  // The 64-bit bittest variants are x64, ARM, and AArch64 only.
963  case Builtin::BI_bittest64:
964  case Builtin::BI_bittestandcomplement64:
965  case Builtin::BI_bittestandreset64:
966  case Builtin::BI_bittestandset64:
967  case Builtin::BI_interlockedbittestandreset64:
968  case Builtin::BI_interlockedbittestandset64:
969  if (CheckBuiltinTargetSupport(*this, BuiltinID, TheCall,
970  {llvm::Triple::x86_64, llvm::Triple::arm,
971  llvm::Triple::thumb, llvm::Triple::aarch64}))
972  return ExprError();
973  break;
974 
975  case Builtin::BI__builtin_isgreater:
976  case Builtin::BI__builtin_isgreaterequal:
977  case Builtin::BI__builtin_isless:
978  case Builtin::BI__builtin_islessequal:
979  case Builtin::BI__builtin_islessgreater:
980  case Builtin::BI__builtin_isunordered:
981  if (SemaBuiltinUnorderedCompare(TheCall))
982  return ExprError();
983  break;
984  case Builtin::BI__builtin_fpclassify:
985  if (SemaBuiltinFPClassification(TheCall, 6))
986  return ExprError();
987  break;
988  case Builtin::BI__builtin_isfinite:
989  case Builtin::BI__builtin_isinf:
990  case Builtin::BI__builtin_isinf_sign:
991  case Builtin::BI__builtin_isnan:
992  case Builtin::BI__builtin_isnormal:
993  case Builtin::BI__builtin_signbit:
994  case Builtin::BI__builtin_signbitf:
995  case Builtin::BI__builtin_signbitl:
996  if (SemaBuiltinFPClassification(TheCall, 1))
997  return ExprError();
998  break;
999  case Builtin::BI__builtin_shufflevector:
1000  return SemaBuiltinShuffleVector(TheCall);
1001  // TheCall will be freed by the smart pointer here, but that's fine, since
1002  // SemaBuiltinShuffleVector guts it, but then doesn't release it.
1003  case Builtin::BI__builtin_prefetch:
1004  if (SemaBuiltinPrefetch(TheCall))
1005  return ExprError();
1006  break;
1007  case Builtin::BI__builtin_alloca_with_align:
1008  if (SemaBuiltinAllocaWithAlign(TheCall))
1009  return ExprError();
1010  break;
1011  case Builtin::BI__assume:
1012  case Builtin::BI__builtin_assume:
1013  if (SemaBuiltinAssume(TheCall))
1014  return ExprError();
1015  break;
1016  case Builtin::BI__builtin_assume_aligned:
1017  if (SemaBuiltinAssumeAligned(TheCall))
1018  return ExprError();
1019  break;
1020  case Builtin::BI__builtin_object_size:
1021  if (SemaBuiltinConstantArgRange(TheCall, 1, 0, 3))
1022  return ExprError();
1023  break;
1024  case Builtin::BI__builtin_longjmp:
1025  if (SemaBuiltinLongjmp(TheCall))
1026  return ExprError();
1027  break;
1028  case Builtin::BI__builtin_setjmp:
1029  if (SemaBuiltinSetjmp(TheCall))
1030  return ExprError();
1031  break;
1032  case Builtin::BI_setjmp:
1033  case Builtin::BI_setjmpex:
1034  if (checkArgCount(*this, TheCall, 1))
1035  return true;
1036  break;
1037  case Builtin::BI__builtin_classify_type:
1038  if (checkArgCount(*this, TheCall, 1)) return true;
1039  TheCall->setType(Context.IntTy);
1040  break;
1041  case Builtin::BI__builtin_constant_p:
1042  if (checkArgCount(*this, TheCall, 1)) return true;
1043  TheCall->setType(Context.IntTy);
1044  break;
1045  case Builtin::BI__sync_fetch_and_add:
1046  case Builtin::BI__sync_fetch_and_add_1:
1047  case Builtin::BI__sync_fetch_and_add_2:
1048  case Builtin::BI__sync_fetch_and_add_4:
1049  case Builtin::BI__sync_fetch_and_add_8:
1050  case Builtin::BI__sync_fetch_and_add_16:
1051  case Builtin::BI__sync_fetch_and_sub:
1052  case Builtin::BI__sync_fetch_and_sub_1:
1053  case Builtin::BI__sync_fetch_and_sub_2:
1054  case Builtin::BI__sync_fetch_and_sub_4:
1055  case Builtin::BI__sync_fetch_and_sub_8:
1056  case Builtin::BI__sync_fetch_and_sub_16:
1057  case Builtin::BI__sync_fetch_and_or:
1058  case Builtin::BI__sync_fetch_and_or_1:
1059  case Builtin::BI__sync_fetch_and_or_2:
1060  case Builtin::BI__sync_fetch_and_or_4:
1061  case Builtin::BI__sync_fetch_and_or_8:
1062  case Builtin::BI__sync_fetch_and_or_16:
1063  case Builtin::BI__sync_fetch_and_and:
1064  case Builtin::BI__sync_fetch_and_and_1:
1065  case Builtin::BI__sync_fetch_and_and_2:
1066  case Builtin::BI__sync_fetch_and_and_4:
1067  case Builtin::BI__sync_fetch_and_and_8:
1068  case Builtin::BI__sync_fetch_and_and_16:
1069  case Builtin::BI__sync_fetch_and_xor:
1070  case Builtin::BI__sync_fetch_and_xor_1:
1071  case Builtin::BI__sync_fetch_and_xor_2:
1072  case Builtin::BI__sync_fetch_and_xor_4:
1073  case Builtin::BI__sync_fetch_and_xor_8:
1074  case Builtin::BI__sync_fetch_and_xor_16:
1075  case Builtin::BI__sync_fetch_and_nand:
1076  case Builtin::BI__sync_fetch_and_nand_1:
1077  case Builtin::BI__sync_fetch_and_nand_2:
1078  case Builtin::BI__sync_fetch_and_nand_4:
1079  case Builtin::BI__sync_fetch_and_nand_8:
1080  case Builtin::BI__sync_fetch_and_nand_16:
1081  case Builtin::BI__sync_add_and_fetch:
1082  case Builtin::BI__sync_add_and_fetch_1:
1083  case Builtin::BI__sync_add_and_fetch_2:
1084  case Builtin::BI__sync_add_and_fetch_4:
1085  case Builtin::BI__sync_add_and_fetch_8:
1086  case Builtin::BI__sync_add_and_fetch_16:
1087  case Builtin::BI__sync_sub_and_fetch:
1088  case Builtin::BI__sync_sub_and_fetch_1:
1089  case Builtin::BI__sync_sub_and_fetch_2:
1090  case Builtin::BI__sync_sub_and_fetch_4:
1091  case Builtin::BI__sync_sub_and_fetch_8:
1092  case Builtin::BI__sync_sub_and_fetch_16:
1093  case Builtin::BI__sync_and_and_fetch:
1094  case Builtin::BI__sync_and_and_fetch_1:
1095  case Builtin::BI__sync_and_and_fetch_2:
1096  case Builtin::BI__sync_and_and_fetch_4:
1097  case Builtin::BI__sync_and_and_fetch_8:
1098  case Builtin::BI__sync_and_and_fetch_16:
1099  case Builtin::BI__sync_or_and_fetch:
1100  case Builtin::BI__sync_or_and_fetch_1:
1101  case Builtin::BI__sync_or_and_fetch_2:
1102  case Builtin::BI__sync_or_and_fetch_4:
1103  case Builtin::BI__sync_or_and_fetch_8:
1104  case Builtin::BI__sync_or_and_fetch_16:
1105  case Builtin::BI__sync_xor_and_fetch:
1106  case Builtin::BI__sync_xor_and_fetch_1:
1107  case Builtin::BI__sync_xor_and_fetch_2:
1108  case Builtin::BI__sync_xor_and_fetch_4:
1109  case Builtin::BI__sync_xor_and_fetch_8:
1110  case Builtin::BI__sync_xor_and_fetch_16:
1111  case Builtin::BI__sync_nand_and_fetch:
1112  case Builtin::BI__sync_nand_and_fetch_1:
1113  case Builtin::BI__sync_nand_and_fetch_2:
1114  case Builtin::BI__sync_nand_and_fetch_4:
1115  case Builtin::BI__sync_nand_and_fetch_8:
1116  case Builtin::BI__sync_nand_and_fetch_16:
1117  case Builtin::BI__sync_val_compare_and_swap:
1118  case Builtin::BI__sync_val_compare_and_swap_1:
1119  case Builtin::BI__sync_val_compare_and_swap_2:
1120  case Builtin::BI__sync_val_compare_and_swap_4:
1121  case Builtin::BI__sync_val_compare_and_swap_8:
1122  case Builtin::BI__sync_val_compare_and_swap_16:
1123  case Builtin::BI__sync_bool_compare_and_swap:
1124  case Builtin::BI__sync_bool_compare_and_swap_1:
1125  case Builtin::BI__sync_bool_compare_and_swap_2:
1126  case Builtin::BI__sync_bool_compare_and_swap_4:
1127  case Builtin::BI__sync_bool_compare_and_swap_8:
1128  case Builtin::BI__sync_bool_compare_and_swap_16:
1129  case Builtin::BI__sync_lock_test_and_set:
1130  case Builtin::BI__sync_lock_test_and_set_1:
1131  case Builtin::BI__sync_lock_test_and_set_2:
1132  case Builtin::BI__sync_lock_test_and_set_4:
1133  case Builtin::BI__sync_lock_test_and_set_8:
1134  case Builtin::BI__sync_lock_test_and_set_16:
1135  case Builtin::BI__sync_lock_release:
1136  case Builtin::BI__sync_lock_release_1:
1137  case Builtin::BI__sync_lock_release_2:
1138  case Builtin::BI__sync_lock_release_4:
1139  case Builtin::BI__sync_lock_release_8:
1140  case Builtin::BI__sync_lock_release_16:
1141  case Builtin::BI__sync_swap:
1142  case Builtin::BI__sync_swap_1:
1143  case Builtin::BI__sync_swap_2:
1144  case Builtin::BI__sync_swap_4:
1145  case Builtin::BI__sync_swap_8:
1146  case Builtin::BI__sync_swap_16:
1147  return SemaBuiltinAtomicOverloaded(TheCallResult);
1148  case Builtin::BI__sync_synchronize:
1149  Diag(TheCall->getBeginLoc(), diag::warn_atomic_implicit_seq_cst)
1150  << TheCall->getCallee()->getSourceRange();
1151  break;
1152  case Builtin::BI__builtin_nontemporal_load:
1153  case Builtin::BI__builtin_nontemporal_store:
1154  return SemaBuiltinNontemporalOverloaded(TheCallResult);
1155 #define BUILTIN(ID, TYPE, ATTRS)
1156 #define ATOMIC_BUILTIN(ID, TYPE, ATTRS) \
1157  case Builtin::BI##ID: \
1158  return SemaAtomicOpsOverloaded(TheCallResult, AtomicExpr::AO##ID);
1159 #include "clang/Basic/Builtins.def"
1160  case Builtin::BI__annotation:
1161  if (SemaBuiltinMSVCAnnotation(*this, TheCall))
1162  return ExprError();
1163  break;
1164  case Builtin::BI__builtin_annotation:
1165  if (SemaBuiltinAnnotation(*this, TheCall))
1166  return ExprError();
1167  break;
1168  case Builtin::BI__builtin_addressof:
1169  if (SemaBuiltinAddressof(*this, TheCall))
1170  return ExprError();
1171  break;
1172  case Builtin::BI__builtin_add_overflow:
1173  case Builtin::BI__builtin_sub_overflow:
1174  case Builtin::BI__builtin_mul_overflow:
1175  if (SemaBuiltinOverflow(*this, TheCall))
1176  return ExprError();
1177  break;
1178  case Builtin::BI__builtin_operator_new:
1179  case Builtin::BI__builtin_operator_delete: {
1180  bool IsDelete = BuiltinID == Builtin::BI__builtin_operator_delete;
1181  ExprResult Res =
1182  SemaBuiltinOperatorNewDeleteOverloaded(TheCallResult, IsDelete);
1183  if (Res.isInvalid())
1184  CorrectDelayedTyposInExpr(TheCallResult.get());
1185  return Res;
1186  }
1187  case Builtin::BI__builtin_dump_struct: {
1188  // We first want to ensure we are called with 2 arguments
1189  if (checkArgCount(*this, TheCall, 2))
1190  return ExprError();
1191  // Ensure that the first argument is of type 'struct XX *'
1192  const Expr *PtrArg = TheCall->getArg(0)->IgnoreParenImpCasts();
1193  const QualType PtrArgType = PtrArg->getType();
1194  if (!PtrArgType->isPointerType() ||
1195  !PtrArgType->getPointeeType()->isRecordType()) {
1196  Diag(PtrArg->getBeginLoc(), diag::err_typecheck_convert_incompatible)
1197  << PtrArgType << "structure pointer" << 1 << 0 << 3 << 1 << PtrArgType
1198  << "structure pointer";
1199  return ExprError();
1200  }
1201 
1202  // Ensure that the second argument is of type 'FunctionType'
1203  const Expr *FnPtrArg = TheCall->getArg(1)->IgnoreImpCasts();
1204  const QualType FnPtrArgType = FnPtrArg->getType();
1205  if (!FnPtrArgType->isPointerType()) {
1206  Diag(FnPtrArg->getBeginLoc(), diag::err_typecheck_convert_incompatible)
1207  << FnPtrArgType << "'int (*)(const char *, ...)'" << 1 << 0 << 3 << 2
1208  << FnPtrArgType << "'int (*)(const char *, ...)'";
1209  return ExprError();
1210  }
1211 
1212  const auto *FuncType =
1213  FnPtrArgType->getPointeeType()->getAs<FunctionType>();
1214 
1215  if (!FuncType) {
1216  Diag(FnPtrArg->getBeginLoc(), diag::err_typecheck_convert_incompatible)
1217  << FnPtrArgType << "'int (*)(const char *, ...)'" << 1 << 0 << 3 << 2
1218  << FnPtrArgType << "'int (*)(const char *, ...)'";
1219  return ExprError();
1220  }
1221 
1222  if (const auto *FT = dyn_cast<FunctionProtoType>(FuncType)) {
1223  if (!FT->getNumParams()) {
1224  Diag(FnPtrArg->getBeginLoc(), diag::err_typecheck_convert_incompatible)
1225  << FnPtrArgType << "'int (*)(const char *, ...)'" << 1 << 0 << 3
1226  << 2 << FnPtrArgType << "'int (*)(const char *, ...)'";
1227  return ExprError();
1228  }
1229  QualType PT = FT->getParamType(0);
1230  if (!FT->isVariadic() || FT->getReturnType() != Context.IntTy ||
1231  !PT->isPointerType() || !PT->getPointeeType()->isCharType() ||
1232  !PT->getPointeeType().isConstQualified()) {
1233  Diag(FnPtrArg->getBeginLoc(), diag::err_typecheck_convert_incompatible)
1234  << FnPtrArgType << "'int (*)(const char *, ...)'" << 1 << 0 << 3
1235  << 2 << FnPtrArgType << "'int (*)(const char *, ...)'";
1236  return ExprError();
1237  }
1238  }
1239 
1240  TheCall->setType(Context.IntTy);
1241  break;
1242  }
1243 
1244  // check secure string manipulation functions where overflows
1245  // are detectable at compile time
1246  case Builtin::BI__builtin___memcpy_chk:
1247  SemaBuiltinMemChkCall(*this, FDecl, TheCall, 2, 3, "memcpy");
1248  break;
1249  case Builtin::BI__builtin___memmove_chk:
1250  SemaBuiltinMemChkCall(*this, FDecl, TheCall, 2, 3, "memmove");
1251  break;
1252  case Builtin::BI__builtin___memset_chk:
1253  SemaBuiltinMemChkCall(*this, FDecl, TheCall, 2, 3, "memset");
1254  break;
1255  case Builtin::BI__builtin___strlcat_chk:
1256  SemaBuiltinMemChkCall(*this, FDecl, TheCall, 2, 3, "strlcat");
1257  break;
1258  case Builtin::BI__builtin___strlcpy_chk:
1259  SemaBuiltinMemChkCall(*this, FDecl, TheCall, 2, 3, "strlcpy");
1260  break;
1261  case Builtin::BI__builtin___strncat_chk:
1262  SemaBuiltinMemChkCall(*this, FDecl, TheCall, 2, 3, "strncat");
1263  break;
1264  case Builtin::BI__builtin___strncpy_chk:
1265  SemaBuiltinMemChkCall(*this, FDecl, TheCall, 2, 3, "strncpy");
1266  break;
1267  case Builtin::BI__builtin___stpncpy_chk:
1268  SemaBuiltinMemChkCall(*this, FDecl, TheCall, 2, 3, "stpncpy");
1269  break;
1270  case Builtin::BI__builtin___memccpy_chk:
1271  SemaBuiltinMemChkCall(*this, FDecl, TheCall, 3, 4, "memccpy");
1272  break;
1273  case Builtin::BI__builtin___snprintf_chk:
1274  SemaBuiltinMemChkCall(*this, FDecl, TheCall, 1, 3, "snprintf");
1275  break;
1276  case Builtin::BI__builtin___vsnprintf_chk:
1277  SemaBuiltinMemChkCall(*this, FDecl, TheCall, 1, 3, "vsnprintf");
1278  break;
1279  case Builtin::BI__builtin_call_with_static_chain:
1280  if (SemaBuiltinCallWithStaticChain(*this, TheCall))
1281  return ExprError();
1282  break;
1283  case Builtin::BI__exception_code:
1284  case Builtin::BI_exception_code:
1285  if (SemaBuiltinSEHScopeCheck(*this, TheCall, Scope::SEHExceptScope,
1286  diag::err_seh___except_block))
1287  return ExprError();
1288  break;
1289  case Builtin::BI__exception_info:
1290  case Builtin::BI_exception_info:
1291  if (SemaBuiltinSEHScopeCheck(*this, TheCall, Scope::SEHFilterScope,
1292  diag::err_seh___except_filter))
1293  return ExprError();
1294  break;
1295  case Builtin::BI__GetExceptionInfo:
1296  if (checkArgCount(*this, TheCall, 1))
1297  return ExprError();
1298 
1299  if (CheckCXXThrowOperand(
1300  TheCall->getBeginLoc(),
1301  Context.getExceptionObjectType(FDecl->getParamDecl(0)->getType()),
1302  TheCall))
1303  return ExprError();
1304 
1305  TheCall->setType(Context.VoidPtrTy);
1306  break;
1307  // OpenCL v2.0, s6.13.16 - Pipe functions
1308  case Builtin::BIread_pipe:
1309  case Builtin::BIwrite_pipe:
1310  // Since those two functions are declared with var args, we need a semantic
1311  // check for the argument.
1312  if (SemaBuiltinRWPipe(*this, TheCall))
1313  return ExprError();
1314  break;
1315  case Builtin::BIreserve_read_pipe:
1316  case Builtin::BIreserve_write_pipe:
1317  case Builtin::BIwork_group_reserve_read_pipe:
1318  case Builtin::BIwork_group_reserve_write_pipe:
1319  if (SemaBuiltinReserveRWPipe(*this, TheCall))
1320  return ExprError();
1321  break;
1322  case Builtin::BIsub_group_reserve_read_pipe:
1323  case Builtin::BIsub_group_reserve_write_pipe:
1324  if (checkOpenCLSubgroupExt(*this, TheCall) ||
1325  SemaBuiltinReserveRWPipe(*this, TheCall))
1326  return ExprError();
1327  break;
1328  case Builtin::BIcommit_read_pipe:
1329  case Builtin::BIcommit_write_pipe:
1330  case Builtin::BIwork_group_commit_read_pipe:
1331  case Builtin::BIwork_group_commit_write_pipe:
1332  if (SemaBuiltinCommitRWPipe(*this, TheCall))
1333  return ExprError();
1334  break;
1335  case Builtin::BIsub_group_commit_read_pipe:
1336  case Builtin::BIsub_group_commit_write_pipe:
1337  if (checkOpenCLSubgroupExt(*this, TheCall) ||
1338  SemaBuiltinCommitRWPipe(*this, TheCall))
1339  return ExprError();
1340  break;
1341  case Builtin::BIget_pipe_num_packets:
1342  case Builtin::BIget_pipe_max_packets:
1343  if (SemaBuiltinPipePackets(*this, TheCall))
1344  return ExprError();
1345  break;
1346  case Builtin::BIto_global:
1347  case Builtin::BIto_local:
1348  case Builtin::BIto_private:
1349  if (SemaOpenCLBuiltinToAddr(*this, BuiltinID, TheCall))
1350  return ExprError();
1351  break;
1352  // OpenCL v2.0, s6.13.17 - Enqueue kernel functions.
1353  case Builtin::BIenqueue_kernel:
1354  if (SemaOpenCLBuiltinEnqueueKernel(*this, TheCall))
1355  return ExprError();
1356  break;
1357  case Builtin::BIget_kernel_work_group_size:
1358  case Builtin::BIget_kernel_preferred_work_group_size_multiple:
1359  if (SemaOpenCLBuiltinKernelWorkGroupSize(*this, TheCall))
1360  return ExprError();
1361  break;
1362  case Builtin::BIget_kernel_max_sub_group_size_for_ndrange:
1363  case Builtin::BIget_kernel_sub_group_count_for_ndrange:
1364  if (SemaOpenCLBuiltinNDRangeAndBlock(*this, TheCall))
1365  return ExprError();
1366  break;
1367  case Builtin::BI__builtin_os_log_format:
1368  case Builtin::BI__builtin_os_log_format_buffer_size:
1369  if (SemaBuiltinOSLogFormat(TheCall))
1370  return ExprError();
1371  break;
1372  }
1373 
1374  // Since the target specific builtins for each arch overlap, only check those
1375  // of the arch we are compiling for.
1376  if (Context.BuiltinInfo.isTSBuiltin(BuiltinID)) {
1377  switch (Context.getTargetInfo().getTriple().getArch()) {
1378  case llvm::Triple::arm:
1379  case llvm::Triple::armeb:
1380  case llvm::Triple::thumb:
1381  case llvm::Triple::thumbeb:
1382  if (CheckARMBuiltinFunctionCall(BuiltinID, TheCall))
1383  return ExprError();
1384  break;
1385  case llvm::Triple::aarch64:
1386  case llvm::Triple::aarch64_be:
1387  if (CheckAArch64BuiltinFunctionCall(BuiltinID, TheCall))
1388  return ExprError();
1389  break;
1390  case llvm::Triple::hexagon:
1391  if (CheckHexagonBuiltinFunctionCall(BuiltinID, TheCall))
1392  return ExprError();
1393  break;
1394  case llvm::Triple::mips:
1395  case llvm::Triple::mipsel:
1396  case llvm::Triple::mips64:
1397  case llvm::Triple::mips64el:
1398  if (CheckMipsBuiltinFunctionCall(BuiltinID, TheCall))
1399  return ExprError();
1400  break;
1401  case llvm::Triple::systemz:
1402  if (CheckSystemZBuiltinFunctionCall(BuiltinID, TheCall))
1403  return ExprError();
1404  break;
1405  case llvm::Triple::x86:
1406  case llvm::Triple::x86_64:
1407  if (CheckX86BuiltinFunctionCall(BuiltinID, TheCall))
1408  return ExprError();
1409  break;
1410  case llvm::Triple::ppc:
1411  case llvm::Triple::ppc64:
1412  case llvm::Triple::ppc64le:
1413  if (CheckPPCBuiltinFunctionCall(BuiltinID, TheCall))
1414  return ExprError();
1415  break;
1416  default:
1417  break;
1418  }
1419  }
1420 
1421  return TheCallResult;
1422 }
1423 
1424 // Get the valid immediate range for the specified NEON type code.
1425 static unsigned RFT(unsigned t, bool shift = false, bool ForceQuad = false) {
1426  NeonTypeFlags Type(t);
1427  int IsQuad = ForceQuad ? true : Type.isQuad();
1428  switch (Type.getEltType()) {
1429  case NeonTypeFlags::Int8:
1430  case NeonTypeFlags::Poly8:
1431  return shift ? 7 : (8 << IsQuad) - 1;
1432  case NeonTypeFlags::Int16:
1433  case NeonTypeFlags::Poly16:
1434  return shift ? 15 : (4 << IsQuad) - 1;
1435  case NeonTypeFlags::Int32:
1436  return shift ? 31 : (2 << IsQuad) - 1;
1437  case NeonTypeFlags::Int64:
1438  case NeonTypeFlags::Poly64:
1439  return shift ? 63 : (1 << IsQuad) - 1;
1441  return shift ? 127 : (1 << IsQuad) - 1;
1443  assert(!shift && "cannot shift float types!");
1444  return (4 << IsQuad) - 1;
1446  assert(!shift && "cannot shift float types!");
1447  return (2 << IsQuad) - 1;
1449  assert(!shift && "cannot shift float types!");
1450  return (1 << IsQuad) - 1;
1451  }
1452  llvm_unreachable("Invalid NeonTypeFlag!");
1453 }
1454 
1455 /// getNeonEltType - Return the QualType corresponding to the elements of
1456 /// the vector type specified by the NeonTypeFlags. This is used to check
1457 /// the pointer arguments for Neon load/store intrinsics.
1459  bool IsPolyUnsigned, bool IsInt64Long) {
1460  switch (Flags.getEltType()) {
1461  case NeonTypeFlags::Int8:
1462  return Flags.isUnsigned() ? Context.UnsignedCharTy : Context.SignedCharTy;
1463  case NeonTypeFlags::Int16:
1464  return Flags.isUnsigned() ? Context.UnsignedShortTy : Context.ShortTy;
1465  case NeonTypeFlags::Int32:
1466  return Flags.isUnsigned() ? Context.UnsignedIntTy : Context.IntTy;
1467  case NeonTypeFlags::Int64:
1468  if (IsInt64Long)
1469  return Flags.isUnsigned() ? Context.UnsignedLongTy : Context.LongTy;
1470  else
1471  return Flags.isUnsigned() ? Context.UnsignedLongLongTy
1472  : Context.LongLongTy;
1473  case NeonTypeFlags::Poly8:
1474  return IsPolyUnsigned ? Context.UnsignedCharTy : Context.SignedCharTy;
1475  case NeonTypeFlags::Poly16:
1476  return IsPolyUnsigned ? Context.UnsignedShortTy : Context.ShortTy;
1477  case NeonTypeFlags::Poly64:
1478  if (IsInt64Long)
1479  return Context.UnsignedLongTy;
1480  else
1481  return Context.UnsignedLongLongTy;
1483  break;
1485  return Context.HalfTy;
1487  return Context.FloatTy;
1489  return Context.DoubleTy;
1490  }
1491  llvm_unreachable("Invalid NeonTypeFlag!");
1492 }
1493 
1494 bool Sema::CheckNeonBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall) {
1495  llvm::APSInt Result;
1496  uint64_t mask = 0;
1497  unsigned TV = 0;
1498  int PtrArgNum = -1;
1499  bool HasConstPtr = false;
1500  switch (BuiltinID) {
1501 #define GET_NEON_OVERLOAD_CHECK
1502 #include "clang/Basic/arm_neon.inc"
1503 #include "clang/Basic/arm_fp16.inc"
1504 #undef GET_NEON_OVERLOAD_CHECK
1505  }
1506 
1507  // For NEON intrinsics which are overloaded on vector element type, validate
1508  // the immediate which specifies which variant to emit.
1509  unsigned ImmArg = TheCall->getNumArgs()-1;
1510  if (mask) {
1511  if (SemaBuiltinConstantArg(TheCall, ImmArg, Result))
1512  return true;
1513 
1514  TV = Result.getLimitedValue(64);
1515  if ((TV > 63) || (mask & (1ULL << TV)) == 0)
1516  return Diag(TheCall->getBeginLoc(), diag::err_invalid_neon_type_code)
1517  << TheCall->getArg(ImmArg)->getSourceRange();
1518  }
1519 
1520  if (PtrArgNum >= 0) {
1521  // Check that pointer arguments have the specified type.
1522  Expr *Arg = TheCall->getArg(PtrArgNum);
1523  if (ImplicitCastExpr *ICE = dyn_cast<ImplicitCastExpr>(Arg))
1524  Arg = ICE->getSubExpr();
1525  ExprResult RHS = DefaultFunctionArrayLvalueConversion(Arg);
1526  QualType RHSTy = RHS.get()->getType();
1527 
1528  llvm::Triple::ArchType Arch = Context.getTargetInfo().getTriple().getArch();
1529  bool IsPolyUnsigned = Arch == llvm::Triple::aarch64 ||
1530  Arch == llvm::Triple::aarch64_be;
1531  bool IsInt64Long =
1533  QualType EltTy =
1534  getNeonEltType(NeonTypeFlags(TV), Context, IsPolyUnsigned, IsInt64Long);
1535  if (HasConstPtr)
1536  EltTy = EltTy.withConst();
1537  QualType LHSTy = Context.getPointerType(EltTy);
1538  AssignConvertType ConvTy;
1539  ConvTy = CheckSingleAssignmentConstraints(LHSTy, RHS);
1540  if (RHS.isInvalid())
1541  return true;
1542  if (DiagnoseAssignmentResult(ConvTy, Arg->getBeginLoc(), LHSTy, RHSTy,
1543  RHS.get(), AA_Assigning))
1544  return true;
1545  }
1546 
1547  // For NEON intrinsics which take an immediate value as part of the
1548  // instruction, range check them here.
1549  unsigned i = 0, l = 0, u = 0;
1550  switch (BuiltinID) {
1551  default:
1552  return false;
1553  #define GET_NEON_IMMEDIATE_CHECK
1554  #include "clang/Basic/arm_neon.inc"
1555  #include "clang/Basic/arm_fp16.inc"
1556  #undef GET_NEON_IMMEDIATE_CHECK
1557  }
1558 
1559  return SemaBuiltinConstantArgRange(TheCall, i, l, u + l);
1560 }
1561 
1562 bool Sema::CheckARMBuiltinExclusiveCall(unsigned BuiltinID, CallExpr *TheCall,
1563  unsigned MaxWidth) {
1564  assert((BuiltinID == ARM::BI__builtin_arm_ldrex ||
1565  BuiltinID == ARM::BI__builtin_arm_ldaex ||
1566  BuiltinID == ARM::BI__builtin_arm_strex ||
1567  BuiltinID == ARM::BI__builtin_arm_stlex ||
1568  BuiltinID == AArch64::BI__builtin_arm_ldrex ||
1569  BuiltinID == AArch64::BI__builtin_arm_ldaex ||
1570  BuiltinID == AArch64::BI__builtin_arm_strex ||
1571  BuiltinID == AArch64::BI__builtin_arm_stlex) &&
1572  "unexpected ARM builtin");
1573  bool IsLdrex = BuiltinID == ARM::BI__builtin_arm_ldrex ||
1574  BuiltinID == ARM::BI__builtin_arm_ldaex ||
1575  BuiltinID == AArch64::BI__builtin_arm_ldrex ||
1576  BuiltinID == AArch64::BI__builtin_arm_ldaex;
1577 
1578  DeclRefExpr *DRE =cast<DeclRefExpr>(TheCall->getCallee()->IgnoreParenCasts());
1579 
1580  // Ensure that we have the proper number of arguments.
1581  if (checkArgCount(*this, TheCall, IsLdrex ? 1 : 2))
1582  return true;
1583 
1584  // Inspect the pointer argument of the atomic builtin. This should always be
1585  // a pointer type, whose element is an integral scalar or pointer type.
1586  // Because it is a pointer type, we don't have to worry about any implicit
1587  // casts here.
1588  Expr *PointerArg = TheCall->getArg(IsLdrex ? 0 : 1);
1589  ExprResult PointerArgRes = DefaultFunctionArrayLvalueConversion(PointerArg);
1590  if (PointerArgRes.isInvalid())
1591  return true;
1592  PointerArg = PointerArgRes.get();
1593 
1594  const PointerType *pointerType = PointerArg->getType()->getAs<PointerType>();
1595  if (!pointerType) {
1596  Diag(DRE->getBeginLoc(), diag::err_atomic_builtin_must_be_pointer)
1597  << PointerArg->getType() << PointerArg->getSourceRange();
1598  return true;
1599  }
1600 
1601  // ldrex takes a "const volatile T*" and strex takes a "volatile T*". Our next
1602  // task is to insert the appropriate casts into the AST. First work out just
1603  // what the appropriate type is.
1604  QualType ValType = pointerType->getPointeeType();
1605  QualType AddrType = ValType.getUnqualifiedType().withVolatile();
1606  if (IsLdrex)
1607  AddrType.addConst();
1608 
1609  // Issue a warning if the cast is dodgy.
1610  CastKind CastNeeded = CK_NoOp;
1611  if (!AddrType.isAtLeastAsQualifiedAs(ValType)) {
1612  CastNeeded = CK_BitCast;
1613  Diag(DRE->getBeginLoc(), diag::ext_typecheck_convert_discards_qualifiers)
1614  << PointerArg->getType() << Context.getPointerType(AddrType)
1615  << AA_Passing << PointerArg->getSourceRange();
1616  }
1617 
1618  // Finally, do the cast and replace the argument with the corrected version.
1619  AddrType = Context.getPointerType(AddrType);
1620  PointerArgRes = ImpCastExprToType(PointerArg, AddrType, CastNeeded);
1621  if (PointerArgRes.isInvalid())
1622  return true;
1623  PointerArg = PointerArgRes.get();
1624 
1625  TheCall->setArg(IsLdrex ? 0 : 1, PointerArg);
1626 
1627  // In general, we allow ints, floats and pointers to be loaded and stored.
1628  if (!ValType->isIntegerType() && !ValType->isAnyPointerType() &&
1629  !ValType->isBlockPointerType() && !ValType->isFloatingType()) {
1630  Diag(DRE->getBeginLoc(), diag::err_atomic_builtin_must_be_pointer_intfltptr)
1631  << PointerArg->getType() << PointerArg->getSourceRange();
1632  return true;
1633  }
1634 
1635  // But ARM doesn't have instructions to deal with 128-bit versions.
1636  if (Context.getTypeSize(ValType) > MaxWidth) {
1637  assert(MaxWidth == 64 && "Diagnostic unexpectedly inaccurate");
1638  Diag(DRE->getBeginLoc(), diag::err_atomic_exclusive_builtin_pointer_size)
1639  << PointerArg->getType() << PointerArg->getSourceRange();
1640  return true;
1641  }
1642 
1643  switch (ValType.getObjCLifetime()) {
1644  case Qualifiers::OCL_None:
1646  // okay
1647  break;
1648 
1649  case Qualifiers::OCL_Weak:
1652  Diag(DRE->getBeginLoc(), diag::err_arc_atomic_ownership)
1653  << ValType << PointerArg->getSourceRange();
1654  return true;
1655  }
1656 
1657  if (IsLdrex) {
1658  TheCall->setType(ValType);
1659  return false;
1660  }
1661 
1662  // Initialize the argument to be stored.
1663  ExprResult ValArg = TheCall->getArg(0);
1665  Context, ValType, /*consume*/ false);
1666  ValArg = PerformCopyInitialization(Entity, SourceLocation(), ValArg);
1667  if (ValArg.isInvalid())
1668  return true;
1669  TheCall->setArg(0, ValArg.get());
1670 
1671  // __builtin_arm_strex always returns an int. It's marked as such in the .def,
1672  // but the custom checker bypasses all default analysis.
1673  TheCall->setType(Context.IntTy);
1674  return false;
1675 }
1676 
1677 bool Sema::CheckARMBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall) {
1678  if (BuiltinID == ARM::BI__builtin_arm_ldrex ||
1679  BuiltinID == ARM::BI__builtin_arm_ldaex ||
1680  BuiltinID == ARM::BI__builtin_arm_strex ||
1681  BuiltinID == ARM::BI__builtin_arm_stlex) {
1682  return CheckARMBuiltinExclusiveCall(BuiltinID, TheCall, 64);
1683  }
1684 
1685  if (BuiltinID == ARM::BI__builtin_arm_prefetch) {
1686  return SemaBuiltinConstantArgRange(TheCall, 1, 0, 1) ||
1687  SemaBuiltinConstantArgRange(TheCall, 2, 0, 1);
1688  }
1689 
1690  if (BuiltinID == ARM::BI__builtin_arm_rsr64 ||
1691  BuiltinID == ARM::BI__builtin_arm_wsr64)
1692  return SemaBuiltinARMSpecialReg(BuiltinID, TheCall, 0, 3, false);
1693 
1694  if (BuiltinID == ARM::BI__builtin_arm_rsr ||
1695  BuiltinID == ARM::BI__builtin_arm_rsrp ||
1696  BuiltinID == ARM::BI__builtin_arm_wsr ||
1697  BuiltinID == ARM::BI__builtin_arm_wsrp)
1698  return SemaBuiltinARMSpecialReg(BuiltinID, TheCall, 0, 5, true);
1699 
1700  if (CheckNeonBuiltinFunctionCall(BuiltinID, TheCall))
1701  return true;
1702 
1703  // For intrinsics which take an immediate value as part of the instruction,
1704  // range check them here.
1705  // FIXME: VFP Intrinsics should error if VFP not present.
1706  switch (BuiltinID) {
1707  default: return false;
1708  case ARM::BI__builtin_arm_ssat:
1709  return SemaBuiltinConstantArgRange(TheCall, 1, 1, 32);
1710  case ARM::BI__builtin_arm_usat:
1711  return SemaBuiltinConstantArgRange(TheCall, 1, 0, 31);
1712  case ARM::BI__builtin_arm_ssat16:
1713  return SemaBuiltinConstantArgRange(TheCall, 1, 1, 16);
1714  case ARM::BI__builtin_arm_usat16:
1715  return SemaBuiltinConstantArgRange(TheCall, 1, 0, 15);
1716  case ARM::BI__builtin_arm_vcvtr_f:
1717  case ARM::BI__builtin_arm_vcvtr_d:
1718  return SemaBuiltinConstantArgRange(TheCall, 1, 0, 1);
1719  case ARM::BI__builtin_arm_dmb:
1720  case ARM::BI__builtin_arm_dsb:
1721  case ARM::BI__builtin_arm_isb:
1722  case ARM::BI__builtin_arm_dbg:
1723  return SemaBuiltinConstantArgRange(TheCall, 0, 0, 15);
1724  }
1725 }
1726 
1727 bool Sema::CheckAArch64BuiltinFunctionCall(unsigned BuiltinID,
1728  CallExpr *TheCall) {
1729  if (BuiltinID == AArch64::BI__builtin_arm_ldrex ||
1730  BuiltinID == AArch64::BI__builtin_arm_ldaex ||
1731  BuiltinID == AArch64::BI__builtin_arm_strex ||
1732  BuiltinID == AArch64::BI__builtin_arm_stlex) {
1733  return CheckARMBuiltinExclusiveCall(BuiltinID, TheCall, 128);
1734  }
1735 
1736  if (BuiltinID == AArch64::BI__builtin_arm_prefetch) {
1737  return SemaBuiltinConstantArgRange(TheCall, 1, 0, 1) ||
1738  SemaBuiltinConstantArgRange(TheCall, 2, 0, 2) ||
1739  SemaBuiltinConstantArgRange(TheCall, 3, 0, 1) ||
1740  SemaBuiltinConstantArgRange(TheCall, 4, 0, 1);
1741  }
1742 
1743  if (BuiltinID == AArch64::BI__builtin_arm_rsr64 ||
1744  BuiltinID == AArch64::BI__builtin_arm_wsr64)
1745  return SemaBuiltinARMSpecialReg(BuiltinID, TheCall, 0, 5, true);
1746 
1747  if (BuiltinID == AArch64::BI__builtin_arm_rsr ||
1748  BuiltinID == AArch64::BI__builtin_arm_rsrp ||
1749  BuiltinID == AArch64::BI__builtin_arm_wsr ||
1750  BuiltinID == AArch64::BI__builtin_arm_wsrp)
1751  return SemaBuiltinARMSpecialReg(BuiltinID, TheCall, 0, 5, true);
1752 
1753  // Only check the valid encoding range. Any constant in this range would be
1754  // converted to a register of the form S1_2_C3_C4_5. Let the hardware throw
1755  // an exception for incorrect registers. This matches MSVC behavior.
1756  if (BuiltinID == AArch64::BI_ReadStatusReg ||
1757  BuiltinID == AArch64::BI_WriteStatusReg)
1758  return SemaBuiltinConstantArgRange(TheCall, 0, 0, 0x7fff);
1759 
1760  if (BuiltinID == AArch64::BI__getReg)
1761  return SemaBuiltinConstantArgRange(TheCall, 0, 0, 31);
1762 
1763  if (CheckNeonBuiltinFunctionCall(BuiltinID, TheCall))
1764  return true;
1765 
1766  // For intrinsics which take an immediate value as part of the instruction,
1767  // range check them here.
1768  unsigned i = 0, l = 0, u = 0;
1769  switch (BuiltinID) {
1770  default: return false;
1771  case AArch64::BI__builtin_arm_dmb:
1772  case AArch64::BI__builtin_arm_dsb:
1773  case AArch64::BI__builtin_arm_isb: l = 0; u = 15; break;
1774  }
1775 
1776  return SemaBuiltinConstantArgRange(TheCall, i, l, u + l);
1777 }
1778 
1779 bool Sema::CheckHexagonBuiltinCpu(unsigned BuiltinID, CallExpr *TheCall) {
1780  struct BuiltinAndString {
1781  unsigned BuiltinID;
1782  const char *Str;
1783  };
1784 
1785  static BuiltinAndString ValidCPU[] = {
1786  { Hexagon::BI__builtin_HEXAGON_A6_vcmpbeq_notany, "v65,v66" },
1787  { Hexagon::BI__builtin_HEXAGON_A6_vminub_RdP, "v62,v65,v66" },
1788  { Hexagon::BI__builtin_HEXAGON_F2_dfadd, "v66" },
1789  { Hexagon::BI__builtin_HEXAGON_F2_dfsub, "v66" },
1790  { Hexagon::BI__builtin_HEXAGON_M2_mnaci, "v66" },
1791  { Hexagon::BI__builtin_HEXAGON_M6_vabsdiffb, "v62,v65,v66" },
1792  { Hexagon::BI__builtin_HEXAGON_M6_vabsdiffub, "v62,v65,v66" },
1793  { Hexagon::BI__builtin_HEXAGON_S2_mask, "v66" },
1794  { Hexagon::BI__builtin_HEXAGON_S6_rol_i_p_acc, "v60,v62,v65,v66" },
1795  { Hexagon::BI__builtin_HEXAGON_S6_rol_i_p_and, "v60,v62,v65,v66" },
1796  { Hexagon::BI__builtin_HEXAGON_S6_rol_i_p_nac, "v60,v62,v65,v66" },
1797  { Hexagon::BI__builtin_HEXAGON_S6_rol_i_p_or, "v60,v62,v65,v66" },
1798  { Hexagon::BI__builtin_HEXAGON_S6_rol_i_p, "v60,v62,v65,v66" },
1799  { Hexagon::BI__builtin_HEXAGON_S6_rol_i_p_xacc, "v60,v62,v65,v66" },
1800  { Hexagon::BI__builtin_HEXAGON_S6_rol_i_r_acc, "v60,v62,v65,v66" },
1801  { Hexagon::BI__builtin_HEXAGON_S6_rol_i_r_and, "v60,v62,v65,v66" },
1802  { Hexagon::BI__builtin_HEXAGON_S6_rol_i_r_nac, "v60,v62,v65,v66" },
1803  { Hexagon::BI__builtin_HEXAGON_S6_rol_i_r_or, "v60,v62,v65,v66" },
1804  { Hexagon::BI__builtin_HEXAGON_S6_rol_i_r, "v60,v62,v65,v66" },
1805  { Hexagon::BI__builtin_HEXAGON_S6_rol_i_r_xacc, "v60,v62,v65,v66" },
1806  { Hexagon::BI__builtin_HEXAGON_S6_vsplatrbp, "v62,v65,v66" },
1807  { Hexagon::BI__builtin_HEXAGON_S6_vtrunehb_ppp, "v62,v65,v66" },
1808  { Hexagon::BI__builtin_HEXAGON_S6_vtrunohb_ppp, "v62,v65,v66" },
1809  };
1810 
1811  static BuiltinAndString ValidHVX[] = {
1812  { Hexagon::BI__builtin_HEXAGON_V6_hi, "v60,v62,v65,v66" },
1813  { Hexagon::BI__builtin_HEXAGON_V6_hi_128B, "v60,v62,v65,v66" },
1814  { Hexagon::BI__builtin_HEXAGON_V6_lo, "v60,v62,v65,v66" },
1815  { Hexagon::BI__builtin_HEXAGON_V6_lo_128B, "v60,v62,v65,v66" },
1816  { Hexagon::BI__builtin_HEXAGON_V6_extractw, "v60,v62,v65,v66" },
1817  { Hexagon::BI__builtin_HEXAGON_V6_extractw_128B, "v60,v62,v65,v66" },
1818  { Hexagon::BI__builtin_HEXAGON_V6_lvsplatb, "v62,v65,v66" },
1819  { Hexagon::BI__builtin_HEXAGON_V6_lvsplatb_128B, "v62,v65,v66" },
1820  { Hexagon::BI__builtin_HEXAGON_V6_lvsplath, "v62,v65,v66" },
1821  { Hexagon::BI__builtin_HEXAGON_V6_lvsplath_128B, "v62,v65,v66" },
1822  { Hexagon::BI__builtin_HEXAGON_V6_lvsplatw, "v60,v62,v65,v66" },
1823  { Hexagon::BI__builtin_HEXAGON_V6_lvsplatw_128B, "v60,v62,v65,v66" },
1824  { Hexagon::BI__builtin_HEXAGON_V6_pred_and, "v60,v62,v65,v66" },
1825  { Hexagon::BI__builtin_HEXAGON_V6_pred_and_128B, "v60,v62,v65,v66" },
1826  { Hexagon::BI__builtin_HEXAGON_V6_pred_and_n, "v60,v62,v65,v66" },
1827  { Hexagon::BI__builtin_HEXAGON_V6_pred_and_n_128B, "v60,v62,v65,v66" },
1828  { Hexagon::BI__builtin_HEXAGON_V6_pred_not, "v60,v62,v65,v66" },
1829  { Hexagon::BI__builtin_HEXAGON_V6_pred_not_128B, "v60,v62,v65,v66" },
1830  { Hexagon::BI__builtin_HEXAGON_V6_pred_or, "v60,v62,v65,v66" },
1831  { Hexagon::BI__builtin_HEXAGON_V6_pred_or_128B, "v60,v62,v65,v66" },
1832  { Hexagon::BI__builtin_HEXAGON_V6_pred_or_n, "v60,v62,v65,v66" },
1833  { Hexagon::BI__builtin_HEXAGON_V6_pred_or_n_128B, "v60,v62,v65,v66" },
1834  { Hexagon::BI__builtin_HEXAGON_V6_pred_scalar2, "v60,v62,v65,v66" },
1835  { Hexagon::BI__builtin_HEXAGON_V6_pred_scalar2_128B, "v60,v62,v65,v66" },
1836  { Hexagon::BI__builtin_HEXAGON_V6_pred_scalar2v2, "v62,v65,v66" },
1837  { Hexagon::BI__builtin_HEXAGON_V6_pred_scalar2v2_128B, "v62,v65,v66" },
1838  { Hexagon::BI__builtin_HEXAGON_V6_pred_xor, "v60,v62,v65,v66" },
1839  { Hexagon::BI__builtin_HEXAGON_V6_pred_xor_128B, "v60,v62,v65,v66" },
1840  { Hexagon::BI__builtin_HEXAGON_V6_shuffeqh, "v62,v65,v66" },
1841  { Hexagon::BI__builtin_HEXAGON_V6_shuffeqh_128B, "v62,v65,v66" },
1842  { Hexagon::BI__builtin_HEXAGON_V6_shuffeqw, "v62,v65,v66" },
1843  { Hexagon::BI__builtin_HEXAGON_V6_shuffeqw_128B, "v62,v65,v66" },
1844  { Hexagon::BI__builtin_HEXAGON_V6_vabsb, "v65,v66" },
1845  { Hexagon::BI__builtin_HEXAGON_V6_vabsb_128B, "v65,v66" },
1846  { Hexagon::BI__builtin_HEXAGON_V6_vabsb_sat, "v65,v66" },
1847  { Hexagon::BI__builtin_HEXAGON_V6_vabsb_sat_128B, "v65,v66" },
1848  { Hexagon::BI__builtin_HEXAGON_V6_vabsdiffh, "v60,v62,v65,v66" },
1849  { Hexagon::BI__builtin_HEXAGON_V6_vabsdiffh_128B, "v60,v62,v65,v66" },
1850  { Hexagon::BI__builtin_HEXAGON_V6_vabsdiffub, "v60,v62,v65,v66" },
1851  { Hexagon::BI__builtin_HEXAGON_V6_vabsdiffub_128B, "v60,v62,v65,v66" },
1852  { Hexagon::BI__builtin_HEXAGON_V6_vabsdiffuh, "v60,v62,v65,v66" },
1853  { Hexagon::BI__builtin_HEXAGON_V6_vabsdiffuh_128B, "v60,v62,v65,v66" },
1854  { Hexagon::BI__builtin_HEXAGON_V6_vabsdiffw, "v60,v62,v65,v66" },
1855  { Hexagon::BI__builtin_HEXAGON_V6_vabsdiffw_128B, "v60,v62,v65,v66" },
1856  { Hexagon::BI__builtin_HEXAGON_V6_vabsh, "v60,v62,v65,v66" },
1857  { Hexagon::BI__builtin_HEXAGON_V6_vabsh_128B, "v60,v62,v65,v66" },
1858  { Hexagon::BI__builtin_HEXAGON_V6_vabsh_sat, "v60,v62,v65,v66" },
1859  { Hexagon::BI__builtin_HEXAGON_V6_vabsh_sat_128B, "v60,v62,v65,v66" },
1860  { Hexagon::BI__builtin_HEXAGON_V6_vabsw, "v60,v62,v65,v66" },
1861  { Hexagon::BI__builtin_HEXAGON_V6_vabsw_128B, "v60,v62,v65,v66" },
1862  { Hexagon::BI__builtin_HEXAGON_V6_vabsw_sat, "v60,v62,v65,v66" },
1863  { Hexagon::BI__builtin_HEXAGON_V6_vabsw_sat_128B, "v60,v62,v65,v66" },
1864  { Hexagon::BI__builtin_HEXAGON_V6_vaddb, "v60,v62,v65,v66" },
1865  { Hexagon::BI__builtin_HEXAGON_V6_vaddb_128B, "v60,v62,v65,v66" },
1866  { Hexagon::BI__builtin_HEXAGON_V6_vaddb_dv, "v60,v62,v65,v66" },
1867  { Hexagon::BI__builtin_HEXAGON_V6_vaddb_dv_128B, "v60,v62,v65,v66" },
1868  { Hexagon::BI__builtin_HEXAGON_V6_vaddbsat, "v62,v65,v66" },
1869  { Hexagon::BI__builtin_HEXAGON_V6_vaddbsat_128B, "v62,v65,v66" },
1870  { Hexagon::BI__builtin_HEXAGON_V6_vaddbsat_dv, "v62,v65,v66" },
1871  { Hexagon::BI__builtin_HEXAGON_V6_vaddbsat_dv_128B, "v62,v65,v66" },
1872  { Hexagon::BI__builtin_HEXAGON_V6_vaddcarry, "v62,v65,v66" },
1873  { Hexagon::BI__builtin_HEXAGON_V6_vaddcarry_128B, "v62,v65,v66" },
1874  { Hexagon::BI__builtin_HEXAGON_V6_vaddcarrysat, "v66" },
1875  { Hexagon::BI__builtin_HEXAGON_V6_vaddcarrysat_128B, "v66" },
1876  { Hexagon::BI__builtin_HEXAGON_V6_vaddclbh, "v62,v65,v66" },
1877  { Hexagon::BI__builtin_HEXAGON_V6_vaddclbh_128B, "v62,v65,v66" },
1878  { Hexagon::BI__builtin_HEXAGON_V6_vaddclbw, "v62,v65,v66" },
1879  { Hexagon::BI__builtin_HEXAGON_V6_vaddclbw_128B, "v62,v65,v66" },
1880  { Hexagon::BI__builtin_HEXAGON_V6_vaddh, "v60,v62,v65,v66" },
1881  { Hexagon::BI__builtin_HEXAGON_V6_vaddh_128B, "v60,v62,v65,v66" },
1882  { Hexagon::BI__builtin_HEXAGON_V6_vaddh_dv, "v60,v62,v65,v66" },
1883  { Hexagon::BI__builtin_HEXAGON_V6_vaddh_dv_128B, "v60,v62,v65,v66" },
1884  { Hexagon::BI__builtin_HEXAGON_V6_vaddhsat, "v60,v62,v65,v66" },
1885  { Hexagon::BI__builtin_HEXAGON_V6_vaddhsat_128B, "v60,v62,v65,v66" },
1886  { Hexagon::BI__builtin_HEXAGON_V6_vaddhsat_dv, "v60,v62,v65,v66" },
1887  { Hexagon::BI__builtin_HEXAGON_V6_vaddhsat_dv_128B, "v60,v62,v65,v66" },
1888  { Hexagon::BI__builtin_HEXAGON_V6_vaddhw, "v60,v62,v65,v66" },
1889  { Hexagon::BI__builtin_HEXAGON_V6_vaddhw_128B, "v60,v62,v65,v66" },
1890  { Hexagon::BI__builtin_HEXAGON_V6_vaddhw_acc, "v62,v65,v66" },
1891  { Hexagon::BI__builtin_HEXAGON_V6_vaddhw_acc_128B, "v62,v65,v66" },
1892  { Hexagon::BI__builtin_HEXAGON_V6_vaddubh, "v60,v62,v65,v66" },
1893  { Hexagon::BI__builtin_HEXAGON_V6_vaddubh_128B, "v60,v62,v65,v66" },
1894  { Hexagon::BI__builtin_HEXAGON_V6_vaddubh_acc, "v62,v65,v66" },
1895  { Hexagon::BI__builtin_HEXAGON_V6_vaddubh_acc_128B, "v62,v65,v66" },
1896  { Hexagon::BI__builtin_HEXAGON_V6_vaddubsat, "v60,v62,v65,v66" },
1897  { Hexagon::BI__builtin_HEXAGON_V6_vaddubsat_128B, "v60,v62,v65,v66" },
1898  { Hexagon::BI__builtin_HEXAGON_V6_vaddubsat_dv, "v60,v62,v65,v66" },
1899  { Hexagon::BI__builtin_HEXAGON_V6_vaddubsat_dv_128B, "v60,v62,v65,v66" },
1900  { Hexagon::BI__builtin_HEXAGON_V6_vaddububb_sat, "v62,v65,v66" },
1901  { Hexagon::BI__builtin_HEXAGON_V6_vaddububb_sat_128B, "v62,v65,v66" },
1902  { Hexagon::BI__builtin_HEXAGON_V6_vadduhsat, "v60,v62,v65,v66" },
1903  { Hexagon::BI__builtin_HEXAGON_V6_vadduhsat_128B, "v60,v62,v65,v66" },
1904  { Hexagon::BI__builtin_HEXAGON_V6_vadduhsat_dv, "v60,v62,v65,v66" },
1905  { Hexagon::BI__builtin_HEXAGON_V6_vadduhsat_dv_128B, "v60,v62,v65,v66" },
1906  { Hexagon::BI__builtin_HEXAGON_V6_vadduhw, "v60,v62,v65,v66" },
1907  { Hexagon::BI__builtin_HEXAGON_V6_vadduhw_128B, "v60,v62,v65,v66" },
1908  { Hexagon::BI__builtin_HEXAGON_V6_vadduhw_acc, "v62,v65,v66" },
1909  { Hexagon::BI__builtin_HEXAGON_V6_vadduhw_acc_128B, "v62,v65,v66" },
1910  { Hexagon::BI__builtin_HEXAGON_V6_vadduwsat, "v62,v65,v66" },
1911  { Hexagon::BI__builtin_HEXAGON_V6_vadduwsat_128B, "v62,v65,v66" },
1912  { Hexagon::BI__builtin_HEXAGON_V6_vadduwsat_dv, "v62,v65,v66" },
1913  { Hexagon::BI__builtin_HEXAGON_V6_vadduwsat_dv_128B, "v62,v65,v66" },
1914  { Hexagon::BI__builtin_HEXAGON_V6_vaddw, "v60,v62,v65,v66" },
1915  { Hexagon::BI__builtin_HEXAGON_V6_vaddw_128B, "v60,v62,v65,v66" },
1916  { Hexagon::BI__builtin_HEXAGON_V6_vaddw_dv, "v60,v62,v65,v66" },
1917  { Hexagon::BI__builtin_HEXAGON_V6_vaddw_dv_128B, "v60,v62,v65,v66" },
1918  { Hexagon::BI__builtin_HEXAGON_V6_vaddwsat, "v60,v62,v65,v66" },
1919  { Hexagon::BI__builtin_HEXAGON_V6_vaddwsat_128B, "v60,v62,v65,v66" },
1920  { Hexagon::BI__builtin_HEXAGON_V6_vaddwsat_dv, "v60,v62,v65,v66" },
1921  { Hexagon::BI__builtin_HEXAGON_V6_vaddwsat_dv_128B, "v60,v62,v65,v66" },
1922  { Hexagon::BI__builtin_HEXAGON_V6_valignb, "v60,v62,v65,v66" },
1923  { Hexagon::BI__builtin_HEXAGON_V6_valignb_128B, "v60,v62,v65,v66" },
1924  { Hexagon::BI__builtin_HEXAGON_V6_valignbi, "v60,v62,v65,v66" },
1925  { Hexagon::BI__builtin_HEXAGON_V6_valignbi_128B, "v60,v62,v65,v66" },
1926  { Hexagon::BI__builtin_HEXAGON_V6_vand, "v60,v62,v65,v66" },
1927  { Hexagon::BI__builtin_HEXAGON_V6_vand_128B, "v60,v62,v65,v66" },
1928  { Hexagon::BI__builtin_HEXAGON_V6_vandnqrt, "v62,v65,v66" },
1929  { Hexagon::BI__builtin_HEXAGON_V6_vandnqrt_128B, "v62,v65,v66" },
1930  { Hexagon::BI__builtin_HEXAGON_V6_vandnqrt_acc, "v62,v65,v66" },
1931  { Hexagon::BI__builtin_HEXAGON_V6_vandnqrt_acc_128B, "v62,v65,v66" },
1932  { Hexagon::BI__builtin_HEXAGON_V6_vandqrt, "v60,v62,v65,v66" },
1933  { Hexagon::BI__builtin_HEXAGON_V6_vandqrt_128B, "v60,v62,v65,v66" },
1934  { Hexagon::BI__builtin_HEXAGON_V6_vandqrt_acc, "v60,v62,v65,v66" },
1935  { Hexagon::BI__builtin_HEXAGON_V6_vandqrt_acc_128B, "v60,v62,v65,v66" },
1936  { Hexagon::BI__builtin_HEXAGON_V6_vandvnqv, "v62,v65,v66" },
1937  { Hexagon::BI__builtin_HEXAGON_V6_vandvnqv_128B, "v62,v65,v66" },
1938  { Hexagon::BI__builtin_HEXAGON_V6_vandvqv, "v62,v65,v66" },
1939  { Hexagon::BI__builtin_HEXAGON_V6_vandvqv_128B, "v62,v65,v66" },
1940  { Hexagon::BI__builtin_HEXAGON_V6_vandvrt, "v60,v62,v65,v66" },
1941  { Hexagon::BI__builtin_HEXAGON_V6_vandvrt_128B, "v60,v62,v65,v66" },
1942  { Hexagon::BI__builtin_HEXAGON_V6_vandvrt_acc, "v60,v62,v65,v66" },
1943  { Hexagon::BI__builtin_HEXAGON_V6_vandvrt_acc_128B, "v60,v62,v65,v66" },
1944  { Hexagon::BI__builtin_HEXAGON_V6_vaslh, "v60,v62,v65,v66" },
1945  { Hexagon::BI__builtin_HEXAGON_V6_vaslh_128B, "v60,v62,v65,v66" },
1946  { Hexagon::BI__builtin_HEXAGON_V6_vaslh_acc, "v65,v66" },
1947  { Hexagon::BI__builtin_HEXAGON_V6_vaslh_acc_128B, "v65,v66" },
1948  { Hexagon::BI__builtin_HEXAGON_V6_vaslhv, "v60,v62,v65,v66" },
1949  { Hexagon::BI__builtin_HEXAGON_V6_vaslhv_128B, "v60,v62,v65,v66" },
1950  { Hexagon::BI__builtin_HEXAGON_V6_vaslw, "v60,v62,v65,v66" },
1951  { Hexagon::BI__builtin_HEXAGON_V6_vaslw_128B, "v60,v62,v65,v66" },
1952  { Hexagon::BI__builtin_HEXAGON_V6_vaslw_acc, "v60,v62,v65,v66" },
1953  { Hexagon::BI__builtin_HEXAGON_V6_vaslw_acc_128B, "v60,v62,v65,v66" },
1954  { Hexagon::BI__builtin_HEXAGON_V6_vaslwv, "v60,v62,v65,v66" },
1955  { Hexagon::BI__builtin_HEXAGON_V6_vaslwv_128B, "v60,v62,v65,v66" },
1956  { Hexagon::BI__builtin_HEXAGON_V6_vasrh, "v60,v62,v65,v66" },
1957  { Hexagon::BI__builtin_HEXAGON_V6_vasrh_128B, "v60,v62,v65,v66" },
1958  { Hexagon::BI__builtin_HEXAGON_V6_vasrh_acc, "v65,v66" },
1959  { Hexagon::BI__builtin_HEXAGON_V6_vasrh_acc_128B, "v65,v66" },
1960  { Hexagon::BI__builtin_HEXAGON_V6_vasrhbrndsat, "v60,v62,v65,v66" },
1961  { Hexagon::BI__builtin_HEXAGON_V6_vasrhbrndsat_128B, "v60,v62,v65,v66" },
1962  { Hexagon::BI__builtin_HEXAGON_V6_vasrhbsat, "v62,v65,v66" },
1963  { Hexagon::BI__builtin_HEXAGON_V6_vasrhbsat_128B, "v62,v65,v66" },
1964  { Hexagon::BI__builtin_HEXAGON_V6_vasrhubrndsat, "v60,v62,v65,v66" },
1965  { Hexagon::BI__builtin_HEXAGON_V6_vasrhubrndsat_128B, "v60,v62,v65,v66" },
1966  { Hexagon::BI__builtin_HEXAGON_V6_vasrhubsat, "v60,v62,v65,v66" },
1967  { Hexagon::BI__builtin_HEXAGON_V6_vasrhubsat_128B, "v60,v62,v65,v66" },
1968  { Hexagon::BI__builtin_HEXAGON_V6_vasrhv, "v60,v62,v65,v66" },
1969  { Hexagon::BI__builtin_HEXAGON_V6_vasrhv_128B, "v60,v62,v65,v66" },
1970  { Hexagon::BI__builtin_HEXAGON_V6_vasr_into, "v66" },
1971  { Hexagon::BI__builtin_HEXAGON_V6_vasr_into_128B, "v66" },
1972  { Hexagon::BI__builtin_HEXAGON_V6_vasruhubrndsat, "v65,v66" },
1973  { Hexagon::BI__builtin_HEXAGON_V6_vasruhubrndsat_128B, "v65,v66" },
1974  { Hexagon::BI__builtin_HEXAGON_V6_vasruhubsat, "v65,v66" },
1975  { Hexagon::BI__builtin_HEXAGON_V6_vasruhubsat_128B, "v65,v66" },
1976  { Hexagon::BI__builtin_HEXAGON_V6_vasruwuhrndsat, "v62,v65,v66" },
1977  { Hexagon::BI__builtin_HEXAGON_V6_vasruwuhrndsat_128B, "v62,v65,v66" },
1978  { Hexagon::BI__builtin_HEXAGON_V6_vasruwuhsat, "v65,v66" },
1979  { Hexagon::BI__builtin_HEXAGON_V6_vasruwuhsat_128B, "v65,v66" },
1980  { Hexagon::BI__builtin_HEXAGON_V6_vasrw, "v60,v62,v65,v66" },
1981  { Hexagon::BI__builtin_HEXAGON_V6_vasrw_128B, "v60,v62,v65,v66" },
1982  { Hexagon::BI__builtin_HEXAGON_V6_vasrw_acc, "v60,v62,v65,v66" },
1983  { Hexagon::BI__builtin_HEXAGON_V6_vasrw_acc_128B, "v60,v62,v65,v66" },
1984  { Hexagon::BI__builtin_HEXAGON_V6_vasrwh, "v60,v62,v65,v66" },
1985  { Hexagon::BI__builtin_HEXAGON_V6_vasrwh_128B, "v60,v62,v65,v66" },
1986  { Hexagon::BI__builtin_HEXAGON_V6_vasrwhrndsat, "v60,v62,v65,v66" },
1987  { Hexagon::BI__builtin_HEXAGON_V6_vasrwhrndsat_128B, "v60,v62,v65,v66" },
1988  { Hexagon::BI__builtin_HEXAGON_V6_vasrwhsat, "v60,v62,v65,v66" },
1989  { Hexagon::BI__builtin_HEXAGON_V6_vasrwhsat_128B, "v60,v62,v65,v66" },
1990  { Hexagon::BI__builtin_HEXAGON_V6_vasrwuhrndsat, "v62,v65,v66" },
1991  { Hexagon::BI__builtin_HEXAGON_V6_vasrwuhrndsat_128B, "v62,v65,v66" },
1992  { Hexagon::BI__builtin_HEXAGON_V6_vasrwuhsat, "v60,v62,v65,v66" },
1993  { Hexagon::BI__builtin_HEXAGON_V6_vasrwuhsat_128B, "v60,v62,v65,v66" },
1994  { Hexagon::BI__builtin_HEXAGON_V6_vasrwv, "v60,v62,v65,v66" },
1995  { Hexagon::BI__builtin_HEXAGON_V6_vasrwv_128B, "v60,v62,v65,v66" },
1996  { Hexagon::BI__builtin_HEXAGON_V6_vassign, "v60,v62,v65,v66" },
1997  { Hexagon::BI__builtin_HEXAGON_V6_vassign_128B, "v60,v62,v65,v66" },
1998  { Hexagon::BI__builtin_HEXAGON_V6_vassignp, "v60,v62,v65,v66" },
1999  { Hexagon::BI__builtin_HEXAGON_V6_vassignp_128B, "v60,v62,v65,v66" },
2000  { Hexagon::BI__builtin_HEXAGON_V6_vavgb, "v65,v66" },
2001  { Hexagon::BI__builtin_HEXAGON_V6_vavgb_128B, "v65,v66" },
2002  { Hexagon::BI__builtin_HEXAGON_V6_vavgbrnd, "v65,v66" },
2003  { Hexagon::BI__builtin_HEXAGON_V6_vavgbrnd_128B, "v65,v66" },
2004  { Hexagon::BI__builtin_HEXAGON_V6_vavgh, "v60,v62,v65,v66" },
2005  { Hexagon::BI__builtin_HEXAGON_V6_vavgh_128B, "v60,v62,v65,v66" },
2006  { Hexagon::BI__builtin_HEXAGON_V6_vavghrnd, "v60,v62,v65,v66" },
2007  { Hexagon::BI__builtin_HEXAGON_V6_vavghrnd_128B, "v60,v62,v65,v66" },
2008  { Hexagon::BI__builtin_HEXAGON_V6_vavgub, "v60,v62,v65,v66" },
2009  { Hexagon::BI__builtin_HEXAGON_V6_vavgub_128B, "v60,v62,v65,v66" },
2010  { Hexagon::BI__builtin_HEXAGON_V6_vavgubrnd, "v60,v62,v65,v66" },
2011  { Hexagon::BI__builtin_HEXAGON_V6_vavgubrnd_128B, "v60,v62,v65,v66" },
2012  { Hexagon::BI__builtin_HEXAGON_V6_vavguh, "v60,v62,v65,v66" },
2013  { Hexagon::BI__builtin_HEXAGON_V6_vavguh_128B, "v60,v62,v65,v66" },
2014  { Hexagon::BI__builtin_HEXAGON_V6_vavguhrnd, "v60,v62,v65,v66" },
2015  { Hexagon::BI__builtin_HEXAGON_V6_vavguhrnd_128B, "v60,v62,v65,v66" },
2016  { Hexagon::BI__builtin_HEXAGON_V6_vavguw, "v65,v66" },
2017  { Hexagon::BI__builtin_HEXAGON_V6_vavguw_128B, "v65,v66" },
2018  { Hexagon::BI__builtin_HEXAGON_V6_vavguwrnd, "v65,v66" },
2019  { Hexagon::BI__builtin_HEXAGON_V6_vavguwrnd_128B, "v65,v66" },
2020  { Hexagon::BI__builtin_HEXAGON_V6_vavgw, "v60,v62,v65,v66" },
2021  { Hexagon::BI__builtin_HEXAGON_V6_vavgw_128B, "v60,v62,v65,v66" },
2022  { Hexagon::BI__builtin_HEXAGON_V6_vavgwrnd, "v60,v62,v65,v66" },
2023  { Hexagon::BI__builtin_HEXAGON_V6_vavgwrnd_128B, "v60,v62,v65,v66" },
2024  { Hexagon::BI__builtin_HEXAGON_V6_vcl0h, "v60,v62,v65,v66" },
2025  { Hexagon::BI__builtin_HEXAGON_V6_vcl0h_128B, "v60,v62,v65,v66" },
2026  { Hexagon::BI__builtin_HEXAGON_V6_vcl0w, "v60,v62,v65,v66" },
2027  { Hexagon::BI__builtin_HEXAGON_V6_vcl0w_128B, "v60,v62,v65,v66" },
2028  { Hexagon::BI__builtin_HEXAGON_V6_vcombine, "v60,v62,v65,v66" },
2029  { Hexagon::BI__builtin_HEXAGON_V6_vcombine_128B, "v60,v62,v65,v66" },
2030  { Hexagon::BI__builtin_HEXAGON_V6_vd0, "v60,v62,v65,v66" },
2031  { Hexagon::BI__builtin_HEXAGON_V6_vd0_128B, "v60,v62,v65,v66" },
2032  { Hexagon::BI__builtin_HEXAGON_V6_vdd0, "v65,v66" },
2033  { Hexagon::BI__builtin_HEXAGON_V6_vdd0_128B, "v65,v66" },
2034  { Hexagon::BI__builtin_HEXAGON_V6_vdealb, "v60,v62,v65,v66" },
2035  { Hexagon::BI__builtin_HEXAGON_V6_vdealb_128B, "v60,v62,v65,v66" },
2036  { Hexagon::BI__builtin_HEXAGON_V6_vdealb4w, "v60,v62,v65,v66" },
2037  { Hexagon::BI__builtin_HEXAGON_V6_vdealb4w_128B, "v60,v62,v65,v66" },
2038  { Hexagon::BI__builtin_HEXAGON_V6_vdealh, "v60,v62,v65,v66" },
2039  { Hexagon::BI__builtin_HEXAGON_V6_vdealh_128B, "v60,v62,v65,v66" },
2040  { Hexagon::BI__builtin_HEXAGON_V6_vdealvdd, "v60,v62,v65,v66" },
2041  { Hexagon::BI__builtin_HEXAGON_V6_vdealvdd_128B, "v60,v62,v65,v66" },
2042  { Hexagon::BI__builtin_HEXAGON_V6_vdelta, "v60,v62,v65,v66" },
2043  { Hexagon::BI__builtin_HEXAGON_V6_vdelta_128B, "v60,v62,v65,v66" },
2044  { Hexagon::BI__builtin_HEXAGON_V6_vdmpybus, "v60,v62,v65,v66" },
2045  { Hexagon::BI__builtin_HEXAGON_V6_vdmpybus_128B, "v60,v62,v65,v66" },
2046  { Hexagon::BI__builtin_HEXAGON_V6_vdmpybus_acc, "v60,v62,v65,v66" },
2047  { Hexagon::BI__builtin_HEXAGON_V6_vdmpybus_acc_128B, "v60,v62,v65,v66" },
2048  { Hexagon::BI__builtin_HEXAGON_V6_vdmpybus_dv, "v60,v62,v65,v66" },
2049  { Hexagon::BI__builtin_HEXAGON_V6_vdmpybus_dv_128B, "v60,v62,v65,v66" },
2050  { Hexagon::BI__builtin_HEXAGON_V6_vdmpybus_dv_acc, "v60,v62,v65,v66" },
2051  { Hexagon::BI__builtin_HEXAGON_V6_vdmpybus_dv_acc_128B, "v60,v62,v65,v66" },
2052  { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhb, "v60,v62,v65,v66" },
2053  { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhb_128B, "v60,v62,v65,v66" },
2054  { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhb_acc, "v60,v62,v65,v66" },
2055  { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhb_acc_128B, "v60,v62,v65,v66" },
2056  { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhb_dv, "v60,v62,v65,v66" },
2057  { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhb_dv_128B, "v60,v62,v65,v66" },
2058  { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhb_dv_acc, "v60,v62,v65,v66" },
2059  { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhb_dv_acc_128B, "v60,v62,v65,v66" },
2060  { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhisat, "v60,v62,v65,v66" },
2061  { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhisat_128B, "v60,v62,v65,v66" },
2062  { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhisat_acc, "v60,v62,v65,v66" },
2063  { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhisat_acc_128B, "v60,v62,v65,v66" },
2064  { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhsat, "v60,v62,v65,v66" },
2065  { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhsat_128B, "v60,v62,v65,v66" },
2066  { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhsat_acc, "v60,v62,v65,v66" },
2067  { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhsat_acc_128B, "v60,v62,v65,v66" },
2068  { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhsuisat, "v60,v62,v65,v66" },
2069  { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhsuisat_128B, "v60,v62,v65,v66" },
2070  { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhsuisat_acc, "v60,v62,v65,v66" },
2071  { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhsuisat_acc_128B, "v60,v62,v65,v66" },
2072  { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhsusat, "v60,v62,v65,v66" },
2073  { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhsusat_128B, "v60,v62,v65,v66" },
2074  { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhsusat_acc, "v60,v62,v65,v66" },
2075  { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhsusat_acc_128B, "v60,v62,v65,v66" },
2076  { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhvsat, "v60,v62,v65,v66" },
2077  { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhvsat_128B, "v60,v62,v65,v66" },
2078  { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhvsat_acc, "v60,v62,v65,v66" },
2079  { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhvsat_acc_128B, "v60,v62,v65,v66" },
2080  { Hexagon::BI__builtin_HEXAGON_V6_vdsaduh, "v60,v62,v65,v66" },
2081  { Hexagon::BI__builtin_HEXAGON_V6_vdsaduh_128B, "v60,v62,v65,v66" },
2082  { Hexagon::BI__builtin_HEXAGON_V6_vdsaduh_acc, "v60,v62,v65,v66" },
2083  { Hexagon::BI__builtin_HEXAGON_V6_vdsaduh_acc_128B, "v60,v62,v65,v66" },
2084  { Hexagon::BI__builtin_HEXAGON_V6_veqb, "v60,v62,v65,v66" },
2085  { Hexagon::BI__builtin_HEXAGON_V6_veqb_128B, "v60,v62,v65,v66" },
2086  { Hexagon::BI__builtin_HEXAGON_V6_veqb_and, "v60,v62,v65,v66" },
2087  { Hexagon::BI__builtin_HEXAGON_V6_veqb_and_128B, "v60,v62,v65,v66" },
2088  { Hexagon::BI__builtin_HEXAGON_V6_veqb_or, "v60,v62,v65,v66" },
2089  { Hexagon::BI__builtin_HEXAGON_V6_veqb_or_128B, "v60,v62,v65,v66" },
2090  { Hexagon::BI__builtin_HEXAGON_V6_veqb_xor, "v60,v62,v65,v66" },
2091  { Hexagon::BI__builtin_HEXAGON_V6_veqb_xor_128B, "v60,v62,v65,v66" },
2092  { Hexagon::BI__builtin_HEXAGON_V6_veqh, "v60,v62,v65,v66" },
2093  { Hexagon::BI__builtin_HEXAGON_V6_veqh_128B, "v60,v62,v65,v66" },
2094  { Hexagon::BI__builtin_HEXAGON_V6_veqh_and, "v60,v62,v65,v66" },
2095  { Hexagon::BI__builtin_HEXAGON_V6_veqh_and_128B, "v60,v62,v65,v66" },
2096  { Hexagon::BI__builtin_HEXAGON_V6_veqh_or, "v60,v62,v65,v66" },
2097  { Hexagon::BI__builtin_HEXAGON_V6_veqh_or_128B, "v60,v62,v65,v66" },
2098  { Hexagon::BI__builtin_HEXAGON_V6_veqh_xor, "v60,v62,v65,v66" },
2099  { Hexagon::BI__builtin_HEXAGON_V6_veqh_xor_128B, "v60,v62,v65,v66" },
2100  { Hexagon::BI__builtin_HEXAGON_V6_veqw, "v60,v62,v65,v66" },
2101  { Hexagon::BI__builtin_HEXAGON_V6_veqw_128B, "v60,v62,v65,v66" },
2102  { Hexagon::BI__builtin_HEXAGON_V6_veqw_and, "v60,v62,v65,v66" },
2103  { Hexagon::BI__builtin_HEXAGON_V6_veqw_and_128B, "v60,v62,v65,v66" },
2104  { Hexagon::BI__builtin_HEXAGON_V6_veqw_or, "v60,v62,v65,v66" },
2105  { Hexagon::BI__builtin_HEXAGON_V6_veqw_or_128B, "v60,v62,v65,v66" },
2106  { Hexagon::BI__builtin_HEXAGON_V6_veqw_xor, "v60,v62,v65,v66" },
2107  { Hexagon::BI__builtin_HEXAGON_V6_veqw_xor_128B, "v60,v62,v65,v66" },
2108  { Hexagon::BI__builtin_HEXAGON_V6_vgtb, "v60,v62,v65,v66" },
2109  { Hexagon::BI__builtin_HEXAGON_V6_vgtb_128B, "v60,v62,v65,v66" },
2110  { Hexagon::BI__builtin_HEXAGON_V6_vgtb_and, "v60,v62,v65,v66" },
2111  { Hexagon::BI__builtin_HEXAGON_V6_vgtb_and_128B, "v60,v62,v65,v66" },
2112  { Hexagon::BI__builtin_HEXAGON_V6_vgtb_or, "v60,v62,v65,v66" },
2113  { Hexagon::BI__builtin_HEXAGON_V6_vgtb_or_128B, "v60,v62,v65,v66" },
2114  { Hexagon::BI__builtin_HEXAGON_V6_vgtb_xor, "v60,v62,v65,v66" },
2115  { Hexagon::BI__builtin_HEXAGON_V6_vgtb_xor_128B, "v60,v62,v65,v66" },
2116  { Hexagon::BI__builtin_HEXAGON_V6_vgth, "v60,v62,v65,v66" },
2117  { Hexagon::BI__builtin_HEXAGON_V6_vgth_128B, "v60,v62,v65,v66" },
2118  { Hexagon::BI__builtin_HEXAGON_V6_vgth_and, "v60,v62,v65,v66" },
2119  { Hexagon::BI__builtin_HEXAGON_V6_vgth_and_128B, "v60,v62,v65,v66" },
2120  { Hexagon::BI__builtin_HEXAGON_V6_vgth_or, "v60,v62,v65,v66" },
2121  { Hexagon::BI__builtin_HEXAGON_V6_vgth_or_128B, "v60,v62,v65,v66" },
2122  { Hexagon::BI__builtin_HEXAGON_V6_vgth_xor, "v60,v62,v65,v66" },
2123  { Hexagon::BI__builtin_HEXAGON_V6_vgth_xor_128B, "v60,v62,v65,v66" },
2124  { Hexagon::BI__builtin_HEXAGON_V6_vgtub, "v60,v62,v65,v66" },
2125  { Hexagon::BI__builtin_HEXAGON_V6_vgtub_128B, "v60,v62,v65,v66" },
2126  { Hexagon::BI__builtin_HEXAGON_V6_vgtub_and, "v60,v62,v65,v66" },
2127  { Hexagon::BI__builtin_HEXAGON_V6_vgtub_and_128B, "v60,v62,v65,v66" },
2128  { Hexagon::BI__builtin_HEXAGON_V6_vgtub_or, "v60,v62,v65,v66" },
2129  { Hexagon::BI__builtin_HEXAGON_V6_vgtub_or_128B, "v60,v62,v65,v66" },
2130  { Hexagon::BI__builtin_HEXAGON_V6_vgtub_xor, "v60,v62,v65,v66" },
2131  { Hexagon::BI__builtin_HEXAGON_V6_vgtub_xor_128B, "v60,v62,v65,v66" },
2132  { Hexagon::BI__builtin_HEXAGON_V6_vgtuh, "v60,v62,v65,v66" },
2133  { Hexagon::BI__builtin_HEXAGON_V6_vgtuh_128B, "v60,v62,v65,v66" },
2134  { Hexagon::BI__builtin_HEXAGON_V6_vgtuh_and, "v60,v62,v65,v66" },
2135  { Hexagon::BI__builtin_HEXAGON_V6_vgtuh_and_128B, "v60,v62,v65,v66" },
2136  { Hexagon::BI__builtin_HEXAGON_V6_vgtuh_or, "v60,v62,v65,v66" },
2137  { Hexagon::BI__builtin_HEXAGON_V6_vgtuh_or_128B, "v60,v62,v65,v66" },
2138  { Hexagon::BI__builtin_HEXAGON_V6_vgtuh_xor, "v60,v62,v65,v66" },
2139  { Hexagon::BI__builtin_HEXAGON_V6_vgtuh_xor_128B, "v60,v62,v65,v66" },
2140  { Hexagon::BI__builtin_HEXAGON_V6_vgtuw, "v60,v62,v65,v66" },
2141  { Hexagon::BI__builtin_HEXAGON_V6_vgtuw_128B, "v60,v62,v65,v66" },
2142  { Hexagon::BI__builtin_HEXAGON_V6_vgtuw_and, "v60,v62,v65,v66" },
2143  { Hexagon::BI__builtin_HEXAGON_V6_vgtuw_and_128B, "v60,v62,v65,v66" },
2144  { Hexagon::BI__builtin_HEXAGON_V6_vgtuw_or, "v60,v62,v65,v66" },
2145  { Hexagon::BI__builtin_HEXAGON_V6_vgtuw_or_128B, "v60,v62,v65,v66" },
2146  { Hexagon::BI__builtin_HEXAGON_V6_vgtuw_xor, "v60,v62,v65,v66" },
2147  { Hexagon::BI__builtin_HEXAGON_V6_vgtuw_xor_128B, "v60,v62,v65,v66" },
2148  { Hexagon::BI__builtin_HEXAGON_V6_vgtw, "v60,v62,v65,v66" },
2149  { Hexagon::BI__builtin_HEXAGON_V6_vgtw_128B, "v60,v62,v65,v66" },
2150  { Hexagon::BI__builtin_HEXAGON_V6_vgtw_and, "v60,v62,v65,v66" },
2151  { Hexagon::BI__builtin_HEXAGON_V6_vgtw_and_128B, "v60,v62,v65,v66" },
2152  { Hexagon::BI__builtin_HEXAGON_V6_vgtw_or, "v60,v62,v65,v66" },
2153  { Hexagon::BI__builtin_HEXAGON_V6_vgtw_or_128B, "v60,v62,v65,v66" },
2154  { Hexagon::BI__builtin_HEXAGON_V6_vgtw_xor, "v60,v62,v65,v66" },
2155  { Hexagon::BI__builtin_HEXAGON_V6_vgtw_xor_128B, "v60,v62,v65,v66" },
2156  { Hexagon::BI__builtin_HEXAGON_V6_vinsertwr, "v60,v62,v65,v66" },
2157  { Hexagon::BI__builtin_HEXAGON_V6_vinsertwr_128B, "v60,v62,v65,v66" },
2158  { Hexagon::BI__builtin_HEXAGON_V6_vlalignb, "v60,v62,v65,v66" },
2159  { Hexagon::BI__builtin_HEXAGON_V6_vlalignb_128B, "v60,v62,v65,v66" },
2160  { Hexagon::BI__builtin_HEXAGON_V6_vlalignbi, "v60,v62,v65,v66" },
2161  { Hexagon::BI__builtin_HEXAGON_V6_vlalignbi_128B, "v60,v62,v65,v66" },
2162  { Hexagon::BI__builtin_HEXAGON_V6_vlsrb, "v62,v65,v66" },
2163  { Hexagon::BI__builtin_HEXAGON_V6_vlsrb_128B, "v62,v65,v66" },
2164  { Hexagon::BI__builtin_HEXAGON_V6_vlsrh, "v60,v62,v65,v66" },
2165  { Hexagon::BI__builtin_HEXAGON_V6_vlsrh_128B, "v60,v62,v65,v66" },
2166  { Hexagon::BI__builtin_HEXAGON_V6_vlsrhv, "v60,v62,v65,v66" },
2167  { Hexagon::BI__builtin_HEXAGON_V6_vlsrhv_128B, "v60,v62,v65,v66" },
2168  { Hexagon::BI__builtin_HEXAGON_V6_vlsrw, "v60,v62,v65,v66" },
2169  { Hexagon::BI__builtin_HEXAGON_V6_vlsrw_128B, "v60,v62,v65,v66" },
2170  { Hexagon::BI__builtin_HEXAGON_V6_vlsrwv, "v60,v62,v65,v66" },
2171  { Hexagon::BI__builtin_HEXAGON_V6_vlsrwv_128B, "v60,v62,v65,v66" },
2172  { Hexagon::BI__builtin_HEXAGON_V6_vlut4, "v65,v66" },
2173  { Hexagon::BI__builtin_HEXAGON_V6_vlut4_128B, "v65,v66" },
2174  { Hexagon::BI__builtin_HEXAGON_V6_vlutvvb, "v60,v62,v65,v66" },
2175  { Hexagon::BI__builtin_HEXAGON_V6_vlutvvb_128B, "v60,v62,v65,v66" },
2176  { Hexagon::BI__builtin_HEXAGON_V6_vlutvvbi, "v62,v65,v66" },
2177  { Hexagon::BI__builtin_HEXAGON_V6_vlutvvbi_128B, "v62,v65,v66" },
2178  { Hexagon::BI__builtin_HEXAGON_V6_vlutvvb_nm, "v62,v65,v66" },
2179  { Hexagon::BI__builtin_HEXAGON_V6_vlutvvb_nm_128B, "v62,v65,v66" },
2180  { Hexagon::BI__builtin_HEXAGON_V6_vlutvvb_oracc, "v60,v62,v65,v66" },
2181  { Hexagon::BI__builtin_HEXAGON_V6_vlutvvb_oracc_128B, "v60,v62,v65,v66" },
2182  { Hexagon::BI__builtin_HEXAGON_V6_vlutvvb_oracci, "v62,v65,v66" },
2183  { Hexagon::BI__builtin_HEXAGON_V6_vlutvvb_oracci_128B, "v62,v65,v66" },
2184  { Hexagon::BI__builtin_HEXAGON_V6_vlutvwh, "v60,v62,v65,v66" },
2185  { Hexagon::BI__builtin_HEXAGON_V6_vlutvwh_128B, "v60,v62,v65,v66" },
2186  { Hexagon::BI__builtin_HEXAGON_V6_vlutvwhi, "v62,v65,v66" },
2187  { Hexagon::BI__builtin_HEXAGON_V6_vlutvwhi_128B, "v62,v65,v66" },
2188  { Hexagon::BI__builtin_HEXAGON_V6_vlutvwh_nm, "v62,v65,v66" },
2189  { Hexagon::BI__builtin_HEXAGON_V6_vlutvwh_nm_128B, "v62,v65,v66" },
2190  { Hexagon::BI__builtin_HEXAGON_V6_vlutvwh_oracc, "v60,v62,v65,v66" },
2191  { Hexagon::BI__builtin_HEXAGON_V6_vlutvwh_oracc_128B, "v60,v62,v65,v66" },
2192  { Hexagon::BI__builtin_HEXAGON_V6_vlutvwh_oracci, "v62,v65,v66" },
2193  { Hexagon::BI__builtin_HEXAGON_V6_vlutvwh_oracci_128B, "v62,v65,v66" },
2194  { Hexagon::BI__builtin_HEXAGON_V6_vmaxb, "v62,v65,v66" },
2195  { Hexagon::BI__builtin_HEXAGON_V6_vmaxb_128B, "v62,v65,v66" },
2196  { Hexagon::BI__builtin_HEXAGON_V6_vmaxh, "v60,v62,v65,v66" },
2197  { Hexagon::BI__builtin_HEXAGON_V6_vmaxh_128B, "v60,v62,v65,v66" },
2198  { Hexagon::BI__builtin_HEXAGON_V6_vmaxub, "v60,v62,v65,v66" },
2199  { Hexagon::BI__builtin_HEXAGON_V6_vmaxub_128B, "v60,v62,v65,v66" },
2200  { Hexagon::BI__builtin_HEXAGON_V6_vmaxuh, "v60,v62,v65,v66" },
2201  { Hexagon::BI__builtin_HEXAGON_V6_vmaxuh_128B, "v60,v62,v65,v66" },
2202  { Hexagon::BI__builtin_HEXAGON_V6_vmaxw, "v60,v62,v65,v66" },
2203  { Hexagon::BI__builtin_HEXAGON_V6_vmaxw_128B, "v60,v62,v65,v66" },
2204  { Hexagon::BI__builtin_HEXAGON_V6_vminb, "v62,v65,v66" },
2205  { Hexagon::BI__builtin_HEXAGON_V6_vminb_128B, "v62,v65,v66" },
2206  { Hexagon::BI__builtin_HEXAGON_V6_vminh, "v60,v62,v65,v66" },
2207  { Hexagon::BI__builtin_HEXAGON_V6_vminh_128B, "v60,v62,v65,v66" },
2208  { Hexagon::BI__builtin_HEXAGON_V6_vminub, "v60,v62,v65,v66" },
2209  { Hexagon::BI__builtin_HEXAGON_V6_vminub_128B, "v60,v62,v65,v66" },
2210  { Hexagon::BI__builtin_HEXAGON_V6_vminuh, "v60,v62,v65,v66" },
2211  { Hexagon::BI__builtin_HEXAGON_V6_vminuh_128B, "v60,v62,v65,v66" },
2212  { Hexagon::BI__builtin_HEXAGON_V6_vminw, "v60,v62,v65,v66" },
2213  { Hexagon::BI__builtin_HEXAGON_V6_vminw_128B, "v60,v62,v65,v66" },
2214  { Hexagon::BI__builtin_HEXAGON_V6_vmpabus, "v60,v62,v65,v66" },
2215  { Hexagon::BI__builtin_HEXAGON_V6_vmpabus_128B, "v60,v62,v65,v66" },
2216  { Hexagon::BI__builtin_HEXAGON_V6_vmpabus_acc, "v60,v62,v65,v66" },
2217  { Hexagon::BI__builtin_HEXAGON_V6_vmpabus_acc_128B, "v60,v62,v65,v66" },
2218  { Hexagon::BI__builtin_HEXAGON_V6_vmpabusv, "v60,v62,v65,v66" },
2219  { Hexagon::BI__builtin_HEXAGON_V6_vmpabusv_128B, "v60,v62,v65,v66" },
2220  { Hexagon::BI__builtin_HEXAGON_V6_vmpabuu, "v65,v66" },
2221  { Hexagon::BI__builtin_HEXAGON_V6_vmpabuu_128B, "v65,v66" },
2222  { Hexagon::BI__builtin_HEXAGON_V6_vmpabuu_acc, "v65,v66" },
2223  { Hexagon::BI__builtin_HEXAGON_V6_vmpabuu_acc_128B, "v65,v66" },
2224  { Hexagon::BI__builtin_HEXAGON_V6_vmpabuuv, "v60,v62,v65,v66" },
2225  { Hexagon::BI__builtin_HEXAGON_V6_vmpabuuv_128B, "v60,v62,v65,v66" },
2226  { Hexagon::BI__builtin_HEXAGON_V6_vmpahb, "v60,v62,v65,v66" },
2227  { Hexagon::BI__builtin_HEXAGON_V6_vmpahb_128B, "v60,v62,v65,v66" },
2228  { Hexagon::BI__builtin_HEXAGON_V6_vmpahb_acc, "v60,v62,v65,v66" },
2229  { Hexagon::BI__builtin_HEXAGON_V6_vmpahb_acc_128B, "v60,v62,v65,v66" },
2230  { Hexagon::BI__builtin_HEXAGON_V6_vmpahhsat, "v65,v66" },
2231  { Hexagon::BI__builtin_HEXAGON_V6_vmpahhsat_128B, "v65,v66" },
2232  { Hexagon::BI__builtin_HEXAGON_V6_vmpauhb, "v62,v65,v66" },
2233  { Hexagon::BI__builtin_HEXAGON_V6_vmpauhb_128B, "v62,v65,v66" },
2234  { Hexagon::BI__builtin_HEXAGON_V6_vmpauhb_acc, "v62,v65,v66" },
2235  { Hexagon::BI__builtin_HEXAGON_V6_vmpauhb_acc_128B, "v62,v65,v66" },
2236  { Hexagon::BI__builtin_HEXAGON_V6_vmpauhuhsat, "v65,v66" },
2237  { Hexagon::BI__builtin_HEXAGON_V6_vmpauhuhsat_128B, "v65,v66" },
2238  { Hexagon::BI__builtin_HEXAGON_V6_vmpsuhuhsat, "v65,v66" },
2239  { Hexagon::BI__builtin_HEXAGON_V6_vmpsuhuhsat_128B, "v65,v66" },
2240  { Hexagon::BI__builtin_HEXAGON_V6_vmpybus, "v60,v62,v65,v66" },
2241  { Hexagon::BI__builtin_HEXAGON_V6_vmpybus_128B, "v60,v62,v65,v66" },
2242  { Hexagon::BI__builtin_HEXAGON_V6_vmpybus_acc, "v60,v62,v65,v66" },
2243  { Hexagon::BI__builtin_HEXAGON_V6_vmpybus_acc_128B, "v60,v62,v65,v66" },
2244  { Hexagon::BI__builtin_HEXAGON_V6_vmpybusv, "v60,v62,v65,v66" },
2245  { Hexagon::BI__builtin_HEXAGON_V6_vmpybusv_128B, "v60,v62,v65,v66" },
2246  { Hexagon::BI__builtin_HEXAGON_V6_vmpybusv_acc, "v60,v62,v65,v66" },
2247  { Hexagon::BI__builtin_HEXAGON_V6_vmpybusv_acc_128B, "v60,v62,v65,v66" },
2248  { Hexagon::BI__builtin_HEXAGON_V6_vmpybv, "v60,v62,v65,v66" },
2249  { Hexagon::BI__builtin_HEXAGON_V6_vmpybv_128B, "v60,v62,v65,v66" },
2250  { Hexagon::BI__builtin_HEXAGON_V6_vmpybv_acc, "v60,v62,v65,v66" },
2251  { Hexagon::BI__builtin_HEXAGON_V6_vmpybv_acc_128B, "v60,v62,v65,v66" },
2252  { Hexagon::BI__builtin_HEXAGON_V6_vmpyewuh, "v60,v62,v65,v66" },
2253  { Hexagon::BI__builtin_HEXAGON_V6_vmpyewuh_128B, "v60,v62,v65,v66" },
2254  { Hexagon::BI__builtin_HEXAGON_V6_vmpyewuh_64, "v62,v65,v66" },
2255  { Hexagon::BI__builtin_HEXAGON_V6_vmpyewuh_64_128B, "v62,v65,v66" },
2256  { Hexagon::BI__builtin_HEXAGON_V6_vmpyh, "v60,v62,v65,v66" },
2257  { Hexagon::BI__builtin_HEXAGON_V6_vmpyh_128B, "v60,v62,v65,v66" },
2258  { Hexagon::BI__builtin_HEXAGON_V6_vmpyh_acc, "v65,v66" },
2259  { Hexagon::BI__builtin_HEXAGON_V6_vmpyh_acc_128B, "v65,v66" },
2260  { Hexagon::BI__builtin_HEXAGON_V6_vmpyhsat_acc, "v60,v62,v65,v66" },
2261  { Hexagon::BI__builtin_HEXAGON_V6_vmpyhsat_acc_128B, "v60,v62,v65,v66" },
2262  { Hexagon::BI__builtin_HEXAGON_V6_vmpyhsrs, "v60,v62,v65,v66" },
2263  { Hexagon::BI__builtin_HEXAGON_V6_vmpyhsrs_128B, "v60,v62,v65,v66" },
2264  { Hexagon::BI__builtin_HEXAGON_V6_vmpyhss, "v60,v62,v65,v66" },
2265  { Hexagon::BI__builtin_HEXAGON_V6_vmpyhss_128B, "v60,v62,v65,v66" },
2266  { Hexagon::BI__builtin_HEXAGON_V6_vmpyhus, "v60,v62,v65,v66" },
2267  { Hexagon::BI__builtin_HEXAGON_V6_vmpyhus_128B, "v60,v62,v65,v66" },
2268  { Hexagon::BI__builtin_HEXAGON_V6_vmpyhus_acc, "v60,v62,v65,v66" },
2269  { Hexagon::BI__builtin_HEXAGON_V6_vmpyhus_acc_128B, "v60,v62,v65,v66" },
2270  { Hexagon::BI__builtin_HEXAGON_V6_vmpyhv, "v60,v62,v65,v66" },
2271  { Hexagon::BI__builtin_HEXAGON_V6_vmpyhv_128B, "v60,v62,v65,v66" },
2272  { Hexagon::BI__builtin_HEXAGON_V6_vmpyhv_acc, "v60,v62,v65,v66" },
2273  { Hexagon::BI__builtin_HEXAGON_V6_vmpyhv_acc_128B, "v60,v62,v65,v66" },
2274  { Hexagon::BI__builtin_HEXAGON_V6_vmpyhvsrs, "v60,v62,v65,v66" },
2275  { Hexagon::BI__builtin_HEXAGON_V6_vmpyhvsrs_128B, "v60,v62,v65,v66" },
2276  { Hexagon::BI__builtin_HEXAGON_V6_vmpyieoh, "v60,v62,v65,v66" },
2277  { Hexagon::BI__builtin_HEXAGON_V6_vmpyieoh_128B, "v60,v62,v65,v66" },
2278  { Hexagon::BI__builtin_HEXAGON_V6_vmpyiewh_acc, "v60,v62,v65,v66" },
2279  { Hexagon::BI__builtin_HEXAGON_V6_vmpyiewh_acc_128B, "v60,v62,v65,v66" },
2280  { Hexagon::BI__builtin_HEXAGON_V6_vmpyiewuh, "v60,v62,v65,v66" },
2281  { Hexagon::BI__builtin_HEXAGON_V6_vmpyiewuh_128B, "v60,v62,v65,v66" },
2282  { Hexagon::BI__builtin_HEXAGON_V6_vmpyiewuh_acc, "v60,v62,v65,v66" },
2283  { Hexagon::BI__builtin_HEXAGON_V6_vmpyiewuh_acc_128B, "v60,v62,v65,v66" },
2284  { Hexagon::BI__builtin_HEXAGON_V6_vmpyih, "v60,v62,v65,v66" },
2285  { Hexagon::BI__builtin_HEXAGON_V6_vmpyih_128B, "v60,v62,v65,v66" },
2286  { Hexagon::BI__builtin_HEXAGON_V6_vmpyih_acc, "v60,v62,v65,v66" },
2287  { Hexagon::BI__builtin_HEXAGON_V6_vmpyih_acc_128B, "v60,v62,v65,v66" },
2288  { Hexagon::BI__builtin_HEXAGON_V6_vmpyihb, "v60,v62,v65,v66" },
2289  { Hexagon::BI__builtin_HEXAGON_V6_vmpyihb_128B, "v60,v62,v65,v66" },
2290  { Hexagon::BI__builtin_HEXAGON_V6_vmpyihb_acc, "v60,v62,v65,v66" },
2291  { Hexagon::BI__builtin_HEXAGON_V6_vmpyihb_acc_128B, "v60,v62,v65,v66" },
2292  { Hexagon::BI__builtin_HEXAGON_V6_vmpyiowh, "v60,v62,v65,v66" },
2293  { Hexagon::BI__builtin_HEXAGON_V6_vmpyiowh_128B, "v60,v62,v65,v66" },
2294  { Hexagon::BI__builtin_HEXAGON_V6_vmpyiwb, "v60,v62,v65,v66" },
2295  { Hexagon::BI__builtin_HEXAGON_V6_vmpyiwb_128B, "v60,v62,v65,v66" },
2296  { Hexagon::BI__builtin_HEXAGON_V6_vmpyiwb_acc, "v60,v62,v65,v66" },
2297  { Hexagon::BI__builtin_HEXAGON_V6_vmpyiwb_acc_128B, "v60,v62,v65,v66" },
2298  { Hexagon::BI__builtin_HEXAGON_V6_vmpyiwh, "v60,v62,v65,v66" },
2299  { Hexagon::BI__builtin_HEXAGON_V6_vmpyiwh_128B, "v60,v62,v65,v66" },
2300  { Hexagon::BI__builtin_HEXAGON_V6_vmpyiwh_acc, "v60,v62,v65,v66" },
2301  { Hexagon::BI__builtin_HEXAGON_V6_vmpyiwh_acc_128B, "v60,v62,v65,v66" },
2302  { Hexagon::BI__builtin_HEXAGON_V6_vmpyiwub, "v62,v65,v66" },
2303  { Hexagon::BI__builtin_HEXAGON_V6_vmpyiwub_128B, "v62,v65,v66" },
2304  { Hexagon::BI__builtin_HEXAGON_V6_vmpyiwub_acc, "v62,v65,v66" },
2305  { Hexagon::BI__builtin_HEXAGON_V6_vmpyiwub_acc_128B, "v62,v65,v66" },
2306  { Hexagon::BI__builtin_HEXAGON_V6_vmpyowh, "v60,v62,v65,v66" },
2307  { Hexagon::BI__builtin_HEXAGON_V6_vmpyowh_128B, "v60,v62,v65,v66" },
2308  { Hexagon::BI__builtin_HEXAGON_V6_vmpyowh_64_acc, "v62,v65,v66" },
2309  { Hexagon::BI__builtin_HEXAGON_V6_vmpyowh_64_acc_128B, "v62,v65,v66" },
2310  { Hexagon::BI__builtin_HEXAGON_V6_vmpyowh_rnd, "v60,v62,v65,v66" },
2311  { Hexagon::BI__builtin_HEXAGON_V6_vmpyowh_rnd_128B, "v60,v62,v65,v66" },
2312  { Hexagon::BI__builtin_HEXAGON_V6_vmpyowh_rnd_sacc, "v60,v62,v65,v66" },
2313  { Hexagon::BI__builtin_HEXAGON_V6_vmpyowh_rnd_sacc_128B, "v60,v62,v65,v66" },
2314  { Hexagon::BI__builtin_HEXAGON_V6_vmpyowh_sacc, "v60,v62,v65,v66" },
2315  { Hexagon::BI__builtin_HEXAGON_V6_vmpyowh_sacc_128B, "v60,v62,v65,v66" },
2316  { Hexagon::BI__builtin_HEXAGON_V6_vmpyub, "v60,v62,v65,v66" },
2317  { Hexagon::BI__builtin_HEXAGON_V6_vmpyub_128B, "v60,v62,v65,v66" },
2318  { Hexagon::BI__builtin_HEXAGON_V6_vmpyub_acc, "v60,v62,v65,v66" },
2319  { Hexagon::BI__builtin_HEXAGON_V6_vmpyub_acc_128B, "v60,v62,v65,v66" },
2320  { Hexagon::BI__builtin_HEXAGON_V6_vmpyubv, "v60,v62,v65,v66" },
2321  { Hexagon::BI__builtin_HEXAGON_V6_vmpyubv_128B, "v60,v62,v65,v66" },
2322  { Hexagon::BI__builtin_HEXAGON_V6_vmpyubv_acc, "v60,v62,v65,v66" },
2323  { Hexagon::BI__builtin_HEXAGON_V6_vmpyubv_acc_128B, "v60,v62,v65,v66" },
2324  { Hexagon::BI__builtin_HEXAGON_V6_vmpyuh, "v60,v62,v65,v66" },
2325  { Hexagon::BI__builtin_HEXAGON_V6_vmpyuh_128B, "v60,v62,v65,v66" },
2326  { Hexagon::BI__builtin_HEXAGON_V6_vmpyuh_acc, "v60,v62,v65,v66" },
2327  { Hexagon::BI__builtin_HEXAGON_V6_vmpyuh_acc_128B, "v60,v62,v65,v66" },
2328  { Hexagon::BI__builtin_HEXAGON_V6_vmpyuhe, "v65,v66" },
2329  { Hexagon::BI__builtin_HEXAGON_V6_vmpyuhe_128B, "v65,v66" },
2330  { Hexagon::BI__builtin_HEXAGON_V6_vmpyuhe_acc, "v65,v66" },
2331  { Hexagon::BI__builtin_HEXAGON_V6_vmpyuhe_acc_128B, "v65,v66" },
2332  { Hexagon::BI__builtin_HEXAGON_V6_vmpyuhv, "v60,v62,v65,v66" },
2333  { Hexagon::BI__builtin_HEXAGON_V6_vmpyuhv_128B, "v60,v62,v65,v66" },
2334  { Hexagon::BI__builtin_HEXAGON_V6_vmpyuhv_acc, "v60,v62,v65,v66" },
2335  { Hexagon::BI__builtin_HEXAGON_V6_vmpyuhv_acc_128B, "v60,v62,v65,v66" },
2336  { Hexagon::BI__builtin_HEXAGON_V6_vmux, "v60,v62,v65,v66" },
2337  { Hexagon::BI__builtin_HEXAGON_V6_vmux_128B, "v60,v62,v65,v66" },
2338  { Hexagon::BI__builtin_HEXAGON_V6_vnavgb, "v65,v66" },
2339  { Hexagon::BI__builtin_HEXAGON_V6_vnavgb_128B, "v65,v66" },
2340  { Hexagon::BI__builtin_HEXAGON_V6_vnavgh, "v60,v62,v65,v66" },
2341  { Hexagon::BI__builtin_HEXAGON_V6_vnavgh_128B, "v60,v62,v65,v66" },
2342  { Hexagon::BI__builtin_HEXAGON_V6_vnavgub, "v60,v62,v65,v66" },
2343  { Hexagon::BI__builtin_HEXAGON_V6_vnavgub_128B, "v60,v62,v65,v66" },
2344  { Hexagon::BI__builtin_HEXAGON_V6_vnavgw, "v60,v62,v65,v66" },
2345  { Hexagon::BI__builtin_HEXAGON_V6_vnavgw_128B, "v60,v62,v65,v66" },
2346  { Hexagon::BI__builtin_HEXAGON_V6_vnormamth, "v60,v62,v65,v66" },
2347  { Hexagon::BI__builtin_HEXAGON_V6_vnormamth_128B, "v60,v62,v65,v66" },
2348  { Hexagon::BI__builtin_HEXAGON_V6_vnormamtw, "v60,v62,v65,v66" },
2349  { Hexagon::BI__builtin_HEXAGON_V6_vnormamtw_128B, "v60,v62,v65,v66" },
2350  { Hexagon::BI__builtin_HEXAGON_V6_vnot, "v60,v62,v65,v66" },
2351  { Hexagon::BI__builtin_HEXAGON_V6_vnot_128B, "v60,v62,v65,v66" },
2352  { Hexagon::BI__builtin_HEXAGON_V6_vor, "v60,v62,v65,v66" },
2353  { Hexagon::BI__builtin_HEXAGON_V6_vor_128B, "v60,v62,v65,v66" },
2354  { Hexagon::BI__builtin_HEXAGON_V6_vpackeb, "v60,v62,v65,v66" },
2355  { Hexagon::BI__builtin_HEXAGON_V6_vpackeb_128B, "v60,v62,v65,v66" },
2356  { Hexagon::BI__builtin_HEXAGON_V6_vpackeh, "v60,v62,v65,v66" },
2357  { Hexagon::BI__builtin_HEXAGON_V6_vpackeh_128B, "v60,v62,v65,v66" },
2358  { Hexagon::BI__builtin_HEXAGON_V6_vpackhb_sat, "v60,v62,v65,v66" },
2359  { Hexagon::BI__builtin_HEXAGON_V6_vpackhb_sat_128B, "v60,v62,v65,v66" },
2360  { Hexagon::BI__builtin_HEXAGON_V6_vpackhub_sat, "v60,v62,v65,v66" },
2361  { Hexagon::BI__builtin_HEXAGON_V6_vpackhub_sat_128B, "v60,v62,v65,v66" },
2362  { Hexagon::BI__builtin_HEXAGON_V6_vpackob, "v60,v62,v65,v66" },
2363  { Hexagon::BI__builtin_HEXAGON_V6_vpackob_128B, "v60,v62,v65,v66" },
2364  { Hexagon::BI__builtin_HEXAGON_V6_vpackoh, "v60,v62,v65,v66" },
2365  { Hexagon::BI__builtin_HEXAGON_V6_vpackoh_128B, "v60,v62,v65,v66" },
2366  { Hexagon::BI__builtin_HEXAGON_V6_vpackwh_sat, "v60,v62,v65,v66" },
2367  { Hexagon::BI__builtin_HEXAGON_V6_vpackwh_sat_128B, "v60,v62,v65,v66" },
2368  { Hexagon::BI__builtin_HEXAGON_V6_vpackwuh_sat, "v60,v62,v65,v66" },
2369  { Hexagon::BI__builtin_HEXAGON_V6_vpackwuh_sat_128B, "v60,v62,v65,v66" },
2370  { Hexagon::BI__builtin_HEXAGON_V6_vpopcounth, "v60,v62,v65,v66" },
2371  { Hexagon::BI__builtin_HEXAGON_V6_vpopcounth_128B, "v60,v62,v65,v66" },
2372  { Hexagon::BI__builtin_HEXAGON_V6_vprefixqb, "v65,v66" },
2373  { Hexagon::BI__builtin_HEXAGON_V6_vprefixqb_128B, "v65,v66" },
2374  { Hexagon::BI__builtin_HEXAGON_V6_vprefixqh, "v65,v66" },
2375  { Hexagon::BI__builtin_HEXAGON_V6_vprefixqh_128B, "v65,v66" },
2376  { Hexagon::BI__builtin_HEXAGON_V6_vprefixqw, "v65,v66" },
2377  { Hexagon::BI__builtin_HEXAGON_V6_vprefixqw_128B, "v65,v66" },
2378  { Hexagon::BI__builtin_HEXAGON_V6_vrdelta, "v60,v62,v65,v66" },
2379  { Hexagon::BI__builtin_HEXAGON_V6_vrdelta_128B, "v60,v62,v65,v66" },
2380  { Hexagon::BI__builtin_HEXAGON_V6_vrmpybub_rtt, "v65" },
2381  { Hexagon::BI__builtin_HEXAGON_V6_vrmpybub_rtt_128B, "v65" },
2382  { Hexagon::BI__builtin_HEXAGON_V6_vrmpybub_rtt_acc, "v65" },
2383  { Hexagon::BI__builtin_HEXAGON_V6_vrmpybub_rtt_acc_128B, "v65" },
2384  { Hexagon::BI__builtin_HEXAGON_V6_vrmpybus, "v60,v62,v65,v66" },
2385  { Hexagon::BI__builtin_HEXAGON_V6_vrmpybus_128B, "v60,v62,v65,v66" },
2386  { Hexagon::BI__builtin_HEXAGON_V6_vrmpybus_acc, "v60,v62,v65,v66" },
2387  { Hexagon::BI__builtin_HEXAGON_V6_vrmpybus_acc_128B, "v60,v62,v65,v66" },
2388  { Hexagon::BI__builtin_HEXAGON_V6_vrmpybusi, "v60,v62,v65,v66" },
2389  { Hexagon::BI__builtin_HEXAGON_V6_vrmpybusi_128B, "v60,v62,v65,v66" },
2390  { Hexagon::BI__builtin_HEXAGON_V6_vrmpybusi_acc, "v60,v62,v65,v66" },
2391  { Hexagon::BI__builtin_HEXAGON_V6_vrmpybusi_acc_128B, "v60,v62,v65,v66" },
2392  { Hexagon::BI__builtin_HEXAGON_V6_vrmpybusv, "v60,v62,v65,v66" },
2393  { Hexagon::BI__builtin_HEXAGON_V6_vrmpybusv_128B, "v60,v62,v65,v66" },
2394  { Hexagon::BI__builtin_HEXAGON_V6_vrmpybusv_acc, "v60,v62,v65,v66" },
2395  { Hexagon::BI__builtin_HEXAGON_V6_vrmpybusv_acc_128B, "v60,v62,v65,v66" },
2396  { Hexagon::BI__builtin_HEXAGON_V6_vrmpybv, "v60,v62,v65,v66" },
2397  { Hexagon::BI__builtin_HEXAGON_V6_vrmpybv_128B, "v60,v62,v65,v66" },
2398  { Hexagon::BI__builtin_HEXAGON_V6_vrmpybv_acc, "v60,v62,v65,v66" },
2399  { Hexagon::BI__builtin_HEXAGON_V6_vrmpybv_acc_128B, "v60,v62,v65,v66" },
2400  { Hexagon::BI__builtin_HEXAGON_V6_vrmpyub, "v60,v62,v65,v66" },
2401  { Hexagon::BI__builtin_HEXAGON_V6_vrmpyub_128B, "v60,v62,v65,v66" },
2402  { Hexagon::BI__builtin_HEXAGON_V6_vrmpyub_acc, "v60,v62,v65,v66" },
2403  { Hexagon::BI__builtin_HEXAGON_V6_vrmpyub_acc_128B, "v60,v62,v65,v66" },
2404  { Hexagon::BI__builtin_HEXAGON_V6_vrmpyubi, "v60,v62,v65,v66" },
2405  { Hexagon::BI__builtin_HEXAGON_V6_vrmpyubi_128B, "v60,v62,v65,v66" },
2406  { Hexagon::BI__builtin_HEXAGON_V6_vrmpyubi_acc, "v60,v62,v65,v66" },
2407  { Hexagon::BI__builtin_HEXAGON_V6_vrmpyubi_acc_128B, "v60,v62,v65,v66" },
2408  { Hexagon::BI__builtin_HEXAGON_V6_vrmpyub_rtt, "v65" },
2409  { Hexagon::BI__builtin_HEXAGON_V6_vrmpyub_rtt_128B, "v65" },
2410  { Hexagon::BI__builtin_HEXAGON_V6_vrmpyub_rtt_acc, "v65" },
2411  { Hexagon::BI__builtin_HEXAGON_V6_vrmpyub_rtt_acc_128B, "v65" },
2412  { Hexagon::BI__builtin_HEXAGON_V6_vrmpyubv, "v60,v62,v65,v66" },
2413  { Hexagon::BI__builtin_HEXAGON_V6_vrmpyubv_128B, "v60,v62,v65,v66" },
2414  { Hexagon::BI__builtin_HEXAGON_V6_vrmpyubv_acc, "v60,v62,v65,v66" },
2415  { Hexagon::BI__builtin_HEXAGON_V6_vrmpyubv_acc_128B, "v60,v62,v65,v66" },
2416  { Hexagon::BI__builtin_HEXAGON_V6_vror, "v60,v62,v65,v66" },
2417  { Hexagon::BI__builtin_HEXAGON_V6_vror_128B, "v60,v62,v65,v66" },
2418  { Hexagon::BI__builtin_HEXAGON_V6_vrotr, "v66" },
2419  { Hexagon::BI__builtin_HEXAGON_V6_vrotr_128B, "v66" },
2420  { Hexagon::BI__builtin_HEXAGON_V6_vroundhb, "v60,v62,v65,v66" },
2421  { Hexagon::BI__builtin_HEXAGON_V6_vroundhb_128B, "v60,v62,v65,v66" },
2422  { Hexagon::BI__builtin_HEXAGON_V6_vroundhub, "v60,v62,v65,v66" },
2423  { Hexagon::BI__builtin_HEXAGON_V6_vroundhub_128B, "v60,v62,v65,v66" },
2424  { Hexagon::BI__builtin_HEXAGON_V6_vrounduhub, "v62,v65,v66" },
2425  { Hexagon::BI__builtin_HEXAGON_V6_vrounduhub_128B, "v62,v65,v66" },
2426  { Hexagon::BI__builtin_HEXAGON_V6_vrounduwuh, "v62,v65,v66" },
2427  { Hexagon::BI__builtin_HEXAGON_V6_vrounduwuh_128B, "v62,v65,v66" },
2428  { Hexagon::BI__builtin_HEXAGON_V6_vroundwh, "v60,v62,v65,v66" },
2429  { Hexagon::BI__builtin_HEXAGON_V6_vroundwh_128B, "v60,v62,v65,v66" },
2430  { Hexagon::BI__builtin_HEXAGON_V6_vroundwuh, "v60,v62,v65,v66" },
2431  { Hexagon::BI__builtin_HEXAGON_V6_vroundwuh_128B, "v60,v62,v65,v66" },
2432  { Hexagon::BI__builtin_HEXAGON_V6_vrsadubi, "v60,v62,v65,v66" },
2433  { Hexagon::BI__builtin_HEXAGON_V6_vrsadubi_128B, "v60,v62,v65,v66" },
2434  { Hexagon::BI__builtin_HEXAGON_V6_vrsadubi_acc, "v60,v62,v65,v66" },
2435  { Hexagon::BI__builtin_HEXAGON_V6_vrsadubi_acc_128B, "v60,v62,v65,v66" },
2436  { Hexagon::BI__builtin_HEXAGON_V6_vsatdw, "v66" },
2437  { Hexagon::BI__builtin_HEXAGON_V6_vsatdw_128B, "v66" },
2438  { Hexagon::BI__builtin_HEXAGON_V6_vsathub, "v60,v62,v65,v66" },
2439  { Hexagon::BI__builtin_HEXAGON_V6_vsathub_128B, "v60,v62,v65,v66" },
2440  { Hexagon::BI__builtin_HEXAGON_V6_vsatuwuh, "v62,v65,v66" },
2441  { Hexagon::BI__builtin_HEXAGON_V6_vsatuwuh_128B, "v62,v65,v66" },
2442  { Hexagon::BI__builtin_HEXAGON_V6_vsatwh, "v60,v62,v65,v66" },
2443  { Hexagon::BI__builtin_HEXAGON_V6_vsatwh_128B, "v60,v62,v65,v66" },
2444  { Hexagon::BI__builtin_HEXAGON_V6_vsb, "v60,v62,v65,v66" },
2445  { Hexagon::BI__builtin_HEXAGON_V6_vsb_128B, "v60,v62,v65,v66" },
2446  { Hexagon::BI__builtin_HEXAGON_V6_vsh, "v60,v62,v65,v66" },
2447  { Hexagon::BI__builtin_HEXAGON_V6_vsh_128B, "v60,v62,v65,v66" },
2448  { Hexagon::BI__builtin_HEXAGON_V6_vshufeh, "v60,v62,v65,v66" },
2449  { Hexagon::BI__builtin_HEXAGON_V6_vshufeh_128B, "v60,v62,v65,v66" },
2450  { Hexagon::BI__builtin_HEXAGON_V6_vshuffb, "v60,v62,v65,v66" },
2451  { Hexagon::BI__builtin_HEXAGON_V6_vshuffb_128B, "v60,v62,v65,v66" },
2452  { Hexagon::BI__builtin_HEXAGON_V6_vshuffeb, "v60,v62,v65,v66" },
2453  { Hexagon::BI__builtin_HEXAGON_V6_vshuffeb_128B, "v60,v62,v65,v66" },
2454  { Hexagon::BI__builtin_HEXAGON_V6_vshuffh, "v60,v62,v65,v66" },
2455  { Hexagon::BI__builtin_HEXAGON_V6_vshuffh_128B, "v60,v62,v65,v66" },
2456  { Hexagon::BI__builtin_HEXAGON_V6_vshuffob, "v60,v62,v65,v66" },
2457  { Hexagon::BI__builtin_HEXAGON_V6_vshuffob_128B, "v60,v62,v65,v66" },
2458  { Hexagon::BI__builtin_HEXAGON_V6_vshuffvdd, "v60,v62,v65,v66" },
2459  { Hexagon::BI__builtin_HEXAGON_V6_vshuffvdd_128B, "v60,v62,v65,v66" },
2460  { Hexagon::BI__builtin_HEXAGON_V6_vshufoeb, "v60,v62,v65,v66" },
2461  { Hexagon::BI__builtin_HEXAGON_V6_vshufoeb_128B, "v60,v62,v65,v66" },
2462  { Hexagon::BI__builtin_HEXAGON_V6_vshufoeh, "v60,v62,v65,v66" },
2463  { Hexagon::BI__builtin_HEXAGON_V6_vshufoeh_128B, "v60,v62,v65,v66" },
2464  { Hexagon::BI__builtin_HEXAGON_V6_vshufoh, "v60,v62,v65,v66" },
2465  { Hexagon::BI__builtin_HEXAGON_V6_vshufoh_128B, "v60,v62,v65,v66" },
2466  { Hexagon::BI__builtin_HEXAGON_V6_vsubb, "v60,v62,v65,v66" },
2467  { Hexagon::BI__builtin_HEXAGON_V6_vsubb_128B, "v60,v62,v65,v66" },
2468  { Hexagon::BI__builtin_HEXAGON_V6_vsubb_dv, "v60,v62,v65,v66" },
2469  { Hexagon::BI__builtin_HEXAGON_V6_vsubb_dv_128B, "v60,v62,v65,v66" },
2470  { Hexagon::BI__builtin_HEXAGON_V6_vsubbsat, "v62,v65,v66" },
2471  { Hexagon::BI__builtin_HEXAGON_V6_vsubbsat_128B, "v62,v65,v66" },
2472  { Hexagon::BI__builtin_HEXAGON_V6_vsubbsat_dv, "v62,v65,v66" },
2473  { Hexagon::BI__builtin_HEXAGON_V6_vsubbsat_dv_128B, "v62,v65,v66" },
2474  { Hexagon::BI__builtin_HEXAGON_V6_vsubcarry, "v62,v65,v66" },
2475  { Hexagon::BI__builtin_HEXAGON_V6_vsubcarry_128B, "v62,v65,v66" },
2476  { Hexagon::BI__builtin_HEXAGON_V6_vsubh, "v60,v62,v65,v66" },
2477  { Hexagon::BI__builtin_HEXAGON_V6_vsubh_128B, "v60,v62,v65,v66" },
2478  { Hexagon::BI__builtin_HEXAGON_V6_vsubh_dv, "v60,v62,v65,v66" },
2479  { Hexagon::BI__builtin_HEXAGON_V6_vsubh_dv_128B, "v60,v62,v65,v66" },
2480  { Hexagon::BI__builtin_HEXAGON_V6_vsubhsat, "v60,v62,v65,v66" },
2481  { Hexagon::BI__builtin_HEXAGON_V6_vsubhsat_128B, "v60,v62,v65,v66" },
2482  { Hexagon::BI__builtin_HEXAGON_V6_vsubhsat_dv, "v60,v62,v65,v66" },
2483  { Hexagon::BI__builtin_HEXAGON_V6_vsubhsat_dv_128B, "v60,v62,v65,v66" },
2484  { Hexagon::BI__builtin_HEXAGON_V6_vsubhw, "v60,v62,v65,v66" },
2485  { Hexagon::BI__builtin_HEXAGON_V6_vsubhw_128B, "v60,v62,v65,v66" },
2486  { Hexagon::BI__builtin_HEXAGON_V6_vsububh, "v60,v62,v65,v66" },
2487  { Hexagon::BI__builtin_HEXAGON_V6_vsububh_128B, "v60,v62,v65,v66" },
2488  { Hexagon::BI__builtin_HEXAGON_V6_vsububsat, "v60,v62,v65,v66" },
2489  { Hexagon::BI__builtin_HEXAGON_V6_vsububsat_128B, "v60,v62,v65,v66" },
2490  { Hexagon::BI__builtin_HEXAGON_V6_vsububsat_dv, "v60,v62,v65,v66" },
2491  { Hexagon::BI__builtin_HEXAGON_V6_vsububsat_dv_128B, "v60,v62,v65,v66" },
2492  { Hexagon::BI__builtin_HEXAGON_V6_vsubububb_sat, "v62,v65,v66" },
2493  { Hexagon::BI__builtin_HEXAGON_V6_vsubububb_sat_128B, "v62,v65,v66" },
2494  { Hexagon::BI__builtin_HEXAGON_V6_vsubuhsat, "v60,v62,v65,v66" },
2495  { Hexagon::BI__builtin_HEXAGON_V6_vsubuhsat_128B, "v60,v62,v65,v66" },
2496  { Hexagon::BI__builtin_HEXAGON_V6_vsubuhsat_dv, "v60,v62,v65,v66" },
2497  { Hexagon::BI__builtin_HEXAGON_V6_vsubuhsat_dv_128B, "v60,v62,v65,v66" },
2498  { Hexagon::BI__builtin_HEXAGON_V6_vsubuhw, "v60,v62,v65,v66" },
2499  { Hexagon::BI__builtin_HEXAGON_V6_vsubuhw_128B, "v60,v62,v65,v66" },
2500  { Hexagon::BI__builtin_HEXAGON_V6_vsubuwsat, "v62,v65,v66" },
2501  { Hexagon::BI__builtin_HEXAGON_V6_vsubuwsat_128B, "v62,v65,v66" },
2502  { Hexagon::BI__builtin_HEXAGON_V6_vsubuwsat_dv, "v62,v65,v66" },
2503  { Hexagon::BI__builtin_HEXAGON_V6_vsubuwsat_dv_128B, "v62,v65,v66" },
2504  { Hexagon::BI__builtin_HEXAGON_V6_vsubw, "v60,v62,v65,v66" },
2505  { Hexagon::BI__builtin_HEXAGON_V6_vsubw_128B, "v60,v62,v65,v66" },
2506  { Hexagon::BI__builtin_HEXAGON_V6_vsubw_dv, "v60,v62,v65,v66" },
2507  { Hexagon::BI__builtin_HEXAGON_V6_vsubw_dv_128B, "v60,v62,v65,v66" },
2508  { Hexagon::BI__builtin_HEXAGON_V6_vsubwsat, "v60,v62,v65,v66" },
2509  { Hexagon::BI__builtin_HEXAGON_V6_vsubwsat_128B, "v60,v62,v65,v66" },
2510  { Hexagon::BI__builtin_HEXAGON_V6_vsubwsat_dv, "v60,v62,v65,v66" },
2511  { Hexagon::BI__builtin_HEXAGON_V6_vsubwsat_dv_128B, "v60,v62,v65,v66" },
2512  { Hexagon::BI__builtin_HEXAGON_V6_vswap, "v60,v62,v65,v66" },
2513  { Hexagon::BI__builtin_HEXAGON_V6_vswap_128B, "v60,v62,v65,v66" },
2514  { Hexagon::BI__builtin_HEXAGON_V6_vtmpyb, "v60,v62,v65,v66" },
2515  { Hexagon::BI__builtin_HEXAGON_V6_vtmpyb_128B, "v60,v62,v65,v66" },
2516  { Hexagon::BI__builtin_HEXAGON_V6_vtmpyb_acc, "v60,v62,v65,v66" },
2517  { Hexagon::BI__builtin_HEXAGON_V6_vtmpyb_acc_128B, "v60,v62,v65,v66" },
2518  { Hexagon::BI__builtin_HEXAGON_V6_vtmpybus, "v60,v62,v65,v66" },
2519  { Hexagon::BI__builtin_HEXAGON_V6_vtmpybus_128B, "v60,v62,v65,v66" },
2520  { Hexagon::BI__builtin_HEXAGON_V6_vtmpybus_acc, "v60,v62,v65,v66" },
2521  { Hexagon::BI__builtin_HEXAGON_V6_vtmpybus_acc_128B, "v60,v62,v65,v66" },
2522  { Hexagon::BI__builtin_HEXAGON_V6_vtmpyhb, "v60,v62,v65,v66" },
2523  { Hexagon::BI__builtin_HEXAGON_V6_vtmpyhb_128B, "v60,v62,v65,v66" },
2524  { Hexagon::BI__builtin_HEXAGON_V6_vtmpyhb_acc, "v60,v62,v65,v66" },
2525  { Hexagon::BI__builtin_HEXAGON_V6_vtmpyhb_acc_128B, "v60,v62,v65,v66" },
2526  { Hexagon::BI__builtin_HEXAGON_V6_vunpackb, "v60,v62,v65,v66" },
2527  { Hexagon::BI__builtin_HEXAGON_V6_vunpackb_128B, "v60,v62,v65,v66" },
2528  { Hexagon::BI__builtin_HEXAGON_V6_vunpackh, "v60,v62,v65,v66" },
2529  { Hexagon::BI__builtin_HEXAGON_V6_vunpackh_128B, "v60,v62,v65,v66" },
2530  { Hexagon::BI__builtin_HEXAGON_V6_vunpackob, "v60,v62,v65,v66" },
2531  { Hexagon::BI__builtin_HEXAGON_V6_vunpackob_128B, "v60,v62,v65,v66" },
2532  { Hexagon::BI__builtin_HEXAGON_V6_vunpackoh, "v60,v62,v65,v66" },
2533  { Hexagon::BI__builtin_HEXAGON_V6_vunpackoh_128B, "v60,v62,v65,v66" },
2534  { Hexagon::BI__builtin_HEXAGON_V6_vunpackub, "v60,v62,v65,v66" },
2535  { Hexagon::BI__builtin_HEXAGON_V6_vunpackub_128B, "v60,v62,v65,v66" },
2536  { Hexagon::BI__builtin_HEXAGON_V6_vunpackuh, "v60,v62,v65,v66" },
2537  { Hexagon::BI__builtin_HEXAGON_V6_vunpackuh_128B, "v60,v62,v65,v66" },
2538  { Hexagon::BI__builtin_HEXAGON_V6_vxor, "v60,v62,v65,v66" },
2539  { Hexagon::BI__builtin_HEXAGON_V6_vxor_128B, "v60,v62,v65,v66" },
2540  { Hexagon::BI__builtin_HEXAGON_V6_vzb, "v60,v62,v65,v66" },
2541  { Hexagon::BI__builtin_HEXAGON_V6_vzb_128B, "v60,v62,v65,v66" },
2542  { Hexagon::BI__builtin_HEXAGON_V6_vzh, "v60,v62,v65,v66" },
2543  { Hexagon::BI__builtin_HEXAGON_V6_vzh_128B, "v60,v62,v65,v66" },
2544  };
2545 
2546  // Sort the tables on first execution so we can binary search them.
2547  auto SortCmp = [](const BuiltinAndString &LHS, const BuiltinAndString &RHS) {
2548  return LHS.BuiltinID < RHS.BuiltinID;
2549  };
2550  static const bool SortOnce =
2551  (std::sort(std::begin(ValidCPU), std::end(ValidCPU), SortCmp),
2552  std::sort(std::begin(ValidHVX), std::end(ValidHVX), SortCmp), true);
2553  (void)SortOnce;
2554  auto LowerBoundCmp = [](const BuiltinAndString &BI, unsigned BuiltinID) {
2555  return BI.BuiltinID < BuiltinID;
2556  };
2557 
2558  const TargetInfo &TI = Context.getTargetInfo();
2559 
2560  const BuiltinAndString *FC =
2561  std::lower_bound(std::begin(ValidCPU), std::end(ValidCPU), BuiltinID,
2562  LowerBoundCmp);
2563  if (FC != std::end(ValidCPU) && FC->BuiltinID == BuiltinID) {
2564  const TargetOptions &Opts = TI.getTargetOpts();
2565  StringRef CPU = Opts.CPU;
2566  if (!CPU.empty()) {
2567  assert(CPU.startswith("hexagon") && "Unexpected CPU name");
2568  CPU.consume_front("hexagon");
2570  StringRef(FC->Str).split(CPUs, ',');
2571  if (llvm::none_of(CPUs, [CPU](StringRef S) { return S == CPU; }))
2572  return Diag(TheCall->getBeginLoc(),
2573  diag::err_hexagon_builtin_unsupported_cpu);
2574  }
2575  }
2576 
2577  const BuiltinAndString *FH =
2578  std::lower_bound(std::begin(ValidHVX), std::end(ValidHVX), BuiltinID,
2579  LowerBoundCmp);
2580  if (FH != std::end(ValidHVX) && FH->BuiltinID == BuiltinID) {
2581  if (!TI.hasFeature("hvx"))
2582  return Diag(TheCall->getBeginLoc(),
2583  diag::err_hexagon_builtin_requires_hvx);
2584 
2586  StringRef(FH->Str).split(HVXs, ',');
2587  bool IsValid = llvm::any_of(HVXs,
2588  [&TI] (StringRef V) {
2589  std::string F = "hvx" + V.str();
2590  return TI.hasFeature(F);
2591  });
2592  if (!IsValid)
2593  return Diag(TheCall->getBeginLoc(),
2594  diag::err_hexagon_builtin_unsupported_hvx);
2595  }
2596 
2597  return false;
2598 }
2599 
2600 bool Sema::CheckHexagonBuiltinArgument(unsigned BuiltinID, CallExpr *TheCall) {
2601  struct ArgInfo {
2602  uint8_t OpNum;
2603  bool IsSigned;
2604  uint8_t BitWidth;
2605  uint8_t Align;
2606  };
2607  struct BuiltinInfo {
2608  unsigned BuiltinID;
2609  ArgInfo Infos[2];
2610  };
2611 
2612  static BuiltinInfo Infos[] = {
2613  { Hexagon::BI__builtin_circ_ldd, {{ 3, true, 4, 3 }} },
2614  { Hexagon::BI__builtin_circ_ldw, {{ 3, true, 4, 2 }} },
2615  { Hexagon::BI__builtin_circ_ldh, {{ 3, true, 4, 1 }} },
2616  { Hexagon::BI__builtin_circ_lduh, {{ 3, true, 4, 0 }} },
2617  { Hexagon::BI__builtin_circ_ldb, {{ 3, true, 4, 0 }} },
2618  { Hexagon::BI__builtin_circ_ldub, {{ 3, true, 4, 0 }} },
2619  { Hexagon::BI__builtin_circ_std, {{ 3, true, 4, 3 }} },
2620  { Hexagon::BI__builtin_circ_stw, {{ 3, true, 4, 2 }} },
2621  { Hexagon::BI__builtin_circ_sth, {{ 3, true, 4, 1 }} },
2622  { Hexagon::BI__builtin_circ_sthhi, {{ 3, true, 4, 1 }} },
2623  { Hexagon::BI__builtin_circ_stb, {{ 3, true, 4, 0 }} },
2624 
2625  { Hexagon::BI__builtin_HEXAGON_L2_loadrub_pci, {{ 1, true, 4, 0 }} },
2626  { Hexagon::BI__builtin_HEXAGON_L2_loadrb_pci, {{ 1, true, 4, 0 }} },
2627  { Hexagon::BI__builtin_HEXAGON_L2_loadruh_pci, {{ 1, true, 4, 1 }} },
2628  { Hexagon::BI__builtin_HEXAGON_L2_loadrh_pci, {{ 1, true, 4, 1 }} },
2629  { Hexagon::BI__builtin_HEXAGON_L2_loadri_pci, {{ 1, true, 4, 2 }} },
2630  { Hexagon::BI__builtin_HEXAGON_L2_loadrd_pci, {{ 1, true, 4, 3 }} },
2631  { Hexagon::BI__builtin_HEXAGON_S2_storerb_pci, {{ 1, true, 4, 0 }} },
2632  { Hexagon::BI__builtin_HEXAGON_S2_storerh_pci, {{ 1, true, 4, 1 }} },
2633  { Hexagon::BI__builtin_HEXAGON_S2_storerf_pci, {{ 1, true, 4, 1 }} },
2634  { Hexagon::BI__builtin_HEXAGON_S2_storeri_pci, {{ 1, true, 4, 2 }} },
2635  { Hexagon::BI__builtin_HEXAGON_S2_storerd_pci, {{ 1, true, 4, 3 }} },
2636 
2637  { Hexagon::BI__builtin_HEXAGON_A2_combineii, {{ 1, true, 8, 0 }} },
2638  { Hexagon::BI__builtin_HEXAGON_A2_tfrih, {{ 1, false, 16, 0 }} },
2639  { Hexagon::BI__builtin_HEXAGON_A2_tfril, {{ 1, false, 16, 0 }} },
2640  { Hexagon::BI__builtin_HEXAGON_A2_tfrpi, {{ 0, true, 8, 0 }} },
2641  { Hexagon::BI__builtin_HEXAGON_A4_bitspliti, {{ 1, false, 5, 0 }} },
2642  { Hexagon::BI__builtin_HEXAGON_A4_cmpbeqi, {{ 1, false, 8, 0 }} },
2643  { Hexagon::BI__builtin_HEXAGON_A4_cmpbgti, {{ 1, true, 8, 0 }} },
2644  { Hexagon::BI__builtin_HEXAGON_A4_cround_ri, {{ 1, false, 5, 0 }} },
2645  { Hexagon::BI__builtin_HEXAGON_A4_round_ri, {{ 1, false, 5, 0 }} },
2646  { Hexagon::BI__builtin_HEXAGON_A4_round_ri_sat, {{ 1, false, 5, 0 }} },
2647  { Hexagon::BI__builtin_HEXAGON_A4_vcmpbeqi, {{ 1, false, 8, 0 }} },
2648  { Hexagon::BI__builtin_HEXAGON_A4_vcmpbgti, {{ 1, true, 8, 0 }} },
2649  { Hexagon::BI__builtin_HEXAGON_A4_vcmpbgtui, {{ 1, false, 7, 0 }} },
2650  { Hexagon::BI__builtin_HEXAGON_A4_vcmpheqi, {{ 1, true, 8, 0 }} },
2651  { Hexagon::BI__builtin_HEXAGON_A4_vcmphgti, {{ 1, true, 8, 0 }} },
2652  { Hexagon::BI__builtin_HEXAGON_A4_vcmphgtui, {{ 1, false, 7, 0 }} },
2653  { Hexagon::BI__builtin_HEXAGON_A4_vcmpweqi, {{ 1, true, 8, 0 }} },
2654  { Hexagon::BI__builtin_HEXAGON_A4_vcmpwgti, {{ 1, true, 8, 0 }} },
2655  { Hexagon::BI__builtin_HEXAGON_A4_vcmpwgtui, {{ 1, false, 7, 0 }} },
2656  { Hexagon::BI__builtin_HEXAGON_C2_bitsclri, {{ 1, false, 6, 0 }} },
2657  { Hexagon::BI__builtin_HEXAGON_C2_muxii, {{ 2, true, 8, 0 }} },
2658  { Hexagon::BI__builtin_HEXAGON_C4_nbitsclri, {{ 1, false, 6, 0 }} },
2659  { Hexagon::BI__builtin_HEXAGON_F2_dfclass, {{ 1, false, 5, 0 }} },
2660  { Hexagon::BI__builtin_HEXAGON_F2_dfimm_n, {{ 0, false, 10, 0 }} },
2661  { Hexagon::BI__builtin_HEXAGON_F2_dfimm_p, {{ 0, false, 10, 0 }} },
2662  { Hexagon::BI__builtin_HEXAGON_F2_sfclass, {{ 1, false, 5, 0 }} },
2663  { Hexagon::BI__builtin_HEXAGON_F2_sfimm_n, {{ 0, false, 10, 0 }} },
2664  { Hexagon::BI__builtin_HEXAGON_F2_sfimm_p, {{ 0, false, 10, 0 }} },
2665  { Hexagon::BI__builtin_HEXAGON_M4_mpyri_addi, {{ 2, false, 6, 0 }} },
2666  { Hexagon::BI__builtin_HEXAGON_M4_mpyri_addr_u2, {{ 1, false, 6, 2 }} },
2667  { Hexagon::BI__builtin_HEXAGON_S2_addasl_rrri, {{ 2, false, 3, 0 }} },
2668  { Hexagon::BI__builtin_HEXAGON_S2_asl_i_p_acc, {{ 2, false, 6, 0 }} },
2669  { Hexagon::BI__builtin_HEXAGON_S2_asl_i_p_and, {{ 2, false, 6, 0 }} },
2670  { Hexagon::BI__builtin_HEXAGON_S2_asl_i_p, {{ 1, false, 6, 0 }} },
2671  { Hexagon::BI__builtin_HEXAGON_S2_asl_i_p_nac, {{ 2, false, 6, 0 }} },
2672  { Hexagon::BI__builtin_HEXAGON_S2_asl_i_p_or, {{ 2, false, 6, 0 }} },
2673  { Hexagon::BI__builtin_HEXAGON_S2_asl_i_p_xacc, {{ 2, false, 6, 0 }} },
2674  { Hexagon::BI__builtin_HEXAGON_S2_asl_i_r_acc, {{ 2, false, 5, 0 }} },
2675  { Hexagon::BI__builtin_HEXAGON_S2_asl_i_r_and, {{ 2, false, 5, 0 }} },
2676  { Hexagon::BI__builtin_HEXAGON_S2_asl_i_r, {{ 1, false, 5, 0 }} },
2677  { Hexagon::BI__builtin_HEXAGON_S2_asl_i_r_nac, {{ 2, false, 5, 0 }} },
2678  { Hexagon::BI__builtin_HEXAGON_S2_asl_i_r_or, {{ 2, false, 5, 0 }} },
2679  { Hexagon::BI__builtin_HEXAGON_S2_asl_i_r_sat, {{ 1, false, 5, 0 }} },
2680  { Hexagon::BI__builtin_HEXAGON_S2_asl_i_r_xacc, {{ 2, false, 5, 0 }} },
2681  { Hexagon::BI__builtin_HEXAGON_S2_asl_i_vh, {{ 1, false, 4, 0 }} },
2682  { Hexagon::BI__builtin_HEXAGON_S2_asl_i_vw, {{ 1, false, 5, 0 }} },
2683  { Hexagon::BI__builtin_HEXAGON_S2_asr_i_p_acc, {{ 2, false, 6, 0 }} },
2684  { Hexagon::BI__builtin_HEXAGON_S2_asr_i_p_and, {{ 2, false, 6, 0 }} },
2685  { Hexagon::BI__builtin_HEXAGON_S2_asr_i_p, {{ 1, false, 6, 0 }} },
2686  { Hexagon::BI__builtin_HEXAGON_S2_asr_i_p_nac, {{ 2, false, 6, 0 }} },
2687  { Hexagon::BI__builtin_HEXAGON_S2_asr_i_p_or, {{ 2, false, 6, 0 }} },
2688  { Hexagon::BI__builtin_HEXAGON_S2_asr_i_p_rnd_goodsyntax,
2689  {{ 1, false, 6, 0 }} },
2690  { Hexagon::BI__builtin_HEXAGON_S2_asr_i_p_rnd, {{ 1, false, 6, 0 }} },
2691  { Hexagon::BI__builtin_HEXAGON_S2_asr_i_r_acc, {{ 2, false, 5, 0 }} },
2692  { Hexagon::BI__builtin_HEXAGON_S2_asr_i_r_and, {{ 2, false, 5, 0 }} },
2693  { Hexagon::BI__builtin_HEXAGON_S2_asr_i_r, {{ 1, false, 5, 0 }} },
2694  { Hexagon::BI__builtin_HEXAGON_S2_asr_i_r_nac, {{ 2, false, 5, 0 }} },
2695  { Hexagon::BI__builtin_HEXAGON_S2_asr_i_r_or, {{ 2, false, 5, 0 }} },
2696  { Hexagon::BI__builtin_HEXAGON_S2_asr_i_r_rnd_goodsyntax,
2697  {{ 1, false, 5, 0 }} },
2698  { Hexagon::BI__builtin_HEXAGON_S2_asr_i_r_rnd, {{ 1, false, 5, 0 }} },
2699  { Hexagon::BI__builtin_HEXAGON_S2_asr_i_svw_trun, {{ 1, false, 5, 0 }} },
2700  { Hexagon::BI__builtin_HEXAGON_S2_asr_i_vh, {{ 1, false, 4, 0 }} },
2701  { Hexagon::BI__builtin_HEXAGON_S2_asr_i_vw, {{ 1, false, 5, 0 }} },
2702  { Hexagon::BI__builtin_HEXAGON_S2_clrbit_i, {{ 1, false, 5, 0 }} },
2703  { Hexagon::BI__builtin_HEXAGON_S2_extractu, {{ 1, false, 5, 0 },
2704  { 2, false, 5, 0 }} },
2705  { Hexagon::BI__builtin_HEXAGON_S2_extractup, {{ 1, false, 6, 0 },
2706  { 2, false, 6, 0 }} },
2707  { Hexagon::BI__builtin_HEXAGON_S2_insert, {{ 2, false, 5, 0 },
2708  { 3, false, 5, 0 }} },
2709  { Hexagon::BI__builtin_HEXAGON_S2_insertp, {{ 2, false, 6, 0 },
2710  { 3, false, 6, 0 }} },
2711  { Hexagon::BI__builtin_HEXAGON_S2_lsr_i_p_acc, {{ 2, false, 6, 0 }} },
2712  { Hexagon::BI__builtin_HEXAGON_S2_lsr_i_p_and, {{ 2, false, 6, 0 }} },
2713  { Hexagon::BI__builtin_HEXAGON_S2_lsr_i_p, {{ 1, false, 6, 0 }} },
2714  { Hexagon::BI__builtin_HEXAGON_S2_lsr_i_p_nac, {{ 2, false, 6, 0 }} },
2715  { Hexagon::BI__builtin_HEXAGON_S2_lsr_i_p_or, {{ 2, false, 6, 0 }} },
2716  { Hexagon::BI__builtin_HEXAGON_S2_lsr_i_p_xacc, {{ 2, false, 6, 0 }} },
2717  { Hexagon::BI__builtin_HEXAGON_S2_lsr_i_r_acc, {{ 2, false, 5, 0 }} },
2718  { Hexagon::BI__builtin_HEXAGON_S2_lsr_i_r_and, {{ 2, false, 5, 0 }} },
2719  { Hexagon::BI__builtin_HEXAGON_S2_lsr_i_r, {{ 1, false, 5, 0 }} },
2720  { Hexagon::BI__builtin_HEXAGON_S2_lsr_i_r_nac, {{ 2, false, 5, 0 }} },
2721  { Hexagon::BI__builtin_HEXAGON_S2_lsr_i_r_or, {{ 2, false, 5, 0 }} },
2722  { Hexagon::BI__builtin_HEXAGON_S2_lsr_i_r_xacc, {{ 2, false, 5, 0 }} },
2723  { Hexagon::BI__builtin_HEXAGON_S2_lsr_i_vh, {{ 1, false, 4, 0 }} },
2724  { Hexagon::BI__builtin_HEXAGON_S2_lsr_i_vw, {{ 1, false, 5, 0 }} },
2725  { Hexagon::BI__builtin_HEXAGON_S2_setbit_i, {{ 1, false, 5, 0 }} },
2726  { Hexagon::BI__builtin_HEXAGON_S2_tableidxb_goodsyntax,
2727  {{ 2, false, 4, 0 },
2728  { 3, false, 5, 0 }} },
2729  { Hexagon::BI__builtin_HEXAGON_S2_tableidxd_goodsyntax,
2730  {{ 2, false, 4, 0 },
2731  { 3, false, 5, 0 }} },
2732  { Hexagon::BI__builtin_HEXAGON_S2_tableidxh_goodsyntax,
2733  {{ 2, false, 4, 0 },
2734  { 3, false, 5, 0 }} },
2735  { Hexagon::BI__builtin_HEXAGON_S2_tableidxw_goodsyntax,
2736  {{ 2, false, 4, 0 },
2737  { 3, false, 5, 0 }} },
2738  { Hexagon::BI__builtin_HEXAGON_S2_togglebit_i, {{ 1, false, 5, 0 }} },
2739  { Hexagon::BI__builtin_HEXAGON_S2_tstbit_i, {{ 1, false, 5, 0 }} },
2740  { Hexagon::BI__builtin_HEXAGON_S2_valignib, {{ 2, false, 3, 0 }} },
2741  { Hexagon::BI__builtin_HEXAGON_S2_vspliceib, {{ 2, false, 3, 0 }} },
2742  { Hexagon::BI__builtin_HEXAGON_S4_addi_asl_ri, {{ 2, false, 5, 0 }} },
2743  { Hexagon::BI__builtin_HEXAGON_S4_addi_lsr_ri, {{ 2, false, 5, 0 }} },
2744  { Hexagon::BI__builtin_HEXAGON_S4_andi_asl_ri, {{ 2, false, 5, 0 }} },
2745  { Hexagon::BI__builtin_HEXAGON_S4_andi_lsr_ri, {{ 2, false, 5, 0 }} },
2746  { Hexagon::BI__builtin_HEXAGON_S4_clbaddi, {{ 1, true , 6, 0 }} },
2747  { Hexagon::BI__builtin_HEXAGON_S4_clbpaddi, {{ 1, true, 6, 0 }} },
2748  { Hexagon::BI__builtin_HEXAGON_S4_extract, {{ 1, false, 5, 0 },
2749  { 2, false, 5, 0 }} },
2750  { Hexagon::BI__builtin_HEXAGON_S4_extractp, {{ 1, false, 6, 0 },
2751  { 2, false, 6, 0 }} },
2752  { Hexagon::BI__builtin_HEXAGON_S4_lsli, {{ 0, true, 6, 0 }} },
2753  { Hexagon::BI__builtin_HEXAGON_S4_ntstbit_i, {{ 1, false, 5, 0 }} },
2754  { Hexagon::BI__builtin_HEXAGON_S4_ori_asl_ri, {{ 2, false, 5, 0 }} },
2755  { Hexagon::BI__builtin_HEXAGON_S4_ori_lsr_ri, {{ 2, false, 5, 0 }} },
2756  { Hexagon::BI__builtin_HEXAGON_S4_subi_asl_ri, {{ 2, false, 5, 0 }} },
2757  { Hexagon::BI__builtin_HEXAGON_S4_subi_lsr_ri, {{ 2, false, 5, 0 }} },
2758  { Hexagon::BI__builtin_HEXAGON_S4_vrcrotate_acc, {{ 3, false, 2, 0 }} },
2759  { Hexagon::BI__builtin_HEXAGON_S4_vrcrotate, {{ 2, false, 2, 0 }} },
2760  { Hexagon::BI__builtin_HEXAGON_S5_asrhub_rnd_sat_goodsyntax,
2761  {{ 1, false, 4, 0 }} },
2762  { Hexagon::BI__builtin_HEXAGON_S5_asrhub_sat, {{ 1, false, 4, 0 }} },
2763  { Hexagon::BI__builtin_HEXAGON_S5_vasrhrnd_goodsyntax,
2764  {{ 1, false, 4, 0 }} },
2765  { Hexagon::BI__builtin_HEXAGON_S6_rol_i_p, {{ 1, false, 6, 0 }} },
2766  { Hexagon::BI__builtin_HEXAGON_S6_rol_i_p_acc, {{ 2, false, 6, 0 }} },
2767  { Hexagon::BI__builtin_HEXAGON_S6_rol_i_p_and, {{ 2, false, 6, 0 }} },
2768  { Hexagon::BI__builtin_HEXAGON_S6_rol_i_p_nac, {{ 2, false, 6, 0 }} },
2769  { Hexagon::BI__builtin_HEXAGON_S6_rol_i_p_or, {{ 2, false, 6, 0 }} },
2770  { Hexagon::BI__builtin_HEXAGON_S6_rol_i_p_xacc, {{ 2, false, 6, 0 }} },
2771  { Hexagon::BI__builtin_HEXAGON_S6_rol_i_r, {{ 1, false, 5, 0 }} },
2772  { Hexagon::BI__builtin_HEXAGON_S6_rol_i_r_acc, {{ 2, false, 5, 0 }} },
2773  { Hexagon::BI__builtin_HEXAGON_S6_rol_i_r_and, {{ 2, false, 5, 0 }} },
2774  { Hexagon::BI__builtin_HEXAGON_S6_rol_i_r_nac, {{ 2, false, 5, 0 }} },
2775  { Hexagon::BI__builtin_HEXAGON_S6_rol_i_r_or, {{ 2, false, 5, 0 }} },
2776  { Hexagon::BI__builtin_HEXAGON_S6_rol_i_r_xacc, {{ 2, false, 5, 0 }} },
2777  { Hexagon::BI__builtin_HEXAGON_V6_valignbi, {{ 2, false, 3, 0 }} },
2778  { Hexagon::BI__builtin_HEXAGON_V6_valignbi_128B, {{ 2, false, 3, 0 }} },
2779  { Hexagon::BI__builtin_HEXAGON_V6_vlalignbi, {{ 2, false, 3, 0 }} },
2780  { Hexagon::BI__builtin_HEXAGON_V6_vlalignbi_128B, {{ 2, false, 3, 0 }} },
2781  { Hexagon::BI__builtin_HEXAGON_V6_vrmpybusi, {{ 2, false, 1, 0 }} },
2782  { Hexagon::BI__builtin_HEXAGON_V6_vrmpybusi_128B, {{ 2, false, 1, 0 }} },
2783  { Hexagon::BI__builtin_HEXAGON_V6_vrmpybusi_acc, {{ 3, false, 1, 0 }} },
2784  { Hexagon::BI__builtin_HEXAGON_V6_vrmpybusi_acc_128B,
2785  {{ 3, false, 1, 0 }} },
2786  { Hexagon::BI__builtin_HEXAGON_V6_vrmpyubi, {{ 2, false, 1, 0 }} },
2787  { Hexagon::BI__builtin_HEXAGON_V6_vrmpyubi_128B, {{ 2, false, 1, 0 }} },
2788  { Hexagon::BI__builtin_HEXAGON_V6_vrmpyubi_acc, {{ 3, false, 1, 0 }} },
2789  { Hexagon::BI__builtin_HEXAGON_V6_vrmpyubi_acc_128B,
2790  {{ 3, false, 1, 0 }} },
2791  { Hexagon::BI__builtin_HEXAGON_V6_vrsadubi, {{ 2, false, 1, 0 }} },
2792  { Hexagon::BI__builtin_HEXAGON_V6_vrsadubi_128B, {{ 2, false, 1, 0 }} },
2793  { Hexagon::BI__builtin_HEXAGON_V6_vrsadubi_acc, {{ 3, false, 1, 0 }} },
2794  { Hexagon::BI__builtin_HEXAGON_V6_vrsadubi_acc_128B,
2795  {{ 3, false, 1, 0 }} },
2796  };
2797 
2798  // Use a dynamically initialized static to sort the table exactly once on
2799  // first run.
2800  static const bool SortOnce =
2801  (std::sort(std::begin(Infos), std::end(Infos),
2802  [](const BuiltinInfo &LHS, const BuiltinInfo &RHS) {
2803  return LHS.BuiltinID < RHS.BuiltinID;
2804  }),
2805  true);
2806  (void)SortOnce;
2807 
2808  const BuiltinInfo *F =
2809  std::lower_bound(std::begin(Infos), std::end(Infos), BuiltinID,
2810  [](const BuiltinInfo &BI, unsigned BuiltinID) {
2811  return BI.BuiltinID < BuiltinID;
2812  });
2813  if (F == std::end(Infos) || F->BuiltinID != BuiltinID)
2814  return false;
2815 
2816  bool Error = false;
2817 
2818  for (const ArgInfo &A : F->Infos) {
2819  // Ignore empty ArgInfo elements.
2820  if (A.BitWidth == 0)
2821  continue;
2822 
2823  int32_t Min = A.IsSigned ? -(1 << (A.BitWidth - 1)) : 0;
2824  int32_t Max = (1 << (A.IsSigned ? A.BitWidth - 1 : A.BitWidth)) - 1;
2825  if (!A.Align) {
2826  Error |= SemaBuiltinConstantArgRange(TheCall, A.OpNum, Min, Max);
2827  } else {
2828  unsigned M = 1 << A.Align;
2829  Min *= M;
2830  Max *= M;
2831  Error |= SemaBuiltinConstantArgRange(TheCall, A.OpNum, Min, Max) |
2832  SemaBuiltinConstantArgMultiple(TheCall, A.OpNum, M);
2833  }
2834  }
2835  return Error;
2836 }
2837 
2838 bool Sema::CheckHexagonBuiltinFunctionCall(unsigned BuiltinID,
2839  CallExpr *TheCall) {
2840  return CheckHexagonBuiltinCpu(BuiltinID, TheCall) ||
2841  CheckHexagonBuiltinArgument(BuiltinID, TheCall);
2842 }
2843 
2844 
2845 // CheckMipsBuiltinFunctionCall - Checks the constant value passed to the
2846 // intrinsic is correct. The switch statement is ordered by DSP, MSA. The
2847 // ordering for DSP is unspecified. MSA is ordered by the data format used
2848 // by the underlying instruction i.e., df/m, df/n and then by size.
2849 //
2850 // FIXME: The size tests here should instead be tablegen'd along with the
2851 // definitions from include/clang/Basic/BuiltinsMips.def.
2852 // FIXME: GCC is strict on signedness for some of these intrinsics, we should
2853 // be too.
2854 bool Sema::CheckMipsBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall) {
2855  unsigned i = 0, l = 0, u = 0, m = 0;
2856  switch (BuiltinID) {
2857  default: return false;
2858  case Mips::BI__builtin_mips_wrdsp: i = 1; l = 0; u = 63; break;
2859  case Mips::BI__builtin_mips_rddsp: i = 0; l = 0; u = 63; break;
2860  case Mips::BI__builtin_mips_append: i = 2; l = 0; u = 31; break;
2861  case Mips::BI__builtin_mips_balign: i = 2; l = 0; u = 3; break;
2862  case Mips::BI__builtin_mips_precr_sra_ph_w: i = 2; l = 0; u = 31; break;
2863  case Mips::BI__builtin_mips_precr_sra_r_ph_w: i = 2; l = 0; u = 31; break;
2864  case Mips::BI__builtin_mips_prepend: i = 2; l = 0; u = 31; break;
2865  // MSA intrinsics. Instructions (which the intrinsics maps to) which use the
2866  // df/m field.
2867  // These intrinsics take an unsigned 3 bit immediate.
2868  case Mips::BI__builtin_msa_bclri_b:
2869  case Mips::BI__builtin_msa_bnegi_b:
2870  case Mips::BI__builtin_msa_bseti_b:
2871  case Mips::BI__builtin_msa_sat_s_b:
2872  case Mips::BI__builtin_msa_sat_u_b:
2873  case Mips::BI__builtin_msa_slli_b:
2874  case Mips::BI__builtin_msa_srai_b:
2875  case Mips::BI__builtin_msa_srari_b:
2876  case Mips::BI__builtin_msa_srli_b:
2877  case Mips::BI__builtin_msa_srlri_b: i = 1; l = 0; u = 7; break;
2878  case Mips::BI__builtin_msa_binsli_b:
2879  case Mips::BI__builtin_msa_binsri_b: i = 2; l = 0; u = 7; break;
2880  // These intrinsics take an unsigned 4 bit immediate.
2881  case Mips::BI__builtin_msa_bclri_h:
2882  case Mips::BI__builtin_msa_bnegi_h:
2883  case Mips::BI__builtin_msa_bseti_h:
2884  case Mips::BI__builtin_msa_sat_s_h:
2885  case Mips::BI__builtin_msa_sat_u_h:
2886  case Mips::BI__builtin_msa_slli_h:
2887  case Mips::BI__builtin_msa_srai_h:
2888  case Mips::BI__builtin_msa_srari_h:
2889  case Mips::BI__builtin_msa_srli_h:
2890  case Mips::BI__builtin_msa_srlri_h: i = 1; l = 0; u = 15; break;
2891  case Mips::BI__builtin_msa_binsli_h:
2892  case Mips::BI__builtin_msa_binsri_h: i = 2; l = 0; u = 15; break;
2893  // These intrinsics take an unsigned 5 bit immediate.
2894  // The first block of intrinsics actually have an unsigned 5 bit field,
2895  // not a df/n field.
2896  case Mips::BI__builtin_msa_clei_u_b:
2897  case Mips::BI__builtin_msa_clei_u_h:
2898  case Mips::BI__builtin_msa_clei_u_w:
2899  case Mips::BI__builtin_msa_clei_u_d:
2900  case Mips::BI__builtin_msa_clti_u_b:
2901  case Mips::BI__builtin_msa_clti_u_h:
2902  case Mips::BI__builtin_msa_clti_u_w:
2903  case Mips::BI__builtin_msa_clti_u_d:
2904  case Mips::BI__builtin_msa_maxi_u_b:
2905  case Mips::BI__builtin_msa_maxi_u_h:
2906  case Mips::BI__builtin_msa_maxi_u_w:
2907  case Mips::BI__builtin_msa_maxi_u_d:
2908  case Mips::BI__builtin_msa_mini_u_b:
2909  case Mips::BI__builtin_msa_mini_u_h:
2910  case Mips::BI__builtin_msa_mini_u_w:
2911  case Mips::BI__builtin_msa_mini_u_d:
2912  case Mips::BI__builtin_msa_addvi_b:
2913  case Mips::BI__builtin_msa_addvi_h:
2914  case Mips::BI__builtin_msa_addvi_w:
2915  case Mips::BI__builtin_msa_addvi_d:
2916  case Mips::BI__builtin_msa_bclri_w:
2917  case Mips::BI__builtin_msa_bnegi_w:
2918  case Mips::BI__builtin_msa_bseti_w:
2919  case Mips::BI__builtin_msa_sat_s_w:
2920  case Mips::BI__builtin_msa_sat_u_w:
2921  case Mips::BI__builtin_msa_slli_w:
2922  case Mips::BI__builtin_msa_srai_w:
2923  case Mips::BI__builtin_msa_srari_w:
2924  case Mips::BI__builtin_msa_srli_w:
2925  case Mips::BI__builtin_msa_srlri_w:
2926  case Mips::BI__builtin_msa_subvi_b:
2927  case Mips::BI__builtin_msa_subvi_h:
2928  case Mips::BI__builtin_msa_subvi_w:
2929  case Mips::BI__builtin_msa_subvi_d: i = 1; l = 0; u = 31; break;
2930  case Mips::BI__builtin_msa_binsli_w:
2931  case Mips::BI__builtin_msa_binsri_w: i = 2; l = 0; u = 31; break;
2932  // These intrinsics take an unsigned 6 bit immediate.
2933  case Mips::BI__builtin_msa_bclri_d:
2934  case Mips::BI__builtin_msa_bnegi_d:
2935  case Mips::BI__builtin_msa_bseti_d:
2936  case Mips::BI__builtin_msa_sat_s_d:
2937  case Mips::BI__builtin_msa_sat_u_d:
2938  case Mips::BI__builtin_msa_slli_d:
2939  case Mips::BI__builtin_msa_srai_d:
2940  case Mips::BI__builtin_msa_srari_d:
2941  case Mips::BI__builtin_msa_srli_d:
2942  case Mips::BI__builtin_msa_srlri_d: i = 1; l = 0; u = 63; break;
2943  case Mips::BI__builtin_msa_binsli_d:
2944  case Mips::BI__builtin_msa_binsri_d: i = 2; l = 0; u = 63; break;
2945  // These intrinsics take a signed 5 bit immediate.
2946  case Mips::BI__builtin_msa_ceqi_b:
2947  case Mips::BI__builtin_msa_ceqi_h:
2948  case Mips::BI__builtin_msa_ceqi_w:
2949  case Mips::BI__builtin_msa_ceqi_d:
2950  case Mips::BI__builtin_msa_clti_s_b:
2951  case Mips::BI__builtin_msa_clti_s_h:
2952  case Mips::BI__builtin_msa_clti_s_w:
2953  case Mips::BI__builtin_msa_clti_s_d:
2954  case Mips::BI__builtin_msa_clei_s_b:
2955  case Mips::BI__builtin_msa_clei_s_h:
2956  case Mips::BI__builtin_msa_clei_s_w:
2957  case Mips::BI__builtin_msa_clei_s_d:
2958  case Mips::BI__builtin_msa_maxi_s_b:
2959  case Mips::BI__builtin_msa_maxi_s_h:
2960  case Mips::BI__builtin_msa_maxi_s_w:
2961  case Mips::BI__builtin_msa_maxi_s_d:
2962  case Mips::BI__builtin_msa_mini_s_b:
2963  case Mips::BI__builtin_msa_mini_s_h:
2964  case Mips::BI__builtin_msa_mini_s_w:
2965  case Mips::BI__builtin_msa_mini_s_d: i = 1; l = -16; u = 15; break;
2966  // These intrinsics take an unsigned 8 bit immediate.
2967  case Mips::BI__builtin_msa_andi_b:
2968  case Mips::BI__builtin_msa_nori_b:
2969  case Mips::BI__builtin_msa_ori_b:
2970  case Mips::BI__builtin_msa_shf_b:
2971  case Mips::BI__builtin_msa_shf_h:
2972  case Mips::BI__builtin_msa_shf_w:
2973  case Mips::BI__builtin_msa_xori_b: i = 1; l = 0; u = 255; break;
2974  case Mips::BI__builtin_msa_bseli_b:
2975  case Mips::BI__builtin_msa_bmnzi_b:
2976  case Mips::BI__builtin_msa_bmzi_b: i = 2; l = 0; u = 255; break;
2977  // df/n format
2978  // These intrinsics take an unsigned 4 bit immediate.
2979  case Mips::BI__builtin_msa_copy_s_b:
2980  case Mips::BI__builtin_msa_copy_u_b:
2981  case Mips::BI__builtin_msa_insve_b:
2982  case Mips::BI__builtin_msa_splati_b: i = 1; l = 0; u = 15; break;
2983  case Mips::BI__builtin_msa_sldi_b: i = 2; l = 0; u = 15; break;
2984  // These intrinsics take an unsigned 3 bit immediate.
2985  case Mips::BI__builtin_msa_copy_s_h:
2986  case Mips::BI__builtin_msa_copy_u_h:
2987  case Mips::BI__builtin_msa_insve_h:
2988  case Mips::BI__builtin_msa_splati_h: i = 1; l = 0; u = 7; break;
2989  case Mips::BI__builtin_msa_sldi_h: i = 2; l = 0; u = 7; break;
2990  // These intrinsics take an unsigned 2 bit immediate.
2991  case Mips::BI__builtin_msa_copy_s_w:
2992  case Mips::BI__builtin_msa_copy_u_w:
2993  case Mips::BI__builtin_msa_insve_w:
2994  case Mips::BI__builtin_msa_splati_w: i = 1; l = 0; u = 3; break;
2995  case Mips::BI__builtin_msa_sldi_w: i = 2; l = 0; u = 3; break;
2996  // These intrinsics take an unsigned 1 bit immediate.
2997  case Mips::BI__builtin_msa_copy_s_d:
2998  case Mips::BI__builtin_msa_copy_u_d:
2999  case Mips::BI__builtin_msa_insve_d:
3000  case Mips::BI__builtin_msa_splati_d: i = 1; l = 0; u = 1; break;
3001  case Mips::BI__builtin_msa_sldi_d: i = 2; l = 0; u = 1; break;
3002  // Memory offsets and immediate loads.
3003  // These intrinsics take a signed 10 bit immediate.
3004  case Mips::BI__builtin_msa_ldi_b: i = 0; l = -128; u = 255; break;
3005  case Mips::BI__builtin_msa_ldi_h:
3006  case Mips::BI__builtin_msa_ldi_w:
3007  case Mips::BI__builtin_msa_ldi_d: i = 0; l = -512; u = 511; break;
3008  case Mips::BI__builtin_msa_ld_b: i = 1; l = -512; u = 511; m = 1; break;
3009  case Mips::BI__builtin_msa_ld_h: i = 1; l = -1024; u = 1022; m = 2; break;
3010  case Mips::BI__builtin_msa_ld_w: i = 1; l = -2048; u = 2044; m = 4; break;
3011  case Mips::BI__builtin_msa_ld_d: i = 1; l = -4096; u = 4088; m = 8; break;
3012  case Mips::BI__builtin_msa_st_b: i = 2; l = -512; u = 511; m = 1; break;
3013  case Mips::BI__builtin_msa_st_h: i = 2; l = -1024; u = 1022; m = 2; break;
3014  case Mips::BI__builtin_msa_st_w: i = 2; l = -2048; u = 2044; m = 4; break;
3015  case Mips::BI__builtin_msa_st_d: i = 2; l = -4096; u = 4088; m = 8; break;
3016  }
3017 
3018  if (!m)
3019  return SemaBuiltinConstantArgRange(TheCall, i, l, u);
3020 
3021  return SemaBuiltinConstantArgRange(TheCall, i, l, u) ||
3022  SemaBuiltinConstantArgMultiple(TheCall, i, m);
3023 }
3024 
3025 bool Sema::CheckPPCBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall) {
3026  unsigned i = 0, l = 0, u = 0;
3027  bool Is64BitBltin = BuiltinID == PPC::BI__builtin_divde ||
3028  BuiltinID == PPC::BI__builtin_divdeu ||
3029  BuiltinID == PPC::BI__builtin_bpermd;
3030  bool IsTarget64Bit = Context.getTargetInfo()
3031  .getTypeWidth(Context
3032  .getTargetInfo()
3033  .getIntPtrType()) == 64;
3034  bool IsBltinExtDiv = BuiltinID == PPC::BI__builtin_divwe ||
3035  BuiltinID == PPC::BI__builtin_divweu ||
3036  BuiltinID == PPC::BI__builtin_divde ||
3037  BuiltinID == PPC::BI__builtin_divdeu;
3038 
3039  if (Is64BitBltin && !IsTarget64Bit)
3040  return Diag(TheCall->getBeginLoc(), diag::err_64_bit_builtin_32_bit_tgt)
3041  << TheCall->getSourceRange();
3042 
3043  if ((IsBltinExtDiv && !Context.getTargetInfo().hasFeature("extdiv")) ||
3044  (BuiltinID == PPC::BI__builtin_bpermd &&
3045  !Context.getTargetInfo().hasFeature("bpermd")))
3046  return Diag(TheCall->getBeginLoc(), diag::err_ppc_builtin_only_on_pwr7)
3047  << TheCall->getSourceRange();
3048 
3049  auto SemaVSXCheck = [&](CallExpr *TheCall) -> bool {
3050  if (!Context.getTargetInfo().hasFeature("vsx"))
3051  return Diag(TheCall->getBeginLoc(), diag::err_ppc_builtin_only_on_pwr7)
3052  << TheCall->getSourceRange();
3053  return false;
3054  };
3055 
3056  switch (BuiltinID) {
3057  default: return false;
3058  case PPC::BI__builtin_altivec_crypto_vshasigmaw:
3059  case PPC::BI__builtin_altivec_crypto_vshasigmad:
3060  return SemaBuiltinConstantArgRange(TheCall, 1, 0, 1) ||
3061  SemaBuiltinConstantArgRange(TheCall, 2, 0, 15);
3062  case PPC::BI__builtin_tbegin:
3063  case PPC::BI__builtin_tend: i = 0; l = 0; u = 1; break;
3064  case PPC::BI__builtin_tsr: i = 0; l = 0; u = 7; break;
3065  case PPC::BI__builtin_tabortwc:
3066  case PPC::BI__builtin_tabortdc: i = 0; l = 0; u = 31; break;
3067  case PPC::BI__builtin_tabortwci:
3068  case PPC::BI__builtin_tabortdci:
3069  return SemaBuiltinConstantArgRange(TheCall, 0, 0, 31) ||
3070  SemaBuiltinConstantArgRange(TheCall, 2, 0, 31);
3071  case PPC::BI__builtin_vsx_xxpermdi:
3072  case PPC::BI__builtin_vsx_xxsldwi:
3073  return SemaBuiltinVSX(TheCall);
3074  case PPC::BI__builtin_unpack_vector_int128:
3075  return SemaVSXCheck(TheCall) ||
3076  SemaBuiltinConstantArgRange(TheCall, 1, 0, 1);
3077  case PPC::BI__builtin_pack_vector_int128:
3078  return SemaVSXCheck(TheCall);
3079  }
3080  return SemaBuiltinConstantArgRange(TheCall, i, l, u);
3081 }
3082 
3083 bool Sema::CheckSystemZBuiltinFunctionCall(unsigned BuiltinID,
3084  CallExpr *TheCall) {
3085  if (BuiltinID == SystemZ::BI__builtin_tabort) {
3086  Expr *Arg = TheCall->getArg(0);
3087  llvm::APSInt AbortCode(32);
3088  if (Arg->isIntegerConstantExpr(AbortCode, Context) &&
3089  AbortCode.getSExtValue() >= 0 && AbortCode.getSExtValue() < 256)
3090  return Diag(Arg->getBeginLoc(), diag::err_systemz_invalid_tabort_code)
3091  << Arg->getSourceRange();
3092  }
3093 
3094  // For intrinsics which take an immediate value as part of the instruction,
3095  // range check them here.
3096  unsigned i = 0, l = 0, u = 0;
3097  switch (BuiltinID) {
3098  default: return false;
3099  case SystemZ::BI__builtin_s390_lcbb: i = 1; l = 0; u = 15; break;
3100  case SystemZ::BI__builtin_s390_verimb:
3101  case SystemZ::BI__builtin_s390_verimh:
3102  case SystemZ::BI__builtin_s390_verimf:
3103  case SystemZ::BI__builtin_s390_verimg: i = 3; l = 0; u = 255; break;
3104  case SystemZ::BI__builtin_s390_vfaeb:
3105  case SystemZ::BI__builtin_s390_vfaeh:
3106  case SystemZ::BI__builtin_s390_vfaef:
3107  case SystemZ::BI__builtin_s390_vfaebs:
3108  case SystemZ::BI__builtin_s390_vfaehs:
3109  case SystemZ::BI__builtin_s390_vfaefs:
3110  case SystemZ::BI__builtin_s390_vfaezb:
3111  case SystemZ::BI__builtin_s390_vfaezh:
3112  case SystemZ::BI__builtin_s390_vfaezf:
3113  case SystemZ::BI__builtin_s390_vfaezbs:
3114  case SystemZ::BI__builtin_s390_vfaezhs:
3115  case SystemZ::BI__builtin_s390_vfaezfs: i = 2; l = 0; u = 15; break;
3116  case SystemZ::BI__builtin_s390_vfisb:
3117  case SystemZ::BI__builtin_s390_vfidb:
3118  return SemaBuiltinConstantArgRange(TheCall, 1, 0, 15) ||
3119  SemaBuiltinConstantArgRange(TheCall, 2, 0, 15);
3120  case SystemZ::BI__builtin_s390_vftcisb:
3121  case SystemZ::BI__builtin_s390_vftcidb: i = 1; l = 0; u = 4095; break;
3122  case SystemZ::BI__builtin_s390_vlbb: i = 1; l = 0; u = 15; break;
3123  case SystemZ::BI__builtin_s390_vpdi: i = 2; l = 0; u = 15; break;
3124  case SystemZ::BI__builtin_s390_vsldb: i = 2; l = 0; u = 15; break;
3125  case SystemZ::BI__builtin_s390_vstrcb:
3126  case SystemZ::BI__builtin_s390_vstrch:
3127  case SystemZ::BI__builtin_s390_vstrcf:
3128  case SystemZ::BI__builtin_s390_vstrczb:
3129  case SystemZ::BI__builtin_s390_vstrczh:
3130  case SystemZ::BI__builtin_s390_vstrczf:
3131  case SystemZ::BI__builtin_s390_vstrcbs:
3132  case SystemZ::BI__builtin_s390_vstrchs:
3133  case SystemZ::BI__builtin_s390_vstrcfs:
3134  case SystemZ::BI__builtin_s390_vstrczbs:
3135  case SystemZ::BI__builtin_s390_vstrczhs:
3136  case SystemZ::BI__builtin_s390_vstrczfs: i = 3; l = 0; u = 15; break;
3137  case SystemZ::BI__builtin_s390_vmslg: i = 3; l = 0; u = 15; break;
3138  case SystemZ::BI__builtin_s390_vfminsb:
3139  case SystemZ::BI__builtin_s390_vfmaxsb:
3140  case SystemZ::BI__builtin_s390_vfmindb:
3141  case SystemZ::BI__builtin_s390_vfmaxdb: i = 2; l = 0; u = 15; break;
3142  }
3143  return SemaBuiltinConstantArgRange(TheCall, i, l, u);
3144 }
3145 
3146 /// SemaBuiltinCpuSupports - Handle __builtin_cpu_supports(char *).
3147 /// This checks that the target supports __builtin_cpu_supports and
3148 /// that the string argument is constant and valid.
3149 static bool SemaBuiltinCpuSupports(Sema &S, CallExpr *TheCall) {
3150  Expr *Arg = TheCall->getArg(0);
3151 
3152  // Check if the argument is a string literal.
3153  if (!isa<StringLiteral>(Arg->IgnoreParenImpCasts()))
3154  return S.Diag(TheCall->getBeginLoc(), diag::err_expr_not_string_literal)
3155  << Arg->getSourceRange();
3156 
3157  // Check the contents of the string.
3158  StringRef Feature =
3159  cast<StringLiteral>(Arg->IgnoreParenImpCasts())->getString();
3160  if (!S.Context.getTargetInfo().validateCpuSupports(Feature))
3161  return S.Diag(TheCall->getBeginLoc(), diag::err_invalid_cpu_supports)
3162  << Arg->getSourceRange();
3163  return false;
3164 }
3165 
3166 /// SemaBuiltinCpuIs - Handle __builtin_cpu_is(char *).
3167 /// This checks that the target supports __builtin_cpu_is and
3168 /// that the string argument is constant and valid.
3169 static bool SemaBuiltinCpuIs(Sema &S, CallExpr *TheCall) {
3170  Expr *Arg = TheCall->getArg(0);
3171 
3172  // Check if the argument is a string literal.
3173  if (!isa<StringLiteral>(Arg->IgnoreParenImpCasts()))
3174  return S.Diag(TheCall->getBeginLoc(), diag::err_expr_not_string_literal)
3175  << Arg->getSourceRange();
3176 
3177  // Check the contents of the string.
3178  StringRef Feature =
3179  cast<StringLiteral>(Arg->IgnoreParenImpCasts())->getString();
3180  if (!S.Context.getTargetInfo().validateCpuIs(Feature))
3181  return S.Diag(TheCall->getBeginLoc(), diag::err_invalid_cpu_is)
3182  << Arg->getSourceRange();
3183  return false;
3184 }
3185 
3186 // Check if the rounding mode is legal.
3187 bool Sema::CheckX86BuiltinRoundingOrSAE(unsigned BuiltinID, CallExpr *TheCall) {
3188  // Indicates if this instruction has rounding control or just SAE.
3189  bool HasRC = false;
3190 
3191  unsigned ArgNum = 0;
3192  switch (BuiltinID) {
3193  default:
3194  return false;
3195  case X86::BI__builtin_ia32_vcvttsd2si32:
3196  case X86::BI__builtin_ia32_vcvttsd2si64:
3197  case X86::BI__builtin_ia32_vcvttsd2usi32:
3198  case X86::BI__builtin_ia32_vcvttsd2usi64:
3199  case X86::BI__builtin_ia32_vcvttss2si32:
3200  case X86::BI__builtin_ia32_vcvttss2si64:
3201  case X86::BI__builtin_ia32_vcvttss2usi32:
3202  case X86::BI__builtin_ia32_vcvttss2usi64:
3203  ArgNum = 1;
3204  break;
3205  case X86::BI__builtin_ia32_maxpd512:
3206  case X86::BI__builtin_ia32_maxps512:
3207  case X86::BI__builtin_ia32_minpd512:
3208  case X86::BI__builtin_ia32_minps512:
3209  ArgNum = 2;
3210  break;
3211  case X86::BI__builtin_ia32_cvtps2pd512_mask:
3212  case X86::BI__builtin_ia32_cvttpd2dq512_mask:
3213  case X86::BI__builtin_ia32_cvttpd2qq512_mask:
3214  case X86::BI__builtin_ia32_cvttpd2udq512_mask:
3215  case X86::BI__builtin_ia32_cvttpd2uqq512_mask:
3216  case X86::BI__builtin_ia32_cvttps2dq512_mask:
3217  case X86::BI__builtin_ia32_cvttps2qq512_mask:
3218  case X86::BI__builtin_ia32_cvttps2udq512_mask:
3219  case X86::BI__builtin_ia32_cvttps2uqq512_mask:
3220  case X86::BI__builtin_ia32_exp2pd_mask:
3221  case X86::BI__builtin_ia32_exp2ps_mask:
3222  case X86::BI__builtin_ia32_getexppd512_mask:
3223  case X86::BI__builtin_ia32_getexpps512_mask:
3224  case X86::BI__builtin_ia32_rcp28pd_mask:
3225  case X86::BI__builtin_ia32_rcp28ps_mask:
3226  case X86::BI__builtin_ia32_rsqrt28pd_mask:
3227  case X86::BI__builtin_ia32_rsqrt28ps_mask:
3228  case X86::BI__builtin_ia32_vcomisd:
3229  case X86::BI__builtin_ia32_vcomiss:
3230  case X86::BI__builtin_ia32_vcvtph2ps512_mask:
3231  ArgNum = 3;
3232  break;
3233  case X86::BI__builtin_ia32_cmppd512_mask:
3234  case X86::BI__builtin_ia32_cmpps512_mask:
3235  case X86::BI__builtin_ia32_cmpsd_mask:
3236  case X86::BI__builtin_ia32_cmpss_mask:
3237  case X86::BI__builtin_ia32_cvtss2sd_round_mask:
3238  case X86::BI__builtin_ia32_getexpsd128_round_mask:
3239  case X86::BI__builtin_ia32_getexpss128_round_mask:
3240  case X86::BI__builtin_ia32_maxsd_round_mask:
3241  case X86::BI__builtin_ia32_maxss_round_mask:
3242  case X86::BI__builtin_ia32_minsd_round_mask:
3243  case X86::BI__builtin_ia32_minss_round_mask:
3244  case X86::BI__builtin_ia32_rcp28sd_round_mask:
3245  case X86::BI__builtin_ia32_rcp28ss_round_mask:
3246  case X86::BI__builtin_ia32_reducepd512_mask:
3247  case X86::BI__builtin_ia32_reduceps512_mask:
3248  case X86::BI__builtin_ia32_rndscalepd_mask:
3249  case X86::BI__builtin_ia32_rndscaleps_mask:
3250  case X86::BI__builtin_ia32_rsqrt28sd_round_mask:
3251  case X86::BI__builtin_ia32_rsqrt28ss_round_mask:
3252  ArgNum = 4;
3253  break;
3254  case X86::BI__builtin_ia32_fixupimmpd512_mask:
3255  case X86::BI__builtin_ia32_fixupimmpd512_maskz:
3256  case X86::BI__builtin_ia32_fixupimmps512_mask:
3257  case X86::BI__builtin_ia32_fixupimmps512_maskz:
3258  case X86::BI__builtin_ia32_fixupimmsd_mask:
3259  case X86::BI__builtin_ia32_fixupimmsd_maskz:
3260  case X86::BI__builtin_ia32_fixupimmss_mask:
3261  case X86::BI__builtin_ia32_fixupimmss_maskz:
3262  case X86::BI__builtin_ia32_rangepd512_mask:
3263  case X86::BI__builtin_ia32_rangeps512_mask:
3264  case X86::BI__builtin_ia32_rangesd128_round_mask:
3265  case X86::BI__builtin_ia32_rangess128_round_mask:
3266  case X86::BI__builtin_ia32_reducesd_mask:
3267  case X86::BI__builtin_ia32_reducess_mask:
3268  case X86::BI__builtin_ia32_rndscalesd_round_mask:
3269  case X86::BI__builtin_ia32_rndscaless_round_mask:
3270  ArgNum = 5;
3271  break;
3272  case X86::BI__builtin_ia32_vcvtsd2si64:
3273  case X86::BI__builtin_ia32_vcvtsd2si32:
3274  case X86::BI__builtin_ia32_vcvtsd2usi32:
3275  case X86::BI__builtin_ia32_vcvtsd2usi64:
3276  case X86::BI__builtin_ia32_vcvtss2si32:
3277  case X86::BI__builtin_ia32_vcvtss2si64:
3278  case X86::BI__builtin_ia32_vcvtss2usi32:
3279  case X86::BI__builtin_ia32_vcvtss2usi64:
3280  case X86::BI__builtin_ia32_sqrtpd512:
3281  case X86::BI__builtin_ia32_sqrtps512:
3282  ArgNum = 1;
3283  HasRC = true;
3284  break;
3285  case X86::BI__builtin_ia32_addpd512:
3286  case X86::BI__builtin_ia32_addps512:
3287  case X86::BI__builtin_ia32_divpd512:
3288  case X86::BI__builtin_ia32_divps512:
3289  case X86::BI__builtin_ia32_mulpd512:
3290  case X86::BI__builtin_ia32_mulps512:
3291  case X86::BI__builtin_ia32_subpd512:
3292  case X86::BI__builtin_ia32_subps512:
3293  case X86::BI__builtin_ia32_cvtsi2sd64:
3294  case X86::BI__builtin_ia32_cvtsi2ss32:
3295  case X86::BI__builtin_ia32_cvtsi2ss64:
3296  case X86::BI__builtin_ia32_cvtusi2sd64:
3297  case X86::BI__builtin_ia32_cvtusi2ss32:
3298  case X86::BI__builtin_ia32_cvtusi2ss64:
3299  ArgNum = 2;
3300  HasRC = true;
3301  break;
3302  case X86::BI__builtin_ia32_cvtdq2ps512_mask:
3303  case X86::BI__builtin_ia32_cvtudq2ps512_mask:
3304  case X86::BI__builtin_ia32_cvtpd2ps512_mask:
3305  case X86::BI__builtin_ia32_cvtpd2qq512_mask:
3306  case X86::BI__builtin_ia32_cvtpd2uqq512_mask:
3307  case X86::BI__builtin_ia32_cvtps2qq512_mask:
3308  case X86::BI__builtin_ia32_cvtps2uqq512_mask:
3309  case X86::BI__builtin_ia32_cvtqq2pd512_mask:
3310  case X86::BI__builtin_ia32_cvtqq2ps512_mask:
3311  case X86::BI__builtin_ia32_cvtuqq2pd512_mask:
3312  case X86::BI__builtin_ia32_cvtuqq2ps512_mask:
3313  ArgNum = 3;
3314  HasRC = true;
3315  break;
3316  case X86::BI__builtin_ia32_addss_round_mask:
3317  case X86::BI__builtin_ia32_addsd_round_mask:
3318  case X86::BI__builtin_ia32_divss_round_mask:
3319  case X86::BI__builtin_ia32_divsd_round_mask:
3320  case X86::BI__builtin_ia32_mulss_round_mask:
3321  case X86::BI__builtin_ia32_mulsd_round_mask:
3322  case X86::BI__builtin_ia32_subss_round_mask:
3323  case X86::BI__builtin_ia32_subsd_round_mask:
3324  case X86::BI__builtin_ia32_scalefpd512_mask:
3325  case X86::BI__builtin_ia32_scalefps512_mask:
3326  case X86::BI__builtin_ia32_scalefsd_round_mask:
3327  case X86::BI__builtin_ia32_scalefss_round_mask:
3328  case X86::BI__builtin_ia32_getmantpd512_mask:
3329  case X86::BI__builtin_ia32_getmantps512_mask:
3330  case X86::BI__builtin_ia32_cvtsd2ss_round_mask:
3331  case X86::BI__builtin_ia32_sqrtsd_round_mask:
3332  case X86::BI__builtin_ia32_sqrtss_round_mask:
3333  case X86::BI__builtin_ia32_vfmaddsd3_mask:
3334  case X86::BI__builtin_ia32_vfmaddsd3_maskz:
3335  case X86::BI__builtin_ia32_vfmaddsd3_mask3:
3336  case X86::BI__builtin_ia32_vfmaddss3_mask:
3337  case X86::BI__builtin_ia32_vfmaddss3_maskz:
3338  case X86::BI__builtin_ia32_vfmaddss3_mask3:
3339  case X86::BI__builtin_ia32_vfmaddpd512_mask:
3340  case X86::BI__builtin_ia32_vfmaddpd512_maskz:
3341  case X86::BI__builtin_ia32_vfmaddpd512_mask3:
3342  case X86::BI__builtin_ia32_vfmsubpd512_mask3:
3343  case X86::BI__builtin_ia32_vfmaddps512_mask:
3344  case X86::BI__builtin_ia32_vfmaddps512_maskz:
3345  case X86::BI__builtin_ia32_vfmaddps512_mask3:
3346  case X86::BI__builtin_ia32_vfmsubps512_mask3:
3347  case X86::BI__builtin_ia32_vfmaddsubpd512_mask:
3348  case X86::BI__builtin_ia32_vfmaddsubpd512_maskz:
3349  case X86::BI__builtin_ia32_vfmaddsubpd512_mask3:
3350  case X86::BI__builtin_ia32_vfmsubaddpd512_mask3:
3351  case X86::BI__builtin_ia32_vfmaddsubps512_mask:
3352  case X86::BI__builtin_ia32_vfmaddsubps512_maskz:
3353  case X86::BI__builtin_ia32_vfmaddsubps512_mask3:
3354  case X86::BI__builtin_ia32_vfmsubaddps512_mask3:
3355  ArgNum = 4;
3356  HasRC = true;
3357  break;
3358  case X86::BI__builtin_ia32_getmantsd_round_mask:
3359  case X86::BI__builtin_ia32_getmantss_round_mask:
3360  ArgNum = 5;
3361  HasRC = true;
3362  break;
3363  }
3364 
3365  llvm::APSInt Result;
3366 
3367  // We can't check the value of a dependent argument.
3368  Expr *Arg = TheCall->getArg(ArgNum);
3369  if (Arg->isTypeDependent() || Arg->isValueDependent())
3370  return false;
3371 
3372  // Check constant-ness first.
3373  if (SemaBuiltinConstantArg(TheCall, ArgNum, Result))
3374  return true;
3375 
3376  // Make sure rounding mode is either ROUND_CUR_DIRECTION or ROUND_NO_EXC bit
3377  // is set. If the intrinsic has rounding control(bits 1:0), make sure its only
3378  // combined with ROUND_NO_EXC.
3379  if (Result == 4/*ROUND_CUR_DIRECTION*/ ||
3380  Result == 8/*ROUND_NO_EXC*/ ||
3381  (HasRC && Result.getZExtValue() >= 8 && Result.getZExtValue() <= 11))
3382  return false;
3383 
3384  return Diag(TheCall->getBeginLoc(), diag::err_x86_builtin_invalid_rounding)
3385  << Arg->getSourceRange();
3386 }
3387 
3388 // Check if the gather/scatter scale is legal.
3389 bool Sema::CheckX86BuiltinGatherScatterScale(unsigned BuiltinID,
3390  CallExpr *TheCall) {
3391  unsigned ArgNum = 0;
3392  switch (BuiltinID) {
3393  default:
3394  return false;
3395  case X86::BI__builtin_ia32_gatherpfdpd:
3396  case X86::BI__builtin_ia32_gatherpfdps:
3397  case X86::BI__builtin_ia32_gatherpfqpd:
3398  case X86::BI__builtin_ia32_gatherpfqps:
3399  case X86::BI__builtin_ia32_scatterpfdpd:
3400  case X86::BI__builtin_ia32_scatterpfdps:
3401  case X86::BI__builtin_ia32_scatterpfqpd:
3402  case X86::BI__builtin_ia32_scatterpfqps:
3403  ArgNum = 3;
3404  break;
3405  case X86::BI__builtin_ia32_gatherd_pd:
3406  case X86::BI__builtin_ia32_gatherd_pd256:
3407  case X86::BI__builtin_ia32_gatherq_pd:
3408  case X86::BI__builtin_ia32_gatherq_pd256:
3409  case X86::BI__builtin_ia32_gatherd_ps:
3410  case X86::BI__builtin_ia32_gatherd_ps256:
3411  case X86::BI__builtin_ia32_gatherq_ps:
3412  case X86::BI__builtin_ia32_gatherq_ps256:
3413  case X86::BI__builtin_ia32_gatherd_q:
3414  case X86::BI__builtin_ia32_gatherd_q256:
3415  case X86::BI__builtin_ia32_gatherq_q:
3416  case X86::BI__builtin_ia32_gatherq_q256:
3417  case X86::BI__builtin_ia32_gatherd_d:
3418  case X86::BI__builtin_ia32_gatherd_d256:
3419  case X86::BI__builtin_ia32_gatherq_d:
3420  case X86::BI__builtin_ia32_gatherq_d256:
3421  case X86::BI__builtin_ia32_gather3div2df:
3422  case X86::BI__builtin_ia32_gather3div2di:
3423  case X86::BI__builtin_ia32_gather3div4df:
3424  case X86::BI__builtin_ia32_gather3div4di:
3425  case X86::BI__builtin_ia32_gather3div4sf:
3426  case X86::BI__builtin_ia32_gather3div4si:
3427  case X86::BI__builtin_ia32_gather3div8sf:
3428  case X86::BI__builtin_ia32_gather3div8si:
3429  case X86::BI__builtin_ia32_gather3siv2df:
3430  case X86::BI__builtin_ia32_gather3siv2di:
3431  case X86::BI__builtin_ia32_gather3siv4df:
3432  case X86::BI__builtin_ia32_gather3siv4di:
3433  case X86::BI__builtin_ia32_gather3siv4sf:
3434  case X86::BI__builtin_ia32_gather3siv4si:
3435  case X86::BI__builtin_ia32_gather3siv8sf:
3436  case X86::BI__builtin_ia32_gather3siv8si:
3437  case X86::BI__builtin_ia32_gathersiv8df:
3438  case X86::BI__builtin_ia32_gathersiv16sf:
3439  case X86::BI__builtin_ia32_gatherdiv8df:
3440  case X86::BI__builtin_ia32_gatherdiv16sf:
3441  case X86::BI__builtin_ia32_gathersiv8di:
3442  case X86::BI__builtin_ia32_gathersiv16si:
3443  case X86::BI__builtin_ia32_gatherdiv8di:
3444  case X86::BI__builtin_ia32_gatherdiv16si:
3445  case X86::BI__builtin_ia32_scatterdiv2df:
3446  case X86::BI__builtin_ia32_scatterdiv2di:
3447  case X86::BI__builtin_ia32_scatterdiv4df:
3448  case X86::BI__builtin_ia32_scatterdiv4di:
3449  case X86::BI__builtin_ia32_scatterdiv4sf:
3450  case X86::BI__builtin_ia32_scatterdiv4si:
3451  case X86::BI__builtin_ia32_scatterdiv8sf:
3452  case X86::BI__builtin_ia32_scatterdiv8si:
3453  case X86::BI__builtin_ia32_scattersiv2df:
3454  case X86::BI__builtin_ia32_scattersiv2di:
3455  case X86::BI__builtin_ia32_scattersiv4df:
3456  case X86::BI__builtin_ia32_scattersiv4di:
3457  case X86::BI__builtin_ia32_scattersiv4sf:
3458  case X86::BI__builtin_ia32_scattersiv4si:
3459  case X86::BI__builtin_ia32_scattersiv8sf:
3460  case X86::BI__builtin_ia32_scattersiv8si:
3461  case X86::BI__builtin_ia32_scattersiv8df:
3462  case X86::BI__builtin_ia32_scattersiv16sf:
3463  case X86::BI__builtin_ia32_scatterdiv8df:
3464  case X86::BI__builtin_ia32_scatterdiv16sf:
3465  case X86::BI__builtin_ia32_scattersiv8di:
3466  case X86::BI__builtin_ia32_scattersiv16si:
3467  case X86::BI__builtin_ia32_scatterdiv8di:
3468  case X86::BI__builtin_ia32_scatterdiv16si:
3469  ArgNum = 4;
3470  break;
3471  }
3472 
3473  llvm::APSInt Result;
3474 
3475  // We can't check the value of a dependent argument.
3476  Expr *Arg = TheCall->getArg(ArgNum);
3477  if (Arg->isTypeDependent() || Arg->isValueDependent())
3478  return false;
3479 
3480  // Check constant-ness first.
3481  if (SemaBuiltinConstantArg(TheCall, ArgNum, Result))
3482  return true;
3483 
3484  if (Result == 1 || Result == 2 || Result == 4 || Result == 8)
3485  return false;
3486 
3487  return Diag(TheCall->getBeginLoc(), diag::err_x86_builtin_invalid_scale)
3488  << Arg->getSourceRange();
3489 }
3490 
3491 static bool isX86_32Builtin(unsigned BuiltinID) {
3492  // These builtins only work on x86-32 targets.
3493  switch (BuiltinID) {
3494  case X86::BI__builtin_ia32_readeflags_u32:
3495  case X86::BI__builtin_ia32_writeeflags_u32:
3496  return true;
3497  }
3498 
3499  return false;
3500 }
3501 
3502 bool Sema::CheckX86BuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall) {
3503  if (BuiltinID == X86::BI__builtin_cpu_supports)
3504  return SemaBuiltinCpuSupports(*this, TheCall);
3505 
3506  if (BuiltinID == X86::BI__builtin_cpu_is)
3507  return SemaBuiltinCpuIs(*this, TheCall);
3508 
3509  // Check for 32-bit only builtins on a 64-bit target.
3510  const llvm::Triple &TT = Context.getTargetInfo().getTriple();
3511  if (TT.getArch() != llvm::Triple::x86 && isX86_32Builtin(BuiltinID))
3512  return Diag(TheCall->getCallee()->getBeginLoc(),
3513  diag::err_32_bit_builtin_64_bit_tgt);
3514 
3515  // If the intrinsic has rounding or SAE make sure its valid.
3516  if (CheckX86BuiltinRoundingOrSAE(BuiltinID, TheCall))
3517  return true;
3518 
3519  // If the intrinsic has a gather/scatter scale immediate make sure its valid.
3520  if (CheckX86BuiltinGatherScatterScale(BuiltinID, TheCall))
3521  return true;
3522 
3523  // For intrinsics which take an immediate value as part of the instruction,
3524  // range check them here.
3525  int i = 0, l = 0, u = 0;
3526  switch (BuiltinID) {
3527  default:
3528  return false;
3529  case X86::BI__builtin_ia32_vec_ext_v2si:
3530  case X86::BI__builtin_ia32_vec_ext_v2di:
3531  case X86::BI__builtin_ia32_vextractf128_pd256:
3532  case X86::BI__builtin_ia32_vextractf128_ps256:
3533  case X86::BI__builtin_ia32_vextractf128_si256:
3534  case X86::BI__builtin_ia32_extract128i256:
3535  case X86::BI__builtin_ia32_extractf64x4_mask:
3536  case X86::BI__builtin_ia32_extracti64x4_mask:
3537  case X86::BI__builtin_ia32_extractf32x8_mask:
3538  case X86::BI__builtin_ia32_extracti32x8_mask:
3539  case X86::BI__builtin_ia32_extractf64x2_256_mask:
3540  case X86::BI__builtin_ia32_extracti64x2_256_mask:
3541  case X86::BI__builtin_ia32_extractf32x4_256_mask:
3542  case X86::BI__builtin_ia32_extracti32x4_256_mask:
3543  i = 1; l = 0; u = 1;
3544  break;
3545  case X86::BI__builtin_ia32_vec_set_v2di:
3546  case X86::BI__builtin_ia32_vinsertf128_pd256:
3547  case X86::BI__builtin_ia32_vinsertf128_ps256:
3548  case X86::BI__builtin_ia32_vinsertf128_si256:
3549  case X86::BI__builtin_ia32_insert128i256:
3550  case X86::BI__builtin_ia32_insertf32x8:
3551  case X86::BI__builtin_ia32_inserti32x8:
3552  case X86::BI__builtin_ia32_insertf64x4:
3553  case X86::BI__builtin_ia32_inserti64x4:
3554  case X86::BI__builtin_ia32_insertf64x2_256:
3555  case X86::BI__builtin_ia32_inserti64x2_256:
3556  case X86::BI__builtin_ia32_insertf32x4_256:
3557  case X86::BI__builtin_ia32_inserti32x4_256:
3558  i = 2; l = 0; u = 1;
3559  break;
3560  case X86::BI__builtin_ia32_vpermilpd:
3561  case X86::BI__builtin_ia32_vec_ext_v4hi:
3562  case X86::BI__builtin_ia32_vec_ext_v4si:
3563  case X86::BI__builtin_ia32_vec_ext_v4sf:
3564  case X86::BI__builtin_ia32_vec_ext_v4di:
3565  case X86::BI__builtin_ia32_extractf32x4_mask:
3566  case X86::BI__builtin_ia32_extracti32x4_mask:
3567  case X86::BI__builtin_ia32_extractf64x2_512_mask:
3568  case X86::BI__builtin_ia32_extracti64x2_512_mask:
3569  i = 1; l = 0; u = 3;
3570  break;
3571  case X86::BI_mm_prefetch:
3572  case X86::BI__builtin_ia32_vec_ext_v8hi:
3573  case X86::BI__builtin_ia32_vec_ext_v8si:
3574  i = 1; l = 0; u = 7;
3575  break;
3576  case X86::BI__builtin_ia32_sha1rnds4:
3577  case X86::BI__builtin_ia32_blendpd:
3578  case X86::BI__builtin_ia32_shufpd:
3579  case X86::BI__builtin_ia32_vec_set_v4hi:
3580  case X86::BI__builtin_ia32_vec_set_v4si:
3581  case X86::BI__builtin_ia32_vec_set_v4di:
3582  case X86::BI__builtin_ia32_shuf_f32x4_256:
3583  case X86::BI__builtin_ia32_shuf_f64x2_256:
3584  case X86::BI__builtin_ia32_shuf_i32x4_256:
3585  case X86::BI__builtin_ia32_shuf_i64x2_256:
3586  case X86::BI__builtin_ia32_insertf64x2_512:
3587  case X86::BI__builtin_ia32_inserti64x2_512:
3588  case X86::BI__builtin_ia32_insertf32x4:
3589  case X86::BI__builtin_ia32_inserti32x4:
3590  i = 2; l = 0; u = 3;
3591  break;
3592  case X86::BI__builtin_ia32_vpermil2pd:
3593  case X86::BI__builtin_ia32_vpermil2pd256:
3594  case X86::BI__builtin_ia32_vpermil2ps:
3595  case X86::BI__builtin_ia32_vpermil2ps256:
3596  i = 3; l = 0; u = 3;
3597  break;
3598  case X86::BI__builtin_ia32_cmpb128_mask:
3599  case X86::BI__builtin_ia32_cmpw128_mask:
3600  case X86::BI__builtin_ia32_cmpd128_mask:
3601  case X86::BI__builtin_ia32_cmpq128_mask:
3602  case X86::BI__builtin_ia32_cmpb256_mask:
3603  case X86::BI__builtin_ia32_cmpw256_mask:
3604  case X86::BI__builtin_ia32_cmpd256_mask:
3605  case X86::BI__builtin_ia32_cmpq256_mask:
3606  case X86::BI__builtin_ia32_cmpb512_mask:
3607  case X86::BI__builtin_ia32_cmpw512_mask:
3608  case X86::BI__builtin_ia32_cmpd512_mask:
3609  case X86::BI__builtin_ia32_cmpq512_mask:
3610  case X86::BI__builtin_ia32_ucmpb128_mask:
3611  case X86::BI__builtin_ia32_ucmpw128_mask:
3612  case X86::BI__builtin_ia32_ucmpd128_mask:
3613  case X86::BI__builtin_ia32_ucmpq128_mask:
3614  case X86::BI__builtin_ia32_ucmpb256_mask:
3615  case X86::BI__builtin_ia32_ucmpw256_mask:
3616  case X86::BI__builtin_ia32_ucmpd256_mask:
3617  case X86::BI__builtin_ia32_ucmpq256_mask:
3618  case X86::BI__builtin_ia32_ucmpb512_mask:
3619  case X86::BI__builtin_ia32_ucmpw512_mask:
3620  case X86::BI__builtin_ia32_ucmpd512_mask:
3621  case X86::BI__builtin_ia32_ucmpq512_mask:
3622  case X86::BI__builtin_ia32_vpcomub:
3623  case X86::BI__builtin_ia32_vpcomuw:
3624  case X86::BI__builtin_ia32_vpcomud:
3625  case X86::BI__builtin_ia32_vpcomuq:
3626  case X86::BI__builtin_ia32_vpcomb:
3627  case X86::BI__builtin_ia32_vpcomw:
3628  case X86::BI__builtin_ia32_vpcomd:
3629  case X86::BI__builtin_ia32_vpcomq:
3630  case X86::BI__builtin_ia32_vec_set_v8hi:
3631  case X86::BI__builtin_ia32_vec_set_v8si:
3632  i = 2; l = 0; u = 7;
3633  break;
3634  case X86::BI__builtin_ia32_vpermilpd256:
3635  case X86::BI__builtin_ia32_roundps:
3636  case X86::BI__builtin_ia32_roundpd:
3637  case X86::BI__builtin_ia32_roundps256:
3638  case X86::BI__builtin_ia32_roundpd256:
3639  case X86::BI__builtin_ia32_getmantpd128_mask:
3640  case X86::BI__builtin_ia32_getmantpd256_mask:
3641  case X86::BI__builtin_ia32_getmantps128_mask:
3642  case X86::BI__builtin_ia32_getmantps256_mask:
3643  case X86::BI__builtin_ia32_getmantpd512_mask:
3644  case X86::BI__builtin_ia32_getmantps512_mask:
3645  case X86::BI__builtin_ia32_vec_ext_v16qi:
3646  case X86::BI__builtin_ia32_vec_ext_v16hi:
3647  i = 1; l = 0; u = 15;
3648  break;
3649  case X86::BI__builtin_ia32_pblendd128:
3650  case X86::BI__builtin_ia32_blendps:
3651  case X86::BI__builtin_ia32_blendpd256:
3652  case X86::BI__builtin_ia32_shufpd256:
3653  case X86::BI__builtin_ia32_roundss:
3654  case X86::BI__builtin_ia32_roundsd:
3655  case X86::BI__builtin_ia32_rangepd128_mask:
3656  case X86::BI__builtin_ia32_rangepd256_mask:
3657  case X86::BI__builtin_ia32_rangepd512_mask:
3658  case X86::BI__builtin_ia32_rangeps128_mask:
3659  case X86::BI__builtin_ia32_rangeps256_mask:
3660  case X86::BI__builtin_ia32_rangeps512_mask:
3661  case X86::BI__builtin_ia32_getmantsd_round_mask:
3662  case X86::BI__builtin_ia32_getmantss_round_mask:
3663  case X86::BI__builtin_ia32_vec_set_v16qi:
3664  case X86::BI__builtin_ia32_vec_set_v16hi:
3665  i = 2; l = 0; u = 15;
3666  break;
3667  case X86::BI__builtin_ia32_vec_ext_v32qi:
3668  i = 1; l = 0; u = 31;
3669  break;
3670  case X86::BI__builtin_ia32_cmpps:
3671  case X86::BI__builtin_ia32_cmpss:
3672  case X86::BI__builtin_ia32_cmppd:
3673  case X86::BI__builtin_ia32_cmpsd:
3674  case X86::BI__builtin_ia32_cmpps256:
3675  case X86::BI__builtin_ia32_cmppd256:
3676  case X86::BI__builtin_ia32_cmpps128_mask:
3677  case X86::BI__builtin_ia32_cmppd128_mask:
3678  case X86::BI__builtin_ia32_cmpps256_mask:
3679  case X86::BI__builtin_ia32_cmppd256_mask:
3680  case X86::BI__builtin_ia32_cmpps512_mask:
3681  case X86::BI__builtin_ia32_cmppd512_mask:
3682  case X86::BI__builtin_ia32_cmpsd_mask:
3683  case X86::BI__builtin_ia32_cmpss_mask:
3684  case X86::BI__builtin_ia32_vec_set_v32qi:
3685  i = 2; l = 0; u = 31;
3686  break;
3687  case X86::BI__builtin_ia32_permdf256:
3688  case X86::BI__builtin_ia32_permdi256:
3689  case X86::BI__builtin_ia32_permdf512:
3690  case X86::BI__builtin_ia32_permdi512:
3691  case X86::BI__builtin_ia32_vpermilps:
3692  case X86::BI__builtin_ia32_vpermilps256:
3693  case X86::BI__builtin_ia32_vpermilpd512:
3694  case X86::BI__builtin_ia32_vpermilps512:
3695  case X86::BI__builtin_ia32_pshufd:
3696  case X86::BI__builtin_ia32_pshufd256:
3697  case X86::BI__builtin_ia32_pshufd512:
3698  case X86::BI__builtin_ia32_pshufhw:
3699  case X86::BI__builtin_ia32_pshufhw256:
3700  case X86::BI__builtin_ia32_pshufhw512:
3701  case X86::BI__builtin_ia32_pshuflw:
3702  case X86::BI__builtin_ia32_pshuflw256:
3703  case X86::BI__builtin_ia32_pshuflw512:
3704  case X86::BI__builtin_ia32_vcvtps2ph:
3705  case X86::BI__builtin_ia32_vcvtps2ph_mask:
3706  case X86::BI__builtin_ia32_vcvtps2ph256:
3707  case X86::BI__builtin_ia32_vcvtps2ph256_mask:
3708  case X86::BI__builtin_ia32_vcvtps2ph512_mask:
3709  case X86::BI__builtin_ia32_rndscaleps_128_mask:
3710  case X86::BI__builtin_ia32_rndscalepd_128_mask:
3711  case X86::BI__builtin_ia32_rndscaleps_256_mask:
3712  case X86::BI__builtin_ia32_rndscalepd_256_mask:
3713  case X86::BI__builtin_ia32_rndscaleps_mask:
3714  case X86::BI__builtin_ia32_rndscalepd_mask:
3715  case X86::BI__builtin_ia32_reducepd128_mask:
3716  case X86::BI__builtin_ia32_reducepd256_mask:
3717  case X86::BI__builtin_ia32_reducepd512_mask:
3718  case X86::BI__builtin_ia32_reduceps128_mask:
3719  case X86::BI__builtin_ia32_reduceps256_mask:
3720  case X86::BI__builtin_ia32_reduceps512_mask:
3721  case X86::BI__builtin_ia32_prold512:
3722  case X86::BI__builtin_ia32_prolq512:
3723  case X86::BI__builtin_ia32_prold128:
3724  case X86::BI__builtin_ia32_prold256:
3725  case X86::BI__builtin_ia32_prolq128:
3726  case X86::BI__builtin_ia32_prolq256:
3727  case X86::BI__builtin_ia32_prord512:
3728  case X86::BI__builtin_ia32_prorq512:
3729  case X86::BI__builtin_ia32_prord128:
3730  case X86::BI__builtin_ia32_prord256:
3731  case X86::BI__builtin_ia32_prorq128:
3732  case X86::BI__builtin_ia32_prorq256:
3733  case X86::BI__builtin_ia32_fpclasspd128_mask:
3734  case X86::BI__builtin_ia32_fpclasspd256_mask:
3735  case X86::BI__builtin_ia32_fpclassps128_mask:
3736  case X86::BI__builtin_ia32_fpclassps256_mask:
3737  case X86::BI__builtin_ia32_fpclassps512_mask:
3738  case X86::BI__builtin_ia32_fpclasspd512_mask:
3739  case X86::BI__builtin_ia32_fpclasssd_mask:
3740  case X86::BI__builtin_ia32_fpclassss_mask:
3741  case X86::BI__builtin_ia32_pslldqi128_byteshift:
3742  case X86::BI__builtin_ia32_pslldqi256_byteshift:
3743  case X86::BI__builtin_ia32_pslldqi512_byteshift:
3744  case X86::BI__builtin_ia32_psrldqi128_byteshift:
3745  case X86::BI__builtin_ia32_psrldqi256_byteshift:
3746  case X86::BI__builtin_ia32_psrldqi512_byteshift:
3747  case X86::BI__builtin_ia32_kshiftliqi:
3748  case X86::BI__builtin_ia32_kshiftlihi:
3749  case X86::BI__builtin_ia32_kshiftlisi:
3750  case X86::BI__builtin_ia32_kshiftlidi:
3751  case X86::BI__builtin_ia32_kshiftriqi:
3752  case X86::BI__builtin_ia32_kshiftrihi:
3753  case X86::BI__builtin_ia32_kshiftrisi:
3754  case X86::BI__builtin_ia32_kshiftridi:
3755  i = 1; l = 0; u = 255;
3756  break;
3757  case X86::BI__builtin_ia32_vperm2f128_pd256:
3758  case X86::BI__builtin_ia32_vperm2f128_ps256:
3759  case X86::BI__builtin_ia32_vperm2f128_si256:
3760  case X86::BI__builtin_ia32_permti256:
3761  case X86::BI__builtin_ia32_pblendw128:
3762  case X86::BI__builtin_ia32_pblendw256:
3763  case X86::BI__builtin_ia32_blendps256:
3764  case X86::BI__builtin_ia32_pblendd256:
3765  case X86::BI__builtin_ia32_palignr128:
3766  case X86::BI__builtin_ia32_palignr256:
3767  case X86::BI__builtin_ia32_palignr512:
3768  case X86::BI__builtin_ia32_alignq512:
3769  case X86::BI__builtin_ia32_alignd512:
3770  case X86::BI__builtin_ia32_alignd128:
3771  case X86::BI__builtin_ia32_alignd256:
3772  case X86::BI__builtin_ia32_alignq128:
3773  case X86::BI__builtin_ia32_alignq256:
3774  case X86::BI__builtin_ia32_vcomisd:
3775  case X86::BI__builtin_ia32_vcomiss:
3776  case X86::BI__builtin_ia32_shuf_f32x4:
3777  case X86::BI__builtin_ia32_shuf_f64x2:
3778  case X86::BI__builtin_ia32_shuf_i32x4:
3779  case X86::BI__builtin_ia32_shuf_i64x2:
3780  case X86::BI__builtin_ia32_shufpd512:
3781  case X86::BI__builtin_ia32_shufps:
3782  case X86::BI__builtin_ia32_shufps256:
3783  case X86::BI__builtin_ia32_shufps512:
3784  case X86::BI__builtin_ia32_dbpsadbw128:
3785  case X86::BI__builtin_ia32_dbpsadbw256:
3786  case X86::BI__builtin_ia32_dbpsadbw512:
3787  case X86::BI__builtin_ia32_vpshldd128:
3788  case X86::BI__builtin_ia32_vpshldd256:
3789  case X86::BI__builtin_ia32_vpshldd512:
3790  case X86::BI__builtin_ia32_vpshldq128:
3791  case X86::BI__builtin_ia32_vpshldq256:
3792  case X86::BI__builtin_ia32_vpshldq512:
3793  case X86::BI__builtin_ia32_vpshldw128:
3794  case X86::BI__builtin_ia32_vpshldw256:
3795  case X86::BI__builtin_ia32_vpshldw512:
3796  case X86::BI__builtin_ia32_vpshrdd128:
3797  case X86::BI__builtin_ia32_vpshrdd256:
3798  case X86::BI__builtin_ia32_vpshrdd512:
3799  case X86::BI__builtin_ia32_vpshrdq128:
3800  case X86::BI__builtin_ia32_vpshrdq256:
3801  case X86::BI__builtin_ia32_vpshrdq512:
3802  case X86::BI__builtin_ia32_vpshrdw128:
3803  case X86::BI__builtin_ia32_vpshrdw256:
3804  case X86::BI__builtin_ia32_vpshrdw512:
3805  i = 2; l = 0; u = 255;
3806  break;
3807  case X86::BI__builtin_ia32_fixupimmpd512_mask:
3808  case X86::BI__builtin_ia32_fixupimmpd512_maskz:
3809  case X86::BI__builtin_ia32_fixupimmps512_mask:
3810  case X86::BI__builtin_ia32_fixupimmps512_maskz:
3811  case X86::BI__builtin_ia32_fixupimmsd_mask:
3812  case X86::BI__builtin_ia32_fixupimmsd_maskz:
3813  case X86::BI__builtin_ia32_fixupimmss_mask:
3814  case X86::BI__builtin_ia32_fixupimmss_maskz:
3815  case X86::BI__builtin_ia32_fixupimmpd128_mask:
3816  case X86::BI__builtin_ia32_fixupimmpd128_maskz:
3817  case X86::BI__builtin_ia32_fixupimmpd256_mask:
3818  case X86::BI__builtin_ia32_fixupimmpd256_maskz:
3819  case X86::BI__builtin_ia32_fixupimmps128_mask:
3820  case X86::BI__builtin_ia32_fixupimmps128_maskz:
3821  case X86::BI__builtin_ia32_fixupimmps256_mask:
3822  case X86::BI__builtin_ia32_fixupimmps256_maskz:
3823  case X86::BI__builtin_ia32_pternlogd512_mask:
3824  case X86::BI__builtin_ia32_pternlogd512_maskz:
3825  case X86::BI__builtin_ia32_pternlogq512_mask:
3826  case X86::BI__builtin_ia32_pternlogq512_maskz:
3827  case X86::BI__builtin_ia32_pternlogd128_mask:
3828  case X86::BI__builtin_ia32_pternlogd128_maskz:
3829  case X86::BI__builtin_ia32_pternlogd256_mask:
3830  case X86::BI__builtin_ia32_pternlogd256_maskz:
3831  case X86::BI__builtin_ia32_pternlogq128_mask:
3832  case X86::BI__builtin_ia32_pternlogq128_maskz:
3833  case X86::BI__builtin_ia32_pternlogq256_mask:
3834  case X86::BI__builtin_ia32_pternlogq256_maskz:
3835  i = 3; l = 0; u = 255;
3836  break;
3837  case X86::BI__builtin_ia32_gatherpfdpd:
3838  case X86::BI__builtin_ia32_gatherpfdps:
3839  case X86::BI__builtin_ia32_gatherpfqpd:
3840  case X86::BI__builtin_ia32_gatherpfqps:
3841  case X86::BI__builtin_ia32_scatterpfdpd:
3842  case X86::BI__builtin_ia32_scatterpfdps:
3843  case X86::BI__builtin_ia32_scatterpfqpd:
3844  case X86::BI__builtin_ia32_scatterpfqps:
3845  i = 4; l = 2; u = 3;
3846  break;
3847  case X86::BI__builtin_ia32_rndscalesd_round_mask:
3848  case X86::BI__builtin_ia32_rndscaless_round_mask:
3849  i = 4; l = 0; u = 255;
3850  break;
3851  }
3852 
3853  // Note that we don't force a hard error on the range check here, allowing
3854  // template-generated or macro-generated dead code to potentially have out-of-
3855  // range values. These need to code generate, but don't need to necessarily
3856  // make any sense. We use a warning that defaults to an error.
3857  return SemaBuiltinConstantArgRange(TheCall, i, l, u, /*RangeIsError*/ false);
3858 }
3859 
3860 /// Given a FunctionDecl's FormatAttr, attempts to populate the FomatStringInfo
3861 /// parameter with the FormatAttr's correct format_idx and firstDataArg.
3862 /// Returns true when the format fits the function and the FormatStringInfo has
3863 /// been populated.
3864 bool Sema::getFormatStringInfo(const FormatAttr *Format, bool IsCXXMember,
3865  FormatStringInfo *FSI) {
3866  FSI->HasVAListArg = Format->getFirstArg() == 0;
3867  FSI->FormatIdx = Format->getFormatIdx() - 1;
3868  FSI->FirstDataArg = FSI->HasVAListArg ? 0 : Format->getFirstArg() - 1;
3869 
3870  // The way the format attribute works in GCC, the implicit this argument
3871  // of member functions is counted. However, it doesn't appear in our own
3872  // lists, so decrement format_idx in that case.
3873  if (IsCXXMember) {
3874  if(FSI->FormatIdx == 0)
3875  return false;
3876  --FSI->FormatIdx;
3877  if (FSI->FirstDataArg != 0)
3878  --FSI->FirstDataArg;
3879  }
3880  return true;
3881 }
3882 
3883 /// Checks if a the given expression evaluates to null.
3884 ///
3885 /// Returns true if the value evaluates to null.
3886 static bool CheckNonNullExpr(Sema &S, const Expr *Expr) {
3887  // If the expression has non-null type, it doesn't evaluate to null.
3888  if (auto nullability
3889  = Expr->IgnoreImplicit()->getType()->getNullability(S.Context)) {
3890  if (*nullability == NullabilityKind::NonNull)
3891  return false;
3892  }
3893 
3894  // As a special case, transparent unions initialized with zero are
3895  // considered null for the purposes of the nonnull attribute.
3896  if (const RecordType *UT = Expr->getType()->getAsUnionType()) {
3897  if (UT->getDecl()->hasAttr<TransparentUnionAttr>())
3898  if (const CompoundLiteralExpr *CLE =
3899  dyn_cast<CompoundLiteralExpr>(Expr))
3900  if (const InitListExpr *ILE =
3901  dyn_cast<InitListExpr>(CLE->getInitializer()))
3902  Expr = ILE->getInit(0);
3903  }
3904 
3905  bool Result;
3906  return (!Expr->isValueDependent() &&
3907  Expr->EvaluateAsBooleanCondition(Result, S.Context) &&
3908  !Result);
3909 }
3910 
3912  const Expr *ArgExpr,
3913  SourceLocation CallSiteLoc) {
3914  if (CheckNonNullExpr(S, ArgExpr))
3915  S.DiagRuntimeBehavior(CallSiteLoc, ArgExpr,
3916  S.PDiag(diag::warn_null_arg) << ArgExpr->getSourceRange());
3917 }
3918 
3919 bool Sema::GetFormatNSStringIdx(const FormatAttr *Format, unsigned &Idx) {
3920  FormatStringInfo FSI;
3921  if ((GetFormatStringType(Format) == FST_NSString) &&
3922  getFormatStringInfo(Format, false, &FSI)) {
3923  Idx = FSI.FormatIdx;
3924  return true;
3925  }
3926  return false;
3927 }
3928 
3929 /// Diagnose use of %s directive in an NSString which is being passed
3930 /// as formatting string to formatting method.
3931 static void
3933  const NamedDecl *FDecl,
3934  Expr **Args,
3935  unsigned NumArgs) {
3936  unsigned Idx = 0;
3937  bool Format = false;
3939  if (SFFamily == ObjCStringFormatFamily::SFF_CFString) {
3940  Idx = 2;
3941  Format = true;
3942  }
3943  else
3944  for (const auto *I : FDecl->specific_attrs<FormatAttr>()) {
3945  if (S.GetFormatNSStringIdx(I, Idx)) {
3946  Format = true;
3947  break;
3948  }
3949  }
3950  if (!Format || NumArgs <= Idx)
3951  return;
3952  const Expr *FormatExpr = Args[Idx];
3953  if (const CStyleCastExpr *CSCE = dyn_cast<CStyleCastExpr>(FormatExpr))
3954  FormatExpr = CSCE->getSubExpr();
3955  const StringLiteral *FormatString;
3956  if (const ObjCStringLiteral *OSL =
3957  dyn_cast<ObjCStringLiteral>(FormatExpr->IgnoreParenImpCasts()))
3958  FormatString = OSL->getString();
3959  else
3960  FormatString = dyn_cast<StringLiteral>(FormatExpr->IgnoreParenImpCasts());
3961  if (!FormatString)
3962  return;
3963  if (S.FormatStringHasSArg(FormatString)) {
3964  S.Diag(FormatExpr->getExprLoc(), diag::warn_objc_cdirective_format_string)
3965  << "%s" << 1 << 1;
3966  S.Diag(FDecl->getLocation(), diag::note_entity_declared_at)
3967  << FDecl->getDeclName();
3968  }
3969 }
3970 
3971 /// Determine whether the given type has a non-null nullability annotation.
3973  if (auto nullability = type->getNullability(ctx))
3974  return *nullability == NullabilityKind::NonNull;
3975 
3976  return false;
3977 }
3978 
3980  const NamedDecl *FDecl,
3981  const FunctionProtoType *Proto,
3982  ArrayRef<const Expr *> Args,
3983  SourceLocation CallSiteLoc) {
3984  assert((FDecl || Proto) && "Need a function declaration or prototype");
3985 
3986  // Check the attributes attached to the method/function itself.
3987  llvm::SmallBitVector NonNullArgs;
3988  if (FDecl) {
3989  // Handle the nonnull attribute on the function/method declaration itself.
3990  for (const auto *NonNull : FDecl->specific_attrs<NonNullAttr>()) {
3991  if (!NonNull->args_size()) {
3992  // Easy case: all pointer arguments are nonnull.
3993  for (const auto *Arg : Args)
3994  if (S.isValidPointerAttrType(Arg->getType()))
3995  CheckNonNullArgument(S, Arg, CallSiteLoc);
3996  return;
3997  }
3998 
3999  for (const ParamIdx &Idx : NonNull->args()) {
4000  unsigned IdxAST = Idx.getASTIndex();
4001  if (IdxAST >= Args.size())
4002  continue;
4003  if (NonNullArgs.empty())
4004  NonNullArgs.resize(Args.size());
4005  NonNullArgs.set(IdxAST);
4006  }
4007  }
4008  }
4009 
4010  if (FDecl && (isa<FunctionDecl>(FDecl) || isa<ObjCMethodDecl>(FDecl))) {
4011  // Handle the nonnull attribute on the parameters of the
4012  // function/method.
4013  ArrayRef<ParmVarDecl*> parms;
4014  if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(FDecl))
4015  parms = FD->parameters();
4016  else
4017  parms = cast<ObjCMethodDecl>(FDecl)->parameters();
4018 
4019  unsigned ParamIndex = 0;
4020  for (ArrayRef<ParmVarDecl*>::iterator I = parms.begin(), E = parms.end();
4021  I != E; ++I, ++ParamIndex) {
4022  const ParmVarDecl *PVD = *I;
4023  if (PVD->hasAttr<NonNullAttr>() ||
4024  isNonNullType(S.Context, PVD->getType())) {
4025  if (NonNullArgs.empty())
4026  NonNullArgs.resize(Args.size());
4027 
4028  NonNullArgs.set(ParamIndex);
4029  }
4030  }
4031  } else {
4032  // If we have a non-function, non-method declaration but no
4033  // function prototype, try to dig out the function prototype.
4034  if (!Proto) {
4035  if (const ValueDecl *VD = dyn_cast<ValueDecl>(FDecl)) {
4036  QualType type = VD->getType().getNonReferenceType();
4037  if (auto pointerType = type->getAs<PointerType>())
4038  type = pointerType->getPointeeType();
4039  else if (auto blockType = type->getAs<BlockPointerType>())
4040  type = blockType->getPointeeType();
4041  // FIXME: data member pointers?
4042 
4043  // Dig out the function prototype, if there is one.
4044  Proto = type->getAs<FunctionProtoType>();
4045  }
4046  }
4047 
4048  // Fill in non-null argument information from the nullability
4049  // information on the parameter types (if we have them).
4050  if (Proto) {
4051  unsigned Index = 0;
4052  for (auto paramType : Proto->getParamTypes()) {
4053  if (isNonNullType(S.Context, paramType)) {
4054  if (NonNullArgs.empty())
4055  NonNullArgs.resize(Args.size());
4056 
4057  NonNullArgs.set(Index);
4058  }
4059 
4060  ++Index;
4061  }
4062  }
4063  }
4064 
4065  // Check for non-null arguments.
4066  for (unsigned ArgIndex = 0, ArgIndexEnd = NonNullArgs.size();
4067  ArgIndex != ArgIndexEnd; ++ArgIndex) {
4068  if (NonNullArgs[ArgIndex])
4069  CheckNonNullArgument(S, Args[ArgIndex], CallSiteLoc);
4070  }
4071 }
4072 
4073 /// Handles the checks for format strings, non-POD arguments to vararg
4074 /// functions, NULL arguments passed to non-NULL parameters, and diagnose_if
4075 /// attributes.
4076 void Sema::checkCall(NamedDecl *FDecl, const FunctionProtoType *Proto,
4077  const Expr *ThisArg, ArrayRef<const Expr *> Args,
4078  bool IsMemberFunction, SourceLocation Loc,
4079  SourceRange Range, VariadicCallType CallType) {
4080  // FIXME: We should check as much as we can in the template definition.
4081  if (CurContext->isDependentContext())
4082  return;
4083 
4084  // Printf and scanf checking.
4085  llvm::SmallBitVector CheckedVarArgs;
4086  if (FDecl) {
4087  for (const auto *I : FDecl->specific_attrs<FormatAttr>()) {
4088  // Only create vector if there are format attributes.
4089  CheckedVarArgs.resize(Args.size());
4090 
4091  CheckFormatArguments(I, Args, IsMemberFunction, CallType, Loc, Range,
4092  CheckedVarArgs);
4093  }
4094  }
4095 
4096  // Refuse POD arguments that weren't caught by the format string
4097  // checks above.
4098  auto *FD = dyn_cast_or_null<FunctionDecl>(FDecl);
4099  if (CallType != VariadicDoesNotApply &&
4100  (!FD || FD->getBuiltinID() != Builtin::BI__noop)) {
4101  unsigned NumParams = Proto ? Proto->getNumParams()
4102  : FDecl && isa<FunctionDecl>(FDecl)
4103  ? cast<FunctionDecl>(FDecl)->getNumParams()
4104  : FDecl && isa<ObjCMethodDecl>(FDecl)
4105  ? cast<ObjCMethodDecl>(FDecl)->param_size()
4106  : 0;
4107 
4108  for (unsigned ArgIdx = NumParams; ArgIdx < Args.size(); ++ArgIdx) {
4109  // Args[ArgIdx] can be null in malformed code.
4110  if (const Expr *Arg = Args[ArgIdx]) {
4111  if (CheckedVarArgs.empty() || !CheckedVarArgs[ArgIdx])
4112  checkVariadicArgument(Arg, CallType);
4113  }
4114  }
4115  }
4116 
4117  if (FDecl || Proto) {
4118  CheckNonNullArguments(*this, FDecl, Proto, Args, Loc);
4119 
4120  // Type safety checking.
4121  if (FDecl) {
4122  for (const auto *I : FDecl->specific_attrs<ArgumentWithTypeTagAttr>())
4123  CheckArgumentWithTypeTag(I, Args, Loc);
4124  }
4125  }
4126 
4127  if (FD)
4128  diagnoseArgDependentDiagnoseIfAttrs(FD, ThisArg, Args, Loc);
4129 }
4130 
4131 /// CheckConstructorCall - Check a constructor call for correctness and safety
4132 /// properties not enforced by the C type system.
4133 void Sema::CheckConstructorCall(FunctionDecl *FDecl,
4134  ArrayRef<const Expr *> Args,
4135  const FunctionProtoType *Proto,
4136  SourceLocation Loc) {
4137  VariadicCallType CallType =
4138  Proto->isVariadic() ? VariadicConstructor : VariadicDoesNotApply;
4139  checkCall(FDecl, Proto, /*ThisArg=*/nullptr, Args, /*IsMemberFunction=*/true,
4140  Loc, SourceRange(), CallType);
4141 }
4142 
4143 /// CheckFunctionCall - Check a direct function call for various correctness
4144 /// and safety properties not strictly enforced by the C type system.
4145 bool Sema::CheckFunctionCall(FunctionDecl *FDecl, CallExpr *TheCall,
4146  const FunctionProtoType *Proto) {
4147  bool IsMemberOperatorCall = isa<CXXOperatorCallExpr>(TheCall) &&
4148  isa<CXXMethodDecl>(FDecl);
4149  bool IsMemberFunction = isa<CXXMemberCallExpr>(TheCall) ||
4150  IsMemberOperatorCall;
4151  VariadicCallType CallType = getVariadicCallType(FDecl, Proto,
4152  TheCall->getCallee());
4153  Expr** Args = TheCall->getArgs();
4154  unsigned NumArgs = TheCall->getNumArgs();
4155 
4156  Expr *ImplicitThis = nullptr;
4157  if (IsMemberOperatorCall) {
4158  // If this is a call to a member operator, hide the first argument
4159  // from checkCall.
4160  // FIXME: Our choice of AST representation here is less than ideal.
4161  ImplicitThis = Args[0];
4162  ++Args;
4163  --NumArgs;
4164  } else if (IsMemberFunction)
4165  ImplicitThis =
4166  cast<CXXMemberCallExpr>(TheCall)->getImplicitObjectArgument();
4167 
4168  checkCall(FDecl, Proto, ImplicitThis, llvm::makeArrayRef(Args, NumArgs),
4169  IsMemberFunction, TheCall->getRParenLoc(),
4170  TheCall->getCallee()->getSourceRange(), CallType);
4171 
4172  IdentifierInfo *FnInfo = FDecl->getIdentifier();
4173  // None of the checks below are needed for functions that don't have
4174  // simple names (e.g., C++ conversion functions).
4175  if (!FnInfo)
4176  return false;
4177 
4178  CheckAbsoluteValueFunction(TheCall, FDecl);
4179  CheckMaxUnsignedZero(TheCall, FDecl);
4180 
4181  if (getLangOpts().ObjC)
4182  DiagnoseCStringFormatDirectiveInCFAPI(*this, FDecl, Args, NumArgs);
4183 
4184  unsigned CMId = FDecl->getMemoryFunctionKind();
4185  if (CMId == 0)
4186  return false;
4187 
4188  // Handle memory setting and copying functions.
4189  if (CMId == Builtin::BIstrlcpy || CMId == Builtin::BIstrlcat)
4190  CheckStrlcpycatArguments(TheCall, FnInfo);
4191  else if (CMId == Builtin::BIstrncat)
4192  CheckStrncatArguments(TheCall, FnInfo);
4193  else
4194  CheckMemaccessArguments(TheCall, CMId, FnInfo);
4195 
4196  return false;
4197 }
4198 
4199 bool Sema::CheckObjCMethodCall(ObjCMethodDecl *Method, SourceLocation lbrac,
4200  ArrayRef<const Expr *> Args) {
4201  VariadicCallType CallType =
4202  Method->isVariadic() ? VariadicMethod : VariadicDoesNotApply;
4203 
4204  checkCall(Method, nullptr, /*ThisArg=*/nullptr, Args,
4205  /*IsMemberFunction=*/false, lbrac, Method->getSourceRange(),
4206  CallType);
4207 
4208  return false;
4209 }
4210 
4211 bool Sema::CheckPointerCall(NamedDecl *NDecl, CallExpr *TheCall,
4212  const FunctionProtoType *Proto) {
4213  QualType Ty;
4214  if (const auto *V = dyn_cast<VarDecl>(NDecl))
4215  Ty = V->getType().getNonReferenceType();
4216  else if (const auto *F = dyn_cast<FieldDecl>(NDecl))
4217  Ty = F->getType().getNonReferenceType();
4218  else
4219  return false;
4220 
4221  if (!Ty->isBlockPointerType() && !Ty->isFunctionPointerType() &&
4222  !Ty->isFunctionProtoType())
4223  return false;
4224 
4225  VariadicCallType CallType;
4226  if (!Proto || !Proto->isVariadic()) {
4227  CallType = VariadicDoesNotApply;
4228  } else if (Ty->isBlockPointerType()) {
4229  CallType = VariadicBlock;
4230  } else { // Ty->isFunctionPointerType()
4231  CallType = VariadicFunction;
4232  }
4233 
4234  checkCall(NDecl, Proto, /*ThisArg=*/nullptr,
4235  llvm::makeArrayRef(TheCall->getArgs(), TheCall->getNumArgs()),
4236  /*IsMemberFunction=*/false, TheCall->getRParenLoc(),
4237  TheCall->getCallee()->getSourceRange(), CallType);
4238 
4239  return false;
4240 }
4241 
4242 /// Checks function calls when a FunctionDecl or a NamedDecl is not available,
4243 /// such as function pointers returned from functions.
4244 bool Sema::CheckOtherCall(CallExpr *TheCall, const FunctionProtoType *Proto) {
4245  VariadicCallType CallType = getVariadicCallType(/*FDecl=*/nullptr, Proto,
4246  TheCall->getCallee());
4247  checkCall(/*FDecl=*/nullptr, Proto, /*ThisArg=*/nullptr,
4248  llvm::makeArrayRef(TheCall->getArgs(), TheCall->getNumArgs()),
4249  /*IsMemberFunction=*/false, TheCall->getRParenLoc(),
4250  TheCall->getCallee()->getSourceRange(), CallType);
4251 
4252  return false;
4253 }
4254 
4255 static bool isValidOrderingForOp(int64_t Ordering, AtomicExpr::AtomicOp Op) {
4256  if (!llvm::isValidAtomicOrderingCABI(Ordering))
4257  return false;
4258 
4259  auto OrderingCABI = (llvm::AtomicOrderingCABI)Ordering;
4260  switch (Op) {
4261  case AtomicExpr::AO__c11_atomic_init:
4262  case AtomicExpr::AO__opencl_atomic_init:
4263  llvm_unreachable("There is no ordering argument for an init");
4264 
4265  case AtomicExpr::AO__c11_atomic_load:
4266  case AtomicExpr::AO__opencl_atomic_load:
4267  case AtomicExpr::AO__atomic_load_n:
4268  case AtomicExpr::AO__atomic_load:
4269  return OrderingCABI != llvm::AtomicOrderingCABI::release &&
4270  OrderingCABI != llvm::AtomicOrderingCABI::acq_rel;
4271 
4272  case AtomicExpr::AO__c11_atomic_store:
4273  case AtomicExpr::AO__opencl_atomic_store:
4274  case AtomicExpr::AO__atomic_store:
4275  case AtomicExpr::AO__atomic_store_n:
4276  return OrderingCABI != llvm::AtomicOrderingCABI::consume &&
4277  OrderingCABI != llvm::AtomicOrderingCABI::acquire &&
4278  OrderingCABI != llvm::AtomicOrderingCABI::acq_rel;
4279 
4280  default:
4281  return true;
4282  }
4283 }
4284 
4285 ExprResult Sema::SemaAtomicOpsOverloaded(ExprResult TheCallResult,
4286  AtomicExpr::AtomicOp Op) {
4287  CallExpr *TheCall = cast<CallExpr>(TheCallResult.get());
4288  DeclRefExpr *DRE =cast<DeclRefExpr>(TheCall->getCallee()->IgnoreParenCasts());
4289 
4290  // All the non-OpenCL operations take one of the following forms.
4291  // The OpenCL operations take the __c11 forms with one extra argument for
4292  // synchronization scope.
4293  enum {
4294  // C __c11_atomic_init(A *, C)
4295  Init,
4296 
4297  // C __c11_atomic_load(A *, int)
4298  Load,
4299 
4300  // void __atomic_load(A *, CP, int)
4301  LoadCopy,
4302 
4303  // void __atomic_store(A *, CP, int)
4304  Copy,
4305 
4306  // C __c11_atomic_add(A *, M, int)
4307  Arithmetic,
4308 
4309  // C __atomic_exchange_n(A *, CP, int)
4310  Xchg,
4311 
4312  // void __atomic_exchange(A *, C *, CP, int)
4313  GNUXchg,
4314 
4315  // bool __c11_atomic_compare_exchange_strong(A *, C *, CP, int, int)
4316  C11CmpXchg,
4317 
4318  // bool __atomic_compare_exchange(A *, C *, CP, bool, int, int)
4319  GNUCmpXchg
4320  } Form = Init;
4321 
4322  const unsigned NumForm = GNUCmpXchg + 1;
4323  const unsigned NumArgs[] = { 2, 2, 3, 3, 3, 3, 4, 5, 6 };
4324  const unsigned NumVals[] = { 1, 0, 1, 1, 1, 1, 2, 2, 3 };
4325  // where:
4326  // C is an appropriate type,
4327  // A is volatile _Atomic(C) for __c11 builtins and is C for GNU builtins,
4328  // CP is C for __c11 builtins and GNU _n builtins and is C * otherwise,
4329  // M is C if C is an integer, and ptrdiff_t if C is a pointer, and
4330  // the int parameters are for orderings.
4331 
4332  static_assert(sizeof(NumArgs)/sizeof(NumArgs[0]) == NumForm
4333  && sizeof(NumVals)/sizeof(NumVals[0]) == NumForm,
4334  "need to update code for modified forms");
4335  static_assert(AtomicExpr::AO__c11_atomic_init == 0 &&
4336  AtomicExpr::AO__c11_atomic_fetch_xor + 1 ==
4337  AtomicExpr::AO__atomic_load,
4338  "need to update code for modified C11 atomics");
4339  bool IsOpenCL = Op >= AtomicExpr::AO__opencl_atomic_init &&
4340  Op <= AtomicExpr::AO__opencl_atomic_fetch_max;
4341  bool IsC11 = (Op >= AtomicExpr::AO__c11_atomic_init &&
4342  Op <= AtomicExpr::AO__c11_atomic_fetch_xor) ||
4343  IsOpenCL;
4344  bool IsN = Op == AtomicExpr::AO__atomic_load_n ||
4345  Op == AtomicExpr::AO__atomic_store_n ||
4346  Op == AtomicExpr::AO__atomic_exchange_n ||
4347  Op == AtomicExpr::AO__atomic_compare_exchange_n;
4348  bool IsAddSub = false;
4349  bool IsMinMax = false;
4350 
4351  switch (Op) {
4352  case AtomicExpr::AO__c11_atomic_init:
4353  case AtomicExpr::AO__opencl_atomic_init:
4354  Form = Init;
4355  break;
4356 
4357  case AtomicExpr::AO__c11_atomic_load:
4358  case AtomicExpr::AO__opencl_atomic_load:
4359  case AtomicExpr::AO__atomic_load_n:
4360  Form = Load;
4361  break;
4362 
4363  case AtomicExpr::AO__atomic_load:
4364  Form = LoadCopy;
4365  break;
4366 
4367  case AtomicExpr::AO__c11_atomic_store:
4368  case AtomicExpr::AO__opencl_atomic_store:
4369  case AtomicExpr::AO__atomic_store:
4370  case AtomicExpr::AO__atomic_store_n:
4371  Form = Copy;
4372  break;
4373 
4374  case AtomicExpr::AO__c11_atomic_fetch_add:
4375  case AtomicExpr::AO__c11_atomic_fetch_sub:
4376  case AtomicExpr::AO__opencl_atomic_fetch_add:
4377  case AtomicExpr::AO__opencl_atomic_fetch_sub:
4378  case AtomicExpr::AO__opencl_atomic_fetch_min:
4379  case AtomicExpr::AO__opencl_atomic_fetch_max:
4380  case AtomicExpr::AO__atomic_fetch_add:
4381  case AtomicExpr::AO__atomic_fetch_sub:
4382  case AtomicExpr::AO__atomic_add_fetch:
4383  case AtomicExpr::AO__atomic_sub_fetch:
4384  IsAddSub = true;
4385  LLVM_FALLTHROUGH;
4386  case AtomicExpr::AO__c11_atomic_fetch_and:
4387  case AtomicExpr::AO__c11_atomic_fetch_or:
4388  case AtomicExpr::AO__c11_atomic_fetch_xor:
4389  case AtomicExpr::AO__opencl_atomic_fetch_and:
4390  case AtomicExpr::AO__opencl_atomic_fetch_or:
4391  case AtomicExpr::AO__opencl_atomic_fetch_xor:
4392  case AtomicExpr::AO__atomic_fetch_and:
4393  case AtomicExpr::AO__atomic_fetch_or:
4394  case AtomicExpr::AO__atomic_fetch_xor:
4395  case AtomicExpr::AO__atomic_fetch_nand:
4396  case AtomicExpr::AO__atomic_and_fetch:
4397  case AtomicExpr::AO__atomic_or_fetch:
4398  case AtomicExpr::AO__atomic_xor_fetch:
4399  case AtomicExpr::AO__atomic_nand_fetch:
4400  Form = Arithmetic;
4401  break;
4402 
4403  case AtomicExpr::AO__atomic_fetch_min:
4404  case AtomicExpr::AO__atomic_fetch_max:
4405  IsMinMax = true;
4406  Form = Arithmetic;
4407  break;
4408 
4409  case AtomicExpr::AO__c11_atomic_exchange:
4410  case AtomicExpr::AO__opencl_atomic_exchange:
4411  case AtomicExpr::AO__atomic_exchange_n:
4412  Form = Xchg;
4413  break;
4414 
4415  case AtomicExpr::AO__atomic_exchange:
4416  Form = GNUXchg;
4417  break;
4418 
4419  case AtomicExpr::AO__c11_atomic_compare_exchange_strong:
4420  case AtomicExpr::AO__c11_atomic_compare_exchange_weak:
4421  case AtomicExpr::AO__opencl_atomic_compare_exchange_strong:
4422  case AtomicExpr::AO__opencl_atomic_compare_exchange_weak:
4423  Form = C11CmpXchg;
4424  break;
4425 
4426  case AtomicExpr::AO__atomic_compare_exchange:
4427  case AtomicExpr::AO__atomic_compare_exchange_n:
4428  Form = GNUCmpXchg;
4429  break;
4430  }
4431 
4432  unsigned AdjustedNumArgs = NumArgs[Form];
4433  if (IsOpenCL && Op != AtomicExpr::AO__opencl_atomic_init)
4434  ++AdjustedNumArgs;
4435  // Check we have the right number of arguments.
4436  if (TheCall->getNumArgs() < AdjustedNumArgs) {
4437  Diag(TheCall->getEndLoc(), diag::err_typecheck_call_too_few_args)
4438  << 0 << AdjustedNumArgs << TheCall->getNumArgs()
4439  << TheCall->getCallee()->getSourceRange();
4440  return ExprError();
4441  } else if (TheCall->getNumArgs() > AdjustedNumArgs) {
4442  Diag(TheCall->getArg(AdjustedNumArgs)->getBeginLoc(),
4443  diag::err_typecheck_call_too_many_args)
4444  << 0 << AdjustedNumArgs << TheCall->getNumArgs()
4445  << TheCall->getCallee()->getSourceRange();
4446  return ExprError();
4447  }
4448 
4449  // Inspect the first argument of the atomic operation.
4450  Expr *Ptr = TheCall->getArg(0);
4451  ExprResult ConvertedPtr = DefaultFunctionArrayLvalueConversion(Ptr);
4452  if (ConvertedPtr.isInvalid())
4453  return ExprError();
4454 
4455  Ptr = ConvertedPtr.get();
4456  const PointerType *pointerType = Ptr->getType()->getAs<PointerType>();
4457  if (!pointerType) {
4458  Diag(DRE->getBeginLoc(), diag::err_atomic_builtin_must_be_pointer)
4459  << Ptr->getType() << Ptr->getSourceRange();
4460  return ExprError();
4461  }
4462 
4463  // For a __c11 builtin, this should be a pointer to an _Atomic type.
4464  QualType AtomTy = pointerType->getPointeeType(); // 'A'
4465  QualType ValType = AtomTy; // 'C'
4466  if (IsC11) {
4467  if (!AtomTy->isAtomicType()) {
4468  Diag(DRE->getBeginLoc(), diag::err_atomic_op_needs_atomic)
4469  << Ptr->getType() << Ptr->getSourceRange();
4470  return ExprError();
4471  }
4472  if ((Form != Load && Form != LoadCopy && AtomTy.isConstQualified()) ||
4474  Diag(DRE->getBeginLoc(), diag::err_atomic_op_needs_non_const_atomic)
4475  << (AtomTy.isConstQualified() ? 0 : 1) << Ptr->getType()
4476  << Ptr->getSourceRange();
4477  return ExprError();
4478  }
4479  ValType = AtomTy->getAs<AtomicType>()->getValueType();
4480  } else if (Form != Load && Form != LoadCopy) {
4481  if (ValType.isConstQualified()) {
4482  Diag(DRE->getBeginLoc(), diag::err_atomic_op_needs_non_const_pointer)
4483  << Ptr->getType() << Ptr->getSourceRange();
4484  return ExprError();
4485  }
4486  }
4487 
4488  // For an arithmetic operation, the implied arithmetic must be well-formed.
4489  if (Form == Arithmetic) {
4490  // gcc does not enforce these rules for GNU atomics, but we do so for sanity.
4491  if (IsAddSub && !ValType->isIntegerType()
4492  && !ValType->isPointerType()) {
4493  Diag(DRE->getBeginLoc(), diag::err_atomic_op_needs_atomic_int_or_ptr)
4494  << IsC11 << Ptr->getType() << Ptr->getSourceRange();
4495  return ExprError();
4496  }
4497  if (IsMinMax) {
4498  const BuiltinType *BT = ValType->getAs<BuiltinType>();
4499  if (!BT || (BT->getKind() != BuiltinType::Int &&
4500  BT->getKind() != BuiltinType::UInt)) {
4501  Diag(DRE->getBeginLoc(), diag::err_atomic_op_needs_int32_or_ptr);
4502  return ExprError();
4503  }
4504  }
4505  if (!IsAddSub && !IsMinMax && !ValType->isIntegerType()) {
4506  Diag(DRE->getBeginLoc(), diag::err_atomic_op_bitwise_needs_atomic_int)
4507  << IsC11 << Ptr->getType() << Ptr->getSourceRange();
4508  return ExprError();
4509  }
4510  if (IsC11 && ValType->isPointerType() &&
4511  RequireCompleteType(Ptr->getBeginLoc(), ValType->getPointeeType(),
4512  diag::err_incomplete_type)) {
4513  return ExprError();
4514  }
4515  } else if (IsN && !ValType->isIntegerType() && !ValType->isPointerType()) {
4516  // For __atomic_*_n operations, the value type must be a scalar integral or
4517  // pointer type which is 1, 2, 4, 8 or 16 bytes in length.
4518  Diag(DRE->getBeginLoc(), diag::err_atomic_op_needs_atomic_int_or_ptr)
4519  << IsC11 << Ptr->getType() << Ptr->getSourceRange();
4520  return ExprError();
4521  }
4522 
4523  if (!IsC11 && !AtomTy.isTriviallyCopyableType(Context) &&
4524  !AtomTy->isScalarType()) {
4525  // For GNU atomics, require a trivially-copyable type. This is not part of
4526  // the GNU atomics specification, but we enforce it for sanity.
4527  Diag(DRE->getBeginLoc(), diag::err_atomic_op_needs_trivial_copy)
4528  << Ptr->getType() << Ptr->getSourceRange();
4529  return ExprError();
4530  }
4531 
4532  switch (ValType.getObjCLifetime()) {
4533  case Qualifiers::OCL_None:
4535  // okay
4536  break;
4537 
4538  case Qualifiers::OCL_Weak:
4541  // FIXME: Can this happen? By this point, ValType should be known
4542  // to be trivially copyable.
4543  Diag(DRE->getBeginLoc(), diag::err_arc_atomic_ownership)
4544  << ValType << Ptr->getSourceRange();
4545  return ExprError();
4546  }
4547 
4548  // All atomic operations have an overload which takes a pointer to a volatile
4549  // 'A'. We shouldn't let the volatile-ness of the pointee-type inject itself
4550  // into the result or the other operands. Similarly atomic_load takes a
4551  // pointer to a const 'A'.
4552  ValType.removeLocalVolatile();
4553  ValType.removeLocalConst();
4554  QualType ResultType = ValType;
4555  if (Form == Copy || Form == LoadCopy || Form == GNUXchg ||
4556  Form == Init)
4557  ResultType = Context.VoidTy;
4558  else if (Form == C11CmpXchg || Form == GNUCmpXchg)
4559  ResultType = Context.BoolTy;
4560 
4561  // The type of a parameter passed 'by value'. In the GNU atomics, such
4562  // arguments are actually passed as pointers.
4563  QualType ByValType = ValType; // 'CP'
4564  bool IsPassedByAddress = false;
4565  if (!IsC11 && !IsN) {
4566  ByValType = Ptr->getType();
4567  IsPassedByAddress = true;
4568  }
4569 
4570  // The first argument's non-CV pointer type is used to deduce the type of
4571  // subsequent arguments, except for:
4572  // - weak flag (always converted to bool)
4573  // - memory order (always converted to int)
4574  // - scope (always converted to int)
4575  for (unsigned i = 0; i != TheCall->getNumArgs(); ++i) {
4576  QualType Ty;
4577  if (i < NumVals[Form] + 1) {
4578  switch (i) {
4579  case 0:
4580  // The first argument is always a pointer. It has a fixed type.
4581  // It is always dereferenced, a nullptr is undefined.
4582  CheckNonNullArgument(*this, TheCall->getArg(i), DRE->getBeginLoc());
4583  // Nothing else to do: we already know all we want about this pointer.
4584  continue;
4585  case 1:
4586  // The second argument is the non-atomic operand. For arithmetic, this
4587  // is always passed by value, and for a compare_exchange it is always
4588  // passed by address. For the rest, GNU uses by-address and C11 uses
4589  // by-value.
4590  assert(Form != Load);
4591  if (Form == Init || (Form == Arithmetic && ValType->isIntegerType()))
4592  Ty = ValType;
4593  else if (Form == Copy || Form == Xchg) {
4594  if (IsPassedByAddress)
4595  // The value pointer is always dereferenced, a nullptr is undefined.
4596  CheckNonNullArgument(*this, TheCall->getArg(i), DRE->getBeginLoc());
4597  Ty = ByValType;
4598  } else if (Form == Arithmetic)
4599  Ty = Context.getPointerDiffType();
4600  else {
4601  Expr *ValArg = TheCall->getArg(i);
4602  // The value pointer is always dereferenced, a nullptr is undefined.
4603  CheckNonNullArgument(*this, ValArg, DRE->getBeginLoc());
4604  LangAS AS = LangAS::Default;
4605  // Keep address space of non-atomic pointer type.
4606  if (const PointerType *PtrTy =
4607  ValArg->getType()->getAs<PointerType>()) {
4608  AS = PtrTy->getPointeeType().getAddressSpace();
4609  }
4610  Ty = Context.getPointerType(
4611  Context.getAddrSpaceQualType(ValType.getUnqualifiedType(), AS));
4612  }
4613  break;
4614  case 2:
4615  // The third argument to compare_exchange / GNU exchange is the desired
4616  // value, either by-value (for the C11 and *_n variant) or as a pointer.
4617  if (IsPassedByAddress)
4618  CheckNonNullArgument(*this, TheCall->getArg(i), DRE->getBeginLoc());
4619  Ty = ByValType;
4620  break;
4621  case 3:
4622  // The fourth argument to GNU compare_exchange is a 'weak' flag.
4623  Ty = Context.BoolTy;
4624  break;
4625  }
4626  } else {
4627  // The order(s) and scope are always converted to int.
4628  Ty = Context.IntTy;
4629  }
4630 
4631  InitializedEntity Entity =
4632  InitializedEntity::InitializeParameter(Context, Ty, false);
4633  ExprResult Arg = TheCall->getArg(i);
4634  Arg = PerformCopyInitialization(Entity, SourceLocation(), Arg);
4635  if (Arg.isInvalid())
4636  return true;
4637  TheCall->setArg(i, Arg.get());
4638  }
4639 
4640  // Permute the arguments into a 'consistent' order.
4641  SmallVector<Expr*, 5> SubExprs;
4642  SubExprs.push_back(Ptr);
4643  switch (Form) {
4644  case Init:
4645  // Note, AtomicExpr::getVal1() has a special case for this atomic.
4646  SubExprs.push_back(TheCall->getArg(1)); // Val1
4647  break;
4648  case Load:
4649  SubExprs.push_back(TheCall->getArg(1)); // Order
4650  break;
4651  case LoadCopy:
4652  case Copy:
4653  case Arithmetic:
4654  case Xchg:
4655  SubExprs.push_back(TheCall->getArg(2)); // Order
4656  SubExprs.push_back(TheCall->getArg(1)); // Val1
4657  break;
4658  case GNUXchg:
4659  // Note, AtomicExpr::getVal2() has a special case for this atomic.
4660  SubExprs.push_back(TheCall->getArg(3)); // Order
4661  SubExprs.push_back(TheCall->getArg(1)); // Val1
4662  SubExprs.push_back(TheCall->getArg(2)); // Val2
4663  break;
4664  case C11CmpXchg:
4665  SubExprs.push_back(TheCall->getArg(3)); // Order
4666  SubExprs.push_back(TheCall->getArg(1)); // Val1
4667  SubExprs.push_back(TheCall->getArg(4)); // OrderFail
4668  SubExprs.push_back(TheCall->getArg(2)); // Val2
4669  break;
4670  case GNUCmpXchg:
4671  SubExprs.push_back(TheCall->getArg(4)); // Order
4672  SubExprs.push_back(TheCall->getArg(1)); // Val1
4673  SubExprs.push_back(TheCall->getArg(5)); // OrderFail
4674  SubExprs.push_back(TheCall->getArg(2)); // Val2
4675  SubExprs.push_back(TheCall->getArg(3)); // Weak
4676  break;
4677  }
4678 
4679  if (SubExprs.size() >= 2 && Form != Init) {
4680  llvm::APSInt Result(32);
4681  if (SubExprs[1]->isIntegerConstantExpr(Result, Context) &&
4682  !isValidOrderingForOp(Result.getSExtValue(), Op))
4683  Diag(SubExprs[1]->getBeginLoc(),
4684  diag::warn_atomic_op_has_invalid_memory_order)
4685  << SubExprs[1]->getSourceRange();
4686  }
4687 
4688  if (auto ScopeModel = AtomicExpr::getScopeModel(Op)) {
4689  auto *Scope = TheCall->getArg(TheCall->getNumArgs() - 1);
4690  llvm::APSInt Result(32);
4691  if (Scope->isIntegerConstantExpr(Result, Context) &&
4692  !ScopeModel->isValid(Result.getZExtValue())) {
4693  Diag(Scope->getBeginLoc(), diag::err_atomic_op_has_invalid_synch_scope)
4694  << Scope->getSourceRange();
4695  }
4696  SubExprs.push_back(Scope);
4697  }
4698 
4699  AtomicExpr *AE =
4700  new (Context) AtomicExpr(TheCall->getCallee()->getBeginLoc(), SubExprs,
4701  ResultType, Op, TheCall->getRParenLoc());
4702 
4703  if ((Op == AtomicExpr::AO__c11_atomic_load ||
4704  Op == AtomicExpr::AO__c11_atomic_store ||
4705  Op == AtomicExpr::AO__opencl_atomic_load ||
4706  Op == AtomicExpr::AO__opencl_atomic_store ) &&
4707  Context.AtomicUsesUnsupportedLibcall(AE))
4708  Diag(AE->getBeginLoc(), diag::err_atomic_load_store_uses_lib)
4709  << ((Op == AtomicExpr::AO__c11_atomic_load ||
4710  Op == AtomicExpr::AO__opencl_atomic_load)
4711  ? 0
4712  : 1);
4713 
4714  return AE;
4715 }
4716 
4717 /// checkBuiltinArgument - Given a call to a builtin function, perform
4718 /// normal type-checking on the given argument, updating the call in
4719 /// place. This is useful when a builtin function requires custom
4720 /// type-checking for some of its arguments but not necessarily all of
4721 /// them.
4722 ///
4723 /// Returns true on error.
4724 static bool checkBuiltinArgument(Sema &S, CallExpr *E, unsigned ArgIndex) {
4725  FunctionDecl *Fn = E->getDirectCallee();
4726  assert(Fn && "builtin call without direct callee!");
4727 
4728  ParmVarDecl *Param = Fn->getParamDecl(ArgIndex);
4729  InitializedEntity Entity =
4731 
4732  ExprResult Arg = E->getArg(0);
4733  Arg = S.PerformCopyInitialization(Entity, SourceLocation(), Arg);
4734  if (Arg.isInvalid())
4735  return true;
4736 
4737  E->setArg(ArgIndex, Arg.get());
4738  return false;
4739 }
4740 
4741 /// We have a call to a function like __sync_fetch_and_add, which is an
4742 /// overloaded function based on the pointer type of its first argument.
4743 /// The main ActOnCallExpr routines have already promoted the types of
4744 /// arguments because all of these calls are prototyped as void(...).
4745 ///
4746 /// This function goes through and does final semantic checking for these
4747 /// builtins, as well as generating any warnings.
4748 ExprResult
4749 Sema::SemaBuiltinAtomicOverloaded(ExprResult TheCallResult) {
4750  CallExpr *TheCall = static_cast<CallExpr *>(TheCallResult.get());
4751  Expr *Callee = TheCall->getCallee();
4752  DeclRefExpr *DRE = cast<DeclRefExpr>(Callee->IgnoreParenCasts());
4753  FunctionDecl *FDecl = cast<FunctionDecl>(DRE->getDecl());
4754 
4755  // Ensure that we have at least one argument to do type inference from.
4756  if (TheCall->getNumArgs() < 1) {
4757  Diag(TheCall->getEndLoc(), diag::err_typecheck_call_too_few_args_at_least)
4758  << 0 << 1 << TheCall->getNumArgs() << Callee->getSourceRange();
4759  return ExprError();
4760  }
4761 
4762  // Inspect the first argument of the atomic builtin. This should always be
4763  // a pointer type, whose element is an integral scalar or pointer type.
4764  // Because it is a pointer type, we don't have to worry about any implicit
4765  // casts here.
4766  // FIXME: We don't allow floating point scalars as input.
4767  Expr *FirstArg = TheCall->getArg(0);
4768  ExprResult FirstArgResult = DefaultFunctionArrayLvalueConversion(FirstArg);
4769  if (FirstArgResult.isInvalid())
4770  return ExprError();
4771  FirstArg = FirstArgResult.get();
4772  TheCall->setArg(0, FirstArg);
4773 
4774  const PointerType *pointerType = FirstArg->getType()->getAs<PointerType>();
4775  if (!pointerType) {
4776  Diag(DRE->getBeginLoc(), diag::err_atomic_builtin_must_be_pointer)
4777  << FirstArg->getType() << FirstArg->getSourceRange();
4778  return ExprError();
4779  }
4780 
4781  QualType ValType = pointerType->getPointeeType();
4782  if (!ValType->isIntegerType() && !ValType->isAnyPointerType() &&
4783  !ValType->isBlockPointerType()) {
4784  Diag(DRE->getBeginLoc(), diag::err_atomic_builtin_must_be_pointer_intptr)
4785  << FirstArg->getType() << FirstArg->getSourceRange();
4786  return ExprError();
4787  }
4788 
4789  if (ValType.isConstQualified()) {
4790  Diag(DRE->getBeginLoc(), diag::err_atomic_builtin_cannot_be_const)
4791  << FirstArg->getType() << FirstArg->getSourceRange();
4792  return ExprError();
4793  }
4794 
4795  switch (ValType.getObjCLifetime()) {
4796  case Qualifiers::OCL_None:
4798  // okay
4799  break;
4800 
4801  case Qualifiers::OCL_Weak:
4804  Diag(DRE->getBeginLoc(), diag::err_arc_atomic_ownership)
4805  << ValType << FirstArg->getSourceRange();
4806  return ExprError();
4807  }
4808 
4809  // Strip any qualifiers off ValType.
4810  ValType = ValType.getUnqualifiedType();
4811 
4812  // The majority of builtins return a value, but a few have special return
4813  // types, so allow them to override appropriately below.
4814  QualType ResultType = ValType;
4815 
4816  // We need to figure out which concrete builtin this maps onto. For example,
4817  // __sync_fetch_and_add with a 2 byte object turns into
4818  // __sync_fetch_and_add_2.
4819 #define BUILTIN_ROW(x) \
4820  { Builtin::BI##x##_1, Builtin::BI##x##_2, Builtin::BI##x##_4, \
4821  Builtin::BI##x##_8, Builtin::BI##x##_16 }
4822 
4823  static const unsigned BuiltinIndices[][5] = {
4824  BUILTIN_ROW(__sync_fetch_and_add),
4825  BUILTIN_ROW(__sync_fetch_and_sub),
4826  BUILTIN_ROW(__sync_fetch_and_or),
4827  BUILTIN_ROW(__sync_fetch_and_and),
4828  BUILTIN_ROW(__sync_fetch_and_xor),
4829  BUILTIN_ROW(__sync_fetch_and_nand),
4830 
4831  BUILTIN_ROW(__sync_add_and_fetch),
4832  BUILTIN_ROW(__sync_sub_and_fetch),
4833  BUILTIN_ROW(__sync_and_and_fetch),
4834  BUILTIN_ROW(__sync_or_and_fetch),
4835  BUILTIN_ROW(__sync_xor_and_fetch),
4836  BUILTIN_ROW(__sync_nand_and_fetch),
4837 
4838  BUILTIN_ROW(__sync_val_compare_and_swap),
4839  BUILTIN_ROW(__sync_bool_compare_and_swap),
4840  BUILTIN_ROW(__sync_lock_test_and_set),
4841  BUILTIN_ROW(__sync_lock_release),
4842  BUILTIN_ROW(__sync_swap)
4843  };
4844 #undef BUILTIN_ROW
4845 
4846  // Determine the index of the size.
4847  unsigned SizeIndex;
4848  switch (Context.getTypeSizeInChars(ValType).getQuantity()) {
4849  case 1: SizeIndex = 0; break;
4850  case 2: SizeIndex = 1; break;
4851  case 4: SizeIndex = 2; break;
4852  case 8: SizeIndex = 3; break;
4853  case 16: SizeIndex = 4; break;
4854  default:
4855  Diag(DRE->getBeginLoc(), diag::err_atomic_builtin_pointer_size)
4856  << FirstArg->getType() << FirstArg->getSourceRange();
4857  return ExprError();
4858  }
4859 
4860  // Each of these builtins has one pointer argument, followed by some number of
4861  // values (0, 1 or 2) followed by a potentially empty varags list of stuff
4862  // that we ignore. Find out which row of BuiltinIndices to read from as well
4863  // as the number of fixed args.
4864  unsigned BuiltinID = FDecl->getBuiltinID();
4865  unsigned BuiltinIndex, NumFixed = 1;
4866  bool WarnAboutSemanticsChange = false;
4867  switch (BuiltinID) {
4868  default: llvm_unreachable("Unknown overloaded atomic builtin!");
4869  case Builtin::BI__sync_fetch_and_add:
4870  case Builtin::BI__sync_fetch_and_add_1:
4871  case Builtin::BI__sync_fetch_and_add_2:
4872  case Builtin::BI__sync_fetch_and_add_4:
4873  case Builtin::BI__sync_fetch_and_add_8:
4874  case Builtin::BI__sync_fetch_and_add_16:
4875  BuiltinIndex = 0;
4876  break;
4877 
4878  case Builtin::BI__sync_fetch_and_sub:
4879  case Builtin::BI__sync_fetch_and_sub_1:
4880  case Builtin::BI__sync_fetch_and_sub_2:
4881  case Builtin::BI__sync_fetch_and_sub_4:
4882  case Builtin::BI__sync_fetch_and_sub_8:
4883  case Builtin::BI__sync_fetch_and_sub_16:
4884  BuiltinIndex = 1;
4885  break;
4886 
4887  case Builtin::BI__sync_fetch_and_or:
4888  case Builtin::BI__sync_fetch_and_or_1:
4889  case Builtin::BI__sync_fetch_and_or_2:
4890  case Builtin::BI__sync_fetch_and_or_4:
4891  case Builtin::BI__sync_fetch_and_or_8:
4892  case Builtin::BI__sync_fetch_and_or_16:
4893  BuiltinIndex = 2;
4894  break;
4895 
4896  case Builtin::BI__sync_fetch_and_and:
4897  case Builtin::BI__sync_fetch_and_and_1:
4898  case Builtin::BI__sync_fetch_and_and_2:
4899  case Builtin::BI__sync_fetch_and_and_4:
4900  case Builtin::BI__sync_fetch_and_and_8:
4901  case Builtin::BI__sync_fetch_and_and_16:
4902  BuiltinIndex = 3;
4903  break;
4904 
4905  case Builtin::BI__sync_fetch_and_xor:
4906  case Builtin::BI__sync_fetch_and_xor_1:
4907  case Builtin::BI__sync_fetch_and_xor_2:
4908  case Builtin::BI__sync_fetch_and_xor_4:
4909  case Builtin::BI__sync_fetch_and_xor_8:
4910  case Builtin::BI__sync_fetch_and_xor_16:
4911  BuiltinIndex = 4;
4912  break;
4913 
4914  case Builtin::BI__sync_fetch_and_nand:
4915  case Builtin::BI__sync_fetch_and_nand_1:
4916  case Builtin::BI__sync_fetch_and_nand_2:
4917  case Builtin::BI__sync_fetch_and_nand_4:
4918  case Builtin::BI__sync_fetch_and_nand_8:
4919  case Builtin::BI__sync_fetch_and_nand_16:
4920  BuiltinIndex = 5;
4921  WarnAboutSemanticsChange = true;
4922  break;
4923 
4924  case Builtin::BI__sync_add_and_fetch:
4925  case Builtin::BI__sync_add_and_fetch_1:
4926  case Builtin::BI__sync_add_and_fetch_2:
4927  case Builtin::BI__sync_add_and_fetch_4:
4928  case Builtin::BI__sync_add_and_fetch_8:
4929  case Builtin::BI__sync_add_and_fetch_16:
4930  BuiltinIndex = 6;
4931  break;
4932 
4933  case Builtin::BI__sync_sub_and_fetch:
4934  case Builtin::BI__sync_sub_and_fetch_1:
4935  case Builtin::BI__sync_sub_and_fetch_2:
4936  case Builtin::BI__sync_sub_and_fetch_4:
4937  case Builtin::BI__sync_sub_and_fetch_8:
4938  case Builtin::BI__sync_sub_and_fetch_16:
4939  BuiltinIndex = 7;
4940  break;
4941 
4942  case Builtin::BI__sync_and_and_fetch:
4943  case Builtin::BI__sync_and_and_fetch_1:
4944  case Builtin::BI__sync_and_and_fetch_2:
4945  case Builtin::BI__sync_and_and_fetch_4:
4946  case Builtin::BI__sync_and_and_fetch_8:
4947  case Builtin::BI__sync_and_and_fetch_16:
4948  BuiltinIndex = 8;
4949  break;
4950 
4951  case Builtin::BI__sync_or_and_fetch:
4952  case Builtin::BI__sync_or_and_fetch_1:
4953  case Builtin::BI__sync_or_and_fetch_2:
4954  case Builtin::BI__sync_or_and_fetch_4:
4955  case Builtin::BI__sync_or_and_fetch_8:
4956  case Builtin::BI__sync_or_and_fetch_16:
4957  BuiltinIndex = 9;
4958  break;
4959 
4960  case Builtin::BI__sync_xor_and_fetch:
4961  case Builtin::BI__sync_xor_and_fetch_1:
4962  case Builtin::BI__sync_xor_and_fetch_2:
4963  case Builtin::BI__sync_xor_and_fetch_4:
4964  case Builtin::BI__sync_xor_and_fetch_8:
4965  case Builtin::BI__sync_xor_and_fetch_16:
4966  BuiltinIndex = 10;
4967  break;
4968 
4969  case Builtin::BI__sync_nand_and_fetch:
4970  case Builtin::BI__sync_nand_and_fetch_1:
4971  case Builtin::BI__sync_nand_and_fetch_2:
4972  case Builtin::BI__sync_nand_and_fetch_4:
4973  case Builtin::BI__sync_nand_and_fetch_8:
4974  case Builtin::BI__sync_nand_and_fetch_16:
4975  BuiltinIndex = 11;
4976  WarnAboutSemanticsChange = true;
4977  break;
4978 
4979  case Builtin::BI__sync_val_compare_and_swap:
4980  case Builtin::BI__sync_val_compare_and_swap_1:
4981  case Builtin::BI__sync_val_compare_and_swap_2:
4982  case Builtin::BI__sync_val_compare_and_swap_4:
4983  case Builtin::BI__sync_val_compare_and_swap_8:
4984  case Builtin::BI__sync_val_compare_and_swap_16:
4985  BuiltinIndex = 12;
4986  NumFixed = 2;
4987  break;
4988 
4989  case Builtin::BI__sync_bool_compare_and_swap:
4990  case Builtin::BI__sync_bool_compare_and_swap_1:
4991  case Builtin::BI__sync_bool_compare_and_swap_2:
4992  case Builtin::BI__sync_bool_compare_and_swap_4:
4993  case Builtin::BI__sync_bool_compare_and_swap_8:
4994  case Builtin::BI__sync_bool_compare_and_swap_16:
4995  BuiltinIndex = 13;
4996  NumFixed = 2;
4997  ResultType = Context.BoolTy;
4998  break;
4999 
5000  case Builtin::BI__sync_lock_test_and_set:
5001  case Builtin::BI__sync_lock_test_and_set_1:
5002  case Builtin::BI__sync_lock_test_and_set_2:
5003  case Builtin::BI__sync_lock_test_and_set_4:
5004  case Builtin::BI__sync_lock_test_and_set_8:
5005  case Builtin::BI__sync_lock_test_and_set_16:
5006  BuiltinIndex = 14;
5007  break;
5008 
5009  case Builtin::BI__sync_lock_release:
5010  case Builtin::BI__sync_lock_release_1:
5011  case Builtin::BI__sync_lock_release_2:
5012  case Builtin::BI__sync_lock_release_4:
5013  case Builtin::BI__sync_lock_release_8:
5014  case Builtin::BI__sync_lock_release_16:
5015  BuiltinIndex = 15;
5016  NumFixed = 0;
5017  ResultType = Context.VoidTy;
5018  break;
5019 
5020  case Builtin::BI__sync_swap:
5021  case Builtin::BI__sync_swap_1:
5022  case Builtin::BI__sync_swap_2:
5023  case Builtin::BI__sync_swap_4:
5024  case Builtin::BI__sync_swap_8:
5025  case Builtin::BI__sync_swap_16:
5026  BuiltinIndex = 16;
5027  break;
5028  }
5029 
5030  // Now that we know how many fixed arguments we expect, first check that we
5031  // have at least that many.
5032  if (TheCall->getNumArgs() < 1+NumFixed) {
5033  Diag(TheCall->getEndLoc(), diag::err_typecheck_call_too_few_args_at_least)
5034  << 0 << 1 + NumFixed << TheCall->getNumArgs()
5035  << Callee->getSourceRange();
5036  return ExprError();
5037  }
5038 
5039  Diag(TheCall->getEndLoc(), diag::warn_atomic_implicit_seq_cst)
5040  << Callee->getSourceRange();
5041 
5042  if (WarnAboutSemanticsChange) {
5043  Diag(TheCall->getEndLoc(), diag::warn_sync_fetch_and_nand_semantics_change)
5044  << Callee->getSourceRange();
5045  }
5046 
5047  // Get the decl for the concrete builtin from this, we can tell what the
5048  // concrete integer type we should convert to is.
5049  unsigned NewBuiltinID = BuiltinIndices[BuiltinIndex][SizeIndex];
5050  const char *NewBuiltinName = Context.BuiltinInfo.getName(NewBuiltinID);
5051  FunctionDecl *NewBuiltinDecl;
5052  if (NewBuiltinID == BuiltinID)
5053  NewBuiltinDecl = FDecl;
5054  else {
5055  // Perform builtin lookup to avoid redeclaring it.
5056  DeclarationName DN(&Context.Idents.get(NewBuiltinName));
5057  LookupResult Res(*this, DN, DRE->getBeginLoc(), LookupOrdinaryName);
5058  LookupName(Res, TUScope, /*AllowBuiltinCreation=*/true);
5059  assert(Res.getFoundDecl());
5060  NewBuiltinDecl = dyn_cast<FunctionDecl>(Res.getFoundDecl());
5061  if (!NewBuiltinDecl)
5062  return ExprError();
5063  }
5064 
5065  // The first argument --- the pointer --- has a fixed type; we
5066  // deduce the types of the rest of the arguments accordingly. Walk
5067  // the remaining arguments, converting them to the deduced value type.
5068  for (unsigned i = 0; i != NumFixed; ++i) {
5069  ExprResult Arg = TheCall->getArg(i+1);
5070 
5071  // GCC does an implicit conversion to the pointer or integer ValType. This
5072  // can fail in some cases (1i -> int**), check for this error case now.
5073  // Initialize the argument.
5075  ValType, /*consume*/ false);
5076  Arg = PerformCopyInitialization(Entity, SourceLocation(), Arg);
5077  if (Arg.isInvalid())
5078  return ExprError();
5079 
5080  // Okay, we have something that *can* be converted to the right type. Check
5081  // to see if there is a potentially weird extension going on here. This can
5082  // happen when you do an atomic operation on something like an char* and
5083  // pass in 42. The 42 gets converted to char. This is even more strange
5084  // for things like 45.123 -> char, etc.
5085  // FIXME: Do this check.
5086  TheCall->setArg(i+1, Arg.get());
5087  }
5088 
5089  ASTContext& Context = this->getASTContext();
5090 
5091  // Create a new DeclRefExpr to refer to the new decl.
5092  DeclRefExpr* NewDRE = DeclRefExpr::Create(
5093  Context,
5094  DRE->getQualifierLoc(),
5095  SourceLocation(),
5096  NewBuiltinDecl,
5097  /*enclosing*/ false,
5098  DRE->getLocation(),
5099  Context.BuiltinFnTy,
5100  DRE->getValueKind());
5101 
5102  // Set the callee in the CallExpr.
5103  // FIXME: This loses syntactic information.
5104  QualType CalleePtrTy = Context.getPointerType(NewBuiltinDecl->getType());
5105  ExprResult PromotedCall = ImpCastExprToType(NewDRE, CalleePtrTy,
5106  CK_BuiltinFnToFnPtr);
5107  TheCall->setCallee(PromotedCall.get());
5108 
5109  // Change the result type of the call to match the original value type. This
5110  // is arbitrary, but the codegen for these builtins ins design to handle it
5111  // gracefully.
5112  TheCall->setType(ResultType);
5113 
5114  return TheCallResult;
5115 }
5116 
5117 /// SemaBuiltinNontemporalOverloaded - We have a call to
5118 /// __builtin_nontemporal_store or __builtin_nontemporal_load, which is an
5119 /// overloaded function based on the pointer type of its last argument.
5120 ///
5121 /// This function goes through and does final semantic checking for these
5122 /// builtins.
5123 ExprResult Sema::SemaBuiltinNontemporalOverloaded(ExprResult TheCallResult) {
5124  CallExpr *TheCall = (CallExpr *)TheCallResult.get();
5125  DeclRefExpr *DRE =
5126  cast<DeclRefExpr>(TheCall->getCallee()->IgnoreParenCasts());
5127  FunctionDecl *FDecl = cast<FunctionDecl>(DRE->getDecl());
5128  unsigned BuiltinID = FDecl->getBuiltinID();
5129  assert((BuiltinID == Builtin::BI__builtin_nontemporal_store ||
5130  BuiltinID == Builtin::BI__builtin_nontemporal_load) &&
5131  "Unexpected nontemporal load/store builtin!");
5132  bool isStore = BuiltinID == Builtin::BI__builtin_nontemporal_store;
5133  unsigned numArgs = isStore ? 2 : 1;
5134 
5135  // Ensure that we have the proper number of arguments.
5136  if (checkArgCount(*this, TheCall, numArgs))
5137  return ExprError();
5138 
5139  // Inspect the last argument of the nontemporal builtin. This should always
5140  // be a pointer type, from which we imply the type of the memory access.
5141  // Because it is a pointer type, we don't have to worry about any implicit
5142  // casts here.
5143  Expr *PointerArg = TheCall->getArg(numArgs - 1);
5144  ExprResult PointerArgResult =
5145  DefaultFunctionArrayLvalueConversion(PointerArg);
5146 
5147  if (PointerArgResult.isInvalid())
5148  return ExprError();
5149  PointerArg = PointerArgResult.get();
5150  TheCall->setArg(numArgs - 1, PointerArg);
5151 
5152  const PointerType *pointerType = PointerArg->getType()->getAs<PointerType>();
5153  if (!pointerType) {
5154  Diag(DRE->getBeginLoc(), diag::err_nontemporal_builtin_must_be_pointer)
5155  << PointerArg->getType() << PointerArg->getSourceRange();
5156  return ExprError();
5157  }
5158 
5159  QualType ValType = pointerType->getPointeeType();
5160 
5161  // Strip any qualifiers off ValType.
5162  ValType = ValType.getUnqualifiedType();
5163  if (!ValType->isIntegerType() && !ValType->isAnyPointerType() &&
5164  !ValType->isBlockPointerType() && !ValType->isFloatingType() &&
5165  !ValType->isVectorType()) {
5166  Diag(DRE->getBeginLoc(),
5167  diag::err_nontemporal_builtin_must_be_pointer_intfltptr_or_vector)
5168  << PointerArg->getType() << PointerArg->getSourceRange();
5169  return ExprError();
5170  }
5171 
5172  if (!isStore) {
5173  TheCall->setType(ValType);
5174  return TheCallResult;
5175  }
5176 
5177  ExprResult ValArg = TheCall->getArg(0);
5179  Context, ValType, /*consume*/ false);
5180  ValArg = PerformCopyInitialization(Entity, SourceLocation(), ValArg);
5181  if (ValArg.isInvalid())
5182  return ExprError();
5183 
5184  TheCall->setArg(0, ValArg.get());
5185  TheCall->setType(Context.VoidTy);
5186  return TheCallResult;
5187 }
5188 
5189 /// CheckObjCString - Checks that the argument to the builtin
5190 /// CFString constructor is correct
5191 /// Note: It might also make sense to do the UTF-16 conversion here (would
5192 /// simplify the backend).
5193 bool Sema::CheckObjCString(Expr *Arg) {
5194  Arg = Arg->IgnoreParenCasts();
5195  StringLiteral *Literal = dyn_cast<StringLiteral>(Arg);
5196 
5197  if (!Literal || !Literal->isAscii()) {
5198  Diag(Arg->getBeginLoc(), diag::err_cfstring_literal_not_string_constant)
5199  << Arg->getSourceRange();
5200  return true;
5201  }
5202 
5203  if (Literal->containsNonAsciiOrNull()) {
5204  StringRef String = Literal->getString();
5205  unsigned NumBytes = String.size();
5206  SmallVector<llvm::UTF16, 128> ToBuf(NumBytes);
5207  const llvm::UTF8 *FromPtr = (const llvm::UTF8 *)String.data();
5208  llvm::UTF16 *ToPtr = &ToBuf[0];
5209 
5210  llvm::ConversionResult Result =
5211  llvm::ConvertUTF8toUTF16(&FromPtr, FromPtr + NumBytes, &ToPtr,
5212  ToPtr + NumBytes, llvm::strictConversion);
5213  // Check for conversion failure.
5214  if (Result != llvm::conversionOK)
5215  Diag(Arg->getBeginLoc(), diag::warn_cfstring_truncated)
5216  << Arg->getSourceRange();
5217  }
5218  return false;
5219 }
5220 
5221 /// CheckObjCString - Checks that the format string argument to the os_log()
5222 /// and os_trace() functions is correct, and converts it to const char *.
5223 ExprResult Sema::CheckOSLogFormatStringArg(Expr *Arg) {
5224  Arg = Arg->IgnoreParenCasts();
5225  auto *Literal = dyn_cast<StringLiteral>(Arg);
5226  if (!Literal) {
5227  if (auto *ObjcLiteral = dyn_cast<ObjCStringLiteral>(Arg)) {
5228  Literal = ObjcLiteral->getString();
5229  }
5230  }
5231 
5232  if (!Literal || (!Literal->isAscii() && !Literal->isUTF8())) {
5233  return ExprError(
5234  Diag(Arg->getBeginLoc(), diag::err_os_log_format_not_string_constant)
5235  << Arg->getSourceRange());
5236  }
5237 
5238  ExprResult Result(Literal);
5239  QualType ResultTy = Context.getPointerType(Context.CharTy.withConst());
5240  InitializedEntity Entity =
5241  InitializedEntity::InitializeParameter(Context, ResultTy, false);
5242  Result = PerformCopyInitialization(Entity, SourceLocation(), Result);
5243  return Result;
5244 }
5245 
5246 /// Check that the user is calling the appropriate va_start builtin for the
5247 /// target and calling convention.
5248 static bool checkVAStartABI(Sema &S, unsigned BuiltinID, Expr *Fn) {
5249  const llvm::Triple &TT = S.Context.getTargetInfo().getTriple();
5250  bool IsX64 = TT.getArch() == llvm::Triple::x86_64;
5251  bool IsAArch64 = TT.getArch() == llvm::Triple::aarch64;
5252  bool IsWindows = TT.isOSWindows();
5253  bool IsMSVAStart = BuiltinID == Builtin::BI__builtin_ms_va_start;
5254  if (IsX64 || IsAArch64) {
5255  CallingConv CC = CC_C;
5256  if (const FunctionDecl *FD = S.getCurFunctionDecl())
5257  CC = FD->getType()->getAs<FunctionType>()->getCallConv();
5258  if (IsMSVAStart) {
5259  // Don't allow this in System V ABI functions.
5260  if (CC == CC_X86_64SysV || (!IsWindows && CC != CC_Win64))
5261  return S.Diag(Fn->getBeginLoc(),
5262  diag::err_ms_va_start_used_in_sysv_function);
5263  } else {
5264  // On x86-64/AArch64 Unix, don't allow this in Win64 ABI functions.
5265  // On x64 Windows, don't allow this in System V ABI functions.
5266  // (Yes, that means there's no corresponding way to support variadic
5267  // System V ABI functions on Windows.)
5268  if ((IsWindows && CC == CC_X86_64SysV) ||
5269  (!IsWindows && CC == CC_Win64))
5270  return S.Diag(Fn->getBeginLoc(),
5271  diag::err_va_start_used_in_wrong_abi_function)
5272  << !IsWindows;
5273  }
5274  return false;
5275  }
5276 
5277  if (IsMSVAStart)
5278  return S.Diag(Fn->getBeginLoc(), diag::err_builtin_x64_aarch64_only);
5279  return false;
5280 }
5281 
5283  ParmVarDecl **LastParam = nullptr) {
5284  // Determine whether the current function, block, or obj-c method is variadic
5285  // and get its parameter list.
5286  bool IsVariadic = false;
5287  ArrayRef<ParmVarDecl *> Params;
5288  DeclContext *Caller = S.CurContext;
5289  if (auto *Block = dyn_cast<BlockDecl>(Caller)) {
5290  IsVariadic = Block->isVariadic();
5291  Params = Block->parameters();
5292  } else if (auto *FD = dyn_cast<FunctionDecl>(Caller)) {
5293  IsVariadic = FD->isVariadic();
5294  Params = FD->parameters();
5295  } else if (auto *MD = dyn_cast<ObjCMethodDecl>(Caller)) {
5296  IsVariadic = MD->isVariadic();
5297  // FIXME: This isn't correct for methods (results in bogus warning).
5298  Params = MD->parameters();
5299  } else if (isa<CapturedDecl>(Caller)) {
5300  // We don't support va_start in a CapturedDecl.
5301  S.Diag(Fn->getBeginLoc(), diag::err_va_start_captured_stmt);
5302  return true;
5303  } else {
5304  // This must be some other declcontext that parses exprs.
5305  S.Diag(Fn->getBeginLoc(), diag::err_va_start_outside_function);
5306  return true;
5307  }
5308 
5309  if (!IsVariadic) {
5310  S.Diag(Fn->getBeginLoc(), diag::err_va_start_fixed_function);
5311  return true;
5312  }
5313 
5314  if (LastParam)
5315  *LastParam = Params.empty() ? nullptr : Params.back();
5316 
5317  return false;
5318 }
5319 
5320 /// Check the arguments to '__builtin_va_start' or '__builtin_ms_va_start'
5321 /// for validity. Emit an error and return true on failure; return false
5322 /// on success.
5323 bool Sema::SemaBuiltinVAStart(unsigned BuiltinID, CallExpr *TheCall) {
5324  Expr *Fn = TheCall->getCallee();
5325 
5326  if (checkVAStartABI(*this, BuiltinID, Fn))
5327  return true;
5328 
5329  if (TheCall->getNumArgs() > 2) {
5330  Diag(TheCall->getArg(2)->getBeginLoc(),
5331  diag::err_typecheck_call_too_many_args)
5332  << 0 /*function call*/ << 2 << TheCall->getNumArgs()
5333  << Fn->getSourceRange()
5334  << SourceRange(TheCall->getArg(2)->getBeginLoc(),
5335  (*(TheCall->arg_end() - 1))->getEndLoc());
5336  return true;
5337  }
5338 
5339  if (TheCall->getNumArgs() < 2) {
5340  return Diag(TheCall->getEndLoc(),
5341  diag::err_typecheck_call_too_few_args_at_least)
5342  << 0 /*function call*/ << 2 << TheCall->getNumArgs();
5343  }
5344 
5345  // Type-check the first argument normally.
5346  if (checkBuiltinArgument(*this, TheCall, 0))
5347  return true;
5348 
5349  // Check that the current function is variadic, and get its last parameter.
5350  ParmVarDecl *LastParam;
5351  if (checkVAStartIsInVariadicFunction(*this, Fn, &LastParam))
5352  return true;
5353 
5354  // Verify that the second argument to the builtin is the last argument of the
5355  // current function or method.
5356  bool SecondArgIsLastNamedArgument = false;
5357  const Expr *Arg = TheCall->getArg(1)->IgnoreParenCasts();
5358 
5359  // These are valid if SecondArgIsLastNamedArgument is false after the next
5360  // block.
5361  QualType Type;
5362  SourceLocation ParamLoc;
5363  bool IsCRegister = false;
5364 
5365  if (const DeclRefExpr *DR = dyn_cast<DeclRefExpr>(Arg)) {
5366  if (const ParmVarDecl *PV = dyn_cast<ParmVarDecl>(DR->getDecl())) {
5367  SecondArgIsLastNamedArgument = PV == LastParam;
5368 
5369  Type = PV->getType();
5370  ParamLoc = PV->getLocation();
5371  IsCRegister =
5372  PV->getStorageClass() == SC_Register && !getLangOpts().CPlusPlus;
5373  }
5374  }
5375 
5376  if (!SecondArgIsLastNamedArgument)
5377  Diag(TheCall->getArg(1)->getBeginLoc(),
5378  diag::warn_second_arg_of_va_start_not_last_named_param);
5379  else if (IsCRegister || Type->isReferenceType() ||
5380  Type->isSpecificBuiltinType(BuiltinType::Float) || [=] {
5381  // Promotable integers are UB, but enumerations need a bit of
5382  // extra checking to see what their promotable type actually is.
5383  if (!Type->isPromotableIntegerType())
5384  return false;
5385  if (!Type->isEnumeralType())
5386  return true;
5387  const EnumDecl *ED = Type->getAs<EnumType>()->getDecl();
5388  return !(ED &&
5389  Context.typesAreCompatible(ED->getPromotionType(), Type));
5390  }()) {
5391  unsigned Reason = 0;
5392  if (Type->isReferenceType()) Reason = 1;
5393  else if (IsCRegister) Reason = 2;
5394  Diag(Arg->getBeginLoc(), diag::warn_va_start_type_is_undefined) << Reason;
5395  Diag(ParamLoc, diag::note_parameter_type) << Type;
5396  }
5397 
5398  TheCall->setType(Context.VoidTy);
5399  return false;
5400 }
5401 
5402 bool Sema::SemaBuiltinVAStartARMMicrosoft(CallExpr *Call) {
5403  // void __va_start(va_list *ap, const char *named_addr, size_t slot_size,
5404  // const char *named_addr);
5405 
5406  Expr *Func = Call->getCallee();
5407 
5408  if (Call->getNumArgs() < 3)
5409  return Diag(Call->getEndLoc(),
5410  diag::err_typecheck_call_too_few_args_at_least)
5411  << 0 /*function call*/ << 3 << Call->getNumArgs();
5412 
5413  // Type-check the first argument normally.
5414  if (checkBuiltinArgument(*this, Call, 0))
5415  return true;
5416 
5417  // Check that the current function is variadic.
5418  if (checkVAStartIsInVariadicFunction(*this, Func))
5419  return true;
5420 
5421  // __va_start on Windows does not validate the parameter qualifiers
5422 
5423  const Expr *Arg1 = Call->getArg(1)->IgnoreParens();
5424  const Type *Arg1Ty = Arg1->getType().getCanonicalType().getTypePtr();
5425 
5426  const Expr *Arg2 = Call->getArg(2)->IgnoreParens();
5427  const Type *Arg2Ty = Arg2->getType().getCanonicalType().getTypePtr();
5428 
5429  const QualType &ConstCharPtrTy =
5430  Context.getPointerType(Context.CharTy.withConst());
5431  if (!Arg1Ty->isPointerType() ||
5432  Arg1Ty->getPointeeType().withoutLocalFastQualifiers() != Context.CharTy)
5433  Diag(Arg1->getBeginLoc(), diag::err_typecheck_convert_incompatible)
5434  << Arg1->getType() << ConstCharPtrTy << 1 /* different class */
5435  << 0 /* qualifier difference */
5436  << 3 /* parameter mismatch */
5437  << 2 << Arg1->getType() << ConstCharPtrTy;
5438 
5439  const QualType SizeTy = Context.getSizeType();
5440  if (Arg2Ty->getCanonicalTypeInternal().withoutLocalFastQualifiers() != SizeTy)
5441  Diag(Arg2->getBeginLoc(), diag::err_typecheck_convert_incompatible)
5442  << Arg2->getType() << SizeTy << 1 /* different class */
5443  << 0 /* qualifier difference */
5444  << 3 /* parameter mismatch */
5445  << 3 << Arg2->getType() << SizeTy;
5446 
5447  return false;
5448 }
5449 
5450 /// SemaBuiltinUnorderedCompare - Handle functions like __builtin_isgreater and
5451 /// friends. This is declared to take (...), so we have to check everything.
5452 bool Sema::SemaBuiltinUnorderedCompare(CallExpr *TheCall) {
5453  if (TheCall->getNumArgs() < 2)
5454  return Diag(TheCall->getEndLoc(), diag::err_typecheck_call_too_few_args)
5455  << 0 << 2 << TheCall->getNumArgs() /*function call*/;
5456  if (TheCall->getNumArgs() > 2)
5457  return Diag(TheCall->getArg(2)->getBeginLoc(),
5458  diag::err_typecheck_call_too_many_args)
5459  << 0 /*function call*/ << 2 << TheCall->getNumArgs()
5460  << SourceRange(TheCall->getArg(2)->getBeginLoc(),
5461  (*(TheCall->arg_end() - 1))->getEndLoc());
5462 
5463  ExprResult OrigArg0 = TheCall->getArg(0);
5464  ExprResult OrigArg1 = TheCall->getArg(1);
5465 
5466  // Do standard promotions between the two arguments, returning their common
5467  // type.
5468  QualType Res = UsualArithmeticConversions(OrigArg0, OrigArg1, false);
5469  if (OrigArg0.isInvalid() || OrigArg1.isInvalid())
5470  return true;
5471 
5472  // Make sure any conversions are pushed back into the call; this is
5473  // type safe since unordered compare builtins are declared as "_Bool
5474  // foo(...)".
5475  TheCall->setArg(0, OrigArg0.get());
5476  TheCall->setArg(1, OrigArg1.get());
5477 
5478  if (OrigArg0.get()->isTypeDependent() || OrigArg1.get()->isTypeDependent())
5479  return false;
5480 
5481  // If the common type isn't a real floating type, then the arguments were
5482  // invalid for this operation.
5483  if (Res.isNull() || !Res->isRealFloatingType())
5484  return Diag(OrigArg0.get()->getBeginLoc(),
5485  diag::err_typecheck_call_invalid_ordered_compare)
5486  << OrigArg0.get()->getType() << OrigArg1.get()->getType()
5487  << SourceRange(OrigArg0.get()->getBeginLoc(),
5488  OrigArg1.get()->getEndLoc());
5489 
5490  return false;
5491 }
5492 
5493 /// SemaBuiltinSemaBuiltinFPClassification - Handle functions like
5494 /// __builtin_isnan and friends. This is declared to take (...), so we have
5495 /// to check everything. We expect the last argument to be a floating point
5496 /// value.
5497 bool Sema::SemaBuiltinFPClassification(CallExpr *TheCall, unsigned NumArgs) {
5498  if (TheCall->getNumArgs() < NumArgs)
5499  return Diag(TheCall->getEndLoc(), diag::err_typecheck_call_too_few_args)
5500  << 0 << NumArgs << TheCall->getNumArgs() /*function call*/;
5501  if (TheCall->getNumArgs() > NumArgs)
5502  return Diag(TheCall->getArg(NumArgs)->getBeginLoc(),
5503  diag::err_typecheck_call_too_many_args)
5504  << 0 /*function call*/ << NumArgs << TheCall->getNumArgs()
5505  << SourceRange(TheCall->getArg(NumArgs)->getBeginLoc(),
5506  (*(TheCall->arg_end() - 1))->getEndLoc());
5507 
5508  Expr *OrigArg = TheCall->getArg(NumArgs-1);
5509 
5510  if (OrigArg->isTypeDependent())
5511  return false;
5512 
5513  // This operation requires a non-_Complex floating-point number.
5514  if (!OrigArg->getType()->isRealFloatingType())
5515  return Diag(OrigArg->getBeginLoc(),
5516  diag::err_typecheck_call_invalid_unary_fp)
5517  << OrigArg->getType() << OrigArg->getSourceRange();
5518 
5519  // If this is an implicit conversion from float -> float, double, or
5520  // long double, remove it.
5521  if (ImplicitCastExpr *Cast = dyn_cast<ImplicitCastExpr>(OrigArg)) {
5522  // Only remove standard FloatCasts, leaving other casts inplace
5523  if (Cast->getCastKind() == CK_FloatingCast) {
5524  Expr *CastArg = Cast->getSubExpr();
5525  if (CastArg->getType()->isSpecificBuiltinType(BuiltinType::Float)) {
5526  assert(
5527  (Cast->getType()->isSpecificBuiltinType(BuiltinType::Double) ||
5528  Cast->getType()->isSpecificBuiltinType(BuiltinType::Float) ||
5529  Cast->getType()->isSpecificBuiltinType(BuiltinType::LongDouble)) &&
5530  "promotion from float to either float, double, or long double is "
5531  "the only expected cast here");
5532  Cast->setSubExpr(nullptr);
5533  TheCall->setArg(NumArgs-1, CastArg);
5534  }
5535  }
5536  }
5537 
5538  return false;
5539 }
5540 
5541 // Customized Sema Checking for VSX builtins that have the following signature:
5542 // vector [...] builtinName(vector [...], vector [...], const int);
5543 // Which takes the same type of vectors (any legal vector type) for the first
5544 // two arguments and takes compile time constant for the third argument.
5545 // Example builtins are :
5546 // vector double vec_xxpermdi(vector double, vector double, int);
5547 // vector short vec_xxsldwi(vector short, vector short, int);
5548 bool Sema::SemaBuiltinVSX(CallExpr *TheCall) {
5549  unsigned ExpectedNumArgs = 3;
5550  if (TheCall->getNumArgs() < ExpectedNumArgs)
5551  return Diag(TheCall->getEndLoc(),
5552  diag::err_typecheck_call_too_few_args_at_least)
5553  << 0 /*function call*/ << ExpectedNumArgs << TheCall->getNumArgs()
5554  << TheCall->getSourceRange();
5555 
5556  if (TheCall->getNumArgs() > ExpectedNumArgs)
5557  return Diag(TheCall->getEndLoc(),
5558  diag::err_typecheck_call_too_many_args_at_most)
5559  << 0 /*function call*/ << ExpectedNumArgs << TheCall->getNumArgs()
5560  << TheCall->getSourceRange();
5561 
5562  // Check the third argument is a compile time constant
5563  llvm::APSInt Value;
5564  if(!TheCall->getArg(2)->isIntegerConstantExpr(Value, Context))
5565  return Diag(TheCall->getBeginLoc(),
5566  diag::err_vsx_builtin_nonconstant_argument)
5567  << 3 /* argument index */ << TheCall->getDirectCallee()
5568  << SourceRange(TheCall->getArg(2)->getBeginLoc(),
5569  TheCall->getArg(2)->getEndLoc());
5570 
5571  QualType Arg1Ty = TheCall->getArg(0)->getType();
5572  QualType Arg2Ty = TheCall->getArg(1)->getType();
5573 
5574  // Check the type of argument 1 and argument 2 are vectors.
5575  SourceLocation BuiltinLoc = TheCall->getBeginLoc();
5576  if ((!Arg1Ty->isVectorType() && !Arg1Ty->isDependentType()) ||
5577  (!Arg2Ty->isVectorType() && !Arg2Ty->isDependentType())) {
5578  return Diag(BuiltinLoc, diag::err_vec_builtin_non_vector)
5579  << TheCall->getDirectCallee()
5580  << SourceRange(TheCall->getArg(0)->getBeginLoc(),
5581  TheCall->getArg(1)->getEndLoc());
5582  }
5583 
5584  // Check the first two arguments are the same type.
5585  if (!Context.hasSameUnqualifiedType(Arg1Ty, Arg2Ty)) {
5586  return Diag(BuiltinLoc, diag::err_vec_builtin_incompatible_vector)
5587  << TheCall->getDirectCallee()
5588  << SourceRange(TheCall->getArg(0)->getBeginLoc(),
5589  TheCall->getArg(1)->getEndLoc());
5590  }
5591 
5592  // When default clang type checking is turned off and the customized type
5593  // checking is used, the returning type of the function must be explicitly
5594  // set. Otherwise it is _Bool by default.
5595  TheCall->setType(Arg1Ty);
5596 
5597  return false;
5598 }
5599 
5600 /// SemaBuiltinShuffleVector - Handle __builtin_shufflevector.
5601 // This is declared to take (...), so we have to check everything.
5603  if (TheCall->getNumArgs() < 2)
5604  return ExprError(Diag(TheCall->getEndLoc(),
5605  diag::err_typecheck_call_too_few_args_at_least)
5606  << 0 /*function call*/ << 2 << TheCall->getNumArgs()
5607  << TheCall->getSourceRange());
5608 
5609  // Determine which of the following types of shufflevector we're checking:
5610  // 1) unary, vector mask: (lhs, mask)
5611  // 2) binary, scalar mask: (lhs, rhs, index, ..., index)
5612  QualType resType = TheCall->getArg(0)->getType();
5613  unsigned numElements = 0;
5614 
5615  if (!TheCall->getArg(0)->isTypeDependent() &&
5616  !TheCall->getArg(1)->isTypeDependent()) {
5617  QualType LHSType = TheCall->getArg(0)->getType();
5618  QualType RHSType = TheCall->getArg(1)->getType();
5619 
5620  if (!LHSType->isVectorType() || !RHSType->isVectorType())
5621  return ExprError(
5622  Diag(TheCall->getBeginLoc(), diag::err_vec_builtin_non_vector)
5623  << TheCall->getDirectCallee()
5624  << SourceRange(TheCall->getArg(0)->getBeginLoc(),
5625  TheCall->getArg(1)->getEndLoc()));
5626 
5627  numElements = LHSType->getAs<VectorType>()->getNumElements();
5628  unsigned numResElements = TheCall->getNumArgs() - 2;
5629 
5630  // Check to see if we have a call with 2 vector arguments, the unary shuffle
5631  // with mask. If so, verify that RHS is an integer vector type with the
5632  // same number of elts as lhs.
5633  if (TheCall->getNumArgs() == 2) {
5634  if (!RHSType->hasIntegerRepresentation() ||
5635  RHSType->getAs<VectorType>()->getNumElements() != numElements)
5636  return ExprError(Diag(TheCall->getBeginLoc(),
5637  diag::err_vec_builtin_incompatible_vector)
5638  << TheCall->getDirectCallee()
5639  << SourceRange(TheCall->getArg(1)->getBeginLoc(),
5640  TheCall->getArg(1)->getEndLoc()));
5641  } else if (!Context.hasSameUnqualifiedType(LHSType, RHSType)) {
5642  return ExprError(Diag(TheCall->getBeginLoc(),
5643  diag::err_vec_builtin_incompatible_vector)
5644  << TheCall->getDirectCallee()
5645  << SourceRange(TheCall->getArg(0)->getBeginLoc(),
5646  TheCall->getArg(1)->getEndLoc()));
5647  } else if (numElements != numResElements) {
5648  QualType eltType = LHSType->getAs<VectorType>()->getElementType();
5649  resType = Context.getVectorType(eltType, numResElements,
5651  }
5652  }
5653 
5654  for (unsigned i = 2; i < TheCall->getNumArgs(); i++) {
5655  if (TheCall->getArg(i)->isTypeDependent() ||
5656  TheCall->getArg(i)->isValueDependent())
5657  continue;
5658 
5659  llvm::APSInt Result(32);
5660  if (!TheCall->getArg(i)->isIntegerConstantExpr(Result, Context))
5661  return ExprError(Diag(TheCall->getBeginLoc(),
5662  diag::err_shufflevector_nonconstant_argument)
5663  << TheCall->getArg(i)->getSourceRange());
5664 
5665  // Allow -1 which will be translated to undef in the IR.
5666  if (Result.isSigned() && Result.isAllOnesValue())
5667  continue;
5668 
5669  if (Result.getActiveBits() > 64 || Result.getZExtValue() >= numElements*2)
5670  return ExprError(Diag(TheCall->getBeginLoc(),
5671  diag::err_shufflevector_argument_too_large)
5672  << TheCall->getArg(i)->getSourceRange());
5673  }
5674 
5675  SmallVector<Expr*, 32> exprs;
5676 
5677  for (unsigned i = 0, e = TheCall->getNumArgs(); i != e; i++) {
5678  exprs.push_back(TheCall->getArg(i));
5679  TheCall->setArg(i, nullptr);
5680  }
5681 
5682  return new (Context) ShuffleVectorExpr(Context, exprs, resType,
5683  TheCall->getCallee()->getBeginLoc(),
5684  TheCall->getRParenLoc());
5685 }
5686 
5687 /// SemaConvertVectorExpr - Handle __builtin_convertvector
5689  SourceLocation BuiltinLoc,
5690  SourceLocation RParenLoc) {
5691  ExprValueKind VK = VK_RValue;
5693  QualType DstTy = TInfo->getType();
5694  QualType SrcTy = E->getType();
5695 
5696  if (!SrcTy->isVectorType() && !SrcTy->isDependentType())
5697  return ExprError(Diag(BuiltinLoc,<