clang 20.0.0git
SemaX86.cpp
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1//===------ SemaX86.cpp ---------- X86 target-specific routines -----------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements semantic analysis functions specific to X86.
10//
11//===----------------------------------------------------------------------===//
12
13#include "clang/Sema/SemaX86.h"
14#include "clang/Basic/DiagnosticSema.h"
15#include "clang/Basic/TargetBuiltins.h"
16#include "clang/Sema/Attr.h"
17#include "clang/Sema/ParsedAttr.h"
18#include "clang/Sema/Sema.h"
19#include "llvm/ADT/APSInt.h"
20#include "llvm/TargetParser/Triple.h"
21#include <bitset>
22
23namespace clang {
24
25SemaX86::SemaX86(Sema &S) : SemaBase(S) {}
26
27// Check if the rounding mode is legal.
28bool SemaX86::CheckBuiltinRoundingOrSAE(unsigned BuiltinID, CallExpr *TheCall) {
29 // Indicates if this instruction has rounding control or just SAE.
30 bool HasRC = false;
31
32 unsigned ArgNum = 0;
33 switch (BuiltinID) {
34 default:
35 return false;
36 case X86::BI__builtin_ia32_vcvttsd2si32:
37 case X86::BI__builtin_ia32_vcvttsd2si64:
38 case X86::BI__builtin_ia32_vcvttsd2usi32:
39 case X86::BI__builtin_ia32_vcvttsd2usi64:
40 case X86::BI__builtin_ia32_vcvttss2si32:
41 case X86::BI__builtin_ia32_vcvttss2si64:
42 case X86::BI__builtin_ia32_vcvttss2usi32:
43 case X86::BI__builtin_ia32_vcvttss2usi64:
44 case X86::BI__builtin_ia32_vcvttsh2si32:
45 case X86::BI__builtin_ia32_vcvttsh2si64:
46 case X86::BI__builtin_ia32_vcvttsh2usi32:
47 case X86::BI__builtin_ia32_vcvttsh2usi64:
48 ArgNum = 1;
49 break;
50 case X86::BI__builtin_ia32_maxpd512:
51 case X86::BI__builtin_ia32_maxps512:
52 case X86::BI__builtin_ia32_minpd512:
53 case X86::BI__builtin_ia32_minps512:
54 case X86::BI__builtin_ia32_maxph512:
55 case X86::BI__builtin_ia32_minph512:
56 case X86::BI__builtin_ia32_vmaxpd256_round:
57 case X86::BI__builtin_ia32_vmaxps256_round:
58 case X86::BI__builtin_ia32_vminpd256_round:
59 case X86::BI__builtin_ia32_vminps256_round:
60 case X86::BI__builtin_ia32_vmaxph256_round:
61 case X86::BI__builtin_ia32_vminph256_round:
62 ArgNum = 2;
63 break;
64 case X86::BI__builtin_ia32_vcvtph2pd512_mask:
65 case X86::BI__builtin_ia32_vcvtph2psx512_mask:
66 case X86::BI__builtin_ia32_cvtps2pd512_mask:
67 case X86::BI__builtin_ia32_cvttpd2dq512_mask:
68 case X86::BI__builtin_ia32_cvttpd2qq512_mask:
69 case X86::BI__builtin_ia32_cvttpd2udq512_mask:
70 case X86::BI__builtin_ia32_cvttpd2uqq512_mask:
71 case X86::BI__builtin_ia32_cvttps2dq512_mask:
72 case X86::BI__builtin_ia32_cvttps2qq512_mask:
73 case X86::BI__builtin_ia32_cvttps2udq512_mask:
74 case X86::BI__builtin_ia32_cvttps2uqq512_mask:
75 case X86::BI__builtin_ia32_vcvttph2w512_mask:
76 case X86::BI__builtin_ia32_vcvttph2uw512_mask:
77 case X86::BI__builtin_ia32_vcvttph2dq512_mask:
78 case X86::BI__builtin_ia32_vcvttph2udq512_mask:
79 case X86::BI__builtin_ia32_vcvttph2qq512_mask:
80 case X86::BI__builtin_ia32_vcvttph2uqq512_mask:
81 case X86::BI__builtin_ia32_getexppd512_mask:
82 case X86::BI__builtin_ia32_getexpps512_mask:
83 case X86::BI__builtin_ia32_getexpph512_mask:
84 case X86::BI__builtin_ia32_vcomisd:
85 case X86::BI__builtin_ia32_vcomiss:
86 case X86::BI__builtin_ia32_vcomish:
87 case X86::BI__builtin_ia32_vcvtph2ps512_mask:
88 case X86::BI__builtin_ia32_vgetexppd256_round_mask:
89 case X86::BI__builtin_ia32_vgetexpps256_round_mask:
90 case X86::BI__builtin_ia32_vgetexpph256_round_mask:
91 case X86::BI__builtin_ia32_vcvttph2ibs256_mask:
92 case X86::BI__builtin_ia32_vcvttph2iubs256_mask:
93 case X86::BI__builtin_ia32_vcvttps2ibs256_mask:
94 case X86::BI__builtin_ia32_vcvttps2iubs256_mask:
95 case X86::BI__builtin_ia32_vcvttph2ibs512_mask:
96 case X86::BI__builtin_ia32_vcvttph2iubs512_mask:
97 case X86::BI__builtin_ia32_vcvttps2ibs512_mask:
98 case X86::BI__builtin_ia32_vcvttps2iubs512_mask:
99 ArgNum = 3;
100 break;
101 case X86::BI__builtin_ia32_cmppd512_mask:
102 case X86::BI__builtin_ia32_cmpps512_mask:
103 case X86::BI__builtin_ia32_cmpph512_mask:
104 case X86::BI__builtin_ia32_vcmppd256_round_mask:
105 case X86::BI__builtin_ia32_vcmpps256_round_mask:
106 case X86::BI__builtin_ia32_vcmpph256_round_mask:
107 case X86::BI__builtin_ia32_cmpsd_mask:
108 case X86::BI__builtin_ia32_cmpss_mask:
109 case X86::BI__builtin_ia32_cmpsh_mask:
110 case X86::BI__builtin_ia32_vcvtsh2sd_round_mask:
111 case X86::BI__builtin_ia32_vcvtsh2ss_round_mask:
112 case X86::BI__builtin_ia32_cvtss2sd_round_mask:
113 case X86::BI__builtin_ia32_getexpsd128_round_mask:
114 case X86::BI__builtin_ia32_getexpss128_round_mask:
115 case X86::BI__builtin_ia32_getexpsh128_round_mask:
116 case X86::BI__builtin_ia32_getmantpd512_mask:
117 case X86::BI__builtin_ia32_getmantps512_mask:
118 case X86::BI__builtin_ia32_getmantph512_mask:
119 case X86::BI__builtin_ia32_vgetmantpd256_round_mask:
120 case X86::BI__builtin_ia32_vgetmantps256_round_mask:
121 case X86::BI__builtin_ia32_vgetmantph256_round_mask:
122 case X86::BI__builtin_ia32_maxsd_round_mask:
123 case X86::BI__builtin_ia32_maxss_round_mask:
124 case X86::BI__builtin_ia32_maxsh_round_mask:
125 case X86::BI__builtin_ia32_minsd_round_mask:
126 case X86::BI__builtin_ia32_minss_round_mask:
127 case X86::BI__builtin_ia32_minsh_round_mask:
128 case X86::BI__builtin_ia32_reducepd512_mask:
129 case X86::BI__builtin_ia32_reduceps512_mask:
130 case X86::BI__builtin_ia32_reduceph512_mask:
131 case X86::BI__builtin_ia32_rndscalepd_mask:
132 case X86::BI__builtin_ia32_rndscaleps_mask:
133 case X86::BI__builtin_ia32_rndscaleph_mask:
134 case X86::BI__builtin_ia32_vreducepd256_round_mask:
135 case X86::BI__builtin_ia32_vreduceps256_round_mask:
136 case X86::BI__builtin_ia32_vreduceph256_round_mask:
137 case X86::BI__builtin_ia32_vrndscalepd256_round_mask:
138 case X86::BI__builtin_ia32_vrndscaleps256_round_mask:
139 case X86::BI__builtin_ia32_vrndscaleph256_round_mask:
140 ArgNum = 4;
141 break;
142 case X86::BI__builtin_ia32_fixupimmpd512_mask:
143 case X86::BI__builtin_ia32_fixupimmpd512_maskz:
144 case X86::BI__builtin_ia32_fixupimmps512_mask:
145 case X86::BI__builtin_ia32_fixupimmps512_maskz:
146 case X86::BI__builtin_ia32_vfixupimmpd256_round_mask:
147 case X86::BI__builtin_ia32_vfixupimmpd256_round_maskz:
148 case X86::BI__builtin_ia32_vfixupimmps256_round_mask:
149 case X86::BI__builtin_ia32_vfixupimmps256_round_maskz:
150 case X86::BI__builtin_ia32_fixupimmsd_mask:
151 case X86::BI__builtin_ia32_fixupimmsd_maskz:
152 case X86::BI__builtin_ia32_fixupimmss_mask:
153 case X86::BI__builtin_ia32_fixupimmss_maskz:
154 case X86::BI__builtin_ia32_getmantsd_round_mask:
155 case X86::BI__builtin_ia32_getmantss_round_mask:
156 case X86::BI__builtin_ia32_getmantsh_round_mask:
157 case X86::BI__builtin_ia32_rangepd512_mask:
158 case X86::BI__builtin_ia32_rangeps512_mask:
159 case X86::BI__builtin_ia32_vrangepd256_round_mask:
160 case X86::BI__builtin_ia32_vrangeps256_round_mask:
161 case X86::BI__builtin_ia32_rangesd128_round_mask:
162 case X86::BI__builtin_ia32_rangess128_round_mask:
163 case X86::BI__builtin_ia32_reducesd_mask:
164 case X86::BI__builtin_ia32_reducess_mask:
165 case X86::BI__builtin_ia32_reducesh_mask:
166 case X86::BI__builtin_ia32_rndscalesd_round_mask:
167 case X86::BI__builtin_ia32_rndscaless_round_mask:
168 case X86::BI__builtin_ia32_rndscalesh_round_mask:
169 case X86::BI__builtin_ia32_vminmaxpd256_round_mask:
170 case X86::BI__builtin_ia32_vminmaxps256_round_mask:
171 case X86::BI__builtin_ia32_vminmaxph256_round_mask:
172 case X86::BI__builtin_ia32_vminmaxpd512_round_mask:
173 case X86::BI__builtin_ia32_vminmaxps512_round_mask:
174 case X86::BI__builtin_ia32_vminmaxph512_round_mask:
175 case X86::BI__builtin_ia32_vminmaxsd_round_mask:
176 case X86::BI__builtin_ia32_vminmaxsh_round_mask:
177 case X86::BI__builtin_ia32_vminmaxss_round_mask:
178 ArgNum = 5;
179 break;
180 case X86::BI__builtin_ia32_vcvtsd2si64:
181 case X86::BI__builtin_ia32_vcvtsd2si32:
182 case X86::BI__builtin_ia32_vcvtsd2usi32:
183 case X86::BI__builtin_ia32_vcvtsd2usi64:
184 case X86::BI__builtin_ia32_vcvtss2si32:
185 case X86::BI__builtin_ia32_vcvtss2si64:
186 case X86::BI__builtin_ia32_vcvtss2usi32:
187 case X86::BI__builtin_ia32_vcvtss2usi64:
188 case X86::BI__builtin_ia32_vcvtsh2si32:
189 case X86::BI__builtin_ia32_vcvtsh2si64:
190 case X86::BI__builtin_ia32_vcvtsh2usi32:
191 case X86::BI__builtin_ia32_vcvtsh2usi64:
192 case X86::BI__builtin_ia32_sqrtpd512:
193 case X86::BI__builtin_ia32_sqrtps512:
194 case X86::BI__builtin_ia32_sqrtph512:
195 case X86::BI__builtin_ia32_vsqrtpd256_round:
196 case X86::BI__builtin_ia32_vsqrtps256_round:
197 case X86::BI__builtin_ia32_vsqrtph256_round:
198 ArgNum = 1;
199 HasRC = true;
200 break;
201 case X86::BI__builtin_ia32_addph512:
202 case X86::BI__builtin_ia32_divph512:
203 case X86::BI__builtin_ia32_mulph512:
204 case X86::BI__builtin_ia32_subph512:
205 case X86::BI__builtin_ia32_addpd512:
206 case X86::BI__builtin_ia32_addps512:
207 case X86::BI__builtin_ia32_divpd512:
208 case X86::BI__builtin_ia32_divps512:
209 case X86::BI__builtin_ia32_mulpd512:
210 case X86::BI__builtin_ia32_mulps512:
211 case X86::BI__builtin_ia32_subpd512:
212 case X86::BI__builtin_ia32_subps512:
213 case X86::BI__builtin_ia32_vaddpd256_round:
214 case X86::BI__builtin_ia32_vaddph256_round:
215 case X86::BI__builtin_ia32_vaddps256_round:
216 case X86::BI__builtin_ia32_vdivpd256_round:
217 case X86::BI__builtin_ia32_vdivph256_round:
218 case X86::BI__builtin_ia32_vdivps256_round:
219 case X86::BI__builtin_ia32_vmulpd256_round:
220 case X86::BI__builtin_ia32_vmulph256_round:
221 case X86::BI__builtin_ia32_vmulps256_round:
222 case X86::BI__builtin_ia32_vsubpd256_round:
223 case X86::BI__builtin_ia32_vsubph256_round:
224 case X86::BI__builtin_ia32_vsubps256_round:
225 case X86::BI__builtin_ia32_cvtsi2sd64:
226 case X86::BI__builtin_ia32_cvtsi2ss32:
227 case X86::BI__builtin_ia32_cvtsi2ss64:
228 case X86::BI__builtin_ia32_cvtusi2sd64:
229 case X86::BI__builtin_ia32_cvtusi2ss32:
230 case X86::BI__builtin_ia32_cvtusi2ss64:
231 case X86::BI__builtin_ia32_vcvtusi2sh:
232 case X86::BI__builtin_ia32_vcvtusi642sh:
233 case X86::BI__builtin_ia32_vcvtsi2sh:
234 case X86::BI__builtin_ia32_vcvtsi642sh:
235 ArgNum = 2;
236 HasRC = true;
237 break;
238 case X86::BI__builtin_ia32_cvtdq2ps512_mask:
239 case X86::BI__builtin_ia32_cvtudq2ps512_mask:
240 case X86::BI__builtin_ia32_vcvtpd2ph512_mask:
241 case X86::BI__builtin_ia32_vcvtps2phx512_mask:
242 case X86::BI__builtin_ia32_cvtpd2ps512_mask:
243 case X86::BI__builtin_ia32_cvtpd2dq512_mask:
244 case X86::BI__builtin_ia32_cvtpd2qq512_mask:
245 case X86::BI__builtin_ia32_cvtpd2udq512_mask:
246 case X86::BI__builtin_ia32_cvtpd2uqq512_mask:
247 case X86::BI__builtin_ia32_cvtps2dq512_mask:
248 case X86::BI__builtin_ia32_cvtps2qq512_mask:
249 case X86::BI__builtin_ia32_cvtps2udq512_mask:
250 case X86::BI__builtin_ia32_cvtps2uqq512_mask:
251 case X86::BI__builtin_ia32_cvtqq2pd512_mask:
252 case X86::BI__builtin_ia32_cvtqq2ps512_mask:
253 case X86::BI__builtin_ia32_cvtuqq2pd512_mask:
254 case X86::BI__builtin_ia32_cvtuqq2ps512_mask:
255 case X86::BI__builtin_ia32_vcvtdq2ph512_mask:
256 case X86::BI__builtin_ia32_vcvtudq2ph512_mask:
257 case X86::BI__builtin_ia32_vcvtw2ph512_mask:
258 case X86::BI__builtin_ia32_vcvtuw2ph512_mask:
259 case X86::BI__builtin_ia32_vcvtph2w512_mask:
260 case X86::BI__builtin_ia32_vcvtph2uw512_mask:
261 case X86::BI__builtin_ia32_vcvtph2dq512_mask:
262 case X86::BI__builtin_ia32_vcvtph2udq512_mask:
263 case X86::BI__builtin_ia32_vcvtph2qq512_mask:
264 case X86::BI__builtin_ia32_vcvtph2uqq512_mask:
265 case X86::BI__builtin_ia32_vcvtqq2ph512_mask:
266 case X86::BI__builtin_ia32_vcvtuqq2ph512_mask:
267 case X86::BI__builtin_ia32_vcvtph2pd256_round_mask:
268 case X86::BI__builtin_ia32_vcvtph2psx256_round_mask:
269 case X86::BI__builtin_ia32_vcvtps2pd256_round_mask:
270 case X86::BI__builtin_ia32_vcvttpd2dq256_round_mask:
271 case X86::BI__builtin_ia32_vcvttpd2qq256_round_mask:
272 case X86::BI__builtin_ia32_vcvttpd2udq256_round_mask:
273 case X86::BI__builtin_ia32_vcvttpd2uqq256_round_mask:
274 case X86::BI__builtin_ia32_vcvttps2dq256_round_mask:
275 case X86::BI__builtin_ia32_vcvttps2qq256_round_mask:
276 case X86::BI__builtin_ia32_vcvttps2udq256_round_mask:
277 case X86::BI__builtin_ia32_vcvttps2uqq256_round_mask:
278 case X86::BI__builtin_ia32_vcvttph2w256_round_mask:
279 case X86::BI__builtin_ia32_vcvttph2uw256_round_mask:
280 case X86::BI__builtin_ia32_vcvttph2dq256_round_mask:
281 case X86::BI__builtin_ia32_vcvttph2udq256_round_mask:
282 case X86::BI__builtin_ia32_vcvttph2qq256_round_mask:
283 case X86::BI__builtin_ia32_vcvttph2uqq256_round_mask:
284 case X86::BI__builtin_ia32_vcvtdq2ps256_round_mask:
285 case X86::BI__builtin_ia32_vcvtudq2ps256_round_mask:
286 case X86::BI__builtin_ia32_vcvtpd2ph256_round_mask:
287 case X86::BI__builtin_ia32_vcvtps2phx256_round_mask:
288 case X86::BI__builtin_ia32_vcvtpd2ps256_round_mask:
289 case X86::BI__builtin_ia32_vcvtpd2dq256_round_mask:
290 case X86::BI__builtin_ia32_vcvtpd2qq256_round_mask:
291 case X86::BI__builtin_ia32_vcvtpd2udq256_round_mask:
292 case X86::BI__builtin_ia32_vcvtpd2uqq256_round_mask:
293 case X86::BI__builtin_ia32_vcvtps2dq256_round_mask:
294 case X86::BI__builtin_ia32_vcvtps2qq256_round_mask:
295 case X86::BI__builtin_ia32_vcvtps2udq256_round_mask:
296 case X86::BI__builtin_ia32_vcvtps2uqq256_round_mask:
297 case X86::BI__builtin_ia32_vcvtqq2pd256_round_mask:
298 case X86::BI__builtin_ia32_vcvtqq2ps256_round_mask:
299 case X86::BI__builtin_ia32_vcvtuqq2pd256_round_mask:
300 case X86::BI__builtin_ia32_vcvtuqq2ps256_round_mask:
301 case X86::BI__builtin_ia32_vcvtdq2ph256_round_mask:
302 case X86::BI__builtin_ia32_vcvtudq2ph256_round_mask:
303 case X86::BI__builtin_ia32_vcvtw2ph256_round_mask:
304 case X86::BI__builtin_ia32_vcvtuw2ph256_round_mask:
305 case X86::BI__builtin_ia32_vcvtph2w256_round_mask:
306 case X86::BI__builtin_ia32_vcvtph2uw256_round_mask:
307 case X86::BI__builtin_ia32_vcvtph2dq256_round_mask:
308 case X86::BI__builtin_ia32_vcvtph2udq256_round_mask:
309 case X86::BI__builtin_ia32_vcvtph2qq256_round_mask:
310 case X86::BI__builtin_ia32_vcvtph2uqq256_round_mask:
311 case X86::BI__builtin_ia32_vcvtqq2ph256_round_mask:
312 case X86::BI__builtin_ia32_vcvtuqq2ph256_round_mask:
313 case X86::BI__builtin_ia32_vcvtph2ibs256_mask:
314 case X86::BI__builtin_ia32_vcvtph2iubs256_mask:
315 case X86::BI__builtin_ia32_vcvtps2ibs256_mask:
316 case X86::BI__builtin_ia32_vcvtps2iubs256_mask:
317 case X86::BI__builtin_ia32_vcvtph2ibs512_mask:
318 case X86::BI__builtin_ia32_vcvtph2iubs512_mask:
319 case X86::BI__builtin_ia32_vcvtps2ibs512_mask:
320 case X86::BI__builtin_ia32_vcvtps2iubs512_mask:
321 ArgNum = 3;
322 HasRC = true;
323 break;
324 case X86::BI__builtin_ia32_addsh_round_mask:
325 case X86::BI__builtin_ia32_addss_round_mask:
326 case X86::BI__builtin_ia32_addsd_round_mask:
327 case X86::BI__builtin_ia32_divsh_round_mask:
328 case X86::BI__builtin_ia32_divss_round_mask:
329 case X86::BI__builtin_ia32_divsd_round_mask:
330 case X86::BI__builtin_ia32_mulsh_round_mask:
331 case X86::BI__builtin_ia32_mulss_round_mask:
332 case X86::BI__builtin_ia32_mulsd_round_mask:
333 case X86::BI__builtin_ia32_subsh_round_mask:
334 case X86::BI__builtin_ia32_subss_round_mask:
335 case X86::BI__builtin_ia32_subsd_round_mask:
336 case X86::BI__builtin_ia32_scalefph512_mask:
337 case X86::BI__builtin_ia32_scalefpd512_mask:
338 case X86::BI__builtin_ia32_scalefps512_mask:
339 case X86::BI__builtin_ia32_vscalefph256_round_mask:
340 case X86::BI__builtin_ia32_vscalefpd256_round_mask:
341 case X86::BI__builtin_ia32_vscalefps256_round_mask:
342 case X86::BI__builtin_ia32_scalefsd_round_mask:
343 case X86::BI__builtin_ia32_scalefss_round_mask:
344 case X86::BI__builtin_ia32_scalefsh_round_mask:
345 case X86::BI__builtin_ia32_cvtsd2ss_round_mask:
346 case X86::BI__builtin_ia32_vcvtss2sh_round_mask:
347 case X86::BI__builtin_ia32_vcvtsd2sh_round_mask:
348 case X86::BI__builtin_ia32_sqrtsd_round_mask:
349 case X86::BI__builtin_ia32_sqrtss_round_mask:
350 case X86::BI__builtin_ia32_sqrtsh_round_mask:
351 case X86::BI__builtin_ia32_vfmaddsd3_mask:
352 case X86::BI__builtin_ia32_vfmaddsd3_maskz:
353 case X86::BI__builtin_ia32_vfmaddsd3_mask3:
354 case X86::BI__builtin_ia32_vfmaddss3_mask:
355 case X86::BI__builtin_ia32_vfmaddss3_maskz:
356 case X86::BI__builtin_ia32_vfmaddss3_mask3:
357 case X86::BI__builtin_ia32_vfmaddsh3_mask:
358 case X86::BI__builtin_ia32_vfmaddsh3_maskz:
359 case X86::BI__builtin_ia32_vfmaddsh3_mask3:
360 case X86::BI__builtin_ia32_vfmaddpd512_mask:
361 case X86::BI__builtin_ia32_vfmaddpd512_maskz:
362 case X86::BI__builtin_ia32_vfmaddpd512_mask3:
363 case X86::BI__builtin_ia32_vfmsubpd512_mask3:
364 case X86::BI__builtin_ia32_vfmaddps512_mask:
365 case X86::BI__builtin_ia32_vfmaddps512_maskz:
366 case X86::BI__builtin_ia32_vfmaddps512_mask3:
367 case X86::BI__builtin_ia32_vfmsubps512_mask3:
368 case X86::BI__builtin_ia32_vfmaddph512_mask:
369 case X86::BI__builtin_ia32_vfmaddph512_maskz:
370 case X86::BI__builtin_ia32_vfmaddph512_mask3:
371 case X86::BI__builtin_ia32_vfmsubph512_mask3:
372 case X86::BI__builtin_ia32_vfmaddsubpd512_mask:
373 case X86::BI__builtin_ia32_vfmaddsubpd512_maskz:
374 case X86::BI__builtin_ia32_vfmaddsubpd512_mask3:
375 case X86::BI__builtin_ia32_vfmsubaddpd512_mask3:
376 case X86::BI__builtin_ia32_vfmaddsubps512_mask:
377 case X86::BI__builtin_ia32_vfmaddsubps512_maskz:
378 case X86::BI__builtin_ia32_vfmaddsubps512_mask3:
379 case X86::BI__builtin_ia32_vfmsubaddps512_mask3:
380 case X86::BI__builtin_ia32_vfmaddsubph512_mask:
381 case X86::BI__builtin_ia32_vfmaddsubph512_maskz:
382 case X86::BI__builtin_ia32_vfmaddsubph512_mask3:
383 case X86::BI__builtin_ia32_vfmsubaddph512_mask3:
384 case X86::BI__builtin_ia32_vfmaddpd256_round_mask:
385 case X86::BI__builtin_ia32_vfmaddpd256_round_maskz:
386 case X86::BI__builtin_ia32_vfmaddpd256_round_mask3:
387 case X86::BI__builtin_ia32_vfmsubpd256_round_mask3:
388 case X86::BI__builtin_ia32_vfmaddps256_round_mask:
389 case X86::BI__builtin_ia32_vfmaddps256_round_maskz:
390 case X86::BI__builtin_ia32_vfmaddps256_round_mask3:
391 case X86::BI__builtin_ia32_vfmsubps256_round_mask3:
392 case X86::BI__builtin_ia32_vfmaddph256_round_mask:
393 case X86::BI__builtin_ia32_vfmaddph256_round_maskz:
394 case X86::BI__builtin_ia32_vfmaddph256_round_mask3:
395 case X86::BI__builtin_ia32_vfmsubph256_round_mask3:
396 case X86::BI__builtin_ia32_vfmaddsubpd256_round_mask:
397 case X86::BI__builtin_ia32_vfmaddsubpd256_round_maskz:
398 case X86::BI__builtin_ia32_vfmaddsubpd256_round_mask3:
399 case X86::BI__builtin_ia32_vfmsubaddpd256_round_mask3:
400 case X86::BI__builtin_ia32_vfmaddsubps256_round_mask:
401 case X86::BI__builtin_ia32_vfmaddsubps256_round_maskz:
402 case X86::BI__builtin_ia32_vfmaddsubps256_round_mask3:
403 case X86::BI__builtin_ia32_vfmsubaddps256_round_mask3:
404 case X86::BI__builtin_ia32_vfmaddsubph256_round_mask:
405 case X86::BI__builtin_ia32_vfmaddsubph256_round_maskz:
406 case X86::BI__builtin_ia32_vfmaddsubph256_round_mask3:
407 case X86::BI__builtin_ia32_vfmsubaddph256_round_mask3:
408 case X86::BI__builtin_ia32_vfmaddcph256_round_mask:
409 case X86::BI__builtin_ia32_vfmaddcph256_round_maskz:
410 case X86::BI__builtin_ia32_vfmaddcph256_round_mask3:
411 case X86::BI__builtin_ia32_vfcmaddcph256_round_mask:
412 case X86::BI__builtin_ia32_vfcmaddcph256_round_maskz:
413 case X86::BI__builtin_ia32_vfcmaddcph256_round_mask3:
414 case X86::BI__builtin_ia32_vfmulcph256_round_mask:
415 case X86::BI__builtin_ia32_vfcmulcph256_round_mask:
416 case X86::BI__builtin_ia32_vfmaddcsh_mask:
417 case X86::BI__builtin_ia32_vfmaddcsh_round_mask:
418 case X86::BI__builtin_ia32_vfmaddcsh_round_mask3:
419 case X86::BI__builtin_ia32_vfmaddcph512_mask:
420 case X86::BI__builtin_ia32_vfmaddcph512_maskz:
421 case X86::BI__builtin_ia32_vfmaddcph512_mask3:
422 case X86::BI__builtin_ia32_vfcmaddcsh_mask:
423 case X86::BI__builtin_ia32_vfcmaddcsh_round_mask:
424 case X86::BI__builtin_ia32_vfcmaddcsh_round_mask3:
425 case X86::BI__builtin_ia32_vfcmaddcph512_mask:
426 case X86::BI__builtin_ia32_vfcmaddcph512_maskz:
427 case X86::BI__builtin_ia32_vfcmaddcph512_mask3:
428 case X86::BI__builtin_ia32_vfmulcsh_mask:
429 case X86::BI__builtin_ia32_vfmulcph512_mask:
430 case X86::BI__builtin_ia32_vfcmulcsh_mask:
431 case X86::BI__builtin_ia32_vfcmulcph512_mask:
432 ArgNum = 4;
433 HasRC = true;
434 break;
435 }
436
437 llvm::APSInt Result;
438
439 // We can't check the value of a dependent argument.
440 Expr *Arg = TheCall->getArg(ArgNum);
441 if (Arg->isTypeDependent() || Arg->isValueDependent())
442 return false;
443
444 // Check constant-ness first.
445 if (SemaRef.BuiltinConstantArg(TheCall, ArgNum, Result))
446 return true;
447
448 // Make sure rounding mode is either ROUND_CUR_DIRECTION or ROUND_NO_EXC bit
449 // is set. If the intrinsic has rounding control(bits 1:0), make sure its only
450 // combined with ROUND_NO_EXC. If the intrinsic does not have rounding
451 // control, allow ROUND_NO_EXC and ROUND_CUR_DIRECTION together.
452 if (Result == 4 /*ROUND_CUR_DIRECTION*/ || Result == 8 /*ROUND_NO_EXC*/ ||
453 (!HasRC && Result == 12 /*ROUND_CUR_DIRECTION|ROUND_NO_EXC*/) ||
454 (HasRC && Result.getZExtValue() >= 8 && Result.getZExtValue() <= 11))
455 return false;
456
457 return Diag(TheCall->getBeginLoc(), diag::err_x86_builtin_invalid_rounding)
458 << Arg->getSourceRange();
459}
460
461// Check if the gather/scatter scale is legal.
462bool SemaX86::CheckBuiltinGatherScatterScale(unsigned BuiltinID,
463 CallExpr *TheCall) {
464 unsigned ArgNum = 0;
465 switch (BuiltinID) {
466 default:
467 return false;
468 case X86::BI__builtin_ia32_gatherd_pd:
469 case X86::BI__builtin_ia32_gatherd_pd256:
470 case X86::BI__builtin_ia32_gatherq_pd:
471 case X86::BI__builtin_ia32_gatherq_pd256:
472 case X86::BI__builtin_ia32_gatherd_ps:
473 case X86::BI__builtin_ia32_gatherd_ps256:
474 case X86::BI__builtin_ia32_gatherq_ps:
475 case X86::BI__builtin_ia32_gatherq_ps256:
476 case X86::BI__builtin_ia32_gatherd_q:
477 case X86::BI__builtin_ia32_gatherd_q256:
478 case X86::BI__builtin_ia32_gatherq_q:
479 case X86::BI__builtin_ia32_gatherq_q256:
480 case X86::BI__builtin_ia32_gatherd_d:
481 case X86::BI__builtin_ia32_gatherd_d256:
482 case X86::BI__builtin_ia32_gatherq_d:
483 case X86::BI__builtin_ia32_gatherq_d256:
484 case X86::BI__builtin_ia32_gather3div2df:
485 case X86::BI__builtin_ia32_gather3div2di:
486 case X86::BI__builtin_ia32_gather3div4df:
487 case X86::BI__builtin_ia32_gather3div4di:
488 case X86::BI__builtin_ia32_gather3div4sf:
489 case X86::BI__builtin_ia32_gather3div4si:
490 case X86::BI__builtin_ia32_gather3div8sf:
491 case X86::BI__builtin_ia32_gather3div8si:
492 case X86::BI__builtin_ia32_gather3siv2df:
493 case X86::BI__builtin_ia32_gather3siv2di:
494 case X86::BI__builtin_ia32_gather3siv4df:
495 case X86::BI__builtin_ia32_gather3siv4di:
496 case X86::BI__builtin_ia32_gather3siv4sf:
497 case X86::BI__builtin_ia32_gather3siv4si:
498 case X86::BI__builtin_ia32_gather3siv8sf:
499 case X86::BI__builtin_ia32_gather3siv8si:
500 case X86::BI__builtin_ia32_gathersiv8df:
501 case X86::BI__builtin_ia32_gathersiv16sf:
502 case X86::BI__builtin_ia32_gatherdiv8df:
503 case X86::BI__builtin_ia32_gatherdiv16sf:
504 case X86::BI__builtin_ia32_gathersiv8di:
505 case X86::BI__builtin_ia32_gathersiv16si:
506 case X86::BI__builtin_ia32_gatherdiv8di:
507 case X86::BI__builtin_ia32_gatherdiv16si:
508 case X86::BI__builtin_ia32_scatterdiv2df:
509 case X86::BI__builtin_ia32_scatterdiv2di:
510 case X86::BI__builtin_ia32_scatterdiv4df:
511 case X86::BI__builtin_ia32_scatterdiv4di:
512 case X86::BI__builtin_ia32_scatterdiv4sf:
513 case X86::BI__builtin_ia32_scatterdiv4si:
514 case X86::BI__builtin_ia32_scatterdiv8sf:
515 case X86::BI__builtin_ia32_scatterdiv8si:
516 case X86::BI__builtin_ia32_scattersiv2df:
517 case X86::BI__builtin_ia32_scattersiv2di:
518 case X86::BI__builtin_ia32_scattersiv4df:
519 case X86::BI__builtin_ia32_scattersiv4di:
520 case X86::BI__builtin_ia32_scattersiv4sf:
521 case X86::BI__builtin_ia32_scattersiv4si:
522 case X86::BI__builtin_ia32_scattersiv8sf:
523 case X86::BI__builtin_ia32_scattersiv8si:
524 case X86::BI__builtin_ia32_scattersiv8df:
525 case X86::BI__builtin_ia32_scattersiv16sf:
526 case X86::BI__builtin_ia32_scatterdiv8df:
527 case X86::BI__builtin_ia32_scatterdiv16sf:
528 case X86::BI__builtin_ia32_scattersiv8di:
529 case X86::BI__builtin_ia32_scattersiv16si:
530 case X86::BI__builtin_ia32_scatterdiv8di:
531 case X86::BI__builtin_ia32_scatterdiv16si:
532 ArgNum = 4;
533 break;
534 }
535
536 llvm::APSInt Result;
537
538 // We can't check the value of a dependent argument.
539 Expr *Arg = TheCall->getArg(ArgNum);
540 if (Arg->isTypeDependent() || Arg->isValueDependent())
541 return false;
542
543 // Check constant-ness first.
544 if (SemaRef.BuiltinConstantArg(TheCall, ArgNum, Result))
545 return true;
546
547 if (Result == 1 || Result == 2 || Result == 4 || Result == 8)
548 return false;
549
550 return Diag(TheCall->getBeginLoc(), diag::err_x86_builtin_invalid_scale)
551 << Arg->getSourceRange();
552}
553
554enum { TileRegLow = 0, TileRegHigh = 7 };
555
556bool SemaX86::CheckBuiltinTileArgumentsRange(CallExpr *TheCall,
557 ArrayRef<int> ArgNums) {
558 for (int ArgNum : ArgNums) {
559 if (SemaRef.BuiltinConstantArgRange(TheCall, ArgNum, TileRegLow,
560 TileRegHigh))
561 return true;
562 }
563 return false;
564}
565
566bool SemaX86::CheckBuiltinTileDuplicate(CallExpr *TheCall,
567 ArrayRef<int> ArgNums) {
568 // Because the max number of tile register is TileRegHigh + 1, so here we use
569 // each bit to represent the usage of them in bitset.
570 std::bitset<TileRegHigh + 1> ArgValues;
571 for (int ArgNum : ArgNums) {
572 Expr *Arg = TheCall->getArg(ArgNum);
573 if (Arg->isTypeDependent() || Arg->isValueDependent())
574 continue;
575
576 llvm::APSInt Result;
577 if (SemaRef.BuiltinConstantArg(TheCall, ArgNum, Result))
578 return true;
579 int ArgExtValue = Result.getExtValue();
580 assert((ArgExtValue >= TileRegLow && ArgExtValue <= TileRegHigh) &&
581 "Incorrect tile register num.");
582 if (ArgValues.test(ArgExtValue))
583 return Diag(TheCall->getBeginLoc(),
584 diag::err_x86_builtin_tile_arg_duplicate)
585 << TheCall->getArg(ArgNum)->getSourceRange();
586 ArgValues.set(ArgExtValue);
587 }
588 return false;
589}
590
591bool SemaX86::CheckBuiltinTileRangeAndDuplicate(CallExpr *TheCall,
592 ArrayRef<int> ArgNums) {
593 return CheckBuiltinTileArgumentsRange(TheCall, ArgNums) ||
594 CheckBuiltinTileDuplicate(TheCall, ArgNums);
595}
596
597bool SemaX86::CheckBuiltinTileArguments(unsigned BuiltinID, CallExpr *TheCall) {
598 switch (BuiltinID) {
599 default:
600 return false;
601 case X86::BI__builtin_ia32_tileloadd64:
602 case X86::BI__builtin_ia32_tileloaddt164:
603 case X86::BI__builtin_ia32_tilestored64:
604 case X86::BI__builtin_ia32_tilezero:
605 return CheckBuiltinTileArgumentsRange(TheCall, 0);
606 case X86::BI__builtin_ia32_tdpbssd:
607 case X86::BI__builtin_ia32_tdpbsud:
608 case X86::BI__builtin_ia32_tdpbusd:
609 case X86::BI__builtin_ia32_tdpbuud:
610 case X86::BI__builtin_ia32_tdpbf16ps:
611 case X86::BI__builtin_ia32_tdpfp16ps:
612 case X86::BI__builtin_ia32_tcmmimfp16ps:
613 case X86::BI__builtin_ia32_tcmmrlfp16ps:
614 return CheckBuiltinTileRangeAndDuplicate(TheCall, {0, 1, 2});
615 }
616}
617static bool isX86_32Builtin(unsigned BuiltinID) {
618 // These builtins only work on x86-32 targets.
619 switch (BuiltinID) {
620 case X86::BI__builtin_ia32_readeflags_u32:
621 case X86::BI__builtin_ia32_writeeflags_u32:
622 return true;
623 }
624
625 return false;
626}
627
628bool SemaX86::CheckBuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID,
629 CallExpr *TheCall) {
630 // Check for 32-bit only builtins on a 64-bit target.
631 const llvm::Triple &TT = TI.getTriple();
632 if (TT.getArch() != llvm::Triple::x86 && isX86_32Builtin(BuiltinID))
633 return Diag(TheCall->getCallee()->getBeginLoc(),
634 diag::err_32_bit_builtin_64_bit_tgt);
635
636 // If the intrinsic has rounding or SAE make sure its valid.
637 if (CheckBuiltinRoundingOrSAE(BuiltinID, TheCall))
638 return true;
639
640 // If the intrinsic has a gather/scatter scale immediate make sure its valid.
641 if (CheckBuiltinGatherScatterScale(BuiltinID, TheCall))
642 return true;
643
644 // If the intrinsic has a tile arguments, make sure they are valid.
645 if (CheckBuiltinTileArguments(BuiltinID, TheCall))
646 return true;
647
648 // For intrinsics which take an immediate value as part of the instruction,
649 // range check them here.
650 int i = 0, l = 0, u = 0;
651 switch (BuiltinID) {
652 default:
653 return false;
654 case X86::BI__builtin_ia32_vec_ext_v2di:
655 case X86::BI__builtin_ia32_vextractf128_pd256:
656 case X86::BI__builtin_ia32_vextractf128_ps256:
657 case X86::BI__builtin_ia32_vextractf128_si256:
658 case X86::BI__builtin_ia32_extract128i256:
659 case X86::BI__builtin_ia32_extractf64x4_mask:
660 case X86::BI__builtin_ia32_extracti64x4_mask:
661 case X86::BI__builtin_ia32_extractf32x8_mask:
662 case X86::BI__builtin_ia32_extracti32x8_mask:
663 case X86::BI__builtin_ia32_extractf64x2_256_mask:
664 case X86::BI__builtin_ia32_extracti64x2_256_mask:
665 case X86::BI__builtin_ia32_extractf32x4_256_mask:
666 case X86::BI__builtin_ia32_extracti32x4_256_mask:
667 i = 1;
668 l = 0;
669 u = 1;
670 break;
671 case X86::BI__builtin_ia32_vec_set_v2di:
672 case X86::BI__builtin_ia32_vinsertf128_pd256:
673 case X86::BI__builtin_ia32_vinsertf128_ps256:
674 case X86::BI__builtin_ia32_vinsertf128_si256:
675 case X86::BI__builtin_ia32_insert128i256:
676 case X86::BI__builtin_ia32_insertf32x8:
677 case X86::BI__builtin_ia32_inserti32x8:
678 case X86::BI__builtin_ia32_insertf64x4:
679 case X86::BI__builtin_ia32_inserti64x4:
680 case X86::BI__builtin_ia32_insertf64x2_256:
681 case X86::BI__builtin_ia32_inserti64x2_256:
682 case X86::BI__builtin_ia32_insertf32x4_256:
683 case X86::BI__builtin_ia32_inserti32x4_256:
684 i = 2;
685 l = 0;
686 u = 1;
687 break;
688 case X86::BI__builtin_ia32_vpermilpd:
689 case X86::BI__builtin_ia32_vec_ext_v4hi:
690 case X86::BI__builtin_ia32_vec_ext_v4si:
691 case X86::BI__builtin_ia32_vec_ext_v4sf:
692 case X86::BI__builtin_ia32_vec_ext_v4di:
693 case X86::BI__builtin_ia32_extractf32x4_mask:
694 case X86::BI__builtin_ia32_extracti32x4_mask:
695 case X86::BI__builtin_ia32_extractf64x2_512_mask:
696 case X86::BI__builtin_ia32_extracti64x2_512_mask:
697 i = 1;
698 l = 0;
699 u = 3;
700 break;
701 case X86::BI_mm_prefetch:
702 case X86::BI__builtin_ia32_vec_ext_v8hi:
703 case X86::BI__builtin_ia32_vec_ext_v8si:
704 i = 1;
705 l = 0;
706 u = 7;
707 break;
708 case X86::BI__builtin_ia32_sha1rnds4:
709 case X86::BI__builtin_ia32_blendpd:
710 case X86::BI__builtin_ia32_shufpd:
711 case X86::BI__builtin_ia32_vec_set_v4hi:
712 case X86::BI__builtin_ia32_vec_set_v4si:
713 case X86::BI__builtin_ia32_vec_set_v4di:
714 case X86::BI__builtin_ia32_shuf_f32x4_256:
715 case X86::BI__builtin_ia32_shuf_f64x2_256:
716 case X86::BI__builtin_ia32_shuf_i32x4_256:
717 case X86::BI__builtin_ia32_shuf_i64x2_256:
718 case X86::BI__builtin_ia32_insertf64x2_512:
719 case X86::BI__builtin_ia32_inserti64x2_512:
720 case X86::BI__builtin_ia32_insertf32x4:
721 case X86::BI__builtin_ia32_inserti32x4:
722 i = 2;
723 l = 0;
724 u = 3;
725 break;
726 case X86::BI__builtin_ia32_vpermil2pd:
727 case X86::BI__builtin_ia32_vpermil2pd256:
728 case X86::BI__builtin_ia32_vpermil2ps:
729 case X86::BI__builtin_ia32_vpermil2ps256:
730 i = 3;
731 l = 0;
732 u = 3;
733 break;
734 case X86::BI__builtin_ia32_cmpb128_mask:
735 case X86::BI__builtin_ia32_cmpw128_mask:
736 case X86::BI__builtin_ia32_cmpd128_mask:
737 case X86::BI__builtin_ia32_cmpq128_mask:
738 case X86::BI__builtin_ia32_cmpb256_mask:
739 case X86::BI__builtin_ia32_cmpw256_mask:
740 case X86::BI__builtin_ia32_cmpd256_mask:
741 case X86::BI__builtin_ia32_cmpq256_mask:
742 case X86::BI__builtin_ia32_cmpb512_mask:
743 case X86::BI__builtin_ia32_cmpw512_mask:
744 case X86::BI__builtin_ia32_cmpd512_mask:
745 case X86::BI__builtin_ia32_cmpq512_mask:
746 case X86::BI__builtin_ia32_ucmpb128_mask:
747 case X86::BI__builtin_ia32_ucmpw128_mask:
748 case X86::BI__builtin_ia32_ucmpd128_mask:
749 case X86::BI__builtin_ia32_ucmpq128_mask:
750 case X86::BI__builtin_ia32_ucmpb256_mask:
751 case X86::BI__builtin_ia32_ucmpw256_mask:
752 case X86::BI__builtin_ia32_ucmpd256_mask:
753 case X86::BI__builtin_ia32_ucmpq256_mask:
754 case X86::BI__builtin_ia32_ucmpb512_mask:
755 case X86::BI__builtin_ia32_ucmpw512_mask:
756 case X86::BI__builtin_ia32_ucmpd512_mask:
757 case X86::BI__builtin_ia32_ucmpq512_mask:
758 case X86::BI__builtin_ia32_vpcomub:
759 case X86::BI__builtin_ia32_vpcomuw:
760 case X86::BI__builtin_ia32_vpcomud:
761 case X86::BI__builtin_ia32_vpcomuq:
762 case X86::BI__builtin_ia32_vpcomb:
763 case X86::BI__builtin_ia32_vpcomw:
764 case X86::BI__builtin_ia32_vpcomd:
765 case X86::BI__builtin_ia32_vpcomq:
766 case X86::BI__builtin_ia32_vec_set_v8hi:
767 case X86::BI__builtin_ia32_vec_set_v8si:
768 i = 2;
769 l = 0;
770 u = 7;
771 break;
772 case X86::BI__builtin_ia32_vpermilpd256:
773 case X86::BI__builtin_ia32_roundps:
774 case X86::BI__builtin_ia32_roundpd:
775 case X86::BI__builtin_ia32_roundps256:
776 case X86::BI__builtin_ia32_roundpd256:
777 case X86::BI__builtin_ia32_getmantpd128_mask:
778 case X86::BI__builtin_ia32_getmantpd256_mask:
779 case X86::BI__builtin_ia32_getmantps128_mask:
780 case X86::BI__builtin_ia32_getmantps256_mask:
781 case X86::BI__builtin_ia32_getmantpd512_mask:
782 case X86::BI__builtin_ia32_getmantps512_mask:
783 case X86::BI__builtin_ia32_getmantph128_mask:
784 case X86::BI__builtin_ia32_getmantph256_mask:
785 case X86::BI__builtin_ia32_getmantph512_mask:
786 case X86::BI__builtin_ia32_vgetmantpd256_round_mask:
787 case X86::BI__builtin_ia32_vgetmantps256_round_mask:
788 case X86::BI__builtin_ia32_vgetmantph256_round_mask:
789 case X86::BI__builtin_ia32_vec_ext_v16qi:
790 case X86::BI__builtin_ia32_vec_ext_v16hi:
791 i = 1;
792 l = 0;
793 u = 15;
794 break;
795 case X86::BI__builtin_ia32_pblendd128:
796 case X86::BI__builtin_ia32_blendps:
797 case X86::BI__builtin_ia32_blendpd256:
798 case X86::BI__builtin_ia32_shufpd256:
799 case X86::BI__builtin_ia32_roundss:
800 case X86::BI__builtin_ia32_roundsd:
801 case X86::BI__builtin_ia32_rangepd128_mask:
802 case X86::BI__builtin_ia32_rangepd256_mask:
803 case X86::BI__builtin_ia32_rangepd512_mask:
804 case X86::BI__builtin_ia32_rangeps128_mask:
805 case X86::BI__builtin_ia32_rangeps256_mask:
806 case X86::BI__builtin_ia32_rangeps512_mask:
807 case X86::BI__builtin_ia32_vrangepd256_round_mask:
808 case X86::BI__builtin_ia32_vrangeps256_round_mask:
809 case X86::BI__builtin_ia32_getmantsd_round_mask:
810 case X86::BI__builtin_ia32_getmantss_round_mask:
811 case X86::BI__builtin_ia32_getmantsh_round_mask:
812 case X86::BI__builtin_ia32_vec_set_v16qi:
813 case X86::BI__builtin_ia32_vec_set_v16hi:
814 i = 2;
815 l = 0;
816 u = 15;
817 break;
818 case X86::BI__builtin_ia32_vec_ext_v32qi:
819 i = 1;
820 l = 0;
821 u = 31;
822 break;
823 case X86::BI__builtin_ia32_cmpps:
824 case X86::BI__builtin_ia32_cmpss:
825 case X86::BI__builtin_ia32_cmppd:
826 case X86::BI__builtin_ia32_cmpsd:
827 case X86::BI__builtin_ia32_cmpps256:
828 case X86::BI__builtin_ia32_cmppd256:
829 case X86::BI__builtin_ia32_cmpps128_mask:
830 case X86::BI__builtin_ia32_cmppd128_mask:
831 case X86::BI__builtin_ia32_cmpps256_mask:
832 case X86::BI__builtin_ia32_cmppd256_mask:
833 case X86::BI__builtin_ia32_cmpps512_mask:
834 case X86::BI__builtin_ia32_cmppd512_mask:
835 case X86::BI__builtin_ia32_cmpph512_mask:
836 case X86::BI__builtin_ia32_vcmppd256_round_mask:
837 case X86::BI__builtin_ia32_vcmpps256_round_mask:
838 case X86::BI__builtin_ia32_vcmpph256_round_mask:
839 case X86::BI__builtin_ia32_cmpsd_mask:
840 case X86::BI__builtin_ia32_cmpss_mask:
841 case X86::BI__builtin_ia32_vec_set_v32qi:
842 i = 2;
843 l = 0;
844 u = 31;
845 break;
846 case X86::BI__builtin_ia32_permdf256:
847 case X86::BI__builtin_ia32_permdi256:
848 case X86::BI__builtin_ia32_permdf512:
849 case X86::BI__builtin_ia32_permdi512:
850 case X86::BI__builtin_ia32_vpermilps:
851 case X86::BI__builtin_ia32_vpermilps256:
852 case X86::BI__builtin_ia32_vpermilpd512:
853 case X86::BI__builtin_ia32_vpermilps512:
854 case X86::BI__builtin_ia32_pshufd:
855 case X86::BI__builtin_ia32_pshufd256:
856 case X86::BI__builtin_ia32_pshufd512:
857 case X86::BI__builtin_ia32_pshufhw:
858 case X86::BI__builtin_ia32_pshufhw256:
859 case X86::BI__builtin_ia32_pshufhw512:
860 case X86::BI__builtin_ia32_pshuflw:
861 case X86::BI__builtin_ia32_pshuflw256:
862 case X86::BI__builtin_ia32_pshuflw512:
863 case X86::BI__builtin_ia32_vcvtps2ph:
864 case X86::BI__builtin_ia32_vcvtps2ph_mask:
865 case X86::BI__builtin_ia32_vcvtps2ph256:
866 case X86::BI__builtin_ia32_vcvtps2ph256_mask:
867 case X86::BI__builtin_ia32_vcvtps2ph512_mask:
868 case X86::BI__builtin_ia32_rndscaleps_128_mask:
869 case X86::BI__builtin_ia32_rndscalepd_128_mask:
870 case X86::BI__builtin_ia32_rndscaleps_256_mask:
871 case X86::BI__builtin_ia32_rndscalepd_256_mask:
872 case X86::BI__builtin_ia32_rndscaleps_mask:
873 case X86::BI__builtin_ia32_rndscalepd_mask:
874 case X86::BI__builtin_ia32_rndscaleph_mask:
875 case X86::BI__builtin_ia32_reducepd128_mask:
876 case X86::BI__builtin_ia32_reducepd256_mask:
877 case X86::BI__builtin_ia32_reducepd512_mask:
878 case X86::BI__builtin_ia32_reduceps128_mask:
879 case X86::BI__builtin_ia32_reduceps256_mask:
880 case X86::BI__builtin_ia32_reduceps512_mask:
881 case X86::BI__builtin_ia32_reduceph128_mask:
882 case X86::BI__builtin_ia32_reduceph256_mask:
883 case X86::BI__builtin_ia32_reduceph512_mask:
884 case X86::BI__builtin_ia32_vreducepd256_round_mask:
885 case X86::BI__builtin_ia32_vreduceps256_round_mask:
886 case X86::BI__builtin_ia32_vreduceph256_round_mask:
887 case X86::BI__builtin_ia32_vrndscalepd256_round_mask:
888 case X86::BI__builtin_ia32_vrndscaleps256_round_mask:
889 case X86::BI__builtin_ia32_vrndscaleph256_round_mask:
890 case X86::BI__builtin_ia32_prold512:
891 case X86::BI__builtin_ia32_prolq512:
892 case X86::BI__builtin_ia32_prold128:
893 case X86::BI__builtin_ia32_prold256:
894 case X86::BI__builtin_ia32_prolq128:
895 case X86::BI__builtin_ia32_prolq256:
896 case X86::BI__builtin_ia32_prord512:
897 case X86::BI__builtin_ia32_prorq512:
898 case X86::BI__builtin_ia32_prord128:
899 case X86::BI__builtin_ia32_prord256:
900 case X86::BI__builtin_ia32_prorq128:
901 case X86::BI__builtin_ia32_prorq256:
902 case X86::BI__builtin_ia32_fpclasspd128_mask:
903 case X86::BI__builtin_ia32_fpclasspd256_mask:
904 case X86::BI__builtin_ia32_fpclassps128_mask:
905 case X86::BI__builtin_ia32_fpclassps256_mask:
906 case X86::BI__builtin_ia32_fpclassps512_mask:
907 case X86::BI__builtin_ia32_fpclasspd512_mask:
908 case X86::BI__builtin_ia32_fpclassph128_mask:
909 case X86::BI__builtin_ia32_fpclassph256_mask:
910 case X86::BI__builtin_ia32_fpclassph512_mask:
911 case X86::BI__builtin_ia32_fpclasssd_mask:
912 case X86::BI__builtin_ia32_fpclassss_mask:
913 case X86::BI__builtin_ia32_fpclasssh_mask:
914 case X86::BI__builtin_ia32_pslldqi128_byteshift:
915 case X86::BI__builtin_ia32_pslldqi256_byteshift:
916 case X86::BI__builtin_ia32_pslldqi512_byteshift:
917 case X86::BI__builtin_ia32_psrldqi128_byteshift:
918 case X86::BI__builtin_ia32_psrldqi256_byteshift:
919 case X86::BI__builtin_ia32_psrldqi512_byteshift:
920 case X86::BI__builtin_ia32_kshiftliqi:
921 case X86::BI__builtin_ia32_kshiftlihi:
922 case X86::BI__builtin_ia32_kshiftlisi:
923 case X86::BI__builtin_ia32_kshiftlidi:
924 case X86::BI__builtin_ia32_kshiftriqi:
925 case X86::BI__builtin_ia32_kshiftrihi:
926 case X86::BI__builtin_ia32_kshiftrisi:
927 case X86::BI__builtin_ia32_kshiftridi:
928 i = 1;
929 l = 0;
930 u = 255;
931 break;
932 case X86::BI__builtin_ia32_vperm2f128_pd256:
933 case X86::BI__builtin_ia32_vperm2f128_ps256:
934 case X86::BI__builtin_ia32_vperm2f128_si256:
935 case X86::BI__builtin_ia32_permti256:
936 case X86::BI__builtin_ia32_pblendw128:
937 case X86::BI__builtin_ia32_pblendw256:
938 case X86::BI__builtin_ia32_blendps256:
939 case X86::BI__builtin_ia32_pblendd256:
940 case X86::BI__builtin_ia32_palignr128:
941 case X86::BI__builtin_ia32_palignr256:
942 case X86::BI__builtin_ia32_palignr512:
943 case X86::BI__builtin_ia32_alignq512:
944 case X86::BI__builtin_ia32_alignd512:
945 case X86::BI__builtin_ia32_alignd128:
946 case X86::BI__builtin_ia32_alignd256:
947 case X86::BI__builtin_ia32_alignq128:
948 case X86::BI__builtin_ia32_alignq256:
949 case X86::BI__builtin_ia32_vcomisd:
950 case X86::BI__builtin_ia32_vcomiss:
951 case X86::BI__builtin_ia32_shuf_f32x4:
952 case X86::BI__builtin_ia32_shuf_f64x2:
953 case X86::BI__builtin_ia32_shuf_i32x4:
954 case X86::BI__builtin_ia32_shuf_i64x2:
955 case X86::BI__builtin_ia32_shufpd512:
956 case X86::BI__builtin_ia32_shufps:
957 case X86::BI__builtin_ia32_shufps256:
958 case X86::BI__builtin_ia32_shufps512:
959 case X86::BI__builtin_ia32_dbpsadbw128:
960 case X86::BI__builtin_ia32_dbpsadbw256:
961 case X86::BI__builtin_ia32_dbpsadbw512:
962 case X86::BI__builtin_ia32_vpshldd128:
963 case X86::BI__builtin_ia32_vpshldd256:
964 case X86::BI__builtin_ia32_vpshldd512:
965 case X86::BI__builtin_ia32_vpshldq128:
966 case X86::BI__builtin_ia32_vpshldq256:
967 case X86::BI__builtin_ia32_vpshldq512:
968 case X86::BI__builtin_ia32_vpshldw128:
969 case X86::BI__builtin_ia32_vpshldw256:
970 case X86::BI__builtin_ia32_vpshldw512:
971 case X86::BI__builtin_ia32_vpshrdd128:
972 case X86::BI__builtin_ia32_vpshrdd256:
973 case X86::BI__builtin_ia32_vpshrdd512:
974 case X86::BI__builtin_ia32_vpshrdq128:
975 case X86::BI__builtin_ia32_vpshrdq256:
976 case X86::BI__builtin_ia32_vpshrdq512:
977 case X86::BI__builtin_ia32_vpshrdw128:
978 case X86::BI__builtin_ia32_vpshrdw256:
979 case X86::BI__builtin_ia32_vpshrdw512:
980 case X86::BI__builtin_ia32_vminmaxnepbf16128:
981 case X86::BI__builtin_ia32_vminmaxnepbf16256:
982 case X86::BI__builtin_ia32_vminmaxnepbf16512:
983 case X86::BI__builtin_ia32_vminmaxpd128_mask:
984 case X86::BI__builtin_ia32_vminmaxpd256_round_mask:
985 case X86::BI__builtin_ia32_vminmaxph128_mask:
986 case X86::BI__builtin_ia32_vminmaxph256_round_mask:
987 case X86::BI__builtin_ia32_vminmaxps128_mask:
988 case X86::BI__builtin_ia32_vminmaxps256_round_mask:
989 case X86::BI__builtin_ia32_vminmaxpd512_round_mask:
990 case X86::BI__builtin_ia32_vminmaxps512_round_mask:
991 case X86::BI__builtin_ia32_vminmaxph512_round_mask:
992 case X86::BI__builtin_ia32_vminmaxsd_round_mask:
993 case X86::BI__builtin_ia32_vminmaxsh_round_mask:
994 case X86::BI__builtin_ia32_vminmaxss_round_mask:
995 i = 2;
996 l = 0;
997 u = 255;
998 break;
999 case X86::BI__builtin_ia32_fixupimmpd512_mask:
1000 case X86::BI__builtin_ia32_fixupimmpd512_maskz:
1001 case X86::BI__builtin_ia32_fixupimmps512_mask:
1002 case X86::BI__builtin_ia32_fixupimmps512_maskz:
1003 case X86::BI__builtin_ia32_fixupimmsd_mask:
1004 case X86::BI__builtin_ia32_fixupimmsd_maskz:
1005 case X86::BI__builtin_ia32_fixupimmss_mask:
1006 case X86::BI__builtin_ia32_fixupimmss_maskz:
1007 case X86::BI__builtin_ia32_fixupimmpd128_mask:
1008 case X86::BI__builtin_ia32_fixupimmpd128_maskz:
1009 case X86::BI__builtin_ia32_fixupimmpd256_mask:
1010 case X86::BI__builtin_ia32_fixupimmpd256_maskz:
1011 case X86::BI__builtin_ia32_fixupimmps128_mask:
1012 case X86::BI__builtin_ia32_fixupimmps128_maskz:
1013 case X86::BI__builtin_ia32_fixupimmps256_mask:
1014 case X86::BI__builtin_ia32_fixupimmps256_maskz:
1015 case X86::BI__builtin_ia32_pternlogd512_mask:
1016 case X86::BI__builtin_ia32_pternlogd512_maskz:
1017 case X86::BI__builtin_ia32_pternlogq512_mask:
1018 case X86::BI__builtin_ia32_pternlogq512_maskz:
1019 case X86::BI__builtin_ia32_pternlogd128_mask:
1020 case X86::BI__builtin_ia32_pternlogd128_maskz:
1021 case X86::BI__builtin_ia32_pternlogd256_mask:
1022 case X86::BI__builtin_ia32_pternlogd256_maskz:
1023 case X86::BI__builtin_ia32_pternlogq128_mask:
1024 case X86::BI__builtin_ia32_pternlogq128_maskz:
1025 case X86::BI__builtin_ia32_pternlogq256_mask:
1026 case X86::BI__builtin_ia32_pternlogq256_maskz:
1027 case X86::BI__builtin_ia32_vsm3rnds2:
1028 i = 3;
1029 l = 0;
1030 u = 255;
1031 break;
1032 case X86::BI__builtin_ia32_reducesd_mask:
1033 case X86::BI__builtin_ia32_reducess_mask:
1034 case X86::BI__builtin_ia32_rndscalesd_round_mask:
1035 case X86::BI__builtin_ia32_rndscaless_round_mask:
1036 case X86::BI__builtin_ia32_rndscalesh_round_mask:
1037 case X86::BI__builtin_ia32_reducesh_mask:
1038 i = 4;
1039 l = 0;
1040 u = 255;
1041 break;
1042 case X86::BI__builtin_ia32_cmpccxadd32:
1043 case X86::BI__builtin_ia32_cmpccxadd64:
1044 i = 3;
1045 l = 0;
1046 u = 15;
1047 break;
1048 }
1049
1050 // Note that we don't force a hard error on the range check here, allowing
1051 // template-generated or macro-generated dead code to potentially have out-of-
1052 // range values. These need to code generate, but don't need to necessarily
1053 // make any sense. We use a warning that defaults to an error.
1054 return SemaRef.BuiltinConstantArgRange(TheCall, i, l, u,
1055 /*RangeIsError*/ false);
1056}
1057
1058void SemaX86::handleAnyInterruptAttr(Decl *D, const ParsedAttr &AL) {
1059 // Semantic checks for a function with the 'interrupt' attribute.
1060 // a) Must be a function.
1061 // b) Must have the 'void' return type.
1062 // c) Must take 1 or 2 arguments.
1063 // d) The 1st argument must be a pointer.
1064 // e) The 2nd argument (if any) must be an unsigned integer.
1065 ASTContext &Context = getASTContext();
1066
1067 if (!isFuncOrMethodForAttrSubject(D) || !hasFunctionProto(D) ||
1068 isInstanceMethod(D) ||
1069 CXXMethodDecl::isStaticOverloadedOperator(
1070 cast<NamedDecl>(D)->getDeclName().getCXXOverloadedOperator())) {
1071 Diag(AL.getLoc(), diag::warn_attribute_wrong_decl_type)
1072 << AL << AL.isRegularKeywordAttribute()
1073 << ExpectedFunctionWithProtoType;
1074 return;
1075 }
1076 // Interrupt handler must have void return type.
1077 if (!getFunctionOrMethodResultType(D)->isVoidType()) {
1078 Diag(getFunctionOrMethodResultSourceRange(D).getBegin(),
1079 diag::err_anyx86_interrupt_attribute)
1080 << (SemaRef.Context.getTargetInfo().getTriple().getArch() ==
1081 llvm::Triple::x86
1082 ? 0
1083 : 1)
1084 << 0;
1085 return;
1086 }
1087 // Interrupt handler must have 1 or 2 parameters.
1088 unsigned NumParams = getFunctionOrMethodNumParams(D);
1089 if (NumParams < 1 || NumParams > 2) {
1090 Diag(D->getBeginLoc(), diag::err_anyx86_interrupt_attribute)
1091 << (Context.getTargetInfo().getTriple().getArch() == llvm::Triple::x86
1092 ? 0
1093 : 1)
1094 << 1;
1095 return;
1096 }
1097 // The first argument must be a pointer.
1098 if (!getFunctionOrMethodParamType(D, 0)->isPointerType()) {
1099 Diag(getFunctionOrMethodParamRange(D, 0).getBegin(),
1100 diag::err_anyx86_interrupt_attribute)
1101 << (Context.getTargetInfo().getTriple().getArch() == llvm::Triple::x86
1102 ? 0
1103 : 1)
1104 << 2;
1105 return;
1106 }
1107 // The second argument, if present, must be an unsigned integer.
1108 unsigned TypeSize =
1109 Context.getTargetInfo().getTriple().getArch() == llvm::Triple::x86_64
1110 ? 64
1111 : 32;
1112 if (NumParams == 2 &&
1113 (!getFunctionOrMethodParamType(D, 1)->isUnsignedIntegerType() ||
1114 Context.getTypeSize(getFunctionOrMethodParamType(D, 1)) != TypeSize)) {
1115 Diag(getFunctionOrMethodParamRange(D, 1).getBegin(),
1116 diag::err_anyx86_interrupt_attribute)
1117 << (Context.getTargetInfo().getTriple().getArch() == llvm::Triple::x86
1118 ? 0
1119 : 1)
1120 << 3 << Context.getIntTypeForBitwidth(TypeSize, /*Signed=*/false);
1121 return;
1122 }
1123 D->addAttr(::new (Context) AnyX86InterruptAttr(Context, AL));
1124 D->addAttr(UsedAttr::CreateImplicit(Context));
1125}
1126
1127void SemaX86::handleForceAlignArgPointerAttr(Decl *D, const ParsedAttr &AL) {
1128 // If we try to apply it to a function pointer, don't warn, but don't
1129 // do anything, either. It doesn't matter anyway, because there's nothing
1130 // special about calling a force_align_arg_pointer function.
1131 const auto *VD = dyn_cast<ValueDecl>(D);
1132 if (VD && VD->getType()->isFunctionPointerType())
1133 return;
1134 // Also don't warn on function pointer typedefs.
1135 const auto *TD = dyn_cast<TypedefNameDecl>(D);
1136 if (TD && (TD->getUnderlyingType()->isFunctionPointerType() ||
1137 TD->getUnderlyingType()->isFunctionType()))
1138 return;
1139 // Attribute can only be applied to function types.
1140 if (!isa<FunctionDecl>(D)) {
1141 Diag(AL.getLoc(), diag::warn_attribute_wrong_decl_type)
1142 << AL << AL.isRegularKeywordAttribute() << ExpectedFunction;
1143 return;
1144 }
1145
1146 D->addAttr(::new (getASTContext())
1147 X86ForceAlignArgPointerAttr(getASTContext(), AL));
1148}
1149
1150} // namespace clang
D
const Decl * D
Definition: CheckExprLifetime.cpp:200
SemaX86.h
This file declares semantic analysis functions specific to X86.
TargetBuiltins.h
Enumerates target-specific builtins in their own namespaces within namespace clang.
clang::ASTContext
Holds long-lived AST nodes (such as types and decls) that can be referred to throughout the semantic ...
Definition: ASTContext.h:187
clang::ASTContext::getTargetInfo
const TargetInfo & getTargetInfo() const
Definition: ASTContext.h:779
clang::AttributeCommonInfo::getLoc
SourceLocation getLoc() const
Definition: AttributeCommonInfo.h:181
clang::CXXMethodDecl::isStaticOverloadedOperator
static bool isStaticOverloadedOperator(OverloadedOperatorKind OOK)
Returns true if the given operator is implicitly static in a record context.
Definition: DeclCXX.h:2106
clang::CallExpr
CallExpr - Represents a function call (C99 6.5.2.2, C++ [expr.call]).
Definition: Expr.h:2830
clang::CallExpr::getArg
Expr * getArg(unsigned Arg)
getArg - Return the specified argument.
Definition: Expr.h:3021
clang::CallExpr::getBeginLoc
SourceLocation getBeginLoc() const LLVM_READONLY
Definition: Expr.cpp:1638
clang::CallExpr::getCallee
Expr * getCallee()
Definition: Expr.h:2980
clang::Decl
Decl - This represents one declaration (or definition), e.g.
Definition: DeclBase.h:86
clang::Expr
This represents one expression.
Definition: Expr.h:110
clang::Expr::isValueDependent
bool isValueDependent() const
Determines whether the value of this expression depends on.
Definition: Expr.h:175
clang::Expr::isTypeDependent
bool isTypeDependent() const
Determines whether the type of this expression depends on.
Definition: Expr.h:192
clang::ParsedAttr
ParsedAttr - Represents a syntactic attribute.
Definition: ParsedAttr.h:129
clang::SemaBase::Diag
SemaDiagnosticBuilder Diag(SourceLocation Loc, unsigned DiagID, bool DeferHint=false)
Emit a diagnostic.
Definition: SemaBase.cpp:60
clang::SemaBase::getASTContext
ASTContext & getASTContext() const
Definition: SemaBase.cpp:9
clang::SemaBase::SemaRef
Sema & SemaRef
Definition: SemaBase.h:40
clang::SemaX86::CheckBuiltinTileArgumentsRange
bool CheckBuiltinTileArgumentsRange(CallExpr *TheCall, ArrayRef< int > ArgNums)
Definition: SemaX86.cpp:556
clang::SemaX86::handleForceAlignArgPointerAttr
void handleForceAlignArgPointerAttr(Decl *D, const ParsedAttr &AL)
Definition: SemaX86.cpp:1127
clang::SemaX86::CheckBuiltinFunctionCall
bool CheckBuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID, CallExpr *TheCall)
Definition: SemaX86.cpp:628
clang::SemaX86::CheckBuiltinRoundingOrSAE
bool CheckBuiltinRoundingOrSAE(unsigned BuiltinID, CallExpr *TheCall)
Definition: SemaX86.cpp:28
clang::SemaX86::CheckBuiltinTileRangeAndDuplicate
bool CheckBuiltinTileRangeAndDuplicate(CallExpr *TheCall, ArrayRef< int > ArgNums)
Definition: SemaX86.cpp:591
clang::SemaX86::CheckBuiltinGatherScatterScale
bool CheckBuiltinGatherScatterScale(unsigned BuiltinID, CallExpr *TheCall)
Definition: SemaX86.cpp:462
clang::SemaX86::CheckBuiltinTileDuplicate
bool CheckBuiltinTileDuplicate(CallExpr *TheCall, ArrayRef< int > ArgNums)
Definition: SemaX86.cpp:566
clang::SemaX86::handleAnyInterruptAttr
void handleAnyInterruptAttr(Decl *D, const ParsedAttr &AL)
Definition: SemaX86.cpp:1058
clang::SemaX86::SemaX86
SemaX86(Sema &S)
Definition: SemaX86.cpp:25
clang::SemaX86::CheckBuiltinTileArguments
bool CheckBuiltinTileArguments(unsigned BuiltinID, CallExpr *TheCall)
Definition: SemaX86.cpp:597
clang::Sema
Sema - This implements semantic analysis and AST building for C.
Definition: Sema.h:535
clang::Sema::Context
ASTContext & Context
Definition: Sema.h:1004
clang::Sema::BuiltinConstantArg
bool BuiltinConstantArg(CallExpr *TheCall, int ArgNum, llvm::APSInt &Result)
BuiltinConstantArg - Handle a check if argument ArgNum of CallExpr TheCall is a constant expression.
Definition: SemaChecking.cpp:5319
clang::Sema::BuiltinConstantArgRange
bool BuiltinConstantArgRange(CallExpr *TheCall, int ArgNum, int Low, int High, bool RangeIsError=true)
BuiltinConstantArgRange - Handle a check if argument ArgNum of CallExpr TheCall is a constant express...
Definition: SemaChecking.cpp:5335
clang::Stmt::getSourceRange
SourceRange getSourceRange() const LLVM_READONLY
SourceLocation tokens are not useful in isolation - they are low level value objects created/interpre...
Definition: Stmt.cpp:326
clang::Stmt::getBeginLoc
SourceLocation getBeginLoc() const LLVM_READONLY
Definition: Stmt.cpp:338
clang::TargetInfo
Exposes information about the current target.
Definition: TargetInfo.h:218
clang::TargetInfo::getTriple
const llvm::Triple & getTriple() const
Returns the target triple of the primary target.
Definition: TargetInfo.h:1256
clang::Type::isPointerType
bool isPointerType() const
Definition: Type.h:8003
clang
The JSON file list parser is used to communicate input to InstallAPI.
Definition: CalledOnceCheck.h:17
clang::ExpectedFunctionWithProtoType
@ ExpectedFunctionWithProtoType
Definition: ParsedAttr.h:1103
clang::ExpectedFunction
@ ExpectedFunction
Definition: ParsedAttr.h:1091
clang::getFunctionOrMethodResultType
QualType getFunctionOrMethodResultType(const Decl *D)
Definition: Attr.h:98
clang::isInstanceMethod
bool isInstanceMethod(const Decl *D)
Definition: Attr.h:120
clang::isX86_32Builtin
static bool isX86_32Builtin(unsigned BuiltinID)
Definition: SemaX86.cpp:617
clang::TileRegLow
@ TileRegLow
Definition: SemaX86.cpp:554
clang::TileRegHigh
@ TileRegHigh
Definition: SemaX86.cpp:554
clang::getFunctionOrMethodResultSourceRange
SourceRange getFunctionOrMethodResultSourceRange(const Decl *D)
Definition: Attr.h:104
clang::getFunctionOrMethodParamType
QualType getFunctionOrMethodParamType(const Decl *D, unsigned Idx)
Definition: Attr.h:83
clang::ObjCSubstitutionContext::Result
@ Result
The result type of a method or function.
clang::isFuncOrMethodForAttrSubject
bool isFuncOrMethodForAttrSubject(const Decl *D)
isFuncOrMethodForAttrSubject - Return true if the given decl has function type (function or function-...
Definition: Attr.h:34
clang::hasFunctionProto
bool hasFunctionProto(const Decl *D)
hasFunctionProto - Return true if the given decl has a argument information.
Definition: Attr.h:55
clang::getFunctionOrMethodNumParams
unsigned getFunctionOrMethodNumParams(const Decl *D)
getFunctionOrMethodNumParams - Return number of function or method parameters.
Definition: Attr.h:64
clang::getFunctionOrMethodParamRange
SourceRange getFunctionOrMethodParamRange(const Decl *D, unsigned Idx)
Definition: Attr.h:92
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