clang 19.0.0git
SemaX86.cpp
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1//===------ SemaX86.cpp ---------- X86 target-specific routines -----------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements semantic analysis functions specific to X86.
10//
11//===----------------------------------------------------------------------===//
12
13#include "clang/Sema/SemaX86.h"
16#include "clang/Sema/Attr.h"
18#include "clang/Sema/Sema.h"
19#include "llvm/ADT/APSInt.h"
20#include "llvm/TargetParser/Triple.h"
21#include <bitset>
22
23namespace clang {
24
26
27// Check if the rounding mode is legal.
28bool SemaX86::CheckBuiltinRoundingOrSAE(unsigned BuiltinID, CallExpr *TheCall) {
29 // Indicates if this instruction has rounding control or just SAE.
30 bool HasRC = false;
31
32 unsigned ArgNum = 0;
33 switch (BuiltinID) {
34 default:
35 return false;
36 case X86::BI__builtin_ia32_vcvttsd2si32:
37 case X86::BI__builtin_ia32_vcvttsd2si64:
38 case X86::BI__builtin_ia32_vcvttsd2usi32:
39 case X86::BI__builtin_ia32_vcvttsd2usi64:
40 case X86::BI__builtin_ia32_vcvttss2si32:
41 case X86::BI__builtin_ia32_vcvttss2si64:
42 case X86::BI__builtin_ia32_vcvttss2usi32:
43 case X86::BI__builtin_ia32_vcvttss2usi64:
44 case X86::BI__builtin_ia32_vcvttsh2si32:
45 case X86::BI__builtin_ia32_vcvttsh2si64:
46 case X86::BI__builtin_ia32_vcvttsh2usi32:
47 case X86::BI__builtin_ia32_vcvttsh2usi64:
48 ArgNum = 1;
49 break;
50 case X86::BI__builtin_ia32_maxpd512:
51 case X86::BI__builtin_ia32_maxps512:
52 case X86::BI__builtin_ia32_minpd512:
53 case X86::BI__builtin_ia32_minps512:
54 case X86::BI__builtin_ia32_maxph512:
55 case X86::BI__builtin_ia32_minph512:
56 ArgNum = 2;
57 break;
58 case X86::BI__builtin_ia32_vcvtph2pd512_mask:
59 case X86::BI__builtin_ia32_vcvtph2psx512_mask:
60 case X86::BI__builtin_ia32_cvtps2pd512_mask:
61 case X86::BI__builtin_ia32_cvttpd2dq512_mask:
62 case X86::BI__builtin_ia32_cvttpd2qq512_mask:
63 case X86::BI__builtin_ia32_cvttpd2udq512_mask:
64 case X86::BI__builtin_ia32_cvttpd2uqq512_mask:
65 case X86::BI__builtin_ia32_cvttps2dq512_mask:
66 case X86::BI__builtin_ia32_cvttps2qq512_mask:
67 case X86::BI__builtin_ia32_cvttps2udq512_mask:
68 case X86::BI__builtin_ia32_cvttps2uqq512_mask:
69 case X86::BI__builtin_ia32_vcvttph2w512_mask:
70 case X86::BI__builtin_ia32_vcvttph2uw512_mask:
71 case X86::BI__builtin_ia32_vcvttph2dq512_mask:
72 case X86::BI__builtin_ia32_vcvttph2udq512_mask:
73 case X86::BI__builtin_ia32_vcvttph2qq512_mask:
74 case X86::BI__builtin_ia32_vcvttph2uqq512_mask:
75 case X86::BI__builtin_ia32_getexppd512_mask:
76 case X86::BI__builtin_ia32_getexpps512_mask:
77 case X86::BI__builtin_ia32_getexpph512_mask:
78 case X86::BI__builtin_ia32_vcomisd:
79 case X86::BI__builtin_ia32_vcomiss:
80 case X86::BI__builtin_ia32_vcomish:
81 case X86::BI__builtin_ia32_vcvtph2ps512_mask:
82 ArgNum = 3;
83 break;
84 case X86::BI__builtin_ia32_cmppd512_mask:
85 case X86::BI__builtin_ia32_cmpps512_mask:
86 case X86::BI__builtin_ia32_cmpsd_mask:
87 case X86::BI__builtin_ia32_cmpss_mask:
88 case X86::BI__builtin_ia32_cmpsh_mask:
89 case X86::BI__builtin_ia32_vcvtsh2sd_round_mask:
90 case X86::BI__builtin_ia32_vcvtsh2ss_round_mask:
91 case X86::BI__builtin_ia32_cvtss2sd_round_mask:
92 case X86::BI__builtin_ia32_getexpsd128_round_mask:
93 case X86::BI__builtin_ia32_getexpss128_round_mask:
94 case X86::BI__builtin_ia32_getexpsh128_round_mask:
95 case X86::BI__builtin_ia32_getmantpd512_mask:
96 case X86::BI__builtin_ia32_getmantps512_mask:
97 case X86::BI__builtin_ia32_getmantph512_mask:
98 case X86::BI__builtin_ia32_maxsd_round_mask:
99 case X86::BI__builtin_ia32_maxss_round_mask:
100 case X86::BI__builtin_ia32_maxsh_round_mask:
101 case X86::BI__builtin_ia32_minsd_round_mask:
102 case X86::BI__builtin_ia32_minss_round_mask:
103 case X86::BI__builtin_ia32_minsh_round_mask:
104 case X86::BI__builtin_ia32_reducepd512_mask:
105 case X86::BI__builtin_ia32_reduceps512_mask:
106 case X86::BI__builtin_ia32_reduceph512_mask:
107 case X86::BI__builtin_ia32_rndscalepd_mask:
108 case X86::BI__builtin_ia32_rndscaleps_mask:
109 case X86::BI__builtin_ia32_rndscaleph_mask:
110 ArgNum = 4;
111 break;
112 case X86::BI__builtin_ia32_fixupimmpd512_mask:
113 case X86::BI__builtin_ia32_fixupimmpd512_maskz:
114 case X86::BI__builtin_ia32_fixupimmps512_mask:
115 case X86::BI__builtin_ia32_fixupimmps512_maskz:
116 case X86::BI__builtin_ia32_fixupimmsd_mask:
117 case X86::BI__builtin_ia32_fixupimmsd_maskz:
118 case X86::BI__builtin_ia32_fixupimmss_mask:
119 case X86::BI__builtin_ia32_fixupimmss_maskz:
120 case X86::BI__builtin_ia32_getmantsd_round_mask:
121 case X86::BI__builtin_ia32_getmantss_round_mask:
122 case X86::BI__builtin_ia32_getmantsh_round_mask:
123 case X86::BI__builtin_ia32_rangepd512_mask:
124 case X86::BI__builtin_ia32_rangeps512_mask:
125 case X86::BI__builtin_ia32_rangesd128_round_mask:
126 case X86::BI__builtin_ia32_rangess128_round_mask:
127 case X86::BI__builtin_ia32_reducesd_mask:
128 case X86::BI__builtin_ia32_reducess_mask:
129 case X86::BI__builtin_ia32_reducesh_mask:
130 case X86::BI__builtin_ia32_rndscalesd_round_mask:
131 case X86::BI__builtin_ia32_rndscaless_round_mask:
132 case X86::BI__builtin_ia32_rndscalesh_round_mask:
133 ArgNum = 5;
134 break;
135 case X86::BI__builtin_ia32_vcvtsd2si64:
136 case X86::BI__builtin_ia32_vcvtsd2si32:
137 case X86::BI__builtin_ia32_vcvtsd2usi32:
138 case X86::BI__builtin_ia32_vcvtsd2usi64:
139 case X86::BI__builtin_ia32_vcvtss2si32:
140 case X86::BI__builtin_ia32_vcvtss2si64:
141 case X86::BI__builtin_ia32_vcvtss2usi32:
142 case X86::BI__builtin_ia32_vcvtss2usi64:
143 case X86::BI__builtin_ia32_vcvtsh2si32:
144 case X86::BI__builtin_ia32_vcvtsh2si64:
145 case X86::BI__builtin_ia32_vcvtsh2usi32:
146 case X86::BI__builtin_ia32_vcvtsh2usi64:
147 case X86::BI__builtin_ia32_sqrtpd512:
148 case X86::BI__builtin_ia32_sqrtps512:
149 case X86::BI__builtin_ia32_sqrtph512:
150 ArgNum = 1;
151 HasRC = true;
152 break;
153 case X86::BI__builtin_ia32_addph512:
154 case X86::BI__builtin_ia32_divph512:
155 case X86::BI__builtin_ia32_mulph512:
156 case X86::BI__builtin_ia32_subph512:
157 case X86::BI__builtin_ia32_addpd512:
158 case X86::BI__builtin_ia32_addps512:
159 case X86::BI__builtin_ia32_divpd512:
160 case X86::BI__builtin_ia32_divps512:
161 case X86::BI__builtin_ia32_mulpd512:
162 case X86::BI__builtin_ia32_mulps512:
163 case X86::BI__builtin_ia32_subpd512:
164 case X86::BI__builtin_ia32_subps512:
165 case X86::BI__builtin_ia32_cvtsi2sd64:
166 case X86::BI__builtin_ia32_cvtsi2ss32:
167 case X86::BI__builtin_ia32_cvtsi2ss64:
168 case X86::BI__builtin_ia32_cvtusi2sd64:
169 case X86::BI__builtin_ia32_cvtusi2ss32:
170 case X86::BI__builtin_ia32_cvtusi2ss64:
171 case X86::BI__builtin_ia32_vcvtusi2sh:
172 case X86::BI__builtin_ia32_vcvtusi642sh:
173 case X86::BI__builtin_ia32_vcvtsi2sh:
174 case X86::BI__builtin_ia32_vcvtsi642sh:
175 ArgNum = 2;
176 HasRC = true;
177 break;
178 case X86::BI__builtin_ia32_cvtdq2ps512_mask:
179 case X86::BI__builtin_ia32_cvtudq2ps512_mask:
180 case X86::BI__builtin_ia32_vcvtpd2ph512_mask:
181 case X86::BI__builtin_ia32_vcvtps2phx512_mask:
182 case X86::BI__builtin_ia32_cvtpd2ps512_mask:
183 case X86::BI__builtin_ia32_cvtpd2dq512_mask:
184 case X86::BI__builtin_ia32_cvtpd2qq512_mask:
185 case X86::BI__builtin_ia32_cvtpd2udq512_mask:
186 case X86::BI__builtin_ia32_cvtpd2uqq512_mask:
187 case X86::BI__builtin_ia32_cvtps2dq512_mask:
188 case X86::BI__builtin_ia32_cvtps2qq512_mask:
189 case X86::BI__builtin_ia32_cvtps2udq512_mask:
190 case X86::BI__builtin_ia32_cvtps2uqq512_mask:
191 case X86::BI__builtin_ia32_cvtqq2pd512_mask:
192 case X86::BI__builtin_ia32_cvtqq2ps512_mask:
193 case X86::BI__builtin_ia32_cvtuqq2pd512_mask:
194 case X86::BI__builtin_ia32_cvtuqq2ps512_mask:
195 case X86::BI__builtin_ia32_vcvtdq2ph512_mask:
196 case X86::BI__builtin_ia32_vcvtudq2ph512_mask:
197 case X86::BI__builtin_ia32_vcvtw2ph512_mask:
198 case X86::BI__builtin_ia32_vcvtuw2ph512_mask:
199 case X86::BI__builtin_ia32_vcvtph2w512_mask:
200 case X86::BI__builtin_ia32_vcvtph2uw512_mask:
201 case X86::BI__builtin_ia32_vcvtph2dq512_mask:
202 case X86::BI__builtin_ia32_vcvtph2udq512_mask:
203 case X86::BI__builtin_ia32_vcvtph2qq512_mask:
204 case X86::BI__builtin_ia32_vcvtph2uqq512_mask:
205 case X86::BI__builtin_ia32_vcvtqq2ph512_mask:
206 case X86::BI__builtin_ia32_vcvtuqq2ph512_mask:
207 ArgNum = 3;
208 HasRC = true;
209 break;
210 case X86::BI__builtin_ia32_addsh_round_mask:
211 case X86::BI__builtin_ia32_addss_round_mask:
212 case X86::BI__builtin_ia32_addsd_round_mask:
213 case X86::BI__builtin_ia32_divsh_round_mask:
214 case X86::BI__builtin_ia32_divss_round_mask:
215 case X86::BI__builtin_ia32_divsd_round_mask:
216 case X86::BI__builtin_ia32_mulsh_round_mask:
217 case X86::BI__builtin_ia32_mulss_round_mask:
218 case X86::BI__builtin_ia32_mulsd_round_mask:
219 case X86::BI__builtin_ia32_subsh_round_mask:
220 case X86::BI__builtin_ia32_subss_round_mask:
221 case X86::BI__builtin_ia32_subsd_round_mask:
222 case X86::BI__builtin_ia32_scalefph512_mask:
223 case X86::BI__builtin_ia32_scalefpd512_mask:
224 case X86::BI__builtin_ia32_scalefps512_mask:
225 case X86::BI__builtin_ia32_scalefsd_round_mask:
226 case X86::BI__builtin_ia32_scalefss_round_mask:
227 case X86::BI__builtin_ia32_scalefsh_round_mask:
228 case X86::BI__builtin_ia32_cvtsd2ss_round_mask:
229 case X86::BI__builtin_ia32_vcvtss2sh_round_mask:
230 case X86::BI__builtin_ia32_vcvtsd2sh_round_mask:
231 case X86::BI__builtin_ia32_sqrtsd_round_mask:
232 case X86::BI__builtin_ia32_sqrtss_round_mask:
233 case X86::BI__builtin_ia32_sqrtsh_round_mask:
234 case X86::BI__builtin_ia32_vfmaddsd3_mask:
235 case X86::BI__builtin_ia32_vfmaddsd3_maskz:
236 case X86::BI__builtin_ia32_vfmaddsd3_mask3:
237 case X86::BI__builtin_ia32_vfmaddss3_mask:
238 case X86::BI__builtin_ia32_vfmaddss3_maskz:
239 case X86::BI__builtin_ia32_vfmaddss3_mask3:
240 case X86::BI__builtin_ia32_vfmaddsh3_mask:
241 case X86::BI__builtin_ia32_vfmaddsh3_maskz:
242 case X86::BI__builtin_ia32_vfmaddsh3_mask3:
243 case X86::BI__builtin_ia32_vfmaddpd512_mask:
244 case X86::BI__builtin_ia32_vfmaddpd512_maskz:
245 case X86::BI__builtin_ia32_vfmaddpd512_mask3:
246 case X86::BI__builtin_ia32_vfmsubpd512_mask3:
247 case X86::BI__builtin_ia32_vfmaddps512_mask:
248 case X86::BI__builtin_ia32_vfmaddps512_maskz:
249 case X86::BI__builtin_ia32_vfmaddps512_mask3:
250 case X86::BI__builtin_ia32_vfmsubps512_mask3:
251 case X86::BI__builtin_ia32_vfmaddph512_mask:
252 case X86::BI__builtin_ia32_vfmaddph512_maskz:
253 case X86::BI__builtin_ia32_vfmaddph512_mask3:
254 case X86::BI__builtin_ia32_vfmsubph512_mask3:
255 case X86::BI__builtin_ia32_vfmaddsubpd512_mask:
256 case X86::BI__builtin_ia32_vfmaddsubpd512_maskz:
257 case X86::BI__builtin_ia32_vfmaddsubpd512_mask3:
258 case X86::BI__builtin_ia32_vfmsubaddpd512_mask3:
259 case X86::BI__builtin_ia32_vfmaddsubps512_mask:
260 case X86::BI__builtin_ia32_vfmaddsubps512_maskz:
261 case X86::BI__builtin_ia32_vfmaddsubps512_mask3:
262 case X86::BI__builtin_ia32_vfmsubaddps512_mask3:
263 case X86::BI__builtin_ia32_vfmaddsubph512_mask:
264 case X86::BI__builtin_ia32_vfmaddsubph512_maskz:
265 case X86::BI__builtin_ia32_vfmaddsubph512_mask3:
266 case X86::BI__builtin_ia32_vfmsubaddph512_mask3:
267 case X86::BI__builtin_ia32_vfmaddcsh_mask:
268 case X86::BI__builtin_ia32_vfmaddcsh_round_mask:
269 case X86::BI__builtin_ia32_vfmaddcsh_round_mask3:
270 case X86::BI__builtin_ia32_vfmaddcph512_mask:
271 case X86::BI__builtin_ia32_vfmaddcph512_maskz:
272 case X86::BI__builtin_ia32_vfmaddcph512_mask3:
273 case X86::BI__builtin_ia32_vfcmaddcsh_mask:
274 case X86::BI__builtin_ia32_vfcmaddcsh_round_mask:
275 case X86::BI__builtin_ia32_vfcmaddcsh_round_mask3:
276 case X86::BI__builtin_ia32_vfcmaddcph512_mask:
277 case X86::BI__builtin_ia32_vfcmaddcph512_maskz:
278 case X86::BI__builtin_ia32_vfcmaddcph512_mask3:
279 case X86::BI__builtin_ia32_vfmulcsh_mask:
280 case X86::BI__builtin_ia32_vfmulcph512_mask:
281 case X86::BI__builtin_ia32_vfcmulcsh_mask:
282 case X86::BI__builtin_ia32_vfcmulcph512_mask:
283 ArgNum = 4;
284 HasRC = true;
285 break;
286 }
287
288 llvm::APSInt Result;
289
290 // We can't check the value of a dependent argument.
291 Expr *Arg = TheCall->getArg(ArgNum);
292 if (Arg->isTypeDependent() || Arg->isValueDependent())
293 return false;
294
295 // Check constant-ness first.
296 if (SemaRef.BuiltinConstantArg(TheCall, ArgNum, Result))
297 return true;
298
299 // Make sure rounding mode is either ROUND_CUR_DIRECTION or ROUND_NO_EXC bit
300 // is set. If the intrinsic has rounding control(bits 1:0), make sure its only
301 // combined with ROUND_NO_EXC. If the intrinsic does not have rounding
302 // control, allow ROUND_NO_EXC and ROUND_CUR_DIRECTION together.
303 if (Result == 4 /*ROUND_CUR_DIRECTION*/ || Result == 8 /*ROUND_NO_EXC*/ ||
304 (!HasRC && Result == 12 /*ROUND_CUR_DIRECTION|ROUND_NO_EXC*/) ||
305 (HasRC && Result.getZExtValue() >= 8 && Result.getZExtValue() <= 11))
306 return false;
307
308 return Diag(TheCall->getBeginLoc(), diag::err_x86_builtin_invalid_rounding)
309 << Arg->getSourceRange();
310}
311
312// Check if the gather/scatter scale is legal.
314 CallExpr *TheCall) {
315 unsigned ArgNum = 0;
316 switch (BuiltinID) {
317 default:
318 return false;
319 case X86::BI__builtin_ia32_gatherd_pd:
320 case X86::BI__builtin_ia32_gatherd_pd256:
321 case X86::BI__builtin_ia32_gatherq_pd:
322 case X86::BI__builtin_ia32_gatherq_pd256:
323 case X86::BI__builtin_ia32_gatherd_ps:
324 case X86::BI__builtin_ia32_gatherd_ps256:
325 case X86::BI__builtin_ia32_gatherq_ps:
326 case X86::BI__builtin_ia32_gatherq_ps256:
327 case X86::BI__builtin_ia32_gatherd_q:
328 case X86::BI__builtin_ia32_gatherd_q256:
329 case X86::BI__builtin_ia32_gatherq_q:
330 case X86::BI__builtin_ia32_gatherq_q256:
331 case X86::BI__builtin_ia32_gatherd_d:
332 case X86::BI__builtin_ia32_gatherd_d256:
333 case X86::BI__builtin_ia32_gatherq_d:
334 case X86::BI__builtin_ia32_gatherq_d256:
335 case X86::BI__builtin_ia32_gather3div2df:
336 case X86::BI__builtin_ia32_gather3div2di:
337 case X86::BI__builtin_ia32_gather3div4df:
338 case X86::BI__builtin_ia32_gather3div4di:
339 case X86::BI__builtin_ia32_gather3div4sf:
340 case X86::BI__builtin_ia32_gather3div4si:
341 case X86::BI__builtin_ia32_gather3div8sf:
342 case X86::BI__builtin_ia32_gather3div8si:
343 case X86::BI__builtin_ia32_gather3siv2df:
344 case X86::BI__builtin_ia32_gather3siv2di:
345 case X86::BI__builtin_ia32_gather3siv4df:
346 case X86::BI__builtin_ia32_gather3siv4di:
347 case X86::BI__builtin_ia32_gather3siv4sf:
348 case X86::BI__builtin_ia32_gather3siv4si:
349 case X86::BI__builtin_ia32_gather3siv8sf:
350 case X86::BI__builtin_ia32_gather3siv8si:
351 case X86::BI__builtin_ia32_gathersiv8df:
352 case X86::BI__builtin_ia32_gathersiv16sf:
353 case X86::BI__builtin_ia32_gatherdiv8df:
354 case X86::BI__builtin_ia32_gatherdiv16sf:
355 case X86::BI__builtin_ia32_gathersiv8di:
356 case X86::BI__builtin_ia32_gathersiv16si:
357 case X86::BI__builtin_ia32_gatherdiv8di:
358 case X86::BI__builtin_ia32_gatherdiv16si:
359 case X86::BI__builtin_ia32_scatterdiv2df:
360 case X86::BI__builtin_ia32_scatterdiv2di:
361 case X86::BI__builtin_ia32_scatterdiv4df:
362 case X86::BI__builtin_ia32_scatterdiv4di:
363 case X86::BI__builtin_ia32_scatterdiv4sf:
364 case X86::BI__builtin_ia32_scatterdiv4si:
365 case X86::BI__builtin_ia32_scatterdiv8sf:
366 case X86::BI__builtin_ia32_scatterdiv8si:
367 case X86::BI__builtin_ia32_scattersiv2df:
368 case X86::BI__builtin_ia32_scattersiv2di:
369 case X86::BI__builtin_ia32_scattersiv4df:
370 case X86::BI__builtin_ia32_scattersiv4di:
371 case X86::BI__builtin_ia32_scattersiv4sf:
372 case X86::BI__builtin_ia32_scattersiv4si:
373 case X86::BI__builtin_ia32_scattersiv8sf:
374 case X86::BI__builtin_ia32_scattersiv8si:
375 case X86::BI__builtin_ia32_scattersiv8df:
376 case X86::BI__builtin_ia32_scattersiv16sf:
377 case X86::BI__builtin_ia32_scatterdiv8df:
378 case X86::BI__builtin_ia32_scatterdiv16sf:
379 case X86::BI__builtin_ia32_scattersiv8di:
380 case X86::BI__builtin_ia32_scattersiv16si:
381 case X86::BI__builtin_ia32_scatterdiv8di:
382 case X86::BI__builtin_ia32_scatterdiv16si:
383 ArgNum = 4;
384 break;
385 }
386
387 llvm::APSInt Result;
388
389 // We can't check the value of a dependent argument.
390 Expr *Arg = TheCall->getArg(ArgNum);
391 if (Arg->isTypeDependent() || Arg->isValueDependent())
392 return false;
393
394 // Check constant-ness first.
395 if (SemaRef.BuiltinConstantArg(TheCall, ArgNum, Result))
396 return true;
397
398 if (Result == 1 || Result == 2 || Result == 4 || Result == 8)
399 return false;
400
401 return Diag(TheCall->getBeginLoc(), diag::err_x86_builtin_invalid_scale)
402 << Arg->getSourceRange();
403}
404
405enum { TileRegLow = 0, TileRegHigh = 7 };
406
408 ArrayRef<int> ArgNums) {
409 for (int ArgNum : ArgNums) {
410 if (SemaRef.BuiltinConstantArgRange(TheCall, ArgNum, TileRegLow,
412 return true;
413 }
414 return false;
415}
416
418 ArrayRef<int> ArgNums) {
419 // Because the max number of tile register is TileRegHigh + 1, so here we use
420 // each bit to represent the usage of them in bitset.
421 std::bitset<TileRegHigh + 1> ArgValues;
422 for (int ArgNum : ArgNums) {
423 Expr *Arg = TheCall->getArg(ArgNum);
424 if (Arg->isTypeDependent() || Arg->isValueDependent())
425 continue;
426
427 llvm::APSInt Result;
428 if (SemaRef.BuiltinConstantArg(TheCall, ArgNum, Result))
429 return true;
430 int ArgExtValue = Result.getExtValue();
431 assert((ArgExtValue >= TileRegLow && ArgExtValue <= TileRegHigh) &&
432 "Incorrect tile register num.");
433 if (ArgValues.test(ArgExtValue))
434 return Diag(TheCall->getBeginLoc(),
435 diag::err_x86_builtin_tile_arg_duplicate)
436 << TheCall->getArg(ArgNum)->getSourceRange();
437 ArgValues.set(ArgExtValue);
438 }
439 return false;
440}
441
443 ArrayRef<int> ArgNums) {
444 return CheckBuiltinTileArgumentsRange(TheCall, ArgNums) ||
445 CheckBuiltinTileDuplicate(TheCall, ArgNums);
446}
447
448bool SemaX86::CheckBuiltinTileArguments(unsigned BuiltinID, CallExpr *TheCall) {
449 switch (BuiltinID) {
450 default:
451 return false;
452 case X86::BI__builtin_ia32_tileloadd64:
453 case X86::BI__builtin_ia32_tileloaddt164:
454 case X86::BI__builtin_ia32_tilestored64:
455 case X86::BI__builtin_ia32_tilezero:
456 return CheckBuiltinTileArgumentsRange(TheCall, 0);
457 case X86::BI__builtin_ia32_tdpbssd:
458 case X86::BI__builtin_ia32_tdpbsud:
459 case X86::BI__builtin_ia32_tdpbusd:
460 case X86::BI__builtin_ia32_tdpbuud:
461 case X86::BI__builtin_ia32_tdpbf16ps:
462 case X86::BI__builtin_ia32_tdpfp16ps:
463 case X86::BI__builtin_ia32_tcmmimfp16ps:
464 case X86::BI__builtin_ia32_tcmmrlfp16ps:
465 return CheckBuiltinTileRangeAndDuplicate(TheCall, {0, 1, 2});
466 }
467}
468static bool isX86_32Builtin(unsigned BuiltinID) {
469 // These builtins only work on x86-32 targets.
470 switch (BuiltinID) {
471 case X86::BI__builtin_ia32_readeflags_u32:
472 case X86::BI__builtin_ia32_writeeflags_u32:
473 return true;
474 }
475
476 return false;
477}
478
479bool SemaX86::CheckBuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID,
480 CallExpr *TheCall) {
481 // Check for 32-bit only builtins on a 64-bit target.
482 const llvm::Triple &TT = TI.getTriple();
483 if (TT.getArch() != llvm::Triple::x86 && isX86_32Builtin(BuiltinID))
484 return Diag(TheCall->getCallee()->getBeginLoc(),
485 diag::err_32_bit_builtin_64_bit_tgt);
486
487 // If the intrinsic has rounding or SAE make sure its valid.
488 if (CheckBuiltinRoundingOrSAE(BuiltinID, TheCall))
489 return true;
490
491 // If the intrinsic has a gather/scatter scale immediate make sure its valid.
492 if (CheckBuiltinGatherScatterScale(BuiltinID, TheCall))
493 return true;
494
495 // If the intrinsic has a tile arguments, make sure they are valid.
496 if (CheckBuiltinTileArguments(BuiltinID, TheCall))
497 return true;
498
499 // For intrinsics which take an immediate value as part of the instruction,
500 // range check them here.
501 int i = 0, l = 0, u = 0;
502 switch (BuiltinID) {
503 default:
504 return false;
505 case X86::BI__builtin_ia32_vec_ext_v2si:
506 case X86::BI__builtin_ia32_vec_ext_v2di:
507 case X86::BI__builtin_ia32_vextractf128_pd256:
508 case X86::BI__builtin_ia32_vextractf128_ps256:
509 case X86::BI__builtin_ia32_vextractf128_si256:
510 case X86::BI__builtin_ia32_extract128i256:
511 case X86::BI__builtin_ia32_extractf64x4_mask:
512 case X86::BI__builtin_ia32_extracti64x4_mask:
513 case X86::BI__builtin_ia32_extractf32x8_mask:
514 case X86::BI__builtin_ia32_extracti32x8_mask:
515 case X86::BI__builtin_ia32_extractf64x2_256_mask:
516 case X86::BI__builtin_ia32_extracti64x2_256_mask:
517 case X86::BI__builtin_ia32_extractf32x4_256_mask:
518 case X86::BI__builtin_ia32_extracti32x4_256_mask:
519 i = 1;
520 l = 0;
521 u = 1;
522 break;
523 case X86::BI__builtin_ia32_vec_set_v2di:
524 case X86::BI__builtin_ia32_vinsertf128_pd256:
525 case X86::BI__builtin_ia32_vinsertf128_ps256:
526 case X86::BI__builtin_ia32_vinsertf128_si256:
527 case X86::BI__builtin_ia32_insert128i256:
528 case X86::BI__builtin_ia32_insertf32x8:
529 case X86::BI__builtin_ia32_inserti32x8:
530 case X86::BI__builtin_ia32_insertf64x4:
531 case X86::BI__builtin_ia32_inserti64x4:
532 case X86::BI__builtin_ia32_insertf64x2_256:
533 case X86::BI__builtin_ia32_inserti64x2_256:
534 case X86::BI__builtin_ia32_insertf32x4_256:
535 case X86::BI__builtin_ia32_inserti32x4_256:
536 i = 2;
537 l = 0;
538 u = 1;
539 break;
540 case X86::BI__builtin_ia32_vpermilpd:
541 case X86::BI__builtin_ia32_vec_ext_v4hi:
542 case X86::BI__builtin_ia32_vec_ext_v4si:
543 case X86::BI__builtin_ia32_vec_ext_v4sf:
544 case X86::BI__builtin_ia32_vec_ext_v4di:
545 case X86::BI__builtin_ia32_extractf32x4_mask:
546 case X86::BI__builtin_ia32_extracti32x4_mask:
547 case X86::BI__builtin_ia32_extractf64x2_512_mask:
548 case X86::BI__builtin_ia32_extracti64x2_512_mask:
549 i = 1;
550 l = 0;
551 u = 3;
552 break;
553 case X86::BI_mm_prefetch:
554 case X86::BI__builtin_ia32_vec_ext_v8hi:
555 case X86::BI__builtin_ia32_vec_ext_v8si:
556 i = 1;
557 l = 0;
558 u = 7;
559 break;
560 case X86::BI__builtin_ia32_sha1rnds4:
561 case X86::BI__builtin_ia32_blendpd:
562 case X86::BI__builtin_ia32_shufpd:
563 case X86::BI__builtin_ia32_vec_set_v4hi:
564 case X86::BI__builtin_ia32_vec_set_v4si:
565 case X86::BI__builtin_ia32_vec_set_v4di:
566 case X86::BI__builtin_ia32_shuf_f32x4_256:
567 case X86::BI__builtin_ia32_shuf_f64x2_256:
568 case X86::BI__builtin_ia32_shuf_i32x4_256:
569 case X86::BI__builtin_ia32_shuf_i64x2_256:
570 case X86::BI__builtin_ia32_insertf64x2_512:
571 case X86::BI__builtin_ia32_inserti64x2_512:
572 case X86::BI__builtin_ia32_insertf32x4:
573 case X86::BI__builtin_ia32_inserti32x4:
574 i = 2;
575 l = 0;
576 u = 3;
577 break;
578 case X86::BI__builtin_ia32_vpermil2pd:
579 case X86::BI__builtin_ia32_vpermil2pd256:
580 case X86::BI__builtin_ia32_vpermil2ps:
581 case X86::BI__builtin_ia32_vpermil2ps256:
582 i = 3;
583 l = 0;
584 u = 3;
585 break;
586 case X86::BI__builtin_ia32_cmpb128_mask:
587 case X86::BI__builtin_ia32_cmpw128_mask:
588 case X86::BI__builtin_ia32_cmpd128_mask:
589 case X86::BI__builtin_ia32_cmpq128_mask:
590 case X86::BI__builtin_ia32_cmpb256_mask:
591 case X86::BI__builtin_ia32_cmpw256_mask:
592 case X86::BI__builtin_ia32_cmpd256_mask:
593 case X86::BI__builtin_ia32_cmpq256_mask:
594 case X86::BI__builtin_ia32_cmpb512_mask:
595 case X86::BI__builtin_ia32_cmpw512_mask:
596 case X86::BI__builtin_ia32_cmpd512_mask:
597 case X86::BI__builtin_ia32_cmpq512_mask:
598 case X86::BI__builtin_ia32_ucmpb128_mask:
599 case X86::BI__builtin_ia32_ucmpw128_mask:
600 case X86::BI__builtin_ia32_ucmpd128_mask:
601 case X86::BI__builtin_ia32_ucmpq128_mask:
602 case X86::BI__builtin_ia32_ucmpb256_mask:
603 case X86::BI__builtin_ia32_ucmpw256_mask:
604 case X86::BI__builtin_ia32_ucmpd256_mask:
605 case X86::BI__builtin_ia32_ucmpq256_mask:
606 case X86::BI__builtin_ia32_ucmpb512_mask:
607 case X86::BI__builtin_ia32_ucmpw512_mask:
608 case X86::BI__builtin_ia32_ucmpd512_mask:
609 case X86::BI__builtin_ia32_ucmpq512_mask:
610 case X86::BI__builtin_ia32_vpcomub:
611 case X86::BI__builtin_ia32_vpcomuw:
612 case X86::BI__builtin_ia32_vpcomud:
613 case X86::BI__builtin_ia32_vpcomuq:
614 case X86::BI__builtin_ia32_vpcomb:
615 case X86::BI__builtin_ia32_vpcomw:
616 case X86::BI__builtin_ia32_vpcomd:
617 case X86::BI__builtin_ia32_vpcomq:
618 case X86::BI__builtin_ia32_vec_set_v8hi:
619 case X86::BI__builtin_ia32_vec_set_v8si:
620 i = 2;
621 l = 0;
622 u = 7;
623 break;
624 case X86::BI__builtin_ia32_vpermilpd256:
625 case X86::BI__builtin_ia32_roundps:
626 case X86::BI__builtin_ia32_roundpd:
627 case X86::BI__builtin_ia32_roundps256:
628 case X86::BI__builtin_ia32_roundpd256:
629 case X86::BI__builtin_ia32_getmantpd128_mask:
630 case X86::BI__builtin_ia32_getmantpd256_mask:
631 case X86::BI__builtin_ia32_getmantps128_mask:
632 case X86::BI__builtin_ia32_getmantps256_mask:
633 case X86::BI__builtin_ia32_getmantpd512_mask:
634 case X86::BI__builtin_ia32_getmantps512_mask:
635 case X86::BI__builtin_ia32_getmantph128_mask:
636 case X86::BI__builtin_ia32_getmantph256_mask:
637 case X86::BI__builtin_ia32_getmantph512_mask:
638 case X86::BI__builtin_ia32_vec_ext_v16qi:
639 case X86::BI__builtin_ia32_vec_ext_v16hi:
640 i = 1;
641 l = 0;
642 u = 15;
643 break;
644 case X86::BI__builtin_ia32_pblendd128:
645 case X86::BI__builtin_ia32_blendps:
646 case X86::BI__builtin_ia32_blendpd256:
647 case X86::BI__builtin_ia32_shufpd256:
648 case X86::BI__builtin_ia32_roundss:
649 case X86::BI__builtin_ia32_roundsd:
650 case X86::BI__builtin_ia32_rangepd128_mask:
651 case X86::BI__builtin_ia32_rangepd256_mask:
652 case X86::BI__builtin_ia32_rangepd512_mask:
653 case X86::BI__builtin_ia32_rangeps128_mask:
654 case X86::BI__builtin_ia32_rangeps256_mask:
655 case X86::BI__builtin_ia32_rangeps512_mask:
656 case X86::BI__builtin_ia32_getmantsd_round_mask:
657 case X86::BI__builtin_ia32_getmantss_round_mask:
658 case X86::BI__builtin_ia32_getmantsh_round_mask:
659 case X86::BI__builtin_ia32_vec_set_v16qi:
660 case X86::BI__builtin_ia32_vec_set_v16hi:
661 i = 2;
662 l = 0;
663 u = 15;
664 break;
665 case X86::BI__builtin_ia32_vec_ext_v32qi:
666 i = 1;
667 l = 0;
668 u = 31;
669 break;
670 case X86::BI__builtin_ia32_cmpps:
671 case X86::BI__builtin_ia32_cmpss:
672 case X86::BI__builtin_ia32_cmppd:
673 case X86::BI__builtin_ia32_cmpsd:
674 case X86::BI__builtin_ia32_cmpps256:
675 case X86::BI__builtin_ia32_cmppd256:
676 case X86::BI__builtin_ia32_cmpps128_mask:
677 case X86::BI__builtin_ia32_cmppd128_mask:
678 case X86::BI__builtin_ia32_cmpps256_mask:
679 case X86::BI__builtin_ia32_cmppd256_mask:
680 case X86::BI__builtin_ia32_cmpps512_mask:
681 case X86::BI__builtin_ia32_cmppd512_mask:
682 case X86::BI__builtin_ia32_cmpsd_mask:
683 case X86::BI__builtin_ia32_cmpss_mask:
684 case X86::BI__builtin_ia32_vec_set_v32qi:
685 i = 2;
686 l = 0;
687 u = 31;
688 break;
689 case X86::BI__builtin_ia32_permdf256:
690 case X86::BI__builtin_ia32_permdi256:
691 case X86::BI__builtin_ia32_permdf512:
692 case X86::BI__builtin_ia32_permdi512:
693 case X86::BI__builtin_ia32_vpermilps:
694 case X86::BI__builtin_ia32_vpermilps256:
695 case X86::BI__builtin_ia32_vpermilpd512:
696 case X86::BI__builtin_ia32_vpermilps512:
697 case X86::BI__builtin_ia32_pshufd:
698 case X86::BI__builtin_ia32_pshufd256:
699 case X86::BI__builtin_ia32_pshufd512:
700 case X86::BI__builtin_ia32_pshufhw:
701 case X86::BI__builtin_ia32_pshufhw256:
702 case X86::BI__builtin_ia32_pshufhw512:
703 case X86::BI__builtin_ia32_pshuflw:
704 case X86::BI__builtin_ia32_pshuflw256:
705 case X86::BI__builtin_ia32_pshuflw512:
706 case X86::BI__builtin_ia32_vcvtps2ph:
707 case X86::BI__builtin_ia32_vcvtps2ph_mask:
708 case X86::BI__builtin_ia32_vcvtps2ph256:
709 case X86::BI__builtin_ia32_vcvtps2ph256_mask:
710 case X86::BI__builtin_ia32_vcvtps2ph512_mask:
711 case X86::BI__builtin_ia32_rndscaleps_128_mask:
712 case X86::BI__builtin_ia32_rndscalepd_128_mask:
713 case X86::BI__builtin_ia32_rndscaleps_256_mask:
714 case X86::BI__builtin_ia32_rndscalepd_256_mask:
715 case X86::BI__builtin_ia32_rndscaleps_mask:
716 case X86::BI__builtin_ia32_rndscalepd_mask:
717 case X86::BI__builtin_ia32_rndscaleph_mask:
718 case X86::BI__builtin_ia32_reducepd128_mask:
719 case X86::BI__builtin_ia32_reducepd256_mask:
720 case X86::BI__builtin_ia32_reducepd512_mask:
721 case X86::BI__builtin_ia32_reduceps128_mask:
722 case X86::BI__builtin_ia32_reduceps256_mask:
723 case X86::BI__builtin_ia32_reduceps512_mask:
724 case X86::BI__builtin_ia32_reduceph128_mask:
725 case X86::BI__builtin_ia32_reduceph256_mask:
726 case X86::BI__builtin_ia32_reduceph512_mask:
727 case X86::BI__builtin_ia32_prold512:
728 case X86::BI__builtin_ia32_prolq512:
729 case X86::BI__builtin_ia32_prold128:
730 case X86::BI__builtin_ia32_prold256:
731 case X86::BI__builtin_ia32_prolq128:
732 case X86::BI__builtin_ia32_prolq256:
733 case X86::BI__builtin_ia32_prord512:
734 case X86::BI__builtin_ia32_prorq512:
735 case X86::BI__builtin_ia32_prord128:
736 case X86::BI__builtin_ia32_prord256:
737 case X86::BI__builtin_ia32_prorq128:
738 case X86::BI__builtin_ia32_prorq256:
739 case X86::BI__builtin_ia32_fpclasspd128_mask:
740 case X86::BI__builtin_ia32_fpclasspd256_mask:
741 case X86::BI__builtin_ia32_fpclassps128_mask:
742 case X86::BI__builtin_ia32_fpclassps256_mask:
743 case X86::BI__builtin_ia32_fpclassps512_mask:
744 case X86::BI__builtin_ia32_fpclasspd512_mask:
745 case X86::BI__builtin_ia32_fpclassph128_mask:
746 case X86::BI__builtin_ia32_fpclassph256_mask:
747 case X86::BI__builtin_ia32_fpclassph512_mask:
748 case X86::BI__builtin_ia32_fpclasssd_mask:
749 case X86::BI__builtin_ia32_fpclassss_mask:
750 case X86::BI__builtin_ia32_fpclasssh_mask:
751 case X86::BI__builtin_ia32_pslldqi128_byteshift:
752 case X86::BI__builtin_ia32_pslldqi256_byteshift:
753 case X86::BI__builtin_ia32_pslldqi512_byteshift:
754 case X86::BI__builtin_ia32_psrldqi128_byteshift:
755 case X86::BI__builtin_ia32_psrldqi256_byteshift:
756 case X86::BI__builtin_ia32_psrldqi512_byteshift:
757 case X86::BI__builtin_ia32_kshiftliqi:
758 case X86::BI__builtin_ia32_kshiftlihi:
759 case X86::BI__builtin_ia32_kshiftlisi:
760 case X86::BI__builtin_ia32_kshiftlidi:
761 case X86::BI__builtin_ia32_kshiftriqi:
762 case X86::BI__builtin_ia32_kshiftrihi:
763 case X86::BI__builtin_ia32_kshiftrisi:
764 case X86::BI__builtin_ia32_kshiftridi:
765 i = 1;
766 l = 0;
767 u = 255;
768 break;
769 case X86::BI__builtin_ia32_vperm2f128_pd256:
770 case X86::BI__builtin_ia32_vperm2f128_ps256:
771 case X86::BI__builtin_ia32_vperm2f128_si256:
772 case X86::BI__builtin_ia32_permti256:
773 case X86::BI__builtin_ia32_pblendw128:
774 case X86::BI__builtin_ia32_pblendw256:
775 case X86::BI__builtin_ia32_blendps256:
776 case X86::BI__builtin_ia32_pblendd256:
777 case X86::BI__builtin_ia32_palignr128:
778 case X86::BI__builtin_ia32_palignr256:
779 case X86::BI__builtin_ia32_palignr512:
780 case X86::BI__builtin_ia32_alignq512:
781 case X86::BI__builtin_ia32_alignd512:
782 case X86::BI__builtin_ia32_alignd128:
783 case X86::BI__builtin_ia32_alignd256:
784 case X86::BI__builtin_ia32_alignq128:
785 case X86::BI__builtin_ia32_alignq256:
786 case X86::BI__builtin_ia32_vcomisd:
787 case X86::BI__builtin_ia32_vcomiss:
788 case X86::BI__builtin_ia32_shuf_f32x4:
789 case X86::BI__builtin_ia32_shuf_f64x2:
790 case X86::BI__builtin_ia32_shuf_i32x4:
791 case X86::BI__builtin_ia32_shuf_i64x2:
792 case X86::BI__builtin_ia32_shufpd512:
793 case X86::BI__builtin_ia32_shufps:
794 case X86::BI__builtin_ia32_shufps256:
795 case X86::BI__builtin_ia32_shufps512:
796 case X86::BI__builtin_ia32_dbpsadbw128:
797 case X86::BI__builtin_ia32_dbpsadbw256:
798 case X86::BI__builtin_ia32_dbpsadbw512:
799 case X86::BI__builtin_ia32_vpshldd128:
800 case X86::BI__builtin_ia32_vpshldd256:
801 case X86::BI__builtin_ia32_vpshldd512:
802 case X86::BI__builtin_ia32_vpshldq128:
803 case X86::BI__builtin_ia32_vpshldq256:
804 case X86::BI__builtin_ia32_vpshldq512:
805 case X86::BI__builtin_ia32_vpshldw128:
806 case X86::BI__builtin_ia32_vpshldw256:
807 case X86::BI__builtin_ia32_vpshldw512:
808 case X86::BI__builtin_ia32_vpshrdd128:
809 case X86::BI__builtin_ia32_vpshrdd256:
810 case X86::BI__builtin_ia32_vpshrdd512:
811 case X86::BI__builtin_ia32_vpshrdq128:
812 case X86::BI__builtin_ia32_vpshrdq256:
813 case X86::BI__builtin_ia32_vpshrdq512:
814 case X86::BI__builtin_ia32_vpshrdw128:
815 case X86::BI__builtin_ia32_vpshrdw256:
816 case X86::BI__builtin_ia32_vpshrdw512:
817 i = 2;
818 l = 0;
819 u = 255;
820 break;
821 case X86::BI__builtin_ia32_fixupimmpd512_mask:
822 case X86::BI__builtin_ia32_fixupimmpd512_maskz:
823 case X86::BI__builtin_ia32_fixupimmps512_mask:
824 case X86::BI__builtin_ia32_fixupimmps512_maskz:
825 case X86::BI__builtin_ia32_fixupimmsd_mask:
826 case X86::BI__builtin_ia32_fixupimmsd_maskz:
827 case X86::BI__builtin_ia32_fixupimmss_mask:
828 case X86::BI__builtin_ia32_fixupimmss_maskz:
829 case X86::BI__builtin_ia32_fixupimmpd128_mask:
830 case X86::BI__builtin_ia32_fixupimmpd128_maskz:
831 case X86::BI__builtin_ia32_fixupimmpd256_mask:
832 case X86::BI__builtin_ia32_fixupimmpd256_maskz:
833 case X86::BI__builtin_ia32_fixupimmps128_mask:
834 case X86::BI__builtin_ia32_fixupimmps128_maskz:
835 case X86::BI__builtin_ia32_fixupimmps256_mask:
836 case X86::BI__builtin_ia32_fixupimmps256_maskz:
837 case X86::BI__builtin_ia32_pternlogd512_mask:
838 case X86::BI__builtin_ia32_pternlogd512_maskz:
839 case X86::BI__builtin_ia32_pternlogq512_mask:
840 case X86::BI__builtin_ia32_pternlogq512_maskz:
841 case X86::BI__builtin_ia32_pternlogd128_mask:
842 case X86::BI__builtin_ia32_pternlogd128_maskz:
843 case X86::BI__builtin_ia32_pternlogd256_mask:
844 case X86::BI__builtin_ia32_pternlogd256_maskz:
845 case X86::BI__builtin_ia32_pternlogq128_mask:
846 case X86::BI__builtin_ia32_pternlogq128_maskz:
847 case X86::BI__builtin_ia32_pternlogq256_mask:
848 case X86::BI__builtin_ia32_pternlogq256_maskz:
849 case X86::BI__builtin_ia32_vsm3rnds2:
850 i = 3;
851 l = 0;
852 u = 255;
853 break;
854 case X86::BI__builtin_ia32_reducesd_mask:
855 case X86::BI__builtin_ia32_reducess_mask:
856 case X86::BI__builtin_ia32_rndscalesd_round_mask:
857 case X86::BI__builtin_ia32_rndscaless_round_mask:
858 case X86::BI__builtin_ia32_rndscalesh_round_mask:
859 case X86::BI__builtin_ia32_reducesh_mask:
860 i = 4;
861 l = 0;
862 u = 255;
863 break;
864 case X86::BI__builtin_ia32_cmpccxadd32:
865 case X86::BI__builtin_ia32_cmpccxadd64:
866 i = 3;
867 l = 0;
868 u = 15;
869 break;
870 }
871
872 // Note that we don't force a hard error on the range check here, allowing
873 // template-generated or macro-generated dead code to potentially have out-of-
874 // range values. These need to code generate, but don't need to necessarily
875 // make any sense. We use a warning that defaults to an error.
876 return SemaRef.BuiltinConstantArgRange(TheCall, i, l, u,
877 /*RangeIsError*/ false);
878}
879
881 // Semantic checks for a function with the 'interrupt' attribute.
882 // a) Must be a function.
883 // b) Must have the 'void' return type.
884 // c) Must take 1 or 2 arguments.
885 // d) The 1st argument must be a pointer.
886 // e) The 2nd argument (if any) must be an unsigned integer.
887 ASTContext &Context = getASTContext();
888
892 cast<NamedDecl>(D)->getDeclName().getCXXOverloadedOperator())) {
893 Diag(AL.getLoc(), diag::warn_attribute_wrong_decl_type)
894 << AL << AL.isRegularKeywordAttribute()
896 return;
897 }
898 // Interrupt handler must have void return type.
899 if (!getFunctionOrMethodResultType(D)->isVoidType()) {
901 diag::err_anyx86_interrupt_attribute)
902 << (SemaRef.Context.getTargetInfo().getTriple().getArch() ==
903 llvm::Triple::x86
904 ? 0
905 : 1)
906 << 0;
907 return;
908 }
909 // Interrupt handler must have 1 or 2 parameters.
910 unsigned NumParams = getFunctionOrMethodNumParams(D);
911 if (NumParams < 1 || NumParams > 2) {
912 Diag(D->getBeginLoc(), diag::err_anyx86_interrupt_attribute)
913 << (Context.getTargetInfo().getTriple().getArch() == llvm::Triple::x86
914 ? 0
915 : 1)
916 << 1;
917 return;
918 }
919 // The first argument must be a pointer.
921 Diag(getFunctionOrMethodParamRange(D, 0).getBegin(),
922 diag::err_anyx86_interrupt_attribute)
923 << (Context.getTargetInfo().getTriple().getArch() == llvm::Triple::x86
924 ? 0
925 : 1)
926 << 2;
927 return;
928 }
929 // The second argument, if present, must be an unsigned integer.
930 unsigned TypeSize =
931 Context.getTargetInfo().getTriple().getArch() == llvm::Triple::x86_64
932 ? 64
933 : 32;
934 if (NumParams == 2 &&
935 (!getFunctionOrMethodParamType(D, 1)->isUnsignedIntegerType() ||
936 Context.getTypeSize(getFunctionOrMethodParamType(D, 1)) != TypeSize)) {
937 Diag(getFunctionOrMethodParamRange(D, 1).getBegin(),
938 diag::err_anyx86_interrupt_attribute)
939 << (Context.getTargetInfo().getTriple().getArch() == llvm::Triple::x86
940 ? 0
941 : 1)
942 << 3 << Context.getIntTypeForBitwidth(TypeSize, /*Signed=*/false);
943 return;
944 }
945 D->addAttr(::new (Context) AnyX86InterruptAttr(Context, AL));
946 D->addAttr(UsedAttr::CreateImplicit(Context));
947}
948
950 // If we try to apply it to a function pointer, don't warn, but don't
951 // do anything, either. It doesn't matter anyway, because there's nothing
952 // special about calling a force_align_arg_pointer function.
953 const auto *VD = dyn_cast<ValueDecl>(D);
954 if (VD && VD->getType()->isFunctionPointerType())
955 return;
956 // Also don't warn on function pointer typedefs.
957 const auto *TD = dyn_cast<TypedefNameDecl>(D);
958 if (TD && (TD->getUnderlyingType()->isFunctionPointerType() ||
959 TD->getUnderlyingType()->isFunctionType()))
960 return;
961 // Attribute can only be applied to function types.
962 if (!isa<FunctionDecl>(D)) {
963 Diag(AL.getLoc(), diag::warn_attribute_wrong_decl_type)
965 return;
966 }
967
968 D->addAttr(::new (getASTContext())
969 X86ForceAlignArgPointerAttr(getASTContext(), AL));
970}
971
972} // namespace clang
const Decl * D
This file declares semantic analysis functions specific to X86.
Enumerates target-specific builtins in their own namespaces within namespace clang.
Holds long-lived AST nodes (such as types and decls) that can be referred to throughout the semantic ...
Definition: ASTContext.h:186
const TargetInfo & getTargetInfo() const
Definition: ASTContext.h:769
SourceLocation getLoc() const
static bool isStaticOverloadedOperator(OverloadedOperatorKind OOK)
Returns true if the given operator is implicitly static in a record context.
Definition: DeclCXX.h:2102
CallExpr - Represents a function call (C99 6.5.2.2, C++ [expr.call]).
Definition: Expr.h:2825
Expr * getArg(unsigned Arg)
getArg - Return the specified argument.
Definition: Expr.h:3016
SourceLocation getBeginLoc() const LLVM_READONLY
Definition: Expr.cpp:1638
Expr * getCallee()
Definition: Expr.h:2975
Decl - This represents one declaration (or definition), e.g.
Definition: DeclBase.h:86
This represents one expression.
Definition: Expr.h:110
bool isValueDependent() const
Determines whether the value of this expression depends on.
Definition: Expr.h:175
bool isTypeDependent() const
Determines whether the type of this expression depends on.
Definition: Expr.h:192
ParsedAttr - Represents a syntactic attribute.
Definition: ParsedAttr.h:129
SemaDiagnosticBuilder Diag(SourceLocation Loc, unsigned DiagID, bool DeferHint=false)
Emit a diagnostic.
Definition: SemaBase.cpp:60
ASTContext & getASTContext() const
Definition: SemaBase.cpp:9
Sema & SemaRef
Definition: SemaBase.h:40
bool CheckBuiltinTileArgumentsRange(CallExpr *TheCall, ArrayRef< int > ArgNums)
Definition: SemaX86.cpp:407
void handleForceAlignArgPointerAttr(Decl *D, const ParsedAttr &AL)
Definition: SemaX86.cpp:949
bool CheckBuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID, CallExpr *TheCall)
Definition: SemaX86.cpp:479
bool CheckBuiltinRoundingOrSAE(unsigned BuiltinID, CallExpr *TheCall)
Definition: SemaX86.cpp:28
bool CheckBuiltinTileRangeAndDuplicate(CallExpr *TheCall, ArrayRef< int > ArgNums)
Definition: SemaX86.cpp:442
bool CheckBuiltinGatherScatterScale(unsigned BuiltinID, CallExpr *TheCall)
Definition: SemaX86.cpp:313
bool CheckBuiltinTileDuplicate(CallExpr *TheCall, ArrayRef< int > ArgNums)
Definition: SemaX86.cpp:417
void handleAnyInterruptAttr(Decl *D, const ParsedAttr &AL)
Definition: SemaX86.cpp:880
SemaX86(Sema &S)
Definition: SemaX86.cpp:25
bool CheckBuiltinTileArguments(unsigned BuiltinID, CallExpr *TheCall)
Definition: SemaX86.cpp:448
Sema - This implements semantic analysis and AST building for C.
Definition: Sema.h:535
ASTContext & Context
Definition: Sema.h:1002
bool BuiltinConstantArg(CallExpr *TheCall, int ArgNum, llvm::APSInt &Result)
BuiltinConstantArg - Handle a check if argument ArgNum of CallExpr TheCall is a constant expression.
bool BuiltinConstantArgRange(CallExpr *TheCall, int ArgNum, int Low, int High, bool RangeIsError=true)
BuiltinConstantArgRange - Handle a check if argument ArgNum of CallExpr TheCall is a constant express...
SourceRange getSourceRange() const LLVM_READONLY
SourceLocation tokens are not useful in isolation - they are low level value objects created/interpre...
Definition: Stmt.cpp:326
SourceLocation getBeginLoc() const LLVM_READONLY
Definition: Stmt.cpp:338
Exposes information about the current target.
Definition: TargetInfo.h:218
const llvm::Triple & getTriple() const
Returns the target triple of the primary target.
Definition: TargetInfo.h:1256
bool isPointerType() const
Definition: Type.h:7997
The JSON file list parser is used to communicate input to InstallAPI.
@ ExpectedFunctionWithProtoType
Definition: ParsedAttr.h:1103
@ ExpectedFunction
Definition: ParsedAttr.h:1091
QualType getFunctionOrMethodResultType(const Decl *D)
Definition: Attr.h:98
bool isInstanceMethod(const Decl *D)
Definition: Attr.h:120
static bool isX86_32Builtin(unsigned BuiltinID)
Definition: SemaX86.cpp:468
SourceRange getFunctionOrMethodResultSourceRange(const Decl *D)
Definition: Attr.h:104
QualType getFunctionOrMethodParamType(const Decl *D, unsigned Idx)
Definition: Attr.h:83
@ Result
The result type of a method or function.
bool isFuncOrMethodForAttrSubject(const Decl *D)
isFuncOrMethodForAttrSubject - Return true if the given decl has function type (function or function-...
Definition: Attr.h:34
bool hasFunctionProto(const Decl *D)
hasFunctionProto - Return true if the given decl has a argument information.
Definition: Attr.h:55
unsigned getFunctionOrMethodNumParams(const Decl *D)
getFunctionOrMethodNumParams - Return number of function or method parameters.
Definition: Attr.h:64
@ TileRegLow
Definition: SemaX86.cpp:405
@ TileRegHigh
Definition: SemaX86.cpp:405
SourceRange getFunctionOrMethodParamRange(const Decl *D, unsigned Idx)
Definition: Attr.h:92