clang 20.0.0git
SemaX86.cpp
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1//===------ SemaX86.cpp ---------- X86 target-specific routines -----------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements semantic analysis functions specific to X86.
10//
11//===----------------------------------------------------------------------===//
12
13#include "clang/Sema/SemaX86.h"
17#include "clang/Sema/Attr.h"
19#include "clang/Sema/Sema.h"
20#include "llvm/ADT/APSInt.h"
21#include "llvm/TargetParser/Triple.h"
22#include <bitset>
23
24namespace clang {
25
27
28// Check if the rounding mode is legal.
29bool SemaX86::CheckBuiltinRoundingOrSAE(unsigned BuiltinID, CallExpr *TheCall) {
30 // Indicates if this instruction has rounding control or just SAE.
31 bool HasRC = false;
32
33 unsigned ArgNum = 0;
34 switch (BuiltinID) {
35 default:
36 return false;
37 case X86::BI__builtin_ia32_vcvttsd2si32:
38 case X86::BI__builtin_ia32_vcvttsd2si64:
39 case X86::BI__builtin_ia32_vcvttsd2usi32:
40 case X86::BI__builtin_ia32_vcvttsd2usi64:
41 case X86::BI__builtin_ia32_vcvttss2si32:
42 case X86::BI__builtin_ia32_vcvttss2si64:
43 case X86::BI__builtin_ia32_vcvttss2usi32:
44 case X86::BI__builtin_ia32_vcvttss2usi64:
45 case X86::BI__builtin_ia32_vcvttsh2si32:
46 case X86::BI__builtin_ia32_vcvttsh2si64:
47 case X86::BI__builtin_ia32_vcvttsh2usi32:
48 case X86::BI__builtin_ia32_vcvttsh2usi64:
49 ArgNum = 1;
50 break;
51 case X86::BI__builtin_ia32_maxpd512:
52 case X86::BI__builtin_ia32_maxps512:
53 case X86::BI__builtin_ia32_minpd512:
54 case X86::BI__builtin_ia32_minps512:
55 case X86::BI__builtin_ia32_maxph512:
56 case X86::BI__builtin_ia32_minph512:
57 case X86::BI__builtin_ia32_vmaxpd256_round:
58 case X86::BI__builtin_ia32_vmaxps256_round:
59 case X86::BI__builtin_ia32_vminpd256_round:
60 case X86::BI__builtin_ia32_vminps256_round:
61 case X86::BI__builtin_ia32_vmaxph256_round:
62 case X86::BI__builtin_ia32_vminph256_round:
63 ArgNum = 2;
64 break;
65 case X86::BI__builtin_ia32_vcvtph2pd512_mask:
66 case X86::BI__builtin_ia32_vcvtph2psx512_mask:
67 case X86::BI__builtin_ia32_cvtps2pd512_mask:
68 case X86::BI__builtin_ia32_cvttpd2dq512_mask:
69 case X86::BI__builtin_ia32_cvttpd2qq512_mask:
70 case X86::BI__builtin_ia32_cvttpd2udq512_mask:
71 case X86::BI__builtin_ia32_cvttpd2uqq512_mask:
72 case X86::BI__builtin_ia32_cvttps2dq512_mask:
73 case X86::BI__builtin_ia32_cvttps2qq512_mask:
74 case X86::BI__builtin_ia32_cvttps2udq512_mask:
75 case X86::BI__builtin_ia32_cvttps2uqq512_mask:
76 case X86::BI__builtin_ia32_vcvttph2w512_mask:
77 case X86::BI__builtin_ia32_vcvttph2uw512_mask:
78 case X86::BI__builtin_ia32_vcvttph2dq512_mask:
79 case X86::BI__builtin_ia32_vcvttph2udq512_mask:
80 case X86::BI__builtin_ia32_vcvttph2qq512_mask:
81 case X86::BI__builtin_ia32_vcvttph2uqq512_mask:
82 case X86::BI__builtin_ia32_getexppd512_mask:
83 case X86::BI__builtin_ia32_getexpps512_mask:
84 case X86::BI__builtin_ia32_getexpph512_mask:
85 case X86::BI__builtin_ia32_vcomisd:
86 case X86::BI__builtin_ia32_vcomiss:
87 case X86::BI__builtin_ia32_vcomish:
88 case X86::BI__builtin_ia32_vcvtph2ps512_mask:
89 case X86::BI__builtin_ia32_vgetexppd256_round_mask:
90 case X86::BI__builtin_ia32_vgetexpps256_round_mask:
91 case X86::BI__builtin_ia32_vgetexpph256_round_mask:
92 case X86::BI__builtin_ia32_vcvttph2ibs256_mask:
93 case X86::BI__builtin_ia32_vcvttph2iubs256_mask:
94 case X86::BI__builtin_ia32_vcvttps2ibs256_mask:
95 case X86::BI__builtin_ia32_vcvttps2iubs256_mask:
96 case X86::BI__builtin_ia32_vcvttph2ibs512_mask:
97 case X86::BI__builtin_ia32_vcvttph2iubs512_mask:
98 case X86::BI__builtin_ia32_vcvttps2ibs512_mask:
99 case X86::BI__builtin_ia32_vcvttps2iubs512_mask:
100 ArgNum = 3;
101 break;
102 case X86::BI__builtin_ia32_cmppd512_mask:
103 case X86::BI__builtin_ia32_cmpps512_mask:
104 case X86::BI__builtin_ia32_cmpph512_mask:
105 case X86::BI__builtin_ia32_vcmppd256_round_mask:
106 case X86::BI__builtin_ia32_vcmpps256_round_mask:
107 case X86::BI__builtin_ia32_vcmpph256_round_mask:
108 case X86::BI__builtin_ia32_cmpsd_mask:
109 case X86::BI__builtin_ia32_cmpss_mask:
110 case X86::BI__builtin_ia32_cmpsh_mask:
111 case X86::BI__builtin_ia32_vcvtsh2sd_round_mask:
112 case X86::BI__builtin_ia32_vcvtsh2ss_round_mask:
113 case X86::BI__builtin_ia32_cvtss2sd_round_mask:
114 case X86::BI__builtin_ia32_getexpsd128_round_mask:
115 case X86::BI__builtin_ia32_getexpss128_round_mask:
116 case X86::BI__builtin_ia32_getexpsh128_round_mask:
117 case X86::BI__builtin_ia32_getmantpd512_mask:
118 case X86::BI__builtin_ia32_getmantps512_mask:
119 case X86::BI__builtin_ia32_getmantph512_mask:
120 case X86::BI__builtin_ia32_vgetmantpd256_round_mask:
121 case X86::BI__builtin_ia32_vgetmantps256_round_mask:
122 case X86::BI__builtin_ia32_vgetmantph256_round_mask:
123 case X86::BI__builtin_ia32_maxsd_round_mask:
124 case X86::BI__builtin_ia32_maxss_round_mask:
125 case X86::BI__builtin_ia32_maxsh_round_mask:
126 case X86::BI__builtin_ia32_minsd_round_mask:
127 case X86::BI__builtin_ia32_minss_round_mask:
128 case X86::BI__builtin_ia32_minsh_round_mask:
129 case X86::BI__builtin_ia32_reducepd512_mask:
130 case X86::BI__builtin_ia32_reduceps512_mask:
131 case X86::BI__builtin_ia32_reduceph512_mask:
132 case X86::BI__builtin_ia32_rndscalepd_mask:
133 case X86::BI__builtin_ia32_rndscaleps_mask:
134 case X86::BI__builtin_ia32_rndscaleph_mask:
135 case X86::BI__builtin_ia32_vreducepd256_round_mask:
136 case X86::BI__builtin_ia32_vreduceps256_round_mask:
137 case X86::BI__builtin_ia32_vreduceph256_round_mask:
138 case X86::BI__builtin_ia32_vrndscalepd256_round_mask:
139 case X86::BI__builtin_ia32_vrndscaleps256_round_mask:
140 case X86::BI__builtin_ia32_vrndscaleph256_round_mask:
141 ArgNum = 4;
142 break;
143 case X86::BI__builtin_ia32_fixupimmpd512_mask:
144 case X86::BI__builtin_ia32_fixupimmpd512_maskz:
145 case X86::BI__builtin_ia32_fixupimmps512_mask:
146 case X86::BI__builtin_ia32_fixupimmps512_maskz:
147 case X86::BI__builtin_ia32_vfixupimmpd256_round_mask:
148 case X86::BI__builtin_ia32_vfixupimmpd256_round_maskz:
149 case X86::BI__builtin_ia32_vfixupimmps256_round_mask:
150 case X86::BI__builtin_ia32_vfixupimmps256_round_maskz:
151 case X86::BI__builtin_ia32_fixupimmsd_mask:
152 case X86::BI__builtin_ia32_fixupimmsd_maskz:
153 case X86::BI__builtin_ia32_fixupimmss_mask:
154 case X86::BI__builtin_ia32_fixupimmss_maskz:
155 case X86::BI__builtin_ia32_getmantsd_round_mask:
156 case X86::BI__builtin_ia32_getmantss_round_mask:
157 case X86::BI__builtin_ia32_getmantsh_round_mask:
158 case X86::BI__builtin_ia32_rangepd512_mask:
159 case X86::BI__builtin_ia32_rangeps512_mask:
160 case X86::BI__builtin_ia32_vrangepd256_round_mask:
161 case X86::BI__builtin_ia32_vrangeps256_round_mask:
162 case X86::BI__builtin_ia32_rangesd128_round_mask:
163 case X86::BI__builtin_ia32_rangess128_round_mask:
164 case X86::BI__builtin_ia32_reducesd_mask:
165 case X86::BI__builtin_ia32_reducess_mask:
166 case X86::BI__builtin_ia32_reducesh_mask:
167 case X86::BI__builtin_ia32_rndscalesd_round_mask:
168 case X86::BI__builtin_ia32_rndscaless_round_mask:
169 case X86::BI__builtin_ia32_rndscalesh_round_mask:
170 case X86::BI__builtin_ia32_vminmaxpd256_round_mask:
171 case X86::BI__builtin_ia32_vminmaxps256_round_mask:
172 case X86::BI__builtin_ia32_vminmaxph256_round_mask:
173 case X86::BI__builtin_ia32_vminmaxpd512_round_mask:
174 case X86::BI__builtin_ia32_vminmaxps512_round_mask:
175 case X86::BI__builtin_ia32_vminmaxph512_round_mask:
176 case X86::BI__builtin_ia32_vminmaxsd_round_mask:
177 case X86::BI__builtin_ia32_vminmaxsh_round_mask:
178 case X86::BI__builtin_ia32_vminmaxss_round_mask:
179 ArgNum = 5;
180 break;
181 case X86::BI__builtin_ia32_vcvtsd2si64:
182 case X86::BI__builtin_ia32_vcvtsd2si32:
183 case X86::BI__builtin_ia32_vcvtsd2usi32:
184 case X86::BI__builtin_ia32_vcvtsd2usi64:
185 case X86::BI__builtin_ia32_vcvtss2si32:
186 case X86::BI__builtin_ia32_vcvtss2si64:
187 case X86::BI__builtin_ia32_vcvtss2usi32:
188 case X86::BI__builtin_ia32_vcvtss2usi64:
189 case X86::BI__builtin_ia32_vcvtsh2si32:
190 case X86::BI__builtin_ia32_vcvtsh2si64:
191 case X86::BI__builtin_ia32_vcvtsh2usi32:
192 case X86::BI__builtin_ia32_vcvtsh2usi64:
193 case X86::BI__builtin_ia32_sqrtpd512:
194 case X86::BI__builtin_ia32_sqrtps512:
195 case X86::BI__builtin_ia32_sqrtph512:
196 case X86::BI__builtin_ia32_vsqrtpd256_round:
197 case X86::BI__builtin_ia32_vsqrtps256_round:
198 case X86::BI__builtin_ia32_vsqrtph256_round:
199 ArgNum = 1;
200 HasRC = true;
201 break;
202 case X86::BI__builtin_ia32_addph512:
203 case X86::BI__builtin_ia32_divph512:
204 case X86::BI__builtin_ia32_mulph512:
205 case X86::BI__builtin_ia32_subph512:
206 case X86::BI__builtin_ia32_addpd512:
207 case X86::BI__builtin_ia32_addps512:
208 case X86::BI__builtin_ia32_divpd512:
209 case X86::BI__builtin_ia32_divps512:
210 case X86::BI__builtin_ia32_mulpd512:
211 case X86::BI__builtin_ia32_mulps512:
212 case X86::BI__builtin_ia32_subpd512:
213 case X86::BI__builtin_ia32_subps512:
214 case X86::BI__builtin_ia32_vaddpd256_round:
215 case X86::BI__builtin_ia32_vaddph256_round:
216 case X86::BI__builtin_ia32_vaddps256_round:
217 case X86::BI__builtin_ia32_vdivpd256_round:
218 case X86::BI__builtin_ia32_vdivph256_round:
219 case X86::BI__builtin_ia32_vdivps256_round:
220 case X86::BI__builtin_ia32_vmulpd256_round:
221 case X86::BI__builtin_ia32_vmulph256_round:
222 case X86::BI__builtin_ia32_vmulps256_round:
223 case X86::BI__builtin_ia32_vsubpd256_round:
224 case X86::BI__builtin_ia32_vsubph256_round:
225 case X86::BI__builtin_ia32_vsubps256_round:
226 case X86::BI__builtin_ia32_cvtsi2sd64:
227 case X86::BI__builtin_ia32_cvtsi2ss32:
228 case X86::BI__builtin_ia32_cvtsi2ss64:
229 case X86::BI__builtin_ia32_cvtusi2sd64:
230 case X86::BI__builtin_ia32_cvtusi2ss32:
231 case X86::BI__builtin_ia32_cvtusi2ss64:
232 case X86::BI__builtin_ia32_vcvtusi2sh:
233 case X86::BI__builtin_ia32_vcvtusi642sh:
234 case X86::BI__builtin_ia32_vcvtsi2sh:
235 case X86::BI__builtin_ia32_vcvtsi642sh:
236 ArgNum = 2;
237 HasRC = true;
238 break;
239 case X86::BI__builtin_ia32_cvtdq2ps512_mask:
240 case X86::BI__builtin_ia32_cvtudq2ps512_mask:
241 case X86::BI__builtin_ia32_vcvtpd2ph512_mask:
242 case X86::BI__builtin_ia32_vcvtps2phx512_mask:
243 case X86::BI__builtin_ia32_cvtpd2ps512_mask:
244 case X86::BI__builtin_ia32_cvtpd2dq512_mask:
245 case X86::BI__builtin_ia32_cvtpd2qq512_mask:
246 case X86::BI__builtin_ia32_cvtpd2udq512_mask:
247 case X86::BI__builtin_ia32_cvtpd2uqq512_mask:
248 case X86::BI__builtin_ia32_cvtps2dq512_mask:
249 case X86::BI__builtin_ia32_cvtps2qq512_mask:
250 case X86::BI__builtin_ia32_cvtps2udq512_mask:
251 case X86::BI__builtin_ia32_cvtps2uqq512_mask:
252 case X86::BI__builtin_ia32_cvtqq2pd512_mask:
253 case X86::BI__builtin_ia32_cvtqq2ps512_mask:
254 case X86::BI__builtin_ia32_cvtuqq2pd512_mask:
255 case X86::BI__builtin_ia32_cvtuqq2ps512_mask:
256 case X86::BI__builtin_ia32_vcvtdq2ph512_mask:
257 case X86::BI__builtin_ia32_vcvtudq2ph512_mask:
258 case X86::BI__builtin_ia32_vcvtw2ph512_mask:
259 case X86::BI__builtin_ia32_vcvtuw2ph512_mask:
260 case X86::BI__builtin_ia32_vcvtph2w512_mask:
261 case X86::BI__builtin_ia32_vcvtph2uw512_mask:
262 case X86::BI__builtin_ia32_vcvtph2dq512_mask:
263 case X86::BI__builtin_ia32_vcvtph2udq512_mask:
264 case X86::BI__builtin_ia32_vcvtph2qq512_mask:
265 case X86::BI__builtin_ia32_vcvtph2uqq512_mask:
266 case X86::BI__builtin_ia32_vcvtqq2ph512_mask:
267 case X86::BI__builtin_ia32_vcvtuqq2ph512_mask:
268 case X86::BI__builtin_ia32_vcvtph2pd256_round_mask:
269 case X86::BI__builtin_ia32_vcvtph2psx256_round_mask:
270 case X86::BI__builtin_ia32_vcvtps2pd256_round_mask:
271 case X86::BI__builtin_ia32_vcvttpd2dq256_round_mask:
272 case X86::BI__builtin_ia32_vcvttpd2qq256_round_mask:
273 case X86::BI__builtin_ia32_vcvttpd2udq256_round_mask:
274 case X86::BI__builtin_ia32_vcvttpd2uqq256_round_mask:
275 case X86::BI__builtin_ia32_vcvttps2dq256_round_mask:
276 case X86::BI__builtin_ia32_vcvttps2qq256_round_mask:
277 case X86::BI__builtin_ia32_vcvttps2udq256_round_mask:
278 case X86::BI__builtin_ia32_vcvttps2uqq256_round_mask:
279 case X86::BI__builtin_ia32_vcvttph2w256_round_mask:
280 case X86::BI__builtin_ia32_vcvttph2uw256_round_mask:
281 case X86::BI__builtin_ia32_vcvttph2dq256_round_mask:
282 case X86::BI__builtin_ia32_vcvttph2udq256_round_mask:
283 case X86::BI__builtin_ia32_vcvttph2qq256_round_mask:
284 case X86::BI__builtin_ia32_vcvttph2uqq256_round_mask:
285 case X86::BI__builtin_ia32_vcvtdq2ps256_round_mask:
286 case X86::BI__builtin_ia32_vcvtudq2ps256_round_mask:
287 case X86::BI__builtin_ia32_vcvtpd2ph256_round_mask:
288 case X86::BI__builtin_ia32_vcvtps2phx256_round_mask:
289 case X86::BI__builtin_ia32_vcvtpd2ps256_round_mask:
290 case X86::BI__builtin_ia32_vcvtpd2dq256_round_mask:
291 case X86::BI__builtin_ia32_vcvtpd2qq256_round_mask:
292 case X86::BI__builtin_ia32_vcvtpd2udq256_round_mask:
293 case X86::BI__builtin_ia32_vcvtpd2uqq256_round_mask:
294 case X86::BI__builtin_ia32_vcvtps2dq256_round_mask:
295 case X86::BI__builtin_ia32_vcvtps2qq256_round_mask:
296 case X86::BI__builtin_ia32_vcvtps2udq256_round_mask:
297 case X86::BI__builtin_ia32_vcvtps2uqq256_round_mask:
298 case X86::BI__builtin_ia32_vcvtqq2pd256_round_mask:
299 case X86::BI__builtin_ia32_vcvtqq2ps256_round_mask:
300 case X86::BI__builtin_ia32_vcvtuqq2pd256_round_mask:
301 case X86::BI__builtin_ia32_vcvtuqq2ps256_round_mask:
302 case X86::BI__builtin_ia32_vcvtdq2ph256_round_mask:
303 case X86::BI__builtin_ia32_vcvtudq2ph256_round_mask:
304 case X86::BI__builtin_ia32_vcvtw2ph256_round_mask:
305 case X86::BI__builtin_ia32_vcvtuw2ph256_round_mask:
306 case X86::BI__builtin_ia32_vcvtph2w256_round_mask:
307 case X86::BI__builtin_ia32_vcvtph2uw256_round_mask:
308 case X86::BI__builtin_ia32_vcvtph2dq256_round_mask:
309 case X86::BI__builtin_ia32_vcvtph2udq256_round_mask:
310 case X86::BI__builtin_ia32_vcvtph2qq256_round_mask:
311 case X86::BI__builtin_ia32_vcvtph2uqq256_round_mask:
312 case X86::BI__builtin_ia32_vcvtqq2ph256_round_mask:
313 case X86::BI__builtin_ia32_vcvtuqq2ph256_round_mask:
314 case X86::BI__builtin_ia32_vcvtph2ibs256_mask:
315 case X86::BI__builtin_ia32_vcvtph2iubs256_mask:
316 case X86::BI__builtin_ia32_vcvtps2ibs256_mask:
317 case X86::BI__builtin_ia32_vcvtps2iubs256_mask:
318 case X86::BI__builtin_ia32_vcvtph2ibs512_mask:
319 case X86::BI__builtin_ia32_vcvtph2iubs512_mask:
320 case X86::BI__builtin_ia32_vcvtps2ibs512_mask:
321 case X86::BI__builtin_ia32_vcvtps2iubs512_mask:
322 ArgNum = 3;
323 HasRC = true;
324 break;
325 case X86::BI__builtin_ia32_addsh_round_mask:
326 case X86::BI__builtin_ia32_addss_round_mask:
327 case X86::BI__builtin_ia32_addsd_round_mask:
328 case X86::BI__builtin_ia32_divsh_round_mask:
329 case X86::BI__builtin_ia32_divss_round_mask:
330 case X86::BI__builtin_ia32_divsd_round_mask:
331 case X86::BI__builtin_ia32_mulsh_round_mask:
332 case X86::BI__builtin_ia32_mulss_round_mask:
333 case X86::BI__builtin_ia32_mulsd_round_mask:
334 case X86::BI__builtin_ia32_subsh_round_mask:
335 case X86::BI__builtin_ia32_subss_round_mask:
336 case X86::BI__builtin_ia32_subsd_round_mask:
337 case X86::BI__builtin_ia32_scalefph512_mask:
338 case X86::BI__builtin_ia32_scalefpd512_mask:
339 case X86::BI__builtin_ia32_scalefps512_mask:
340 case X86::BI__builtin_ia32_vscalefph256_round_mask:
341 case X86::BI__builtin_ia32_vscalefpd256_round_mask:
342 case X86::BI__builtin_ia32_vscalefps256_round_mask:
343 case X86::BI__builtin_ia32_scalefsd_round_mask:
344 case X86::BI__builtin_ia32_scalefss_round_mask:
345 case X86::BI__builtin_ia32_scalefsh_round_mask:
346 case X86::BI__builtin_ia32_cvtsd2ss_round_mask:
347 case X86::BI__builtin_ia32_vcvtss2sh_round_mask:
348 case X86::BI__builtin_ia32_vcvtsd2sh_round_mask:
349 case X86::BI__builtin_ia32_sqrtsd_round_mask:
350 case X86::BI__builtin_ia32_sqrtss_round_mask:
351 case X86::BI__builtin_ia32_sqrtsh_round_mask:
352 case X86::BI__builtin_ia32_vfmaddsd3_mask:
353 case X86::BI__builtin_ia32_vfmaddsd3_maskz:
354 case X86::BI__builtin_ia32_vfmaddsd3_mask3:
355 case X86::BI__builtin_ia32_vfmaddss3_mask:
356 case X86::BI__builtin_ia32_vfmaddss3_maskz:
357 case X86::BI__builtin_ia32_vfmaddss3_mask3:
358 case X86::BI__builtin_ia32_vfmaddsh3_mask:
359 case X86::BI__builtin_ia32_vfmaddsh3_maskz:
360 case X86::BI__builtin_ia32_vfmaddsh3_mask3:
361 case X86::BI__builtin_ia32_vfmaddpd512_mask:
362 case X86::BI__builtin_ia32_vfmaddpd512_maskz:
363 case X86::BI__builtin_ia32_vfmaddpd512_mask3:
364 case X86::BI__builtin_ia32_vfmsubpd512_mask3:
365 case X86::BI__builtin_ia32_vfmaddps512_mask:
366 case X86::BI__builtin_ia32_vfmaddps512_maskz:
367 case X86::BI__builtin_ia32_vfmaddps512_mask3:
368 case X86::BI__builtin_ia32_vfmsubps512_mask3:
369 case X86::BI__builtin_ia32_vfmaddph512_mask:
370 case X86::BI__builtin_ia32_vfmaddph512_maskz:
371 case X86::BI__builtin_ia32_vfmaddph512_mask3:
372 case X86::BI__builtin_ia32_vfmsubph512_mask3:
373 case X86::BI__builtin_ia32_vfmaddsubpd512_mask:
374 case X86::BI__builtin_ia32_vfmaddsubpd512_maskz:
375 case X86::BI__builtin_ia32_vfmaddsubpd512_mask3:
376 case X86::BI__builtin_ia32_vfmsubaddpd512_mask3:
377 case X86::BI__builtin_ia32_vfmaddsubps512_mask:
378 case X86::BI__builtin_ia32_vfmaddsubps512_maskz:
379 case X86::BI__builtin_ia32_vfmaddsubps512_mask3:
380 case X86::BI__builtin_ia32_vfmsubaddps512_mask3:
381 case X86::BI__builtin_ia32_vfmaddsubph512_mask:
382 case X86::BI__builtin_ia32_vfmaddsubph512_maskz:
383 case X86::BI__builtin_ia32_vfmaddsubph512_mask3:
384 case X86::BI__builtin_ia32_vfmsubaddph512_mask3:
385 case X86::BI__builtin_ia32_vfmaddpd256_round_mask:
386 case X86::BI__builtin_ia32_vfmaddpd256_round_maskz:
387 case X86::BI__builtin_ia32_vfmaddpd256_round_mask3:
388 case X86::BI__builtin_ia32_vfmsubpd256_round_mask3:
389 case X86::BI__builtin_ia32_vfmaddps256_round_mask:
390 case X86::BI__builtin_ia32_vfmaddps256_round_maskz:
391 case X86::BI__builtin_ia32_vfmaddps256_round_mask3:
392 case X86::BI__builtin_ia32_vfmsubps256_round_mask3:
393 case X86::BI__builtin_ia32_vfmaddph256_round_mask:
394 case X86::BI__builtin_ia32_vfmaddph256_round_maskz:
395 case X86::BI__builtin_ia32_vfmaddph256_round_mask3:
396 case X86::BI__builtin_ia32_vfmsubph256_round_mask3:
397 case X86::BI__builtin_ia32_vfmaddsubpd256_round_mask:
398 case X86::BI__builtin_ia32_vfmaddsubpd256_round_maskz:
399 case X86::BI__builtin_ia32_vfmaddsubpd256_round_mask3:
400 case X86::BI__builtin_ia32_vfmsubaddpd256_round_mask3:
401 case X86::BI__builtin_ia32_vfmaddsubps256_round_mask:
402 case X86::BI__builtin_ia32_vfmaddsubps256_round_maskz:
403 case X86::BI__builtin_ia32_vfmaddsubps256_round_mask3:
404 case X86::BI__builtin_ia32_vfmsubaddps256_round_mask3:
405 case X86::BI__builtin_ia32_vfmaddsubph256_round_mask:
406 case X86::BI__builtin_ia32_vfmaddsubph256_round_maskz:
407 case X86::BI__builtin_ia32_vfmaddsubph256_round_mask3:
408 case X86::BI__builtin_ia32_vfmsubaddph256_round_mask3:
409 case X86::BI__builtin_ia32_vfmaddcph256_round_mask:
410 case X86::BI__builtin_ia32_vfmaddcph256_round_maskz:
411 case X86::BI__builtin_ia32_vfmaddcph256_round_mask3:
412 case X86::BI__builtin_ia32_vfcmaddcph256_round_mask:
413 case X86::BI__builtin_ia32_vfcmaddcph256_round_maskz:
414 case X86::BI__builtin_ia32_vfcmaddcph256_round_mask3:
415 case X86::BI__builtin_ia32_vfmulcph256_round_mask:
416 case X86::BI__builtin_ia32_vfcmulcph256_round_mask:
417 case X86::BI__builtin_ia32_vfmaddcsh_mask:
418 case X86::BI__builtin_ia32_vfmaddcsh_round_mask:
419 case X86::BI__builtin_ia32_vfmaddcsh_round_mask3:
420 case X86::BI__builtin_ia32_vfmaddcph512_mask:
421 case X86::BI__builtin_ia32_vfmaddcph512_maskz:
422 case X86::BI__builtin_ia32_vfmaddcph512_mask3:
423 case X86::BI__builtin_ia32_vfcmaddcsh_mask:
424 case X86::BI__builtin_ia32_vfcmaddcsh_round_mask:
425 case X86::BI__builtin_ia32_vfcmaddcsh_round_mask3:
426 case X86::BI__builtin_ia32_vfcmaddcph512_mask:
427 case X86::BI__builtin_ia32_vfcmaddcph512_maskz:
428 case X86::BI__builtin_ia32_vfcmaddcph512_mask3:
429 case X86::BI__builtin_ia32_vfmulcsh_mask:
430 case X86::BI__builtin_ia32_vfmulcph512_mask:
431 case X86::BI__builtin_ia32_vfcmulcsh_mask:
432 case X86::BI__builtin_ia32_vfcmulcph512_mask:
433 case X86::BI__builtin_ia32_vcvt2ps2phx256_mask:
434 case X86::BI__builtin_ia32_vcvt2ps2phx512_mask:
435 ArgNum = 4;
436 HasRC = true;
437 break;
438 }
439
440 llvm::APSInt Result;
441
442 // We can't check the value of a dependent argument.
443 Expr *Arg = TheCall->getArg(ArgNum);
444 if (Arg->isTypeDependent() || Arg->isValueDependent())
445 return false;
446
447 // Check constant-ness first.
448 if (SemaRef.BuiltinConstantArg(TheCall, ArgNum, Result))
449 return true;
450
451 // Make sure rounding mode is either ROUND_CUR_DIRECTION or ROUND_NO_EXC bit
452 // is set. If the intrinsic has rounding control(bits 1:0), make sure its only
453 // combined with ROUND_NO_EXC. If the intrinsic does not have rounding
454 // control, allow ROUND_NO_EXC and ROUND_CUR_DIRECTION together.
455 if (Result == 4 /*ROUND_CUR_DIRECTION*/ || Result == 8 /*ROUND_NO_EXC*/ ||
456 (!HasRC && Result == 12 /*ROUND_CUR_DIRECTION|ROUND_NO_EXC*/) ||
457 (HasRC && Result.getZExtValue() >= 8 && Result.getZExtValue() <= 11))
458 return false;
459
460 return Diag(TheCall->getBeginLoc(), diag::err_x86_builtin_invalid_rounding)
461 << Arg->getSourceRange();
462}
463
464// Check if the gather/scatter scale is legal.
466 CallExpr *TheCall) {
467 unsigned ArgNum = 0;
468 switch (BuiltinID) {
469 default:
470 return false;
471 case X86::BI__builtin_ia32_gatherd_pd:
472 case X86::BI__builtin_ia32_gatherd_pd256:
473 case X86::BI__builtin_ia32_gatherq_pd:
474 case X86::BI__builtin_ia32_gatherq_pd256:
475 case X86::BI__builtin_ia32_gatherd_ps:
476 case X86::BI__builtin_ia32_gatherd_ps256:
477 case X86::BI__builtin_ia32_gatherq_ps:
478 case X86::BI__builtin_ia32_gatherq_ps256:
479 case X86::BI__builtin_ia32_gatherd_q:
480 case X86::BI__builtin_ia32_gatherd_q256:
481 case X86::BI__builtin_ia32_gatherq_q:
482 case X86::BI__builtin_ia32_gatherq_q256:
483 case X86::BI__builtin_ia32_gatherd_d:
484 case X86::BI__builtin_ia32_gatherd_d256:
485 case X86::BI__builtin_ia32_gatherq_d:
486 case X86::BI__builtin_ia32_gatherq_d256:
487 case X86::BI__builtin_ia32_gather3div2df:
488 case X86::BI__builtin_ia32_gather3div2di:
489 case X86::BI__builtin_ia32_gather3div4df:
490 case X86::BI__builtin_ia32_gather3div4di:
491 case X86::BI__builtin_ia32_gather3div4sf:
492 case X86::BI__builtin_ia32_gather3div4si:
493 case X86::BI__builtin_ia32_gather3div8sf:
494 case X86::BI__builtin_ia32_gather3div8si:
495 case X86::BI__builtin_ia32_gather3siv2df:
496 case X86::BI__builtin_ia32_gather3siv2di:
497 case X86::BI__builtin_ia32_gather3siv4df:
498 case X86::BI__builtin_ia32_gather3siv4di:
499 case X86::BI__builtin_ia32_gather3siv4sf:
500 case X86::BI__builtin_ia32_gather3siv4si:
501 case X86::BI__builtin_ia32_gather3siv8sf:
502 case X86::BI__builtin_ia32_gather3siv8si:
503 case X86::BI__builtin_ia32_gathersiv8df:
504 case X86::BI__builtin_ia32_gathersiv16sf:
505 case X86::BI__builtin_ia32_gatherdiv8df:
506 case X86::BI__builtin_ia32_gatherdiv16sf:
507 case X86::BI__builtin_ia32_gathersiv8di:
508 case X86::BI__builtin_ia32_gathersiv16si:
509 case X86::BI__builtin_ia32_gatherdiv8di:
510 case X86::BI__builtin_ia32_gatherdiv16si:
511 case X86::BI__builtin_ia32_scatterdiv2df:
512 case X86::BI__builtin_ia32_scatterdiv2di:
513 case X86::BI__builtin_ia32_scatterdiv4df:
514 case X86::BI__builtin_ia32_scatterdiv4di:
515 case X86::BI__builtin_ia32_scatterdiv4sf:
516 case X86::BI__builtin_ia32_scatterdiv4si:
517 case X86::BI__builtin_ia32_scatterdiv8sf:
518 case X86::BI__builtin_ia32_scatterdiv8si:
519 case X86::BI__builtin_ia32_scattersiv2df:
520 case X86::BI__builtin_ia32_scattersiv2di:
521 case X86::BI__builtin_ia32_scattersiv4df:
522 case X86::BI__builtin_ia32_scattersiv4di:
523 case X86::BI__builtin_ia32_scattersiv4sf:
524 case X86::BI__builtin_ia32_scattersiv4si:
525 case X86::BI__builtin_ia32_scattersiv8sf:
526 case X86::BI__builtin_ia32_scattersiv8si:
527 case X86::BI__builtin_ia32_scattersiv8df:
528 case X86::BI__builtin_ia32_scattersiv16sf:
529 case X86::BI__builtin_ia32_scatterdiv8df:
530 case X86::BI__builtin_ia32_scatterdiv16sf:
531 case X86::BI__builtin_ia32_scattersiv8di:
532 case X86::BI__builtin_ia32_scattersiv16si:
533 case X86::BI__builtin_ia32_scatterdiv8di:
534 case X86::BI__builtin_ia32_scatterdiv16si:
535 ArgNum = 4;
536 break;
537 }
538
539 llvm::APSInt Result;
540
541 // We can't check the value of a dependent argument.
542 Expr *Arg = TheCall->getArg(ArgNum);
543 if (Arg->isTypeDependent() || Arg->isValueDependent())
544 return false;
545
546 // Check constant-ness first.
547 if (SemaRef.BuiltinConstantArg(TheCall, ArgNum, Result))
548 return true;
549
550 if (Result == 1 || Result == 2 || Result == 4 || Result == 8)
551 return false;
552
553 return Diag(TheCall->getBeginLoc(), diag::err_x86_builtin_invalid_scale)
554 << Arg->getSourceRange();
555}
556
557enum { TileRegLow = 0, TileRegHigh = 7 };
558
560 ArrayRef<int> ArgNums) {
561 for (int ArgNum : ArgNums) {
562 if (SemaRef.BuiltinConstantArgRange(TheCall, ArgNum, TileRegLow,
564 return true;
565 }
566 return false;
567}
568
570 ArrayRef<int> ArgNums) {
571 // Because the max number of tile register is TileRegHigh + 1, so here we use
572 // each bit to represent the usage of them in bitset.
573 std::bitset<TileRegHigh + 1> ArgValues;
574 for (int ArgNum : ArgNums) {
575 Expr *Arg = TheCall->getArg(ArgNum);
576 if (Arg->isTypeDependent() || Arg->isValueDependent())
577 continue;
578
579 llvm::APSInt Result;
580 if (SemaRef.BuiltinConstantArg(TheCall, ArgNum, Result))
581 return true;
582 int ArgExtValue = Result.getExtValue();
583 assert((ArgExtValue >= TileRegLow && ArgExtValue <= TileRegHigh) &&
584 "Incorrect tile register num.");
585 if (ArgValues.test(ArgExtValue))
586 return Diag(TheCall->getBeginLoc(),
587 diag::err_x86_builtin_tile_arg_duplicate)
588 << TheCall->getArg(ArgNum)->getSourceRange();
589 ArgValues.set(ArgExtValue);
590 }
591 return false;
592}
593
595 ArrayRef<int> ArgNums) {
596 return CheckBuiltinTileArgumentsRange(TheCall, ArgNums) ||
597 CheckBuiltinTileDuplicate(TheCall, ArgNums);
598}
599
600bool SemaX86::CheckBuiltinTileArguments(unsigned BuiltinID, CallExpr *TheCall) {
601 switch (BuiltinID) {
602 default:
603 return false;
604 case X86::BI__builtin_ia32_tileloadd64:
605 case X86::BI__builtin_ia32_tileloaddt164:
606 case X86::BI__builtin_ia32_tilestored64:
607 case X86::BI__builtin_ia32_tilezero:
608 return CheckBuiltinTileArgumentsRange(TheCall, 0);
609 case X86::BI__builtin_ia32_tdpbssd:
610 case X86::BI__builtin_ia32_tdpbsud:
611 case X86::BI__builtin_ia32_tdpbusd:
612 case X86::BI__builtin_ia32_tdpbuud:
613 case X86::BI__builtin_ia32_tdpbf16ps:
614 case X86::BI__builtin_ia32_tdpfp16ps:
615 case X86::BI__builtin_ia32_tcmmimfp16ps:
616 case X86::BI__builtin_ia32_tcmmrlfp16ps:
617 return CheckBuiltinTileRangeAndDuplicate(TheCall, {0, 1, 2});
618 }
619}
620static bool isX86_32Builtin(unsigned BuiltinID) {
621 // These builtins only work on x86-32 targets.
622 switch (BuiltinID) {
623 case X86::BI__builtin_ia32_readeflags_u32:
624 case X86::BI__builtin_ia32_writeeflags_u32:
625 return true;
626 }
627
628 return false;
629}
630
631bool SemaX86::CheckBuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID,
632 CallExpr *TheCall) {
633 // Check for 32-bit only builtins on a 64-bit target.
634 const llvm::Triple &TT = TI.getTriple();
635 if (TT.getArch() != llvm::Triple::x86 && isX86_32Builtin(BuiltinID))
636 return Diag(TheCall->getCallee()->getBeginLoc(),
637 diag::err_32_bit_builtin_64_bit_tgt);
638
639 // If the intrinsic has rounding or SAE make sure its valid.
640 if (CheckBuiltinRoundingOrSAE(BuiltinID, TheCall))
641 return true;
642
643 // If the intrinsic has a gather/scatter scale immediate make sure its valid.
644 if (CheckBuiltinGatherScatterScale(BuiltinID, TheCall))
645 return true;
646
647 // If the intrinsic has a tile arguments, make sure they are valid.
648 if (CheckBuiltinTileArguments(BuiltinID, TheCall))
649 return true;
650
651 // For intrinsics which take an immediate value as part of the instruction,
652 // range check them here.
653 int i = 0, l = 0, u = 0;
654 switch (BuiltinID) {
655 default:
656 return false;
657 case X86::BI__builtin_ia32_vec_ext_v2di:
658 case X86::BI__builtin_ia32_vextractf128_pd256:
659 case X86::BI__builtin_ia32_vextractf128_ps256:
660 case X86::BI__builtin_ia32_vextractf128_si256:
661 case X86::BI__builtin_ia32_extract128i256:
662 case X86::BI__builtin_ia32_extractf64x4_mask:
663 case X86::BI__builtin_ia32_extracti64x4_mask:
664 case X86::BI__builtin_ia32_extractf32x8_mask:
665 case X86::BI__builtin_ia32_extracti32x8_mask:
666 case X86::BI__builtin_ia32_extractf64x2_256_mask:
667 case X86::BI__builtin_ia32_extracti64x2_256_mask:
668 case X86::BI__builtin_ia32_extractf32x4_256_mask:
669 case X86::BI__builtin_ia32_extracti32x4_256_mask:
670 i = 1;
671 l = 0;
672 u = 1;
673 break;
674 case X86::BI__builtin_ia32_vec_set_v2di:
675 case X86::BI__builtin_ia32_vinsertf128_pd256:
676 case X86::BI__builtin_ia32_vinsertf128_ps256:
677 case X86::BI__builtin_ia32_vinsertf128_si256:
678 case X86::BI__builtin_ia32_insert128i256:
679 case X86::BI__builtin_ia32_insertf32x8:
680 case X86::BI__builtin_ia32_inserti32x8:
681 case X86::BI__builtin_ia32_insertf64x4:
682 case X86::BI__builtin_ia32_inserti64x4:
683 case X86::BI__builtin_ia32_insertf64x2_256:
684 case X86::BI__builtin_ia32_inserti64x2_256:
685 case X86::BI__builtin_ia32_insertf32x4_256:
686 case X86::BI__builtin_ia32_inserti32x4_256:
687 i = 2;
688 l = 0;
689 u = 1;
690 break;
691 case X86::BI__builtin_ia32_vpermilpd:
692 case X86::BI__builtin_ia32_vec_ext_v4hi:
693 case X86::BI__builtin_ia32_vec_ext_v4si:
694 case X86::BI__builtin_ia32_vec_ext_v4sf:
695 case X86::BI__builtin_ia32_vec_ext_v4di:
696 case X86::BI__builtin_ia32_extractf32x4_mask:
697 case X86::BI__builtin_ia32_extracti32x4_mask:
698 case X86::BI__builtin_ia32_extractf64x2_512_mask:
699 case X86::BI__builtin_ia32_extracti64x2_512_mask:
700 i = 1;
701 l = 0;
702 u = 3;
703 break;
704 case X86::BI_mm_prefetch:
705 case X86::BI__builtin_ia32_vec_ext_v8hi:
706 case X86::BI__builtin_ia32_vec_ext_v8si:
707 i = 1;
708 l = 0;
709 u = 7;
710 break;
711 case X86::BI__builtin_ia32_sha1rnds4:
712 case X86::BI__builtin_ia32_blendpd:
713 case X86::BI__builtin_ia32_shufpd:
714 case X86::BI__builtin_ia32_vec_set_v4hi:
715 case X86::BI__builtin_ia32_vec_set_v4si:
716 case X86::BI__builtin_ia32_vec_set_v4di:
717 case X86::BI__builtin_ia32_shuf_f32x4_256:
718 case X86::BI__builtin_ia32_shuf_f64x2_256:
719 case X86::BI__builtin_ia32_shuf_i32x4_256:
720 case X86::BI__builtin_ia32_shuf_i64x2_256:
721 case X86::BI__builtin_ia32_insertf64x2_512:
722 case X86::BI__builtin_ia32_inserti64x2_512:
723 case X86::BI__builtin_ia32_insertf32x4:
724 case X86::BI__builtin_ia32_inserti32x4:
725 i = 2;
726 l = 0;
727 u = 3;
728 break;
729 case X86::BI__builtin_ia32_vpermil2pd:
730 case X86::BI__builtin_ia32_vpermil2pd256:
731 case X86::BI__builtin_ia32_vpermil2ps:
732 case X86::BI__builtin_ia32_vpermil2ps256:
733 i = 3;
734 l = 0;
735 u = 3;
736 break;
737 case X86::BI__builtin_ia32_cmpb128_mask:
738 case X86::BI__builtin_ia32_cmpw128_mask:
739 case X86::BI__builtin_ia32_cmpd128_mask:
740 case X86::BI__builtin_ia32_cmpq128_mask:
741 case X86::BI__builtin_ia32_cmpb256_mask:
742 case X86::BI__builtin_ia32_cmpw256_mask:
743 case X86::BI__builtin_ia32_cmpd256_mask:
744 case X86::BI__builtin_ia32_cmpq256_mask:
745 case X86::BI__builtin_ia32_cmpb512_mask:
746 case X86::BI__builtin_ia32_cmpw512_mask:
747 case X86::BI__builtin_ia32_cmpd512_mask:
748 case X86::BI__builtin_ia32_cmpq512_mask:
749 case X86::BI__builtin_ia32_ucmpb128_mask:
750 case X86::BI__builtin_ia32_ucmpw128_mask:
751 case X86::BI__builtin_ia32_ucmpd128_mask:
752 case X86::BI__builtin_ia32_ucmpq128_mask:
753 case X86::BI__builtin_ia32_ucmpb256_mask:
754 case X86::BI__builtin_ia32_ucmpw256_mask:
755 case X86::BI__builtin_ia32_ucmpd256_mask:
756 case X86::BI__builtin_ia32_ucmpq256_mask:
757 case X86::BI__builtin_ia32_ucmpb512_mask:
758 case X86::BI__builtin_ia32_ucmpw512_mask:
759 case X86::BI__builtin_ia32_ucmpd512_mask:
760 case X86::BI__builtin_ia32_ucmpq512_mask:
761 case X86::BI__builtin_ia32_vpcomub:
762 case X86::BI__builtin_ia32_vpcomuw:
763 case X86::BI__builtin_ia32_vpcomud:
764 case X86::BI__builtin_ia32_vpcomuq:
765 case X86::BI__builtin_ia32_vpcomb:
766 case X86::BI__builtin_ia32_vpcomw:
767 case X86::BI__builtin_ia32_vpcomd:
768 case X86::BI__builtin_ia32_vpcomq:
769 case X86::BI__builtin_ia32_vec_set_v8hi:
770 case X86::BI__builtin_ia32_vec_set_v8si:
771 i = 2;
772 l = 0;
773 u = 7;
774 break;
775 case X86::BI__builtin_ia32_vpermilpd256:
776 case X86::BI__builtin_ia32_roundps:
777 case X86::BI__builtin_ia32_roundpd:
778 case X86::BI__builtin_ia32_roundps256:
779 case X86::BI__builtin_ia32_roundpd256:
780 case X86::BI__builtin_ia32_getmantpd128_mask:
781 case X86::BI__builtin_ia32_getmantpd256_mask:
782 case X86::BI__builtin_ia32_getmantps128_mask:
783 case X86::BI__builtin_ia32_getmantps256_mask:
784 case X86::BI__builtin_ia32_getmantpd512_mask:
785 case X86::BI__builtin_ia32_getmantps512_mask:
786 case X86::BI__builtin_ia32_getmantph128_mask:
787 case X86::BI__builtin_ia32_getmantph256_mask:
788 case X86::BI__builtin_ia32_getmantph512_mask:
789 case X86::BI__builtin_ia32_vgetmantpd256_round_mask:
790 case X86::BI__builtin_ia32_vgetmantps256_round_mask:
791 case X86::BI__builtin_ia32_vgetmantph256_round_mask:
792 case X86::BI__builtin_ia32_vec_ext_v16qi:
793 case X86::BI__builtin_ia32_vec_ext_v16hi:
794 i = 1;
795 l = 0;
796 u = 15;
797 break;
798 case X86::BI__builtin_ia32_pblendd128:
799 case X86::BI__builtin_ia32_blendps:
800 case X86::BI__builtin_ia32_blendpd256:
801 case X86::BI__builtin_ia32_shufpd256:
802 case X86::BI__builtin_ia32_roundss:
803 case X86::BI__builtin_ia32_roundsd:
804 case X86::BI__builtin_ia32_rangepd128_mask:
805 case X86::BI__builtin_ia32_rangepd256_mask:
806 case X86::BI__builtin_ia32_rangepd512_mask:
807 case X86::BI__builtin_ia32_rangeps128_mask:
808 case X86::BI__builtin_ia32_rangeps256_mask:
809 case X86::BI__builtin_ia32_rangeps512_mask:
810 case X86::BI__builtin_ia32_vrangepd256_round_mask:
811 case X86::BI__builtin_ia32_vrangeps256_round_mask:
812 case X86::BI__builtin_ia32_getmantsd_round_mask:
813 case X86::BI__builtin_ia32_getmantss_round_mask:
814 case X86::BI__builtin_ia32_getmantsh_round_mask:
815 case X86::BI__builtin_ia32_vec_set_v16qi:
816 case X86::BI__builtin_ia32_vec_set_v16hi:
817 i = 2;
818 l = 0;
819 u = 15;
820 break;
821 case X86::BI__builtin_ia32_vec_ext_v32qi:
822 i = 1;
823 l = 0;
824 u = 31;
825 break;
826 case X86::BI__builtin_ia32_cmpps:
827 case X86::BI__builtin_ia32_cmpss:
828 case X86::BI__builtin_ia32_cmppd:
829 case X86::BI__builtin_ia32_cmpsd:
830 case X86::BI__builtin_ia32_cmpps256:
831 case X86::BI__builtin_ia32_cmppd256:
832 case X86::BI__builtin_ia32_cmpps128_mask:
833 case X86::BI__builtin_ia32_cmppd128_mask:
834 case X86::BI__builtin_ia32_cmpps256_mask:
835 case X86::BI__builtin_ia32_cmppd256_mask:
836 case X86::BI__builtin_ia32_cmpps512_mask:
837 case X86::BI__builtin_ia32_cmppd512_mask:
838 case X86::BI__builtin_ia32_cmpph512_mask:
839 case X86::BI__builtin_ia32_vcmppd256_round_mask:
840 case X86::BI__builtin_ia32_vcmpps256_round_mask:
841 case X86::BI__builtin_ia32_vcmpph256_round_mask:
842 case X86::BI__builtin_ia32_cmpsd_mask:
843 case X86::BI__builtin_ia32_cmpss_mask:
844 case X86::BI__builtin_ia32_vec_set_v32qi:
845 i = 2;
846 l = 0;
847 u = 31;
848 break;
849 case X86::BI__builtin_ia32_permdf256:
850 case X86::BI__builtin_ia32_permdi256:
851 case X86::BI__builtin_ia32_permdf512:
852 case X86::BI__builtin_ia32_permdi512:
853 case X86::BI__builtin_ia32_vpermilps:
854 case X86::BI__builtin_ia32_vpermilps256:
855 case X86::BI__builtin_ia32_vpermilpd512:
856 case X86::BI__builtin_ia32_vpermilps512:
857 case X86::BI__builtin_ia32_pshufd:
858 case X86::BI__builtin_ia32_pshufd256:
859 case X86::BI__builtin_ia32_pshufd512:
860 case X86::BI__builtin_ia32_pshufhw:
861 case X86::BI__builtin_ia32_pshufhw256:
862 case X86::BI__builtin_ia32_pshufhw512:
863 case X86::BI__builtin_ia32_pshuflw:
864 case X86::BI__builtin_ia32_pshuflw256:
865 case X86::BI__builtin_ia32_pshuflw512:
866 case X86::BI__builtin_ia32_vcvtps2ph:
867 case X86::BI__builtin_ia32_vcvtps2ph_mask:
868 case X86::BI__builtin_ia32_vcvtps2ph256:
869 case X86::BI__builtin_ia32_vcvtps2ph256_mask:
870 case X86::BI__builtin_ia32_vcvtps2ph512_mask:
871 case X86::BI__builtin_ia32_rndscaleps_128_mask:
872 case X86::BI__builtin_ia32_rndscalepd_128_mask:
873 case X86::BI__builtin_ia32_rndscaleps_256_mask:
874 case X86::BI__builtin_ia32_rndscalepd_256_mask:
875 case X86::BI__builtin_ia32_rndscaleps_mask:
876 case X86::BI__builtin_ia32_rndscalepd_mask:
877 case X86::BI__builtin_ia32_rndscaleph_mask:
878 case X86::BI__builtin_ia32_reducepd128_mask:
879 case X86::BI__builtin_ia32_reducepd256_mask:
880 case X86::BI__builtin_ia32_reducepd512_mask:
881 case X86::BI__builtin_ia32_reduceps128_mask:
882 case X86::BI__builtin_ia32_reduceps256_mask:
883 case X86::BI__builtin_ia32_reduceps512_mask:
884 case X86::BI__builtin_ia32_reduceph128_mask:
885 case X86::BI__builtin_ia32_reduceph256_mask:
886 case X86::BI__builtin_ia32_reduceph512_mask:
887 case X86::BI__builtin_ia32_vreducepd256_round_mask:
888 case X86::BI__builtin_ia32_vreduceps256_round_mask:
889 case X86::BI__builtin_ia32_vreduceph256_round_mask:
890 case X86::BI__builtin_ia32_vrndscalepd256_round_mask:
891 case X86::BI__builtin_ia32_vrndscaleps256_round_mask:
892 case X86::BI__builtin_ia32_vrndscaleph256_round_mask:
893 case X86::BI__builtin_ia32_prold512:
894 case X86::BI__builtin_ia32_prolq512:
895 case X86::BI__builtin_ia32_prold128:
896 case X86::BI__builtin_ia32_prold256:
897 case X86::BI__builtin_ia32_prolq128:
898 case X86::BI__builtin_ia32_prolq256:
899 case X86::BI__builtin_ia32_prord512:
900 case X86::BI__builtin_ia32_prorq512:
901 case X86::BI__builtin_ia32_prord128:
902 case X86::BI__builtin_ia32_prord256:
903 case X86::BI__builtin_ia32_prorq128:
904 case X86::BI__builtin_ia32_prorq256:
905 case X86::BI__builtin_ia32_fpclasspd128_mask:
906 case X86::BI__builtin_ia32_fpclasspd256_mask:
907 case X86::BI__builtin_ia32_fpclassps128_mask:
908 case X86::BI__builtin_ia32_fpclassps256_mask:
909 case X86::BI__builtin_ia32_fpclassps512_mask:
910 case X86::BI__builtin_ia32_fpclasspd512_mask:
911 case X86::BI__builtin_ia32_fpclassph128_mask:
912 case X86::BI__builtin_ia32_fpclassph256_mask:
913 case X86::BI__builtin_ia32_fpclassph512_mask:
914 case X86::BI__builtin_ia32_fpclasssd_mask:
915 case X86::BI__builtin_ia32_fpclassss_mask:
916 case X86::BI__builtin_ia32_fpclasssh_mask:
917 case X86::BI__builtin_ia32_pslldqi128_byteshift:
918 case X86::BI__builtin_ia32_pslldqi256_byteshift:
919 case X86::BI__builtin_ia32_pslldqi512_byteshift:
920 case X86::BI__builtin_ia32_psrldqi128_byteshift:
921 case X86::BI__builtin_ia32_psrldqi256_byteshift:
922 case X86::BI__builtin_ia32_psrldqi512_byteshift:
923 case X86::BI__builtin_ia32_kshiftliqi:
924 case X86::BI__builtin_ia32_kshiftlihi:
925 case X86::BI__builtin_ia32_kshiftlisi:
926 case X86::BI__builtin_ia32_kshiftlidi:
927 case X86::BI__builtin_ia32_kshiftriqi:
928 case X86::BI__builtin_ia32_kshiftrihi:
929 case X86::BI__builtin_ia32_kshiftrisi:
930 case X86::BI__builtin_ia32_kshiftridi:
931 i = 1;
932 l = 0;
933 u = 255;
934 break;
935 case X86::BI__builtin_ia32_vperm2f128_pd256:
936 case X86::BI__builtin_ia32_vperm2f128_ps256:
937 case X86::BI__builtin_ia32_vperm2f128_si256:
938 case X86::BI__builtin_ia32_permti256:
939 case X86::BI__builtin_ia32_pblendw128:
940 case X86::BI__builtin_ia32_pblendw256:
941 case X86::BI__builtin_ia32_blendps256:
942 case X86::BI__builtin_ia32_pblendd256:
943 case X86::BI__builtin_ia32_palignr128:
944 case X86::BI__builtin_ia32_palignr256:
945 case X86::BI__builtin_ia32_palignr512:
946 case X86::BI__builtin_ia32_alignq512:
947 case X86::BI__builtin_ia32_alignd512:
948 case X86::BI__builtin_ia32_alignd128:
949 case X86::BI__builtin_ia32_alignd256:
950 case X86::BI__builtin_ia32_alignq128:
951 case X86::BI__builtin_ia32_alignq256:
952 case X86::BI__builtin_ia32_vcomisd:
953 case X86::BI__builtin_ia32_vcomiss:
954 case X86::BI__builtin_ia32_shuf_f32x4:
955 case X86::BI__builtin_ia32_shuf_f64x2:
956 case X86::BI__builtin_ia32_shuf_i32x4:
957 case X86::BI__builtin_ia32_shuf_i64x2:
958 case X86::BI__builtin_ia32_shufpd512:
959 case X86::BI__builtin_ia32_shufps:
960 case X86::BI__builtin_ia32_shufps256:
961 case X86::BI__builtin_ia32_shufps512:
962 case X86::BI__builtin_ia32_dbpsadbw128:
963 case X86::BI__builtin_ia32_dbpsadbw256:
964 case X86::BI__builtin_ia32_dbpsadbw512:
965 case X86::BI__builtin_ia32_vpshldd128:
966 case X86::BI__builtin_ia32_vpshldd256:
967 case X86::BI__builtin_ia32_vpshldd512:
968 case X86::BI__builtin_ia32_vpshldq128:
969 case X86::BI__builtin_ia32_vpshldq256:
970 case X86::BI__builtin_ia32_vpshldq512:
971 case X86::BI__builtin_ia32_vpshldw128:
972 case X86::BI__builtin_ia32_vpshldw256:
973 case X86::BI__builtin_ia32_vpshldw512:
974 case X86::BI__builtin_ia32_vpshrdd128:
975 case X86::BI__builtin_ia32_vpshrdd256:
976 case X86::BI__builtin_ia32_vpshrdd512:
977 case X86::BI__builtin_ia32_vpshrdq128:
978 case X86::BI__builtin_ia32_vpshrdq256:
979 case X86::BI__builtin_ia32_vpshrdq512:
980 case X86::BI__builtin_ia32_vpshrdw128:
981 case X86::BI__builtin_ia32_vpshrdw256:
982 case X86::BI__builtin_ia32_vpshrdw512:
983 case X86::BI__builtin_ia32_vminmaxnepbf16128:
984 case X86::BI__builtin_ia32_vminmaxnepbf16256:
985 case X86::BI__builtin_ia32_vminmaxnepbf16512:
986 case X86::BI__builtin_ia32_vminmaxpd128_mask:
987 case X86::BI__builtin_ia32_vminmaxpd256_round_mask:
988 case X86::BI__builtin_ia32_vminmaxph128_mask:
989 case X86::BI__builtin_ia32_vminmaxph256_round_mask:
990 case X86::BI__builtin_ia32_vminmaxps128_mask:
991 case X86::BI__builtin_ia32_vminmaxps256_round_mask:
992 case X86::BI__builtin_ia32_vminmaxpd512_round_mask:
993 case X86::BI__builtin_ia32_vminmaxps512_round_mask:
994 case X86::BI__builtin_ia32_vminmaxph512_round_mask:
995 case X86::BI__builtin_ia32_vminmaxsd_round_mask:
996 case X86::BI__builtin_ia32_vminmaxsh_round_mask:
997 case X86::BI__builtin_ia32_vminmaxss_round_mask:
998 i = 2;
999 l = 0;
1000 u = 255;
1001 break;
1002 case X86::BI__builtin_ia32_fixupimmpd512_mask:
1003 case X86::BI__builtin_ia32_fixupimmpd512_maskz:
1004 case X86::BI__builtin_ia32_fixupimmps512_mask:
1005 case X86::BI__builtin_ia32_fixupimmps512_maskz:
1006 case X86::BI__builtin_ia32_fixupimmsd_mask:
1007 case X86::BI__builtin_ia32_fixupimmsd_maskz:
1008 case X86::BI__builtin_ia32_fixupimmss_mask:
1009 case X86::BI__builtin_ia32_fixupimmss_maskz:
1010 case X86::BI__builtin_ia32_fixupimmpd128_mask:
1011 case X86::BI__builtin_ia32_fixupimmpd128_maskz:
1012 case X86::BI__builtin_ia32_fixupimmpd256_mask:
1013 case X86::BI__builtin_ia32_fixupimmpd256_maskz:
1014 case X86::BI__builtin_ia32_fixupimmps128_mask:
1015 case X86::BI__builtin_ia32_fixupimmps128_maskz:
1016 case X86::BI__builtin_ia32_fixupimmps256_mask:
1017 case X86::BI__builtin_ia32_fixupimmps256_maskz:
1018 case X86::BI__builtin_ia32_pternlogd512_mask:
1019 case X86::BI__builtin_ia32_pternlogd512_maskz:
1020 case X86::BI__builtin_ia32_pternlogq512_mask:
1021 case X86::BI__builtin_ia32_pternlogq512_maskz:
1022 case X86::BI__builtin_ia32_pternlogd128_mask:
1023 case X86::BI__builtin_ia32_pternlogd128_maskz:
1024 case X86::BI__builtin_ia32_pternlogd256_mask:
1025 case X86::BI__builtin_ia32_pternlogd256_maskz:
1026 case X86::BI__builtin_ia32_pternlogq128_mask:
1027 case X86::BI__builtin_ia32_pternlogq128_maskz:
1028 case X86::BI__builtin_ia32_pternlogq256_mask:
1029 case X86::BI__builtin_ia32_pternlogq256_maskz:
1030 case X86::BI__builtin_ia32_vsm3rnds2:
1031 i = 3;
1032 l = 0;
1033 u = 255;
1034 break;
1035 case X86::BI__builtin_ia32_reducesd_mask:
1036 case X86::BI__builtin_ia32_reducess_mask:
1037 case X86::BI__builtin_ia32_rndscalesd_round_mask:
1038 case X86::BI__builtin_ia32_rndscaless_round_mask:
1039 case X86::BI__builtin_ia32_rndscalesh_round_mask:
1040 case X86::BI__builtin_ia32_reducesh_mask:
1041 i = 4;
1042 l = 0;
1043 u = 255;
1044 break;
1045 case X86::BI__builtin_ia32_cmpccxadd32:
1046 case X86::BI__builtin_ia32_cmpccxadd64:
1047 i = 3;
1048 l = 0;
1049 u = 15;
1050 break;
1051 }
1052
1053 // Note that we don't force a hard error on the range check here, allowing
1054 // template-generated or macro-generated dead code to potentially have out-of-
1055 // range values. These need to code generate, but don't need to necessarily
1056 // make any sense. We use a warning that defaults to an error.
1057 return SemaRef.BuiltinConstantArgRange(TheCall, i, l, u,
1058 /*RangeIsError*/ false);
1059}
1060
1062 // Semantic checks for a function with the 'interrupt' attribute.
1063 // a) Must be a function.
1064 // b) Must have the 'void' return type.
1065 // c) Must take 1 or 2 arguments.
1066 // d) The 1st argument must be a pointer.
1067 // e) The 2nd argument (if any) must be an unsigned integer.
1068 ASTContext &Context = getASTContext();
1069
1073 cast<NamedDecl>(D)->getDeclName().getCXXOverloadedOperator())) {
1074 Diag(AL.getLoc(), diag::warn_attribute_wrong_decl_type)
1075 << AL << AL.isRegularKeywordAttribute()
1077 return;
1078 }
1079 // Interrupt handler must have void return type.
1080 if (!getFunctionOrMethodResultType(D)->isVoidType()) {
1082 diag::err_anyx86_interrupt_attribute)
1083 << (SemaRef.Context.getTargetInfo().getTriple().getArch() ==
1084 llvm::Triple::x86
1085 ? 0
1086 : 1)
1087 << 0;
1088 return;
1089 }
1090 // Interrupt handler must have 1 or 2 parameters.
1091 unsigned NumParams = getFunctionOrMethodNumParams(D);
1092 if (NumParams < 1 || NumParams > 2) {
1093 Diag(D->getBeginLoc(), diag::err_anyx86_interrupt_attribute)
1094 << (Context.getTargetInfo().getTriple().getArch() == llvm::Triple::x86
1095 ? 0
1096 : 1)
1097 << 1;
1098 return;
1099 }
1100 // The first argument must be a pointer.
1102 Diag(getFunctionOrMethodParamRange(D, 0).getBegin(),
1103 diag::err_anyx86_interrupt_attribute)
1104 << (Context.getTargetInfo().getTriple().getArch() == llvm::Triple::x86
1105 ? 0
1106 : 1)
1107 << 2;
1108 return;
1109 }
1110 // The second argument, if present, must be an unsigned integer.
1111 unsigned TypeSize =
1112 Context.getTargetInfo().getTriple().getArch() == llvm::Triple::x86_64
1113 ? 64
1114 : 32;
1115 if (NumParams == 2 &&
1116 (!getFunctionOrMethodParamType(D, 1)->isUnsignedIntegerType() ||
1117 Context.getTypeSize(getFunctionOrMethodParamType(D, 1)) != TypeSize)) {
1118 Diag(getFunctionOrMethodParamRange(D, 1).getBegin(),
1119 diag::err_anyx86_interrupt_attribute)
1120 << (Context.getTargetInfo().getTriple().getArch() == llvm::Triple::x86
1121 ? 0
1122 : 1)
1123 << 3 << Context.getIntTypeForBitwidth(TypeSize, /*Signed=*/false);
1124 return;
1125 }
1126 D->addAttr(::new (Context) AnyX86InterruptAttr(Context, AL));
1127 D->addAttr(UsedAttr::CreateImplicit(Context));
1128}
1129
1131 // If we try to apply it to a function pointer, don't warn, but don't
1132 // do anything, either. It doesn't matter anyway, because there's nothing
1133 // special about calling a force_align_arg_pointer function.
1134 const auto *VD = dyn_cast<ValueDecl>(D);
1135 if (VD && VD->getType()->isFunctionPointerType())
1136 return;
1137 // Also don't warn on function pointer typedefs.
1138 const auto *TD = dyn_cast<TypedefNameDecl>(D);
1139 if (TD && (TD->getUnderlyingType()->isFunctionPointerType() ||
1140 TD->getUnderlyingType()->isFunctionType()))
1141 return;
1142 // Attribute can only be applied to function types.
1143 if (!isa<FunctionDecl>(D)) {
1144 Diag(AL.getLoc(), diag::warn_attribute_wrong_decl_type)
1146 return;
1147 }
1148
1149 D->addAttr(::new (getASTContext())
1150 X86ForceAlignArgPointerAttr(getASTContext(), AL));
1151}
1152
1153} // namespace clang
const Decl * D
This file declares semantic analysis functions specific to X86.
Enumerates target-specific builtins in their own namespaces within namespace clang.
Holds long-lived AST nodes (such as types and decls) that can be referred to throughout the semantic ...
Definition: ASTContext.h:187
const TargetInfo & getTargetInfo() const
Definition: ASTContext.h:779
SourceLocation getLoc() const
static bool isStaticOverloadedOperator(OverloadedOperatorKind OOK)
Returns true if the given operator is implicitly static in a record context.
Definition: DeclCXX.h:2106
CallExpr - Represents a function call (C99 6.5.2.2, C++ [expr.call]).
Definition: Expr.h:2830
Expr * getArg(unsigned Arg)
getArg - Return the specified argument.
Definition: Expr.h:3021
SourceLocation getBeginLoc() const LLVM_READONLY
Definition: Expr.cpp:1638
Expr * getCallee()
Definition: Expr.h:2980
Decl - This represents one declaration (or definition), e.g.
Definition: DeclBase.h:86
This represents one expression.
Definition: Expr.h:110
bool isValueDependent() const
Determines whether the value of this expression depends on.
Definition: Expr.h:175
bool isTypeDependent() const
Determines whether the type of this expression depends on.
Definition: Expr.h:192
ParsedAttr - Represents a syntactic attribute.
Definition: ParsedAttr.h:129
SemaDiagnosticBuilder Diag(SourceLocation Loc, unsigned DiagID, bool DeferHint=false)
Emit a diagnostic.
Definition: SemaBase.cpp:60
ASTContext & getASTContext() const
Definition: SemaBase.cpp:9
Sema & SemaRef
Definition: SemaBase.h:40
bool CheckBuiltinTileArgumentsRange(CallExpr *TheCall, ArrayRef< int > ArgNums)
Definition: SemaX86.cpp:559
void handleForceAlignArgPointerAttr(Decl *D, const ParsedAttr &AL)
Definition: SemaX86.cpp:1130
bool CheckBuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID, CallExpr *TheCall)
Definition: SemaX86.cpp:631
bool CheckBuiltinRoundingOrSAE(unsigned BuiltinID, CallExpr *TheCall)
Definition: SemaX86.cpp:29
bool CheckBuiltinTileRangeAndDuplicate(CallExpr *TheCall, ArrayRef< int > ArgNums)
Definition: SemaX86.cpp:594
bool CheckBuiltinGatherScatterScale(unsigned BuiltinID, CallExpr *TheCall)
Definition: SemaX86.cpp:465
bool CheckBuiltinTileDuplicate(CallExpr *TheCall, ArrayRef< int > ArgNums)
Definition: SemaX86.cpp:569
void handleAnyInterruptAttr(Decl *D, const ParsedAttr &AL)
Definition: SemaX86.cpp:1061
SemaX86(Sema &S)
Definition: SemaX86.cpp:26
bool CheckBuiltinTileArguments(unsigned BuiltinID, CallExpr *TheCall)
Definition: SemaX86.cpp:600
Sema - This implements semantic analysis and AST building for C.
Definition: Sema.h:493
ASTContext & Context
Definition: Sema.h:962
bool BuiltinConstantArg(CallExpr *TheCall, int ArgNum, llvm::APSInt &Result)
BuiltinConstantArg - Handle a check if argument ArgNum of CallExpr TheCall is a constant expression.
bool BuiltinConstantArgRange(CallExpr *TheCall, int ArgNum, int Low, int High, bool RangeIsError=true)
BuiltinConstantArgRange - Handle a check if argument ArgNum of CallExpr TheCall is a constant express...
SourceRange getSourceRange() const LLVM_READONLY
SourceLocation tokens are not useful in isolation - they are low level value objects created/interpre...
Definition: Stmt.cpp:326
SourceLocation getBeginLoc() const LLVM_READONLY
Definition: Stmt.cpp:338
Exposes information about the current target.
Definition: TargetInfo.h:218
const llvm::Triple & getTriple() const
Returns the target triple of the primary target.
Definition: TargetInfo.h:1256
bool isPointerType() const
Definition: Type.h:8003
Defines the clang::TargetInfo interface.
The JSON file list parser is used to communicate input to InstallAPI.
@ ExpectedFunctionWithProtoType
Definition: ParsedAttr.h:1103
@ ExpectedFunction
Definition: ParsedAttr.h:1091
QualType getFunctionOrMethodResultType(const Decl *D)
Definition: Attr.h:98
bool isInstanceMethod(const Decl *D)
Definition: Attr.h:120
static bool isX86_32Builtin(unsigned BuiltinID)
Definition: SemaX86.cpp:620
SourceRange getFunctionOrMethodResultSourceRange(const Decl *D)
Definition: Attr.h:104
QualType getFunctionOrMethodParamType(const Decl *D, unsigned Idx)
Definition: Attr.h:83
@ Result
The result type of a method or function.
bool isFuncOrMethodForAttrSubject(const Decl *D)
isFuncOrMethodForAttrSubject - Return true if the given decl has function type (function or function-...
Definition: Attr.h:34
bool hasFunctionProto(const Decl *D)
hasFunctionProto - Return true if the given decl has a argument information.
Definition: Attr.h:55
unsigned getFunctionOrMethodNumParams(const Decl *D)
getFunctionOrMethodNumParams - Return number of function or method parameters.
Definition: Attr.h:64
@ TileRegLow
Definition: SemaX86.cpp:557
@ TileRegHigh
Definition: SemaX86.cpp:557
SourceRange getFunctionOrMethodParamRange(const Decl *D, unsigned Idx)
Definition: Attr.h:92