clang 22.0.0git
SemaX86.cpp
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1//===------ SemaX86.cpp ---------- X86 target-specific routines -----------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements semantic analysis functions specific to X86.
10//
11//===----------------------------------------------------------------------===//
12
13#include "clang/Sema/SemaX86.h"
14#include "clang/Basic/DiagnosticSema.h"
15#include "clang/Basic/TargetBuiltins.h"
16#include "clang/Basic/TargetInfo.h"
17#include "clang/Sema/Attr.h"
18#include "clang/Sema/ParsedAttr.h"
19#include "clang/Sema/Sema.h"
20#include "llvm/ADT/APSInt.h"
21#include "llvm/TargetParser/Triple.h"
22#include <bitset>
23
24namespace clang {
25
26SemaX86::SemaX86(Sema &S) : SemaBase(S) {}
27
28// Check if the rounding mode is legal.
29bool SemaX86::CheckBuiltinRoundingOrSAE(unsigned BuiltinID, CallExpr *TheCall) {
30 // Indicates if this instruction has rounding control or just SAE.
31 bool HasRC = false;
32
33 unsigned ArgNum = 0;
34 switch (BuiltinID) {
35 default:
36 return false;
37 case X86::BI__builtin_ia32_vcvttsd2si32:
38 case X86::BI__builtin_ia32_vcvttsd2si64:
39 case X86::BI__builtin_ia32_vcvttsd2usi32:
40 case X86::BI__builtin_ia32_vcvttsd2usi64:
41 case X86::BI__builtin_ia32_vcvttss2si32:
42 case X86::BI__builtin_ia32_vcvttss2si64:
43 case X86::BI__builtin_ia32_vcvttss2usi32:
44 case X86::BI__builtin_ia32_vcvttss2usi64:
45 case X86::BI__builtin_ia32_vcvttsh2si32:
46 case X86::BI__builtin_ia32_vcvttsh2si64:
47 case X86::BI__builtin_ia32_vcvttsh2usi32:
48 case X86::BI__builtin_ia32_vcvttsh2usi64:
49 case X86::BI__builtin_ia32_vcvttsd2sis32:
50 case X86::BI__builtin_ia32_vcvttsd2usis32:
51 case X86::BI__builtin_ia32_vcvttss2sis32:
52 case X86::BI__builtin_ia32_vcvttss2usis32:
53 case X86::BI__builtin_ia32_vcvttsd2sis64:
54 case X86::BI__builtin_ia32_vcvttsd2usis64:
55 case X86::BI__builtin_ia32_vcvttss2sis64:
56 case X86::BI__builtin_ia32_vcvttss2usis64:
57 ArgNum = 1;
58 break;
59 case X86::BI__builtin_ia32_maxpd512:
60 case X86::BI__builtin_ia32_maxps512:
61 case X86::BI__builtin_ia32_minpd512:
62 case X86::BI__builtin_ia32_minps512:
63 case X86::BI__builtin_ia32_maxph512:
64 case X86::BI__builtin_ia32_minph512:
65 ArgNum = 2;
66 break;
67 case X86::BI__builtin_ia32_vcvtph2pd512_mask:
68 case X86::BI__builtin_ia32_vcvtph2psx512_mask:
69 case X86::BI__builtin_ia32_cvtps2pd512_mask:
70 case X86::BI__builtin_ia32_cvttpd2dq512_mask:
71 case X86::BI__builtin_ia32_cvttpd2qq512_mask:
72 case X86::BI__builtin_ia32_cvttpd2udq512_mask:
73 case X86::BI__builtin_ia32_cvttpd2uqq512_mask:
74 case X86::BI__builtin_ia32_cvttps2dq512_mask:
75 case X86::BI__builtin_ia32_cvttps2qq512_mask:
76 case X86::BI__builtin_ia32_cvttps2udq512_mask:
77 case X86::BI__builtin_ia32_cvttps2uqq512_mask:
78 case X86::BI__builtin_ia32_vcvttph2w512_mask:
79 case X86::BI__builtin_ia32_vcvttph2uw512_mask:
80 case X86::BI__builtin_ia32_vcvttph2dq512_mask:
81 case X86::BI__builtin_ia32_vcvttph2udq512_mask:
82 case X86::BI__builtin_ia32_vcvttph2qq512_mask:
83 case X86::BI__builtin_ia32_vcvttph2uqq512_mask:
84 case X86::BI__builtin_ia32_getexppd512_mask:
85 case X86::BI__builtin_ia32_getexpps512_mask:
86 case X86::BI__builtin_ia32_getexpph512_mask:
87 case X86::BI__builtin_ia32_vcomisd:
88 case X86::BI__builtin_ia32_vcomiss:
89 case X86::BI__builtin_ia32_vcomish:
90 case X86::BI__builtin_ia32_vcvtph2ps512_mask:
91 case X86::BI__builtin_ia32_vcvttph2ibs512_mask:
92 case X86::BI__builtin_ia32_vcvttph2iubs512_mask:
93 case X86::BI__builtin_ia32_vcvttps2ibs512_mask:
94 case X86::BI__builtin_ia32_vcvttps2iubs512_mask:
95 ArgNum = 3;
96 break;
97 case X86::BI__builtin_ia32_cmppd512_mask:
98 case X86::BI__builtin_ia32_cmpps512_mask:
99 case X86::BI__builtin_ia32_cmpsd_mask:
100 case X86::BI__builtin_ia32_cmpss_mask:
101 case X86::BI__builtin_ia32_cmpsh_mask:
102 case X86::BI__builtin_ia32_vcvtsh2sd_round_mask:
103 case X86::BI__builtin_ia32_vcvtsh2ss_round_mask:
104 case X86::BI__builtin_ia32_cvtss2sd_round_mask:
105 case X86::BI__builtin_ia32_getexpsd128_round_mask:
106 case X86::BI__builtin_ia32_getexpss128_round_mask:
107 case X86::BI__builtin_ia32_getexpsh128_round_mask:
108 case X86::BI__builtin_ia32_getmantpd512_mask:
109 case X86::BI__builtin_ia32_getmantps512_mask:
110 case X86::BI__builtin_ia32_getmantph512_mask:
111 case X86::BI__builtin_ia32_maxsd_round_mask:
112 case X86::BI__builtin_ia32_maxss_round_mask:
113 case X86::BI__builtin_ia32_maxsh_round_mask:
114 case X86::BI__builtin_ia32_minsd_round_mask:
115 case X86::BI__builtin_ia32_minss_round_mask:
116 case X86::BI__builtin_ia32_minsh_round_mask:
117 case X86::BI__builtin_ia32_reducepd512_mask:
118 case X86::BI__builtin_ia32_reduceps512_mask:
119 case X86::BI__builtin_ia32_reduceph512_mask:
120 case X86::BI__builtin_ia32_rndscalepd_mask:
121 case X86::BI__builtin_ia32_rndscaleps_mask:
122 case X86::BI__builtin_ia32_rndscaleph_mask:
123 ArgNum = 4;
124 break;
125 case X86::BI__builtin_ia32_fixupimmpd512_mask:
126 case X86::BI__builtin_ia32_fixupimmpd512_maskz:
127 case X86::BI__builtin_ia32_fixupimmps512_mask:
128 case X86::BI__builtin_ia32_fixupimmps512_maskz:
129 case X86::BI__builtin_ia32_fixupimmsd_mask:
130 case X86::BI__builtin_ia32_fixupimmsd_maskz:
131 case X86::BI__builtin_ia32_fixupimmss_mask:
132 case X86::BI__builtin_ia32_fixupimmss_maskz:
133 case X86::BI__builtin_ia32_getmantsd_round_mask:
134 case X86::BI__builtin_ia32_getmantss_round_mask:
135 case X86::BI__builtin_ia32_getmantsh_round_mask:
136 case X86::BI__builtin_ia32_rangepd512_mask:
137 case X86::BI__builtin_ia32_rangeps512_mask:
138 case X86::BI__builtin_ia32_rangesd128_round_mask:
139 case X86::BI__builtin_ia32_rangess128_round_mask:
140 case X86::BI__builtin_ia32_reducesd_mask:
141 case X86::BI__builtin_ia32_reducess_mask:
142 case X86::BI__builtin_ia32_reducesh_mask:
143 case X86::BI__builtin_ia32_rndscalesd_round_mask:
144 case X86::BI__builtin_ia32_rndscaless_round_mask:
145 case X86::BI__builtin_ia32_rndscalesh_round_mask:
146 case X86::BI__builtin_ia32_vminmaxpd512_round_mask:
147 case X86::BI__builtin_ia32_vminmaxps512_round_mask:
148 case X86::BI__builtin_ia32_vminmaxph512_round_mask:
149 case X86::BI__builtin_ia32_vminmaxsd_round_mask:
150 case X86::BI__builtin_ia32_vminmaxsh_round_mask:
151 case X86::BI__builtin_ia32_vminmaxss_round_mask:
152 ArgNum = 5;
153 break;
154 case X86::BI__builtin_ia32_vcvtsd2si64:
155 case X86::BI__builtin_ia32_vcvtsd2si32:
156 case X86::BI__builtin_ia32_vcvtsd2usi32:
157 case X86::BI__builtin_ia32_vcvtsd2usi64:
158 case X86::BI__builtin_ia32_vcvtss2si32:
159 case X86::BI__builtin_ia32_vcvtss2si64:
160 case X86::BI__builtin_ia32_vcvtss2usi32:
161 case X86::BI__builtin_ia32_vcvtss2usi64:
162 case X86::BI__builtin_ia32_vcvtsh2si32:
163 case X86::BI__builtin_ia32_vcvtsh2si64:
164 case X86::BI__builtin_ia32_vcvtsh2usi32:
165 case X86::BI__builtin_ia32_vcvtsh2usi64:
166 case X86::BI__builtin_ia32_sqrtpd512:
167 case X86::BI__builtin_ia32_sqrtps512:
168 case X86::BI__builtin_ia32_sqrtph512:
169 ArgNum = 1;
170 HasRC = true;
171 break;
172 case X86::BI__builtin_ia32_addph512:
173 case X86::BI__builtin_ia32_divph512:
174 case X86::BI__builtin_ia32_mulph512:
175 case X86::BI__builtin_ia32_subph512:
176 case X86::BI__builtin_ia32_addpd512:
177 case X86::BI__builtin_ia32_addps512:
178 case X86::BI__builtin_ia32_divpd512:
179 case X86::BI__builtin_ia32_divps512:
180 case X86::BI__builtin_ia32_mulpd512:
181 case X86::BI__builtin_ia32_mulps512:
182 case X86::BI__builtin_ia32_subpd512:
183 case X86::BI__builtin_ia32_subps512:
184 case X86::BI__builtin_ia32_cvtsi2sd64:
185 case X86::BI__builtin_ia32_cvtsi2ss32:
186 case X86::BI__builtin_ia32_cvtsi2ss64:
187 case X86::BI__builtin_ia32_cvtusi2sd64:
188 case X86::BI__builtin_ia32_cvtusi2ss32:
189 case X86::BI__builtin_ia32_cvtusi2ss64:
190 case X86::BI__builtin_ia32_vcvtusi2sh:
191 case X86::BI__builtin_ia32_vcvtusi642sh:
192 case X86::BI__builtin_ia32_vcvtsi2sh:
193 case X86::BI__builtin_ia32_vcvtsi642sh:
194 ArgNum = 2;
195 HasRC = true;
196 break;
197 case X86::BI__builtin_ia32_cvtdq2ps512_mask:
198 case X86::BI__builtin_ia32_cvtudq2ps512_mask:
199 case X86::BI__builtin_ia32_vcvtpd2ph512_mask:
200 case X86::BI__builtin_ia32_vcvtps2phx512_mask:
201 case X86::BI__builtin_ia32_cvtpd2ps512_mask:
202 case X86::BI__builtin_ia32_cvtpd2dq512_mask:
203 case X86::BI__builtin_ia32_cvtpd2qq512_mask:
204 case X86::BI__builtin_ia32_cvtpd2udq512_mask:
205 case X86::BI__builtin_ia32_cvtpd2uqq512_mask:
206 case X86::BI__builtin_ia32_cvtps2dq512_mask:
207 case X86::BI__builtin_ia32_cvtps2qq512_mask:
208 case X86::BI__builtin_ia32_cvtps2udq512_mask:
209 case X86::BI__builtin_ia32_cvtps2uqq512_mask:
210 case X86::BI__builtin_ia32_cvtqq2pd512_mask:
211 case X86::BI__builtin_ia32_cvtqq2ps512_mask:
212 case X86::BI__builtin_ia32_cvtuqq2pd512_mask:
213 case X86::BI__builtin_ia32_cvtuqq2ps512_mask:
214 case X86::BI__builtin_ia32_vcvtdq2ph512_mask:
215 case X86::BI__builtin_ia32_vcvtudq2ph512_mask:
216 case X86::BI__builtin_ia32_vcvtw2ph512_mask:
217 case X86::BI__builtin_ia32_vcvtuw2ph512_mask:
218 case X86::BI__builtin_ia32_vcvtph2w512_mask:
219 case X86::BI__builtin_ia32_vcvtph2uw512_mask:
220 case X86::BI__builtin_ia32_vcvtph2dq512_mask:
221 case X86::BI__builtin_ia32_vcvtph2udq512_mask:
222 case X86::BI__builtin_ia32_vcvtph2qq512_mask:
223 case X86::BI__builtin_ia32_vcvtph2uqq512_mask:
224 case X86::BI__builtin_ia32_vcvtqq2ph512_mask:
225 case X86::BI__builtin_ia32_vcvtuqq2ph512_mask:
226 case X86::BI__builtin_ia32_vcvtph2ibs512_mask:
227 case X86::BI__builtin_ia32_vcvtph2iubs512_mask:
228 case X86::BI__builtin_ia32_vcvtps2ibs512_mask:
229 case X86::BI__builtin_ia32_vcvtps2iubs512_mask:
230 ArgNum = 3;
231 HasRC = true;
232 break;
233 case X86::BI__builtin_ia32_addsh_round_mask:
234 case X86::BI__builtin_ia32_addss_round_mask:
235 case X86::BI__builtin_ia32_addsd_round_mask:
236 case X86::BI__builtin_ia32_divsh_round_mask:
237 case X86::BI__builtin_ia32_divss_round_mask:
238 case X86::BI__builtin_ia32_divsd_round_mask:
239 case X86::BI__builtin_ia32_mulsh_round_mask:
240 case X86::BI__builtin_ia32_mulss_round_mask:
241 case X86::BI__builtin_ia32_mulsd_round_mask:
242 case X86::BI__builtin_ia32_subsh_round_mask:
243 case X86::BI__builtin_ia32_subss_round_mask:
244 case X86::BI__builtin_ia32_subsd_round_mask:
245 case X86::BI__builtin_ia32_scalefph512_mask:
246 case X86::BI__builtin_ia32_scalefpd512_mask:
247 case X86::BI__builtin_ia32_scalefps512_mask:
248 case X86::BI__builtin_ia32_scalefsd_round_mask:
249 case X86::BI__builtin_ia32_scalefss_round_mask:
250 case X86::BI__builtin_ia32_scalefsh_round_mask:
251 case X86::BI__builtin_ia32_cvtsd2ss_round_mask:
252 case X86::BI__builtin_ia32_vcvtss2sh_round_mask:
253 case X86::BI__builtin_ia32_vcvtsd2sh_round_mask:
254 case X86::BI__builtin_ia32_sqrtsd_round_mask:
255 case X86::BI__builtin_ia32_sqrtss_round_mask:
256 case X86::BI__builtin_ia32_sqrtsh_round_mask:
257 case X86::BI__builtin_ia32_vfmaddsd3_mask:
258 case X86::BI__builtin_ia32_vfmaddsd3_maskz:
259 case X86::BI__builtin_ia32_vfmaddsd3_mask3:
260 case X86::BI__builtin_ia32_vfmaddss3_mask:
261 case X86::BI__builtin_ia32_vfmaddss3_maskz:
262 case X86::BI__builtin_ia32_vfmaddss3_mask3:
263 case X86::BI__builtin_ia32_vfmaddsh3_mask:
264 case X86::BI__builtin_ia32_vfmaddsh3_maskz:
265 case X86::BI__builtin_ia32_vfmaddsh3_mask3:
266 case X86::BI__builtin_ia32_vfmaddpd512_mask:
267 case X86::BI__builtin_ia32_vfmaddpd512_maskz:
268 case X86::BI__builtin_ia32_vfmaddpd512_mask3:
269 case X86::BI__builtin_ia32_vfmsubpd512_mask3:
270 case X86::BI__builtin_ia32_vfmaddps512_mask:
271 case X86::BI__builtin_ia32_vfmaddps512_maskz:
272 case X86::BI__builtin_ia32_vfmaddps512_mask3:
273 case X86::BI__builtin_ia32_vfmsubps512_mask3:
274 case X86::BI__builtin_ia32_vfmaddph512_mask:
275 case X86::BI__builtin_ia32_vfmaddph512_maskz:
276 case X86::BI__builtin_ia32_vfmaddph512_mask3:
277 case X86::BI__builtin_ia32_vfmsubph512_mask3:
278 case X86::BI__builtin_ia32_vfmaddsubpd512_mask:
279 case X86::BI__builtin_ia32_vfmaddsubpd512_maskz:
280 case X86::BI__builtin_ia32_vfmaddsubpd512_mask3:
281 case X86::BI__builtin_ia32_vfmsubaddpd512_mask3:
282 case X86::BI__builtin_ia32_vfmaddsubps512_mask:
283 case X86::BI__builtin_ia32_vfmaddsubps512_maskz:
284 case X86::BI__builtin_ia32_vfmaddsubps512_mask3:
285 case X86::BI__builtin_ia32_vfmsubaddps512_mask3:
286 case X86::BI__builtin_ia32_vfmaddsubph512_mask:
287 case X86::BI__builtin_ia32_vfmaddsubph512_maskz:
288 case X86::BI__builtin_ia32_vfmaddsubph512_mask3:
289 case X86::BI__builtin_ia32_vfmsubaddph512_mask3:
290 case X86::BI__builtin_ia32_vfmaddcsh_mask:
291 case X86::BI__builtin_ia32_vfmaddcsh_round_mask:
292 case X86::BI__builtin_ia32_vfmaddcsh_round_mask3:
293 case X86::BI__builtin_ia32_vfmaddcph512_mask:
294 case X86::BI__builtin_ia32_vfmaddcph512_maskz:
295 case X86::BI__builtin_ia32_vfmaddcph512_mask3:
296 case X86::BI__builtin_ia32_vfcmaddcsh_mask:
297 case X86::BI__builtin_ia32_vfcmaddcsh_round_mask:
298 case X86::BI__builtin_ia32_vfcmaddcsh_round_mask3:
299 case X86::BI__builtin_ia32_vfcmaddcph512_mask:
300 case X86::BI__builtin_ia32_vfcmaddcph512_maskz:
301 case X86::BI__builtin_ia32_vfcmaddcph512_mask3:
302 case X86::BI__builtin_ia32_vfmulcsh_mask:
303 case X86::BI__builtin_ia32_vfmulcph512_mask:
304 case X86::BI__builtin_ia32_vfcmulcsh_mask:
305 case X86::BI__builtin_ia32_vfcmulcph512_mask:
306 case X86::BI__builtin_ia32_vcvt2ps2phx512_mask:
307 ArgNum = 4;
308 HasRC = true;
309 break;
310 case X86::BI__builtin_ia32_vcvttpd2dqs512_round_mask:
311 case X86::BI__builtin_ia32_vcvttpd2udqs512_round_mask:
312 case X86::BI__builtin_ia32_vcvttpd2qqs512_round_mask:
313 case X86::BI__builtin_ia32_vcvttpd2uqqs512_round_mask:
314 case X86::BI__builtin_ia32_vcvttps2dqs512_round_mask:
315 case X86::BI__builtin_ia32_vcvttps2udqs512_round_mask:
316 case X86::BI__builtin_ia32_vcvttps2qqs512_round_mask:
317 case X86::BI__builtin_ia32_vcvttps2uqqs512_round_mask:
318 ArgNum = 3;
319 break;
320 }
321
322 llvm::APSInt Result;
323
324 // We can't check the value of a dependent argument.
325 Expr *Arg = TheCall->getArg(ArgNum);
326 if (Arg->isTypeDependent() || Arg->isValueDependent())
327 return false;
328
329 // Check constant-ness first.
330 if (SemaRef.BuiltinConstantArg(TheCall, ArgNum, Result))
331 return true;
332
333 // Make sure rounding mode is either ROUND_CUR_DIRECTION or ROUND_NO_EXC bit
334 // is set. If the intrinsic has rounding control(bits 1:0), make sure its only
335 // combined with ROUND_NO_EXC. If the intrinsic does not have rounding
336 // control, allow ROUND_NO_EXC and ROUND_CUR_DIRECTION together.
337 if (Result == 4 /*ROUND_CUR_DIRECTION*/ || Result == 8 /*ROUND_NO_EXC*/ ||
338 (!HasRC && Result == 12 /*ROUND_CUR_DIRECTION|ROUND_NO_EXC*/) ||
339 (HasRC && Result.getZExtValue() >= 8 && Result.getZExtValue() <= 11))
340 return false;
341
342 return Diag(TheCall->getBeginLoc(), diag::err_x86_builtin_invalid_rounding)
343 << Arg->getSourceRange();
344}
345
346// Check if the gather/scatter scale is legal.
347bool SemaX86::CheckBuiltinGatherScatterScale(unsigned BuiltinID,
348 CallExpr *TheCall) {
349 unsigned ArgNum = 0;
350 switch (BuiltinID) {
351 default:
352 return false;
353 case X86::BI__builtin_ia32_gatherd_pd:
354 case X86::BI__builtin_ia32_gatherd_pd256:
355 case X86::BI__builtin_ia32_gatherq_pd:
356 case X86::BI__builtin_ia32_gatherq_pd256:
357 case X86::BI__builtin_ia32_gatherd_ps:
358 case X86::BI__builtin_ia32_gatherd_ps256:
359 case X86::BI__builtin_ia32_gatherq_ps:
360 case X86::BI__builtin_ia32_gatherq_ps256:
361 case X86::BI__builtin_ia32_gatherd_q:
362 case X86::BI__builtin_ia32_gatherd_q256:
363 case X86::BI__builtin_ia32_gatherq_q:
364 case X86::BI__builtin_ia32_gatherq_q256:
365 case X86::BI__builtin_ia32_gatherd_d:
366 case X86::BI__builtin_ia32_gatherd_d256:
367 case X86::BI__builtin_ia32_gatherq_d:
368 case X86::BI__builtin_ia32_gatherq_d256:
369 case X86::BI__builtin_ia32_gather3div2df:
370 case X86::BI__builtin_ia32_gather3div2di:
371 case X86::BI__builtin_ia32_gather3div4df:
372 case X86::BI__builtin_ia32_gather3div4di:
373 case X86::BI__builtin_ia32_gather3div4sf:
374 case X86::BI__builtin_ia32_gather3div4si:
375 case X86::BI__builtin_ia32_gather3div8sf:
376 case X86::BI__builtin_ia32_gather3div8si:
377 case X86::BI__builtin_ia32_gather3siv2df:
378 case X86::BI__builtin_ia32_gather3siv2di:
379 case X86::BI__builtin_ia32_gather3siv4df:
380 case X86::BI__builtin_ia32_gather3siv4di:
381 case X86::BI__builtin_ia32_gather3siv4sf:
382 case X86::BI__builtin_ia32_gather3siv4si:
383 case X86::BI__builtin_ia32_gather3siv8sf:
384 case X86::BI__builtin_ia32_gather3siv8si:
385 case X86::BI__builtin_ia32_gathersiv8df:
386 case X86::BI__builtin_ia32_gathersiv16sf:
387 case X86::BI__builtin_ia32_gatherdiv8df:
388 case X86::BI__builtin_ia32_gatherdiv16sf:
389 case X86::BI__builtin_ia32_gathersiv8di:
390 case X86::BI__builtin_ia32_gathersiv16si:
391 case X86::BI__builtin_ia32_gatherdiv8di:
392 case X86::BI__builtin_ia32_gatherdiv16si:
393 case X86::BI__builtin_ia32_scatterdiv2df:
394 case X86::BI__builtin_ia32_scatterdiv2di:
395 case X86::BI__builtin_ia32_scatterdiv4df:
396 case X86::BI__builtin_ia32_scatterdiv4di:
397 case X86::BI__builtin_ia32_scatterdiv4sf:
398 case X86::BI__builtin_ia32_scatterdiv4si:
399 case X86::BI__builtin_ia32_scatterdiv8sf:
400 case X86::BI__builtin_ia32_scatterdiv8si:
401 case X86::BI__builtin_ia32_scattersiv2df:
402 case X86::BI__builtin_ia32_scattersiv2di:
403 case X86::BI__builtin_ia32_scattersiv4df:
404 case X86::BI__builtin_ia32_scattersiv4di:
405 case X86::BI__builtin_ia32_scattersiv4sf:
406 case X86::BI__builtin_ia32_scattersiv4si:
407 case X86::BI__builtin_ia32_scattersiv8sf:
408 case X86::BI__builtin_ia32_scattersiv8si:
409 case X86::BI__builtin_ia32_scattersiv8df:
410 case X86::BI__builtin_ia32_scattersiv16sf:
411 case X86::BI__builtin_ia32_scatterdiv8df:
412 case X86::BI__builtin_ia32_scatterdiv16sf:
413 case X86::BI__builtin_ia32_scattersiv8di:
414 case X86::BI__builtin_ia32_scattersiv16si:
415 case X86::BI__builtin_ia32_scatterdiv8di:
416 case X86::BI__builtin_ia32_scatterdiv16si:
417 ArgNum = 4;
418 break;
419 }
420
421 llvm::APSInt Result;
422
423 // We can't check the value of a dependent argument.
424 Expr *Arg = TheCall->getArg(ArgNum);
425 if (Arg->isTypeDependent() || Arg->isValueDependent())
426 return false;
427
428 // Check constant-ness first.
429 if (SemaRef.BuiltinConstantArg(TheCall, ArgNum, Result))
430 return true;
431
432 if (Result == 1 || Result == 2 || Result == 4 || Result == 8)
433 return false;
434
435 return Diag(TheCall->getBeginLoc(), diag::err_x86_builtin_invalid_scale)
436 << Arg->getSourceRange();
437}
438
439enum { TileRegLow = 0, TileRegHigh = 7 };
440
441bool SemaX86::CheckBuiltinTileArgumentsRange(CallExpr *TheCall,
442 ArrayRef<int> ArgNums) {
443 for (int ArgNum : ArgNums) {
444 if (SemaRef.BuiltinConstantArgRange(TheCall, ArgNum, TileRegLow,
445 TileRegHigh))
446 return true;
447 }
448 return false;
449}
450
451bool SemaX86::CheckBuiltinTileDuplicate(CallExpr *TheCall,
452 ArrayRef<int> ArgNums) {
453 // Because the max number of tile register is TileRegHigh + 1, so here we use
454 // each bit to represent the usage of them in bitset.
455 std::bitset<TileRegHigh + 1> ArgValues;
456 for (int ArgNum : ArgNums) {
457 Expr *Arg = TheCall->getArg(ArgNum);
458 if (Arg->isTypeDependent() || Arg->isValueDependent())
459 continue;
460
461 llvm::APSInt Result;
462 if (SemaRef.BuiltinConstantArg(TheCall, ArgNum, Result))
463 return true;
464 int ArgExtValue = Result.getExtValue();
465 assert((ArgExtValue >= TileRegLow && ArgExtValue <= TileRegHigh) &&
466 "Incorrect tile register num.");
467 if (ArgValues.test(ArgExtValue))
468 return Diag(TheCall->getBeginLoc(),
469 diag::err_x86_builtin_tile_arg_duplicate)
470 << TheCall->getArg(ArgNum)->getSourceRange();
471 ArgValues.set(ArgExtValue);
472 }
473 return false;
474}
475
476bool SemaX86::CheckBuiltinTileRangeAndDuplicate(CallExpr *TheCall,
477 ArrayRef<int> ArgNums) {
478 return CheckBuiltinTileArgumentsRange(TheCall, ArgNums) ||
479 CheckBuiltinTileDuplicate(TheCall, ArgNums);
480}
481
482bool SemaX86::CheckBuiltinTileArguments(unsigned BuiltinID, CallExpr *TheCall) {
483 switch (BuiltinID) {
484 default:
485 return false;
486 case X86::BI__builtin_ia32_tileloadd64:
487 case X86::BI__builtin_ia32_tileloaddt164:
488 case X86::BI__builtin_ia32_tileloaddrs64:
489 case X86::BI__builtin_ia32_tileloaddrst164:
490 case X86::BI__builtin_ia32_tilestored64:
491 case X86::BI__builtin_ia32_tilezero:
492 case X86::BI__builtin_ia32_tcvtrowps2bf16h:
493 case X86::BI__builtin_ia32_tcvtrowps2bf16l:
494 case X86::BI__builtin_ia32_tcvtrowps2phh:
495 case X86::BI__builtin_ia32_tcvtrowps2phl:
496 case X86::BI__builtin_ia32_tcvtrowd2ps:
497 case X86::BI__builtin_ia32_tilemovrow:
498 return CheckBuiltinTileArgumentsRange(TheCall, 0);
499 case X86::BI__builtin_ia32_tdpbssd:
500 case X86::BI__builtin_ia32_tdpbsud:
501 case X86::BI__builtin_ia32_tdpbusd:
502 case X86::BI__builtin_ia32_tdpbuud:
503 case X86::BI__builtin_ia32_tdpbf16ps:
504 case X86::BI__builtin_ia32_tdpfp16ps:
505 case X86::BI__builtin_ia32_tcmmimfp16ps:
506 case X86::BI__builtin_ia32_tcmmrlfp16ps:
507 case X86::BI__builtin_ia32_tdpbf8ps:
508 case X86::BI__builtin_ia32_tdpbhf8ps:
509 case X86::BI__builtin_ia32_tdphbf8ps:
510 case X86::BI__builtin_ia32_tdphf8ps:
511 case X86::BI__builtin_ia32_tmmultf32ps:
512 return CheckBuiltinTileRangeAndDuplicate(TheCall, {0, 1, 2});
513 case X86::BI__builtin_ia32_tcvtrowps2bf16hi:
514 case X86::BI__builtin_ia32_tcvtrowps2bf16li:
515 case X86::BI__builtin_ia32_tcvtrowps2phhi:
516 case X86::BI__builtin_ia32_tcvtrowps2phli:
517 case X86::BI__builtin_ia32_tcvtrowd2psi:
518 case X86::BI__builtin_ia32_tilemovrowi:
519 return CheckBuiltinTileArgumentsRange(TheCall, 0) ||
520 SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 255,
521 /*RangeIsError=*/false);
522 }
523}
524static bool isX86_32Builtin(unsigned BuiltinID) {
525 // These builtins only work on x86-32 targets.
526 switch (BuiltinID) {
527 case X86::BI__builtin_ia32_readeflags_u32:
528 case X86::BI__builtin_ia32_writeeflags_u32:
529 return true;
530 }
531
532 return false;
533}
534
535bool SemaX86::CheckBuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID,
536 CallExpr *TheCall) {
537 // Check for 32-bit only builtins on a 64-bit target.
538 const llvm::Triple &TT = TI.getTriple();
539 if (TT.getArch() != llvm::Triple::x86 && isX86_32Builtin(BuiltinID))
540 return Diag(TheCall->getCallee()->getBeginLoc(),
541 diag::err_32_bit_builtin_64_bit_tgt);
542
543 // If the intrinsic has rounding or SAE make sure its valid.
544 if (CheckBuiltinRoundingOrSAE(BuiltinID, TheCall))
545 return true;
546
547 // If the intrinsic has a gather/scatter scale immediate make sure its valid.
548 if (CheckBuiltinGatherScatterScale(BuiltinID, TheCall))
549 return true;
550
551 // If the intrinsic has a tile arguments, make sure they are valid.
552 if (CheckBuiltinTileArguments(BuiltinID, TheCall))
553 return true;
554
555 // For intrinsics which take an immediate value as part of the instruction,
556 // range check them here.
557 int i = 0, l = 0, u = 0;
558 switch (BuiltinID) {
559 default:
560 return false;
561 case X86::BI__builtin_ia32_vec_ext_v2di:
562 case X86::BI__builtin_ia32_vextractf128_pd256:
563 case X86::BI__builtin_ia32_vextractf128_ps256:
564 case X86::BI__builtin_ia32_vextractf128_si256:
565 case X86::BI__builtin_ia32_extract128i256:
566 case X86::BI__builtin_ia32_extractf64x4_mask:
567 case X86::BI__builtin_ia32_extracti64x4_mask:
568 case X86::BI__builtin_ia32_extractf32x8_mask:
569 case X86::BI__builtin_ia32_extracti32x8_mask:
570 case X86::BI__builtin_ia32_extractf64x2_256_mask:
571 case X86::BI__builtin_ia32_extracti64x2_256_mask:
572 case X86::BI__builtin_ia32_extractf32x4_256_mask:
573 case X86::BI__builtin_ia32_extracti32x4_256_mask:
574 i = 1;
575 l = 0;
576 u = 1;
577 break;
578 case X86::BI__builtin_ia32_vec_set_v2di:
579 case X86::BI__builtin_ia32_vinsertf128_pd256:
580 case X86::BI__builtin_ia32_vinsertf128_ps256:
581 case X86::BI__builtin_ia32_vinsertf128_si256:
582 case X86::BI__builtin_ia32_insert128i256:
583 case X86::BI__builtin_ia32_insertf32x8:
584 case X86::BI__builtin_ia32_inserti32x8:
585 case X86::BI__builtin_ia32_insertf64x4:
586 case X86::BI__builtin_ia32_inserti64x4:
587 case X86::BI__builtin_ia32_insertf64x2_256:
588 case X86::BI__builtin_ia32_inserti64x2_256:
589 case X86::BI__builtin_ia32_insertf32x4_256:
590 case X86::BI__builtin_ia32_inserti32x4_256:
591 i = 2;
592 l = 0;
593 u = 1;
594 break;
595 case X86::BI__builtin_ia32_vpermilpd:
596 case X86::BI__builtin_ia32_vec_ext_v4hi:
597 case X86::BI__builtin_ia32_vec_ext_v4si:
598 case X86::BI__builtin_ia32_vec_ext_v4sf:
599 case X86::BI__builtin_ia32_vec_ext_v4di:
600 case X86::BI__builtin_ia32_extractf32x4_mask:
601 case X86::BI__builtin_ia32_extracti32x4_mask:
602 case X86::BI__builtin_ia32_extractf64x2_512_mask:
603 case X86::BI__builtin_ia32_extracti64x2_512_mask:
604 i = 1;
605 l = 0;
606 u = 3;
607 break;
608 case X86::BI_mm_prefetch:
609 case X86::BI__builtin_ia32_vec_ext_v8hi:
610 case X86::BI__builtin_ia32_vec_ext_v8si:
611 i = 1;
612 l = 0;
613 u = 7;
614 break;
615 case X86::BI__builtin_ia32_sha1rnds4:
616 case X86::BI__builtin_ia32_blendpd:
617 case X86::BI__builtin_ia32_shufpd:
618 case X86::BI__builtin_ia32_vec_set_v4hi:
619 case X86::BI__builtin_ia32_vec_set_v4si:
620 case X86::BI__builtin_ia32_vec_set_v4di:
621 case X86::BI__builtin_ia32_shuf_f32x4_256:
622 case X86::BI__builtin_ia32_shuf_f64x2_256:
623 case X86::BI__builtin_ia32_shuf_i32x4_256:
624 case X86::BI__builtin_ia32_shuf_i64x2_256:
625 case X86::BI__builtin_ia32_insertf64x2_512:
626 case X86::BI__builtin_ia32_inserti64x2_512:
627 case X86::BI__builtin_ia32_insertf32x4:
628 case X86::BI__builtin_ia32_inserti32x4:
629 i = 2;
630 l = 0;
631 u = 3;
632 break;
633 case X86::BI__builtin_ia32_vpermil2pd:
634 case X86::BI__builtin_ia32_vpermil2pd256:
635 case X86::BI__builtin_ia32_vpermil2ps:
636 case X86::BI__builtin_ia32_vpermil2ps256:
637 i = 3;
638 l = 0;
639 u = 3;
640 break;
641 case X86::BI__builtin_ia32_cmpb128_mask:
642 case X86::BI__builtin_ia32_cmpw128_mask:
643 case X86::BI__builtin_ia32_cmpd128_mask:
644 case X86::BI__builtin_ia32_cmpq128_mask:
645 case X86::BI__builtin_ia32_cmpb256_mask:
646 case X86::BI__builtin_ia32_cmpw256_mask:
647 case X86::BI__builtin_ia32_cmpd256_mask:
648 case X86::BI__builtin_ia32_cmpq256_mask:
649 case X86::BI__builtin_ia32_cmpb512_mask:
650 case X86::BI__builtin_ia32_cmpw512_mask:
651 case X86::BI__builtin_ia32_cmpd512_mask:
652 case X86::BI__builtin_ia32_cmpq512_mask:
653 case X86::BI__builtin_ia32_ucmpb128_mask:
654 case X86::BI__builtin_ia32_ucmpw128_mask:
655 case X86::BI__builtin_ia32_ucmpd128_mask:
656 case X86::BI__builtin_ia32_ucmpq128_mask:
657 case X86::BI__builtin_ia32_ucmpb256_mask:
658 case X86::BI__builtin_ia32_ucmpw256_mask:
659 case X86::BI__builtin_ia32_ucmpd256_mask:
660 case X86::BI__builtin_ia32_ucmpq256_mask:
661 case X86::BI__builtin_ia32_ucmpb512_mask:
662 case X86::BI__builtin_ia32_ucmpw512_mask:
663 case X86::BI__builtin_ia32_ucmpd512_mask:
664 case X86::BI__builtin_ia32_ucmpq512_mask:
665 case X86::BI__builtin_ia32_vpcomub:
666 case X86::BI__builtin_ia32_vpcomuw:
667 case X86::BI__builtin_ia32_vpcomud:
668 case X86::BI__builtin_ia32_vpcomuq:
669 case X86::BI__builtin_ia32_vpcomb:
670 case X86::BI__builtin_ia32_vpcomw:
671 case X86::BI__builtin_ia32_vpcomd:
672 case X86::BI__builtin_ia32_vpcomq:
673 case X86::BI__builtin_ia32_vec_set_v8hi:
674 case X86::BI__builtin_ia32_vec_set_v8si:
675 i = 2;
676 l = 0;
677 u = 7;
678 break;
679 case X86::BI__builtin_ia32_vpermilpd256:
680 case X86::BI__builtin_ia32_roundps:
681 case X86::BI__builtin_ia32_roundpd:
682 case X86::BI__builtin_ia32_roundps256:
683 case X86::BI__builtin_ia32_roundpd256:
684 case X86::BI__builtin_ia32_getmantpd128_mask:
685 case X86::BI__builtin_ia32_getmantpd256_mask:
686 case X86::BI__builtin_ia32_getmantps128_mask:
687 case X86::BI__builtin_ia32_getmantps256_mask:
688 case X86::BI__builtin_ia32_getmantpd512_mask:
689 case X86::BI__builtin_ia32_getmantps512_mask:
690 case X86::BI__builtin_ia32_getmantph128_mask:
691 case X86::BI__builtin_ia32_getmantph256_mask:
692 case X86::BI__builtin_ia32_getmantph512_mask:
693 case X86::BI__builtin_ia32_vec_ext_v16qi:
694 case X86::BI__builtin_ia32_vec_ext_v16hi:
695 i = 1;
696 l = 0;
697 u = 15;
698 break;
699 case X86::BI__builtin_ia32_pblendd128:
700 case X86::BI__builtin_ia32_blendps:
701 case X86::BI__builtin_ia32_blendpd256:
702 case X86::BI__builtin_ia32_shufpd256:
703 case X86::BI__builtin_ia32_roundss:
704 case X86::BI__builtin_ia32_roundsd:
705 case X86::BI__builtin_ia32_rangepd128_mask:
706 case X86::BI__builtin_ia32_rangepd256_mask:
707 case X86::BI__builtin_ia32_rangepd512_mask:
708 case X86::BI__builtin_ia32_rangeps128_mask:
709 case X86::BI__builtin_ia32_rangeps256_mask:
710 case X86::BI__builtin_ia32_rangeps512_mask:
711 case X86::BI__builtin_ia32_getmantsd_round_mask:
712 case X86::BI__builtin_ia32_getmantss_round_mask:
713 case X86::BI__builtin_ia32_getmantsh_round_mask:
714 case X86::BI__builtin_ia32_vec_set_v16qi:
715 case X86::BI__builtin_ia32_vec_set_v16hi:
716 i = 2;
717 l = 0;
718 u = 15;
719 break;
720 case X86::BI__builtin_ia32_vec_ext_v32qi:
721 i = 1;
722 l = 0;
723 u = 31;
724 break;
725 case X86::BI__builtin_ia32_cmpps:
726 case X86::BI__builtin_ia32_cmpss:
727 case X86::BI__builtin_ia32_cmppd:
728 case X86::BI__builtin_ia32_cmpsd:
729 case X86::BI__builtin_ia32_cmpps256:
730 case X86::BI__builtin_ia32_cmppd256:
731 case X86::BI__builtin_ia32_cmpps128_mask:
732 case X86::BI__builtin_ia32_cmppd128_mask:
733 case X86::BI__builtin_ia32_cmpps256_mask:
734 case X86::BI__builtin_ia32_cmppd256_mask:
735 case X86::BI__builtin_ia32_cmpps512_mask:
736 case X86::BI__builtin_ia32_cmppd512_mask:
737 case X86::BI__builtin_ia32_cmpsd_mask:
738 case X86::BI__builtin_ia32_cmpss_mask:
739 case X86::BI__builtin_ia32_vec_set_v32qi:
740 i = 2;
741 l = 0;
742 u = 31;
743 break;
744 case X86::BI__builtin_ia32_permdf256:
745 case X86::BI__builtin_ia32_permdi256:
746 case X86::BI__builtin_ia32_permdf512:
747 case X86::BI__builtin_ia32_permdi512:
748 case X86::BI__builtin_ia32_vpermilps:
749 case X86::BI__builtin_ia32_vpermilps256:
750 case X86::BI__builtin_ia32_vpermilpd512:
751 case X86::BI__builtin_ia32_vpermilps512:
752 case X86::BI__builtin_ia32_pshufd:
753 case X86::BI__builtin_ia32_pshufd256:
754 case X86::BI__builtin_ia32_pshufd512:
755 case X86::BI__builtin_ia32_pshufhw:
756 case X86::BI__builtin_ia32_pshufhw256:
757 case X86::BI__builtin_ia32_pshufhw512:
758 case X86::BI__builtin_ia32_pshuflw:
759 case X86::BI__builtin_ia32_pshuflw256:
760 case X86::BI__builtin_ia32_pshuflw512:
761 case X86::BI__builtin_ia32_vcvtps2ph:
762 case X86::BI__builtin_ia32_vcvtps2ph_mask:
763 case X86::BI__builtin_ia32_vcvtps2ph256:
764 case X86::BI__builtin_ia32_vcvtps2ph256_mask:
765 case X86::BI__builtin_ia32_vcvtps2ph512_mask:
766 case X86::BI__builtin_ia32_rndscaleps_128_mask:
767 case X86::BI__builtin_ia32_rndscalepd_128_mask:
768 case X86::BI__builtin_ia32_rndscaleps_256_mask:
769 case X86::BI__builtin_ia32_rndscalepd_256_mask:
770 case X86::BI__builtin_ia32_rndscaleps_mask:
771 case X86::BI__builtin_ia32_rndscalepd_mask:
772 case X86::BI__builtin_ia32_rndscaleph_mask:
773 case X86::BI__builtin_ia32_vrndscalebf16_128_mask:
774 case X86::BI__builtin_ia32_vrndscalebf16_256_mask:
775 case X86::BI__builtin_ia32_vrndscalebf16_mask:
776 case X86::BI__builtin_ia32_reducepd128_mask:
777 case X86::BI__builtin_ia32_reducepd256_mask:
778 case X86::BI__builtin_ia32_reducepd512_mask:
779 case X86::BI__builtin_ia32_reduceps128_mask:
780 case X86::BI__builtin_ia32_reduceps256_mask:
781 case X86::BI__builtin_ia32_reduceps512_mask:
782 case X86::BI__builtin_ia32_reduceph128_mask:
783 case X86::BI__builtin_ia32_reduceph256_mask:
784 case X86::BI__builtin_ia32_reduceph512_mask:
785 case X86::BI__builtin_ia32_vreducebf16128_mask:
786 case X86::BI__builtin_ia32_vreducebf16256_mask:
787 case X86::BI__builtin_ia32_vreducebf16512_mask:
788 case X86::BI__builtin_ia32_prold512:
789 case X86::BI__builtin_ia32_prolq512:
790 case X86::BI__builtin_ia32_prold128:
791 case X86::BI__builtin_ia32_prold256:
792 case X86::BI__builtin_ia32_prolq128:
793 case X86::BI__builtin_ia32_prolq256:
794 case X86::BI__builtin_ia32_prord512:
795 case X86::BI__builtin_ia32_prorq512:
796 case X86::BI__builtin_ia32_prord128:
797 case X86::BI__builtin_ia32_prord256:
798 case X86::BI__builtin_ia32_prorq128:
799 case X86::BI__builtin_ia32_prorq256:
800 case X86::BI__builtin_ia32_fpclasspd128_mask:
801 case X86::BI__builtin_ia32_fpclasspd256_mask:
802 case X86::BI__builtin_ia32_fpclassps128_mask:
803 case X86::BI__builtin_ia32_fpclassps256_mask:
804 case X86::BI__builtin_ia32_fpclassps512_mask:
805 case X86::BI__builtin_ia32_fpclasspd512_mask:
806 case X86::BI__builtin_ia32_fpclassph128_mask:
807 case X86::BI__builtin_ia32_fpclassph256_mask:
808 case X86::BI__builtin_ia32_fpclassph512_mask:
809 case X86::BI__builtin_ia32_vfpclassbf16128_mask:
810 case X86::BI__builtin_ia32_vfpclassbf16256_mask:
811 case X86::BI__builtin_ia32_vfpclassbf16512_mask:
812 case X86::BI__builtin_ia32_fpclasssd_mask:
813 case X86::BI__builtin_ia32_fpclassss_mask:
814 case X86::BI__builtin_ia32_fpclasssh_mask:
815 case X86::BI__builtin_ia32_pslldqi128_byteshift:
816 case X86::BI__builtin_ia32_pslldqi256_byteshift:
817 case X86::BI__builtin_ia32_pslldqi512_byteshift:
818 case X86::BI__builtin_ia32_psrldqi128_byteshift:
819 case X86::BI__builtin_ia32_psrldqi256_byteshift:
820 case X86::BI__builtin_ia32_psrldqi512_byteshift:
821 case X86::BI__builtin_ia32_kshiftliqi:
822 case X86::BI__builtin_ia32_kshiftlihi:
823 case X86::BI__builtin_ia32_kshiftlisi:
824 case X86::BI__builtin_ia32_kshiftlidi:
825 case X86::BI__builtin_ia32_kshiftriqi:
826 case X86::BI__builtin_ia32_kshiftrihi:
827 case X86::BI__builtin_ia32_kshiftrisi:
828 case X86::BI__builtin_ia32_kshiftridi:
829 i = 1;
830 l = 0;
831 u = 255;
832 break;
833 case X86::BI__builtin_ia32_vperm2f128_pd256:
834 case X86::BI__builtin_ia32_vperm2f128_ps256:
835 case X86::BI__builtin_ia32_vperm2f128_si256:
836 case X86::BI__builtin_ia32_permti256:
837 case X86::BI__builtin_ia32_pblendw128:
838 case X86::BI__builtin_ia32_pblendw256:
839 case X86::BI__builtin_ia32_blendps256:
840 case X86::BI__builtin_ia32_pblendd256:
841 case X86::BI__builtin_ia32_palignr128:
842 case X86::BI__builtin_ia32_palignr256:
843 case X86::BI__builtin_ia32_palignr512:
844 case X86::BI__builtin_ia32_alignq512:
845 case X86::BI__builtin_ia32_alignd512:
846 case X86::BI__builtin_ia32_alignd128:
847 case X86::BI__builtin_ia32_alignd256:
848 case X86::BI__builtin_ia32_alignq128:
849 case X86::BI__builtin_ia32_alignq256:
850 case X86::BI__builtin_ia32_vcomisd:
851 case X86::BI__builtin_ia32_vcomiss:
852 case X86::BI__builtin_ia32_shuf_f32x4:
853 case X86::BI__builtin_ia32_shuf_f64x2:
854 case X86::BI__builtin_ia32_shuf_i32x4:
855 case X86::BI__builtin_ia32_shuf_i64x2:
856 case X86::BI__builtin_ia32_shufpd512:
857 case X86::BI__builtin_ia32_shufps:
858 case X86::BI__builtin_ia32_shufps256:
859 case X86::BI__builtin_ia32_shufps512:
860 case X86::BI__builtin_ia32_dbpsadbw128:
861 case X86::BI__builtin_ia32_dbpsadbw256:
862 case X86::BI__builtin_ia32_dbpsadbw512:
863 case X86::BI__builtin_ia32_vpshldd128:
864 case X86::BI__builtin_ia32_vpshldd256:
865 case X86::BI__builtin_ia32_vpshldd512:
866 case X86::BI__builtin_ia32_vpshldq128:
867 case X86::BI__builtin_ia32_vpshldq256:
868 case X86::BI__builtin_ia32_vpshldq512:
869 case X86::BI__builtin_ia32_vpshldw128:
870 case X86::BI__builtin_ia32_vpshldw256:
871 case X86::BI__builtin_ia32_vpshldw512:
872 case X86::BI__builtin_ia32_vpshrdd128:
873 case X86::BI__builtin_ia32_vpshrdd256:
874 case X86::BI__builtin_ia32_vpshrdd512:
875 case X86::BI__builtin_ia32_vpshrdq128:
876 case X86::BI__builtin_ia32_vpshrdq256:
877 case X86::BI__builtin_ia32_vpshrdq512:
878 case X86::BI__builtin_ia32_vpshrdw128:
879 case X86::BI__builtin_ia32_vpshrdw256:
880 case X86::BI__builtin_ia32_vpshrdw512:
881 case X86::BI__builtin_ia32_vminmaxbf16128:
882 case X86::BI__builtin_ia32_vminmaxbf16256:
883 case X86::BI__builtin_ia32_vminmaxbf16512:
884 case X86::BI__builtin_ia32_vminmaxpd128_mask:
885 case X86::BI__builtin_ia32_vminmaxpd256_mask:
886 case X86::BI__builtin_ia32_vminmaxph128_mask:
887 case X86::BI__builtin_ia32_vminmaxph256_mask:
888 case X86::BI__builtin_ia32_vminmaxps128_mask:
889 case X86::BI__builtin_ia32_vminmaxps256_mask:
890 case X86::BI__builtin_ia32_vminmaxpd512_round_mask:
891 case X86::BI__builtin_ia32_vminmaxps512_round_mask:
892 case X86::BI__builtin_ia32_vminmaxph512_round_mask:
893 case X86::BI__builtin_ia32_vminmaxsd_round_mask:
894 case X86::BI__builtin_ia32_vminmaxsh_round_mask:
895 case X86::BI__builtin_ia32_vminmaxss_round_mask:
896 i = 2;
897 l = 0;
898 u = 255;
899 break;
900 case X86::BI__builtin_ia32_fixupimmpd512_mask:
901 case X86::BI__builtin_ia32_fixupimmpd512_maskz:
902 case X86::BI__builtin_ia32_fixupimmps512_mask:
903 case X86::BI__builtin_ia32_fixupimmps512_maskz:
904 case X86::BI__builtin_ia32_fixupimmsd_mask:
905 case X86::BI__builtin_ia32_fixupimmsd_maskz:
906 case X86::BI__builtin_ia32_fixupimmss_mask:
907 case X86::BI__builtin_ia32_fixupimmss_maskz:
908 case X86::BI__builtin_ia32_fixupimmpd128_mask:
909 case X86::BI__builtin_ia32_fixupimmpd128_maskz:
910 case X86::BI__builtin_ia32_fixupimmpd256_mask:
911 case X86::BI__builtin_ia32_fixupimmpd256_maskz:
912 case X86::BI__builtin_ia32_fixupimmps128_mask:
913 case X86::BI__builtin_ia32_fixupimmps128_maskz:
914 case X86::BI__builtin_ia32_fixupimmps256_mask:
915 case X86::BI__builtin_ia32_fixupimmps256_maskz:
916 case X86::BI__builtin_ia32_pternlogd512_mask:
917 case X86::BI__builtin_ia32_pternlogd512_maskz:
918 case X86::BI__builtin_ia32_pternlogq512_mask:
919 case X86::BI__builtin_ia32_pternlogq512_maskz:
920 case X86::BI__builtin_ia32_pternlogd128_mask:
921 case X86::BI__builtin_ia32_pternlogd128_maskz:
922 case X86::BI__builtin_ia32_pternlogd256_mask:
923 case X86::BI__builtin_ia32_pternlogd256_maskz:
924 case X86::BI__builtin_ia32_pternlogq128_mask:
925 case X86::BI__builtin_ia32_pternlogq128_maskz:
926 case X86::BI__builtin_ia32_pternlogq256_mask:
927 case X86::BI__builtin_ia32_pternlogq256_maskz:
928 case X86::BI__builtin_ia32_vsm3rnds2:
929 i = 3;
930 l = 0;
931 u = 255;
932 break;
933 case X86::BI__builtin_ia32_reducesd_mask:
934 case X86::BI__builtin_ia32_reducess_mask:
935 case X86::BI__builtin_ia32_rndscalesd_round_mask:
936 case X86::BI__builtin_ia32_rndscaless_round_mask:
937 case X86::BI__builtin_ia32_rndscalesh_round_mask:
938 case X86::BI__builtin_ia32_reducesh_mask:
939 i = 4;
940 l = 0;
941 u = 255;
942 break;
943 case X86::BI__builtin_ia32_cmpccxadd32:
944 case X86::BI__builtin_ia32_cmpccxadd64:
945 i = 3;
946 l = 0;
947 u = 15;
948 break;
949 case X86::BI__builtin_ia32_prefetchi:
950 i = 1;
951 l = 2; // _MM_HINT_T1
952 u = 3; // _MM_HINT_T0
953 break;
954 }
955
956 // Note that we don't force a hard error on the range check here, allowing
957 // template-generated or macro-generated dead code to potentially have out-of-
958 // range values. These need to code generate, but don't need to necessarily
959 // make any sense. We use a warning that defaults to an error.
960 return SemaRef.BuiltinConstantArgRange(TheCall, i, l, u,
961 /*RangeIsError*/ false);
962}
963
964void SemaX86::handleAnyInterruptAttr(Decl *D, const ParsedAttr &AL) {
965 // Semantic checks for a function with the 'interrupt' attribute.
966 // a) Must be a function.
967 // b) Must have the 'void' return type.
968 // c) Must take 1 or 2 arguments.
969 // d) The 1st argument must be a pointer.
970 // e) The 2nd argument (if any) must be an unsigned integer.
971 ASTContext &Context = getASTContext();
972
973 if (!isFuncOrMethodForAttrSubject(D) || !hasFunctionProto(D) ||
974 isInstanceMethod(D) ||
975 CXXMethodDecl::isStaticOverloadedOperator(
976 cast<NamedDecl>(D)->getDeclName().getCXXOverloadedOperator())) {
977 Diag(AL.getLoc(), diag::warn_attribute_wrong_decl_type)
978 << AL << AL.isRegularKeywordAttribute()
979 << ExpectedFunctionWithProtoType;
980 return;
981 }
982 // Interrupt handler must have void return type.
983 if (!getFunctionOrMethodResultType(D)->isVoidType()) {
984 Diag(getFunctionOrMethodResultSourceRange(D).getBegin(),
985 diag::err_anyx86_interrupt_attribute)
986 << (SemaRef.Context.getTargetInfo().getTriple().getArch() ==
987 llvm::Triple::x86
988 ? 0
989 : 1)
990 << 0;
991 return;
992 }
993 // Interrupt handler must have 1 or 2 parameters.
994 unsigned NumParams = getFunctionOrMethodNumParams(D);
995 if (NumParams < 1 || NumParams > 2) {
996 Diag(D->getBeginLoc(), diag::err_anyx86_interrupt_attribute)
997 << (Context.getTargetInfo().getTriple().getArch() == llvm::Triple::x86
998 ? 0
999 : 1)
1000 << 1;
1001 return;
1002 }
1003 // The first argument must be a pointer.
1004 if (!getFunctionOrMethodParamType(D, 0)->isPointerType()) {
1005 Diag(getFunctionOrMethodParamRange(D, 0).getBegin(),
1006 diag::err_anyx86_interrupt_attribute)
1007 << (Context.getTargetInfo().getTriple().getArch() == llvm::Triple::x86
1008 ? 0
1009 : 1)
1010 << 2;
1011 return;
1012 }
1013 // The second argument, if present, must be an unsigned integer.
1014 unsigned TypeSize =
1015 Context.getTargetInfo().getTriple().getArch() == llvm::Triple::x86_64
1016 ? 64
1017 : 32;
1018 if (NumParams == 2 &&
1019 (!getFunctionOrMethodParamType(D, 1)->isUnsignedIntegerType() ||
1020 Context.getTypeSize(getFunctionOrMethodParamType(D, 1)) != TypeSize)) {
1021 Diag(getFunctionOrMethodParamRange(D, 1).getBegin(),
1022 diag::err_anyx86_interrupt_attribute)
1023 << (Context.getTargetInfo().getTriple().getArch() == llvm::Triple::x86
1024 ? 0
1025 : 1)
1026 << 3 << Context.getIntTypeForBitwidth(TypeSize, /*Signed=*/false);
1027 return;
1028 }
1029 D->addAttr(::new (Context) AnyX86InterruptAttr(Context, AL));
1030 D->addAttr(UsedAttr::CreateImplicit(Context));
1031}
1032
1033void SemaX86::handleForceAlignArgPointerAttr(Decl *D, const ParsedAttr &AL) {
1034 // If we try to apply it to a function pointer, don't warn, but don't
1035 // do anything, either. It doesn't matter anyway, because there's nothing
1036 // special about calling a force_align_arg_pointer function.
1037 const auto *VD = dyn_cast<ValueDecl>(D);
1038 if (VD && VD->getType()->isFunctionPointerType())
1039 return;
1040 // Also don't warn on function pointer typedefs.
1041 const auto *TD = dyn_cast<TypedefNameDecl>(D);
1042 if (TD && (TD->getUnderlyingType()->isFunctionPointerType() ||
1043 TD->getUnderlyingType()->isFunctionType()))
1044 return;
1045 // Attribute can only be applied to function types.
1046 if (!isa<FunctionDecl>(D)) {
1047 Diag(AL.getLoc(), diag::warn_attribute_wrong_decl_type)
1048 << AL << AL.isRegularKeywordAttribute() << ExpectedFunction;
1049 return;
1050 }
1051
1052 D->addAttr(::new (getASTContext())
1053 X86ForceAlignArgPointerAttr(getASTContext(), AL));
1054}
1055
1056bool SemaX86::checkTargetClonesAttr(const SmallVectorImpl<StringRef> &Params,
1057 const SmallVectorImpl<SourceLocation> &Locs,
1058 SmallVectorImpl<SmallString<64>> &NewParams,
1059 SourceLocation AttrLoc) {
1060 using namespace DiagAttrParams;
1061
1062 assert(Params.size() == Locs.size() &&
1063 "Mismatch between number of string parameters and locations");
1064
1065 bool HasDefault = false;
1066 bool HasComma = false;
1067 for (unsigned I = 0, E = Params.size(); I < E; ++I) {
1068 const StringRef Param = Params[I].trim();
1069 const SourceLocation &Loc = Locs[I];
1070
1071 if (Param.empty() || Param.ends_with(','))
1072 return Diag(Loc, diag::warn_unsupported_target_attribute)
1073 << Unsupported << None << "" << TargetClones;
1074
1075 if (Param.contains(','))
1076 HasComma = true;
1077
1078 StringRef LHS;
1079 StringRef RHS = Param;
1080 do {
1081 std::tie(LHS, RHS) = RHS.split(',');
1082 LHS = LHS.trim();
1083 const SourceLocation &CurLoc =
1084 Loc.getLocWithOffset(LHS.data() - Param.data());
1085
1086 if (LHS.starts_with("arch=")) {
1087 if (!getASTContext().getTargetInfo().isValidCPUName(
1088 LHS.drop_front(sizeof("arch=") - 1)))
1089 return Diag(CurLoc, diag::warn_unsupported_target_attribute)
1090 << Unsupported << CPU << LHS.drop_front(sizeof("arch=") - 1)
1091 << TargetClones;
1092 } else if (LHS == "default")
1093 HasDefault = true;
1094 else if (!getASTContext().getTargetInfo().isValidFeatureName(LHS) ||
1095 getASTContext().getTargetInfo().getFMVPriority(LHS) == 0)
1096 return Diag(CurLoc, diag::warn_unsupported_target_attribute)
1097 << Unsupported << None << LHS << TargetClones;
1098
1099 if (llvm::is_contained(NewParams, LHS))
1100 Diag(CurLoc, diag::warn_target_clone_duplicate_options);
1101 // Note: Add even if there are duplicates, since it changes name mangling.
1102 NewParams.push_back(LHS);
1103 } while (!RHS.empty());
1104 }
1105 if (HasComma && Params.size() > 1)
1106 Diag(Locs[0], diag::warn_target_clone_mixed_values);
1107
1108 if (!HasDefault)
1109 return Diag(AttrLoc, diag::err_target_clone_must_have_default);
1110
1111 return false;
1112}
1113
1114} // namespace clang
getFMVPriority
static llvm::APInt getFMVPriority(const TargetInfo &TI, const CodeGenFunction::FMVResolverOption &RO)
Definition CodeGenModule.cpp:4616
SemaX86.h
This file declares semantic analysis functions specific to X86.
TargetBuiltins.h
Enumerates target-specific builtins in their own namespaces within namespace clang.
clang::ASTContext
Holds long-lived AST nodes (such as types and decls) that can be referred to throughout the semantic ...
Definition ASTContext.h:220
clang::AttributeCommonInfo::getLoc
SourceLocation getLoc() const
Definition AttributeCommonInfo.h:194
clang::CXXMethodDecl::isStaticOverloadedOperator
static bool isStaticOverloadedOperator(OverloadedOperatorKind OOK)
Returns true if the given operator is implicitly static in a record context.
Definition DeclCXX.h:2171
clang::CallExpr
CallExpr - Represents a function call (C99 6.5.2.2, C++ [expr.call]).
Definition Expr.h:2943
clang::CallExpr::getArg
Expr * getArg(unsigned Arg)
getArg - Return the specified argument.
Definition Expr.h:3147
clang::CallExpr::getBeginLoc
SourceLocation getBeginLoc() const
Definition Expr.h:3277
clang::CallExpr::getCallee
Expr * getCallee()
Definition Expr.h:3090
clang::Decl
Decl - This represents one declaration (or definition), e.g.
Definition DeclBase.h:86
clang::Decl::addAttr
void addAttr(Attr *A)
Definition DeclBase.cpp:1045
clang::Decl::getBeginLoc
SourceLocation getBeginLoc() const LLVM_READONLY
Definition DeclBase.h:431
clang::Expr
This represents one expression.
Definition Expr.h:112
clang::Expr::isValueDependent
bool isValueDependent() const
Determines whether the value of this expression depends on.
Definition Expr.h:177
clang::Expr::isTypeDependent
bool isTypeDependent() const
Determines whether the type of this expression depends on.
Definition Expr.h:194
clang::ParsedAttr
ParsedAttr - Represents a syntactic attribute.
Definition ParsedAttr.h:119
clang::SemaBase::SemaBase
SemaBase(Sema &S)
Definition SemaBase.cpp:7
clang::SemaBase::getASTContext
ASTContext & getASTContext() const
Definition SemaBase.cpp:9
clang::SemaBase::SemaRef
Sema & SemaRef
Definition SemaBase.h:40
clang::SemaBase::Diag
SemaDiagnosticBuilder Diag(SourceLocation Loc, unsigned DiagID)
Emit a diagnostic.
Definition SemaBase.cpp:61
clang::SemaX86::CheckBuiltinTileArgumentsRange
bool CheckBuiltinTileArgumentsRange(CallExpr *TheCall, ArrayRef< int > ArgNums)
Definition SemaX86.cpp:441
clang::SemaX86::handleForceAlignArgPointerAttr
void handleForceAlignArgPointerAttr(Decl *D, const ParsedAttr &AL)
Definition SemaX86.cpp:1033
clang::SemaX86::CheckBuiltinFunctionCall
bool CheckBuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID, CallExpr *TheCall)
Definition SemaX86.cpp:535
clang::SemaX86::CheckBuiltinRoundingOrSAE
bool CheckBuiltinRoundingOrSAE(unsigned BuiltinID, CallExpr *TheCall)
Definition SemaX86.cpp:29
clang::SemaX86::CheckBuiltinTileRangeAndDuplicate
bool CheckBuiltinTileRangeAndDuplicate(CallExpr *TheCall, ArrayRef< int > ArgNums)
Definition SemaX86.cpp:476
clang::SemaX86::CheckBuiltinGatherScatterScale
bool CheckBuiltinGatherScatterScale(unsigned BuiltinID, CallExpr *TheCall)
Definition SemaX86.cpp:347
clang::SemaX86::CheckBuiltinTileDuplicate
bool CheckBuiltinTileDuplicate(CallExpr *TheCall, ArrayRef< int > ArgNums)
Definition SemaX86.cpp:451
clang::SemaX86::handleAnyInterruptAttr
void handleAnyInterruptAttr(Decl *D, const ParsedAttr &AL)
Definition SemaX86.cpp:964
clang::SemaX86::SemaX86
SemaX86(Sema &S)
Definition SemaX86.cpp:26
clang::SemaX86::CheckBuiltinTileArguments
bool CheckBuiltinTileArguments(unsigned BuiltinID, CallExpr *TheCall)
Definition SemaX86.cpp:482
clang::SemaX86::checkTargetClonesAttr
bool checkTargetClonesAttr(const SmallVectorImpl< StringRef > &Params, const SmallVectorImpl< SourceLocation > &Locs, SmallVectorImpl< SmallString< 64 > > &NewParams, SourceLocation AttrLoc)
Definition SemaX86.cpp:1056
clang::Sema
Sema - This implements semantic analysis and AST building for C.
Definition Sema.h:855
clang::SourceLocation
Encodes a location in the source.
Definition SourceLocation.h:90
clang::SourceLocation::getLocWithOffset
SourceLocation getLocWithOffset(IntTy Offset) const
Return a source location with the specified offset from this SourceLocation.
Definition SourceLocation.h:139
clang::Stmt::getSourceRange
SourceRange getSourceRange() const LLVM_READONLY
SourceLocation tokens are not useful in isolation - they are low level value objects created/interpre...
Definition Stmt.cpp:338
clang::Stmt::getBeginLoc
SourceLocation getBeginLoc() const LLVM_READONLY
Definition Stmt.cpp:350
clang::TargetInfo
Exposes information about the current target.
Definition TargetInfo.h:226
clang::TargetInfo::getTriple
const llvm::Triple & getTriple() const
Returns the target triple of the primary target.
Definition TargetInfo.h:1316
TargetInfo.h
Defines the clang::TargetInfo interface.
clang::DiagAttrParams
Enums for the diagnostics of target, target_version and target_clones.
Definition Sema.h:841
clang
The JSON file list parser is used to communicate input to InstallAPI.
Definition CalledOnceCheck.h:17
clang::isa
bool isa(CodeGen::Address addr)
Definition Address.h:330
clang::ExpectedFunctionWithProtoType
@ ExpectedFunctionWithProtoType
Definition ParsedAttr.h:1087
clang::ExpectedFunction
@ ExpectedFunction
Definition ParsedAttr.h:1075
clang::getFunctionOrMethodResultType
QualType getFunctionOrMethodResultType(const Decl *D)
Definition Attr.h:98
clang::isInstanceMethod
bool isInstanceMethod(const Decl *D)
Definition Attr.h:120
clang::isX86_32Builtin
static bool isX86_32Builtin(unsigned BuiltinID)
Definition SemaX86.cpp:524
clang::getFunctionOrMethodResultSourceRange
SourceRange getFunctionOrMethodResultSourceRange(const Decl *D)
Definition Attr.h:104
clang::getFunctionOrMethodParamType
QualType getFunctionOrMethodParamType(const Decl *D, unsigned Idx)
Definition Attr.h:83
clang::ObjCSubstitutionContext::Result
@ Result
The result type of a method or function.
Definition TypeBase.h:905
clang::isFuncOrMethodForAttrSubject
bool isFuncOrMethodForAttrSubject(const Decl *D)
isFuncOrMethodForAttrSubject - Return true if the given decl has function type (function or function-...
Definition Attr.h:34
clang::hasFunctionProto
bool hasFunctionProto(const Decl *D)
hasFunctionProto - Return true if the given decl has a argument information.
Definition Attr.h:55
clang::getFunctionOrMethodNumParams
unsigned getFunctionOrMethodNumParams(const Decl *D)
getFunctionOrMethodNumParams - Return number of function or method parameters.
Definition Attr.h:64
clang::cast
U cast(CodeGen::Address addr)
Definition Address.h:327
clang::getFunctionOrMethodParamRange
SourceRange getFunctionOrMethodParamRange(const Decl *D, unsigned Idx)
Definition Attr.h:92
clang::AlignRequirementKind::None
@ None
The alignment was not explicit in code.
Definition ASTContext.h:178
clang::TileRegLow
@ TileRegLow
Definition SemaX86.cpp:439
clang::TileRegHigh
@ TileRegHigh
Definition SemaX86.cpp:439
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