clang 20.0.0git
PPC.cpp
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1//===- PPC.cpp ------------------------------------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#include "ABIInfoImpl.h"
10#include "TargetInfo.h"
12
13using namespace clang;
14using namespace clang::CodeGen;
15
17 QualType Ty, CharUnits SlotSize,
18 CharUnits EltSize, const ComplexType *CTy) {
19 Address Addr =
20 emitVoidPtrDirectVAArg(CGF, VAListAddr, CGF.Int8Ty, SlotSize * 2,
21 SlotSize, SlotSize, /*AllowHigher*/ true);
22
23 Address RealAddr = Addr;
24 Address ImagAddr = RealAddr;
25 if (CGF.CGM.getDataLayout().isBigEndian()) {
26 RealAddr =
27 CGF.Builder.CreateConstInBoundsByteGEP(RealAddr, SlotSize - EltSize);
28 ImagAddr = CGF.Builder.CreateConstInBoundsByteGEP(ImagAddr,
29 2 * SlotSize - EltSize);
30 } else {
31 ImagAddr = CGF.Builder.CreateConstInBoundsByteGEP(RealAddr, SlotSize);
32 }
33
34 llvm::Type *EltTy = CGF.ConvertTypeForMem(CTy->getElementType());
35 RealAddr = RealAddr.withElementType(EltTy);
36 ImagAddr = ImagAddr.withElementType(EltTy);
37 llvm::Value *Real = CGF.Builder.CreateLoad(RealAddr, ".vareal");
38 llvm::Value *Imag = CGF.Builder.CreateLoad(ImagAddr, ".vaimag");
39
40 return RValue::getComplex(Real, Imag);
41}
42
44 llvm::Value *Address, bool Is64Bit,
45 bool IsAIX) {
46 // This is calculated from the LLVM and GCC tables and verified
47 // against gcc output. AFAIK all PPC ABIs use the same encoding.
48
49 CodeGen::CGBuilderTy &Builder = CGF.Builder;
50
51 llvm::IntegerType *i8 = CGF.Int8Ty;
52 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4);
53 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8);
54 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16);
55
56 // 0-31: r0-31, the 4-byte or 8-byte general-purpose registers
57 AssignToArrayRange(Builder, Address, Is64Bit ? Eight8 : Four8, 0, 31);
58
59 // 32-63: fp0-31, the 8-byte floating-point registers
60 AssignToArrayRange(Builder, Address, Eight8, 32, 63);
61
62 // 64-67 are various 4-byte or 8-byte special-purpose registers:
63 // 64: mq
64 // 65: lr
65 // 66: ctr
66 // 67: ap
67 AssignToArrayRange(Builder, Address, Is64Bit ? Eight8 : Four8, 64, 67);
68
69 // 68-76 are various 4-byte special-purpose registers:
70 // 68-75 cr0-7
71 // 76: xer
72 AssignToArrayRange(Builder, Address, Four8, 68, 76);
73
74 // 77-108: v0-31, the 16-byte vector registers
75 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108);
76
77 // 109: vrsave
78 // 110: vscr
79 AssignToArrayRange(Builder, Address, Is64Bit ? Eight8 : Four8, 109, 110);
80
81 // AIX does not utilize the rest of the registers.
82 if (IsAIX)
83 return false;
84
85 // 111: spe_acc
86 // 112: spefscr
87 // 113: sfp
88 AssignToArrayRange(Builder, Address, Is64Bit ? Eight8 : Four8, 111, 113);
89
90 if (!Is64Bit)
91 return false;
92
93 // TODO: Need to verify if these registers are used on 64 bit AIX with Power8
94 // or above CPU.
95 // 64-bit only registers:
96 // 114: tfhar
97 // 115: tfiar
98 // 116: texasr
99 AssignToArrayRange(Builder, Address, Eight8, 114, 116);
100
101 return false;
102}
103
104// AIX
105namespace {
106/// AIXABIInfo - The AIX XCOFF ABI information.
107class AIXABIInfo : public ABIInfo {
108 const bool Is64Bit;
109 const unsigned PtrByteSize;
110 CharUnits getParamTypeAlignment(QualType Ty) const;
111
112public:
113 AIXABIInfo(CodeGen::CodeGenTypes &CGT, bool Is64Bit)
114 : ABIInfo(CGT), Is64Bit(Is64Bit), PtrByteSize(Is64Bit ? 8 : 4) {}
115
116 bool isPromotableTypeForABI(QualType Ty) const;
117
120
121 void computeInfo(CGFunctionInfo &FI) const override {
122 if (!getCXXABI().classifyReturnType(FI))
124
125 for (auto &I : FI.arguments())
126 I.info = classifyArgumentType(I.type);
127 }
128
129 RValue EmitVAArg(CodeGenFunction &CGF, Address VAListAddr, QualType Ty,
130 AggValueSlot Slot) const override;
131};
132
133class AIXTargetCodeGenInfo : public TargetCodeGenInfo {
134 const bool Is64Bit;
135
136public:
137 AIXTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool Is64Bit)
138 : TargetCodeGenInfo(std::make_unique<AIXABIInfo>(CGT, Is64Bit)),
139 Is64Bit(Is64Bit) {}
140 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const override {
141 return 1; // r1 is the dedicated stack pointer
142 }
143
145 llvm::Value *Address) const override;
146
147 void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
148 CodeGen::CodeGenModule &M) const override;
149};
150} // namespace
151
152// Return true if the ABI requires Ty to be passed sign- or zero-
153// extended to 32/64 bits.
154bool AIXABIInfo::isPromotableTypeForABI(QualType Ty) const {
155 // Treat an enum type as its underlying type.
156 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
157 Ty = EnumTy->getDecl()->getIntegerType();
158
159 // Promotable integer types are required to be promoted by the ABI.
160 if (getContext().isPromotableIntegerType(Ty))
161 return true;
162
163 if (!Is64Bit)
164 return false;
165
166 // For 64 bit mode, in addition to the usual promotable integer types, we also
167 // need to extend all 32-bit types, since the ABI requires promotion to 64
168 // bits.
169 if (const BuiltinType *BT = Ty->getAs<BuiltinType>())
170 switch (BT->getKind()) {
171 case BuiltinType::Int:
172 case BuiltinType::UInt:
173 return true;
174 default:
175 break;
176 }
177
178 return false;
179}
180
181ABIArgInfo AIXABIInfo::classifyReturnType(QualType RetTy) const {
182 if (RetTy->isAnyComplexType())
183 return ABIArgInfo::getDirect();
184
185 if (RetTy->isVectorType())
186 return ABIArgInfo::getDirect();
187
188 if (RetTy->isVoidType())
189 return ABIArgInfo::getIgnore();
190
191 if (isAggregateTypeForABI(RetTy))
192 return getNaturalAlignIndirect(RetTy);
193
194 return (isPromotableTypeForABI(RetTy) ? ABIArgInfo::getExtend(RetTy)
196}
197
198ABIArgInfo AIXABIInfo::classifyArgumentType(QualType Ty) const {
200
201 if (Ty->isAnyComplexType())
202 return ABIArgInfo::getDirect();
203
204 if (Ty->isVectorType())
205 return ABIArgInfo::getDirect();
206
207 if (isAggregateTypeForABI(Ty)) {
208 // Records with non-trivial destructors/copy-constructors should not be
209 // passed by value.
210 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
211 return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory);
212
213 CharUnits CCAlign = getParamTypeAlignment(Ty);
214 CharUnits TyAlign = getContext().getTypeAlignInChars(Ty);
215
216 return ABIArgInfo::getIndirect(CCAlign, /*ByVal*/ true,
217 /*Realign*/ TyAlign > CCAlign);
218 }
219
220 return (isPromotableTypeForABI(Ty)
221 ? ABIArgInfo::getExtend(Ty, CGT.ConvertType(Ty))
223}
224
225CharUnits AIXABIInfo::getParamTypeAlignment(QualType Ty) const {
226 // Complex types are passed just like their elements.
227 if (const ComplexType *CTy = Ty->getAs<ComplexType>())
228 Ty = CTy->getElementType();
229
230 if (Ty->isVectorType())
231 return CharUnits::fromQuantity(16);
232
233 // If the structure contains a vector type, the alignment is 16.
234 if (isRecordWithSIMDVectorType(getContext(), Ty))
235 return CharUnits::fromQuantity(16);
236
237 return CharUnits::fromQuantity(PtrByteSize);
238}
239
240RValue AIXABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
241 QualType Ty, AggValueSlot Slot) const {
242
243 auto TypeInfo = getContext().getTypeInfoInChars(Ty);
244 TypeInfo.Align = getParamTypeAlignment(Ty);
245
246 CharUnits SlotSize = CharUnits::fromQuantity(PtrByteSize);
247
248 // If we have a complex type and the base type is smaller than the register
249 // size, the ABI calls for the real and imaginary parts to be right-adjusted
250 // in separate words in 32bit mode or doublewords in 64bit mode. However,
251 // Clang expects us to produce a pointer to a structure with the two parts
252 // packed tightly. So generate loads of the real and imaginary parts relative
253 // to the va_list pointer, and store them to a temporary structure. We do the
254 // same as the PPC64ABI here.
255 if (const ComplexType *CTy = Ty->getAs<ComplexType>()) {
256 CharUnits EltSize = TypeInfo.Width / 2;
257 if (EltSize < SlotSize)
258 return complexTempStructure(CGF, VAListAddr, Ty, SlotSize, EltSize, CTy);
259 }
260
261 return emitVoidPtrVAArg(CGF, VAListAddr, Ty, /*Indirect*/ false, TypeInfo,
262 SlotSize, /*AllowHigher*/ true, Slot);
263}
264
265bool AIXTargetCodeGenInfo::initDwarfEHRegSizeTable(
266 CodeGen::CodeGenFunction &CGF, llvm::Value *Address) const {
267 return PPC_initDwarfEHRegSizeTable(CGF, Address, Is64Bit, /*IsAIX*/ true);
268}
269
270void AIXTargetCodeGenInfo::setTargetAttributes(
271 const Decl *D, llvm::GlobalValue *GV, CodeGen::CodeGenModule &M) const {
272 if (!isa<llvm::GlobalVariable>(GV))
273 return;
274
275 auto *GVar = cast<llvm::GlobalVariable>(GV);
276 auto GVId = GV->getName();
277
278 // Is this a global variable specified by the user as toc-data?
279 bool UserSpecifiedTOC =
280 llvm::binary_search(M.getCodeGenOpts().TocDataVarsUserSpecified, GVId);
281 // Assumes the same variable cannot be in both TocVarsUserSpecified and
282 // NoTocVars.
283 if (UserSpecifiedTOC ||
284 ((M.getCodeGenOpts().AllTocData) &&
285 !llvm::binary_search(M.getCodeGenOpts().NoTocDataVars, GVId))) {
286 const unsigned long PointerSize =
287 GV->getParent()->getDataLayout().getPointerSizeInBits() / 8;
288 auto *VarD = dyn_cast<VarDecl>(D);
289 assert(VarD && "Invalid declaration of global variable.");
290
291 ASTContext &Context = D->getASTContext();
292 unsigned Alignment = Context.toBits(Context.getDeclAlign(D)) / 8;
293 const auto *Ty = VarD->getType().getTypePtr();
294 const RecordDecl *RDecl =
295 Ty->isRecordType() ? Ty->getAs<RecordType>()->getDecl() : nullptr;
296
297 bool EmitDiagnostic = UserSpecifiedTOC && GV->hasExternalLinkage();
298 auto reportUnsupportedWarning = [&](bool ShouldEmitWarning, StringRef Msg) {
299 if (ShouldEmitWarning)
300 M.getDiags().Report(D->getLocation(), diag::warn_toc_unsupported_type)
301 << GVId << Msg;
302 };
303 if (!Ty || Ty->isIncompleteType())
304 reportUnsupportedWarning(EmitDiagnostic, "of incomplete type");
305 else if (RDecl && RDecl->hasFlexibleArrayMember())
306 reportUnsupportedWarning(EmitDiagnostic,
307 "it contains a flexible array member");
308 else if (VarD->getTLSKind() != VarDecl::TLS_None)
309 reportUnsupportedWarning(EmitDiagnostic, "of thread local storage");
310 else if (PointerSize < Context.getTypeInfo(VarD->getType()).Width / 8)
311 reportUnsupportedWarning(EmitDiagnostic,
312 "variable is larger than a pointer");
313 else if (PointerSize < Alignment)
314 reportUnsupportedWarning(EmitDiagnostic,
315 "variable is aligned wider than a pointer");
316 else if (D->hasAttr<SectionAttr>())
317 reportUnsupportedWarning(EmitDiagnostic,
318 "variable has a section attribute");
319 else if (GV->hasExternalLinkage() ||
320 (M.getCodeGenOpts().AllTocData && !GV->hasLocalLinkage()))
321 GVar->addAttribute("toc-data");
322 }
323}
324
325// PowerPC-32
326namespace {
327/// PPC32_SVR4_ABIInfo - The 32-bit PowerPC ELF (SVR4) ABI information.
328class PPC32_SVR4_ABIInfo : public DefaultABIInfo {
329 bool IsSoftFloatABI;
330 bool IsRetSmallStructInRegABI;
331
332 CharUnits getParamTypeAlignment(QualType Ty) const;
333
334public:
335 PPC32_SVR4_ABIInfo(CodeGen::CodeGenTypes &CGT, bool SoftFloatABI,
336 bool RetSmallStructInRegABI)
337 : DefaultABIInfo(CGT), IsSoftFloatABI(SoftFloatABI),
338 IsRetSmallStructInRegABI(RetSmallStructInRegABI) {}
339
341
342 void computeInfo(CGFunctionInfo &FI) const override {
343 if (!getCXXABI().classifyReturnType(FI))
345 for (auto &I : FI.arguments())
346 I.info = classifyArgumentType(I.type);
347 }
348
349 RValue EmitVAArg(CodeGenFunction &CGF, Address VAListAddr, QualType Ty,
350 AggValueSlot Slot) const override;
351};
352
353class PPC32TargetCodeGenInfo : public TargetCodeGenInfo {
354public:
355 PPC32TargetCodeGenInfo(CodeGenTypes &CGT, bool SoftFloatABI,
356 bool RetSmallStructInRegABI)
357 : TargetCodeGenInfo(std::make_unique<PPC32_SVR4_ABIInfo>(
358 CGT, SoftFloatABI, RetSmallStructInRegABI)) {}
359
360 static bool isStructReturnInRegABI(const llvm::Triple &Triple,
361 const CodeGenOptions &Opts);
362
363 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const override {
364 // This is recovered from gcc output.
365 return 1; // r1 is the dedicated stack pointer
366 }
367
369 llvm::Value *Address) const override;
370};
371}
372
373CharUnits PPC32_SVR4_ABIInfo::getParamTypeAlignment(QualType Ty) const {
374 // Complex types are passed just like their elements.
375 if (const ComplexType *CTy = Ty->getAs<ComplexType>())
376 Ty = CTy->getElementType();
377
378 if (Ty->isVectorType())
379 return CharUnits::fromQuantity(getContext().getTypeSize(Ty) == 128 ? 16
380 : 4);
381
382 // For single-element float/vector structs, we consider the whole type
383 // to have the same alignment requirements as its single element.
384 const Type *AlignTy = nullptr;
385 if (const Type *EltType = isSingleElementStruct(Ty, getContext())) {
386 const BuiltinType *BT = EltType->getAs<BuiltinType>();
387 if ((EltType->isVectorType() && getContext().getTypeSize(EltType) == 128) ||
388 (BT && BT->isFloatingPoint()))
389 AlignTy = EltType;
390 }
391
392 if (AlignTy)
393 return CharUnits::fromQuantity(AlignTy->isVectorType() ? 16 : 4);
394 return CharUnits::fromQuantity(4);
395}
396
397ABIArgInfo PPC32_SVR4_ABIInfo::classifyReturnType(QualType RetTy) const {
399
400 // -msvr4-struct-return puts small aggregates in GPR3 and GPR4.
401 if (isAggregateTypeForABI(RetTy) && IsRetSmallStructInRegABI &&
402 (Size = getContext().getTypeSize(RetTy)) <= 64) {
403 // System V ABI (1995), page 3-22, specified:
404 // > A structure or union whose size is less than or equal to 8 bytes
405 // > shall be returned in r3 and r4, as if it were first stored in the
406 // > 8-byte aligned memory area and then the low addressed word were
407 // > loaded into r3 and the high-addressed word into r4. Bits beyond
408 // > the last member of the structure or union are not defined.
409 //
410 // GCC for big-endian PPC32 inserts the pad before the first member,
411 // not "beyond the last member" of the struct. To stay compatible
412 // with GCC, we coerce the struct to an integer of the same size.
413 // LLVM will extend it and return i32 in r3, or i64 in r3:r4.
414 if (Size == 0)
415 return ABIArgInfo::getIgnore();
416 else {
417 llvm::Type *CoerceTy = llvm::Type::getIntNTy(getVMContext(), Size);
418 return ABIArgInfo::getDirect(CoerceTy);
419 }
420 }
421
423}
424
425// TODO: this implementation is now likely redundant with
426// DefaultABIInfo::EmitVAArg.
427RValue PPC32_SVR4_ABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAList,
428 QualType Ty, AggValueSlot Slot) const {
429 if (getTarget().getTriple().isOSDarwin()) {
430 auto TI = getContext().getTypeInfoInChars(Ty);
431 TI.Align = getParamTypeAlignment(Ty);
432
434 return emitVoidPtrVAArg(CGF, VAList, Ty,
435 classifyArgumentType(Ty).isIndirect(), TI, SlotSize,
436 /*AllowHigherAlign=*/true, Slot);
437 }
438
439 const unsigned OverflowLimit = 8;
440 if (const ComplexType *CTy = Ty->getAs<ComplexType>()) {
441 // TODO: Implement this. For now ignore.
442 (void)CTy;
443 return RValue::getAggregate(Address::invalid()); // FIXME?
444 }
445
446 // struct __va_list_tag {
447 // unsigned char gpr;
448 // unsigned char fpr;
449 // unsigned short reserved;
450 // void *overflow_arg_area;
451 // void *reg_save_area;
452 // };
453
454 bool isI64 = Ty->isIntegerType() && getContext().getTypeSize(Ty) == 64;
455 bool isInt = !Ty->isFloatingType();
456 bool isF64 = Ty->isFloatingType() && getContext().getTypeSize(Ty) == 64;
457
458 // All aggregates are passed indirectly? That doesn't seem consistent
459 // with the argument-lowering code.
460 bool isIndirect = isAggregateTypeForABI(Ty);
461
462 CGBuilderTy &Builder = CGF.Builder;
463
464 // The calling convention either uses 1-2 GPRs or 1 FPR.
465 Address NumRegsAddr = Address::invalid();
466 if (isInt || IsSoftFloatABI) {
467 NumRegsAddr = Builder.CreateStructGEP(VAList, 0, "gpr");
468 } else {
469 NumRegsAddr = Builder.CreateStructGEP(VAList, 1, "fpr");
470 }
471
472 llvm::Value *NumRegs = Builder.CreateLoad(NumRegsAddr, "numUsedRegs");
473
474 // "Align" the register count when TY is i64.
475 if (isI64 || (isF64 && IsSoftFloatABI)) {
476 NumRegs = Builder.CreateAdd(NumRegs, Builder.getInt8(1));
477 NumRegs = Builder.CreateAnd(NumRegs, Builder.getInt8((uint8_t) ~1U));
478 }
479
480 llvm::Value *CC =
481 Builder.CreateICmpULT(NumRegs, Builder.getInt8(OverflowLimit), "cond");
482
483 llvm::BasicBlock *UsingRegs = CGF.createBasicBlock("using_regs");
484 llvm::BasicBlock *UsingOverflow = CGF.createBasicBlock("using_overflow");
485 llvm::BasicBlock *Cont = CGF.createBasicBlock("cont");
486
487 Builder.CreateCondBr(CC, UsingRegs, UsingOverflow);
488
489 llvm::Type *DirectTy = CGF.ConvertType(Ty), *ElementTy = DirectTy;
490 if (isIndirect)
491 DirectTy = CGF.UnqualPtrTy;
492
493 // Case 1: consume registers.
494 Address RegAddr = Address::invalid();
495 {
496 CGF.EmitBlock(UsingRegs);
497
498 Address RegSaveAreaPtr = Builder.CreateStructGEP(VAList, 4);
499 RegAddr = Address(Builder.CreateLoad(RegSaveAreaPtr), CGF.Int8Ty,
501 assert(RegAddr.getElementType() == CGF.Int8Ty);
502
503 // Floating-point registers start after the general-purpose registers.
504 if (!(isInt || IsSoftFloatABI)) {
505 RegAddr = Builder.CreateConstInBoundsByteGEP(RegAddr,
507 }
508
509 // Get the address of the saved value by scaling the number of
510 // registers we've used by the number of
511 CharUnits RegSize = CharUnits::fromQuantity((isInt || IsSoftFloatABI) ? 4 : 8);
512 llvm::Value *RegOffset =
513 Builder.CreateMul(NumRegs, Builder.getInt8(RegSize.getQuantity()));
514 RegAddr = Address(Builder.CreateInBoundsGEP(
515 CGF.Int8Ty, RegAddr.emitRawPointer(CGF), RegOffset),
516 DirectTy,
517 RegAddr.getAlignment().alignmentOfArrayElement(RegSize));
518
519 // Increase the used-register count.
520 NumRegs =
521 Builder.CreateAdd(NumRegs,
522 Builder.getInt8((isI64 || (isF64 && IsSoftFloatABI)) ? 2 : 1));
523 Builder.CreateStore(NumRegs, NumRegsAddr);
524
525 CGF.EmitBranch(Cont);
526 }
527
528 // Case 2: consume space in the overflow area.
529 Address MemAddr = Address::invalid();
530 {
531 CGF.EmitBlock(UsingOverflow);
532
533 Builder.CreateStore(Builder.getInt8(OverflowLimit), NumRegsAddr);
534
535 // Everything in the overflow area is rounded up to a size of at least 4.
536 CharUnits OverflowAreaAlign = CharUnits::fromQuantity(4);
537
539 if (!isIndirect) {
540 auto TypeInfo = CGF.getContext().getTypeInfoInChars(Ty);
541 Size = TypeInfo.Width.alignTo(OverflowAreaAlign);
542 } else {
543 Size = CGF.getPointerSize();
544 }
545
546 Address OverflowAreaAddr = Builder.CreateStructGEP(VAList, 3);
547 Address OverflowArea =
548 Address(Builder.CreateLoad(OverflowAreaAddr, "argp.cur"), CGF.Int8Ty,
549 OverflowAreaAlign);
550 // Round up address of argument to alignment
551 CharUnits Align = CGF.getContext().getTypeAlignInChars(Ty);
552 if (Align > OverflowAreaAlign) {
553 llvm::Value *Ptr = OverflowArea.emitRawPointer(CGF);
554 OverflowArea = Address(emitRoundPointerUpToAlignment(CGF, Ptr, Align),
555 OverflowArea.getElementType(), Align);
556 }
557
558 MemAddr = OverflowArea.withElementType(DirectTy);
559
560 // Increase the overflow area.
561 OverflowArea = Builder.CreateConstInBoundsByteGEP(OverflowArea, Size);
562 Builder.CreateStore(OverflowArea.emitRawPointer(CGF), OverflowAreaAddr);
563 CGF.EmitBranch(Cont);
564 }
565
566 CGF.EmitBlock(Cont);
567
568 // Merge the cases with a phi.
569 Address Result = emitMergePHI(CGF, RegAddr, UsingRegs, MemAddr, UsingOverflow,
570 "vaarg.addr");
571
572 // Load the pointer if the argument was passed indirectly.
573 if (isIndirect) {
574 Result = Address(Builder.CreateLoad(Result, "aggr"), ElementTy,
575 getContext().getTypeAlignInChars(Ty));
576 }
577
578 return CGF.EmitLoadOfAnyValue(CGF.MakeAddrLValue(Result, Ty), Slot);
579}
580
581bool PPC32TargetCodeGenInfo::isStructReturnInRegABI(
582 const llvm::Triple &Triple, const CodeGenOptions &Opts) {
583 assert(Triple.isPPC32());
584
585 switch (Opts.getStructReturnConvention()) {
587 break;
588 case CodeGenOptions::SRCK_OnStack: // -maix-struct-return
589 return false;
590 case CodeGenOptions::SRCK_InRegs: // -msvr4-struct-return
591 return true;
592 }
593
594 if (Triple.isOSBinFormatELF() && !Triple.isOSLinux())
595 return true;
596
597 return false;
598}
599
600bool
601PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
602 llvm::Value *Address) const {
603 return PPC_initDwarfEHRegSizeTable(CGF, Address, /*Is64Bit*/ false,
604 /*IsAIX*/ false);
605}
606
607// PowerPC-64
608
609namespace {
610
611/// PPC64_SVR4_ABIInfo - The 64-bit PowerPC ELF (SVR4) ABI information.
612class PPC64_SVR4_ABIInfo : public ABIInfo {
613 static const unsigned GPRBits = 64;
615 bool IsSoftFloatABI;
616
617public:
618 PPC64_SVR4_ABIInfo(CodeGen::CodeGenTypes &CGT, PPC64_SVR4_ABIKind Kind,
619 bool SoftFloatABI)
620 : ABIInfo(CGT), Kind(Kind), IsSoftFloatABI(SoftFloatABI) {}
621
622 bool isPromotableTypeForABI(QualType Ty) const;
623 CharUnits getParamTypeAlignment(QualType Ty) const;
624
627
628 bool isHomogeneousAggregateBaseType(QualType Ty) const override;
630 uint64_t Members) const override;
631
632 // TODO: We can add more logic to computeInfo to improve performance.
633 // Example: For aggregate arguments that fit in a register, we could
634 // use getDirectInReg (as is done below for structs containing a single
635 // floating-point value) to avoid pushing them to memory on function
636 // entry. This would require changing the logic in PPCISelLowering
637 // when lowering the parameters in the caller and args in the callee.
638 void computeInfo(CGFunctionInfo &FI) const override {
639 if (!getCXXABI().classifyReturnType(FI))
641 for (auto &I : FI.arguments()) {
642 // We rely on the default argument classification for the most part.
643 // One exception: An aggregate containing a single floating-point
644 // or vector item must be passed in a register if one is available.
645 const Type *T = isSingleElementStruct(I.type, getContext());
646 if (T) {
647 const BuiltinType *BT = T->getAs<BuiltinType>();
648 if ((T->isVectorType() && getContext().getTypeSize(T) == 128) ||
649 (BT && BT->isFloatingPoint())) {
650 QualType QT(T, 0);
651 I.info = ABIArgInfo::getDirectInReg(CGT.ConvertType(QT));
652 continue;
653 }
654 }
655 I.info = classifyArgumentType(I.type);
656 }
657 }
658
659 RValue EmitVAArg(CodeGenFunction &CGF, Address VAListAddr, QualType Ty,
660 AggValueSlot Slot) const override;
661};
662
663class PPC64_SVR4_TargetCodeGenInfo : public TargetCodeGenInfo {
664
665public:
666 PPC64_SVR4_TargetCodeGenInfo(CodeGenTypes &CGT, PPC64_SVR4_ABIKind Kind,
667 bool SoftFloatABI)
669 std::make_unique<PPC64_SVR4_ABIInfo>(CGT, Kind, SoftFloatABI)) {
670 SwiftInfo =
671 std::make_unique<SwiftABIInfo>(CGT, /*SwiftErrorInRegister=*/false);
672 }
673
674 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const override {
675 // This is recovered from gcc output.
676 return 1; // r1 is the dedicated stack pointer
677 }
678
680 llvm::Value *Address) const override;
682 const llvm::MapVector<GlobalDecl, StringRef>
683 &MangledDeclNames) const override;
684};
685
686class PPC64TargetCodeGenInfo : public TargetCodeGenInfo {
687public:
688 PPC64TargetCodeGenInfo(CodeGenTypes &CGT)
689 : TargetCodeGenInfo(std::make_unique<DefaultABIInfo>(CGT)) {}
690
691 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const override {
692 // This is recovered from gcc output.
693 return 1; // r1 is the dedicated stack pointer
694 }
695
697 llvm::Value *Address) const override;
698};
699}
700
701// Return true if the ABI requires Ty to be passed sign- or zero-
702// extended to 64 bits.
703bool
704PPC64_SVR4_ABIInfo::isPromotableTypeForABI(QualType Ty) const {
705 // Treat an enum type as its underlying type.
706 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
707 Ty = EnumTy->getDecl()->getIntegerType();
708
709 // Promotable integer types are required to be promoted by the ABI.
710 if (isPromotableIntegerTypeForABI(Ty))
711 return true;
712
713 // In addition to the usual promotable integer types, we also need to
714 // extend all 32-bit types, since the ABI requires promotion to 64 bits.
715 if (const BuiltinType *BT = Ty->getAs<BuiltinType>())
716 switch (BT->getKind()) {
717 case BuiltinType::Int:
718 case BuiltinType::UInt:
719 return true;
720 default:
721 break;
722 }
723
724 if (const auto *EIT = Ty->getAs<BitIntType>())
725 if (EIT->getNumBits() < 64)
726 return true;
727
728 return false;
729}
730
731/// isAlignedParamType - Determine whether a type requires 16-byte or
732/// higher alignment in the parameter area. Always returns at least 8.
733CharUnits PPC64_SVR4_ABIInfo::getParamTypeAlignment(QualType Ty) const {
734 // Complex types are passed just like their elements.
735 if (const ComplexType *CTy = Ty->getAs<ComplexType>())
736 Ty = CTy->getElementType();
737
738 auto FloatUsesVector = [this](QualType Ty){
739 return Ty->isRealFloatingType() && &getContext().getFloatTypeSemantics(
740 Ty) == &llvm::APFloat::IEEEquad();
741 };
742
743 // Only vector types of size 16 bytes need alignment (larger types are
744 // passed via reference, smaller types are not aligned).
745 if (Ty->isVectorType()) {
746 return CharUnits::fromQuantity(getContext().getTypeSize(Ty) == 128 ? 16 : 8);
747 } else if (FloatUsesVector(Ty)) {
748 // According to ABI document section 'Optional Save Areas': If extended
749 // precision floating-point values in IEEE BINARY 128 QUADRUPLE PRECISION
750 // format are supported, map them to a single quadword, quadword aligned.
751 return CharUnits::fromQuantity(16);
752 }
753
754 // For single-element float/vector structs, we consider the whole type
755 // to have the same alignment requirements as its single element.
756 const Type *AlignAsType = nullptr;
757 const Type *EltType = isSingleElementStruct(Ty, getContext());
758 if (EltType) {
759 const BuiltinType *BT = EltType->getAs<BuiltinType>();
760 if ((EltType->isVectorType() && getContext().getTypeSize(EltType) == 128) ||
761 (BT && BT->isFloatingPoint()))
762 AlignAsType = EltType;
763 }
764
765 // Likewise for ELFv2 homogeneous aggregates.
766 const Type *Base = nullptr;
767 uint64_t Members = 0;
768 if (!AlignAsType && Kind == PPC64_SVR4_ABIKind::ELFv2 &&
769 isAggregateTypeForABI(Ty) && isHomogeneousAggregate(Ty, Base, Members))
770 AlignAsType = Base;
771
772 // With special case aggregates, only vector base types need alignment.
773 if (AlignAsType) {
774 bool UsesVector = AlignAsType->isVectorType() ||
775 FloatUsesVector(QualType(AlignAsType, 0));
776 return CharUnits::fromQuantity(UsesVector ? 16 : 8);
777 }
778
779 // Otherwise, we only need alignment for any aggregate type that
780 // has an alignment requirement of >= 16 bytes.
781 if (isAggregateTypeForABI(Ty) && getContext().getTypeAlign(Ty) >= 128) {
782 return CharUnits::fromQuantity(16);
783 }
784
785 return CharUnits::fromQuantity(8);
786}
787
788bool PPC64_SVR4_ABIInfo::isHomogeneousAggregateBaseType(QualType Ty) const {
789 // Homogeneous aggregates for ELFv2 must have base types of float,
790 // double, long double, or 128-bit vectors.
791 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) {
792 if (BT->getKind() == BuiltinType::Float ||
793 BT->getKind() == BuiltinType::Double ||
794 BT->getKind() == BuiltinType::LongDouble ||
795 BT->getKind() == BuiltinType::Ibm128 ||
796 (getContext().getTargetInfo().hasFloat128Type() &&
797 (BT->getKind() == BuiltinType::Float128))) {
798 if (IsSoftFloatABI)
799 return false;
800 return true;
801 }
802 }
803 if (const VectorType *VT = Ty->getAs<VectorType>()) {
804 if (getContext().getTypeSize(VT) == 128)
805 return true;
806 }
807 return false;
808}
809
810bool PPC64_SVR4_ABIInfo::isHomogeneousAggregateSmallEnough(
811 const Type *Base, uint64_t Members) const {
812 // Vector and fp128 types require one register, other floating point types
813 // require one or two registers depending on their size.
814 uint32_t NumRegs =
815 ((getContext().getTargetInfo().hasFloat128Type() &&
816 Base->isFloat128Type()) ||
817 Base->isVectorType()) ? 1
818 : (getContext().getTypeSize(Base) + 63) / 64;
819
820 // Homogeneous Aggregates may occupy at most 8 registers.
821 return Members * NumRegs <= 8;
822}
823
825PPC64_SVR4_ABIInfo::classifyArgumentType(QualType Ty) const {
827
828 if (Ty->isAnyComplexType())
829 return ABIArgInfo::getDirect();
830
831 // Non-Altivec vector types are passed in GPRs (smaller than 16 bytes)
832 // or via reference (larger than 16 bytes).
833 if (Ty->isVectorType()) {
834 uint64_t Size = getContext().getTypeSize(Ty);
835 if (Size > 128)
836 return getNaturalAlignIndirect(Ty, /*ByVal=*/false);
837 else if (Size < 128) {
838 llvm::Type *CoerceTy = llvm::IntegerType::get(getVMContext(), Size);
839 return ABIArgInfo::getDirect(CoerceTy);
840 }
841 }
842
843 if (const auto *EIT = Ty->getAs<BitIntType>())
844 if (EIT->getNumBits() > 128)
845 return getNaturalAlignIndirect(Ty, /*ByVal=*/true);
846
847 if (isAggregateTypeForABI(Ty)) {
848 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
849 return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory);
850
851 uint64_t ABIAlign = getParamTypeAlignment(Ty).getQuantity();
852 uint64_t TyAlign = getContext().getTypeAlignInChars(Ty).getQuantity();
853
854 // ELFv2 homogeneous aggregates are passed as array types.
855 const Type *Base = nullptr;
856 uint64_t Members = 0;
857 if (Kind == PPC64_SVR4_ABIKind::ELFv2 &&
858 isHomogeneousAggregate(Ty, Base, Members)) {
859 llvm::Type *BaseTy = CGT.ConvertType(QualType(Base, 0));
860 llvm::Type *CoerceTy = llvm::ArrayType::get(BaseTy, Members);
861 return ABIArgInfo::getDirect(CoerceTy);
862 }
863
864 // If an aggregate may end up fully in registers, we do not
865 // use the ByVal method, but pass the aggregate as array.
866 // This is usually beneficial since we avoid forcing the
867 // back-end to store the argument to memory.
868 uint64_t Bits = getContext().getTypeSize(Ty);
869 if (Bits > 0 && Bits <= 8 * GPRBits) {
870 llvm::Type *CoerceTy;
871
872 // Types up to 8 bytes are passed as integer type (which will be
873 // properly aligned in the argument save area doubleword).
874 if (Bits <= GPRBits)
875 CoerceTy =
876 llvm::IntegerType::get(getVMContext(), llvm::alignTo(Bits, 8));
877 // Larger types are passed as arrays, with the base type selected
878 // according to the required alignment in the save area.
879 else {
880 uint64_t RegBits = ABIAlign * 8;
881 uint64_t NumRegs = llvm::alignTo(Bits, RegBits) / RegBits;
882 llvm::Type *RegTy = llvm::IntegerType::get(getVMContext(), RegBits);
883 CoerceTy = llvm::ArrayType::get(RegTy, NumRegs);
884 }
885
886 return ABIArgInfo::getDirect(CoerceTy);
887 }
888
889 // All other aggregates are passed ByVal.
891 /*ByVal=*/true,
892 /*Realign=*/TyAlign > ABIAlign);
893 }
894
895 return (isPromotableTypeForABI(Ty)
896 ? ABIArgInfo::getExtend(Ty, CGT.ConvertType(Ty))
898}
899
901PPC64_SVR4_ABIInfo::classifyReturnType(QualType RetTy) const {
902 if (RetTy->isVoidType())
903 return ABIArgInfo::getIgnore();
904
905 if (RetTy->isAnyComplexType())
906 return ABIArgInfo::getDirect();
907
908 // Non-Altivec vector types are returned in GPRs (smaller than 16 bytes)
909 // or via reference (larger than 16 bytes).
910 if (RetTy->isVectorType()) {
911 uint64_t Size = getContext().getTypeSize(RetTy);
912 if (Size > 128)
913 return getNaturalAlignIndirect(RetTy);
914 else if (Size < 128) {
915 llvm::Type *CoerceTy = llvm::IntegerType::get(getVMContext(), Size);
916 return ABIArgInfo::getDirect(CoerceTy);
917 }
918 }
919
920 if (const auto *EIT = RetTy->getAs<BitIntType>())
921 if (EIT->getNumBits() > 128)
922 return getNaturalAlignIndirect(RetTy, /*ByVal=*/false);
923
924 if (isAggregateTypeForABI(RetTy)) {
925 // ELFv2 homogeneous aggregates are returned as array types.
926 const Type *Base = nullptr;
927 uint64_t Members = 0;
928 if (Kind == PPC64_SVR4_ABIKind::ELFv2 &&
929 isHomogeneousAggregate(RetTy, Base, Members)) {
930 llvm::Type *BaseTy = CGT.ConvertType(QualType(Base, 0));
931 llvm::Type *CoerceTy = llvm::ArrayType::get(BaseTy, Members);
932 return ABIArgInfo::getDirect(CoerceTy);
933 }
934
935 // ELFv2 small aggregates are returned in up to two registers.
936 uint64_t Bits = getContext().getTypeSize(RetTy);
937 if (Kind == PPC64_SVR4_ABIKind::ELFv2 && Bits <= 2 * GPRBits) {
938 if (Bits == 0)
939 return ABIArgInfo::getIgnore();
940
941 llvm::Type *CoerceTy;
942 if (Bits > GPRBits) {
943 CoerceTy = llvm::IntegerType::get(getVMContext(), GPRBits);
944 CoerceTy = llvm::StructType::get(CoerceTy, CoerceTy);
945 } else
946 CoerceTy =
947 llvm::IntegerType::get(getVMContext(), llvm::alignTo(Bits, 8));
948 return ABIArgInfo::getDirect(CoerceTy);
949 }
950
951 // All other aggregates are returned indirectly.
952 return getNaturalAlignIndirect(RetTy);
953 }
954
955 return (isPromotableTypeForABI(RetTy) ? ABIArgInfo::getExtend(RetTy)
957}
958
959// Based on ARMABIInfo::EmitVAArg, adjusted for 64-bit machine.
960RValue PPC64_SVR4_ABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
961 QualType Ty, AggValueSlot Slot) const {
962 auto TypeInfo = getContext().getTypeInfoInChars(Ty);
963 TypeInfo.Align = getParamTypeAlignment(Ty);
964
966
967 // If we have a complex type and the base type is smaller than 8 bytes,
968 // the ABI calls for the real and imaginary parts to be right-adjusted
969 // in separate doublewords. However, Clang expects us to produce a
970 // pointer to a structure with the two parts packed tightly. So generate
971 // loads of the real and imaginary parts relative to the va_list pointer,
972 // and store them to a temporary structure.
973 if (const ComplexType *CTy = Ty->getAs<ComplexType>()) {
974 CharUnits EltSize = TypeInfo.Width / 2;
975 if (EltSize < SlotSize)
976 return complexTempStructure(CGF, VAListAddr, Ty, SlotSize, EltSize, CTy);
977 }
978
979 // Otherwise, just use the general rule.
980 //
981 // The PPC64 ABI passes some arguments in integer registers, even to variadic
982 // functions. To allow va_list to use the simple "void*" representation,
983 // variadic calls allocate space in the argument area for the integer argument
984 // registers, and variadic functions spill their integer argument registers to
985 // this area in their prologues. When aggregates smaller than a register are
986 // passed this way, they are passed in the least significant bits of the
987 // register, which means that after spilling on big-endian targets they will
988 // be right-aligned in their argument slot. This is uncommon; for a variety of
989 // reasons, other big-endian targets don't end up right-aligning aggregate
990 // types this way, and so right-alignment only applies to fundamental types.
991 // So on PPC64, we must force the use of right-alignment even for aggregates.
992 return emitVoidPtrVAArg(CGF, VAListAddr, Ty, /*Indirect*/ false, TypeInfo,
993 SlotSize, /*AllowHigher*/ true, Slot,
994 /*ForceRightAdjust*/ true);
995}
996
997bool
998PPC64_SVR4_TargetCodeGenInfo::initDwarfEHRegSizeTable(
1000 llvm::Value *Address) const {
1001 return PPC_initDwarfEHRegSizeTable(CGF, Address, /*Is64Bit*/ true,
1002 /*IsAIX*/ false);
1003}
1004
1005void PPC64_SVR4_TargetCodeGenInfo::emitTargetMetadata(
1007 const llvm::MapVector<GlobalDecl, StringRef> &MangledDeclNames) const {
1008 if (CGM.getTypes().isLongDoubleReferenced()) {
1009 llvm::LLVMContext &Ctx = CGM.getLLVMContext();
1010 const auto *flt = &CGM.getTarget().getLongDoubleFormat();
1011 if (flt == &llvm::APFloat::PPCDoubleDouble())
1012 CGM.getModule().addModuleFlag(llvm::Module::Error, "float-abi",
1013 llvm::MDString::get(Ctx, "doubledouble"));
1014 else if (flt == &llvm::APFloat::IEEEquad())
1015 CGM.getModule().addModuleFlag(llvm::Module::Error, "float-abi",
1016 llvm::MDString::get(Ctx, "ieeequad"));
1017 else if (flt == &llvm::APFloat::IEEEdouble())
1018 CGM.getModule().addModuleFlag(llvm::Module::Error, "float-abi",
1019 llvm::MDString::get(Ctx, "ieeedouble"));
1020 }
1021}
1022
1023bool
1024PPC64TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
1025 llvm::Value *Address) const {
1026 return PPC_initDwarfEHRegSizeTable(CGF, Address, /*Is64Bit*/ true,
1027 /*IsAIX*/ false);
1028}
1029
1030std::unique_ptr<TargetCodeGenInfo>
1032 return std::make_unique<AIXTargetCodeGenInfo>(CGM.getTypes(), Is64Bit);
1033}
1034
1035std::unique_ptr<TargetCodeGenInfo>
1037 bool RetSmallStructInRegABI = PPC32TargetCodeGenInfo::isStructReturnInRegABI(
1038 CGM.getTriple(), CGM.getCodeGenOpts());
1039 return std::make_unique<PPC32TargetCodeGenInfo>(CGM.getTypes(), SoftFloatABI,
1040 RetSmallStructInRegABI);
1041}
1042
1043std::unique_ptr<TargetCodeGenInfo>
1045 return std::make_unique<PPC64TargetCodeGenInfo>(CGM.getTypes());
1046}
1047
1048std::unique_ptr<TargetCodeGenInfo> CodeGen::createPPC64_SVR4_TargetCodeGenInfo(
1049 CodeGenModule &CGM, PPC64_SVR4_ABIKind Kind, bool SoftFloatABI) {
1050 return std::make_unique<PPC64_SVR4_TargetCodeGenInfo>(CGM.getTypes(), Kind,
1051 SoftFloatABI);
1052}
const Decl * D
static RValue complexTempStructure(CodeGenFunction &CGF, Address VAListAddr, QualType Ty, CharUnits SlotSize, CharUnits EltSize, const ComplexType *CTy)
Definition: PPC.cpp:16
static bool PPC_initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, llvm::Value *Address, bool Is64Bit, bool IsAIX)
Definition: PPC.cpp:43
Holds long-lived AST nodes (such as types and decls) that can be referred to throughout the semantic ...
Definition: ASTContext.h:188
CharUnits getTypeAlignInChars(QualType T) const
Return the ABI-specified alignment of a (complete) type T, in characters.
TypeInfo getTypeInfo(const Type *T) const
Get the size and alignment of the specified complete type in bits.
TypeInfoChars getTypeInfoInChars(const Type *T) const
CharUnits getDeclAlign(const Decl *D, bool ForAlignof=false) const
Return a conservative estimate of the alignment of the specified decl D.
int64_t toBits(CharUnits CharSize) const
Convert a size in characters to a size in bits.
A fixed int type of a specified bitwidth.
Definition: Type.h:7814
This class is used for builtin types like 'int'.
Definition: Type.h:3034
bool isFloatingPoint() const
Definition: Type.h:3107
Kind getKind() const
Definition: Type.h:3082
CharUnits - This is an opaque type for sizes expressed in character units.
Definition: CharUnits.h:38
QuantityType getQuantity() const
getQuantity - Get the raw integer representation of this quantity.
Definition: CharUnits.h:185
CharUnits alignmentOfArrayElement(CharUnits elementSize) const
Given that this is the alignment of the first element of an array, return the minimum alignment of an...
Definition: CharUnits.h:214
static CharUnits fromQuantity(QuantityType Quantity)
fromQuantity - Construct a CharUnits quantity from a raw integer type.
Definition: CharUnits.h:63
CodeGenOptions - Track various options which control how the code is optimized and passed to the back...
std::vector< std::string > TocDataVarsUserSpecified
List of global variables explicitly specified by the user as toc-data.
std::vector< std::string > NoTocDataVars
List of global variables that over-ride the toc-data default.
ABIArgInfo - Helper class to encapsulate information about how a specific C type should be passed to ...
static ABIArgInfo getIgnore()
static ABIArgInfo getIndirect(CharUnits Alignment, bool ByVal=true, bool Realign=false, llvm::Type *Padding=nullptr)
static ABIArgInfo getDirect(llvm::Type *T=nullptr, unsigned Offset=0, llvm::Type *Padding=nullptr, bool CanBeFlattened=true, unsigned Align=0)
static ABIArgInfo getExtend(QualType Ty, llvm::Type *T=nullptr)
static ABIArgInfo getDirectInReg(llvm::Type *T=nullptr)
ABIInfo - Target specific hooks for defining how a type should be passed or returned from functions.
Definition: ABIInfo.h:47
CodeGen::CGCXXABI & getCXXABI() const
Definition: ABIInfo.cpp:18
virtual bool isHomogeneousAggregateBaseType(QualType Ty) const
Definition: ABIInfo.cpp:47
virtual bool isHomogeneousAggregateSmallEnough(const Type *Base, uint64_t Members) const
Definition: ABIInfo.cpp:51
virtual RValue EmitVAArg(CodeGen::CodeGenFunction &CGF, CodeGen::Address VAListAddr, QualType Ty, AggValueSlot Slot) const =0
EmitVAArg - Emit the target dependent code to load a value of.
virtual void computeInfo(CodeGen::CGFunctionInfo &FI) const =0
Like RawAddress, an abstract representation of an aligned address, but the pointer contained in this ...
Definition: Address.h:128
static Address invalid()
Definition: Address.h:176
llvm::Value * emitRawPointer(CodeGenFunction &CGF) const
Return the pointer contained in this class after authenticating it and adding offset to it if necessa...
Definition: Address.h:251
CharUnits getAlignment() const
Definition: Address.h:189
llvm::Type * getElementType() const
Return the type of the values stored in this address.
Definition: Address.h:207
Address withElementType(llvm::Type *ElemTy) const
Return address with different element type, but same pointer and alignment.
Definition: Address.h:274
An aggregate value slot.
Definition: CGValue.h:504
Address CreateConstInBoundsByteGEP(Address Addr, CharUnits Offset, const llvm::Twine &Name="")
Given a pointer to i8, adjust it by a given constant offset.
Definition: CGBuilder.h:305
llvm::LoadInst * CreateLoad(Address Addr, const llvm::Twine &Name="")
Definition: CGBuilder.h:108
RecordArgABI
Specify how one should pass an argument of a record type.
Definition: CGCXXABI.h:150
@ RAA_DirectInMemory
Pass it on the stack using its defined layout.
Definition: CGCXXABI.h:158
CGFunctionInfo - Class to encapsulate the information about a function definition.
CanQualType getReturnType() const
MutableArrayRef< ArgInfo > arguments()
CodeGenFunction - This class organizes the per-function state that is used while generating LLVM code...
llvm::BasicBlock * createBasicBlock(const Twine &name="", llvm::Function *parent=nullptr, llvm::BasicBlock *before=nullptr)
createBasicBlock - Create an LLVM basic block.
void EmitBlock(llvm::BasicBlock *BB, bool IsFinished=false)
EmitBlock - Emit the given block.
llvm::Type * ConvertTypeForMem(QualType T)
void EmitBranch(llvm::BasicBlock *Block)
EmitBranch - Emit a branch to the specified basic block from the current insert block,...
llvm::Type * ConvertType(QualType T)
LValue MakeAddrLValue(Address Addr, QualType T, AlignmentSource Source=AlignmentSource::Type)
RValue EmitLoadOfAnyValue(LValue V, AggValueSlot Slot=AggValueSlot::ignored(), SourceLocation Loc={})
Like EmitLoadOfLValue but also handles complex and aggregate types.
This class organizes the cross-function state that is used while generating LLVM code.
llvm::Module & getModule() const
DiagnosticsEngine & getDiags() const
const TargetInfo & getTarget() const
const llvm::DataLayout & getDataLayout() const
const llvm::Triple & getTriple() const
const CodeGenOptions & getCodeGenOpts() const
llvm::LLVMContext & getLLVMContext()
This class organizes the cross-module state that is used while lowering AST types to LLVM types.
Definition: CodeGenTypes.h:54
bool isLongDoubleReferenced() const
Definition: CodeGenTypes.h:312
DefaultABIInfo - The default implementation for ABI specific details.
Definition: ABIInfoImpl.h:21
ABIArgInfo classifyArgumentType(QualType RetTy) const
Definition: ABIInfoImpl.cpp:17
RValue EmitVAArg(CodeGenFunction &CGF, Address VAListAddr, QualType Ty, AggValueSlot Slot) const override
EmitVAArg - Emit the target dependent code to load a value of.
Definition: ABIInfoImpl.cpp:75
ABIArgInfo classifyReturnType(QualType RetTy) const
Definition: ABIInfoImpl.cpp:46
void computeInfo(CGFunctionInfo &FI) const override
Definition: ABIInfoImpl.cpp:68
RValue - This trivial value class is used to represent the result of an expression that is evaluated.
Definition: CGValue.h:42
static RValue getAggregate(Address addr, bool isVolatile=false)
Convert an Address to an RValue.
Definition: CGValue.h:125
static RValue getComplex(llvm::Value *V1, llvm::Value *V2)
Definition: CGValue.h:108
TargetCodeGenInfo - This class organizes various target-specific codegeneration issues,...
Definition: TargetInfo.h:47
virtual bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, llvm::Value *Address) const
Initializes the given DWARF EH register-size table, a char*.
Definition: TargetInfo.h:150
virtual void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV, CodeGen::CodeGenModule &M) const
setTargetAttributes - Provides a convenient hook to handle extra target-specific attributes for the g...
Definition: TargetInfo.h:76
virtual int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const
Determines the DWARF register number for the stack pointer, for exception-handling purposes.
Definition: TargetInfo.h:142
virtual void emitTargetMetadata(CodeGen::CodeGenModule &CGM, const llvm::MapVector< GlobalDecl, StringRef > &MangledDeclNames) const
emitTargetMetadata - Provides a convenient hook to handle extra target-specific metadata for the give...
Definition: TargetInfo.h:81
Complex values, per C99 6.2.5p11.
Definition: Type.h:3145
QualType getElementType() const
Definition: Type.h:3155
Decl - This represents one declaration (or definition), e.g.
Definition: DeclBase.h:86
ASTContext & getASTContext() const LLVM_READONLY
Definition: DeclBase.cpp:520
SourceLocation getLocation() const
Definition: DeclBase.h:442
bool hasAttr() const
Definition: DeclBase.h:580
DiagnosticBuilder Report(SourceLocation Loc, unsigned DiagID)
Issue the message to the client.
Definition: Diagnostic.h:1493
A helper class that allows the use of isa/cast/dyncast to detect TagType objects of enums.
Definition: Type.h:6098
A (possibly-)qualified type.
Definition: Type.h:929
Represents a struct/union/class.
Definition: Decl.h:4148
bool hasFlexibleArrayMember() const
Definition: Decl.h:4181
A helper class that allows the use of isa/cast/dyncast to detect TagType objects of structs/unions/cl...
Definition: Type.h:6072
const llvm::fltSemantics & getLongDoubleFormat() const
Definition: TargetInfo.h:788
The base class of the type hierarchy.
Definition: Type.h:1828
bool isVoidType() const
Definition: Type.h:8510
bool isIntegerType() const
isIntegerType() does not include complex integers (a GCC extension).
Definition: Type.h:8550
bool isAnyComplexType() const
Definition: Type.h:8294
bool isIncompleteType(NamedDecl **Def=nullptr) const
Types are partitioned into 3 broad categories (C99 6.2.5p1): object types, function types,...
Definition: Type.cpp:2396
bool isVectorType() const
Definition: Type.h:8298
bool isRealFloatingType() const
Floating point categories.
Definition: Type.cpp:2300
bool isFloatingType() const
Definition: Type.cpp:2283
const T * getAs() const
Member-template getAs<specific type>'.
Definition: Type.h:8731
bool isRecordType() const
Definition: Type.h:8286
@ TLS_None
Not a TLS variable.
Definition: Decl.h:902
Represents a GCC generic vector type.
Definition: Type.h:4034
ABIArgInfo classifyArgumentType(CodeGenModule &CGM, CanQualType type)
Classify the rules for how to pass a particular type.
CGCXXABI::RecordArgABI getRecordArgABI(const RecordType *RT, CGCXXABI &CXXABI)
bool classifyReturnType(const CGCXXABI &CXXABI, CGFunctionInfo &FI, const ABIInfo &Info)
std::unique_ptr< TargetCodeGenInfo > createPPC64_SVR4_TargetCodeGenInfo(CodeGenModule &CGM, PPC64_SVR4_ABIKind Kind, bool SoftFloatABI)
Definition: PPC.cpp:1048
Address emitVoidPtrDirectVAArg(CodeGenFunction &CGF, Address VAListAddr, llvm::Type *DirectTy, CharUnits DirectSize, CharUnits DirectAlign, CharUnits SlotSize, bool AllowHigherAlign, bool ForceRightAdjust=false)
Emit va_arg for a platform using the common void* representation, where arguments are simply emitted ...
std::unique_ptr< TargetCodeGenInfo > createAIXTargetCodeGenInfo(CodeGenModule &CGM, bool Is64Bit)
Definition: PPC.cpp:1031
bool isRecordWithSIMDVectorType(ASTContext &Context, QualType Ty)
RValue emitVoidPtrVAArg(CodeGenFunction &CGF, Address VAListAddr, QualType ValueTy, bool IsIndirect, TypeInfoChars ValueInfo, CharUnits SlotSizeAndAlign, bool AllowHigherAlign, AggValueSlot Slot, bool ForceRightAdjust=false)
Emit va_arg for a platform using the common void* representation, where arguments are simply emitted ...
Address emitMergePHI(CodeGenFunction &CGF, Address Addr1, llvm::BasicBlock *Block1, Address Addr2, llvm::BasicBlock *Block2, const llvm::Twine &Name="")
llvm::Value * emitRoundPointerUpToAlignment(CodeGenFunction &CGF, llvm::Value *Ptr, CharUnits Align)
bool isAggregateTypeForABI(QualType T)
Definition: ABIInfoImpl.cpp:94
const Type * isSingleElementStruct(QualType T, ASTContext &Context)
isSingleElementStruct - Determine if a structure is a "single element struct", i.e.
void AssignToArrayRange(CodeGen::CGBuilderTy &Builder, llvm::Value *Array, llvm::Value *Value, unsigned FirstIndex, unsigned LastIndex)
Definition: ABIInfoImpl.cpp:83
QualType useFirstFieldIfTransparentUnion(QualType Ty)
Pass transparent unions as if they were the type of the first element.
std::unique_ptr< TargetCodeGenInfo > createPPC32TargetCodeGenInfo(CodeGenModule &CGM, bool SoftFloatABI)
Definition: PPC.cpp:1036
std::unique_ptr< TargetCodeGenInfo > createPPC64TargetCodeGenInfo(CodeGenModule &CGM)
Definition: PPC.cpp:1044
The JSON file list parser is used to communicate input to InstallAPI.
const FunctionProtoType * T
unsigned long uint64_t
unsigned int uint32_t
llvm::IntegerType * Int8Ty
i8, i16, i32, and i64
uint64_t Width
Definition: ASTContext.h:159
unsigned Align
Definition: ASTContext.h:160