clang 19.0.0git
Mips.cpp
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1//===- Mips.cpp -----------------------------------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#include "ABIInfoImpl.h"
10#include "TargetInfo.h"
11
12using namespace clang;
13using namespace clang::CodeGen;
14
15//===----------------------------------------------------------------------===//
16// MIPS ABI Implementation. This works for both little-endian and
17// big-endian variants.
18//===----------------------------------------------------------------------===//
19
20namespace {
21class MipsABIInfo : public ABIInfo {
22 bool IsO32;
23 const unsigned MinABIStackAlignInBytes, StackAlignInBytes;
24 void CoerceToIntArgs(uint64_t TySize,
25 SmallVectorImpl<llvm::Type *> &ArgList) const;
26 llvm::Type* HandleAggregates(QualType Ty, uint64_t TySize) const;
27 llvm::Type* returnAggregateInRegs(QualType RetTy, uint64_t Size) const;
28 llvm::Type* getPaddingType(uint64_t Align, uint64_t Offset) const;
29public:
30 MipsABIInfo(CodeGenTypes &CGT, bool _IsO32) :
31 ABIInfo(CGT), IsO32(_IsO32), MinABIStackAlignInBytes(IsO32 ? 4 : 8),
32 StackAlignInBytes(IsO32 ? 8 : 16) {}
33
35 ABIArgInfo classifyArgumentType(QualType RetTy, uint64_t &Offset) const;
36 void computeInfo(CGFunctionInfo &FI) const override;
37 RValue EmitVAArg(CodeGenFunction &CGF, Address VAListAddr, QualType Ty,
38 AggValueSlot Slot) const override;
39 ABIArgInfo extendType(QualType Ty) const;
40};
41
42class MIPSTargetCodeGenInfo : public TargetCodeGenInfo {
43 unsigned SizeOfUnwindException;
44public:
45 MIPSTargetCodeGenInfo(CodeGenTypes &CGT, bool IsO32)
46 : TargetCodeGenInfo(std::make_unique<MipsABIInfo>(CGT, IsO32)),
47 SizeOfUnwindException(IsO32 ? 24 : 32) {}
48
49 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const override {
50 return 29;
51 }
52
53 void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
54 CodeGen::CodeGenModule &CGM) const override {
55 const FunctionDecl *FD = dyn_cast_or_null<FunctionDecl>(D);
56 if (!FD) return;
57 llvm::Function *Fn = cast<llvm::Function>(GV);
58
59 if (FD->hasAttr<MipsLongCallAttr>())
60 Fn->addFnAttr("long-call");
61 else if (FD->hasAttr<MipsShortCallAttr>())
62 Fn->addFnAttr("short-call");
63
64 // Other attributes do not have a meaning for declarations.
65 if (GV->isDeclaration())
66 return;
67
68 if (FD->hasAttr<Mips16Attr>()) {
69 Fn->addFnAttr("mips16");
70 }
71 else if (FD->hasAttr<NoMips16Attr>()) {
72 Fn->addFnAttr("nomips16");
73 }
74
75 if (FD->hasAttr<MicroMipsAttr>())
76 Fn->addFnAttr("micromips");
77 else if (FD->hasAttr<NoMicroMipsAttr>())
78 Fn->addFnAttr("nomicromips");
79
80 const MipsInterruptAttr *Attr = FD->getAttr<MipsInterruptAttr>();
81 if (!Attr)
82 return;
83
84 const char *Kind;
85 switch (Attr->getInterrupt()) {
86 case MipsInterruptAttr::eic: Kind = "eic"; break;
87 case MipsInterruptAttr::sw0: Kind = "sw0"; break;
88 case MipsInterruptAttr::sw1: Kind = "sw1"; break;
89 case MipsInterruptAttr::hw0: Kind = "hw0"; break;
90 case MipsInterruptAttr::hw1: Kind = "hw1"; break;
91 case MipsInterruptAttr::hw2: Kind = "hw2"; break;
92 case MipsInterruptAttr::hw3: Kind = "hw3"; break;
93 case MipsInterruptAttr::hw4: Kind = "hw4"; break;
94 case MipsInterruptAttr::hw5: Kind = "hw5"; break;
95 }
96
97 Fn->addFnAttr("interrupt", Kind);
98
99 }
100
102 llvm::Value *Address) const override;
103
104 unsigned getSizeOfUnwindException() const override {
105 return SizeOfUnwindException;
106 }
107};
108}
109
110void MipsABIInfo::CoerceToIntArgs(
111 uint64_t TySize, SmallVectorImpl<llvm::Type *> &ArgList) const {
112 llvm::IntegerType *IntTy =
113 llvm::IntegerType::get(getVMContext(), MinABIStackAlignInBytes * 8);
114
115 // Add (TySize / MinABIStackAlignInBytes) args of IntTy.
116 for (unsigned N = TySize / (MinABIStackAlignInBytes * 8); N; --N)
117 ArgList.push_back(IntTy);
118
119 // If necessary, add one more integer type to ArgList.
120 unsigned R = TySize % (MinABIStackAlignInBytes * 8);
121
122 if (R)
123 ArgList.push_back(llvm::IntegerType::get(getVMContext(), R));
124}
125
126// In N32/64, an aligned double precision floating point field is passed in
127// a register.
128llvm::Type* MipsABIInfo::HandleAggregates(QualType Ty, uint64_t TySize) const {
129 SmallVector<llvm::Type*, 8> ArgList, IntArgList;
130
131 if (IsO32) {
132 CoerceToIntArgs(TySize, ArgList);
133 return llvm::StructType::get(getVMContext(), ArgList);
134 }
135
136 if (Ty->isComplexType())
137 return CGT.ConvertType(Ty);
138
139 const RecordType *RT = Ty->getAs<RecordType>();
140
141 // Unions/vectors are passed in integer registers.
142 if (!RT || !RT->isStructureOrClassType()) {
143 CoerceToIntArgs(TySize, ArgList);
144 return llvm::StructType::get(getVMContext(), ArgList);
145 }
146
147 const RecordDecl *RD = RT->getDecl();
148 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD);
149 assert(!(TySize % 8) && "Size of structure must be multiple of 8.");
150
151 uint64_t LastOffset = 0;
152 unsigned idx = 0;
153 llvm::IntegerType *I64 = llvm::IntegerType::get(getVMContext(), 64);
154
155 // Iterate over fields in the struct/class and check if there are any aligned
156 // double fields.
157 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
158 i != e; ++i, ++idx) {
159 const QualType Ty = i->getType();
160 const BuiltinType *BT = Ty->getAs<BuiltinType>();
161
162 if (!BT || BT->getKind() != BuiltinType::Double)
163 continue;
164
165 uint64_t Offset = Layout.getFieldOffset(idx);
166 if (Offset % 64) // Ignore doubles that are not aligned.
167 continue;
168
169 // Add ((Offset - LastOffset) / 64) args of type i64.
170 for (unsigned j = (Offset - LastOffset) / 64; j > 0; --j)
171 ArgList.push_back(I64);
172
173 // Add double type.
174 ArgList.push_back(llvm::Type::getDoubleTy(getVMContext()));
175 LastOffset = Offset + 64;
176 }
177
178 CoerceToIntArgs(TySize - LastOffset, IntArgList);
179 ArgList.append(IntArgList.begin(), IntArgList.end());
180
181 return llvm::StructType::get(getVMContext(), ArgList);
182}
183
184llvm::Type *MipsABIInfo::getPaddingType(uint64_t OrigOffset,
185 uint64_t Offset) const {
186 if (OrigOffset + MinABIStackAlignInBytes > Offset)
187 return nullptr;
188
189 return llvm::IntegerType::get(getVMContext(), (Offset - OrigOffset) * 8);
190}
191
193MipsABIInfo::classifyArgumentType(QualType Ty, uint64_t &Offset) const {
195
196 uint64_t OrigOffset = Offset;
197 uint64_t TySize = getContext().getTypeSize(Ty);
198 uint64_t Align = getContext().getTypeAlign(Ty) / 8;
199
200 Align = std::clamp(Align, (uint64_t)MinABIStackAlignInBytes,
201 (uint64_t)StackAlignInBytes);
202 unsigned CurrOffset = llvm::alignTo(Offset, Align);
203 Offset = CurrOffset + llvm::alignTo(TySize, Align * 8) / 8;
204
205 if (isAggregateTypeForABI(Ty) || Ty->isVectorType()) {
206 // Ignore empty aggregates.
207 if (TySize == 0)
208 return ABIArgInfo::getIgnore();
209
210 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI())) {
211 Offset = OrigOffset + MinABIStackAlignInBytes;
212 return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory);
213 }
214
215 // If we have reached here, aggregates are passed directly by coercing to
216 // another structure type. Padding is inserted if the offset of the
217 // aggregate is unaligned.
218 ABIArgInfo ArgInfo =
219 ABIArgInfo::getDirect(HandleAggregates(Ty, TySize), 0,
220 getPaddingType(OrigOffset, CurrOffset));
221 ArgInfo.setInReg(true);
222 return ArgInfo;
223 }
224
225 // Treat an enum type as its underlying type.
226 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
227 Ty = EnumTy->getDecl()->getIntegerType();
228
229 // Make sure we pass indirectly things that are too large.
230 if (const auto *EIT = Ty->getAs<BitIntType>())
231 if (EIT->getNumBits() > 128 ||
232 (EIT->getNumBits() > 64 &&
233 !getContext().getTargetInfo().hasInt128Type()))
234 return getNaturalAlignIndirect(Ty);
235
236 // All integral types are promoted to the GPR width.
238 return extendType(Ty);
239
241 nullptr, 0, IsO32 ? nullptr : getPaddingType(OrigOffset, CurrOffset));
242}
243
244llvm::Type*
245MipsABIInfo::returnAggregateInRegs(QualType RetTy, uint64_t Size) const {
246 const RecordType *RT = RetTy->getAs<RecordType>();
248
249 if (RT && RT->isStructureOrClassType()) {
250 const RecordDecl *RD = RT->getDecl();
251 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD);
252 unsigned FieldCnt = Layout.getFieldCount();
253
254 // N32/64 returns struct/classes in floating point registers if the
255 // following conditions are met:
256 // 1. The size of the struct/class is no larger than 128-bit.
257 // 2. The struct/class has one or two fields all of which are floating
258 // point types.
259 // 3. The offset of the first field is zero (this follows what gcc does).
260 //
261 // Any other composite results are returned in integer registers.
262 //
263 if (FieldCnt && (FieldCnt <= 2) && !Layout.getFieldOffset(0)) {
265 for (; b != e; ++b) {
266 const BuiltinType *BT = b->getType()->getAs<BuiltinType>();
267
268 if (!BT || !BT->isFloatingPoint())
269 break;
270
271 RTList.push_back(CGT.ConvertType(b->getType()));
272 }
273
274 if (b == e)
275 return llvm::StructType::get(getVMContext(), RTList,
276 RD->hasAttr<PackedAttr>());
277
278 RTList.clear();
279 }
280 }
281
282 CoerceToIntArgs(Size, RTList);
283 return llvm::StructType::get(getVMContext(), RTList);
284}
285
286ABIArgInfo MipsABIInfo::classifyReturnType(QualType RetTy) const {
287 uint64_t Size = getContext().getTypeSize(RetTy);
288
289 if (RetTy->isVoidType())
290 return ABIArgInfo::getIgnore();
291
292 // O32 doesn't treat zero-sized structs differently from other structs.
293 // However, N32/N64 ignores zero sized return values.
294 if (!IsO32 && Size == 0)
295 return ABIArgInfo::getIgnore();
296
297 if (isAggregateTypeForABI(RetTy) || RetTy->isVectorType()) {
298 if (Size <= 128) {
299 if (RetTy->isAnyComplexType())
300 return ABIArgInfo::getDirect();
301
302 // O32 returns integer vectors in registers and N32/N64 returns all small
303 // aggregates in registers.
304 if (!IsO32 ||
305 (RetTy->isVectorType() && !RetTy->hasFloatingRepresentation())) {
306 ABIArgInfo ArgInfo =
307 ABIArgInfo::getDirect(returnAggregateInRegs(RetTy, Size));
308 ArgInfo.setInReg(true);
309 return ArgInfo;
310 }
311 }
312
313 return getNaturalAlignIndirect(RetTy);
314 }
315
316 // Treat an enum type as its underlying type.
317 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
318 RetTy = EnumTy->getDecl()->getIntegerType();
319
320 // Make sure we pass indirectly things that are too large.
321 if (const auto *EIT = RetTy->getAs<BitIntType>())
322 if (EIT->getNumBits() > 128 ||
323 (EIT->getNumBits() > 64 &&
324 !getContext().getTargetInfo().hasInt128Type()))
325 return getNaturalAlignIndirect(RetTy);
326
327 if (isPromotableIntegerTypeForABI(RetTy))
328 return ABIArgInfo::getExtend(RetTy);
329
331 RetTy->isSignedIntegerOrEnumerationType()) && Size == 32 && !IsO32)
332 return ABIArgInfo::getSignExtend(RetTy);
333
334 return ABIArgInfo::getDirect();
335}
336
337void MipsABIInfo::computeInfo(CGFunctionInfo &FI) const {
338 ABIArgInfo &RetInfo = FI.getReturnInfo();
339 if (!getCXXABI().classifyReturnType(FI))
340 RetInfo = classifyReturnType(FI.getReturnType());
341
342 // Check if a pointer to an aggregate is passed as a hidden argument.
343 uint64_t Offset = RetInfo.isIndirect() ? MinABIStackAlignInBytes : 0;
344
345 for (auto &I : FI.arguments())
346 I.info = classifyArgumentType(I.type, Offset);
347}
348
349RValue MipsABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
350 QualType OrigTy, AggValueSlot Slot) const {
351 QualType Ty = OrigTy;
352
353 // Integer arguments are promoted to 32-bit on O32 and 64-bit on N32/N64.
354 // Pointers are also promoted in the same way but this only matters for N32.
355 unsigned SlotSizeInBits = IsO32 ? 32 : 64;
356 unsigned PtrWidth = getTarget().getPointerWidth(LangAS::Default);
357 bool DidPromote = false;
358 if ((Ty->isIntegerType() &&
359 getContext().getIntWidth(Ty) < SlotSizeInBits) ||
360 (Ty->isPointerType() && PtrWidth < SlotSizeInBits)) {
361 DidPromote = true;
362 Ty = getContext().getIntTypeForBitwidth(SlotSizeInBits,
363 Ty->isSignedIntegerType());
364 }
365
366 auto TyInfo = getContext().getTypeInfoInChars(Ty);
367
368 // The alignment of things in the argument area is never larger than
369 // StackAlignInBytes.
370 TyInfo.Align =
371 std::min(TyInfo.Align, CharUnits::fromQuantity(StackAlignInBytes));
372
373 // MinABIStackAlignInBytes is the size of argument slots on the stack.
374 CharUnits ArgSlotSize = CharUnits::fromQuantity(MinABIStackAlignInBytes);
375
376 RValue Res = emitVoidPtrVAArg(CGF, VAListAddr, Ty, /*indirect*/ false, TyInfo,
377 ArgSlotSize, /*AllowHigherAlign*/ true, Slot);
378
379 // If there was a promotion, "unpromote".
380 // TODO: can we just use a pointer into a subset of the original slot?
381 if (DidPromote) {
382 llvm::Type *ValTy = CGF.ConvertType(OrigTy);
383 llvm::Value *Promoted = Res.getScalarVal();
384
385 // Truncate down to the right width.
386 llvm::Type *IntTy = (OrigTy->isIntegerType() ? ValTy : CGF.IntPtrTy);
387 llvm::Value *V = CGF.Builder.CreateTrunc(Promoted, IntTy);
388 if (OrigTy->isPointerType())
389 V = CGF.Builder.CreateIntToPtr(V, ValTy);
390
391 return RValue::get(V);
392 }
393
394 return Res;
395}
396
397ABIArgInfo MipsABIInfo::extendType(QualType Ty) const {
398 int TySize = getContext().getTypeSize(Ty);
399
400 // MIPS64 ABI requires unsigned 32 bit integers to be sign extended.
401 if (Ty->isUnsignedIntegerOrEnumerationType() && TySize == 32)
402 return ABIArgInfo::getSignExtend(Ty);
403
404 return ABIArgInfo::getExtend(Ty);
405}
406
407bool
408MIPSTargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
409 llvm::Value *Address) const {
410 // This information comes from gcc's implementation, which seems to
411 // as canonical as it gets.
412
413 // Everything on MIPS is 4 bytes. Double-precision FP registers
414 // are aliased to pairs of single-precision FP registers.
415 llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4);
416
417 // 0-31 are the general purpose registers, $0 - $31.
418 // 32-63 are the floating-point registers, $f0 - $f31.
419 // 64 and 65 are the multiply/divide registers, $hi and $lo.
420 // 66 is the (notional, I think) register for signal-handler return.
421 AssignToArrayRange(CGF.Builder, Address, Four8, 0, 65);
422
423 // 67-74 are the floating-point status registers, $fcc0 - $fcc7.
424 // They are one bit wide and ignored here.
425
426 // 80-111 are the coprocessor 0 registers, $c0r0 - $c0r31.
427 // (coprocessor 1 is the FP unit)
428 // 112-143 are the coprocessor 2 registers, $c2r0 - $c2r31.
429 // 144-175 are the coprocessor 3 registers, $c3r0 - $c3r31.
430 // 176-181 are the DSP accumulator registers.
431 AssignToArrayRange(CGF.Builder, Address, Four8, 80, 181);
432 return false;
433}
434
435std::unique_ptr<TargetCodeGenInfo>
437 return std::make_unique<MIPSTargetCodeGenInfo>(CGM.getTypes(), IsOS32);
438}
#define V(N, I)
Definition: ASTContext.h:3323
const Decl * D
__device__ __2f16 b
ASTRecordLayout - This class contains layout information for one RecordDecl, which is a struct/union/...
Definition: RecordLayout.h:38
unsigned getFieldCount() const
getFieldCount - Get the number of fields in the layout.
Definition: RecordLayout.h:196
uint64_t getFieldOffset(unsigned FieldNo) const
getFieldOffset - Get the offset of the given field index, in bits.
Definition: RecordLayout.h:200
Attr - This represents one attribute.
Definition: Attr.h:42
A fixed int type of a specified bitwidth.
Definition: Type.h:7627
This class is used for builtin types like 'int'.
Definition: Type.h:2997
bool isFloatingPoint() const
Definition: Type.h:3067
Kind getKind() const
Definition: Type.h:3042
CharUnits - This is an opaque type for sizes expressed in character units.
Definition: CharUnits.h:38
static CharUnits fromQuantity(QuantityType Quantity)
fromQuantity - Construct a CharUnits quantity from a raw integer type.
Definition: CharUnits.h:63
ABIArgInfo - Helper class to encapsulate information about how a specific C type should be passed to ...
static ABIArgInfo getIgnore()
static ABIArgInfo getDirect(llvm::Type *T=nullptr, unsigned Offset=0, llvm::Type *Padding=nullptr, bool CanBeFlattened=true, unsigned Align=0)
static ABIArgInfo getExtend(QualType Ty, llvm::Type *T=nullptr)
static ABIArgInfo getSignExtend(QualType Ty, llvm::Type *T=nullptr)
ABIInfo - Target specific hooks for defining how a type should be passed or returned from functions.
Definition: ABIInfo.h:47
virtual RValue EmitVAArg(CodeGen::CodeGenFunction &CGF, CodeGen::Address VAListAddr, QualType Ty, AggValueSlot Slot) const =0
EmitVAArg - Emit the target dependent code to load a value of.
virtual void computeInfo(CodeGen::CGFunctionInfo &FI) const =0
Like RawAddress, an abstract representation of an aligned address, but the pointer contained in this ...
Definition: Address.h:111
An aggregate value slot.
Definition: CGValue.h:509
RecordArgABI
Specify how one should pass an argument of a record type.
Definition: CGCXXABI.h:150
@ RAA_DirectInMemory
Pass it on the stack using its defined layout.
Definition: CGCXXABI.h:158
CGFunctionInfo - Class to encapsulate the information about a function definition.
CanQualType getReturnType() const
MutableArrayRef< ArgInfo > arguments()
CodeGenFunction - This class organizes the per-function state that is used while generating LLVM code...
llvm::Type * ConvertType(QualType T)
This class organizes the cross-function state that is used while generating LLVM code.
This class organizes the cross-module state that is used while lowering AST types to LLVM types.
Definition: CodeGenTypes.h:54
RValue - This trivial value class is used to represent the result of an expression that is evaluated.
Definition: CGValue.h:41
static RValue get(llvm::Value *V)
Definition: CGValue.h:97
llvm::Value * getScalarVal() const
getScalarVal() - Return the Value* of this scalar value.
Definition: CGValue.h:70
TargetCodeGenInfo - This class organizes various target-specific codegeneration issues,...
Definition: TargetInfo.h:47
virtual unsigned getSizeOfUnwindException() const
Determines the size of struct _Unwind_Exception on this platform, in 8-bit units.
Definition: TargetInfo.cpp:77
virtual bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, llvm::Value *Address) const
Initializes the given DWARF EH register-size table, a char*.
Definition: TargetInfo.h:132
virtual void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV, CodeGen::CodeGenModule &M) const
setTargetAttributes - Provides a convenient hook to handle extra target-specific attributes for the g...
Definition: TargetInfo.h:76
virtual int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const
Determines the DWARF register number for the stack pointer, for exception-handling purposes.
Definition: TargetInfo.h:124
specific_decl_iterator - Iterates over a subrange of declarations stored in a DeclContext,...
Definition: DeclBase.h:2335
Decl - This represents one declaration (or definition), e.g.
Definition: DeclBase.h:86
T * getAttr() const
Definition: DeclBase.h:579
bool hasAttr() const
Definition: DeclBase.h:583
A helper class that allows the use of isa/cast/dyncast to detect TagType objects of enums.
Definition: Type.h:5963
Represents a function declaration or definition.
Definition: Decl.h:1971
A (possibly-)qualified type.
Definition: Type.h:942
Represents a struct/union/class.
Definition: Decl.h:4180
field_iterator field_end() const
Definition: Decl.h:4389
field_iterator field_begin() const
Definition: Decl.cpp:5057
A helper class that allows the use of isa/cast/dyncast to detect TagType objects of structs/unions/cl...
Definition: Type.h:5937
RecordDecl * getDecl() const
Definition: Type.h:5947
bool isVoidType() const
Definition: Type.h:8296
bool isSignedIntegerOrEnumerationType() const
Determines whether this is an integer type that is signed or an enumeration types whose underlying ty...
Definition: Type.cpp:2166
bool isSignedIntegerType() const
Return true if this is an integer type that is signed, according to C99 6.2.5p4 [char,...
Definition: Type.cpp:2145
bool isComplexType() const
isComplexType() does not include complex integers (a GCC extension).
Definition: Type.cpp:677
bool isUnsignedIntegerOrEnumerationType() const
Determines whether this is an integer type that is unsigned or an enumeration types whose underlying ...
Definition: Type.cpp:2216
bool isPointerType() const
Definition: Type.h:7997
bool isIntegerType() const
isIntegerType() does not include complex integers (a GCC extension).
Definition: Type.h:8336
bool isIntegralOrEnumerationType() const
Determine whether this type is an integral or enumeration type.
Definition: Type.h:8411
bool isAnyComplexType() const
Definition: Type.h:8101
bool hasFloatingRepresentation() const
Determine whether this type has a floating-point representation of some sort, e.g....
Definition: Type.cpp:2257
bool isStructureOrClassType() const
Definition: Type.cpp:657
bool isVectorType() const
Definition: Type.h:8105
const T * getAs() const
Member-template getAs<specific type>'.
Definition: Type.h:8517
ABIArgInfo classifyArgumentType(CodeGenModule &CGM, CanQualType type)
Classify the rules for how to pass a particular type.
CGCXXABI::RecordArgABI getRecordArgABI(const RecordType *RT, CGCXXABI &CXXABI)
bool classifyReturnType(const CGCXXABI &CXXABI, CGFunctionInfo &FI, const ABIInfo &Info)
std::unique_ptr< TargetCodeGenInfo > createMIPSTargetCodeGenInfo(CodeGenModule &CGM, bool IsOS32)
Definition: Mips.cpp:436
RValue emitVoidPtrVAArg(CodeGenFunction &CGF, Address VAListAddr, QualType ValueTy, bool IsIndirect, TypeInfoChars ValueInfo, CharUnits SlotSizeAndAlign, bool AllowHigherAlign, AggValueSlot Slot, bool ForceRightAdjust=false)
Emit va_arg for a platform using the common void* representation, where arguments are simply emitted ...
bool isAggregateTypeForABI(QualType T)
void AssignToArrayRange(CodeGen::CGBuilderTy &Builder, llvm::Value *Array, llvm::Value *Value, unsigned FirstIndex, unsigned LastIndex)
Definition: ABIInfoImpl.cpp:92
QualType useFirstFieldIfTransparentUnion(QualType Ty)
Pass transparent unions as if they were the type of the first element.
The JSON file list parser is used to communicate input to InstallAPI.
unsigned long uint64_t
llvm::IntegerType * Int8Ty
i8, i16, i32, and i64