clang 19.0.0git
NVPTX.cpp
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1//===--- NVPTX.cpp - Implement NVPTX target feature support ---------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements NVPTX TargetInfo objects.
10//
11//===----------------------------------------------------------------------===//
12
13#include "NVPTX.h"
14#include "Targets.h"
18#include "llvm/ADT/StringSwitch.h"
19
20using namespace clang;
21using namespace clang::targets;
22
23static constexpr Builtin::Info BuiltinInfo[] = {
24#define BUILTIN(ID, TYPE, ATTRS) \
25 {#ID, TYPE, ATTRS, nullptr, HeaderDesc::NO_HEADER, ALL_LANGUAGES},
26#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) \
27 {#ID, TYPE, ATTRS, nullptr, HeaderDesc::HEADER, ALL_LANGUAGES},
28#define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) \
29 {#ID, TYPE, ATTRS, FEATURE, HeaderDesc::NO_HEADER, ALL_LANGUAGES},
30#include "clang/Basic/BuiltinsNVPTX.def"
31};
32
33const char *const NVPTXTargetInfo::GCCRegNames[] = {"r0"};
34
35NVPTXTargetInfo::NVPTXTargetInfo(const llvm::Triple &Triple,
36 const TargetOptions &Opts,
37 unsigned TargetPointerWidth)
38 : TargetInfo(Triple) {
39 assert((TargetPointerWidth == 32 || TargetPointerWidth == 64) &&
40 "NVPTX only supports 32- and 64-bit modes.");
41
42 PTXVersion = 32;
43 for (const StringRef Feature : Opts.FeaturesAsWritten) {
44 int PTXV;
45 if (!Feature.starts_with("+ptx") ||
46 Feature.drop_front(4).getAsInteger(10, PTXV))
47 continue;
48 PTXVersion = PTXV; // TODO: should it be max(PTXVersion, PTXV)?
49 }
50
51 TLSSupported = false;
52 VLASupported = false;
55 // __bf16 is always available as a load/store only type.
57 BFloat16Format = &llvm::APFloat::BFloat();
58
59 // Define available target features
60 // These must be defined in sorted order!
61 NoAsmVariants = true;
62 GPU = CudaArch::UNUSED;
63
64 // PTX supports f16 as a fundamental type.
65 HasLegalHalfType = true;
66 HasFloat16 = true;
67
68 if (TargetPointerWidth == 32)
69 resetDataLayout("e-p:32:32-i64:64-i128:128-v16:16-v32:32-n16:32:64");
70 else if (Opts.NVPTXUseShortPointers)
72 "e-p3:32:32-p4:32:32-p5:32:32-i64:64-i128:128-v16:16-v32:32-n16:32:64");
73 else
74 resetDataLayout("e-i64:64-i128:128-v16:16-v32:32-n16:32:64");
75
76 // If possible, get a TargetInfo for our host triple, so we can match its
77 // types.
78 llvm::Triple HostTriple(Opts.HostTriple);
79 if (!HostTriple.isNVPTX())
80 HostTarget = AllocateTarget(llvm::Triple(Opts.HostTriple), Opts);
81
82 // If no host target, make some guesses about the data layout and return.
83 if (!HostTarget) {
84 LongWidth = LongAlign = TargetPointerWidth;
85 PointerWidth = PointerAlign = TargetPointerWidth;
86 switch (TargetPointerWidth) {
87 case 32:
91 break;
92 case 64:
96 break;
97 default:
98 llvm_unreachable("TargetPointerWidth must be 32 or 64");
99 }
100
101 MaxAtomicInlineWidth = TargetPointerWidth;
102 return;
103 }
104
105 // Copy properties from host target.
106 PointerWidth = HostTarget->getPointerWidth(LangAS::Default);
107 PointerAlign = HostTarget->getPointerAlign(LangAS::Default);
108 BoolWidth = HostTarget->getBoolWidth();
109 BoolAlign = HostTarget->getBoolAlign();
110 IntWidth = HostTarget->getIntWidth();
111 IntAlign = HostTarget->getIntAlign();
112 HalfWidth = HostTarget->getHalfWidth();
113 HalfAlign = HostTarget->getHalfAlign();
114 FloatWidth = HostTarget->getFloatWidth();
115 FloatAlign = HostTarget->getFloatAlign();
116 DoubleWidth = HostTarget->getDoubleWidth();
117 DoubleAlign = HostTarget->getDoubleAlign();
118 LongWidth = HostTarget->getLongWidth();
119 LongAlign = HostTarget->getLongAlign();
120 LongLongWidth = HostTarget->getLongLongWidth();
121 LongLongAlign = HostTarget->getLongLongAlign();
122 MinGlobalAlign = HostTarget->getMinGlobalAlign(/* TypeSize = */ 0,
123 /* HasNonWeakDef = */ true);
124 NewAlign = HostTarget->getNewAlign();
126 HostTarget->getDefaultAlignForAttributeAligned();
127 SizeType = HostTarget->getSizeType();
128 IntMaxType = HostTarget->getIntMaxType();
129 PtrDiffType = HostTarget->getPtrDiffType(LangAS::Default);
130 IntPtrType = HostTarget->getIntPtrType();
131 WCharType = HostTarget->getWCharType();
132 WIntType = HostTarget->getWIntType();
133 Char16Type = HostTarget->getChar16Type();
134 Char32Type = HostTarget->getChar32Type();
135 Int64Type = HostTarget->getInt64Type();
136 SigAtomicType = HostTarget->getSigAtomicType();
137 ProcessIDType = HostTarget->getProcessIDType();
138
139 UseBitFieldTypeAlignment = HostTarget->useBitFieldTypeAlignment();
140 UseZeroLengthBitfieldAlignment = HostTarget->useZeroLengthBitfieldAlignment();
141 UseExplicitBitFieldAlignment = HostTarget->useExplicitBitFieldAlignment();
142 ZeroLengthBitfieldBoundary = HostTarget->getZeroLengthBitfieldBoundary();
143
144 // This is a bit of a lie, but it controls __GCC_ATOMIC_XXX_LOCK_FREE, and
145 // we need those macros to be identical on host and device, because (among
146 // other things) they affect which standard library classes are defined, and
147 // we need all classes to be defined on both the host and device.
148 MaxAtomicInlineWidth = HostTarget->getMaxAtomicInlineWidth();
149
150 // Properties intentionally not copied from host:
151 // - LargeArrayMinWidth, LargeArrayAlign: Not visible across the
152 // host/device boundary.
153 // - SuitableAlign: Not visible across the host/device boundary, and may
154 // correctly be different on host/device, e.g. if host has wider vector
155 // types than device.
156 // - LongDoubleWidth, LongDoubleAlign: nvptx's long double type is the same
157 // as its double type, but that's not necessarily true on the host.
158 // TODO: nvcc emits a warning when using long double on device; we should
159 // do the same.
160}
161
163 return llvm::ArrayRef(GCCRegNames);
164}
165
166bool NVPTXTargetInfo::hasFeature(StringRef Feature) const {
167 return llvm::StringSwitch<bool>(Feature)
168 .Cases("ptx", "nvptx", true)
169 .Default(false);
170}
171
173 MacroBuilder &Builder) const {
174 Builder.defineMacro("__PTX__");
175 Builder.defineMacro("__NVPTX__");
176
177 // Skip setting architecture dependent macros if undefined.
178 if (GPU == CudaArch::UNUSED && !HostTarget)
179 return;
180
181 if (Opts.CUDAIsDevice || Opts.OpenMPIsTargetDevice || !HostTarget) {
182 // Set __CUDA_ARCH__ for the GPU specified.
183 std::string CUDAArchCode = [this] {
184 switch (GPU) {
185 case CudaArch::GFX600:
186 case CudaArch::GFX601:
187 case CudaArch::GFX602:
188 case CudaArch::GFX700:
189 case CudaArch::GFX701:
190 case CudaArch::GFX702:
191 case CudaArch::GFX703:
192 case CudaArch::GFX704:
193 case CudaArch::GFX705:
194 case CudaArch::GFX801:
195 case CudaArch::GFX802:
196 case CudaArch::GFX803:
197 case CudaArch::GFX805:
198 case CudaArch::GFX810:
199 case CudaArch::GFX900:
200 case CudaArch::GFX902:
201 case CudaArch::GFX904:
202 case CudaArch::GFX906:
203 case CudaArch::GFX908:
204 case CudaArch::GFX909:
205 case CudaArch::GFX90a:
206 case CudaArch::GFX90c:
207 case CudaArch::GFX940:
208 case CudaArch::GFX941:
209 case CudaArch::GFX942:
230 case CudaArch::LAST:
231 break;
233 assert(false && "No GPU arch when compiling CUDA device code.");
234 return "";
235 case CudaArch::UNUSED:
236 case CudaArch::SM_20:
237 return "200";
238 case CudaArch::SM_21:
239 return "210";
240 case CudaArch::SM_30:
241 return "300";
242 case CudaArch::SM_32_:
243 return "320";
244 case CudaArch::SM_35:
245 return "350";
246 case CudaArch::SM_37:
247 return "370";
248 case CudaArch::SM_50:
249 return "500";
250 case CudaArch::SM_52:
251 return "520";
252 case CudaArch::SM_53:
253 return "530";
254 case CudaArch::SM_60:
255 return "600";
256 case CudaArch::SM_61:
257 return "610";
258 case CudaArch::SM_62:
259 return "620";
260 case CudaArch::SM_70:
261 return "700";
262 case CudaArch::SM_72:
263 return "720";
264 case CudaArch::SM_75:
265 return "750";
266 case CudaArch::SM_80:
267 return "800";
268 case CudaArch::SM_86:
269 return "860";
270 case CudaArch::SM_87:
271 return "870";
272 case CudaArch::SM_89:
273 return "890";
274 case CudaArch::SM_90:
275 case CudaArch::SM_90a:
276 return "900";
277 }
278 llvm_unreachable("unhandled CudaArch");
279 }();
280 Builder.defineMacro("__CUDA_ARCH__", CUDAArchCode);
281 if (GPU == CudaArch::SM_90a)
282 Builder.defineMacro("__CUDA_ARCH_FEAT_SM90_ALL", "1");
283 }
284}
285
289}
static constexpr Builtin::Info BuiltinInfo[]
Definition: NVPTX.cpp:23
static constexpr Builtin::Info BuiltinInfo[]
Definition: Builtins.cpp:32
Defines enum values for all the target-independent builtin functions.
Defines the clang::MacroBuilder utility class.
Enumerates target-specific builtins in their own namespaces within namespace clang.
Keeps track of the various options that can be enabled, which controls the dialect of C or C++ that i...
Definition: LangOptions.h:461
Exposes information about the current target.
Definition: TargetInfo.h:218
const LangASMap * AddrSpaceMap
Definition: TargetInfo.h:248
void resetDataLayout(StringRef DL, const char *UserLabelPrefix="")
Definition: TargetInfo.cpp:190
bool UseAddrSpaceMapMangling
Specify if mangling based on address space map should be used or not for language specific address sp...
Definition: TargetInfo.h:368
unsigned char MaxAtomicInlineWidth
Definition: TargetInfo.h:242
Options for controlling the target.
Definition: TargetOptions.h:26
std::string HostTriple
When compiling for the device side, contains the triple used to compile for the host.
Definition: TargetOptions.h:33
std::vector< std::string > FeaturesAsWritten
The list of target specific features to enable or disable, as written on the command line.
Definition: TargetOptions.h:54
bool NVPTXUseShortPointers
If enabled, use 32-bit pointers for accessing const/local/shared address space.
Definition: TargetOptions.h:76
NVPTXTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts, unsigned TargetPointerWidth)
Definition: NVPTX.cpp:35
void getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const override
===-— Other target property query methods -----------------------—===//
Definition: NVPTX.cpp:172
ArrayRef< Builtin::Info > getTargetBuiltins() const override
Return information about target-specific builtins for the current primary target, and info about whic...
Definition: NVPTX.cpp:286
bool hasFeature(StringRef Feature) const override
Determine whether the given target has the given feature.
Definition: NVPTX.cpp:166
ArrayRef< const char * > getGCCRegNames() const override
Definition: NVPTX.cpp:162
static const unsigned NVPTXAddrSpaceMap[]
Definition: NVPTX.h:26
std::unique_ptr< TargetInfo > AllocateTarget(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: Targets.cpp:112
The JSON file list parser is used to communicate input to InstallAPI.
unsigned UseZeroLengthBitfieldAlignment
Whether zero length bitfields (e.g., int : 0;) force alignment of the next bitfield.
Definition: TargetInfo.h:183
unsigned UseExplicitBitFieldAlignment
Whether explicit bit field alignment attributes are honored.
Definition: TargetInfo.h:192
unsigned ZeroLengthBitfieldBoundary
If non-zero, specifies a fixed alignment value for bitfields that follow zero length bitfield,...
Definition: TargetInfo.h:196
unsigned UseBitFieldTypeAlignment
Control whether the alignment of bit-field types is respected when laying out structures.
Definition: TargetInfo.h:174
const llvm::fltSemantics * BFloat16Format
Definition: TargetInfo.h:138
unsigned char DefaultAlignForAttributeAligned
Definition: TargetInfo.h:130