clang 19.0.0git
Functions
CGAtomic.cpp File Reference
#include "CGCall.h"
#include "CGRecordLayout.h"
#include "CodeGenFunction.h"
#include "CodeGenModule.h"
#include "TargetInfo.h"
#include "clang/AST/ASTContext.h"
#include "clang/CodeGen/CGFunctionInfo.h"
#include "clang/Frontend/FrontendDiagnostic.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/IR/Intrinsics.h"
#include "llvm/IR/Operator.h"

Go to the source code of this file.

Functions

static RValue emitAtomicLibcall (CodeGenFunction &CGF, StringRef fnName, QualType resultType, CallArgList &args)
 
static bool isFullSizeType (CodeGenModule &CGM, llvm::Type *type, uint64_t expectedSize)
 Does a store of the given IR type modify the full expected width?
 
static void emitAtomicCmpXchg (CodeGenFunction &CGF, AtomicExpr *E, bool IsWeak, Address Dest, Address Ptr, Address Val1, Address Val2, uint64_t Size, llvm::AtomicOrdering SuccessOrder, llvm::AtomicOrdering FailureOrder, llvm::SyncScope::ID Scope)
 
static void emitAtomicCmpXchgFailureSet (CodeGenFunction &CGF, AtomicExpr *E, bool IsWeak, Address Dest, Address Ptr, Address Val1, Address Val2, llvm::Value *FailureOrderVal, uint64_t Size, llvm::AtomicOrdering SuccessOrder, llvm::SyncScope::ID Scope)
 Given an ordering required on success, emit all possible cmpxchg instructions to cope with the provided (but possibly only dynamically known) FailureOrder.
 
static llvm::ValueEmitPostAtomicMinMax (CGBuilderTy &Builder, AtomicExpr::AtomicOp Op, bool IsSigned, llvm::Value *OldVal, llvm::Value *RHS)
 Duplicate the atomic min/max operation in conventional IR for the builtin variants that return the new rather than the original value.
 
static void EmitAtomicOp (CodeGenFunction &CGF, AtomicExpr *E, Address Dest, Address Ptr, Address Val1, Address Val2, llvm::Value *IsWeak, llvm::Value *FailureOrder, uint64_t Size, llvm::AtomicOrdering Order, llvm::SyncScope::ID Scope)
 
static Address EmitValToTemp (CodeGenFunction &CGF, Expr *E)
 
static void EmitAtomicOp (CodeGenFunction &CGF, AtomicExpr *Expr, Address Dest, Address Ptr, Address Val1, Address Val2, llvm::Value *IsWeak, llvm::Value *FailureOrder, uint64_t Size, llvm::AtomicOrdering Order, llvm::Value *Scope)
 
static void EmitAtomicUpdateValue (CodeGenFunction &CGF, AtomicInfo &Atomics, RValue OldRVal, const llvm::function_ref< RValue(RValue)> &UpdateOp, Address DesiredAddr)
 
static void EmitAtomicUpdateValue (CodeGenFunction &CGF, AtomicInfo &Atomics, RValue UpdateRVal, Address DesiredAddr)
 

Function Documentation

◆ emitAtomicCmpXchg()

static void emitAtomicCmpXchg ( CodeGenFunction CGF,
AtomicExpr E,
bool  IsWeak,
Address  Dest,
Address  Ptr,
Address  Val1,
Address  Val2,
uint64_t  Size,
llvm::AtomicOrdering  SuccessOrder,
llvm::AtomicOrdering  FailureOrder,
llvm::SyncScope::ID  Scope 
)
static

◆ emitAtomicCmpXchgFailureSet()

static void emitAtomicCmpXchgFailureSet ( CodeGenFunction CGF,
AtomicExpr E,
bool  IsWeak,
Address  Dest,
Address  Ptr,
Address  Val1,
Address  Val2,
llvm::Value FailureOrderVal,
uint64_t  Size,
llvm::AtomicOrdering  SuccessOrder,
llvm::SyncScope::ID  Scope 
)
static

Given an ordering required on success, emit all possible cmpxchg instructions to cope with the provided (but possibly only dynamically known) FailureOrder.

Definition at line 426 of file CGAtomic.cpp.

References clang::CodeGen::CodeGenFunction::Builder, clang::CodeGen::CodeGenFunction::createBasicBlock(), clang::CodeGen::CodeGenFunction::CurFn, and emitAtomicCmpXchg().

Referenced by EmitAtomicOp().

◆ emitAtomicLibcall()

static RValue emitAtomicLibcall ( CodeGenFunction CGF,
StringRef  fnName,
QualType  resultType,
CallArgList args 
)
static

◆ EmitAtomicOp() [1/2]

static void EmitAtomicOp ( CodeGenFunction CGF,
AtomicExpr E,
Address  Dest,
Address  Ptr,
Address  Val1,
Address  Val2,
llvm::Value IsWeak,
llvm::Value FailureOrder,
uint64_t  Size,
llvm::AtomicOrdering  Order,
llvm::SyncScope::ID  Scope 
)
static

◆ EmitAtomicOp() [2/2]

static void EmitAtomicOp ( CodeGenFunction CGF,
AtomicExpr Expr,
Address  Dest,
Address  Ptr,
Address  Val1,
Address  Val2,
llvm::Value IsWeak,
llvm::Value FailureOrder,
uint64_t  Size,
llvm::AtomicOrdering  Order,
llvm::Value Scope 
)
static

◆ EmitAtomicUpdateValue() [1/2]

static void EmitAtomicUpdateValue ( CodeGenFunction CGF,
AtomicInfo &  Atomics,
RValue  OldRVal,
const llvm::function_ref< RValue(RValue)> &  UpdateOp,
Address  DesiredAddr 
)
static

◆ EmitAtomicUpdateValue() [2/2]

static void EmitAtomicUpdateValue ( CodeGenFunction CGF,
AtomicInfo &  Atomics,
RValue  UpdateRVal,
Address  DesiredAddr 
)
static

◆ EmitPostAtomicMinMax()

static llvm::Value * EmitPostAtomicMinMax ( CGBuilderTy Builder,
AtomicExpr::AtomicOp  Op,
bool  IsSigned,
llvm::Value OldVal,
llvm::Value RHS 
)
static

Duplicate the atomic min/max operation in conventional IR for the builtin variants that return the new rather than the original value.

Definition at line 503 of file CGAtomic.cpp.

Referenced by EmitAtomicOp().

◆ EmitValToTemp()

static Address EmitValToTemp ( CodeGenFunction CGF,
Expr E 
)
static

◆ isFullSizeType()

static bool isFullSizeType ( CodeGenModule CGM,
llvm::Type type,
uint64_t  expectedSize 
)
static

Does a store of the given IR type modify the full expected width?

Definition at line 335 of file CGAtomic.cpp.

References clang::CodeGen::CodeGenModule::getDataLayout(), and clang::ast_matchers::type.