clang API Documentation
00001 //===--- CGRecordLayout.h - LLVM Record Layout Information ------*- C++ -*-===// 00002 // 00003 // The LLVM Compiler Infrastructure 00004 // 00005 // This file is distributed under the University of Illinois Open Source 00006 // License. See LICENSE.TXT for details. 00007 // 00008 //===----------------------------------------------------------------------===// 00009 00010 #ifndef CLANG_CODEGEN_CGRECORDLAYOUT_H 00011 #define CLANG_CODEGEN_CGRECORDLAYOUT_H 00012 00013 #include "clang/AST/CharUnits.h" 00014 #include "clang/AST/Decl.h" 00015 #include "clang/Basic/LLVM.h" 00016 #include "llvm/ADT/DenseMap.h" 00017 #include "llvm/DerivedTypes.h" 00018 00019 namespace llvm { 00020 class StructType; 00021 } 00022 00023 namespace clang { 00024 namespace CodeGen { 00025 00026 /// \brief Helper object for describing how to generate the code for access to a 00027 /// bit-field. 00028 /// 00029 /// This structure is intended to describe the "policy" of how the bit-field 00030 /// should be accessed, which may be target, language, or ABI dependent. 00031 class CGBitFieldInfo { 00032 public: 00033 /// Descriptor for a single component of a bit-field access. The entire 00034 /// bit-field is constituted of a bitwise OR of all of the individual 00035 /// components. 00036 /// 00037 /// Each component describes an accessed value, which is how the component 00038 /// should be transferred to/from memory, and a target placement, which is how 00039 /// that component fits into the constituted bit-field. The pseudo-IR for a 00040 /// load is: 00041 /// 00042 /// %0 = gep %base, 0, FieldIndex 00043 /// %1 = gep (i8*) %0, FieldByteOffset 00044 /// %2 = (i(AccessWidth) *) %1 00045 /// %3 = load %2, align AccessAlignment 00046 /// %4 = shr %3, FieldBitStart 00047 /// 00048 /// and the composed bit-field is formed as the boolean OR of all accesses, 00049 /// masked to TargetBitWidth bits and shifted to TargetBitOffset. 00050 struct AccessInfo { 00051 /// Offset of the field to load in the LLVM structure, if any. 00052 unsigned FieldIndex; 00053 00054 /// Byte offset from the field address, if any. This should generally be 00055 /// unused as the cleanest IR comes from having a well-constructed LLVM type 00056 /// with proper GEP instructions, but sometimes its use is required, for 00057 /// example if an access is intended to straddle an LLVM field boundary. 00058 CharUnits FieldByteOffset; 00059 00060 /// Bit offset in the accessed value to use. The width is implied by \see 00061 /// TargetBitWidth. 00062 unsigned FieldBitStart; 00063 00064 /// Bit width of the memory access to perform. 00065 unsigned AccessWidth; 00066 00067 /// The alignment of the memory access, or 0 if the default alignment should 00068 /// be used. 00069 // 00070 // FIXME: Remove use of 0 to encode default, instead have IRgen do the right 00071 // thing when it generates the code, if avoiding align directives is 00072 // desired. 00073 CharUnits AccessAlignment; 00074 00075 /// Offset for the target value. 00076 unsigned TargetBitOffset; 00077 00078 /// Number of bits in the access that are destined for the bit-field. 00079 unsigned TargetBitWidth; 00080 }; 00081 00082 private: 00083 /// The components to use to access the bit-field. We may need up to three 00084 /// separate components to support up to i64 bit-field access (4 + 2 + 1 byte 00085 /// accesses). 00086 // 00087 // FIXME: De-hardcode this, just allocate following the struct. 00088 AccessInfo Components[3]; 00089 00090 /// The total size of the bit-field, in bits. 00091 unsigned Size; 00092 00093 /// The number of access components to use. 00094 unsigned NumComponents; 00095 00096 /// Whether the bit-field is signed. 00097 bool IsSigned : 1; 00098 00099 public: 00100 CGBitFieldInfo(unsigned Size, unsigned NumComponents, AccessInfo *_Components, 00101 bool IsSigned) : Size(Size), NumComponents(NumComponents), 00102 IsSigned(IsSigned) { 00103 assert(NumComponents <= 3 && "invalid number of components!"); 00104 for (unsigned i = 0; i != NumComponents; ++i) 00105 Components[i] = _Components[i]; 00106 00107 // Check some invariants. 00108 unsigned AccessedSize = 0; 00109 for (unsigned i = 0, e = getNumComponents(); i != e; ++i) { 00110 const AccessInfo &AI = getComponent(i); 00111 AccessedSize += AI.TargetBitWidth; 00112 00113 // We shouldn't try to load 0 bits. 00114 assert(AI.TargetBitWidth > 0); 00115 00116 // We can't load more bits than we accessed. 00117 assert(AI.FieldBitStart + AI.TargetBitWidth <= AI.AccessWidth); 00118 00119 // We shouldn't put any bits outside the result size. 00120 assert(AI.TargetBitWidth + AI.TargetBitOffset <= Size); 00121 } 00122 00123 // Check that the total number of target bits matches the total bit-field 00124 // size. 00125 assert(AccessedSize == Size && "Total size does not match accessed size!"); 00126 } 00127 00128 public: 00129 /// \brief Check whether this bit-field access is (i.e., should be sign 00130 /// extended on loads). 00131 bool isSigned() const { return IsSigned; } 00132 00133 /// \brief Get the size of the bit-field, in bits. 00134 unsigned getSize() const { return Size; } 00135 00136 /// @name Component Access 00137 /// @{ 00138 00139 unsigned getNumComponents() const { return NumComponents; } 00140 00141 const AccessInfo &getComponent(unsigned Index) const { 00142 assert(Index < getNumComponents() && "Invalid access!"); 00143 return Components[Index]; 00144 } 00145 00146 /// @} 00147 00148 void print(raw_ostream &OS) const; 00149 void dump() const; 00150 00151 /// \brief Given a bit-field decl, build an appropriate helper object for 00152 /// accessing that field (which is expected to have the given offset and 00153 /// size). 00154 static CGBitFieldInfo MakeInfo(class CodeGenTypes &Types, const FieldDecl *FD, 00155 uint64_t FieldOffset, uint64_t FieldSize); 00156 00157 /// \brief Given a bit-field decl, build an appropriate helper object for 00158 /// accessing that field (which is expected to have the given offset and 00159 /// size). The field decl should be known to be contained within a type of at 00160 /// least the given size and with the given alignment. 00161 static CGBitFieldInfo MakeInfo(CodeGenTypes &Types, const FieldDecl *FD, 00162 uint64_t FieldOffset, uint64_t FieldSize, 00163 uint64_t ContainingTypeSizeInBits, 00164 unsigned ContainingTypeAlign); 00165 }; 00166 00167 /// CGRecordLayout - This class handles struct and union layout info while 00168 /// lowering AST types to LLVM types. 00169 /// 00170 /// These layout objects are only created on demand as IR generation requires. 00171 class CGRecordLayout { 00172 friend class CodeGenTypes; 00173 00174 CGRecordLayout(const CGRecordLayout&); // DO NOT IMPLEMENT 00175 void operator=(const CGRecordLayout&); // DO NOT IMPLEMENT 00176 00177 private: 00178 /// The LLVM type corresponding to this record layout; used when 00179 /// laying it out as a complete object. 00180 llvm::StructType *CompleteObjectType; 00181 00182 /// The LLVM type for the non-virtual part of this record layout; 00183 /// used when laying it out as a base subobject. 00184 llvm::StructType *BaseSubobjectType; 00185 00186 /// Map from (non-bit-field) struct field to the corresponding llvm struct 00187 /// type field no. This info is populated by record builder. 00188 llvm::DenseMap<const FieldDecl *, unsigned> FieldInfo; 00189 00190 /// Map from (bit-field) struct field to the corresponding llvm struct type 00191 /// field no. This info is populated by record builder. 00192 llvm::DenseMap<const FieldDecl *, CGBitFieldInfo> BitFields; 00193 00194 // FIXME: Maybe we could use a CXXBaseSpecifier as the key and use a single 00195 // map for both virtual and non virtual bases. 00196 llvm::DenseMap<const CXXRecordDecl *, unsigned> NonVirtualBases; 00197 00198 /// Map from virtual bases to their field index in the complete object. 00199 llvm::DenseMap<const CXXRecordDecl *, unsigned> CompleteObjectVirtualBases; 00200 00201 /// False if any direct or indirect subobject of this class, when 00202 /// considered as a complete object, requires a non-zero bitpattern 00203 /// when zero-initialized. 00204 bool IsZeroInitializable : 1; 00205 00206 /// False if any direct or indirect subobject of this class, when 00207 /// considered as a base subobject, requires a non-zero bitpattern 00208 /// when zero-initialized. 00209 bool IsZeroInitializableAsBase : 1; 00210 00211 public: 00212 CGRecordLayout(llvm::StructType *CompleteObjectType, 00213 llvm::StructType *BaseSubobjectType, 00214 bool IsZeroInitializable, 00215 bool IsZeroInitializableAsBase) 00216 : CompleteObjectType(CompleteObjectType), 00217 BaseSubobjectType(BaseSubobjectType), 00218 IsZeroInitializable(IsZeroInitializable), 00219 IsZeroInitializableAsBase(IsZeroInitializableAsBase) {} 00220 00221 /// \brief Return the "complete object" LLVM type associated with 00222 /// this record. 00223 llvm::StructType *getLLVMType() const { 00224 return CompleteObjectType; 00225 } 00226 00227 /// \brief Return the "base subobject" LLVM type associated with 00228 /// this record. 00229 llvm::StructType *getBaseSubobjectLLVMType() const { 00230 return BaseSubobjectType; 00231 } 00232 00233 /// \brief Check whether this struct can be C++ zero-initialized 00234 /// with a zeroinitializer. 00235 bool isZeroInitializable() const { 00236 return IsZeroInitializable; 00237 } 00238 00239 /// \brief Check whether this struct can be C++ zero-initialized 00240 /// with a zeroinitializer when considered as a base subobject. 00241 bool isZeroInitializableAsBase() const { 00242 return IsZeroInitializableAsBase; 00243 } 00244 00245 /// \brief Return llvm::StructType element number that corresponds to the 00246 /// field FD. 00247 unsigned getLLVMFieldNo(const FieldDecl *FD) const { 00248 assert(!FD->isBitField() && "Invalid call for bit-field decl!"); 00249 assert(FieldInfo.count(FD) && "Invalid field for record!"); 00250 return FieldInfo.lookup(FD); 00251 } 00252 00253 unsigned getNonVirtualBaseLLVMFieldNo(const CXXRecordDecl *RD) const { 00254 assert(NonVirtualBases.count(RD) && "Invalid non-virtual base!"); 00255 return NonVirtualBases.lookup(RD); 00256 } 00257 00258 /// \brief Return the LLVM field index corresponding to the given 00259 /// virtual base. Only valid when operating on the complete object. 00260 unsigned getVirtualBaseIndex(const CXXRecordDecl *base) const { 00261 assert(CompleteObjectVirtualBases.count(base) && "Invalid virtual base!"); 00262 return CompleteObjectVirtualBases.lookup(base); 00263 } 00264 00265 /// \brief Return the BitFieldInfo that corresponds to the field FD. 00266 const CGBitFieldInfo &getBitFieldInfo(const FieldDecl *FD) const { 00267 assert(FD->isBitField() && "Invalid call for non bit-field decl!"); 00268 llvm::DenseMap<const FieldDecl *, CGBitFieldInfo>::const_iterator 00269 it = BitFields.find(FD); 00270 assert(it != BitFields.end() && "Unable to find bitfield info"); 00271 return it->second; 00272 } 00273 00274 void print(raw_ostream &OS) const; 00275 void dump() const; 00276 }; 00277 00278 } // end namespace CodeGen 00279 } // end namespace clang 00280 00281 #endif