clang 19.0.0git
Mips.h
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1//===--- Mips.h - Declare Mips target feature support -----------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file declares Mips TargetInfo objects.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_MIPS_H
14#define LLVM_CLANG_LIB_BASIC_TARGETS_MIPS_H
15
18#include "llvm/Support/Compiler.h"
19#include "llvm/TargetParser/Triple.h"
20
21namespace clang {
22namespace targets {
23
24class LLVM_LIBRARY_VISIBILITY MipsTargetInfo : public TargetInfo {
25 void setDataLayout() {
26 StringRef Layout;
27
28 if (ABI == "o32")
29 Layout = "m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64";
30 else if (ABI == "n32")
31 Layout = "m:e-p:32:32-i8:8:32-i16:16:32-i64:64-n32:64-S128";
32 else if (ABI == "n64")
33 Layout = "m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128";
34 else
35 llvm_unreachable("Invalid ABI");
36
37 if (BigEndian)
38 resetDataLayout(("E-" + Layout).str());
39 else
40 resetDataLayout(("e-" + Layout).str());
41 }
42
43 std::string CPU;
44 bool IsMips16;
45 bool IsMicromips;
46 bool IsNan2008;
47 bool IsAbs2008;
48 bool IsSingleFloat;
49 bool IsNoABICalls;
50 bool CanUseBSDABICalls;
51 enum MipsFloatABI { HardFloat, SoftFloat } FloatABI;
52 enum DspRevEnum { NoDSP, DSP1, DSP2 } DspRev;
53 bool HasMSA;
54 bool DisableMadd4;
55 bool UseIndirectJumpHazard;
56 bool NoOddSpreg;
57
58protected:
59 enum FPModeEnum { FPXX, FP32, FP64 } FPMode;
60 std::string ABI;
61
62public:
63 MipsTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
64 : TargetInfo(Triple), IsMips16(false), IsMicromips(false),
65 IsNan2008(false), IsAbs2008(false), IsSingleFloat(false),
66 IsNoABICalls(false), CanUseBSDABICalls(false), FloatABI(HardFloat),
67 DspRev(NoDSP), HasMSA(false), DisableMadd4(false),
68 UseIndirectJumpHazard(false), FPMode(FPXX) {
69 TheCXXABI.set(TargetCXXABI::GenericMIPS);
70
71 if (Triple.isMIPS32())
72 setABI("o32");
73 else if (Triple.getEnvironment() == llvm::Triple::GNUABIN32)
74 setABI("n32");
75 else
76 setABI("n64");
77
78 CPU = ABI == "o32" ? "mips32r2" : "mips64r2";
79
80 CanUseBSDABICalls = Triple.isOSFreeBSD() ||
81 Triple.isOSOpenBSD();
82 }
83
84 bool isIEEE754_2008Default() const {
85 return CPU == "mips32r6" || CPU == "mips64r6";
86 }
87
88 bool isFP64Default() const {
89 return CPU == "mips32r6" || ABI == "n32" || ABI == "n64" || ABI == "64";
90 }
91
92 bool isNan2008() const override { return IsNan2008; }
93
94 bool processorSupportsGPR64() const;
95
96 StringRef getABI() const override { return ABI; }
97
98 bool setABI(const std::string &Name) override {
99 if (Name == "o32") {
100 setO32ABITypes();
101 ABI = Name;
102 return true;
103 }
104
105 if (Name == "n32") {
106 setN32ABITypes();
107 ABI = Name;
108 return true;
109 }
110 if (Name == "n64") {
111 setN64ABITypes();
112 ABI = Name;
113 return true;
114 }
115 return false;
116 }
117
119 Int64Type = SignedLongLong;
120 IntMaxType = Int64Type;
121 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
122 LongDoubleWidth = LongDoubleAlign = 64;
123 LongWidth = LongAlign = 32;
124 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32;
125 PointerWidth = PointerAlign = 32;
126 PtrDiffType = SignedInt;
127 SizeType = UnsignedInt;
128 SuitableAlign = 64;
129 }
130
132 LongDoubleWidth = LongDoubleAlign = 128;
133 LongDoubleFormat = &llvm::APFloat::IEEEquad();
134 if (getTriple().isOSFreeBSD()) {
135 LongDoubleWidth = LongDoubleAlign = 64;
136 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
137 }
138 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
139 SuitableAlign = 128;
140 }
141
143 setN32N64ABITypes();
144 if (getTriple().isOSOpenBSD()) {
145 Int64Type = SignedLongLong;
146 } else {
147 Int64Type = SignedLong;
148 }
149 IntMaxType = Int64Type;
150 LongWidth = LongAlign = 64;
151 PointerWidth = PointerAlign = 64;
152 PtrDiffType = SignedLong;
153 SizeType = UnsignedLong;
154 }
155
157 setN32N64ABITypes();
158 Int64Type = SignedLongLong;
159 IntMaxType = Int64Type;
160 LongWidth = LongAlign = 32;
161 PointerWidth = PointerAlign = 32;
162 PtrDiffType = SignedInt;
163 SizeType = UnsignedInt;
164 }
165
166 bool isValidCPUName(StringRef Name) const override;
167 void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
168
169 bool setCPU(const std::string &Name) override {
170 CPU = Name;
171 return isValidCPUName(Name);
172 }
173
174 const std::string &getCPU() const { return CPU; }
175 bool
176 initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags,
177 StringRef CPU,
178 const std::vector<std::string> &FeaturesVec) const override {
179 if (CPU.empty())
180 CPU = getCPU();
181 if (CPU == "octeon")
182 Features["mips64r2"] = Features["cnmips"] = true;
183 else if (CPU == "octeon+")
184 Features["mips64r2"] = Features["cnmips"] = Features["cnmipsp"] = true;
185 else
186 Features[CPU] = true;
187 return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
188 }
189
190 unsigned getISARev() const;
191
192 void getTargetDefines(const LangOptions &Opts,
193 MacroBuilder &Builder) const override;
194
195 ArrayRef<Builtin::Info> getTargetBuiltins() const override;
196
197 bool hasFeature(StringRef Feature) const override;
198
200 return TargetInfo::VoidPtrBuiltinVaList;
201 }
202
204 static const char *const GCCRegNames[] = {
205 // CPU register names
206 // Must match second column of GCCRegAliases
207 "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", "$9", "$10",
208 "$11", "$12", "$13", "$14", "$15", "$16", "$17", "$18", "$19", "$20",
209 "$21", "$22", "$23", "$24", "$25", "$26", "$27", "$28", "$29", "$30",
210 "$31",
211 // Floating point register names
212 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", "$f9",
213 "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", "$f16", "$f17", "$f18",
214 "$f19", "$f20", "$f21", "$f22", "$f23", "$f24", "$f25", "$f26", "$f27",
215 "$f28", "$f29", "$f30", "$f31",
216 // Hi/lo and condition register names
217 "hi", "lo", "", "$fcc0", "$fcc1", "$fcc2", "$fcc3", "$fcc4", "$fcc5",
218 "$fcc6", "$fcc7", "$ac1hi", "$ac1lo", "$ac2hi", "$ac2lo", "$ac3hi",
219 "$ac3lo",
220 // MSA register names
221 "$w0", "$w1", "$w2", "$w3", "$w4", "$w5", "$w6", "$w7", "$w8", "$w9",
222 "$w10", "$w11", "$w12", "$w13", "$w14", "$w15", "$w16", "$w17", "$w18",
223 "$w19", "$w20", "$w21", "$w22", "$w23", "$w24", "$w25", "$w26", "$w27",
224 "$w28", "$w29", "$w30", "$w31",
225 // MSA control register names
226 "$msair", "$msacsr", "$msaaccess", "$msasave", "$msamodify",
227 "$msarequest", "$msamap", "$msaunmap"
228 };
229 return llvm::ArrayRef(GCCRegNames);
230 }
231
232 bool validateAsmConstraint(const char *&Name,
233 TargetInfo::ConstraintInfo &Info) const override {
234 switch (*Name) {
235 default:
236 return false;
237 case 'r': // CPU registers.
238 case 'd': // Equivalent to "r" unless generating MIPS16 code.
239 case 'y': // Equivalent to "r", backward compatibility only.
240 case 'c': // $25 for indirect jumps
241 case 'l': // lo register
242 case 'x': // hilo register pair
243 Info.setAllowsRegister();
244 return true;
245 case 'f': // floating-point registers.
246 Info.setAllowsRegister();
247 return FloatABI != SoftFloat;
248 case 'I': // Signed 16-bit constant
249 case 'J': // Integer 0
250 case 'K': // Unsigned 16-bit constant
251 case 'L': // Signed 32-bit constant, lower 16-bit zeros (for lui)
252 case 'M': // Constants not loadable via lui, addiu, or ori
253 case 'N': // Constant -1 to -65535
254 case 'O': // A signed 15-bit constant
255 case 'P': // A constant between 1 go 65535
256 return true;
257 case 'R': // An address that can be used in a non-macro load or store
258 Info.setAllowsMemory();
259 return true;
260 case 'Z':
261 if (Name[1] == 'C') { // An address usable by ll, and sc.
262 Info.setAllowsMemory();
263 Name++; // Skip over 'Z'.
264 return true;
265 }
266 return false;
267 }
268 }
269
270 std::string convertConstraint(const char *&Constraint) const override {
271 std::string R;
272 switch (*Constraint) {
273 case 'Z': // Two-character constraint; add "^" hint for later parsing.
274 if (Constraint[1] == 'C') {
275 R = std::string("^") + std::string(Constraint, 2);
276 Constraint++;
277 return R;
278 }
279 break;
280 }
281 return TargetInfo::convertConstraint(Constraint);
282 }
283
284 std::string_view getClobbers() const override {
285 // In GCC, $1 is not widely used in generated code (it's used only in a few
286 // specific situations), so there is no real need for users to add it to
287 // the clobbers list if they want to use it in their inline assembly code.
288 //
289 // In LLVM, $1 is treated as a normal GPR and is always allocatable during
290 // code generation, so using it in inline assembly without adding it to the
291 // clobbers list can cause conflicts between the inline assembly code and
292 // the surrounding generated code.
293 //
294 // Another problem is that LLVM is allowed to choose $1 for inline assembly
295 // operands, which will conflict with the ".set at" assembler option (which
296 // we use only for inline assembly, in order to maintain compatibility with
297 // GCC) and will also conflict with the user's usage of $1.
298 //
299 // The easiest way to avoid these conflicts and keep $1 as an allocatable
300 // register for generated code is to automatically clobber $1 for all inline
301 // assembly code.
302 //
303 // FIXME: We should automatically clobber $1 only for inline assembly code
304 // which actually uses it. This would allow LLVM to use $1 for inline
305 // assembly operands if the user's assembly code doesn't use it.
306 return "~{$1}";
307 }
308
309 bool handleTargetFeatures(std::vector<std::string> &Features,
310 DiagnosticsEngine &Diags) override {
311 IsMips16 = false;
312 IsMicromips = false;
313 IsNan2008 = isIEEE754_2008Default();
314 IsAbs2008 = isIEEE754_2008Default();
315 IsSingleFloat = false;
316 FloatABI = HardFloat;
317 DspRev = NoDSP;
318 FPMode = isFP64Default() ? FP64 : FPXX;
319 NoOddSpreg = false;
320 bool OddSpregGiven = false;
321
322 for (const auto &Feature : Features) {
323 if (Feature == "+single-float")
324 IsSingleFloat = true;
325 else if (Feature == "+soft-float")
326 FloatABI = SoftFloat;
327 else if (Feature == "+mips16")
328 IsMips16 = true;
329 else if (Feature == "+micromips")
330 IsMicromips = true;
331 else if (Feature == "+dsp")
332 DspRev = std::max(DspRev, DSP1);
333 else if (Feature == "+dspr2")
334 DspRev = std::max(DspRev, DSP2);
335 else if (Feature == "+msa")
336 HasMSA = true;
337 else if (Feature == "+nomadd4")
338 DisableMadd4 = true;
339 else if (Feature == "+fp64")
340 FPMode = FP64;
341 else if (Feature == "-fp64")
342 FPMode = FP32;
343 else if (Feature == "+fpxx")
344 FPMode = FPXX;
345 else if (Feature == "+nan2008")
346 IsNan2008 = true;
347 else if (Feature == "-nan2008")
348 IsNan2008 = false;
349 else if (Feature == "+abs2008")
350 IsAbs2008 = true;
351 else if (Feature == "-abs2008")
352 IsAbs2008 = false;
353 else if (Feature == "+noabicalls")
354 IsNoABICalls = true;
355 else if (Feature == "+use-indirect-jump-hazard")
356 UseIndirectJumpHazard = true;
357 else if (Feature == "+nooddspreg") {
358 NoOddSpreg = true;
359 OddSpregGiven = false;
360 } else if (Feature == "-nooddspreg") {
361 NoOddSpreg = false;
362 OddSpregGiven = true;
363 }
364 }
365
366 if (FPMode == FPXX && !OddSpregGiven)
367 NoOddSpreg = true;
368
369 setDataLayout();
370
371 return true;
372 }
373
374 int getEHDataRegisterNumber(unsigned RegNo) const override {
375 if (RegNo == 0)
376 return 4;
377 if (RegNo == 1)
378 return 5;
379 return -1;
380 }
381
382 bool isCLZForZeroUndef() const override { return false; }
383
385 static const TargetInfo::GCCRegAlias O32RegAliases[] = {
386 {{"at"}, "$1"}, {{"v0"}, "$2"}, {{"v1"}, "$3"},
387 {{"a0"}, "$4"}, {{"a1"}, "$5"}, {{"a2"}, "$6"},
388 {{"a3"}, "$7"}, {{"t0"}, "$8"}, {{"t1"}, "$9"},
389 {{"t2"}, "$10"}, {{"t3"}, "$11"}, {{"t4"}, "$12"},
390 {{"t5"}, "$13"}, {{"t6"}, "$14"}, {{"t7"}, "$15"},
391 {{"s0"}, "$16"}, {{"s1"}, "$17"}, {{"s2"}, "$18"},
392 {{"s3"}, "$19"}, {{"s4"}, "$20"}, {{"s5"}, "$21"},
393 {{"s6"}, "$22"}, {{"s7"}, "$23"}, {{"t8"}, "$24"},
394 {{"t9"}, "$25"}, {{"k0"}, "$26"}, {{"k1"}, "$27"},
395 {{"gp"}, "$28"}, {{"sp", "$sp"}, "$29"}, {{"fp", "$fp"}, "$30"},
396 {{"ra"}, "$31"}
397 };
398 static const TargetInfo::GCCRegAlias NewABIRegAliases[] = {
399 {{"at"}, "$1"}, {{"v0"}, "$2"}, {{"v1"}, "$3"},
400 {{"a0"}, "$4"}, {{"a1"}, "$5"}, {{"a2"}, "$6"},
401 {{"a3"}, "$7"}, {{"a4"}, "$8"}, {{"a5"}, "$9"},
402 {{"a6"}, "$10"}, {{"a7"}, "$11"}, {{"t0"}, "$12"},
403 {{"t1"}, "$13"}, {{"t2"}, "$14"}, {{"t3"}, "$15"},
404 {{"s0"}, "$16"}, {{"s1"}, "$17"}, {{"s2"}, "$18"},
405 {{"s3"}, "$19"}, {{"s4"}, "$20"}, {{"s5"}, "$21"},
406 {{"s6"}, "$22"}, {{"s7"}, "$23"}, {{"t8"}, "$24"},
407 {{"t9"}, "$25"}, {{"k0"}, "$26"}, {{"k1"}, "$27"},
408 {{"gp"}, "$28"}, {{"sp", "$sp"}, "$29"}, {{"fp", "$fp"}, "$30"},
409 {{"ra"}, "$31"}
410 };
411 if (ABI == "o32")
412 return llvm::ArrayRef(O32RegAliases);
413 return llvm::ArrayRef(NewABIRegAliases);
414 }
415
416 bool hasInt128Type() const override {
417 return (ABI == "n32" || ABI == "n64") || getTargetOpts().ForceEnableInt128;
418 }
419
420 unsigned getUnwindWordWidth() const override;
421
422 bool validateTarget(DiagnosticsEngine &Diags) const override;
423 bool hasBitIntType() const override { return true; }
424};
425} // namespace targets
426} // namespace clang
427
428#endif // LLVM_CLANG_LIB_BASIC_TARGETS_MIPS_H
static bool hasFeature(StringRef Feature, const LangOptions &LangOpts, const TargetInfo &Target)
Determine whether a translation unit built using the current language options has the given feature.
Definition: Module.cpp:100
Defines the clang::TargetOptions class.
Concrete class used by the front-end to report problems and issues.
Definition: Diagnostic.h:192
Keeps track of the various options that can be enabled, which controls the dialect of C or C++ that i...
Definition: LangOptions.h:418
Exposes information about the current target.
Definition: TargetInfo.h:212
BuiltinVaListKind
The different kinds of __builtin_va_list types defined by the target implementation.
Definition: TargetInfo.h:310
Options for controlling the target.
Definition: TargetOptions.h:26
bool hasBitIntType() const override
Determine whether the _BitInt type is supported on this target.
Definition: Mips.h:423
MipsTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
Definition: Mips.h:63
int getEHDataRegisterNumber(unsigned RegNo) const override
Return the register number that __builtin_eh_return_regno would return with the specified argument.
Definition: Mips.h:374
BuiltinVaListKind getBuiltinVaListKind() const override
Returns the kind of __builtin_va_list type that should be used with this target.
Definition: Mips.h:199
bool initFeatureMap(llvm::StringMap< bool > &Features, DiagnosticsEngine &Diags, StringRef CPU, const std::vector< std::string > &FeaturesVec) const override
Initialize the map with the default set of target features for the CPU this should include all legal ...
Definition: Mips.h:176
bool setCPU(const std::string &Name) override
Target the specified CPU.
Definition: Mips.h:169
StringRef getABI() const override
Get the ABI currently in use.
Definition: Mips.h:96
ArrayRef< const char * > getGCCRegNames() const override
Definition: Mips.h:203
bool handleTargetFeatures(std::vector< std::string > &Features, DiagnosticsEngine &Diags) override
Perform initialization based on the user configured set of features (e.g., +sse4).
Definition: Mips.h:309
bool hasInt128Type() const override
Determine whether the __int128 type is supported on this target.
Definition: Mips.h:416
bool validateAsmConstraint(const char *&Name, TargetInfo::ConstraintInfo &Info) const override
Definition: Mips.h:232
bool isIEEE754_2008Default() const
Definition: Mips.h:84
bool isFP64Default() const
Definition: Mips.h:88
bool setABI(const std::string &Name) override
Use the specified ABI.
Definition: Mips.h:98
std::string_view getClobbers() const override
Returns a string of target-specific clobbers, in LLVM format.
Definition: Mips.h:284
ArrayRef< TargetInfo::GCCRegAlias > getGCCRegAliases() const override
Definition: Mips.h:384
std::string convertConstraint(const char *&Constraint) const override
Definition: Mips.h:270
bool isCLZForZeroUndef() const override
The __builtin_clz* and __builtin_ctz* built-in functions are specified to have undefined results for ...
Definition: Mips.h:382
bool isNan2008() const override
Returns true if NaN encoding is IEEE 754-2008.
Definition: Mips.h:92
const std::string & getCPU() const
Definition: Mips.h:174
Defines the clang::TargetInfo interface.
The JSON file list parser is used to communicate input to InstallAPI.
#define false
Definition: stdbool.h:22