clang 24.0.0git
CIRGenBuiltinAArch64.cpp File Reference
#include "CIRGenBuilder.h"
#include "CIRGenFunction.h"
#include "clang/Basic/AArch64CodeGenUtils.h"
#include "clang/Basic/TargetBuiltins.h"
#include "clang/CIR/Dialect/IR/CIRTypes.h"
#include "clang/CIR/MissingFeatures.h"
#include "clang/CodeGenUtils/TargetUtils.h"
#include "llvm/IR/Intrinsics.h"
#include "llvm/IR/IntrinsicsAArch64.h"
#include "mlir/IR/BuiltinTypes.h"
#include "mlir/IR/Value.h"
#include "clang/AST/GlobalDecl.h"
#include "clang/Basic/Builtins.h"
#include "clang/Basic/arm_sve_builtin_cg.inc"

Go to the source code of this file.

Macros

#define SVEMAP1(NameBase, LLVMIntrinsic, TypeModifier)
#define SVEMAP2(NameBase, TypeModifier)
#define GET_SVE_LLVM_INTRINSIC_MAP

Functions

static mlir::Value genVscaleTimesFactor (mlir::Location loc, CIRGenBuilderTy builder, mlir::Type cirTy, int32_t scalingFactor)
template<typename IntrinsicInfo>
static const IntrinsicInfo * findARMVectorIntrinsicInMap (ArrayRef< IntrinsicInfo > intrinsicMap, unsigned builtinID, bool &mapProvenSorted)
static llvm::StringRef getLLVMIntrNameNoPrefix (llvm::Intrinsic::ID intrID)
static cir::VectorType getFloatNeonType (CIRGenFunction &cgf, NeonTypeFlags intTypeFlags)
static int64_t getIntValueFromConstOp (mlir::Value val)
static mlir::Value emitNeonShiftVector (CIRGenBuilderTy &builder, mlir::Value shiftVal, cir::VectorType vecTy, mlir::Location loc, bool neg)
 Build a constant shift amount vector of vecTy to shift a vector Here shiftVal is a constant integer that will be broadcast into a a const vector of vecTy which is the return value of this function If neg is true, the shift amount is negated before splatting (used when encoding a right shift as a left shift by a negative amount for intrinsics like aarch64.neon.
template<typename Operation>
static mlir::Value emitNeonCallToOp (CIRGenModule &cgm, CIRGenBuilderTy &builder, llvm::SmallVector< mlir::Type > argTypes, llvm::SmallVectorImpl< mlir::Value > &args, std::optional< llvm::StringRef > intrinsicName, mlir::Type funcResTy, mlir::Location loc, bool isConstrainedFPIntrinsic=false, unsigned shift=0, bool rightshift=false)
static mlir::Value emitNeonCall (CIRGenModule &cgm, CIRGenBuilderTy &builder, llvm::SmallVector< mlir::Type > argTypes, llvm::SmallVectorImpl< mlir::Value > &args, llvm::StringRef intrinsicName, mlir::Type funcResTy, mlir::Location loc, bool isConstrainedFPIntrinsic=false, unsigned shift=0, bool rightshift=false)
static cir::VectorType getNeonPairwiseWidenInputType (cir::VectorType resType, bool usgn)
static std::pair< mlir::Type, llvm::SmallVector< mlir::Type > > deriveNeonSISDIntrinsicOperandTypes (CIRGenFunction &cgf, unsigned modifier, mlir::Type arg0Ty, mlir::Type resultTy, llvm::ArrayRef< mlir::Value > ops, unsigned iceArguments)
static cir::VectorType deriveNeonBinaryArgType (CIRGenBuilderTy &builder, unsigned modifier, cir::VectorType vTy)
static void vecExtendIntValue (CIRGenFunction &cgf, cir::VectorType argVTy, mlir::Value &arg, mlir::Location loc)
 Create a vector from an input scalar argument, usually for a NEON SISD intrinsic call.
static mlir::Value emitCommonNeonSISDBuiltinExpr (CIRGenFunction &cgf, const ARMNeonVectorIntrinsicInfo &info, llvm::SmallVectorImpl< mlir::Value > &ops, const CallExpr *expr, unsigned iceArguments)
static mlir::Value emitAArch64CompareBuiltinExpr (CIRGenFunction &cgf, CIRGenBuilderTy &builder, mlir::Location loc, mlir::Value src, mlir::Type retTy, const cir::CmpOpKind kind)
static cir::VectorType getNeonType (CIRGenFunction *cgf, NeonTypeFlags typeFlags, bool hasLegalHalfType=true, bool v1Ty=false, bool allowBFloatArgsAndRet=true)
static mlir::Value emitNeonSplat (CIRGenBuilderTy &builder, mlir::Location loc, mlir::Value v, mlir::Value lane, unsigned int resEltCnt)
static cir::VectorType getSignChangedVectorType (CIRGenBuilderTy &builder, cir::VectorType vecTy)
 Flip the signedness of vecTy's element type, keeping the width and number of lanes the same.
static mlir::Value emitCommonNeonShift (CIRGenBuilderTy &builder, mlir::Location loc, cir::VectorType resTy, mlir::Value shifTgt, mlir::Value shiftAmt, bool shiftLeft)
static mlir::Value emitNeonRShiftImm (CIRGenFunction &cgf, mlir::Value shiftVec, mlir::Value shiftVal, cir::VectorType vecTy, bool usgn, mlir::Location loc)
static cir::VectorType getIntVecFromVecTy (CIRGenBuilderTy &builder, cir::VectorType vecTy)
static unsigned getNeonMultiVecCount (unsigned builtinID)
 The vld1_xN builtins move their data through an aggregate of N vectors.
static cir::RecordType getNeonMultiVecTy (CIRGenBuilderTy &builder, mlir::Type vecTy, unsigned numVecs)
 Return the anonymous record type {vecTy, ..., vecTy} (numVecs members) modelling the struct returned by LLVM's multi-vector NEON load intrinsics.
static mlir::Value emitNeonMultiVecLoadCall (CIRGenFunction &cgf, mlir::Value dest, llvm::SmallVector< mlir::Type > argTypes, llvm::SmallVectorImpl< mlir::Value > &args, llvm::Intrinsic::ID llvmIntrinsic, mlir::Type ty, unsigned numVecs, mlir::Location loc)
 Call the multi-vector NEON load intrinsic llvmIntrinsic with args of argTypes and store the resulting numVecs-vector aggregate to the destination pointer dest.
static mlir::Value emitNeonMultiVecLoad (CIRGenFunction &cgf, llvm::ArrayRef< mlir::Value > ops, unsigned llvmIntrinsic, mlir::Type ty, unsigned numVecs, mlir::Location loc)
 Emit a multi-vector NEON load: call llvmIntrinsic on the source pointer ops[1] and store the resulting aggregate to the destination pointer ops[0].
static mlir::Value emitNeonMultiVecLoadLane (CIRGenFunction &cgf, llvm::ArrayRef< mlir::Value > ops, llvm::Intrinsic::ID llvmIntrinsic, mlir::Type ty, unsigned numVecs, mlir::Location loc)
 Emit a multi-vector NEON load-lane: call llvmIntrinsic on the numVecs vector operands, the lane index, and the source pointer ops[1], then store the resulting aggregate to the destination pointer ops[0].
static mlir::Value emitCommonNeonBuiltinExpr (CIRGenFunction &cgf, unsigned builtinID, unsigned llvmIntrinsic, unsigned altLLVMIntrinsic, const char *nameHint, unsigned modifier, const CallExpr *expr, llvm::SmallVectorImpl< mlir::Value > &ops)
static unsigned getSVEMinEltCount (clang::SVETypeFlags::EltType sveType)
static cir::VectorType getSVEVectorForElementType (CIRGenModule &cgm, mlir::Type eltTy)

Variables

static const AArch64SVEAndSMEVectorIntrinsicInfo aarch64SVEIntrinsicMap []
static bool aarch64SIMDIntrinsicsProvenSorted = false
static bool aarch64SISDIntrinsicsProvenSorted = false
static bool aarch64SVEIntrinsicsProvenSorted = false
constexpr unsigned sveBitsPerBlock = 128
static const std::pair< unsigned, unsigned > neonEquivalentIntrinsicMap []

Macro Definition Documentation

◆ GET_SVE_LLVM_INTRINSIC_MAP

#define GET_SVE_LLVM_INTRINSIC_MAP

◆ SVEMAP1

#define SVEMAP1 ( NameBase,
LLVMIntrinsic,
TypeModifier )
Value:
{SVE::BI__builtin_sve_##NameBase, Intrinsic::LLVMIntrinsic, TypeModifier}

Definition at line 48 of file CIRGenBuiltinAArch64.cpp.

◆ SVEMAP2

#define SVEMAP2 ( NameBase,
TypeModifier )
Value:
{SVE::BI__builtin_sve_##NameBase, 0, TypeModifier}

Definition at line 51 of file CIRGenBuiltinAArch64.cpp.

Function Documentation

◆ deriveNeonBinaryArgType()

cir::VectorType deriveNeonBinaryArgType ( CIRGenBuilderTy & builder,
unsigned modifier,
cir::VectorType vTy )
static

◆ deriveNeonSISDIntrinsicOperandTypes()

◆ emitAArch64CompareBuiltinExpr()

◆ emitCommonNeonBuiltinExpr()

mlir::Value emitCommonNeonBuiltinExpr ( CIRGenFunction & cgf,
unsigned builtinID,
unsigned llvmIntrinsic,
unsigned altLLVMIntrinsic,
const char * nameHint,
unsigned modifier,
const CallExpr * expr,
llvm::SmallVectorImpl< mlir::Value > & ops )
static

Definition at line 869 of file CIRGenBuiltinAArch64.cpp.

References clang::ASTContext::BuiltinInfo, clang::CIRGen::CIRGenFunction::cgm, clang::CIRGen::CIRGenFunction::convertType(), cir::CIRBaseBuilderTy::createAdd(), cir::CIRBaseBuilderTy::createBitcast(), cir::CIRBaseBuilderTy::createCast(), cir::CIRBaseBuilderTy::createIntCast(), cir::CIRBaseBuilderTy::createShiftRight(), cir::CIRBaseBuilderTy::createSub(), cir::CIRBaseBuilderTy::createXor(), deriveNeonBinaryArgType(), clang::CIRGen::CIRGenTypeCache::doubleTy, emitAArch64CompareBuiltinExpr(), emitCommonNeonShift(), cir::MissingFeatures::emitConstrainedFPCall(), clang::CIRGen::CIRGenBuilderTy::emitIntrinsicCallOp(), emitNeonCall(), emitNeonCallToOp(), emitNeonMultiVecLoad(), emitNeonRShiftImm(), emitNeonShiftVector(), emitNeonSplat(), clang::CIRGen::CIRGenModule::errorNYI(), clang::ast_matchers::expr, clang::NeonTypeFlags::Float32, clang::CIRGen::CIRGenTypeCache::floatTy, clang::CIRGen::CIRGenFunction::getBuilder(), clang::CIRGen::CIRGenFunction::getCIRGenModule(), cir::CIRBaseBuilderTy::getConstantInt(), clang::CIRGen::CIRGenFunction::getContext(), clang::CIRGen::CIRGenBuilderTy::getExtendedOrTruncatedElementVectorType(), getFloatNeonType(), getLLVMIntrNameNoPrefix(), clang::CIRGen::CIRGenFunction::getLoc(), clang::Builtin::Context::getName(), getNeonMultiVecCount(), getNeonType(), clang::CIRGen::CIRGenFunction::getTarget(), clang::CIRGen::CIRGenBuilderTy::getUInt8Ty(), cir::CIRBaseBuilderTy::getVoidPtrTy(), clang::TargetInfo::hasFastHalfType(), clang::NeonTypeFlags::isQuad(), clang::NeonTypeFlags::isUnsigned(), isUnsigned(), clang::CIRGen::CIRGenTypeCache::sInt32Ty, clang::aarch64::UnsignedAlts, and clang::CIRGen::CIRGenTypeCache::voidTy.

Referenced by clang::CIRGen::CIRGenFunction::emitAArch64BuiltinExpr().

◆ emitCommonNeonShift()

mlir::Value emitCommonNeonShift ( CIRGenBuilderTy & builder,
mlir::Location loc,
cir::VectorType resTy,
mlir::Value shifTgt,
mlir::Value shiftAmt,
bool shiftLeft )
static

◆ emitCommonNeonSISDBuiltinExpr()

◆ emitNeonCall()

mlir::Value emitNeonCall ( CIRGenModule & cgm,
CIRGenBuilderTy & builder,
llvm::SmallVector< mlir::Type > argTypes,
llvm::SmallVectorImpl< mlir::Value > & args,
llvm::StringRef intrinsicName,
mlir::Type funcResTy,
mlir::Location loc,
bool isConstrainedFPIntrinsic = false,
unsigned shift = 0,
bool rightshift = false )
static

◆ emitNeonCallToOp()

template<typename Operation>
mlir::Value emitNeonCallToOp ( CIRGenModule & cgm,
CIRGenBuilderTy & builder,
llvm::SmallVector< mlir::Type > argTypes,
llvm::SmallVectorImpl< mlir::Value > & args,
std::optional< llvm::StringRef > intrinsicName,
mlir::Type funcResTy,
mlir::Location loc,
bool isConstrainedFPIntrinsic = false,
unsigned shift = 0,
bool rightshift = false )
static

◆ emitNeonMultiVecLoad()

mlir::Value emitNeonMultiVecLoad ( CIRGenFunction & cgf,
llvm::ArrayRef< mlir::Value > ops,
unsigned llvmIntrinsic,
mlir::Type ty,
unsigned numVecs,
mlir::Location loc )
static

Emit a multi-vector NEON load: call llvmIntrinsic on the source pointer ops[1] and store the resulting aggregate to the destination pointer ops[0].

Definition at line 835 of file CIRGenBuiltinAArch64.cpp.

References emitNeonMultiVecLoadCall(), clang::CIRGen::CIRGenFunction::getBuilder(), and cir::CIRBaseBuilderTy::getVoidPtrTy().

Referenced by clang::CIRGen::CIRGenFunction::emitAArch64BuiltinExpr(), and emitCommonNeonBuiltinExpr().

◆ emitNeonMultiVecLoadCall()

mlir::Value emitNeonMultiVecLoadCall ( CIRGenFunction & cgf,
mlir::Value dest,
llvm::SmallVector< mlir::Type > argTypes,
llvm::SmallVectorImpl< mlir::Value > & args,
llvm::Intrinsic::ID llvmIntrinsic,
mlir::Type ty,
unsigned numVecs,
mlir::Location loc )
static

Call the multi-vector NEON load intrinsic llvmIntrinsic with args of argTypes and store the resulting numVecs-vector aggregate to the destination pointer dest.

Mirrors the CreateCall + CreateDefaultAlignedStore pair used for vld1_xN in EmitCommonNeonBuiltinExpr and for vld[234]{,_dup,_lane} in EmitAArch64BuiltinExpr (ARM.cpp).

Definition at line 815 of file CIRGenBuiltinAArch64.cpp.

References clang::CIRGen::CIRGenFunction::cgm, cir::CIRBaseBuilderTy::createPtrBitcast(), clang::CIRGen::CIRGenBuilderTy::createStore(), emitNeonCall(), clang::CharUnits::fromQuantity(), cir::CIRDataLayout::getABITypeAlign(), clang::CIRGen::CIRGenFunction::getBuilder(), clang::CIRGen::CIRGenFunction::getCIRGenModule(), clang::CIRGen::CIRGenModule::getDataLayout(), getLLVMIntrNameNoPrefix(), and getNeonMultiVecTy().

Referenced by emitNeonMultiVecLoad(), and emitNeonMultiVecLoadLane().

◆ emitNeonMultiVecLoadLane()

mlir::Value emitNeonMultiVecLoadLane ( CIRGenFunction & cgf,
llvm::ArrayRef< mlir::Value > ops,
llvm::Intrinsic::ID llvmIntrinsic,
mlir::Type ty,
unsigned numVecs,
mlir::Location loc )
static

Emit a multi-vector NEON load-lane: call llvmIntrinsic on the numVecs vector operands, the lane index, and the source pointer ops[1], then store the resulting aggregate to the destination pointer ops[0].

ops on entry is [dest, addr, vec0, ..., vec(numVecs-1), lane].

Definition at line 849 of file CIRGenBuiltinAArch64.cpp.

References cir::CIRBaseBuilderTy::createIntCast(), emitNeonMultiVecLoadCall(), clang::CIRGen::CIRGenFunction::getBuilder(), cir::CIRBaseBuilderTy::getVoidPtrTy(), and clang::CIRGen::CIRGenTypeCache::sInt64Ty.

Referenced by clang::CIRGen::CIRGenFunction::emitAArch64BuiltinExpr().

◆ emitNeonRShiftImm()

◆ emitNeonShiftVector()

mlir::Value emitNeonShiftVector ( CIRGenBuilderTy & builder,
mlir::Value shiftVal,
cir::VectorType vecTy,
mlir::Location loc,
bool neg )
static

Build a constant shift amount vector of vecTy to shift a vector Here shiftVal is a constant integer that will be broadcast into a a const vector of vecTy which is the return value of this function If neg is true, the shift amount is negated before splatting (used when encoding a right shift as a left shift by a negative amount for intrinsics like aarch64.neon.

{s,u}rshl).

Definition at line 119 of file CIRGenBuiltinAArch64.cpp.

References cir::CIRBaseBuilderTy::createIntCast(), cir::CIRBaseBuilderTy::getConstantInt(), and getIntValueFromConstOp().

Referenced by emitCommonNeonBuiltinExpr(), emitCommonNeonShift(), and emitNeonCallToOp().

◆ emitNeonSplat()

◆ findARMVectorIntrinsicInMap()

◆ genVscaleTimesFactor()

◆ getFloatNeonType()

◆ getIntValueFromConstOp()

int64_t getIntValueFromConstOp ( mlir::Value val)
static

◆ getIntVecFromVecTy()

cir::VectorType getIntVecFromVecTy ( CIRGenBuilderTy & builder,
cir::VectorType vecTy )
static

◆ getLLVMIntrNameNoPrefix()

◆ getNeonMultiVecCount()

unsigned getNeonMultiVecCount ( unsigned builtinID)
static

The vld1_xN builtins move their data through an aggregate of N vectors.

Return N, or 0 if builtinID is not one of them.

Definition at line 783 of file CIRGenBuiltinAArch64.cpp.

Referenced by emitCommonNeonBuiltinExpr().

◆ getNeonMultiVecTy()

cir::RecordType getNeonMultiVecTy ( CIRGenBuilderTy & builder,
mlir::Type vecTy,
unsigned numVecs )
static

Return the anonymous record type {vecTy, ..., vecTy} (numVecs members) modelling the struct returned by LLVM's multi-vector NEON load intrinsics.

Definition at line 801 of file CIRGenBuiltinAArch64.cpp.

References cir::RecordType::getAllDataKinds(), and clang::CIRGen::CIRGenBuilderTy::getAnonRecordTy().

Referenced by emitNeonMultiVecLoadCall().

◆ getNeonPairwiseWidenInputType()

cir::VectorType getNeonPairwiseWidenInputType ( cir::VectorType resType,
bool usgn )
static

◆ getNeonType()

◆ getSignChangedVectorType()

cir::VectorType getSignChangedVectorType ( CIRGenBuilderTy & builder,
cir::VectorType vecTy )
static

Flip the signedness of vecTy's element type, keeping the width and number of lanes the same.

Used when a NEON intrinsic takes a shift amount vector that must be signed (e.g. aarch64.neon.urshl takes a signed amount even though the data vector is unsigned).

Definition at line 722 of file CIRGenBuiltinAArch64.cpp.

References clang::CIRGen::CIRGenBuilderTy::getSIntNTy(), and clang::CIRGen::CIRGenBuilderTy::getUIntNTy().

Referenced by clang::CIRGen::CIRGenFunction::emitAArch64BuiltinExpr().

◆ getSVEMinEltCount()

unsigned getSVEMinEltCount ( clang::SVETypeFlags::EltType sveType)
static

◆ getSVEVectorForElementType()

◆ vecExtendIntValue()

void vecExtendIntValue ( CIRGenFunction & cgf,
cir::VectorType argVTy,
mlir::Value & arg,
mlir::Location loc )
static

Create a vector from an input scalar argument, usually for a NEON SISD intrinsic call.

Insert the argument into lane 0 of a poison vector.

Definition at line 334 of file CIRGenBuiltinAArch64.cpp.

References cir::CIRBaseBuilderTy::createIntCast(), clang::CIRGen::CIRGenFunction::getBuilder(), cir::CIRBaseBuilderTy::getConstant(), clang::CIRGen::CIRGenBuilderTy::getConstInt(), and clang::CIRGen::CIRGenTypeCache::sizeTy.

Referenced by emitCommonNeonSISDBuiltinExpr().

Variable Documentation

◆ aarch64SIMDIntrinsicsProvenSorted

bool aarch64SIMDIntrinsicsProvenSorted = false
static

◆ aarch64SISDIntrinsicsProvenSorted

bool aarch64SISDIntrinsicsProvenSorted = false
static

◆ aarch64SVEIntrinsicMap

const AArch64SVEAndSMEVectorIntrinsicInfo aarch64SVEIntrinsicMap[]
static
Initial value:
= {
#define GET_SVE_LLVM_INTRINSIC_MAP
}

Definition at line 53 of file CIRGenBuiltinAArch64.cpp.

Referenced by clang::CIRGen::CIRGenFunction::emitAArch64SVEBuiltinExpr().

◆ aarch64SVEIntrinsicsProvenSorted

bool aarch64SVEIntrinsicsProvenSorted = false
static

◆ neonEquivalentIntrinsicMap

const std::pair<unsigned, unsigned> neonEquivalentIntrinsicMap[]
static

◆ sveBitsPerBlock

unsigned sveBitsPerBlock = 128
constexpr

Definition at line 1619 of file CIRGenBuiltinAArch64.cpp.

Referenced by getSVEVectorForElementType().