Go to the documentation of this file.
13 #ifndef LLVM_CLANG_LIB_BASIC_TARGETS_SYSTEMZ_H
14 #define LLVM_CLANG_LIB_BASIC_TARGETS_SYSTEMZ_H
18 #include "llvm/ADT/Triple.h"
19 #include "llvm/Support/Compiler.h"
30 bool HasTransactionalExecution;
36 :
TargetInfo(Triple), CPU(
"z10"), ISARevision(8),
41 IntWidth = IntAlign = 32;
42 LongWidth = LongLongWidth = LongAlign = LongLongAlign = 64;
43 PointerWidth = PointerAlign = 64;
44 LongDoubleWidth = 128;
46 LongDoubleFormat = &llvm::APFloat::IEEEquad();
47 DefaultAlignForAttributeAligned = 64;
49 if (Triple.isOSzOS()) {
57 "E-m:l-i1:8:16-i8:8:16-i64:64-f128:64-v128:64-a:8:16-n32:64");
59 resetDataLayout(
"E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-a:8:16-n32:64");
60 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
79 return RegName.equals(
"r15");
82 bool validateAsmConstraint(
const char *&Name,
86 switch (Constraint[0]) {
90 switch (Constraint[1]) {
118 int getISARevision(StringRef Name)
const;
121 return getISARevision(Name) != -1;
128 ISARevision = getISARevision(CPU);
129 return ISARevision != -1;
135 const std::vector<std::string> &FeaturesVec)
const override {
136 int ISARevision = getISARevision(CPU);
137 if (ISARevision >= 10)
138 Features[
"transactional-execution"] =
true;
139 if (ISARevision >= 11)
140 Features[
"vector"] =
true;
141 if (ISARevision >= 12)
142 Features[
"vector-enhancements-1"] =
true;
143 if (ISARevision >= 13)
144 Features[
"vector-enhancements-2"] =
true;
145 if (ISARevision >= 14)
146 Features[
"nnp-assist"] =
true;
152 HasTransactionalExecution =
false;
155 for (
const auto &Feature : Features) {
156 if (Feature ==
"+transactional-execution")
157 HasTransactionalExecution =
true;
158 else if (Feature ==
"+vector")
160 else if (Feature ==
"+soft-float")
163 HasVector &= !SoftFloat;
166 if (HasVector && !getTriple().isOSzOS()) {
168 resetDataLayout(
"E-m:e-i1:8:16-i8:8:16-i64:64-f128:64"
169 "-v128:64-a:8:16-n32:64");
174 bool hasFeature(StringRef Feature)
const override;
200 return RegNo < 4 ? 6 + RegNo : -1;
205 #endif // LLVM_CLANG_LIB_BASIC_TARGETS_SYSTEMZ_H
const char * getLongDoubleMangling() const override
Return the mangled code of long double.
bool isSPRegName(StringRef RegName) const override
bool handleTargetFeatures(std::vector< std::string > &Features, DiagnosticsEngine &Diags) override
Perform initialization based on the user configured set of features (e.g., +sse4).
const char * getClobbers() const override
Returns a string of target-specific clobbers, in LLVM format.
Concrete class used by the front-end to report problems and issues.
Exposes information about the current target.
BuiltinVaListKind
The different kinds of __builtin_va_list types defined by the target implementation.
CallingConvCheckResult checkCallingConvention(CallingConv CC) const override
Determines whether a given calling convention is valid for the target.
std::string convertConstraint(const char *&Constraint) const override
static const Builtin::Info BuiltinInfo[]
virtual bool initFeatureMap(llvm::StringMap< bool > &Features, DiagnosticsEngine &Diags, StringRef CPU, const std::vector< std::string > &FeatureVec) const
Initialize the map with the default set of target features for the CPU this should include all legal ...
static const char *const GCCRegNames[]
CallingConv
CallingConv - Specifies the calling convention that a function uses.
bool setCPU(const std::string &Name) override
Target the specified CPU.
BuiltinVaListKind getBuiltinVaListKind() const override
Returns the kind of __builtin_va_list type that should be used with this target.
int getEHDataRegisterNumber(unsigned RegNo) const override
Return the register number that __builtin_eh_return_regno would return with the specified argument.
bool hasBitIntType() const override
Determine whether the _BitInt type is supported on this target.
SystemZTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
StringRef getABI() const override
Get the ABI currently in use.
Keeps track of the various options that can be enabled, which controls the dialect of C or C++ that i...
bool initFeatureMap(llvm::StringMap< bool > &Features, DiagnosticsEngine &Diags, StringRef CPU, const std::vector< std::string > &FeaturesVec) const override
Initialize the map with the default set of target features for the CPU this should include all legal ...
virtual std::string convertConstraint(const char *&Constraint) const
Options for controlling the target.
ArrayRef< TargetInfo::GCCRegAlias > getGCCRegAliases() const override
bool isValidCPUName(StringRef Name) const override
brief Determine whether this TargetInfo supports the given CPU name.
static bool hasFeature(StringRef Feature, const LangOptions &LangOpts, const TargetInfo &Target)
Determine whether a translation unit built using the current language options has the given feature.