clang  16.0.0git
Hexagon.cpp
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1 //===--- Hexagon.cpp - Implement Hexagon target feature support -----------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements Hexagon TargetInfo objects.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "Hexagon.h"
14 #include "Targets.h"
17 #include "llvm/ADT/StringSwitch.h"
18 
19 using namespace clang;
20 using namespace clang::targets;
21 
23  MacroBuilder &Builder) const {
24  Builder.defineMacro("__qdsp6__", "1");
25  Builder.defineMacro("__hexagon__", "1");
26 
27  Builder.defineMacro("__ELF__");
28 
29  // The macro __HVXDBL__ is deprecated.
30  bool DefineHvxDbl = false;
31 
32  if (CPU == "hexagonv5") {
33  Builder.defineMacro("__HEXAGON_V5__");
34  Builder.defineMacro("__HEXAGON_ARCH__", "5");
35  if (Opts.HexagonQdsp6Compat) {
36  Builder.defineMacro("__QDSP6_V5__");
37  Builder.defineMacro("__QDSP6_ARCH__", "5");
38  }
39  } else if (CPU == "hexagonv55") {
40  Builder.defineMacro("__HEXAGON_V55__");
41  Builder.defineMacro("__HEXAGON_ARCH__", "55");
42  Builder.defineMacro("__QDSP6_V55__");
43  Builder.defineMacro("__QDSP6_ARCH__", "55");
44  } else if (CPU == "hexagonv60") {
45  DefineHvxDbl = true;
46  Builder.defineMacro("__HEXAGON_V60__");
47  Builder.defineMacro("__HEXAGON_ARCH__", "60");
48  Builder.defineMacro("__QDSP6_V60__");
49  Builder.defineMacro("__QDSP6_ARCH__", "60");
50  } else if (CPU == "hexagonv62") {
51  DefineHvxDbl = true;
52  Builder.defineMacro("__HEXAGON_V62__");
53  Builder.defineMacro("__HEXAGON_ARCH__", "62");
54  } else if (CPU == "hexagonv65") {
55  DefineHvxDbl = true;
56  Builder.defineMacro("__HEXAGON_V65__");
57  Builder.defineMacro("__HEXAGON_ARCH__", "65");
58  } else if (CPU == "hexagonv66") {
59  DefineHvxDbl = true;
60  Builder.defineMacro("__HEXAGON_V66__");
61  Builder.defineMacro("__HEXAGON_ARCH__", "66");
62  } else if (CPU == "hexagonv67") {
63  Builder.defineMacro("__HEXAGON_V67__");
64  Builder.defineMacro("__HEXAGON_ARCH__", "67");
65  } else if (CPU == "hexagonv67t") {
66  Builder.defineMacro("__HEXAGON_V67T__");
67  Builder.defineMacro("__HEXAGON_ARCH__", "67");
68  } else if (CPU == "hexagonv68") {
69  Builder.defineMacro("__HEXAGON_V68__");
70  Builder.defineMacro("__HEXAGON_ARCH__", "68");
71  } else if (CPU == "hexagonv69") {
72  Builder.defineMacro("__HEXAGON_V69__");
73  Builder.defineMacro("__HEXAGON_ARCH__", "69");
74  } else if (CPU == "hexagonv71") {
75  Builder.defineMacro("__HEXAGON_V71__");
76  Builder.defineMacro("__HEXAGON_ARCH__", "71");
77  } else if (CPU == "hexagonv71t") {
78  Builder.defineMacro("__HEXAGON_V71T__");
79  Builder.defineMacro("__HEXAGON_ARCH__", "71");
80  } else if (CPU == "hexagonv73") {
81  Builder.defineMacro("__HEXAGON_V73__");
82  Builder.defineMacro("__HEXAGON_ARCH__", "73");
83  }
84 
85  if (hasFeature("hvx-length64b")) {
86  Builder.defineMacro("__HVX__");
87  Builder.defineMacro("__HVX_ARCH__", HVXVersion);
88  Builder.defineMacro("__HVX_LENGTH__", "64");
89  }
90 
91  if (hasFeature("hvx-length128b")) {
92  Builder.defineMacro("__HVX__");
93  Builder.defineMacro("__HVX_ARCH__", HVXVersion);
94  Builder.defineMacro("__HVX_LENGTH__", "128");
95  if (DefineHvxDbl)
96  Builder.defineMacro("__HVXDBL__");
97  }
98 
99  if (hasFeature("audio")) {
100  Builder.defineMacro("__HEXAGON_AUDIO__");
101  }
102 
103  std::string NumPhySlots = isTinyCore() ? "3" : "4";
104  Builder.defineMacro("__HEXAGON_PHYSICAL_SLOTS__", NumPhySlots);
105 }
106 
108  llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, StringRef CPU,
109  const std::vector<std::string> &FeaturesVec) const {
110  if (isTinyCore())
111  Features["audio"] = true;
112 
113  StringRef CPUFeature = CPU;
114  CPUFeature.consume_front("hexagon");
115  CPUFeature.consume_back("t");
116  if (!CPUFeature.empty())
117  Features[CPUFeature] = true;
118 
119  Features["long-calls"] = false;
120 
121  return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
122 }
123 
124 bool HexagonTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
125  DiagnosticsEngine &Diags) {
126  for (auto &F : Features) {
127  if (F == "+hvx-length64b")
128  HasHVX = HasHVX64B = true;
129  else if (F == "+hvx-length128b")
130  HasHVX = HasHVX128B = true;
131  else if (F.find("+hvxv") != std::string::npos) {
132  HasHVX = true;
133  HVXVersion = F.substr(std::string("+hvxv").length());
134  } else if (F == "-hvx")
135  HasHVX = HasHVX64B = HasHVX128B = false;
136  else if (F == "+long-calls")
137  UseLongCalls = true;
138  else if (F == "-long-calls")
139  UseLongCalls = false;
140  else if (F == "+audio")
141  HasAudio = true;
142  }
143  if (CPU.compare("hexagonv68") >= 0) {
144  HasLegalHalfType = true;
145  HasFloat16 = true;
146  }
147  return true;
148 }
149 
150 const char *const HexagonTargetInfo::GCCRegNames[] = {
151  // Scalar registers:
152  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11",
153  "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", "r20", "r21",
154  "r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
155  "r1:0", "r3:2", "r5:4", "r7:6", "r9:8", "r11:10", "r13:12", "r15:14",
156  "r17:16", "r19:18", "r21:20", "r23:22", "r25:24", "r27:26", "r29:28",
157  "r31:30",
158  // Predicate registers:
159  "p0", "p1", "p2", "p3",
160  // Control registers:
161  "c0", "c1", "c2", "c3", "c4", "c5", "c6", "c7", "c8", "c9", "c10", "c11",
162  "c12", "c13", "c14", "c15", "c16", "c17", "c18", "c19", "c20", "c21",
163  "c22", "c23", "c24", "c25", "c26", "c27", "c28", "c29", "c30", "c31",
164  "c1:0", "c3:2", "c5:4", "c7:6", "c9:8", "c11:10", "c13:12", "c15:14",
165  "c17:16", "c19:18", "c21:20", "c23:22", "c25:24", "c27:26", "c29:28",
166  "c31:30",
167  // Control register aliases:
168  "sa0", "lc0", "sa1", "lc1", "p3:0", "m0", "m1", "usr", "pc", "ugp",
169  "gp", "cs0", "cs1", "upcyclelo", "upcyclehi", "framelimit", "framekey",
170  "pktcountlo", "pktcounthi", "utimerlo", "utimerhi",
171  "upcycle", "pktcount", "utimer",
172  // HVX vector registers:
173  "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11",
174  "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21",
175  "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
176  "v1:0", "v3:2", "v5:4", "v7:6", "v9:8", "v11:10", "v13:12", "v15:14",
177  "v17:16", "v19:18", "v21:20", "v23:22", "v25:24", "v27:26", "v29:28",
178  "v31:30",
179  "v3:0", "v7:4", "v11:8", "v15:12", "v19:16", "v23:20", "v27:24", "v31:28",
180  // HVX vector predicates:
181  "q0", "q1", "q2", "q3",
182 };
183 
185  return llvm::makeArrayRef(GCCRegNames);
186 }
187 
188 const TargetInfo::GCCRegAlias HexagonTargetInfo::GCCRegAliases[] = {
189  {{"sp"}, "r29"},
190  {{"fp"}, "r30"},
191  {{"lr"}, "r31"},
192 };
193 
195  return llvm::makeArrayRef(GCCRegAliases);
196 }
197 
198 const Builtin::Info HexagonTargetInfo::BuiltinInfo[] = {
199 #define BUILTIN(ID, TYPE, ATTRS) \
200  {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr},
201 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) \
202  {#ID, TYPE, ATTRS, HEADER, ALL_LANGUAGES, nullptr},
203 #define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) \
204  {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, FEATURE},
205 #include "clang/Basic/BuiltinsHexagon.def"
206 };
207 
208 bool HexagonTargetInfo::hasFeature(StringRef Feature) const {
209  std::string VS = "hvxv" + HVXVersion;
210  if (Feature == VS)
211  return true;
212 
213  return llvm::StringSwitch<bool>(Feature)
214  .Case("hexagon", true)
215  .Case("hvx", HasHVX)
216  .Case("hvx-length64b", HasHVX64B)
217  .Case("hvx-length128b", HasHVX128B)
218  .Case("long-calls", UseLongCalls)
219  .Case("audio", HasAudio)
220  .Default(false);
221 }
222 
223 struct CPUSuffix {
224  llvm::StringLiteral Name;
225  llvm::StringLiteral Suffix;
226 };
227 
228 static constexpr CPUSuffix Suffixes[] = {
229  {{"hexagonv5"}, {"5"}}, {{"hexagonv55"}, {"55"}},
230  {{"hexagonv60"}, {"60"}}, {{"hexagonv62"}, {"62"}},
231  {{"hexagonv65"}, {"65"}}, {{"hexagonv66"}, {"66"}},
232  {{"hexagonv67"}, {"67"}}, {{"hexagonv67t"}, {"67t"}},
233  {{"hexagonv68"}, {"68"}}, {{"hexagonv69"}, {"69"}},
234  {{"hexagonv71"}, {"71"}}, {{"hexagonv71t"}, {"71t"}},
235  {{"hexagonv73"}, {"73"}},
236 };
237 
238 const char *HexagonTargetInfo::getHexagonCPUSuffix(StringRef Name) {
239  const CPUSuffix *Item = llvm::find_if(
240  Suffixes, [Name](const CPUSuffix &S) { return S.Name == Name; });
241  if (Item == std::end(Suffixes))
242  return nullptr;
243  return Item->Suffix.data();
244 }
245 
247  SmallVectorImpl<StringRef> &Values) const {
248  for (const CPUSuffix &Suffix : Suffixes)
249  Values.push_back(Suffix.Name);
250 }
251 
253  return llvm::makeArrayRef(BuiltinInfo, clang::Hexagon::LastTSBuiltin -
255 }
clang::targets::HexagonTargetInfo::hasFeature
bool hasFeature(StringRef Feature) const override
Determine whether the given target has the given feature.
Definition: Hexagon.cpp:208
string
string(SUBSTRING ${CMAKE_CURRENT_BINARY_DIR} 0 ${PATH_LIB_START} PATH_HEAD) string(SUBSTRING $
Definition: CMakeLists.txt:22
CPUSuffix
Definition: Hexagon.cpp:223
clang::DiagnosticsEngine
Concrete class used by the front-end to report problems and issues.
Definition: Diagnostic.h:192
clang::targets::HexagonTargetInfo::isTinyCore
bool isTinyCore() const
Definition: Hexagon.h:137
clang::targets::HexagonTargetInfo::getGCCRegAliases
ArrayRef< TargetInfo::GCCRegAlias > getGCCRegAliases() const override
Definition: Hexagon.cpp:194
clang::targets::HexagonTargetInfo::getGCCRegNames
ArrayRef< const char * > getGCCRegNames() const override
Definition: Hexagon.cpp:184
Hexagon.h
clang::TargetInfo::HasLegalHalfType
bool HasLegalHalfType
Definition: TargetInfo.h:216
Suffixes
static constexpr CPUSuffix Suffixes[]
Definition: Hexagon.cpp:228
clang::targets::HexagonTargetInfo::fillValidCPUList
void fillValidCPUList(SmallVectorImpl< StringRef > &Values) const override
Fill a SmallVectorImpl with the valid values to setCPU.
Definition: Hexagon.cpp:246
clang::targets::HexagonTargetInfo::getTargetDefines
void getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const override
===-— Other target property query methods -----------------------—===//
Definition: Hexagon.cpp:22
length
float __ovld __cnfn length(float)
Return the length of vector p, i.e., sqrt(p.x2 + p.y 2 + ...)
CPUSuffix::Suffix
llvm::StringLiteral Suffix
Definition: Hexagon.cpp:225
Targets.h
clang::TargetInfo::initFeatureMap
virtual bool initFeatureMap(llvm::StringMap< bool > &Features, DiagnosticsEngine &Diags, StringRef CPU, const std::vector< std::string > &FeatureVec) const
Initialize the map with the default set of target features for the CPU this should include all legal ...
Definition: TargetInfo.cpp:492
MacroBuilder.h
clang::TargetInfo::GCCRegAlias
Definition: TargetInfo.h:1209
clang::Hexagon::LastTSBuiltin
@ LastTSBuiltin
Definition: TargetBuiltins.h:306
llvm::ArrayRef< const char * >
clang::targets::HexagonTargetInfo::initFeatureMap
bool initFeatureMap(llvm::StringMap< bool > &Features, DiagnosticsEngine &Diags, StringRef CPU, const std::vector< std::string > &FeaturesVec) const override
Initialize the map with the default set of target features for the CPU this should include all legal ...
Definition: Hexagon.cpp:107
TargetBuiltins.h
clang::LangOptions
Keeps track of the various options that can be enabled, which controls the dialect of C or C++ that i...
Definition: LangOptions.h:81
clang::targets::HexagonTargetInfo::getTargetBuiltins
ArrayRef< Builtin::Info > getTargetBuiltins() const override
Return information about target-specific builtins for the current primary target, and info about whic...
Definition: Hexagon.cpp:252
clang::TargetInfo::HasFloat16
bool HasFloat16
Definition: TargetInfo.h:220
clang
Definition: CalledOnceCheck.h:17
clang::targets
Definition: AArch64.h:21
clang::targets::HexagonTargetInfo::handleTargetFeatures
bool handleTargetFeatures(std::vector< std::string > &Features, DiagnosticsEngine &Diags) override
Perform initialization based on the user configured set of features (e.g., +sse4).
Definition: Hexagon.cpp:124
clang::Builtin::Info
Definition: Builtins.h:59
clang::targets::HexagonTargetInfo::getHexagonCPUSuffix
static const char * getHexagonCPUSuffix(StringRef Name)
Definition: Hexagon.cpp:238
clang::Builtin::FirstTSBuiltin
@ FirstTSBuiltin
Definition: Builtins.h:56
CPUSuffix::Name
llvm::StringLiteral Name
Definition: Hexagon.cpp:224
llvm::SmallVectorImpl
Definition: Randstruct.h:18
clang::MacroBuilder
Definition: MacroBuilder.h:23