clang 17.0.0git
AMDGPU.h
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1//===--- AMDGPU.h - Declare AMDGPU target feature support -------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file declares AMDGPU TargetInfo objects.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_AMDGPU_H
14#define LLVM_CLANG_LIB_BASIC_TARGETS_AMDGPU_H
15
19#include "llvm/ADT/StringSet.h"
20#include "llvm/Support/Compiler.h"
21#include "llvm/TargetParser/TargetParser.h"
22#include "llvm/TargetParser/Triple.h"
23#include <optional>
24
25namespace clang {
26namespace targets {
27
28class LLVM_LIBRARY_VISIBILITY AMDGPUTargetInfo final : public TargetInfo {
29
30 static const char *const GCCRegNames[];
31
32 enum AddrSpace {
33 Generic = 0,
34 Global = 1,
35 Local = 3,
36 Constant = 4,
37 Private = 5
38 };
39 static const LangASMap AMDGPUDefIsGenMap;
40 static const LangASMap AMDGPUDefIsPrivMap;
41
42 llvm::AMDGPU::GPUKind GPUKind;
43 unsigned GPUFeatures;
44 unsigned WavefrontSize;
45
46 /// Whether to use cumode or WGP mode. True for cumode. False for WGP mode.
47 bool CUMode;
48
49 /// Target ID is device name followed by optional feature name postfixed
50 /// by plus or minus sign delimitted by colon, e.g. gfx908:xnack+:sramecc-.
51 /// If the target ID contains feature+, map it to true.
52 /// If the target ID contains feature-, map it to false.
53 /// If the target ID does not contain a feature (default), do not map it.
54 llvm::StringMap<bool> OffloadArchFeatures;
55 std::string TargetID;
56
57 bool hasFP64() const {
58 return getTriple().getArch() == llvm::Triple::amdgcn ||
59 !!(GPUFeatures & llvm::AMDGPU::FEATURE_FP64);
60 }
61
62 /// Has fast fma f32
63 bool hasFastFMAF() const {
64 return !!(GPUFeatures & llvm::AMDGPU::FEATURE_FAST_FMA_F32);
65 }
66
67 /// Has fast fma f64
68 bool hasFastFMA() const {
69 return getTriple().getArch() == llvm::Triple::amdgcn;
70 }
71
72 bool hasFMAF() const {
73 return getTriple().getArch() == llvm::Triple::amdgcn ||
74 !!(GPUFeatures & llvm::AMDGPU::FEATURE_FMA);
75 }
76
77 bool hasFullRateDenormalsF32() const {
78 return !!(GPUFeatures & llvm::AMDGPU::FEATURE_FAST_DENORMAL_F32);
79 }
80
81 bool hasLDEXPF() const {
82 return getTriple().getArch() == llvm::Triple::amdgcn ||
83 !!(GPUFeatures & llvm::AMDGPU::FEATURE_LDEXP);
84 }
85
86 static bool isAMDGCN(const llvm::Triple &TT) {
87 return TT.getArch() == llvm::Triple::amdgcn;
88 }
89
90 static bool isR600(const llvm::Triple &TT) {
91 return TT.getArch() == llvm::Triple::r600;
92 }
93
94public:
95 AMDGPUTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts);
96
97 void setAddressSpaceMap(bool DefaultIsPrivate);
98
99 void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) override;
100
101 uint64_t getPointerWidthV(LangAS AS) const override {
102 if (isR600(getTriple()))
103 return 32;
104 unsigned TargetAS = getTargetAddressSpace(AS);
105
106 if (TargetAS == Private || TargetAS == Local)
107 return 32;
108
109 return 64;
110 }
111
112 uint64_t getPointerAlignV(LangAS AddrSpace) const override {
113 return getPointerWidthV(AddrSpace);
114 }
115
116 uint64_t getMaxPointerWidth() const override {
117 return getTriple().getArch() == llvm::Triple::amdgcn ? 64 : 32;
118 }
119
120 bool hasBFloat16Type() const override { return isAMDGCN(getTriple()); }
121
122 std::string_view getClobbers() const override { return ""; }
123
124 ArrayRef<const char *> getGCCRegNames() const override;
125
127 return std::nullopt;
128 }
129
130 /// Accepted register names: (n, m is unsigned integer, n < m)
131 /// v
132 /// s
133 /// a
134 /// {vn}, {v[n]}
135 /// {sn}, {s[n]}
136 /// {an}, {a[n]}
137 /// {S} , where S is a special register name
138 ////{v[n:m]}
139 /// {s[n:m]}
140 /// {a[n:m]}
141 bool validateAsmConstraint(const char *&Name,
142 TargetInfo::ConstraintInfo &Info) const override {
143 static const ::llvm::StringSet<> SpecialRegs({
144 "exec", "vcc", "flat_scratch", "m0", "scc", "tba", "tma",
145 "flat_scratch_lo", "flat_scratch_hi", "vcc_lo", "vcc_hi", "exec_lo",
146 "exec_hi", "tma_lo", "tma_hi", "tba_lo", "tba_hi",
147 });
148
149 switch (*Name) {
150 case 'I':
151 Info.setRequiresImmediate(-16, 64);
152 return true;
153 case 'J':
154 Info.setRequiresImmediate(-32768, 32767);
155 return true;
156 case 'A':
157 case 'B':
158 case 'C':
160 return true;
161 default:
162 break;
163 }
164
165 StringRef S(Name);
166
167 if (S == "DA" || S == "DB") {
168 Name++;
170 return true;
171 }
172
173 bool HasLeftParen = false;
174 if (S.front() == '{') {
175 HasLeftParen = true;
176 S = S.drop_front();
177 }
178 if (S.empty())
179 return false;
180 if (S.front() != 'v' && S.front() != 's' && S.front() != 'a') {
181 if (!HasLeftParen)
182 return false;
183 auto E = S.find('}');
184 if (!SpecialRegs.count(S.substr(0, E)))
185 return false;
186 S = S.drop_front(E + 1);
187 if (!S.empty())
188 return false;
189 // Found {S} where S is a special register.
190 Info.setAllowsRegister();
191 Name = S.data() - 1;
192 return true;
193 }
194 S = S.drop_front();
195 if (!HasLeftParen) {
196 if (!S.empty())
197 return false;
198 // Found s, v or a.
199 Info.setAllowsRegister();
200 Name = S.data() - 1;
201 return true;
202 }
203 bool HasLeftBracket = false;
204 if (!S.empty() && S.front() == '[') {
205 HasLeftBracket = true;
206 S = S.drop_front();
207 }
208 unsigned long long N;
209 if (S.empty() || consumeUnsignedInteger(S, 10, N))
210 return false;
211 if (!S.empty() && S.front() == ':') {
212 if (!HasLeftBracket)
213 return false;
214 S = S.drop_front();
215 unsigned long long M;
216 if (consumeUnsignedInteger(S, 10, M) || N >= M)
217 return false;
218 }
219 if (HasLeftBracket) {
220 if (S.empty() || S.front() != ']')
221 return false;
222 S = S.drop_front();
223 }
224 if (S.empty() || S.front() != '}')
225 return false;
226 S = S.drop_front();
227 if (!S.empty())
228 return false;
229 // Found {vn}, {sn}, {an}, {v[n]}, {s[n]}, {a[n]}, {v[n:m]}, {s[n:m]}
230 // or {a[n:m]}.
231 Info.setAllowsRegister();
232 Name = S.data() - 1;
233 return true;
234 }
235
236 // \p Constraint will be left pointing at the last character of
237 // the constraint. In practice, it won't be changed unless the
238 // constraint is longer than one character.
239 std::string convertConstraint(const char *&Constraint) const override {
240
241 StringRef S(Constraint);
242 if (S == "DA" || S == "DB") {
243 return std::string("^") + std::string(Constraint++, 2);
244 }
245
246 const char *Begin = Constraint;
247 TargetInfo::ConstraintInfo Info("", "");
248 if (validateAsmConstraint(Constraint, Info))
249 return std::string(Begin).substr(0, Constraint - Begin + 1);
250
251 Constraint = Begin;
252 return std::string(1, *Constraint);
253 }
254
255 bool
256 initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags,
257 StringRef CPU,
258 const std::vector<std::string> &FeatureVec) const override;
259
260 ArrayRef<Builtin::Info> getTargetBuiltins() const override;
261
262 bool useFP16ConversionIntrinsics() const override { return false; }
263
264 void getTargetDefines(const LangOptions &Opts,
265 MacroBuilder &Builder) const override;
266
268 return TargetInfo::CharPtrBuiltinVaList;
269 }
270
271 bool isValidCPUName(StringRef Name) const override {
272 if (getTriple().getArch() == llvm::Triple::amdgcn)
273 return llvm::AMDGPU::parseArchAMDGCN(Name) != llvm::AMDGPU::GK_NONE;
274 return llvm::AMDGPU::parseArchR600(Name) != llvm::AMDGPU::GK_NONE;
275 }
276
277 void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
278
279 bool setCPU(const std::string &Name) override {
280 if (getTriple().getArch() == llvm::Triple::amdgcn) {
281 GPUKind = llvm::AMDGPU::parseArchAMDGCN(Name);
282 GPUFeatures = llvm::AMDGPU::getArchAttrAMDGCN(GPUKind);
283 } else {
284 GPUKind = llvm::AMDGPU::parseArchR600(Name);
285 GPUFeatures = llvm::AMDGPU::getArchAttrR600(GPUKind);
286 }
287
288 return GPUKind != llvm::AMDGPU::GK_NONE;
289 }
290
291 void setSupportedOpenCLOpts() override {
292 auto &Opts = getSupportedOpenCLOpts();
293 Opts["cl_clang_storage_class_specifiers"] = true;
294 Opts["__cl_clang_variadic_functions"] = true;
295 Opts["__cl_clang_function_pointers"] = true;
296 Opts["__cl_clang_non_portable_kernel_param_types"] = true;
297 Opts["__cl_clang_bitfields"] = true;
298
299 bool IsAMDGCN = isAMDGCN(getTriple());
300
301 Opts["cl_khr_fp64"] = hasFP64();
302 Opts["__opencl_c_fp64"] = hasFP64();
303
304 if (IsAMDGCN || GPUKind >= llvm::AMDGPU::GK_CEDAR) {
305 Opts["cl_khr_byte_addressable_store"] = true;
306 Opts["cl_khr_global_int32_base_atomics"] = true;
307 Opts["cl_khr_global_int32_extended_atomics"] = true;
308 Opts["cl_khr_local_int32_base_atomics"] = true;
309 Opts["cl_khr_local_int32_extended_atomics"] = true;
310 }
311
312 if (IsAMDGCN) {
313 Opts["cl_khr_fp16"] = true;
314 Opts["cl_khr_int64_base_atomics"] = true;
315 Opts["cl_khr_int64_extended_atomics"] = true;
316 Opts["cl_khr_mipmap_image"] = true;
317 Opts["cl_khr_mipmap_image_writes"] = true;
318 Opts["cl_khr_subgroups"] = true;
319 Opts["cl_amd_media_ops"] = true;
320 Opts["cl_amd_media_ops2"] = true;
321
322 Opts["__opencl_c_images"] = true;
323 Opts["__opencl_c_3d_image_writes"] = true;
324 Opts["cl_khr_3d_image_writes"] = true;
325 }
326 }
327
329 switch (TK) {
330 case OCLTK_Image:
331 return LangAS::opencl_constant;
332
333 case OCLTK_ClkEvent:
334 case OCLTK_Queue:
335 case OCLTK_ReserveID:
336 return LangAS::opencl_global;
337
338 default:
339 return TargetInfo::getOpenCLTypeAddrSpace(TK);
340 }
341 }
342
343 LangAS getOpenCLBuiltinAddressSpace(unsigned AS) const override {
344 switch (AS) {
345 case 0:
346 return LangAS::opencl_generic;
347 case 1:
348 return LangAS::opencl_global;
349 case 3:
350 return LangAS::opencl_local;
351 case 4:
352 return LangAS::opencl_constant;
353 case 5:
354 return LangAS::opencl_private;
355 default:
356 return getLangASFromTargetAS(AS);
357 }
358 }
359
360 LangAS getCUDABuiltinAddressSpace(unsigned AS) const override {
361 switch (AS) {
362 case 0:
363 return LangAS::Default;
364 case 1:
365 return LangAS::cuda_device;
366 case 3:
367 return LangAS::cuda_shared;
368 case 4:
369 return LangAS::cuda_constant;
370 default:
371 return getLangASFromTargetAS(AS);
372 }
373 }
374
375 std::optional<LangAS> getConstantAddressSpace() const override {
376 return getLangASFromTargetAS(Constant);
377 }
378
379 const llvm::omp::GV &getGridValue() const override {
380 switch (WavefrontSize) {
381 case 32:
382 return llvm::omp::getAMDGPUGridValues<32>();
383 case 64:
384 return llvm::omp::getAMDGPUGridValues<64>();
385 default:
386 llvm_unreachable("getGridValue not implemented for this wavesize");
387 }
388 }
389
390 /// \returns Target specific vtbl ptr address space.
391 unsigned getVtblPtrAddressSpace() const override {
392 return static_cast<unsigned>(Constant);
393 }
394
395 /// \returns If a target requires an address within a target specific address
396 /// space \p AddressSpace to be converted in order to be used, then return the
397 /// corresponding target specific DWARF address space.
398 ///
399 /// \returns Otherwise return std::nullopt and no conversion will be emitted
400 /// in the DWARF.
401 std::optional<unsigned>
402 getDWARFAddressSpace(unsigned AddressSpace) const override {
403 const unsigned DWARF_Private = 1;
404 const unsigned DWARF_Local = 2;
405 if (AddressSpace == Private) {
406 return DWARF_Private;
407 } else if (AddressSpace == Local) {
408 return DWARF_Local;
409 } else {
410 return std::nullopt;
411 }
412 }
413
415 switch (CC) {
416 default:
417 return CCCR_Warning;
418 case CC_C:
419 case CC_OpenCLKernel:
421 return CCCR_OK;
422 }
423 }
424
425 // In amdgcn target the null pointer in global, constant, and generic
426 // address space has value 0 but in private and local address space has
427 // value ~0.
428 uint64_t getNullPointerValue(LangAS AS) const override {
429 // FIXME: Also should handle region.
430 return (AS == LangAS::opencl_local || AS == LangAS::opencl_private)
431 ? ~0 : 0;
432 }
433
434 void setAuxTarget(const TargetInfo *Aux) override;
435
436 bool hasBitIntType() const override { return true; }
437
438 // Record offload arch features since they are needed for defining the
439 // pre-defined macros.
440 bool handleTargetFeatures(std::vector<std::string> &Features,
441 DiagnosticsEngine &Diags) override {
442 auto TargetIDFeatures =
443 getAllPossibleTargetIDFeatures(getTriple(), getArchNameAMDGCN(GPUKind));
444 for (const auto &F : Features) {
445 assert(F.front() == '+' || F.front() == '-');
446 if (F == "+wavefrontsize64")
447 WavefrontSize = 64;
448 else if (F == "+cumode")
449 CUMode = true;
450 else if (F == "-cumode")
451 CUMode = false;
452 bool IsOn = F.front() == '+';
453 StringRef Name = StringRef(F).drop_front();
454 if (!llvm::is_contained(TargetIDFeatures, Name))
455 continue;
456 assert(!OffloadArchFeatures.contains(Name));
457 OffloadArchFeatures[Name] = IsOn;
458 }
459 return true;
460 }
461
462 std::optional<std::string> getTargetID() const override {
463 if (!isAMDGCN(getTriple()))
464 return std::nullopt;
465 // When -target-cpu is not set, we assume generic code that it is valid
466 // for all GPU and use an empty string as target ID to represent that.
467 if (GPUKind == llvm::AMDGPU::GK_NONE)
468 return std::string("");
469 return getCanonicalTargetID(getArchNameAMDGCN(GPUKind),
470 OffloadArchFeatures);
471 }
472};
473
474} // namespace targets
475} // namespace clang
476
477#endif // LLVM_CLANG_LIB_BASIC_TARGETS_AMDGPU_H
Defines the clang::TargetOptions class.
SourceLocation Begin
Concrete class used by the front-end to report problems and issues.
Definition: Diagnostic.h:192
Keeps track of the various options that can be enabled, which controls the dialect of C or C++ that i...
Definition: LangOptions.h:82
Exposes information about the current target.
Definition: TargetInfo.h:206
BuiltinVaListKind
The different kinds of __builtin_va_list types defined by the target implementation.
Definition: TargetInfo.h:290
Options for controlling the target.
Definition: TargetOptions.h:26
const llvm::omp::GV & getGridValue() const override
Definition: AMDGPU.h:379
std::string_view getClobbers() const override
Returns a string of target-specific clobbers, in LLVM format.
Definition: AMDGPU.h:122
uint64_t getPointerAlignV(LangAS AddrSpace) const override
Definition: AMDGPU.h:112
LangAS getOpenCLBuiltinAddressSpace(unsigned AS) const override
Map from the address space field in builtin description strings to the language address space.
Definition: AMDGPU.h:343
uint64_t getPointerWidthV(LangAS AS) const override
Definition: AMDGPU.h:101
bool setCPU(const std::string &Name) override
Target the specified CPU.
Definition: AMDGPU.h:279
ArrayRef< TargetInfo::GCCRegAlias > getGCCRegAliases() const override
Definition: AMDGPU.h:126
bool hasBFloat16Type() const override
Determine whether the _BFloat16 type is supported on this target.
Definition: AMDGPU.h:120
uint64_t getNullPointerValue(LangAS AS) const override
Get integer value for null pointer.
Definition: AMDGPU.h:428
LangAS getCUDABuiltinAddressSpace(unsigned AS) const override
Map from the address space field in builtin description strings to the language address space.
Definition: AMDGPU.h:360
bool useFP16ConversionIntrinsics() const override
Check whether llvm intrinsics such as llvm.convert.to.fp16 should be used to convert to and from __fp...
Definition: AMDGPU.h:262
bool handleTargetFeatures(std::vector< std::string > &Features, DiagnosticsEngine &Diags) override
Perform initialization based on the user configured set of features (e.g., +sse4).
Definition: AMDGPU.h:440
bool validateAsmConstraint(const char *&Name, TargetInfo::ConstraintInfo &Info) const override
Accepted register names: (n, m is unsigned integer, n < m) v s a {vn}, {v[n]} {sn},...
Definition: AMDGPU.h:141
std::optional< std::string > getTargetID() const override
Returns the target ID if supported.
Definition: AMDGPU.h:462
std::optional< unsigned > getDWARFAddressSpace(unsigned AddressSpace) const override
Definition: AMDGPU.h:402
std::string convertConstraint(const char *&Constraint) const override
Definition: AMDGPU.h:239
unsigned getVtblPtrAddressSpace() const override
Definition: AMDGPU.h:391
std::optional< LangAS > getConstantAddressSpace() const override
Return an AST address space which can be used opportunistically for constant global memory.
Definition: AMDGPU.h:375
bool isValidCPUName(StringRef Name) const override
brief Determine whether this TargetInfo supports the given CPU name.
Definition: AMDGPU.h:271
bool hasBitIntType() const override
Determine whether the _BitInt type is supported on this target.
Definition: AMDGPU.h:436
uint64_t getMaxPointerWidth() const override
Return the maximum width of pointers on this target.
Definition: AMDGPU.h:116
CallingConvCheckResult checkCallingConvention(CallingConv CC) const override
Determines whether a given calling convention is valid for the target.
Definition: AMDGPU.h:414
LangAS getOpenCLTypeAddrSpace(OpenCLTypeKind TK) const override
Get address space for OpenCL type.
Definition: AMDGPU.h:328
void setSupportedOpenCLOpts() override
Set supported OpenCL extensions and optional core features.
Definition: AMDGPU.h:291
BuiltinVaListKind getBuiltinVaListKind() const override
Returns the kind of __builtin_va_list type that should be used with this target.
Definition: AMDGPU.h:267
Defines the clang::TargetInfo interface.
unsigned[(unsigned) LangAS::FirstTargetAddressSpace] LangASMap
The type of a lookup table which maps from language-specific address spaces to target-specific ones.
Definition: AddressSpaces.h:73
OpenCLTypeKind
OpenCL type kinds.
Definition: TargetInfo.h:192
@ OCLTK_ReserveID
Definition: TargetInfo.h:199
@ OCLTK_Image
Definition: TargetInfo.h:196
@ OCLTK_ClkEvent
Definition: TargetInfo.h:194
@ OCLTK_Queue
Definition: TargetInfo.h:198
llvm::SmallVector< llvm::StringRef, 4 > getAllPossibleTargetIDFeatures(const llvm::Triple &T, llvm::StringRef Processor)
Get all feature strings that can be used in target ID for Processor.
Definition: TargetID.cpp:38
LangAS
Defines the address space values used by the address space qualifier of QualType.
Definition: AddressSpaces.h:25
std::string getCanonicalTargetID(llvm::StringRef Processor, const llvm::StringMap< bool > &Features)
Returns canonical target ID, assuming Processor is canonical and all entries in Features are valid.
Definition: TargetID.cpp:130
CallingConv
CallingConv - Specifies the calling convention that a function uses.
Definition: Specifiers.h:269
@ CC_OpenCLKernel
Definition: Specifiers.h:283
@ CC_C
Definition: Specifiers.h:270
@ CC_AMDGPUKernelCall
Definition: Specifiers.h:290
LangAS getLangASFromTargetAS(unsigned TargetAS)
Definition: AddressSpaces.h:86
void setRequiresImmediate(int Min, int Max)
Definition: TargetInfo.h:1094