clang  16.0.0git
AMDGPU.h
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1 //===--- AMDGPU.h - Declare AMDGPU target feature support -------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file declares AMDGPU TargetInfo objects.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_CLANG_LIB_BASIC_TARGETS_AMDGPU_H
14 #define LLVM_CLANG_LIB_BASIC_TARGETS_AMDGPU_H
15 
16 #include "clang/Basic/TargetID.h"
17 #include "clang/Basic/TargetInfo.h"
19 #include "llvm/ADT/StringSet.h"
20 #include "llvm/ADT/Triple.h"
21 #include "llvm/Support/Compiler.h"
22 #include "llvm/Support/TargetParser.h"
23 
24 namespace clang {
25 namespace targets {
26 
27 class LLVM_LIBRARY_VISIBILITY AMDGPUTargetInfo final : public TargetInfo {
28 
29  static const Builtin::Info BuiltinInfo[];
30  static const char *const GCCRegNames[];
31 
32  enum AddrSpace {
33  Generic = 0,
34  Global = 1,
35  Local = 3,
36  Constant = 4,
37  Private = 5
38  };
39  static const LangASMap AMDGPUDefIsGenMap;
40  static const LangASMap AMDGPUDefIsPrivMap;
41 
42  llvm::AMDGPU::GPUKind GPUKind;
43  unsigned GPUFeatures;
44  unsigned WavefrontSize;
45 
46  /// Target ID is device name followed by optional feature name postfixed
47  /// by plus or minus sign delimitted by colon, e.g. gfx908:xnack+:sramecc-.
48  /// If the target ID contains feature+, map it to true.
49  /// If the target ID contains feature-, map it to false.
50  /// If the target ID does not contain a feature (default), do not map it.
51  llvm::StringMap<bool> OffloadArchFeatures;
52  std::string TargetID;
53 
54  bool hasFP64() const {
55  return getTriple().getArch() == llvm::Triple::amdgcn ||
56  !!(GPUFeatures & llvm::AMDGPU::FEATURE_FP64);
57  }
58 
59  /// Has fast fma f32
60  bool hasFastFMAF() const {
61  return !!(GPUFeatures & llvm::AMDGPU::FEATURE_FAST_FMA_F32);
62  }
63 
64  /// Has fast fma f64
65  bool hasFastFMA() const {
66  return getTriple().getArch() == llvm::Triple::amdgcn;
67  }
68 
69  bool hasFMAF() const {
70  return getTriple().getArch() == llvm::Triple::amdgcn ||
71  !!(GPUFeatures & llvm::AMDGPU::FEATURE_FMA);
72  }
73 
74  bool hasFullRateDenormalsF32() const {
75  return !!(GPUFeatures & llvm::AMDGPU::FEATURE_FAST_DENORMAL_F32);
76  }
77 
78  bool hasLDEXPF() const {
79  return getTriple().getArch() == llvm::Triple::amdgcn ||
80  !!(GPUFeatures & llvm::AMDGPU::FEATURE_LDEXP);
81  }
82 
83  static bool isAMDGCN(const llvm::Triple &TT) {
84  return TT.getArch() == llvm::Triple::amdgcn;
85  }
86 
87  static bool isR600(const llvm::Triple &TT) {
88  return TT.getArch() == llvm::Triple::r600;
89  }
90 
91 public:
92  AMDGPUTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts);
93 
94  void setAddressSpaceMap(bool DefaultIsPrivate);
95 
96  void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) override;
97 
98  uint64_t getPointerWidthV(LangAS AS) const override {
99  if (isR600(getTriple()))
100  return 32;
101  unsigned TargetAS = getTargetAddressSpace(AS);
102 
103  if (TargetAS == Private || TargetAS == Local)
104  return 32;
105 
106  return 64;
107  }
108 
109  uint64_t getPointerAlignV(LangAS AddrSpace) const override {
110  return getPointerWidthV(AddrSpace);
111  }
112 
113  uint64_t getMaxPointerWidth() const override {
114  return getTriple().getArch() == llvm::Triple::amdgcn ? 64 : 32;
115  }
116 
117  const char *getClobbers() const override { return ""; }
118 
119  ArrayRef<const char *> getGCCRegNames() const override;
120 
122  return None;
123  }
124 
125  /// Accepted register names: (n, m is unsigned integer, n < m)
126  /// v
127  /// s
128  /// a
129  /// {vn}, {v[n]}
130  /// {sn}, {s[n]}
131  /// {an}, {a[n]}
132  /// {S} , where S is a special register name
133  ////{v[n:m]}
134  /// {s[n:m]}
135  /// {a[n:m]}
136  bool validateAsmConstraint(const char *&Name,
137  TargetInfo::ConstraintInfo &Info) const override {
138  static const ::llvm::StringSet<> SpecialRegs({
139  "exec", "vcc", "flat_scratch", "m0", "scc", "tba", "tma",
140  "flat_scratch_lo", "flat_scratch_hi", "vcc_lo", "vcc_hi", "exec_lo",
141  "exec_hi", "tma_lo", "tma_hi", "tba_lo", "tba_hi",
142  });
143 
144  switch (*Name) {
145  case 'I':
146  Info.setRequiresImmediate(-16, 64);
147  return true;
148  case 'J':
149  Info.setRequiresImmediate(-32768, 32767);
150  return true;
151  case 'A':
152  case 'B':
153  case 'C':
154  Info.setRequiresImmediate();
155  return true;
156  default:
157  break;
158  }
159 
160  StringRef S(Name);
161 
162  if (S == "DA" || S == "DB") {
163  Name++;
164  Info.setRequiresImmediate();
165  return true;
166  }
167 
168  bool HasLeftParen = false;
169  if (S.front() == '{') {
170  HasLeftParen = true;
171  S = S.drop_front();
172  }
173  if (S.empty())
174  return false;
175  if (S.front() != 'v' && S.front() != 's' && S.front() != 'a') {
176  if (!HasLeftParen)
177  return false;
178  auto E = S.find('}');
179  if (!SpecialRegs.count(S.substr(0, E)))
180  return false;
181  S = S.drop_front(E + 1);
182  if (!S.empty())
183  return false;
184  // Found {S} where S is a special register.
185  Info.setAllowsRegister();
186  Name = S.data() - 1;
187  return true;
188  }
189  S = S.drop_front();
190  if (!HasLeftParen) {
191  if (!S.empty())
192  return false;
193  // Found s, v or a.
194  Info.setAllowsRegister();
195  Name = S.data() - 1;
196  return true;
197  }
198  bool HasLeftBracket = false;
199  if (!S.empty() && S.front() == '[') {
200  HasLeftBracket = true;
201  S = S.drop_front();
202  }
203  unsigned long long N;
204  if (S.empty() || consumeUnsignedInteger(S, 10, N))
205  return false;
206  if (!S.empty() && S.front() == ':') {
207  if (!HasLeftBracket)
208  return false;
209  S = S.drop_front();
210  unsigned long long M;
211  if (consumeUnsignedInteger(S, 10, M) || N >= M)
212  return false;
213  }
214  if (HasLeftBracket) {
215  if (S.empty() || S.front() != ']')
216  return false;
217  S = S.drop_front();
218  }
219  if (S.empty() || S.front() != '}')
220  return false;
221  S = S.drop_front();
222  if (!S.empty())
223  return false;
224  // Found {vn}, {sn}, {an}, {v[n]}, {s[n]}, {a[n]}, {v[n:m]}, {s[n:m]}
225  // or {a[n:m]}.
226  Info.setAllowsRegister();
227  Name = S.data() - 1;
228  return true;
229  }
230 
231  // \p Constraint will be left pointing at the last character of
232  // the constraint. In practice, it won't be changed unless the
233  // constraint is longer than one character.
234  std::string convertConstraint(const char *&Constraint) const override {
235 
236  StringRef S(Constraint);
237  if (S == "DA" || S == "DB") {
238  return std::string("^") + std::string(Constraint++, 2);
239  }
240 
241  const char *Begin = Constraint;
242  TargetInfo::ConstraintInfo Info("", "");
243  if (validateAsmConstraint(Constraint, Info))
244  return std::string(Begin).substr(0, Constraint - Begin + 1);
245 
246  Constraint = Begin;
247  return std::string(1, *Constraint);
248  }
249 
250  bool
251  initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags,
252  StringRef CPU,
253  const std::vector<std::string> &FeatureVec) const override;
254 
255  ArrayRef<Builtin::Info> getTargetBuiltins() const override;
256 
257  bool useFP16ConversionIntrinsics() const override { return false; }
258 
259  void getTargetDefines(const LangOptions &Opts,
260  MacroBuilder &Builder) const override;
261 
264  }
265 
266  bool isValidCPUName(StringRef Name) const override {
267  if (getTriple().getArch() == llvm::Triple::amdgcn)
268  return llvm::AMDGPU::parseArchAMDGCN(Name) != llvm::AMDGPU::GK_NONE;
269  return llvm::AMDGPU::parseArchR600(Name) != llvm::AMDGPU::GK_NONE;
270  }
271 
272  void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
273 
274  bool setCPU(const std::string &Name) override {
275  if (getTriple().getArch() == llvm::Triple::amdgcn) {
276  GPUKind = llvm::AMDGPU::parseArchAMDGCN(Name);
277  GPUFeatures = llvm::AMDGPU::getArchAttrAMDGCN(GPUKind);
278  } else {
279  GPUKind = llvm::AMDGPU::parseArchR600(Name);
280  GPUFeatures = llvm::AMDGPU::getArchAttrR600(GPUKind);
281  }
282 
283  return GPUKind != llvm::AMDGPU::GK_NONE;
284  }
285 
286  void setSupportedOpenCLOpts() override {
287  auto &Opts = getSupportedOpenCLOpts();
288  Opts["cl_clang_storage_class_specifiers"] = true;
289  Opts["__cl_clang_variadic_functions"] = true;
290  Opts["__cl_clang_function_pointers"] = true;
291  Opts["__cl_clang_non_portable_kernel_param_types"] = true;
292  Opts["__cl_clang_bitfields"] = true;
293 
294  bool IsAMDGCN = isAMDGCN(getTriple());
295 
296  Opts["cl_khr_fp64"] = hasFP64();
297  Opts["__opencl_c_fp64"] = hasFP64();
298 
299  if (IsAMDGCN || GPUKind >= llvm::AMDGPU::GK_CEDAR) {
300  Opts["cl_khr_byte_addressable_store"] = true;
301  Opts["cl_khr_global_int32_base_atomics"] = true;
302  Opts["cl_khr_global_int32_extended_atomics"] = true;
303  Opts["cl_khr_local_int32_base_atomics"] = true;
304  Opts["cl_khr_local_int32_extended_atomics"] = true;
305  }
306 
307  if (IsAMDGCN) {
308  Opts["cl_khr_fp16"] = true;
309  Opts["cl_khr_int64_base_atomics"] = true;
310  Opts["cl_khr_int64_extended_atomics"] = true;
311  Opts["cl_khr_mipmap_image"] = true;
312  Opts["cl_khr_mipmap_image_writes"] = true;
313  Opts["cl_khr_subgroups"] = true;
314  Opts["cl_amd_media_ops"] = true;
315  Opts["cl_amd_media_ops2"] = true;
316 
317  Opts["__opencl_c_images"] = true;
318  Opts["__opencl_c_3d_image_writes"] = true;
319  Opts["cl_khr_3d_image_writes"] = true;
320  }
321  }
322 
324  switch (TK) {
325  case OCLTK_Image:
327 
328  case OCLTK_ClkEvent:
329  case OCLTK_Queue:
330  case OCLTK_ReserveID:
331  return LangAS::opencl_global;
332 
333  default:
335  }
336  }
337 
338  LangAS getOpenCLBuiltinAddressSpace(unsigned AS) const override {
339  switch (AS) {
340  case 0:
341  return LangAS::opencl_generic;
342  case 1:
343  return LangAS::opencl_global;
344  case 3:
345  return LangAS::opencl_local;
346  case 4:
348  case 5:
349  return LangAS::opencl_private;
350  default:
351  return getLangASFromTargetAS(AS);
352  }
353  }
354 
355  LangAS getCUDABuiltinAddressSpace(unsigned AS) const override {
356  switch (AS) {
357  case 0:
358  return LangAS::Default;
359  case 1:
360  return LangAS::cuda_device;
361  case 3:
362  return LangAS::cuda_shared;
363  case 4:
364  return LangAS::cuda_constant;
365  default:
366  return getLangASFromTargetAS(AS);
367  }
368  }
369 
371  return getLangASFromTargetAS(Constant);
372  }
373 
374  const llvm::omp::GV &getGridValue() const override {
375  switch (WavefrontSize) {
376  case 32:
377  return llvm::omp::getAMDGPUGridValues<32>();
378  case 64:
379  return llvm::omp::getAMDGPUGridValues<64>();
380  default:
381  llvm_unreachable("getGridValue not implemented for this wavesize");
382  }
383  }
384 
385  /// \returns Target specific vtbl ptr address space.
386  unsigned getVtblPtrAddressSpace() const override {
387  return static_cast<unsigned>(Constant);
388  }
389 
390  /// \returns If a target requires an address within a target specific address
391  /// space \p AddressSpace to be converted in order to be used, then return the
392  /// corresponding target specific DWARF address space.
393  ///
394  /// \returns Otherwise return None and no conversion will be emitted in the
395  /// DWARF.
397  getDWARFAddressSpace(unsigned AddressSpace) const override {
398  const unsigned DWARF_Private = 1;
399  const unsigned DWARF_Local = 2;
400  if (AddressSpace == Private) {
401  return DWARF_Private;
402  } else if (AddressSpace == Local) {
403  return DWARF_Local;
404  } else {
405  return None;
406  }
407  }
408 
410  switch (CC) {
411  default:
412  return CCCR_Warning;
413  case CC_C:
414  case CC_OpenCLKernel:
415  case CC_AMDGPUKernelCall:
416  return CCCR_OK;
417  }
418  }
419 
420  // In amdgcn target the null pointer in global, constant, and generic
421  // address space has value 0 but in private and local address space has
422  // value ~0.
423  uint64_t getNullPointerValue(LangAS AS) const override {
424  // FIXME: Also should handle region.
425  return (AS == LangAS::opencl_local || AS == LangAS::opencl_private)
426  ? ~0 : 0;
427  }
428 
429  void setAuxTarget(const TargetInfo *Aux) override;
430 
431  bool hasBitIntType() const override { return true; }
432 
433  // Record offload arch features since they are needed for defining the
434  // pre-defined macros.
435  bool handleTargetFeatures(std::vector<std::string> &Features,
436  DiagnosticsEngine &Diags) override {
437  auto TargetIDFeatures =
438  getAllPossibleTargetIDFeatures(getTriple(), getArchNameAMDGCN(GPUKind));
439  for (const auto &F : Features) {
440  assert(F.front() == '+' || F.front() == '-');
441  if (F == "+wavefrontsize64")
442  WavefrontSize = 64;
443  bool IsOn = F.front() == '+';
444  StringRef Name = StringRef(F).drop_front();
445  if (!llvm::is_contained(TargetIDFeatures, Name))
446  continue;
447  assert(OffloadArchFeatures.find(Name) == OffloadArchFeatures.end());
448  OffloadArchFeatures[Name] = IsOn;
449  }
450  return true;
451  }
452 
454  if (!isAMDGCN(getTriple()))
455  return llvm::None;
456  // When -target-cpu is not set, we assume generic code that it is valid
457  // for all GPU and use an empty string as target ID to represent that.
458  if (GPUKind == llvm::AMDGPU::GK_NONE)
459  return std::string("");
460  return getCanonicalTargetID(getArchNameAMDGCN(GPUKind),
461  OffloadArchFeatures);
462  }
463 };
464 
465 } // namespace targets
466 } // namespace clang
467 
468 #endif // LLVM_CLANG_LIB_BASIC_TARGETS_AMDGPU_H
clang::LangAS::cuda_shared
@ cuda_shared
clang::targets::AMDGPUTargetInfo::hasBitIntType
bool hasBitIntType() const override
Determine whether the _BitInt type is supported on this target.
Definition: AMDGPU.h:431
clang::LangAS::opencl_private
@ opencl_private
clang::targets::AMDGPUTargetInfo::getCUDABuiltinAddressSpace
LangAS getCUDABuiltinAddressSpace(unsigned AS) const override
Map from the address space field in builtin description strings to the language address space.
Definition: AMDGPU.h:355
string
string(SUBSTRING ${CMAKE_CURRENT_BINARY_DIR} 0 ${PATH_LIB_START} PATH_HEAD) string(SUBSTRING $
Definition: CMakeLists.txt:22
clang::LangAS::cuda_device
@ cuda_device
clang::targets::AMDGPUTargetInfo::handleTargetFeatures
bool handleTargetFeatures(std::vector< std::string > &Features, DiagnosticsEngine &Diags) override
Perform initialization based on the user configured set of features (e.g., +sse4).
Definition: AMDGPU.h:435
TargetInfo.h
clang::targets::AMDGPUTargetInfo::validateAsmConstraint
bool validateAsmConstraint(const char *&Name, TargetInfo::ConstraintInfo &Info) const override
Accepted register names: (n, m is unsigned integer, n < m) v s a {vn}, {v[n]} {sn},...
Definition: AMDGPU.h:136
clang::targets::AMDGPUTargetInfo::getPointerWidthV
uint64_t getPointerWidthV(LangAS AS) const override
Definition: AMDGPU.h:98
clang::DiagnosticsEngine
Concrete class used by the front-end to report problems and issues.
Definition: Diagnostic.h:192
clang::TargetInfo
Exposes information about the current target.
Definition: TargetInfo.h:205
clang::OCLTK_Image
@ OCLTK_Image
Definition: TargetInfo.h:196
clang::targets::AMDGPUTargetInfo::isValidCPUName
bool isValidCPUName(StringRef Name) const override
brief Determine whether this TargetInfo supports the given CPU name.
Definition: AMDGPU.h:266
llvm::Optional
Definition: LLVM.h:40
clang::TargetInfo::BuiltinVaListKind
BuiltinVaListKind
The different kinds of __builtin_va_list types defined by the target implementation.
Definition: TargetInfo.h:289
clang::TargetInfo::ConstraintInfo::setAllowsRegister
void setAllowsRegister()
Definition: TargetInfo.h:1096
clang::targets::AMDGPUTargetInfo::checkCallingConvention
CallingConvCheckResult checkCallingConvention(CallingConv CC) const override
Determines whether a given calling convention is valid for the target.
Definition: AMDGPU.h:409
clang::CC_OpenCLKernel
@ CC_OpenCLKernel
Definition: Specifiers.h:280
clang::targets::AMDGPUTargetInfo::getBuiltinVaListKind
BuiltinVaListKind getBuiltinVaListKind() const override
Returns the kind of __builtin_va_list type that should be used with this target.
Definition: AMDGPU.h:262
BuiltinInfo
static const Builtin::Info BuiltinInfo[]
Definition: Builtins.cpp:21
clang::LangAS::opencl_local
@ opencl_local
clang::LangASMap
unsigned[(unsigned) LangAS::FirstTargetAddressSpace] LangASMap
The type of a lookup table which maps from language-specific address spaces to target-specific ones.
Definition: AddressSpaces.h:70
clang::TargetInfo::ConstraintInfo::setRequiresImmediate
void setRequiresImmediate(int Min, int Max)
Definition: TargetInfo.h:1098
clang::OCLTK_ClkEvent
@ OCLTK_ClkEvent
Definition: TargetInfo.h:194
clang::targets::AMDGPUTargetInfo::getConstantAddressSpace
llvm::Optional< LangAS > getConstantAddressSpace() const override
Return an AST address space which can be used opportunistically for constant global memory.
Definition: AMDGPU.h:370
hlsl::uint64_t
unsigned long uint64_t
Definition: hlsl_basic_types.h:25
clang::CC_AMDGPUKernelCall
@ CC_AMDGPUKernelCall
Definition: Specifiers.h:287
clang::targets::GCCRegNames
static const char *const GCCRegNames[]
Definition: X86.cpp:43
clang::targets::AMDGPUTargetInfo::getOpenCLBuiltinAddressSpace
LangAS getOpenCLBuiltinAddressSpace(unsigned AS) const override
Map from the address space field in builtin description strings to the language address space.
Definition: AMDGPU.h:338
clang::OCLTK_Queue
@ OCLTK_Queue
Definition: TargetInfo.h:198
clang::targets::AMDGPUTargetInfo::getOpenCLTypeAddrSpace
LangAS getOpenCLTypeAddrSpace(OpenCLTypeKind TK) const override
Get address space for OpenCL type.
Definition: AMDGPU.h:323
clang::getLangASFromTargetAS
LangAS getLangASFromTargetAS(unsigned TargetAS)
Definition: AddressSpaces.h:83
clang::LangAS::opencl_constant
@ opencl_constant
clang::CallingConv
CallingConv
CallingConv - Specifies the calling convention that a function uses.
Definition: Specifiers.h:266
TargetID.h
clang::targets::AMDGPUTargetInfo::getClobbers
const char * getClobbers() const override
Returns a string of target-specific clobbers, in LLVM format.
Definition: AMDGPU.h:117
clang::targets::AMDGPUTargetInfo::getGCCRegAliases
ArrayRef< TargetInfo::GCCRegAlias > getGCCRegAliases() const override
Definition: AMDGPU.h:121
clang::targets::AMDGPUTargetInfo::convertConstraint
std::string convertConstraint(const char *&Constraint) const override
Definition: AMDGPU.h:234
clang::TargetInfo::getOpenCLTypeAddrSpace
virtual LangAS getOpenCLTypeAddrSpace(OpenCLTypeKind TK) const
Get address space for OpenCL type.
Definition: TargetInfo.cpp:566
clang::CC_C
@ CC_C
Definition: Specifiers.h:267
clang::LangAS
LangAS
Defines the address space values used by the address space qualifier of QualType.
Definition: AddressSpaces.h:25
clang::targets::AMDGPUTargetInfo::getTargetID
Optional< std::string > getTargetID() const override
Returns the target ID if supported.
Definition: AMDGPU.h:453
clang::targets::AMDGPUTargetInfo::getVtblPtrAddressSpace
unsigned getVtblPtrAddressSpace() const override
Definition: AMDGPU.h:386
TargetOptions.h
Begin
SourceLocation Begin
Definition: USRLocFinder.cpp:165
clang::targets::AMDGPUTargetInfo::getMaxPointerWidth
uint64_t getMaxPointerWidth() const override
Return the maximum width of pointers on this target.
Definition: AMDGPU.h:113
llvm::ArrayRef< const char * >
clang::LangAS::opencl_global
@ opencl_global
clang::targets::AMDGPUTargetInfo::getPointerAlignV
uint64_t getPointerAlignV(LangAS AddrSpace) const override
Definition: AMDGPU.h:109
clang::TargetInfo::CharPtrBuiltinVaList
@ CharPtrBuiltinVaList
typedef char* __builtin_va_list;
Definition: TargetInfo.h:291
clang::getCanonicalTargetID
std::string getCanonicalTargetID(llvm::StringRef Processor, const llvm::StringMap< bool > &Features)
Returns canonical target ID, assuming Processor is canonical and all entries in Features are valid.
Definition: TargetID.cpp:129
clang::targets::AMDGPUTargetInfo::getNullPointerValue
uint64_t getNullPointerValue(LangAS AS) const override
Get integer value for null pointer.
Definition: AMDGPU.h:423
clang::TargetInfo::ConstraintInfo
Definition: TargetInfo.h:1032
clang::LangOptions
Keeps track of the various options that can be enabled, which controls the dialect of C or C++ that i...
Definition: LangOptions.h:81
clang::getAllPossibleTargetIDFeatures
llvm::SmallVector< llvm::StringRef, 4 > getAllPossibleTargetIDFeatures(const llvm::Triple &T, llvm::StringRef Processor)
Get all feature strings that can be used in target ID for Processor.
Definition: TargetID.cpp:37
clang::targets::AMDGPUTargetInfo
Definition: AMDGPU.h:27
clang::LangAS::cuda_constant
@ cuda_constant
clang::LangAS::Default
@ Default
clang::OpenCLTypeKind
OpenCLTypeKind
OpenCL type kinds.
Definition: TargetInfo.h:192
clang
Definition: CalledOnceCheck.h:17
clang::targets::AMDGPUTargetInfo::setCPU
bool setCPU(const std::string &Name) override
Target the specified CPU.
Definition: AMDGPU.h:274
clang::Builtin::Info
Definition: Builtins.h:59
clang::targets::AMDGPUTargetInfo::useFP16ConversionIntrinsics
bool useFP16ConversionIntrinsics() const override
Check whether llvm intrinsics such as llvm.convert.to.fp16 should be used to convert to and from __fp...
Definition: AMDGPU.h:257
clang::targets::AMDGPUTargetInfo::getGridValue
const llvm::omp::GV & getGridValue() const override
Definition: AMDGPU.h:374
clang::CudaArch::Generic
@ Generic
clang::TargetOptions
Options for controlling the target.
Definition: TargetOptions.h:26
clang::OCLTK_ReserveID
@ OCLTK_ReserveID
Definition: TargetInfo.h:199
llvm::SmallVectorImpl
Definition: Randstruct.h:18
clang::targets::AMDGPUTargetInfo::getDWARFAddressSpace
Optional< unsigned > getDWARFAddressSpace(unsigned AddressSpace) const override
Definition: AMDGPU.h:397
clang::targets::AMDGPUTargetInfo::setSupportedOpenCLOpts
void setSupportedOpenCLOpts() override
Set supported OpenCL extensions and optional core features.
Definition: AMDGPU.h:286
clang::TargetInfo::CallingConvCheckResult
CallingConvCheckResult
Definition: TargetInfo.h:1552
clang::MacroBuilder
Definition: MacroBuilder.h:23
clang::LangAS::opencl_generic
@ opencl_generic