14#include "llvm/ADT/StringSwitch.h"
15#include "llvm/Option/ArgList.h"
25 StringRef &CPUName, StringRef &ABIName) {
26 const char *DefMips32CPU =
"mips32r2";
27 const char *DefMips64CPU =
"mips64r2";
31 if (Triple.getVendor() == llvm::Triple::ImaginationTechnologies &&
32 Triple.isGNUEnvironment()) {
33 DefMips32CPU =
"mips32r6";
34 DefMips64CPU =
"mips64r6";
37 if (Triple.getSubArch() == llvm::Triple::MipsSubArch_r6) {
38 DefMips32CPU =
"mips32r6";
39 DefMips64CPU =
"mips64r6";
43 if (Triple.isOSOpenBSD())
44 DefMips64CPU =
"mips3";
48 if (Triple.isOSFreeBSD()) {
49 DefMips32CPU =
"mips2";
50 DefMips64CPU =
"mips3";
53 if (Arg *A = Args.getLastArg(clang::driver::options::OPT_march_EQ,
54 options::OPT_mcpu_EQ))
55 CPUName = A->getValue();
57 if (Arg *A = Args.getLastArg(options::OPT_mabi_EQ)) {
58 ABIName = A->getValue();
61 ABIName = llvm::StringSwitch<llvm::StringRef>(ABIName)
68 if (CPUName.empty() && ABIName.empty()) {
69 switch (Triple.getArch()) {
71 llvm_unreachable(
"Unexpected triple arch name");
72 case llvm::Triple::mips:
73 case llvm::Triple::mipsel:
74 CPUName = DefMips32CPU;
76 case llvm::Triple::mips64:
77 case llvm::Triple::mips64el:
78 CPUName = DefMips64CPU;
83 if (ABIName.empty() && (Triple.getEnvironment() == llvm::Triple::GNUABIN32))
86 if (ABIName.empty() &&
87 (Triple.getVendor() == llvm::Triple::MipsTechnologies ||
88 Triple.getVendor() == llvm::Triple::ImaginationTechnologies)) {
89 ABIName = llvm::StringSwitch<const char *>(CPUName)
95 .Case(
"mips32",
"o32")
96 .Case(
"mips32r2",
"o32")
97 .Case(
"mips32r3",
"o32")
98 .Case(
"mips32r5",
"o32")
99 .Case(
"mips32r6",
"o32")
100 .Case(
"mips64",
"n64")
101 .Case(
"mips64r2",
"n64")
102 .Case(
"mips64r3",
"n64")
103 .Case(
"mips64r5",
"n64")
104 .Case(
"mips64r6",
"n64")
105 .Case(
"octeon",
"n64")
106 .Case(
"p5600",
"o32")
110 if (ABIName.empty()) {
112 ABIName = Triple.isMIPS32() ?
"o32" :
"n64";
115 if (CPUName.empty()) {
117 CPUName = llvm::StringSwitch<const char *>(ABIName)
118 .Case(
"o32", DefMips32CPU)
119 .Cases(
"n32",
"n64", DefMips64CPU)
127 const llvm::Triple &Triple) {
128 StringRef CPUName, ABIName;
130 return llvm::StringSwitch<std::string>(ABIName)
138 return llvm::StringSwitch<llvm::StringRef>(ABI)
147 const llvm::Triple &Triple) {
150 Args.getLastArg(options::OPT_msoft_float, options::OPT_mhard_float,
151 options::OPT_mfloat_abi_EQ)) {
152 if (A->getOption().matches(options::OPT_msoft_float))
153 ABI = mips::FloatABI::Soft;
154 else if (A->getOption().matches(options::OPT_mhard_float))
155 ABI = mips::FloatABI::Hard;
157 ABI = llvm::StringSwitch<mips::FloatABI>(A->getValue())
158 .Case(
"soft", mips::FloatABI::Soft)
159 .Case(
"hard", mips::FloatABI::Hard)
160 .Default(mips::FloatABI::Invalid);
161 if (ABI == mips::FloatABI::Invalid && !StringRef(A->getValue()).empty()) {
162 D.
Diag(clang::diag::err_drv_invalid_mfloat_abi) << A->getAsString(Args);
163 ABI = mips::FloatABI::Hard;
169 if (ABI == mips::FloatABI::Invalid) {
170 if (Triple.isOSFreeBSD()) {
172 ABI = mips::FloatABI::Soft;
177 ABI = mips::FloatABI::Hard;
181 assert(ABI != mips::FloatABI::Invalid &&
"must select an ABI");
187 std::vector<StringRef> &Features) {
221 bool IsN64 = ABIName ==
"64";
225 Arg *LastPICArg = Args.getLastArg(options::OPT_fPIC, options::OPT_fno_PIC,
226 options::OPT_fpic, options::OPT_fno_pic,
227 options::OPT_fPIE, options::OPT_fno_PIE,
228 options::OPT_fpie, options::OPT_fno_pie);
230 Option O = LastPICArg->getOption();
232 (O.matches(options::OPT_fno_PIC) || O.matches(options::OPT_fno_pic) ||
233 O.matches(options::OPT_fno_PIE) || O.matches(options::OPT_fno_pie));
235 (O.matches(options::OPT_fPIC) || O.matches(options::OPT_fpic) ||
236 O.matches(options::OPT_fPIE) || O.matches(options::OPT_fpie));
239 bool UseAbiCalls =
false;
242 Args.getLastArg(options::OPT_mabicalls, options::OPT_mno_abicalls);
244 !ABICallsArg || ABICallsArg->getOption().matches(options::OPT_mabicalls);
246 if (IsN64 && NonPIC && (!ABICallsArg || UseAbiCalls)) {
247 D.
Diag(diag::warn_drv_unsupported_pic_with_mabicalls)
248 << LastPICArg->getAsString(Args) << (!ABICallsArg ? 0 : 1);
251 if (ABICallsArg && !UseAbiCalls && IsPIC) {
252 D.
Diag(diag::err_drv_unsupported_noabicalls_pic);
256 Features.push_back(
"+noabicalls");
258 Features.push_back(
"-noabicalls");
260 if (Arg *A = Args.getLastArg(options::OPT_mlong_calls,
261 options::OPT_mno_long_calls)) {
262 if (A->getOption().matches(options::OPT_mno_long_calls))
263 Features.push_back(
"-long-calls");
264 else if (!UseAbiCalls)
265 Features.push_back(
"+long-calls");
267 D.
Diag(diag::warn_drv_unsupported_longcalls) << (ABICallsArg ? 0 : 1);
270 if (Arg *A = Args.getLastArg(options::OPT_mxgot, options::OPT_mno_xgot)) {
271 if (A->getOption().matches(options::OPT_mxgot))
272 Features.push_back(
"+xgot");
274 Features.push_back(
"-xgot");
278 if (FloatABI == mips::FloatABI::Soft) {
282 Features.push_back(
"+soft-float");
285 if (Arg *A = Args.getLastArg(options::OPT_mnan_EQ)) {
286 StringRef Val = StringRef(A->getValue());
289 Features.push_back(
"+nan2008");
291 Features.push_back(
"-nan2008");
292 D.
Diag(diag::warn_target_unsupported_nan2008) << CPUName;
294 }
else if (Val ==
"legacy") {
296 Features.push_back(
"-nan2008");
298 Features.push_back(
"+nan2008");
299 D.
Diag(diag::warn_target_unsupported_nanlegacy) << CPUName;
302 D.
Diag(diag::err_drv_unsupported_option_argument)
303 << A->getSpelling() << Val;
306 if (Arg *A = Args.getLastArg(options::OPT_mabs_EQ)) {
307 StringRef Val = StringRef(A->getValue());
310 Features.push_back(
"+abs2008");
312 Features.push_back(
"-abs2008");
313 D.
Diag(diag::warn_target_unsupported_abs2008) << CPUName;
315 }
else if (Val ==
"legacy") {
317 Features.push_back(
"-abs2008");
319 Features.push_back(
"+abs2008");
320 D.
Diag(diag::warn_target_unsupported_abslegacy) << CPUName;
323 D.
Diag(diag::err_drv_unsupported_option_argument)
324 << A->getSpelling() << Val;
329 options::OPT_mdouble_float,
"single-float");
330 AddTargetFeature(Args, Features, options::OPT_mips16, options::OPT_mno_mips16,
333 options::OPT_mno_micromips,
"micromips");
336 AddTargetFeature(Args, Features, options::OPT_mdspr2, options::OPT_mno_dspr2,
344 if (Arg *A = Args.getLastArg(options::OPT_mfp32, options::OPT_mfpxx,
345 options::OPT_mfp64)) {
346 if (A->getOption().matches(options::OPT_mfp32))
347 Features.push_back(
"-fp64");
348 else if (A->getOption().matches(options::OPT_mfpxx)) {
349 Features.push_back(
"+fpxx");
350 Features.push_back(
"+nooddspreg");
352 Features.push_back(
"+fp64");
354 Features.push_back(
"+fpxx");
355 Features.push_back(
"+nooddspreg");
357 Features.push_back(
"+fp64");
358 Features.push_back(
"+nooddspreg");
362 options::OPT_modd_spreg,
"nooddspreg");
363 AddTargetFeature(Args, Features, options::OPT_mno_madd4, options::OPT_mmadd4,
365 AddTargetFeature(Args, Features, options::OPT_mmt, options::OPT_mno_mt,
"mt");
373 if (Arg *A = Args.getLastArg(options::OPT_mindirect_jump_EQ)) {
374 StringRef Val = StringRef(A->getValue());
375 if (Val ==
"hazard") {
377 Args.getLastArg(options::OPT_mmicromips, options::OPT_mno_micromips);
378 Arg *
C = Args.getLastArg(options::OPT_mips16, options::OPT_mno_mips16);
380 if (B && B->getOption().matches(options::OPT_mmicromips))
381 D.
Diag(diag::err_drv_unsupported_indirect_jump_opt)
382 <<
"hazard" <<
"micromips";
383 else if (
C &&
C->getOption().matches(options::OPT_mips16))
384 D.
Diag(diag::err_drv_unsupported_indirect_jump_opt)
385 <<
"hazard" <<
"mips16";
387 Features.push_back(
"+use-indirect-jump-hazard");
389 D.
Diag(diag::err_drv_unsupported_indirect_jump_opt)
390 <<
"hazard" << CPUName;
392 D.
Diag(diag::err_drv_unknown_indirect_jump_opt) << Val;
422 return llvm::StringSwitch<bool>(CPU)
423 .Case(
"mips32r6",
true)
424 .Case(
"mips64r6",
true)
429 Arg *A = Args.getLastArg(options::OPT_mabi_EQ);
430 return A && (A->getValue() == StringRef(
Value));
434 Arg *A = Args.getLastArg(options::OPT_m_libc_Group);
435 return A && A->getOption().matches(options::OPT_muclibc);
439 const llvm::Triple &Triple) {
440 if (Arg *NaNArg = Args.getLastArg(options::OPT_mnan_EQ))
441 return llvm::StringSwitch<bool>(NaNArg->getValue())
443 .Case(
"legacy",
false)
447 return llvm::StringSwitch<bool>(
getCPUName(D, Args, Triple))
448 .Cases(
"mips32r6",
"mips64r6",
true)
453 if (!Triple.isAndroid())
457 return llvm::StringSwitch<bool>(CPUName)
458 .Case(
"mips32r6",
true)
469 if (
FloatABI == mips::FloatABI::Soft)
472 return llvm::StringSwitch<bool>(CPUName)
473 .Cases(
"mips2",
"mips3",
"mips4",
"mips5",
true)
474 .Cases(
"mips32",
"mips32r2",
"mips32r3",
"mips32r5",
true)
475 .Cases(
"mips64",
"mips64r2",
"mips64r3",
"mips64r5",
true)
480 StringRef CPUName, StringRef ABIName,
482 bool UseFPXX = isFPXXDefault(Triple, CPUName, ABIName, FloatABI);
485 if (Arg *A = Args.getLastArg(options::OPT_msingle_float,
486 options::OPT_mdouble_float))
487 if (A->getOption().matches(options::OPT_msingle_float))
496 return llvm::StringSwitch<bool>(CPU)
497 .Case(
"mips32r2",
true)
498 .Case(
"mips32r3",
true)
499 .Case(
"mips32r5",
true)
500 .Case(
"mips32r6",
true)
501 .Case(
"mips64r2",
true)
502 .Case(
"mips64r3",
true)
503 .Case(
"mips64r5",
true)
504 .Case(
"mips64r6",
true)
505 .Case(
"octeon",
true)
Driver - Encapsulate logic for constructing compilation processes from a set of gcc-driver-like comma...
DiagnosticBuilder Diag(unsigned DiagID) const