clang 20.0.0git
ARM.cpp
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1//===--- ARM.cpp - ARM (not AArch64) Helpers for Tools ----------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#include "ARM.h"
10#include "clang/Driver/Driver.h"
13#include "llvm/ADT/StringSwitch.h"
14#include "llvm/Option/ArgList.h"
15#include "llvm/TargetParser/ARMTargetParser.h"
16#include "llvm/TargetParser/Host.h"
17
18using namespace clang::driver;
19using namespace clang::driver::tools;
20using namespace clang;
21using namespace llvm::opt;
22
23// Get SubArch (vN).
24int arm::getARMSubArchVersionNumber(const llvm::Triple &Triple) {
25 llvm::StringRef Arch = Triple.getArchName();
26 return llvm::ARM::parseArchVersion(Arch);
27}
28
29// True if M-profile.
30bool arm::isARMMProfile(const llvm::Triple &Triple) {
31 llvm::StringRef Arch = Triple.getArchName();
32 return llvm::ARM::parseArchProfile(Arch) == llvm::ARM::ProfileKind::M;
33}
34
35// On Arm the endianness of the output file is determined by the target and
36// can be overridden by the pseudo-target flags '-mlittle-endian'/'-EL' and
37// '-mbig-endian'/'-EB'. Unlike other targets the flag does not result in a
38// normalized triple so we must handle the flag here.
39bool arm::isARMBigEndian(const llvm::Triple &Triple, const ArgList &Args) {
40 if (Arg *A = Args.getLastArg(options::OPT_mlittle_endian,
41 options::OPT_mbig_endian)) {
42 return !A->getOption().matches(options::OPT_mlittle_endian);
43 }
44
45 return Triple.getArch() == llvm::Triple::armeb ||
46 Triple.getArch() == llvm::Triple::thumbeb;
47}
48
49// True if A-profile.
50bool arm::isARMAProfile(const llvm::Triple &Triple) {
51 llvm::StringRef Arch = Triple.getArchName();
52 return llvm::ARM::parseArchProfile(Arch) == llvm::ARM::ProfileKind::A;
53}
54
55/// Is the triple {arm,armeb,thumb,thumbeb}-none-none-{eabi,eabihf} ?
56bool arm::isARMEABIBareMetal(const llvm::Triple &Triple) {
57 auto arch = Triple.getArch();
58 if (arch != llvm::Triple::arm && arch != llvm::Triple::thumb &&
59 arch != llvm::Triple::armeb && arch != llvm::Triple::thumbeb)
60 return false;
61
62 if (Triple.getVendor() != llvm::Triple::UnknownVendor)
63 return false;
64
65 if (Triple.getOS() != llvm::Triple::UnknownOS)
66 return false;
67
68 if (Triple.getEnvironment() != llvm::Triple::EABI &&
69 Triple.getEnvironment() != llvm::Triple::EABIHF)
70 return false;
71
72 return true;
73}
74
75// Get Arch/CPU from args.
76void arm::getARMArchCPUFromArgs(const ArgList &Args, llvm::StringRef &Arch,
77 llvm::StringRef &CPU, bool FromAs) {
78 if (const Arg *A = Args.getLastArg(clang::driver::options::OPT_mcpu_EQ))
79 CPU = A->getValue();
80 if (const Arg *A = Args.getLastArg(options::OPT_march_EQ))
81 Arch = A->getValue();
82 if (!FromAs)
83 return;
84
85 for (const Arg *A :
86 Args.filtered(options::OPT_Wa_COMMA, options::OPT_Xassembler)) {
87 // Use getValues because -Wa can have multiple arguments
88 // e.g. -Wa,-mcpu=foo,-mcpu=bar
89 for (StringRef Value : A->getValues()) {
90 if (Value.starts_with("-mcpu="))
91 CPU = Value.substr(6);
92 if (Value.starts_with("-march="))
93 Arch = Value.substr(7);
94 }
95 }
96}
97
98// Handle -mhwdiv=.
99// FIXME: Use ARMTargetParser.
100static void getARMHWDivFeatures(const Driver &D, const Arg *A,
101 const ArgList &Args, StringRef HWDiv,
102 std::vector<StringRef> &Features) {
103 uint64_t HWDivID = llvm::ARM::parseHWDiv(HWDiv);
104 if (!llvm::ARM::getHWDivFeatures(HWDivID, Features))
105 D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
106}
107
108// Handle -mfpu=.
109static llvm::ARM::FPUKind getARMFPUFeatures(const Driver &D, const Arg *A,
110 const ArgList &Args, StringRef FPU,
111 std::vector<StringRef> &Features) {
112 llvm::ARM::FPUKind FPUKind = llvm::ARM::parseFPU(FPU);
113 if (!llvm::ARM::getFPUFeatures(FPUKind, Features))
114 D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
115 return FPUKind;
116}
117
118// Decode ARM features from string like +[no]featureA+[no]featureB+...
119static bool DecodeARMFeatures(const Driver &D, StringRef text, StringRef CPU,
120 llvm::ARM::ArchKind ArchKind,
121 std::vector<StringRef> &Features,
122 llvm::ARM::FPUKind &ArgFPUKind) {
124 text.split(Split, StringRef("+"), -1, false);
125
126 for (StringRef Feature : Split) {
127 if (!appendArchExtFeatures(CPU, ArchKind, Feature, Features, ArgFPUKind))
128 return false;
129 }
130 return true;
131}
132
133static void DecodeARMFeaturesFromCPU(const Driver &D, StringRef CPU,
134 std::vector<StringRef> &Features) {
135 CPU = CPU.split("+").first;
136 if (CPU != "generic") {
137 llvm::ARM::ArchKind ArchKind = llvm::ARM::parseCPUArch(CPU);
138 uint64_t Extension = llvm::ARM::getDefaultExtensions(CPU, ArchKind);
139 llvm::ARM::getExtensionFeatures(Extension, Features);
140 }
141}
142
143// Check if -march is valid by checking if it can be canonicalised and parsed.
144// getARMArch is used here instead of just checking the -march value in order
145// to handle -march=native correctly.
146static void checkARMArchName(const Driver &D, const Arg *A, const ArgList &Args,
147 llvm::StringRef ArchName, llvm::StringRef CPUName,
148 std::vector<StringRef> &Features,
149 const llvm::Triple &Triple,
150 llvm::ARM::FPUKind &ArgFPUKind) {
151 std::pair<StringRef, StringRef> Split = ArchName.split("+");
152
153 std::string MArch = arm::getARMArch(ArchName, Triple);
154 llvm::ARM::ArchKind ArchKind = llvm::ARM::parseArch(MArch);
155 if (ArchKind == llvm::ARM::ArchKind::INVALID ||
156 (Split.second.size() &&
157 !DecodeARMFeatures(D, Split.second, CPUName, ArchKind, Features,
158 ArgFPUKind)))
159 D.Diag(clang::diag::err_drv_unsupported_option_argument)
160 << A->getSpelling() << A->getValue();
161}
162
163// Check -mcpu=. Needs ArchName to handle -mcpu=generic.
164static void checkARMCPUName(const Driver &D, const Arg *A, const ArgList &Args,
165 llvm::StringRef CPUName, llvm::StringRef ArchName,
166 std::vector<StringRef> &Features,
167 const llvm::Triple &Triple,
168 llvm::ARM::FPUKind &ArgFPUKind) {
169 std::pair<StringRef, StringRef> Split = CPUName.split("+");
170
171 std::string CPU = arm::getARMTargetCPU(CPUName, ArchName, Triple);
172 llvm::ARM::ArchKind ArchKind =
173 arm::getLLVMArchKindForARM(CPU, ArchName, Triple);
174 if (ArchKind == llvm::ARM::ArchKind::INVALID ||
175 (Split.second.size() && !DecodeARMFeatures(D, Split.second, CPU, ArchKind,
176 Features, ArgFPUKind)))
177 D.Diag(clang::diag::err_drv_unsupported_option_argument)
178 << A->getSpelling() << A->getValue();
179}
180
181// If -mfloat-abi=hard or -mhard-float are specified explicitly then check that
182// floating point registers are available on the target CPU.
183static void checkARMFloatABI(const Driver &D, const ArgList &Args,
184 bool HasFPRegs) {
185 if (HasFPRegs)
186 return;
187 const Arg *A =
188 Args.getLastArg(options::OPT_msoft_float, options::OPT_mhard_float,
189 options::OPT_mfloat_abi_EQ);
190 if (A && (A->getOption().matches(options::OPT_mhard_float) ||
191 (A->getOption().matches(options::OPT_mfloat_abi_EQ) &&
192 A->getValue() == StringRef("hard"))))
193 D.Diag(clang::diag::warn_drv_no_floating_point_registers)
194 << A->getAsString(Args);
195}
196
197bool arm::useAAPCSForMachO(const llvm::Triple &T) {
198 // The backend is hardwired to assume AAPCS for M-class processors, ensure
199 // the frontend matches that.
200 return T.getEnvironment() == llvm::Triple::EABI ||
201 T.getEnvironment() == llvm::Triple::EABIHF ||
202 T.getOS() == llvm::Triple::UnknownOS || isARMMProfile(T);
203}
204
205// We follow GCC and support when the backend has support for the MRC/MCR
206// instructions that are used to set the hard thread pointer ("CP15 C13
207// Thread id").
208bool arm::isHardTPSupported(const llvm::Triple &Triple) {
209 int Ver = getARMSubArchVersionNumber(Triple);
210 llvm::ARM::ArchKind AK = llvm::ARM::parseArch(Triple.getArchName());
211 return Triple.isARM() || AK == llvm::ARM::ArchKind::ARMV6T2 ||
212 (Ver >= 7 && AK != llvm::ARM::ArchKind::ARMV8MBaseline);
213}
214
215// Select mode for reading thread pointer (-mtp=soft/cp15).
216arm::ReadTPMode arm::getReadTPMode(const Driver &D, const ArgList &Args,
217 const llvm::Triple &Triple, bool ForAS) {
218 if (Arg *A = Args.getLastArg(options::OPT_mtp_mode_EQ)) {
219 arm::ReadTPMode ThreadPointer =
220 llvm::StringSwitch<arm::ReadTPMode>(A->getValue())
221 .Case("cp15", ReadTPMode::TPIDRURO)
222 .Case("tpidrurw", ReadTPMode::TPIDRURW)
223 .Case("tpidruro", ReadTPMode::TPIDRURO)
224 .Case("tpidrprw", ReadTPMode::TPIDRPRW)
225 .Case("soft", ReadTPMode::Soft)
226 .Default(ReadTPMode::Invalid);
227 if ((ThreadPointer == ReadTPMode::TPIDRURW ||
228 ThreadPointer == ReadTPMode::TPIDRURO ||
229 ThreadPointer == ReadTPMode::TPIDRPRW) &&
230 !isHardTPSupported(Triple) && !ForAS) {
231 D.Diag(diag::err_target_unsupported_tp_hard) << Triple.getArchName();
232 return ReadTPMode::Invalid;
233 }
234 if (ThreadPointer != ReadTPMode::Invalid)
235 return ThreadPointer;
236 if (StringRef(A->getValue()).empty())
237 D.Diag(diag::err_drv_missing_arg_mtp) << A->getAsString(Args);
238 else
239 D.Diag(diag::err_drv_invalid_mtp) << A->getAsString(Args);
240 return ReadTPMode::Invalid;
241 }
242 return ReadTPMode::Soft;
243}
244
245void arm::setArchNameInTriple(const Driver &D, const ArgList &Args,
246 types::ID InputType, llvm::Triple &Triple) {
247 StringRef MCPU, MArch;
248 if (const Arg *A = Args.getLastArg(options::OPT_mcpu_EQ))
249 MCPU = A->getValue();
250 if (const Arg *A = Args.getLastArg(options::OPT_march_EQ))
251 MArch = A->getValue();
252
253 std::string CPU = Triple.isOSBinFormatMachO()
254 ? tools::arm::getARMCPUForMArch(MArch, Triple).str()
255 : tools::arm::getARMTargetCPU(MCPU, MArch, Triple);
256 StringRef Suffix = tools::arm::getLLVMArchSuffixForARM(CPU, MArch, Triple);
257
258 bool IsBigEndian = Triple.getArch() == llvm::Triple::armeb ||
259 Triple.getArch() == llvm::Triple::thumbeb;
260 // Handle pseudo-target flags '-mlittle-endian'/'-EL' and
261 // '-mbig-endian'/'-EB'.
262 if (Arg *A = Args.getLastArg(options::OPT_mlittle_endian,
263 options::OPT_mbig_endian)) {
264 IsBigEndian = !A->getOption().matches(options::OPT_mlittle_endian);
265 }
266 std::string ArchName = IsBigEndian ? "armeb" : "arm";
267
268 // FIXME: Thumb should just be another -target-feaure, not in the triple.
269 bool IsMProfile =
270 llvm::ARM::parseArchProfile(Suffix) == llvm::ARM::ProfileKind::M;
271 bool ThumbDefault = IsMProfile ||
272 // Thumb2 is the default for V7 on Darwin.
273 (llvm::ARM::parseArchVersion(Suffix) == 7 &&
274 Triple.isOSBinFormatMachO()) ||
275 // FIXME: this is invalid for WindowsCE
276 Triple.isOSWindows();
277
278 // Check if ARM ISA was explicitly selected (using -mno-thumb or -marm) for
279 // M-Class CPUs/architecture variants, which is not supported.
280 bool ARMModeRequested =
281 !Args.hasFlag(options::OPT_mthumb, options::OPT_mno_thumb, ThumbDefault);
282 if (IsMProfile && ARMModeRequested) {
283 if (MCPU.size())
284 D.Diag(diag::err_cpu_unsupported_isa) << CPU << "ARM";
285 else
286 D.Diag(diag::err_arch_unsupported_isa)
287 << tools::arm::getARMArch(MArch, Triple) << "ARM";
288 }
289
290 // Check to see if an explicit choice to use thumb has been made via
291 // -mthumb. For assembler files we must check for -mthumb in the options
292 // passed to the assembler via -Wa or -Xassembler.
293 bool IsThumb = false;
294 if (InputType != types::TY_PP_Asm)
295 IsThumb =
296 Args.hasFlag(options::OPT_mthumb, options::OPT_mno_thumb, ThumbDefault);
297 else {
298 // Ideally we would check for these flags in
299 // CollectArgsForIntegratedAssembler but we can't change the ArchName at
300 // that point.
301 llvm::StringRef WaMArch, WaMCPU;
302 for (const auto *A :
303 Args.filtered(options::OPT_Wa_COMMA, options::OPT_Xassembler)) {
304 for (StringRef Value : A->getValues()) {
305 // There is no assembler equivalent of -mno-thumb, -marm, or -mno-arm.
306 if (Value == "-mthumb")
307 IsThumb = true;
308 else if (Value.starts_with("-march="))
309 WaMArch = Value.substr(7);
310 else if (Value.starts_with("-mcpu="))
311 WaMCPU = Value.substr(6);
312 }
313 }
314
315 if (WaMCPU.size() || WaMArch.size()) {
316 // The way this works means that we prefer -Wa,-mcpu's architecture
317 // over -Wa,-march. Which matches the compiler behaviour.
318 Suffix = tools::arm::getLLVMArchSuffixForARM(WaMCPU, WaMArch, Triple);
319 }
320 }
321
322 // Assembly files should start in ARM mode, unless arch is M-profile, or
323 // -mthumb has been passed explicitly to the assembler. Windows is always
324 // thumb.
325 if (IsThumb || IsMProfile || Triple.isOSWindows()) {
326 if (IsBigEndian)
327 ArchName = "thumbeb";
328 else
329 ArchName = "thumb";
330 }
331 Triple.setArchName(ArchName + Suffix.str());
332}
333
334void arm::setFloatABIInTriple(const Driver &D, const ArgList &Args,
335 llvm::Triple &Triple) {
336 if (Triple.isOSLiteOS()) {
337 Triple.setEnvironment(llvm::Triple::OpenHOS);
338 return;
339 }
340
341 bool isHardFloat =
342 (arm::getARMFloatABI(D, Triple, Args) == arm::FloatABI::Hard);
343
344 switch (Triple.getEnvironment()) {
345 case llvm::Triple::GNUEABI:
346 case llvm::Triple::GNUEABIHF:
347 Triple.setEnvironment(isHardFloat ? llvm::Triple::GNUEABIHF
348 : llvm::Triple::GNUEABI);
349 break;
350 case llvm::Triple::GNUEABIT64:
351 case llvm::Triple::GNUEABIHFT64:
352 Triple.setEnvironment(isHardFloat ? llvm::Triple::GNUEABIHFT64
353 : llvm::Triple::GNUEABIT64);
354 break;
355 case llvm::Triple::EABI:
356 case llvm::Triple::EABIHF:
357 Triple.setEnvironment(isHardFloat ? llvm::Triple::EABIHF
358 : llvm::Triple::EABI);
359 break;
360 case llvm::Triple::MuslEABI:
361 case llvm::Triple::MuslEABIHF:
362 Triple.setEnvironment(isHardFloat ? llvm::Triple::MuslEABIHF
363 : llvm::Triple::MuslEABI);
364 break;
365 case llvm::Triple::OpenHOS:
366 break;
367 default: {
368 arm::FloatABI DefaultABI = arm::getDefaultFloatABI(Triple);
369 if (DefaultABI != arm::FloatABI::Invalid &&
370 isHardFloat != (DefaultABI == arm::FloatABI::Hard)) {
371 Arg *ABIArg =
372 Args.getLastArg(options::OPT_msoft_float, options::OPT_mhard_float,
373 options::OPT_mfloat_abi_EQ);
374 assert(ABIArg && "Non-default float abi expected to be from arg");
375 D.Diag(diag::err_drv_unsupported_opt_for_target)
376 << ABIArg->getAsString(Args) << Triple.getTriple();
377 }
378 break;
379 }
380 }
381}
382
383arm::FloatABI arm::getARMFloatABI(const ToolChain &TC, const ArgList &Args) {
384 return arm::getARMFloatABI(TC.getDriver(), TC.getEffectiveTriple(), Args);
385}
386
387arm::FloatABI arm::getDefaultFloatABI(const llvm::Triple &Triple) {
388 auto SubArch = getARMSubArchVersionNumber(Triple);
389 switch (Triple.getOS()) {
390 case llvm::Triple::Darwin:
391 case llvm::Triple::MacOSX:
392 case llvm::Triple::IOS:
393 case llvm::Triple::TvOS:
394 case llvm::Triple::DriverKit:
395 case llvm::Triple::XROS:
396 // Darwin defaults to "softfp" for v6 and v7.
397 if (Triple.isWatchABI())
398 return FloatABI::Hard;
399 else
400 return (SubArch == 6 || SubArch == 7) ? FloatABI::SoftFP : FloatABI::Soft;
401
402 case llvm::Triple::WatchOS:
403 return FloatABI::Hard;
404
405 // FIXME: this is invalid for WindowsCE
406 case llvm::Triple::Win32:
407 // It is incorrect to select hard float ABI on MachO platforms if the ABI is
408 // "apcs-gnu".
409 if (Triple.isOSBinFormatMachO() && !useAAPCSForMachO(Triple))
410 return FloatABI::Soft;
411 return FloatABI::Hard;
412
413 case llvm::Triple::NetBSD:
414 switch (Triple.getEnvironment()) {
415 case llvm::Triple::EABIHF:
416 case llvm::Triple::GNUEABIHF:
417 return FloatABI::Hard;
418 default:
419 return FloatABI::Soft;
420 }
421 break;
422
423 case llvm::Triple::FreeBSD:
424 switch (Triple.getEnvironment()) {
425 case llvm::Triple::GNUEABIHF:
426 return FloatABI::Hard;
427 default:
428 // FreeBSD defaults to soft float
429 return FloatABI::Soft;
430 }
431 break;
432
433 case llvm::Triple::Haiku:
434 case llvm::Triple::OpenBSD:
435 return FloatABI::SoftFP;
436
437 default:
438 if (Triple.isOHOSFamily())
439 return FloatABI::Soft;
440 switch (Triple.getEnvironment()) {
441 case llvm::Triple::GNUEABIHF:
442 case llvm::Triple::GNUEABIHFT64:
443 case llvm::Triple::MuslEABIHF:
444 case llvm::Triple::EABIHF:
445 return FloatABI::Hard;
446 case llvm::Triple::Android:
447 case llvm::Triple::GNUEABI:
448 case llvm::Triple::GNUEABIT64:
449 case llvm::Triple::MuslEABI:
450 case llvm::Triple::EABI:
451 // EABI is always AAPCS, and if it was not marked 'hard', it's softfp
452 return FloatABI::SoftFP;
453 default:
454 return FloatABI::Invalid;
455 }
456 }
457 return FloatABI::Invalid;
458}
459
460// Select the float ABI as determined by -msoft-float, -mhard-float, and
461// -mfloat-abi=.
462arm::FloatABI arm::getARMFloatABI(const Driver &D, const llvm::Triple &Triple,
463 const ArgList &Args) {
464 arm::FloatABI ABI = FloatABI::Invalid;
465 if (Arg *A =
466 Args.getLastArg(options::OPT_msoft_float, options::OPT_mhard_float,
467 options::OPT_mfloat_abi_EQ)) {
468 if (A->getOption().matches(options::OPT_msoft_float)) {
469 ABI = FloatABI::Soft;
470 } else if (A->getOption().matches(options::OPT_mhard_float)) {
471 ABI = FloatABI::Hard;
472 } else {
473 ABI = llvm::StringSwitch<arm::FloatABI>(A->getValue())
474 .Case("soft", FloatABI::Soft)
475 .Case("softfp", FloatABI::SoftFP)
476 .Case("hard", FloatABI::Hard)
477 .Default(FloatABI::Invalid);
478 if (ABI == FloatABI::Invalid && !StringRef(A->getValue()).empty()) {
479 D.Diag(diag::err_drv_invalid_mfloat_abi) << A->getAsString(Args);
480 ABI = FloatABI::Soft;
481 }
482 }
483 }
484
485 // If unspecified, choose the default based on the platform.
486 if (ABI == FloatABI::Invalid)
487 ABI = arm::getDefaultFloatABI(Triple);
488
489 if (ABI == FloatABI::Invalid) {
490 // Assume "soft", but warn the user we are guessing.
491 if (Triple.isOSBinFormatMachO() &&
492 Triple.getSubArch() == llvm::Triple::ARMSubArch_v7em)
493 ABI = FloatABI::Hard;
494 else
495 ABI = FloatABI::Soft;
496
497 if (Triple.getOS() != llvm::Triple::UnknownOS ||
498 !Triple.isOSBinFormatMachO())
499 D.Diag(diag::warn_drv_assuming_mfloat_abi_is) << "soft";
500 }
501
502 assert(ABI != FloatABI::Invalid && "must select an ABI");
503 return ABI;
504}
505
506static bool hasIntegerMVE(const std::vector<StringRef> &F) {
507 auto MVE = llvm::find(llvm::reverse(F), "+mve");
508 auto NoMVE = llvm::find(llvm::reverse(F), "-mve");
509 return MVE != F.rend() &&
510 (NoMVE == F.rend() || std::distance(MVE, NoMVE) > 0);
511}
512
513llvm::ARM::FPUKind arm::getARMTargetFeatures(const Driver &D,
514 const llvm::Triple &Triple,
515 const ArgList &Args,
516 std::vector<StringRef> &Features,
517 bool ForAS, bool ForMultilib) {
518 bool KernelOrKext =
519 Args.hasArg(options::OPT_mkernel, options::OPT_fapple_kext);
520 arm::FloatABI ABI = arm::getARMFloatABI(D, Triple, Args);
521 std::optional<std::pair<const Arg *, StringRef>> WaCPU, WaFPU, WaHDiv, WaArch;
522
523 // This vector will accumulate features from the architecture
524 // extension suffixes on -mcpu and -march (e.g. the 'bar' in
525 // -mcpu=foo+bar). We want to apply those after the features derived
526 // from the FPU, in case -mfpu generates a negative feature which
527 // the +bar is supposed to override.
528 std::vector<StringRef> ExtensionFeatures;
529
530 if (!ForAS) {
531 // FIXME: Note, this is a hack, the LLVM backend doesn't actually use these
532 // yet (it uses the -mfloat-abi and -msoft-float options), and it is
533 // stripped out by the ARM target. We should probably pass this a new
534 // -target-option, which is handled by the -cc1/-cc1as invocation.
535 //
536 // FIXME2: For consistency, it would be ideal if we set up the target
537 // machine state the same when using the frontend or the assembler. We don't
538 // currently do that for the assembler, we pass the options directly to the
539 // backend and never even instantiate the frontend TargetInfo. If we did,
540 // and used its handleTargetFeatures hook, then we could ensure the
541 // assembler and the frontend behave the same.
542
543 // Use software floating point operations?
544 if (ABI == arm::FloatABI::Soft)
545 Features.push_back("+soft-float");
546
547 // Use software floating point argument passing?
548 if (ABI != arm::FloatABI::Hard)
549 Features.push_back("+soft-float-abi");
550 } else {
551 // Here, we make sure that -Wa,-mfpu/cpu/arch/hwdiv will be passed down
552 // to the assembler correctly.
553 for (const Arg *A :
554 Args.filtered(options::OPT_Wa_COMMA, options::OPT_Xassembler)) {
555 // We use getValues here because you can have many options per -Wa
556 // We will keep the last one we find for each of these
557 for (StringRef Value : A->getValues()) {
558 if (Value.starts_with("-mfpu=")) {
559 WaFPU = std::make_pair(A, Value.substr(6));
560 } else if (Value.starts_with("-mcpu=")) {
561 WaCPU = std::make_pair(A, Value.substr(6));
562 } else if (Value.starts_with("-mhwdiv=")) {
563 WaHDiv = std::make_pair(A, Value.substr(8));
564 } else if (Value.starts_with("-march=")) {
565 WaArch = std::make_pair(A, Value.substr(7));
566 }
567 }
568 }
569
570 // The integrated assembler doesn't implement e_flags setting behavior for
571 // -meabi=gnu (gcc -mabi={apcs-gnu,atpcs} passes -meabi=gnu to gas). For
572 // compatibility we accept but warn.
573 if (Arg *A = Args.getLastArgNoClaim(options::OPT_mabi_EQ))
574 A->ignoreTargetSpecific();
575 }
576
577 if (getReadTPMode(D, Args, Triple, ForAS) == ReadTPMode::TPIDRURW)
578 Features.push_back("+read-tp-tpidrurw");
579 if (getReadTPMode(D, Args, Triple, ForAS) == ReadTPMode::TPIDRURO)
580 Features.push_back("+read-tp-tpidruro");
581 if (getReadTPMode(D, Args, Triple, ForAS) == ReadTPMode::TPIDRPRW)
582 Features.push_back("+read-tp-tpidrprw");
583
584 const Arg *ArchArg = Args.getLastArg(options::OPT_march_EQ);
585 const Arg *CPUArg = Args.getLastArg(options::OPT_mcpu_EQ);
586 StringRef ArchName;
587 StringRef CPUName;
588 llvm::ARM::FPUKind ArchArgFPUKind = llvm::ARM::FK_INVALID;
589 llvm::ARM::FPUKind CPUArgFPUKind = llvm::ARM::FK_INVALID;
590
591 // Check -mcpu. ClangAs gives preference to -Wa,-mcpu=.
592 if (WaCPU) {
593 if (CPUArg)
594 D.Diag(clang::diag::warn_drv_unused_argument)
595 << CPUArg->getAsString(Args);
596 CPUName = WaCPU->second;
597 CPUArg = WaCPU->first;
598 } else if (CPUArg)
599 CPUName = CPUArg->getValue();
600
601 // Check -march. ClangAs gives preference to -Wa,-march=.
602 if (WaArch) {
603 if (ArchArg)
604 D.Diag(clang::diag::warn_drv_unused_argument)
605 << ArchArg->getAsString(Args);
606 ArchName = WaArch->second;
607 // This will set any features after the base architecture.
608 checkARMArchName(D, WaArch->first, Args, ArchName, CPUName,
609 ExtensionFeatures, Triple, ArchArgFPUKind);
610 // The base architecture was handled in ToolChain::ComputeLLVMTriple because
611 // triple is read only by this point.
612 } else if (ArchArg) {
613 ArchName = ArchArg->getValue();
614 checkARMArchName(D, ArchArg, Args, ArchName, CPUName, ExtensionFeatures,
615 Triple, ArchArgFPUKind);
616 }
617
618 // Add CPU features for generic CPUs
619 if (CPUName == "native") {
620 for (auto &F : llvm::sys::getHostCPUFeatures())
621 Features.push_back(
622 Args.MakeArgString((F.second ? "+" : "-") + F.first()));
623 } else if (!CPUName.empty()) {
624 // This sets the default features for the specified CPU. We certainly don't
625 // want to override the features that have been explicitly specified on the
626 // command line. Therefore, process them directly instead of appending them
627 // at the end later.
628 DecodeARMFeaturesFromCPU(D, CPUName, Features);
629 }
630
631 if (CPUArg)
632 checkARMCPUName(D, CPUArg, Args, CPUName, ArchName, ExtensionFeatures,
633 Triple, CPUArgFPUKind);
634
635 // TODO Handle -mtune=. Suppress -Wunused-command-line-argument as a
636 // longstanding behavior.
637 (void)Args.getLastArg(options::OPT_mtune_EQ);
638
639 // Honor -mfpu=. ClangAs gives preference to -Wa,-mfpu=.
640 llvm::ARM::FPUKind FPUKind = llvm::ARM::FK_INVALID;
641 const Arg *FPUArg = Args.getLastArg(options::OPT_mfpu_EQ);
642 if (WaFPU) {
643 if (FPUArg)
644 D.Diag(clang::diag::warn_drv_unused_argument)
645 << FPUArg->getAsString(Args);
646 (void)getARMFPUFeatures(D, WaFPU->first, Args, WaFPU->second, Features);
647 } else if (FPUArg) {
648 FPUKind = getARMFPUFeatures(D, FPUArg, Args, FPUArg->getValue(), Features);
649 } else if (Triple.isAndroid() && getARMSubArchVersionNumber(Triple) == 7) {
650 const char *AndroidFPU = "neon";
651 FPUKind = llvm::ARM::parseFPU(AndroidFPU);
652 if (!llvm::ARM::getFPUFeatures(FPUKind, Features))
653 D.Diag(clang::diag::err_drv_clang_unsupported)
654 << std::string("-mfpu=") + AndroidFPU;
655 } else if (ArchArgFPUKind != llvm::ARM::FK_INVALID ||
656 CPUArgFPUKind != llvm::ARM::FK_INVALID) {
657 FPUKind =
658 CPUArgFPUKind != llvm::ARM::FK_INVALID ? CPUArgFPUKind : ArchArgFPUKind;
659 (void)llvm::ARM::getFPUFeatures(FPUKind, Features);
660 } else {
661 bool Generic = true;
662 if (!ForAS) {
663 std::string CPU = arm::getARMTargetCPU(CPUName, ArchName, Triple);
664 if (CPU != "generic")
665 Generic = false;
666 llvm::ARM::ArchKind ArchKind =
667 arm::getLLVMArchKindForARM(CPU, ArchName, Triple);
668 FPUKind = llvm::ARM::getDefaultFPU(CPU, ArchKind);
669 (void)llvm::ARM::getFPUFeatures(FPUKind, Features);
670 }
671 if (Generic && (Triple.isOSWindows() || Triple.isOSDarwin()) &&
672 getARMSubArchVersionNumber(Triple) >= 7) {
673 FPUKind = llvm::ARM::parseFPU("neon");
674 (void)llvm::ARM::getFPUFeatures(FPUKind, Features);
675 }
676 }
677
678 // Now we've finished accumulating features from arch, cpu and fpu,
679 // we can append the ones for architecture extensions that we
680 // collected separately.
681 Features.insert(std::end(Features),
682 std::begin(ExtensionFeatures), std::end(ExtensionFeatures));
683
684 // Honor -mhwdiv=. ClangAs gives preference to -Wa,-mhwdiv=.
685 const Arg *HDivArg = Args.getLastArg(options::OPT_mhwdiv_EQ);
686 if (WaHDiv) {
687 if (HDivArg)
688 D.Diag(clang::diag::warn_drv_unused_argument)
689 << HDivArg->getAsString(Args);
690 getARMHWDivFeatures(D, WaHDiv->first, Args, WaHDiv->second, Features);
691 } else if (HDivArg)
692 getARMHWDivFeatures(D, HDivArg, Args, HDivArg->getValue(), Features);
693
694 // Handle (arch-dependent) fp16fml/fullfp16 relationship.
695 // Must happen before any features are disabled due to soft-float.
696 // FIXME: this fp16fml option handling will be reimplemented after the
697 // TargetParser rewrite.
698 const auto ItRNoFullFP16 = std::find(Features.rbegin(), Features.rend(), "-fullfp16");
699 const auto ItRFP16FML = std::find(Features.rbegin(), Features.rend(), "+fp16fml");
700 if (Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v8_4a) {
701 const auto ItRFullFP16 = std::find(Features.rbegin(), Features.rend(), "+fullfp16");
702 if (ItRFullFP16 < ItRNoFullFP16 && ItRFullFP16 < ItRFP16FML) {
703 // Only entangled feature that can be to the right of this +fullfp16 is -fp16fml.
704 // Only append the +fp16fml if there is no -fp16fml after the +fullfp16.
705 if (std::find(Features.rbegin(), ItRFullFP16, "-fp16fml") == ItRFullFP16)
706 Features.push_back("+fp16fml");
707 }
708 else
709 goto fp16_fml_fallthrough;
710 }
711 else {
712fp16_fml_fallthrough:
713 // In both of these cases, putting the 'other' feature on the end of the vector will
714 // result in the same effect as placing it immediately after the current feature.
715 if (ItRNoFullFP16 < ItRFP16FML)
716 Features.push_back("-fp16fml");
717 else if (ItRNoFullFP16 > ItRFP16FML)
718 Features.push_back("+fullfp16");
719 }
720
721 // Setting -msoft-float/-mfloat-abi=soft, -mfpu=none, or adding +nofp to
722 // -march/-mcpu effectively disables the FPU (GCC ignores the -mfpu options in
723 // this case). Note that the ABI can also be set implicitly by the target
724 // selected.
725 bool HasFPRegs = true;
726 if (ABI == arm::FloatABI::Soft) {
727 llvm::ARM::getFPUFeatures(llvm::ARM::FK_NONE, Features);
728
729 // Disable all features relating to hardware FP, not already disabled by the
730 // above call.
731 Features.insert(Features.end(),
732 {"-dotprod", "-fp16fml", "-bf16", "-mve", "-mve.fp"});
733 HasFPRegs = false;
734 FPUKind = llvm::ARM::FK_NONE;
735 } else if (FPUKind == llvm::ARM::FK_NONE ||
736 ArchArgFPUKind == llvm::ARM::FK_NONE ||
737 CPUArgFPUKind == llvm::ARM::FK_NONE) {
738 // -mfpu=none, -march=armvX+nofp or -mcpu=X+nofp is *very* similar to
739 // -mfloat-abi=soft, only that it should not disable MVE-I. They disable the
740 // FPU, but not the FPU registers, thus MVE-I, which depends only on the
741 // latter, is still supported.
742 Features.insert(Features.end(),
743 {"-dotprod", "-fp16fml", "-bf16", "-mve.fp"});
744 HasFPRegs = hasIntegerMVE(Features);
745 FPUKind = llvm::ARM::FK_NONE;
746 }
747 if (!HasFPRegs)
748 Features.emplace_back("-fpregs");
749
750 // En/disable crc code generation.
751 if (Arg *A = Args.getLastArg(options::OPT_mcrc, options::OPT_mnocrc)) {
752 if (A->getOption().matches(options::OPT_mcrc))
753 Features.push_back("+crc");
754 else
755 Features.push_back("-crc");
756 }
757
758 // Invalid value of the __ARM_FEATURE_MVE macro when an explicit -mfpu= option
759 // disables MVE-FP -mfpu=fpv5-d16 or -mfpu=fpv5-sp-d16 disables the scalar
760 // half-precision floating-point operations feature. Therefore, because the
761 // M-profile Vector Extension (MVE) floating-point feature requires the scalar
762 // half-precision floating-point operations, this option also disables the MVE
763 // floating-point feature: -mve.fp
764 if (FPUKind == llvm::ARM::FK_FPV5_D16 || FPUKind == llvm::ARM::FK_FPV5_SP_D16)
765 Features.push_back("-mve.fp");
766
767 // For Arch >= ARMv8.0 && A or R profile: crypto = sha2 + aes
768 // Rather than replace within the feature vector, determine whether each
769 // algorithm is enabled and append this to the end of the vector.
770 // The algorithms can be controlled by their specific feature or the crypto
771 // feature, so their status can be determined by the last occurance of
772 // either in the vector. This allows one to supercede the other.
773 // e.g. +crypto+noaes in -march/-mcpu should enable sha2, but not aes
774 // FIXME: this needs reimplementation after the TargetParser rewrite
775 bool HasSHA2 = false;
776 bool HasAES = false;
777 const auto ItCrypto =
778 llvm::find_if(llvm::reverse(Features), [](const StringRef F) {
779 return F.contains("crypto");
780 });
781 const auto ItSHA2 =
782 llvm::find_if(llvm::reverse(Features), [](const StringRef F) {
783 return F.contains("crypto") || F.contains("sha2");
784 });
785 const auto ItAES =
786 llvm::find_if(llvm::reverse(Features), [](const StringRef F) {
787 return F.contains("crypto") || F.contains("aes");
788 });
789 const bool FoundSHA2 = ItSHA2 != Features.rend();
790 const bool FoundAES = ItAES != Features.rend();
791 if (FoundSHA2)
792 HasSHA2 = ItSHA2->take_front() == "+";
793 if (FoundAES)
794 HasAES = ItAES->take_front() == "+";
795 if (ItCrypto != Features.rend()) {
796 if (HasSHA2 && HasAES)
797 Features.push_back("+crypto");
798 else
799 Features.push_back("-crypto");
800 if (HasSHA2)
801 Features.push_back("+sha2");
802 else
803 Features.push_back("-sha2");
804 if (HasAES)
805 Features.push_back("+aes");
806 else
807 Features.push_back("-aes");
808 }
809
810 if (HasSHA2 || HasAES) {
811 StringRef ArchSuffix = arm::getLLVMArchSuffixForARM(
812 arm::getARMTargetCPU(CPUName, ArchName, Triple), ArchName, Triple);
813 llvm::ARM::ProfileKind ArchProfile =
814 llvm::ARM::parseArchProfile(ArchSuffix);
815 if (!((llvm::ARM::parseArchVersion(ArchSuffix) >= 8) &&
816 (ArchProfile == llvm::ARM::ProfileKind::A ||
817 ArchProfile == llvm::ARM::ProfileKind::R))) {
818 if (HasSHA2)
819 D.Diag(clang::diag::warn_target_unsupported_extension)
820 << "sha2"
821 << llvm::ARM::getArchName(llvm::ARM::parseArch(ArchSuffix));
822 if (HasAES)
823 D.Diag(clang::diag::warn_target_unsupported_extension)
824 << "aes"
825 << llvm::ARM::getArchName(llvm::ARM::parseArch(ArchSuffix));
826 // With -fno-integrated-as -mfpu=crypto-neon-fp-armv8 some assemblers such
827 // as the GNU assembler will permit the use of crypto instructions as the
828 // fpu will override the architecture. We keep the crypto feature in this
829 // case to preserve compatibility. In all other cases we remove the crypto
830 // feature.
831 if (!Args.hasArg(options::OPT_fno_integrated_as)) {
832 Features.push_back("-sha2");
833 Features.push_back("-aes");
834 }
835 }
836 }
837
838 // Propagate frame-chain model selection
839 if (Arg *A = Args.getLastArg(options::OPT_mframe_chain)) {
840 StringRef FrameChainOption = A->getValue();
841 if (FrameChainOption.starts_with("aapcs"))
842 Features.push_back("+aapcs-frame-chain");
843 }
844
845 // CMSE: Check for target 8M (for -mcmse to be applicable) is performed later.
846 if (Args.getLastArg(options::OPT_mcmse))
847 Features.push_back("+8msecext");
848
849 if (Arg *A = Args.getLastArg(options::OPT_mfix_cmse_cve_2021_35465,
850 options::OPT_mno_fix_cmse_cve_2021_35465)) {
851 if (!Args.getLastArg(options::OPT_mcmse))
852 D.Diag(diag::err_opt_not_valid_without_opt)
853 << A->getOption().getName() << "-mcmse";
854
855 if (A->getOption().matches(options::OPT_mfix_cmse_cve_2021_35465))
856 Features.push_back("+fix-cmse-cve-2021-35465");
857 else
858 Features.push_back("-fix-cmse-cve-2021-35465");
859 }
860
861 // This also handles the -m(no-)fix-cortex-a72-1655431 arguments via aliases.
862 if (Arg *A = Args.getLastArg(options::OPT_mfix_cortex_a57_aes_1742098,
863 options::OPT_mno_fix_cortex_a57_aes_1742098)) {
864 if (A->getOption().matches(options::OPT_mfix_cortex_a57_aes_1742098)) {
865 Features.push_back("+fix-cortex-a57-aes-1742098");
866 } else {
867 Features.push_back("-fix-cortex-a57-aes-1742098");
868 }
869 }
870
871 // Look for the last occurrence of -mlong-calls or -mno-long-calls. If
872 // neither options are specified, see if we are compiling for kernel/kext and
873 // decide whether to pass "+long-calls" based on the OS and its version.
874 if (Arg *A = Args.getLastArg(options::OPT_mlong_calls,
875 options::OPT_mno_long_calls)) {
876 if (A->getOption().matches(options::OPT_mlong_calls))
877 Features.push_back("+long-calls");
878 } else if (KernelOrKext && (!Triple.isiOS() || Triple.isOSVersionLT(6)) &&
879 !Triple.isWatchOS() && !Triple.isXROS()) {
880 Features.push_back("+long-calls");
881 }
882
883 // Generate execute-only output (no data access to code sections).
884 // This only makes sense for the compiler, not for the assembler.
885 // It's not needed for multilib selection and may hide an unused
886 // argument diagnostic if the code is always run.
887 if (!ForAS && !ForMultilib) {
888 // Supported only on ARMv6T2 and ARMv7 and above.
889 // Cannot be combined with -mno-movt.
890 if (Arg *A = Args.getLastArg(options::OPT_mexecute_only, options::OPT_mno_execute_only)) {
891 if (A->getOption().matches(options::OPT_mexecute_only)) {
892 if (getARMSubArchVersionNumber(Triple) < 7 &&
893 llvm::ARM::parseArch(Triple.getArchName()) != llvm::ARM::ArchKind::ARMV6T2 &&
894 llvm::ARM::parseArch(Triple.getArchName()) != llvm::ARM::ArchKind::ARMV6M)
895 D.Diag(diag::err_target_unsupported_execute_only) << Triple.getArchName();
896 else if (llvm::ARM::parseArch(Triple.getArchName()) == llvm::ARM::ArchKind::ARMV6M) {
897 if (Arg *PIArg = Args.getLastArg(options::OPT_fropi, options::OPT_frwpi,
898 options::OPT_fpic, options::OPT_fpie,
899 options::OPT_fPIC, options::OPT_fPIE))
900 D.Diag(diag::err_opt_not_valid_with_opt_on_target)
901 << A->getAsString(Args) << PIArg->getAsString(Args) << Triple.getArchName();
902 } else if (Arg *B = Args.getLastArg(options::OPT_mno_movt))
903 D.Diag(diag::err_opt_not_valid_with_opt)
904 << A->getAsString(Args) << B->getAsString(Args);
905 Features.push_back("+execute-only");
906 }
907 }
908 }
909
910 if (Arg *A = Args.getLastArg(options::OPT_mno_unaligned_access,
911 options::OPT_munaligned_access,
912 options::OPT_mstrict_align,
913 options::OPT_mno_strict_align)) {
914 // Kernel code has more strict alignment requirements.
915 if (KernelOrKext ||
916 A->getOption().matches(options::OPT_mno_unaligned_access) ||
917 A->getOption().matches(options::OPT_mstrict_align)) {
918 Features.push_back("+strict-align");
919 } else {
920 // No v6M core supports unaligned memory access (v6M ARM ARM A3.2).
921 if (Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v6m)
922 D.Diag(diag::err_target_unsupported_unaligned) << "v6m";
923 // v8M Baseline follows on from v6M, so doesn't support unaligned memory
924 // access either.
925 else if (Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v8m_baseline)
926 D.Diag(diag::err_target_unsupported_unaligned) << "v8m.base";
927 }
928 } else {
929 // Assume pre-ARMv6 doesn't support unaligned accesses.
930 //
931 // ARMv6 may or may not support unaligned accesses depending on the
932 // SCTLR.U bit, which is architecture-specific. We assume ARMv6
933 // Darwin and NetBSD targets support unaligned accesses, and others don't.
934 //
935 // ARMv7 always has SCTLR.U set to 1, but it has a new SCTLR.A bit which
936 // raises an alignment fault on unaligned accesses. Assume ARMv7+ supports
937 // unaligned accesses, except ARMv6-M, and ARMv8-M without the Main
938 // Extension. This aligns with the default behavior of ARM's downstream
939 // versions of GCC and Clang.
940 //
941 // Users can change the default behavior via -m[no-]unaliged-access.
942 int VersionNum = getARMSubArchVersionNumber(Triple);
943 if (Triple.isOSDarwin() || Triple.isOSNetBSD()) {
944 if (VersionNum < 6 ||
945 Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v6m)
946 Features.push_back("+strict-align");
947 } else if (Triple.getVendor() == llvm::Triple::Apple &&
948 Triple.isOSBinFormatMachO()) {
949 // Firmwares on Apple platforms are strict-align by default.
950 Features.push_back("+strict-align");
951 } else if (VersionNum < 7 ||
952 Triple.getSubArch() ==
953 llvm::Triple::SubArchType::ARMSubArch_v6m ||
954 Triple.getSubArch() ==
955 llvm::Triple::SubArchType::ARMSubArch_v8m_baseline) {
956 Features.push_back("+strict-align");
957 }
958 }
959
960 // llvm does not support reserving registers in general. There is support
961 // for reserving r9 on ARM though (defined as a platform-specific register
962 // in ARM EABI).
963 if (Args.hasArg(options::OPT_ffixed_r9))
964 Features.push_back("+reserve-r9");
965
966 // The kext linker doesn't know how to deal with movw/movt.
967 if (KernelOrKext || Args.hasArg(options::OPT_mno_movt))
968 Features.push_back("+no-movt");
969
970 if (Args.hasArg(options::OPT_mno_neg_immediates))
971 Features.push_back("+no-neg-immediates");
972
973 // Enable/disable straight line speculation hardening.
974 if (Arg *A = Args.getLastArg(options::OPT_mharden_sls_EQ)) {
975 StringRef Scope = A->getValue();
976 bool EnableRetBr = false;
977 bool EnableBlr = false;
978 bool DisableComdat = false;
979 if (Scope != "none") {
981 Scope.split(Opts, ",");
982 for (auto Opt : Opts) {
983 Opt = Opt.trim();
984 if (Opt == "all") {
985 EnableBlr = true;
986 EnableRetBr = true;
987 continue;
988 }
989 if (Opt == "retbr") {
990 EnableRetBr = true;
991 continue;
992 }
993 if (Opt == "blr") {
994 EnableBlr = true;
995 continue;
996 }
997 if (Opt == "comdat") {
998 DisableComdat = false;
999 continue;
1000 }
1001 if (Opt == "nocomdat") {
1002 DisableComdat = true;
1003 continue;
1004 }
1005 D.Diag(diag::err_drv_unsupported_option_argument)
1006 << A->getSpelling() << Scope;
1007 break;
1008 }
1009 }
1010
1011 if (EnableRetBr || EnableBlr)
1012 if (!(isARMAProfile(Triple) && getARMSubArchVersionNumber(Triple) >= 7))
1013 D.Diag(diag::err_sls_hardening_arm_not_supported)
1014 << Scope << A->getAsString(Args);
1015
1016 if (EnableRetBr)
1017 Features.push_back("+harden-sls-retbr");
1018 if (EnableBlr)
1019 Features.push_back("+harden-sls-blr");
1020 if (DisableComdat) {
1021 Features.push_back("+harden-sls-nocomdat");
1022 }
1023 }
1024
1025 if (Args.getLastArg(options::OPT_mno_bti_at_return_twice))
1026 Features.push_back("+no-bti-at-return-twice");
1027
1028 checkARMFloatABI(D, Args, HasFPRegs);
1029
1030 return FPUKind;
1031}
1032
1033std::string arm::getARMArch(StringRef Arch, const llvm::Triple &Triple) {
1034 std::string MArch;
1035 if (!Arch.empty())
1036 MArch = std::string(Arch);
1037 else
1038 MArch = std::string(Triple.getArchName());
1039 MArch = StringRef(MArch).split("+").first.lower();
1040
1041 // Handle -march=native.
1042 if (MArch == "native") {
1043 std::string CPU = std::string(llvm::sys::getHostCPUName());
1044 if (CPU != "generic") {
1045 // Translate the native cpu into the architecture suffix for that CPU.
1046 StringRef Suffix = arm::getLLVMArchSuffixForARM(CPU, MArch, Triple);
1047 // If there is no valid architecture suffix for this CPU we don't know how
1048 // to handle it, so return no architecture.
1049 if (Suffix.empty())
1050 MArch = "";
1051 else
1052 MArch = std::string("arm") + Suffix.str();
1053 }
1054 }
1055
1056 return MArch;
1057}
1058
1059/// Get the (LLVM) name of the minimum ARM CPU for the arch we are targeting.
1060StringRef arm::getARMCPUForMArch(StringRef Arch, const llvm::Triple &Triple) {
1061 std::string MArch = getARMArch(Arch, Triple);
1062 // getARMCPUForArch defaults to the triple if MArch is empty, but empty MArch
1063 // here means an -march=native that we can't handle, so instead return no CPU.
1064 if (MArch.empty())
1065 return StringRef();
1066
1067 // We need to return an empty string here on invalid MArch values as the
1068 // various places that call this function can't cope with a null result.
1069 return llvm::ARM::getARMCPUForArch(Triple, MArch);
1070}
1071
1072/// getARMTargetCPU - Get the (LLVM) name of the ARM cpu we are targeting.
1073std::string arm::getARMTargetCPU(StringRef CPU, StringRef Arch,
1074 const llvm::Triple &Triple) {
1075 // FIXME: Warn on inconsistent use of -mcpu and -march.
1076 // If we have -mcpu=, use that.
1077 if (!CPU.empty()) {
1078 std::string MCPU = StringRef(CPU).split("+").first.lower();
1079 // Handle -mcpu=native.
1080 if (MCPU == "native")
1081 return std::string(llvm::sys::getHostCPUName());
1082 else
1083 return MCPU;
1084 }
1085
1086 return std::string(getARMCPUForMArch(Arch, Triple));
1087}
1088
1089/// getLLVMArchSuffixForARM - Get the LLVM ArchKind value to use for a
1090/// particular CPU (or Arch, if CPU is generic). This is needed to
1091/// pass to functions like llvm::ARM::getDefaultFPU which need an
1092/// ArchKind as well as a CPU name.
1093llvm::ARM::ArchKind arm::getLLVMArchKindForARM(StringRef CPU, StringRef Arch,
1094 const llvm::Triple &Triple) {
1095 llvm::ARM::ArchKind ArchKind;
1096 if (CPU == "generic" || CPU.empty()) {
1097 std::string ARMArch = tools::arm::getARMArch(Arch, Triple);
1098 ArchKind = llvm::ARM::parseArch(ARMArch);
1099 if (ArchKind == llvm::ARM::ArchKind::INVALID)
1100 // In case of generic Arch, i.e. "arm",
1101 // extract arch from default cpu of the Triple
1102 ArchKind =
1103 llvm::ARM::parseCPUArch(llvm::ARM::getARMCPUForArch(Triple, ARMArch));
1104 } else {
1105 // FIXME: horrible hack to get around the fact that Cortex-A7 is only an
1106 // armv7k triple if it's actually been specified via "-arch armv7k".
1107 ArchKind = (Arch == "armv7k" || Arch == "thumbv7k")
1108 ? llvm::ARM::ArchKind::ARMV7K
1109 : llvm::ARM::parseCPUArch(CPU);
1110 }
1111 return ArchKind;
1112}
1113
1114/// getLLVMArchSuffixForARM - Get the LLVM arch name to use for a particular
1115/// CPU (or Arch, if CPU is generic).
1116// FIXME: This is redundant with -mcpu, why does LLVM use this.
1117StringRef arm::getLLVMArchSuffixForARM(StringRef CPU, StringRef Arch,
1118 const llvm::Triple &Triple) {
1119 llvm::ARM::ArchKind ArchKind = getLLVMArchKindForARM(CPU, Arch, Triple);
1120 if (ArchKind == llvm::ARM::ArchKind::INVALID)
1121 return "";
1122 return llvm::ARM::getSubArch(ArchKind);
1123}
1124
1125void arm::appendBE8LinkFlag(const ArgList &Args, ArgStringList &CmdArgs,
1126 const llvm::Triple &Triple) {
1127 if (Args.hasArg(options::OPT_r))
1128 return;
1129
1130 // ARMv7 (and later) and ARMv6-M do not support BE-32, so instruct the linker
1131 // to generate BE-8 executables.
1132 if (arm::getARMSubArchVersionNumber(Triple) >= 7 || arm::isARMMProfile(Triple))
1133 CmdArgs.push_back("--be8");
1134}
OffloadArch arch
Definition: Cuda.cpp:78
const Decl * D
static bool DecodeARMFeatures(const Driver &D, StringRef text, StringRef CPU, llvm::ARM::ArchKind ArchKind, std::vector< StringRef > &Features, llvm::ARM::FPUKind &ArgFPUKind)
Definition: ARM.cpp:119
static void checkARMCPUName(const Driver &D, const Arg *A, const ArgList &Args, llvm::StringRef CPUName, llvm::StringRef ArchName, std::vector< StringRef > &Features, const llvm::Triple &Triple, llvm::ARM::FPUKind &ArgFPUKind)
Definition: ARM.cpp:164
static llvm::ARM::FPUKind getARMFPUFeatures(const Driver &D, const Arg *A, const ArgList &Args, StringRef FPU, std::vector< StringRef > &Features)
Definition: ARM.cpp:109
static void checkARMArchName(const Driver &D, const Arg *A, const ArgList &Args, llvm::StringRef ArchName, llvm::StringRef CPUName, std::vector< StringRef > &Features, const llvm::Triple &Triple, llvm::ARM::FPUKind &ArgFPUKind)
Definition: ARM.cpp:146
static void DecodeARMFeaturesFromCPU(const Driver &D, StringRef CPU, std::vector< StringRef > &Features)
Definition: ARM.cpp:133
static void getARMHWDivFeatures(const Driver &D, const Arg *A, const ArgList &Args, StringRef HWDiv, std::vector< StringRef > &Features)
Definition: ARM.cpp:100
static bool hasIntegerMVE(const std::vector< StringRef > &F)
Definition: ARM.cpp:506
static void checkARMFloatABI(const Driver &D, const ArgList &Args, bool HasFPRegs)
Definition: ARM.cpp:183
Scope - A scope is a transient data structure that is used while parsing the program.
Definition: Scope.h:41
Driver - Encapsulate logic for constructing compilation processes from a set of gcc-driver-like comma...
Definition: Driver.h:99
ToolChain - Access to tools for a single platform.
Definition: ToolChain.h:92
const Driver & getDriver() const
Definition: ToolChain.h:252
const llvm::Triple & getEffectiveTriple() const
Get the toolchain's effective clang triple.
Definition: ToolChain.h:282
void getARMArchCPUFromArgs(const llvm::opt::ArgList &Args, llvm::StringRef &Arch, llvm::StringRef &CPU, bool FromAs=false)
FloatABI getDefaultFloatABI(const llvm::Triple &Triple)
Definition: ARM.cpp:387
void setArchNameInTriple(const Driver &D, const llvm::opt::ArgList &Args, types::ID InputType, llvm::Triple &Triple)
void appendBE8LinkFlag(const llvm::opt::ArgList &Args, llvm::opt::ArgStringList &CmdArgs, const llvm::Triple &Triple)
bool isARMEABIBareMetal(const llvm::Triple &Triple)
Is the triple {arm,armeb,thumb,thumbeb}-none-none-{eabi,eabihf} ?
Definition: ARM.cpp:56
void setFloatABIInTriple(const Driver &D, const llvm::opt::ArgList &Args, llvm::Triple &triple)
bool isARMMProfile(const llvm::Triple &Triple)
Definition: ARM.cpp:30
bool isHardTPSupported(const llvm::Triple &Triple)
Definition: ARM.cpp:208
FloatABI getARMFloatABI(const ToolChain &TC, const llvm::opt::ArgList &Args)
bool isARMAProfile(const llvm::Triple &Triple)
Definition: ARM.cpp:50
bool useAAPCSForMachO(const llvm::Triple &T)
Definition: ARM.cpp:197
std::string getARMTargetCPU(StringRef CPU, llvm::StringRef Arch, const llvm::Triple &Triple)
StringRef getARMCPUForMArch(llvm::StringRef Arch, const llvm::Triple &Triple)
llvm::ARM::ArchKind getLLVMArchKindForARM(StringRef CPU, StringRef Arch, const llvm::Triple &Triple)
getLLVMArchSuffixForARM - Get the LLVM ArchKind value to use for a particular CPU (or Arch,...
Definition: ARM.cpp:1093
int getARMSubArchVersionNumber(const llvm::Triple &Triple)
Definition: ARM.cpp:24
StringRef getLLVMArchSuffixForARM(llvm::StringRef CPU, llvm::StringRef Arch, const llvm::Triple &Triple)
bool isARMBigEndian(const llvm::Triple &Triple, const llvm::opt::ArgList &Args)
llvm::ARM::FPUKind getARMTargetFeatures(const Driver &D, const llvm::Triple &Triple, const llvm::opt::ArgList &Args, std::vector< llvm::StringRef > &Features, bool ForAS, bool ForMultilib=false)
std::string getARMArch(llvm::StringRef Arch, const llvm::Triple &Triple)
ReadTPMode getReadTPMode(const Driver &D, const llvm::opt::ArgList &Args, const llvm::Triple &Triple, bool ForAS)
The JSON file list parser is used to communicate input to InstallAPI.
const FunctionProtoType * T
@ Generic
not a target-specific vector type