clang  10.0.0svn
ARM.cpp
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1 //===--- ARM.cpp - ARM (not AArch64) Helpers for Tools ----------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "ARM.h"
10 #include "clang/Driver/Driver.h"
12 #include "clang/Driver/Options.h"
13 #include "llvm/ADT/StringSwitch.h"
14 #include "llvm/Option/ArgList.h"
15 #include "llvm/Support/TargetParser.h"
16 #include "llvm/Support/Host.h"
17 
18 using namespace clang::driver;
19 using namespace clang::driver::tools;
20 using namespace clang;
21 using namespace llvm::opt;
22 
23 // Get SubArch (vN).
24 int arm::getARMSubArchVersionNumber(const llvm::Triple &Triple) {
25  llvm::StringRef Arch = Triple.getArchName();
26  return llvm::ARM::parseArchVersion(Arch);
27 }
28 
29 // True if M-profile.
30 bool arm::isARMMProfile(const llvm::Triple &Triple) {
31  llvm::StringRef Arch = Triple.getArchName();
32  return llvm::ARM::parseArchProfile(Arch) == llvm::ARM::ProfileKind::M;
33 }
34 
35 // Get Arch/CPU from args.
36 void arm::getARMArchCPUFromArgs(const ArgList &Args, llvm::StringRef &Arch,
37  llvm::StringRef &CPU, bool FromAs) {
38  if (const Arg *A = Args.getLastArg(clang::driver::options::OPT_mcpu_EQ))
39  CPU = A->getValue();
40  if (const Arg *A = Args.getLastArg(options::OPT_march_EQ))
41  Arch = A->getValue();
42  if (!FromAs)
43  return;
44 
45  for (const Arg *A :
46  Args.filtered(options::OPT_Wa_COMMA, options::OPT_Xassembler)) {
47  StringRef Value = A->getValue();
48  if (Value.startswith("-mcpu="))
49  CPU = Value.substr(6);
50  if (Value.startswith("-march="))
51  Arch = Value.substr(7);
52  }
53 }
54 
55 // Handle -mhwdiv=.
56 // FIXME: Use ARMTargetParser.
57 static void getARMHWDivFeatures(const Driver &D, const Arg *A,
58  const ArgList &Args, StringRef HWDiv,
59  std::vector<StringRef> &Features) {
60  unsigned HWDivID = llvm::ARM::parseHWDiv(HWDiv);
61  if (!llvm::ARM::getHWDivFeatures(HWDivID, Features))
62  D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
63 }
64 
65 // Handle -mfpu=.
66 static void getARMFPUFeatures(const Driver &D, const Arg *A,
67  const ArgList &Args, StringRef FPU,
68  std::vector<StringRef> &Features) {
69  unsigned FPUID = llvm::ARM::parseFPU(FPU);
70  if (!llvm::ARM::getFPUFeatures(FPUID, Features))
71  D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
72 }
73 
74 // Decode ARM features from string like +[no]featureA+[no]featureB+...
75 static bool DecodeARMFeatures(const Driver &D, StringRef text,
76  StringRef CPU, llvm::ARM::ArchKind ArchKind,
77  std::vector<StringRef> &Features) {
79  text.split(Split, StringRef("+"), -1, false);
80 
81  for (StringRef Feature : Split) {
82  if (!appendArchExtFeatures(CPU, ArchKind, Feature, Features))
83  return false;
84  }
85  return true;
86 }
87 
88 static void DecodeARMFeaturesFromCPU(const Driver &D, StringRef CPU,
89  std::vector<StringRef> &Features) {
90  CPU = CPU.split("+").first;
91  if (CPU != "generic") {
92  llvm::ARM::ArchKind ArchKind = llvm::ARM::parseCPUArch(CPU);
93  unsigned Extension = llvm::ARM::getDefaultExtensions(CPU, ArchKind);
94  llvm::ARM::getExtensionFeatures(Extension, Features);
95  }
96 }
97 
98 // Check if -march is valid by checking if it can be canonicalised and parsed.
99 // getARMArch is used here instead of just checking the -march value in order
100 // to handle -march=native correctly.
101 static void checkARMArchName(const Driver &D, const Arg *A, const ArgList &Args,
102  llvm::StringRef ArchName, llvm::StringRef CPUName,
103  std::vector<StringRef> &Features,
104  const llvm::Triple &Triple) {
105  std::pair<StringRef, StringRef> Split = ArchName.split("+");
106 
107  std::string MArch = arm::getARMArch(ArchName, Triple);
108  llvm::ARM::ArchKind ArchKind = llvm::ARM::parseArch(MArch);
109  if (ArchKind == llvm::ARM::ArchKind::INVALID ||
110  (Split.second.size() && !DecodeARMFeatures(
111  D, Split.second, CPUName, ArchKind, Features)))
112  D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
113 }
114 
115 // Check -mcpu=. Needs ArchName to handle -mcpu=generic.
116 static void checkARMCPUName(const Driver &D, const Arg *A, const ArgList &Args,
117  llvm::StringRef CPUName, llvm::StringRef ArchName,
118  std::vector<StringRef> &Features,
119  const llvm::Triple &Triple) {
120  std::pair<StringRef, StringRef> Split = CPUName.split("+");
121 
122  std::string CPU = arm::getARMTargetCPU(CPUName, ArchName, Triple);
123  llvm::ARM::ArchKind ArchKind =
124  arm::getLLVMArchKindForARM(CPU, ArchName, Triple);
125  if (ArchKind == llvm::ARM::ArchKind::INVALID ||
126  (Split.second.size() && !DecodeARMFeatures(
127  D, Split.second, CPU, ArchKind, Features)))
128  D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
129 }
130 
131 bool arm::useAAPCSForMachO(const llvm::Triple &T) {
132  // The backend is hardwired to assume AAPCS for M-class processors, ensure
133  // the frontend matches that.
134  return T.getEnvironment() == llvm::Triple::EABI ||
135  T.getOS() == llvm::Triple::UnknownOS || isARMMProfile(T);
136 }
137 
138 // Select mode for reading thread pointer (-mtp=soft/cp15).
139 arm::ReadTPMode arm::getReadTPMode(const ToolChain &TC, const ArgList &Args) {
140  if (Arg *A = Args.getLastArg(options::OPT_mtp_mode_EQ)) {
141  const Driver &D = TC.getDriver();
142  arm::ReadTPMode ThreadPointer =
143  llvm::StringSwitch<arm::ReadTPMode>(A->getValue())
144  .Case("cp15", ReadTPMode::Cp15)
145  .Case("soft", ReadTPMode::Soft)
146  .Default(ReadTPMode::Invalid);
147  if (ThreadPointer != ReadTPMode::Invalid)
148  return ThreadPointer;
149  if (StringRef(A->getValue()).empty())
150  D.Diag(diag::err_drv_missing_arg_mtp) << A->getAsString(Args);
151  else
152  D.Diag(diag::err_drv_invalid_mtp) << A->getAsString(Args);
153  return ReadTPMode::Invalid;
154  }
155  return ReadTPMode::Soft;
156 }
157 
158 // Select the float ABI as determined by -msoft-float, -mhard-float, and
159 // -mfloat-abi=.
160 arm::FloatABI arm::getARMFloatABI(const ToolChain &TC, const ArgList &Args) {
161  const Driver &D = TC.getDriver();
162  const llvm::Triple &Triple = TC.getEffectiveTriple();
163  auto SubArch = getARMSubArchVersionNumber(Triple);
164  arm::FloatABI ABI = FloatABI::Invalid;
165  if (Arg *A =
166  Args.getLastArg(options::OPT_msoft_float, options::OPT_mhard_float,
167  options::OPT_mfloat_abi_EQ)) {
168  if (A->getOption().matches(options::OPT_msoft_float)) {
169  ABI = FloatABI::Soft;
170  } else if (A->getOption().matches(options::OPT_mhard_float)) {
171  ABI = FloatABI::Hard;
172  } else {
173  ABI = llvm::StringSwitch<arm::FloatABI>(A->getValue())
174  .Case("soft", FloatABI::Soft)
175  .Case("softfp", FloatABI::SoftFP)
176  .Case("hard", FloatABI::Hard)
177  .Default(FloatABI::Invalid);
178  if (ABI == FloatABI::Invalid && !StringRef(A->getValue()).empty()) {
179  D.Diag(diag::err_drv_invalid_mfloat_abi) << A->getAsString(Args);
180  ABI = FloatABI::Soft;
181  }
182  }
183 
184  // It is incorrect to select hard float ABI on MachO platforms if the ABI is
185  // "apcs-gnu".
186  if (Triple.isOSBinFormatMachO() && !useAAPCSForMachO(Triple) &&
187  ABI == FloatABI::Hard) {
188  D.Diag(diag::err_drv_unsupported_opt_for_target) << A->getAsString(Args)
189  << Triple.getArchName();
190  }
191  }
192 
193  // If unspecified, choose the default based on the platform.
194  if (ABI == FloatABI::Invalid) {
195  switch (Triple.getOS()) {
196  case llvm::Triple::Darwin:
197  case llvm::Triple::MacOSX:
198  case llvm::Triple::IOS:
199  case llvm::Triple::TvOS: {
200  // Darwin defaults to "softfp" for v6 and v7.
201  ABI = (SubArch == 6 || SubArch == 7) ? FloatABI::SoftFP : FloatABI::Soft;
202  ABI = Triple.isWatchABI() ? FloatABI::Hard : ABI;
203  break;
204  }
205  case llvm::Triple::WatchOS:
206  ABI = FloatABI::Hard;
207  break;
208 
209  // FIXME: this is invalid for WindowsCE
210  case llvm::Triple::Win32:
211  ABI = FloatABI::Hard;
212  break;
213 
214  case llvm::Triple::NetBSD:
215  switch (Triple.getEnvironment()) {
216  case llvm::Triple::EABIHF:
217  case llvm::Triple::GNUEABIHF:
218  ABI = FloatABI::Hard;
219  break;
220  default:
221  ABI = FloatABI::Soft;
222  break;
223  }
224  break;
225 
226  case llvm::Triple::FreeBSD:
227  switch (Triple.getEnvironment()) {
228  case llvm::Triple::GNUEABIHF:
229  ABI = FloatABI::Hard;
230  break;
231  default:
232  // FreeBSD defaults to soft float
233  ABI = FloatABI::Soft;
234  break;
235  }
236  break;
237 
238  case llvm::Triple::OpenBSD:
239  ABI = FloatABI::SoftFP;
240  break;
241 
242  default:
243  switch (Triple.getEnvironment()) {
244  case llvm::Triple::GNUEABIHF:
245  case llvm::Triple::MuslEABIHF:
246  case llvm::Triple::EABIHF:
247  ABI = FloatABI::Hard;
248  break;
249  case llvm::Triple::GNUEABI:
250  case llvm::Triple::MuslEABI:
251  case llvm::Triple::EABI:
252  // EABI is always AAPCS, and if it was not marked 'hard', it's softfp
253  ABI = FloatABI::SoftFP;
254  break;
255  case llvm::Triple::Android:
256  ABI = (SubArch >= 7) ? FloatABI::SoftFP : FloatABI::Soft;
257  break;
258  default:
259  // Assume "soft", but warn the user we are guessing.
260  if (Triple.isOSBinFormatMachO() &&
261  Triple.getSubArch() == llvm::Triple::ARMSubArch_v7em)
262  ABI = FloatABI::Hard;
263  else
264  ABI = FloatABI::Soft;
265 
266  if (Triple.getOS() != llvm::Triple::UnknownOS ||
267  !Triple.isOSBinFormatMachO())
268  D.Diag(diag::warn_drv_assuming_mfloat_abi_is) << "soft";
269  break;
270  }
271  }
272  }
273 
274  assert(ABI != FloatABI::Invalid && "must select an ABI");
275  return ABI;
276 }
277 
278 void arm::getARMTargetFeatures(const ToolChain &TC,
279  const llvm::Triple &Triple,
280  const ArgList &Args,
281  ArgStringList &CmdArgs,
282  std::vector<StringRef> &Features,
283  bool ForAS) {
284  const Driver &D = TC.getDriver();
285 
286  bool KernelOrKext =
287  Args.hasArg(options::OPT_mkernel, options::OPT_fapple_kext);
288  arm::FloatABI ABI = arm::getARMFloatABI(TC, Args);
289  arm::ReadTPMode ThreadPointer = arm::getReadTPMode(TC, Args);
290  const Arg *WaCPU = nullptr, *WaFPU = nullptr;
291  const Arg *WaHDiv = nullptr, *WaArch = nullptr;
292 
293  // This vector will accumulate features from the architecture
294  // extension suffixes on -mcpu and -march (e.g. the 'bar' in
295  // -mcpu=foo+bar). We want to apply those after the features derived
296  // from the FPU, in case -mfpu generates a negative feature which
297  // the +bar is supposed to override.
298  std::vector<StringRef> ExtensionFeatures;
299 
300  if (!ForAS) {
301  // FIXME: Note, this is a hack, the LLVM backend doesn't actually use these
302  // yet (it uses the -mfloat-abi and -msoft-float options), and it is
303  // stripped out by the ARM target. We should probably pass this a new
304  // -target-option, which is handled by the -cc1/-cc1as invocation.
305  //
306  // FIXME2: For consistency, it would be ideal if we set up the target
307  // machine state the same when using the frontend or the assembler. We don't
308  // currently do that for the assembler, we pass the options directly to the
309  // backend and never even instantiate the frontend TargetInfo. If we did,
310  // and used its handleTargetFeatures hook, then we could ensure the
311  // assembler and the frontend behave the same.
312 
313  // Use software floating point operations?
314  if (ABI == arm::FloatABI::Soft)
315  Features.push_back("+soft-float");
316 
317  // Use software floating point argument passing?
318  if (ABI != arm::FloatABI::Hard)
319  Features.push_back("+soft-float-abi");
320  } else {
321  // Here, we make sure that -Wa,-mfpu/cpu/arch/hwdiv will be passed down
322  // to the assembler correctly.
323  for (const Arg *A :
324  Args.filtered(options::OPT_Wa_COMMA, options::OPT_Xassembler)) {
325  StringRef Value = A->getValue();
326  if (Value.startswith("-mfpu=")) {
327  WaFPU = A;
328  } else if (Value.startswith("-mcpu=")) {
329  WaCPU = A;
330  } else if (Value.startswith("-mhwdiv=")) {
331  WaHDiv = A;
332  } else if (Value.startswith("-march=")) {
333  WaArch = A;
334  }
335  }
336  }
337 
338  if (ThreadPointer == arm::ReadTPMode::Cp15)
339  Features.push_back("+read-tp-hard");
340 
341  const Arg *ArchArg = Args.getLastArg(options::OPT_march_EQ);
342  const Arg *CPUArg = Args.getLastArg(options::OPT_mcpu_EQ);
343  StringRef ArchName;
344  StringRef CPUName;
345 
346  // Check -mcpu. ClangAs gives preference to -Wa,-mcpu=.
347  if (WaCPU) {
348  if (CPUArg)
349  D.Diag(clang::diag::warn_drv_unused_argument)
350  << CPUArg->getAsString(Args);
351  CPUName = StringRef(WaCPU->getValue()).substr(6);
352  CPUArg = WaCPU;
353  } else if (CPUArg)
354  CPUName = CPUArg->getValue();
355 
356  // Check -march. ClangAs gives preference to -Wa,-march=.
357  if (WaArch) {
358  if (ArchArg)
359  D.Diag(clang::diag::warn_drv_unused_argument)
360  << ArchArg->getAsString(Args);
361  ArchName = StringRef(WaArch->getValue()).substr(7);
362  checkARMArchName(D, WaArch, Args, ArchName, CPUName,
363  ExtensionFeatures, Triple);
364  // FIXME: Set Arch.
365  D.Diag(clang::diag::warn_drv_unused_argument) << WaArch->getAsString(Args);
366  } else if (ArchArg) {
367  ArchName = ArchArg->getValue();
368  checkARMArchName(D, ArchArg, Args, ArchName, CPUName,
369  ExtensionFeatures, Triple);
370  }
371 
372  // Add CPU features for generic CPUs
373  if (CPUName == "native") {
374  llvm::StringMap<bool> HostFeatures;
375  if (llvm::sys::getHostCPUFeatures(HostFeatures))
376  for (auto &F : HostFeatures)
377  Features.push_back(
378  Args.MakeArgString((F.second ? "+" : "-") + F.first()));
379  } else if (!CPUName.empty()) {
380  // This sets the default features for the specified CPU. We certainly don't
381  // want to override the features that have been explicitly specified on the
382  // command line. Therefore, process them directly instead of appending them
383  // at the end later.
384  DecodeARMFeaturesFromCPU(D, CPUName, Features);
385  }
386 
387  if (CPUArg)
388  checkARMCPUName(D, CPUArg, Args, CPUName, ArchName,
389  ExtensionFeatures, Triple);
390  // Honor -mfpu=. ClangAs gives preference to -Wa,-mfpu=.
391  const Arg *FPUArg = Args.getLastArg(options::OPT_mfpu_EQ);
392  if (WaFPU) {
393  if (FPUArg)
394  D.Diag(clang::diag::warn_drv_unused_argument)
395  << FPUArg->getAsString(Args);
396  getARMFPUFeatures(D, WaFPU, Args, StringRef(WaFPU->getValue()).substr(6),
397  Features);
398  } else if (FPUArg) {
399  getARMFPUFeatures(D, FPUArg, Args, FPUArg->getValue(), Features);
400  } else if (Triple.isAndroid() && getARMSubArchVersionNumber(Triple) >= 7) {
401  const char *AndroidFPU = "neon";
402  if (!llvm::ARM::getFPUFeatures(llvm::ARM::parseFPU(AndroidFPU), Features))
403  D.Diag(clang::diag::err_drv_clang_unsupported)
404  << std::string("-mfpu=") + AndroidFPU;
405  }
406 
407  // Now we've finished accumulating features from arch, cpu and fpu,
408  // we can append the ones for architecture extensions that we
409  // collected separately.
410  Features.insert(std::end(Features),
411  std::begin(ExtensionFeatures), std::end(ExtensionFeatures));
412 
413  // Honor -mhwdiv=. ClangAs gives preference to -Wa,-mhwdiv=.
414  const Arg *HDivArg = Args.getLastArg(options::OPT_mhwdiv_EQ);
415  if (WaHDiv) {
416  if (HDivArg)
417  D.Diag(clang::diag::warn_drv_unused_argument)
418  << HDivArg->getAsString(Args);
419  getARMHWDivFeatures(D, WaHDiv, Args,
420  StringRef(WaHDiv->getValue()).substr(8), Features);
421  } else if (HDivArg)
422  getARMHWDivFeatures(D, HDivArg, Args, HDivArg->getValue(), Features);
423 
424  // Handle (arch-dependent) fp16fml/fullfp16 relationship.
425  // Must happen before any features are disabled due to soft-float.
426  // FIXME: this fp16fml option handling will be reimplemented after the
427  // TargetParser rewrite.
428  const auto ItRNoFullFP16 = std::find(Features.rbegin(), Features.rend(), "-fullfp16");
429  const auto ItRFP16FML = std::find(Features.rbegin(), Features.rend(), "+fp16fml");
430  if (Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v8_4a) {
431  const auto ItRFullFP16 = std::find(Features.rbegin(), Features.rend(), "+fullfp16");
432  if (ItRFullFP16 < ItRNoFullFP16 && ItRFullFP16 < ItRFP16FML) {
433  // Only entangled feature that can be to the right of this +fullfp16 is -fp16fml.
434  // Only append the +fp16fml if there is no -fp16fml after the +fullfp16.
435  if (std::find(Features.rbegin(), ItRFullFP16, "-fp16fml") == ItRFullFP16)
436  Features.push_back("+fp16fml");
437  }
438  else
439  goto fp16_fml_fallthrough;
440  }
441  else {
442 fp16_fml_fallthrough:
443  // In both of these cases, putting the 'other' feature on the end of the vector will
444  // result in the same effect as placing it immediately after the current feature.
445  if (ItRNoFullFP16 < ItRFP16FML)
446  Features.push_back("-fp16fml");
447  else if (ItRNoFullFP16 > ItRFP16FML)
448  Features.push_back("+fullfp16");
449  }
450 
451  // Setting -msoft-float/-mfloat-abi=soft effectively disables the FPU (GCC
452  // ignores the -mfpu options in this case).
453  // Note that the ABI can also be set implicitly by the target selected.
454  if (ABI == arm::FloatABI::Soft) {
455  llvm::ARM::getFPUFeatures(llvm::ARM::FK_NONE, Features);
456 
457  // Disable all features relating to hardware FP.
458  // FIXME: Disabling fpregs should be enough all by itself, since all
459  // the other FP features are dependent on it. However
460  // there is currently no easy way to test this in clang, so for
461  // now just be explicit and disable all known dependent features
462  // as well.
463  for (std::string Feature : {
464  "vfp2", "vfp2sp",
465  "vfp3", "vfp3sp", "vfp3d16", "vfp3d16sp",
466  "vfp4", "vfp4sp", "vfp4d16", "vfp4d16sp",
467  "fp-armv8", "fp-armv8sp", "fp-armv8d16", "fp-armv8d16sp",
468  "fullfp16", "neon", "crypto", "dotprod", "fp16fml",
469  "mve", "mve.fp",
470  "fp64", "d32", "fpregs"})
471  Features.push_back(Args.MakeArgString("-" + Feature));
472  }
473 
474  // En/disable crc code generation.
475  if (Arg *A = Args.getLastArg(options::OPT_mcrc, options::OPT_mnocrc)) {
476  if (A->getOption().matches(options::OPT_mcrc))
477  Features.push_back("+crc");
478  else
479  Features.push_back("-crc");
480  }
481 
482  // For Arch >= ARMv8.0 && A profile: crypto = sha2 + aes
483  // FIXME: this needs reimplementation after the TargetParser rewrite
484  auto CryptoIt = llvm::find_if(llvm::reverse(Features), [](const StringRef F) {
485  return F.contains("crypto");
486  });
487  if (CryptoIt != Features.rend()) {
488  if (CryptoIt->take_front() == "+") {
489  StringRef ArchSuffix = arm::getLLVMArchSuffixForARM(
490  arm::getARMTargetCPU(CPUName, ArchName, Triple), ArchName, Triple);
491  if (llvm::ARM::parseArchVersion(ArchSuffix) >= 8 &&
492  llvm::ARM::parseArchProfile(ArchSuffix) ==
493  llvm::ARM::ProfileKind::A) {
494  if (ArchName.find_lower("+nosha2") == StringRef::npos &&
495  CPUName.find_lower("+nosha2") == StringRef::npos)
496  Features.push_back("+sha2");
497  if (ArchName.find_lower("+noaes") == StringRef::npos &&
498  CPUName.find_lower("+noaes") == StringRef::npos)
499  Features.push_back("+aes");
500  } else {
501  D.Diag(clang::diag::warn_target_unsupported_extension)
502  << "crypto"
503  << llvm::ARM::getArchName(llvm::ARM::parseArch(ArchSuffix));
504  // With -fno-integrated-as -mfpu=crypto-neon-fp-armv8 some assemblers such as the GNU assembler
505  // will permit the use of crypto instructions as the fpu will override the architecture.
506  // We keep the crypto feature in this case to preserve compatibility.
507  // In all other cases we remove the crypto feature.
508  if (!Args.hasArg(options::OPT_fno_integrated_as))
509  Features.push_back("-crypto");
510  }
511  }
512  }
513 
514  // CMSE: Check for target 8M (for -mcmse to be applicable) is performed later.
515  if (Args.getLastArg(options::OPT_mcmse))
516  Features.push_back("+8msecext");
517 
518  // Look for the last occurrence of -mlong-calls or -mno-long-calls. If
519  // neither options are specified, see if we are compiling for kernel/kext and
520  // decide whether to pass "+long-calls" based on the OS and its version.
521  if (Arg *A = Args.getLastArg(options::OPT_mlong_calls,
522  options::OPT_mno_long_calls)) {
523  if (A->getOption().matches(options::OPT_mlong_calls))
524  Features.push_back("+long-calls");
525  } else if (KernelOrKext && (!Triple.isiOS() || Triple.isOSVersionLT(6)) &&
526  !Triple.isWatchOS()) {
527  Features.push_back("+long-calls");
528  }
529 
530  // Generate execute-only output (no data access to code sections).
531  // This only makes sense for the compiler, not for the assembler.
532  if (!ForAS) {
533  // Supported only on ARMv6T2 and ARMv7 and above.
534  // Cannot be combined with -mno-movt or -mlong-calls
535  if (Arg *A = Args.getLastArg(options::OPT_mexecute_only, options::OPT_mno_execute_only)) {
536  if (A->getOption().matches(options::OPT_mexecute_only)) {
537  if (getARMSubArchVersionNumber(Triple) < 7 &&
538  llvm::ARM::parseArch(Triple.getArchName()) != llvm::ARM::ArchKind::ARMV6T2)
539  D.Diag(diag::err_target_unsupported_execute_only) << Triple.getArchName();
540  else if (Arg *B = Args.getLastArg(options::OPT_mno_movt))
541  D.Diag(diag::err_opt_not_valid_with_opt) << A->getAsString(Args) << B->getAsString(Args);
542  // Long calls create constant pool entries and have not yet been fixed up
543  // to play nicely with execute-only. Hence, they cannot be used in
544  // execute-only code for now
545  else if (Arg *B = Args.getLastArg(options::OPT_mlong_calls, options::OPT_mno_long_calls)) {
546  if (B->getOption().matches(options::OPT_mlong_calls))
547  D.Diag(diag::err_opt_not_valid_with_opt) << A->getAsString(Args) << B->getAsString(Args);
548  }
549  Features.push_back("+execute-only");
550  }
551  }
552  }
553 
554  // Kernel code has more strict alignment requirements.
555  if (KernelOrKext)
556  Features.push_back("+strict-align");
557  else if (Arg *A = Args.getLastArg(options::OPT_mno_unaligned_access,
558  options::OPT_munaligned_access)) {
559  if (A->getOption().matches(options::OPT_munaligned_access)) {
560  // No v6M core supports unaligned memory access (v6M ARM ARM A3.2).
561  if (Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v6m)
562  D.Diag(diag::err_target_unsupported_unaligned) << "v6m";
563  // v8M Baseline follows on from v6M, so doesn't support unaligned memory
564  // access either.
565  else if (Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v8m_baseline)
566  D.Diag(diag::err_target_unsupported_unaligned) << "v8m.base";
567  } else
568  Features.push_back("+strict-align");
569  } else {
570  // Assume pre-ARMv6 doesn't support unaligned accesses.
571  //
572  // ARMv6 may or may not support unaligned accesses depending on the
573  // SCTLR.U bit, which is architecture-specific. We assume ARMv6
574  // Darwin and NetBSD targets support unaligned accesses, and others don't.
575  //
576  // ARMv7 always has SCTLR.U set to 1, but it has a new SCTLR.A bit
577  // which raises an alignment fault on unaligned accesses. Linux
578  // defaults this bit to 0 and handles it as a system-wide (not
579  // per-process) setting. It is therefore safe to assume that ARMv7+
580  // Linux targets support unaligned accesses. The same goes for NaCl.
581  //
582  // The above behavior is consistent with GCC.
583  int VersionNum = getARMSubArchVersionNumber(Triple);
584  if (Triple.isOSDarwin() || Triple.isOSNetBSD()) {
585  if (VersionNum < 6 ||
586  Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v6m)
587  Features.push_back("+strict-align");
588  } else if (Triple.isOSLinux() || Triple.isOSNaCl()) {
589  if (VersionNum < 7)
590  Features.push_back("+strict-align");
591  } else
592  Features.push_back("+strict-align");
593  }
594 
595  // llvm does not support reserving registers in general. There is support
596  // for reserving r9 on ARM though (defined as a platform-specific register
597  // in ARM EABI).
598  if (Args.hasArg(options::OPT_ffixed_r9))
599  Features.push_back("+reserve-r9");
600 
601  // The kext linker doesn't know how to deal with movw/movt.
602  if (KernelOrKext || Args.hasArg(options::OPT_mno_movt))
603  Features.push_back("+no-movt");
604 
605  if (Args.hasArg(options::OPT_mno_neg_immediates))
606  Features.push_back("+no-neg-immediates");
607 }
608 
609 const std::string arm::getARMArch(StringRef Arch, const llvm::Triple &Triple) {
610  std::string MArch;
611  if (!Arch.empty())
612  MArch = Arch;
613  else
614  MArch = Triple.getArchName();
615  MArch = StringRef(MArch).split("+").first.lower();
616 
617  // Handle -march=native.
618  if (MArch == "native") {
619  std::string CPU = llvm::sys::getHostCPUName();
620  if (CPU != "generic") {
621  // Translate the native cpu into the architecture suffix for that CPU.
622  StringRef Suffix = arm::getLLVMArchSuffixForARM(CPU, MArch, Triple);
623  // If there is no valid architecture suffix for this CPU we don't know how
624  // to handle it, so return no architecture.
625  if (Suffix.empty())
626  MArch = "";
627  else
628  MArch = std::string("arm") + Suffix.str();
629  }
630  }
631 
632  return MArch;
633 }
634 
635 /// Get the (LLVM) name of the minimum ARM CPU for the arch we are targeting.
636 StringRef arm::getARMCPUForMArch(StringRef Arch, const llvm::Triple &Triple) {
637  std::string MArch = getARMArch(Arch, Triple);
638  // getARMCPUForArch defaults to the triple if MArch is empty, but empty MArch
639  // here means an -march=native that we can't handle, so instead return no CPU.
640  if (MArch.empty())
641  return StringRef();
642 
643  // We need to return an empty string here on invalid MArch values as the
644  // various places that call this function can't cope with a null result.
645  return Triple.getARMCPUForArch(MArch);
646 }
647 
648 /// getARMTargetCPU - Get the (LLVM) name of the ARM cpu we are targeting.
649 std::string arm::getARMTargetCPU(StringRef CPU, StringRef Arch,
650  const llvm::Triple &Triple) {
651  // FIXME: Warn on inconsistent use of -mcpu and -march.
652  // If we have -mcpu=, use that.
653  if (!CPU.empty()) {
654  std::string MCPU = StringRef(CPU).split("+").first.lower();
655  // Handle -mcpu=native.
656  if (MCPU == "native")
657  return llvm::sys::getHostCPUName();
658  else
659  return MCPU;
660  }
661 
662  return getARMCPUForMArch(Arch, Triple);
663 }
664 
665 /// getLLVMArchSuffixForARM - Get the LLVM ArchKind value to use for a
666 /// particular CPU (or Arch, if CPU is generic). This is needed to
667 /// pass to functions like llvm::ARM::getDefaultFPU which need an
668 /// ArchKind as well as a CPU name.
669 llvm::ARM::ArchKind arm::getLLVMArchKindForARM(StringRef CPU, StringRef Arch,
670  const llvm::Triple &Triple) {
671  llvm::ARM::ArchKind ArchKind;
672  if (CPU == "generic" || CPU.empty()) {
673  std::string ARMArch = tools::arm::getARMArch(Arch, Triple);
674  ArchKind = llvm::ARM::parseArch(ARMArch);
675  if (ArchKind == llvm::ARM::ArchKind::INVALID)
676  // In case of generic Arch, i.e. "arm",
677  // extract arch from default cpu of the Triple
678  ArchKind = llvm::ARM::parseCPUArch(Triple.getARMCPUForArch(ARMArch));
679  } else {
680  // FIXME: horrible hack to get around the fact that Cortex-A7 is only an
681  // armv7k triple if it's actually been specified via "-arch armv7k".
682  ArchKind = (Arch == "armv7k" || Arch == "thumbv7k")
683  ? llvm::ARM::ArchKind::ARMV7K
684  : llvm::ARM::parseCPUArch(CPU);
685  }
686  return ArchKind;
687 }
688 
689 /// getLLVMArchSuffixForARM - Get the LLVM arch name to use for a particular
690 /// CPU (or Arch, if CPU is generic).
691 // FIXME: This is redundant with -mcpu, why does LLVM use this.
692 StringRef arm::getLLVMArchSuffixForARM(StringRef CPU, StringRef Arch,
693  const llvm::Triple &Triple) {
694  llvm::ARM::ArchKind ArchKind = getLLVMArchKindForARM(CPU, Arch, Triple);
695  if (ArchKind == llvm::ARM::ArchKind::INVALID)
696  return "";
697  return llvm::ARM::getSubArch(ArchKind);
698 }
699 
700 void arm::appendBE8LinkFlag(const ArgList &Args, ArgStringList &CmdArgs,
701  const llvm::Triple &Triple) {
702  if (Args.hasArg(options::OPT_r))
703  return;
704 
705  // ARMv7 (and later) and ARMv6-M do not support BE-32, so instruct the linker
706  // to generate BE-8 executables.
707  if (arm::getARMSubArchVersionNumber(Triple) >= 7 || arm::isARMMProfile(Triple))
708  CmdArgs.push_back("--be8");
709 }
bool useAAPCSForMachO(const llvm::Triple &T)
Definition: ARM.cpp:131
DiagnosticBuilder Diag(unsigned DiagID) const
Definition: Driver.h:108
static void getExtensionFeatures(const Driver &D, const ArgList &Args, std::vector< StringRef > &Features, StringRef &MArch, StringRef &Exts)
Definition: RISCV.cpp:96
FloatABI getARMFloatABI(const ToolChain &TC, const llvm::opt::ArgList &Args)
const std::string getARMArch(llvm::StringRef Arch, const llvm::Triple &Triple)
static void DecodeARMFeaturesFromCPU(const Driver &D, StringRef CPU, std::vector< StringRef > &Features)
Definition: ARM.cpp:88
bool isARMMProfile(const llvm::Triple &Triple)
Definition: ARM.cpp:30
llvm::ARM::ArchKind getLLVMArchKindForARM(StringRef CPU, StringRef Arch, const llvm::Triple &Triple)
getLLVMArchSuffixForARM - Get the LLVM ArchKind value to use for a particular CPU (or Arch...
Definition: ARM.cpp:669
StringRef getARMCPUForMArch(llvm::StringRef Arch, const llvm::Triple &Triple)
Driver - Encapsulate logic for constructing compilation processes from a set of gcc-driver-like comma...
Definition: Driver.h:59
const llvm::Triple & getEffectiveTriple() const
Get the toolchain&#39;s effective clang triple.
Definition: ToolChain.h:227
static bool DecodeARMFeatures(const Driver &D, StringRef text, StringRef CPU, llvm::ARM::ArchKind ArchKind, std::vector< StringRef > &Features)
Definition: ARM.cpp:75
static void checkARMArchName(const Driver &D, const Arg *A, const ArgList &Args, llvm::StringRef ArchName, llvm::StringRef CPUName, std::vector< StringRef > &Features, const llvm::Triple &Triple)
Definition: ARM.cpp:101
int getARMSubArchVersionNumber(const llvm::Triple &Triple)
Definition: ARM.cpp:24
static void getARMFPUFeatures(const Driver &D, const Arg *A, const ArgList &Args, StringRef FPU, std::vector< StringRef > &Features)
Definition: ARM.cpp:66
const Driver & getDriver() const
Definition: ToolChain.h:197
std::string getARMTargetCPU(StringRef CPU, llvm::StringRef Arch, const llvm::Triple &Triple)
Dataflow Directional Tag Classes.
void getARMArchCPUFromArgs(const llvm::opt::ArgList &Args, llvm::StringRef &Arch, llvm::StringRef &CPU, bool FromAs=false)
static void getARMHWDivFeatures(const Driver &D, const Arg *A, const ArgList &Args, StringRef HWDiv, std::vector< StringRef > &Features)
Definition: ARM.cpp:57
void appendBE8LinkFlag(const llvm::opt::ArgList &Args, llvm::opt::ArgStringList &CmdArgs, const llvm::Triple &Triple)
ReadTPMode getReadTPMode(const ToolChain &TC, const llvm::opt::ArgList &Args)
static void checkARMCPUName(const Driver &D, const Arg *A, const ArgList &Args, llvm::StringRef CPUName, llvm::StringRef ArchName, std::vector< StringRef > &Features, const llvm::Triple &Triple)
Definition: ARM.cpp:116
void getARMTargetFeatures(const ToolChain &TC, const llvm::Triple &Triple, const llvm::opt::ArgList &Args, llvm::opt::ArgStringList &CmdArgs, std::vector< llvm::StringRef > &Features, bool ForAS)
StringRef getLLVMArchSuffixForARM(llvm::StringRef CPU, llvm::StringRef Arch, const llvm::Triple &Triple)
ToolChain - Access to tools for a single platform.
Definition: ToolChain.h:88