clang  16.0.0git
ARM.cpp
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1 //===--- ARM.cpp - ARM (not AArch64) Helpers for Tools ----------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "ARM.h"
10 #include "clang/Driver/Driver.h"
12 #include "clang/Driver/Options.h"
13 #include "llvm/ADT/StringSwitch.h"
14 #include "llvm/Option/ArgList.h"
15 #include "llvm/Support/ARMTargetParser.h"
16 #include "llvm/Support/TargetParser.h"
17 #include "llvm/Support/Host.h"
18 
19 using namespace clang::driver;
20 using namespace clang::driver::tools;
21 using namespace clang;
22 using namespace llvm::opt;
23 
24 // Get SubArch (vN).
25 int arm::getARMSubArchVersionNumber(const llvm::Triple &Triple) {
26  llvm::StringRef Arch = Triple.getArchName();
27  return llvm::ARM::parseArchVersion(Arch);
28 }
29 
30 // True if M-profile.
31 bool arm::isARMMProfile(const llvm::Triple &Triple) {
32  llvm::StringRef Arch = Triple.getArchName();
33  return llvm::ARM::parseArchProfile(Arch) == llvm::ARM::ProfileKind::M;
34 }
35 
36 // True if A-profile.
37 bool arm::isARMAProfile(const llvm::Triple &Triple) {
38  llvm::StringRef Arch = Triple.getArchName();
39  return llvm::ARM::parseArchProfile(Arch) == llvm::ARM::ProfileKind::A;
40 }
41 
42 // Get Arch/CPU from args.
43 void arm::getARMArchCPUFromArgs(const ArgList &Args, llvm::StringRef &Arch,
44  llvm::StringRef &CPU, bool FromAs) {
45  if (const Arg *A = Args.getLastArg(clang::driver::options::OPT_mcpu_EQ))
46  CPU = A->getValue();
47  if (const Arg *A = Args.getLastArg(options::OPT_march_EQ))
48  Arch = A->getValue();
49  if (!FromAs)
50  return;
51 
52  for (const Arg *A :
53  Args.filtered(options::OPT_Wa_COMMA, options::OPT_Xassembler)) {
54  // Use getValues because -Wa can have multiple arguments
55  // e.g. -Wa,-mcpu=foo,-mcpu=bar
56  for (StringRef Value : A->getValues()) {
57  if (Value.startswith("-mcpu="))
58  CPU = Value.substr(6);
59  if (Value.startswith("-march="))
60  Arch = Value.substr(7);
61  }
62  }
63 }
64 
65 // Handle -mhwdiv=.
66 // FIXME: Use ARMTargetParser.
67 static void getARMHWDivFeatures(const Driver &D, const Arg *A,
68  const ArgList &Args, StringRef HWDiv,
69  std::vector<StringRef> &Features) {
70  uint64_t HWDivID = llvm::ARM::parseHWDiv(HWDiv);
71  if (!llvm::ARM::getHWDivFeatures(HWDivID, Features))
72  D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
73 }
74 
75 // Handle -mfpu=.
76 static unsigned getARMFPUFeatures(const Driver &D, const Arg *A,
77  const ArgList &Args, StringRef FPU,
78  std::vector<StringRef> &Features) {
79  unsigned FPUID = llvm::ARM::parseFPU(FPU);
80  if (!llvm::ARM::getFPUFeatures(FPUID, Features))
81  D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
82  return FPUID;
83 }
84 
85 // Decode ARM features from string like +[no]featureA+[no]featureB+...
86 static bool DecodeARMFeatures(const Driver &D, StringRef text, StringRef CPU,
87  llvm::ARM::ArchKind ArchKind,
88  std::vector<StringRef> &Features,
89  unsigned &ArgFPUID) {
91  text.split(Split, StringRef("+"), -1, false);
92 
93  for (StringRef Feature : Split) {
94  if (!appendArchExtFeatures(CPU, ArchKind, Feature, Features, ArgFPUID))
95  return false;
96  }
97  return true;
98 }
99 
100 static void DecodeARMFeaturesFromCPU(const Driver &D, StringRef CPU,
101  std::vector<StringRef> &Features) {
102  CPU = CPU.split("+").first;
103  if (CPU != "generic") {
104  llvm::ARM::ArchKind ArchKind = llvm::ARM::parseCPUArch(CPU);
105  uint64_t Extension = llvm::ARM::getDefaultExtensions(CPU, ArchKind);
106  llvm::ARM::getExtensionFeatures(Extension, Features);
107  }
108 }
109 
110 // Check if -march is valid by checking if it can be canonicalised and parsed.
111 // getARMArch is used here instead of just checking the -march value in order
112 // to handle -march=native correctly.
113 static void checkARMArchName(const Driver &D, const Arg *A, const ArgList &Args,
114  llvm::StringRef ArchName, llvm::StringRef CPUName,
115  std::vector<StringRef> &Features,
116  const llvm::Triple &Triple, unsigned &ArgFPUID) {
117  std::pair<StringRef, StringRef> Split = ArchName.split("+");
118 
119  std::string MArch = arm::getARMArch(ArchName, Triple);
120  llvm::ARM::ArchKind ArchKind = llvm::ARM::parseArch(MArch);
121  if (ArchKind == llvm::ARM::ArchKind::INVALID ||
122  (Split.second.size() && !DecodeARMFeatures(D, Split.second, CPUName,
123  ArchKind, Features, ArgFPUID)))
124  D.Diag(clang::diag::err_drv_unsupported_option_argument)
125  << A->getSpelling() << A->getValue();
126 }
127 
128 // Check -mcpu=. Needs ArchName to handle -mcpu=generic.
129 static void checkARMCPUName(const Driver &D, const Arg *A, const ArgList &Args,
130  llvm::StringRef CPUName, llvm::StringRef ArchName,
131  std::vector<StringRef> &Features,
132  const llvm::Triple &Triple, unsigned &ArgFPUID) {
133  std::pair<StringRef, StringRef> Split = CPUName.split("+");
134 
135  std::string CPU = arm::getARMTargetCPU(CPUName, ArchName, Triple);
136  llvm::ARM::ArchKind ArchKind =
137  arm::getLLVMArchKindForARM(CPU, ArchName, Triple);
138  if (ArchKind == llvm::ARM::ArchKind::INVALID ||
139  (Split.second.size() &&
140  !DecodeARMFeatures(D, Split.second, CPU, ArchKind, Features, ArgFPUID)))
141  D.Diag(clang::diag::err_drv_unsupported_option_argument)
142  << A->getSpelling() << A->getValue();
143 }
144 
145 bool arm::useAAPCSForMachO(const llvm::Triple &T) {
146  // The backend is hardwired to assume AAPCS for M-class processors, ensure
147  // the frontend matches that.
148  return T.getEnvironment() == llvm::Triple::EABI ||
149  T.getEnvironment() == llvm::Triple::EABIHF ||
150  T.getOS() == llvm::Triple::UnknownOS || isARMMProfile(T);
151 }
152 
153 // We follow GCC and support when the backend has support for the MRC/MCR
154 // instructions that are used to set the hard thread pointer ("CP15 C13
155 // Thread id").
156 bool arm::isHardTPSupported(const llvm::Triple &Triple) {
157  int Ver = getARMSubArchVersionNumber(Triple);
158  llvm::ARM::ArchKind AK = llvm::ARM::parseArch(Triple.getArchName());
159  return Triple.isARM() || AK == llvm::ARM::ArchKind::ARMV6T2 ||
160  (Ver >= 7 && AK != llvm::ARM::ArchKind::ARMV8MBaseline);
161 }
162 
163 // Select mode for reading thread pointer (-mtp=soft/cp15).
164 arm::ReadTPMode arm::getReadTPMode(const Driver &D, const ArgList &Args,
165  const llvm::Triple &Triple, bool ForAS) {
166  if (Arg *A = Args.getLastArg(options::OPT_mtp_mode_EQ)) {
167  arm::ReadTPMode ThreadPointer =
168  llvm::StringSwitch<arm::ReadTPMode>(A->getValue())
169  .Case("cp15", ReadTPMode::Cp15)
170  .Case("soft", ReadTPMode::Soft)
171  .Default(ReadTPMode::Invalid);
172  if (ThreadPointer == ReadTPMode::Cp15 && !isHardTPSupported(Triple) &&
173  !ForAS) {
174  D.Diag(diag::err_target_unsupported_tp_hard) << Triple.getArchName();
175  return ReadTPMode::Invalid;
176  }
177  if (ThreadPointer != ReadTPMode::Invalid)
178  return ThreadPointer;
179  if (StringRef(A->getValue()).empty())
180  D.Diag(diag::err_drv_missing_arg_mtp) << A->getAsString(Args);
181  else
182  D.Diag(diag::err_drv_invalid_mtp) << A->getAsString(Args);
183  return ReadTPMode::Invalid;
184  }
185  return ReadTPMode::Soft;
186 }
187 
188 void arm::setArchNameInTriple(const Driver &D, const ArgList &Args,
189  types::ID InputType, llvm::Triple &Triple) {
190  StringRef MCPU, MArch;
191  if (const Arg *A = Args.getLastArg(options::OPT_mcpu_EQ))
192  MCPU = A->getValue();
193  if (const Arg *A = Args.getLastArg(options::OPT_march_EQ))
194  MArch = A->getValue();
195 
196  std::string CPU = Triple.isOSBinFormatMachO()
197  ? tools::arm::getARMCPUForMArch(MArch, Triple).str()
198  : tools::arm::getARMTargetCPU(MCPU, MArch, Triple);
199  StringRef Suffix = tools::arm::getLLVMArchSuffixForARM(CPU, MArch, Triple);
200 
201  bool IsBigEndian = Triple.getArch() == llvm::Triple::armeb ||
202  Triple.getArch() == llvm::Triple::thumbeb;
203  // Handle pseudo-target flags '-mlittle-endian'/'-EL' and
204  // '-mbig-endian'/'-EB'.
205  if (Arg *A = Args.getLastArg(options::OPT_mlittle_endian,
206  options::OPT_mbig_endian)) {
207  IsBigEndian = !A->getOption().matches(options::OPT_mlittle_endian);
208  }
209  std::string ArchName = IsBigEndian ? "armeb" : "arm";
210 
211  // FIXME: Thumb should just be another -target-feaure, not in the triple.
212  bool IsMProfile =
213  llvm::ARM::parseArchProfile(Suffix) == llvm::ARM::ProfileKind::M;
214  bool ThumbDefault = IsMProfile ||
215  // Thumb2 is the default for V7 on Darwin.
216  (llvm::ARM::parseArchVersion(Suffix) == 7 &&
217  Triple.isOSBinFormatMachO()) ||
218  // FIXME: this is invalid for WindowsCE
219  Triple.isOSWindows();
220 
221  // Check if ARM ISA was explicitly selected (using -mno-thumb or -marm) for
222  // M-Class CPUs/architecture variants, which is not supported.
223  bool ARMModeRequested =
224  !Args.hasFlag(options::OPT_mthumb, options::OPT_mno_thumb, ThumbDefault);
225  if (IsMProfile && ARMModeRequested) {
226  if (MCPU.size())
227  D.Diag(diag::err_cpu_unsupported_isa) << CPU << "ARM";
228  else
229  D.Diag(diag::err_arch_unsupported_isa)
230  << tools::arm::getARMArch(MArch, Triple) << "ARM";
231  }
232 
233  // Check to see if an explicit choice to use thumb has been made via
234  // -mthumb. For assembler files we must check for -mthumb in the options
235  // passed to the assembler via -Wa or -Xassembler.
236  bool IsThumb = false;
237  if (InputType != types::TY_PP_Asm)
238  IsThumb =
239  Args.hasFlag(options::OPT_mthumb, options::OPT_mno_thumb, ThumbDefault);
240  else {
241  // Ideally we would check for these flags in
242  // CollectArgsForIntegratedAssembler but we can't change the ArchName at
243  // that point.
244  llvm::StringRef WaMArch, WaMCPU;
245  for (const auto *A :
246  Args.filtered(options::OPT_Wa_COMMA, options::OPT_Xassembler)) {
247  for (StringRef Value : A->getValues()) {
248  // There is no assembler equivalent of -mno-thumb, -marm, or -mno-arm.
249  if (Value == "-mthumb")
250  IsThumb = true;
251  else if (Value.startswith("-march="))
252  WaMArch = Value.substr(7);
253  else if (Value.startswith("-mcpu="))
254  WaMCPU = Value.substr(6);
255  }
256  }
257 
258  if (WaMCPU.size() || WaMArch.size()) {
259  // The way this works means that we prefer -Wa,-mcpu's architecture
260  // over -Wa,-march. Which matches the compiler behaviour.
261  Suffix = tools::arm::getLLVMArchSuffixForARM(WaMCPU, WaMArch, Triple);
262  }
263  }
264 
265  // Assembly files should start in ARM mode, unless arch is M-profile, or
266  // -mthumb has been passed explicitly to the assembler. Windows is always
267  // thumb.
268  if (IsThumb || IsMProfile || Triple.isOSWindows()) {
269  if (IsBigEndian)
270  ArchName = "thumbeb";
271  else
272  ArchName = "thumb";
273  }
274  Triple.setArchName(ArchName + Suffix.str());
275 }
276 
277 void arm::setFloatABIInTriple(const Driver &D, const ArgList &Args,
278  llvm::Triple &Triple) {
279  bool isHardFloat =
280  (arm::getARMFloatABI(D, Triple, Args) == arm::FloatABI::Hard);
281 
282  switch (Triple.getEnvironment()) {
283  case llvm::Triple::GNUEABI:
284  case llvm::Triple::GNUEABIHF:
285  Triple.setEnvironment(isHardFloat ? llvm::Triple::GNUEABIHF
286  : llvm::Triple::GNUEABI);
287  break;
288  case llvm::Triple::EABI:
289  case llvm::Triple::EABIHF:
290  Triple.setEnvironment(isHardFloat ? llvm::Triple::EABIHF
291  : llvm::Triple::EABI);
292  break;
293  case llvm::Triple::MuslEABI:
294  case llvm::Triple::MuslEABIHF:
295  Triple.setEnvironment(isHardFloat ? llvm::Triple::MuslEABIHF
296  : llvm::Triple::MuslEABI);
297  break;
298  default: {
299  arm::FloatABI DefaultABI = arm::getDefaultFloatABI(Triple);
300  if (DefaultABI != arm::FloatABI::Invalid &&
301  isHardFloat != (DefaultABI == arm::FloatABI::Hard)) {
302  Arg *ABIArg =
303  Args.getLastArg(options::OPT_msoft_float, options::OPT_mhard_float,
304  options::OPT_mfloat_abi_EQ);
305  assert(ABIArg && "Non-default float abi expected to be from arg");
306  D.Diag(diag::err_drv_unsupported_opt_for_target)
307  << ABIArg->getAsString(Args) << Triple.getTriple();
308  }
309  break;
310  }
311  }
312 }
313 
314 arm::FloatABI arm::getARMFloatABI(const ToolChain &TC, const ArgList &Args) {
315  return arm::getARMFloatABI(TC.getDriver(), TC.getEffectiveTriple(), Args);
316 }
317 
318 arm::FloatABI arm::getDefaultFloatABI(const llvm::Triple &Triple) {
319  auto SubArch = getARMSubArchVersionNumber(Triple);
320  switch (Triple.getOS()) {
321  case llvm::Triple::Darwin:
322  case llvm::Triple::MacOSX:
323  case llvm::Triple::IOS:
324  case llvm::Triple::TvOS:
325  case llvm::Triple::DriverKit:
326  // Darwin defaults to "softfp" for v6 and v7.
327  if (Triple.isWatchABI())
328  return FloatABI::Hard;
329  else
330  return (SubArch == 6 || SubArch == 7) ? FloatABI::SoftFP : FloatABI::Soft;
331 
332  case llvm::Triple::WatchOS:
333  return FloatABI::Hard;
334 
335  // FIXME: this is invalid for WindowsCE
336  case llvm::Triple::Win32:
337  // It is incorrect to select hard float ABI on MachO platforms if the ABI is
338  // "apcs-gnu".
339  if (Triple.isOSBinFormatMachO() && !useAAPCSForMachO(Triple))
340  return FloatABI::Soft;
341  return FloatABI::Hard;
342 
343  case llvm::Triple::NetBSD:
344  switch (Triple.getEnvironment()) {
345  case llvm::Triple::EABIHF:
346  case llvm::Triple::GNUEABIHF:
347  return FloatABI::Hard;
348  default:
349  return FloatABI::Soft;
350  }
351  break;
352 
353  case llvm::Triple::FreeBSD:
354  switch (Triple.getEnvironment()) {
355  case llvm::Triple::GNUEABIHF:
356  return FloatABI::Hard;
357  default:
358  // FreeBSD defaults to soft float
359  return FloatABI::Soft;
360  }
361  break;
362 
363  case llvm::Triple::OpenBSD:
364  return FloatABI::SoftFP;
365 
366  default:
367  switch (Triple.getEnvironment()) {
368  case llvm::Triple::GNUEABIHF:
369  case llvm::Triple::MuslEABIHF:
370  case llvm::Triple::EABIHF:
371  return FloatABI::Hard;
372  case llvm::Triple::GNUEABI:
373  case llvm::Triple::MuslEABI:
374  case llvm::Triple::EABI:
375  // EABI is always AAPCS, and if it was not marked 'hard', it's softfp
376  return FloatABI::SoftFP;
377  case llvm::Triple::Android:
378  return (SubArch >= 7) ? FloatABI::SoftFP : FloatABI::Soft;
379  default:
380  return FloatABI::Invalid;
381  }
382  }
383  return FloatABI::Invalid;
384 }
385 
386 // Select the float ABI as determined by -msoft-float, -mhard-float, and
387 // -mfloat-abi=.
388 arm::FloatABI arm::getARMFloatABI(const Driver &D, const llvm::Triple &Triple,
389  const ArgList &Args) {
391  if (Arg *A =
392  Args.getLastArg(options::OPT_msoft_float, options::OPT_mhard_float,
393  options::OPT_mfloat_abi_EQ)) {
394  if (A->getOption().matches(options::OPT_msoft_float)) {
395  ABI = FloatABI::Soft;
396  } else if (A->getOption().matches(options::OPT_mhard_float)) {
397  ABI = FloatABI::Hard;
398  } else {
399  ABI = llvm::StringSwitch<arm::FloatABI>(A->getValue())
400  .Case("soft", FloatABI::Soft)
401  .Case("softfp", FloatABI::SoftFP)
402  .Case("hard", FloatABI::Hard)
403  .Default(FloatABI::Invalid);
404  if (ABI == FloatABI::Invalid && !StringRef(A->getValue()).empty()) {
405  D.Diag(diag::err_drv_invalid_mfloat_abi) << A->getAsString(Args);
406  ABI = FloatABI::Soft;
407  }
408  }
409  }
410 
411  // If unspecified, choose the default based on the platform.
412  if (ABI == FloatABI::Invalid)
413  ABI = arm::getDefaultFloatABI(Triple);
414 
415  if (ABI == FloatABI::Invalid) {
416  // Assume "soft", but warn the user we are guessing.
417  if (Triple.isOSBinFormatMachO() &&
418  Triple.getSubArch() == llvm::Triple::ARMSubArch_v7em)
419  ABI = FloatABI::Hard;
420  else
421  ABI = FloatABI::Soft;
422 
423  if (Triple.getOS() != llvm::Triple::UnknownOS ||
424  !Triple.isOSBinFormatMachO())
425  D.Diag(diag::warn_drv_assuming_mfloat_abi_is) << "soft";
426  }
427 
428  assert(ABI != FloatABI::Invalid && "must select an ABI");
429  return ABI;
430 }
431 
432 static bool hasIntegerMVE(const std::vector<StringRef> &F) {
433  auto MVE = llvm::find(llvm::reverse(F), "+mve");
434  auto NoMVE = llvm::find(llvm::reverse(F), "-mve");
435  return MVE != F.rend() &&
436  (NoMVE == F.rend() || std::distance(MVE, NoMVE) > 0);
437 }
438 
439 void arm::getARMTargetFeatures(const Driver &D, const llvm::Triple &Triple,
440  const ArgList &Args,
441  std::vector<StringRef> &Features, bool ForAS) {
442  bool KernelOrKext =
443  Args.hasArg(options::OPT_mkernel, options::OPT_fapple_kext);
444  arm::FloatABI ABI = arm::getARMFloatABI(D, Triple, Args);
446  WaArch;
447 
448  // This vector will accumulate features from the architecture
449  // extension suffixes on -mcpu and -march (e.g. the 'bar' in
450  // -mcpu=foo+bar). We want to apply those after the features derived
451  // from the FPU, in case -mfpu generates a negative feature which
452  // the +bar is supposed to override.
453  std::vector<StringRef> ExtensionFeatures;
454 
455  if (!ForAS) {
456  // FIXME: Note, this is a hack, the LLVM backend doesn't actually use these
457  // yet (it uses the -mfloat-abi and -msoft-float options), and it is
458  // stripped out by the ARM target. We should probably pass this a new
459  // -target-option, which is handled by the -cc1/-cc1as invocation.
460  //
461  // FIXME2: For consistency, it would be ideal if we set up the target
462  // machine state the same when using the frontend or the assembler. We don't
463  // currently do that for the assembler, we pass the options directly to the
464  // backend and never even instantiate the frontend TargetInfo. If we did,
465  // and used its handleTargetFeatures hook, then we could ensure the
466  // assembler and the frontend behave the same.
467 
468  // Use software floating point operations?
469  if (ABI == arm::FloatABI::Soft)
470  Features.push_back("+soft-float");
471 
472  // Use software floating point argument passing?
473  if (ABI != arm::FloatABI::Hard)
474  Features.push_back("+soft-float-abi");
475  } else {
476  // Here, we make sure that -Wa,-mfpu/cpu/arch/hwdiv will be passed down
477  // to the assembler correctly.
478  for (const Arg *A :
479  Args.filtered(options::OPT_Wa_COMMA, options::OPT_Xassembler)) {
480  // We use getValues here because you can have many options per -Wa
481  // We will keep the last one we find for each of these
482  for (StringRef Value : A->getValues()) {
483  if (Value.startswith("-mfpu=")) {
484  WaFPU = std::make_pair(A, Value.substr(6));
485  } else if (Value.startswith("-mcpu=")) {
486  WaCPU = std::make_pair(A, Value.substr(6));
487  } else if (Value.startswith("-mhwdiv=")) {
488  WaHDiv = std::make_pair(A, Value.substr(8));
489  } else if (Value.startswith("-march=")) {
490  WaArch = std::make_pair(A, Value.substr(7));
491  }
492  }
493  }
494  }
495 
496  if (getReadTPMode(D, Args, Triple, ForAS) == ReadTPMode::Cp15)
497  Features.push_back("+read-tp-hard");
498 
499  const Arg *ArchArg = Args.getLastArg(options::OPT_march_EQ);
500  const Arg *CPUArg = Args.getLastArg(options::OPT_mcpu_EQ);
501  StringRef ArchName;
502  StringRef CPUName;
503  unsigned ArchArgFPUID = llvm::ARM::FK_INVALID;
504  unsigned CPUArgFPUID = llvm::ARM::FK_INVALID;
505 
506  // Check -mcpu. ClangAs gives preference to -Wa,-mcpu=.
507  if (WaCPU) {
508  if (CPUArg)
509  D.Diag(clang::diag::warn_drv_unused_argument)
510  << CPUArg->getAsString(Args);
511  CPUName = WaCPU->second;
512  CPUArg = WaCPU->first;
513  } else if (CPUArg)
514  CPUName = CPUArg->getValue();
515 
516  // Check -march. ClangAs gives preference to -Wa,-march=.
517  if (WaArch) {
518  if (ArchArg)
519  D.Diag(clang::diag::warn_drv_unused_argument)
520  << ArchArg->getAsString(Args);
521  ArchName = WaArch->second;
522  // This will set any features after the base architecture.
523  checkARMArchName(D, WaArch->first, Args, ArchName, CPUName,
524  ExtensionFeatures, Triple, ArchArgFPUID);
525  // The base architecture was handled in ToolChain::ComputeLLVMTriple because
526  // triple is read only by this point.
527  } else if (ArchArg) {
528  ArchName = ArchArg->getValue();
529  checkARMArchName(D, ArchArg, Args, ArchName, CPUName, ExtensionFeatures,
530  Triple, ArchArgFPUID);
531  }
532 
533  // Add CPU features for generic CPUs
534  if (CPUName == "native") {
535  llvm::StringMap<bool> HostFeatures;
536  if (llvm::sys::getHostCPUFeatures(HostFeatures))
537  for (auto &F : HostFeatures)
538  Features.push_back(
539  Args.MakeArgString((F.second ? "+" : "-") + F.first()));
540  } else if (!CPUName.empty()) {
541  // This sets the default features for the specified CPU. We certainly don't
542  // want to override the features that have been explicitly specified on the
543  // command line. Therefore, process them directly instead of appending them
544  // at the end later.
545  DecodeARMFeaturesFromCPU(D, CPUName, Features);
546  }
547 
548  if (CPUArg)
549  checkARMCPUName(D, CPUArg, Args, CPUName, ArchName, ExtensionFeatures,
550  Triple, CPUArgFPUID);
551 
552  // TODO Handle -mtune=. Suppress -Wunused-command-line-argument as a
553  // longstanding behavior.
554  (void)Args.getLastArg(options::OPT_mtune_EQ);
555 
556  // Honor -mfpu=. ClangAs gives preference to -Wa,-mfpu=.
557  unsigned FPUID = llvm::ARM::FK_INVALID;
558  const Arg *FPUArg = Args.getLastArg(options::OPT_mfpu_EQ);
559  if (WaFPU) {
560  if (FPUArg)
561  D.Diag(clang::diag::warn_drv_unused_argument)
562  << FPUArg->getAsString(Args);
563  (void)getARMFPUFeatures(D, WaFPU->first, Args, WaFPU->second, Features);
564  } else if (FPUArg) {
565  FPUID = getARMFPUFeatures(D, FPUArg, Args, FPUArg->getValue(), Features);
566  } else if (Triple.isAndroid() && getARMSubArchVersionNumber(Triple) >= 7) {
567  const char *AndroidFPU = "neon";
568  FPUID = llvm::ARM::parseFPU(AndroidFPU);
569  if (!llvm::ARM::getFPUFeatures(FPUID, Features))
570  D.Diag(clang::diag::err_drv_clang_unsupported)
571  << std::string("-mfpu=") + AndroidFPU;
572  } else {
573  if (!ForAS) {
574  std::string CPU = arm::getARMTargetCPU(CPUName, ArchName, Triple);
575  llvm::ARM::ArchKind ArchKind =
576  arm::getLLVMArchKindForARM(CPU, ArchName, Triple);
577  FPUID = llvm::ARM::getDefaultFPU(CPU, ArchKind);
578  (void)llvm::ARM::getFPUFeatures(FPUID, Features);
579  }
580  }
581 
582  // Now we've finished accumulating features from arch, cpu and fpu,
583  // we can append the ones for architecture extensions that we
584  // collected separately.
585  Features.insert(std::end(Features),
586  std::begin(ExtensionFeatures), std::end(ExtensionFeatures));
587 
588  // Honor -mhwdiv=. ClangAs gives preference to -Wa,-mhwdiv=.
589  const Arg *HDivArg = Args.getLastArg(options::OPT_mhwdiv_EQ);
590  if (WaHDiv) {
591  if (HDivArg)
592  D.Diag(clang::diag::warn_drv_unused_argument)
593  << HDivArg->getAsString(Args);
594  getARMHWDivFeatures(D, WaHDiv->first, Args, WaHDiv->second, Features);
595  } else if (HDivArg)
596  getARMHWDivFeatures(D, HDivArg, Args, HDivArg->getValue(), Features);
597 
598  // Handle (arch-dependent) fp16fml/fullfp16 relationship.
599  // Must happen before any features are disabled due to soft-float.
600  // FIXME: this fp16fml option handling will be reimplemented after the
601  // TargetParser rewrite.
602  const auto ItRNoFullFP16 = std::find(Features.rbegin(), Features.rend(), "-fullfp16");
603  const auto ItRFP16FML = std::find(Features.rbegin(), Features.rend(), "+fp16fml");
604  if (Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v8_4a) {
605  const auto ItRFullFP16 = std::find(Features.rbegin(), Features.rend(), "+fullfp16");
606  if (ItRFullFP16 < ItRNoFullFP16 && ItRFullFP16 < ItRFP16FML) {
607  // Only entangled feature that can be to the right of this +fullfp16 is -fp16fml.
608  // Only append the +fp16fml if there is no -fp16fml after the +fullfp16.
609  if (std::find(Features.rbegin(), ItRFullFP16, "-fp16fml") == ItRFullFP16)
610  Features.push_back("+fp16fml");
611  }
612  else
613  goto fp16_fml_fallthrough;
614  }
615  else {
616 fp16_fml_fallthrough:
617  // In both of these cases, putting the 'other' feature on the end of the vector will
618  // result in the same effect as placing it immediately after the current feature.
619  if (ItRNoFullFP16 < ItRFP16FML)
620  Features.push_back("-fp16fml");
621  else if (ItRNoFullFP16 > ItRFP16FML)
622  Features.push_back("+fullfp16");
623  }
624 
625  // Setting -msoft-float/-mfloat-abi=soft, -mfpu=none, or adding +nofp to
626  // -march/-mcpu effectively disables the FPU (GCC ignores the -mfpu options in
627  // this case). Note that the ABI can also be set implicitly by the target
628  // selected.
629  if (ABI == arm::FloatABI::Soft) {
630  llvm::ARM::getFPUFeatures(llvm::ARM::FK_NONE, Features);
631 
632  // Disable all features relating to hardware FP, not already disabled by the
633  // above call.
634  Features.insert(Features.end(), {"-dotprod", "-fp16fml", "-bf16", "-mve",
635  "-mve.fp", "-fpregs"});
636  } else if (FPUID == llvm::ARM::FK_NONE ||
637  ArchArgFPUID == llvm::ARM::FK_NONE ||
638  CPUArgFPUID == llvm::ARM::FK_NONE) {
639  // -mfpu=none, -march=armvX+nofp or -mcpu=X+nofp is *very* similar to
640  // -mfloat-abi=soft, only that it should not disable MVE-I. They disable the
641  // FPU, but not the FPU registers, thus MVE-I, which depends only on the
642  // latter, is still supported.
643  Features.insert(Features.end(),
644  {"-dotprod", "-fp16fml", "-bf16", "-mve.fp"});
645  if (!hasIntegerMVE(Features))
646  Features.emplace_back("-fpregs");
647  }
648 
649  // En/disable crc code generation.
650  if (Arg *A = Args.getLastArg(options::OPT_mcrc, options::OPT_mnocrc)) {
651  if (A->getOption().matches(options::OPT_mcrc))
652  Features.push_back("+crc");
653  else
654  Features.push_back("-crc");
655  }
656 
657  // For Arch >= ARMv8.0 && A or R profile: crypto = sha2 + aes
658  // Rather than replace within the feature vector, determine whether each
659  // algorithm is enabled and append this to the end of the vector.
660  // The algorithms can be controlled by their specific feature or the crypto
661  // feature, so their status can be determined by the last occurance of
662  // either in the vector. This allows one to supercede the other.
663  // e.g. +crypto+noaes in -march/-mcpu should enable sha2, but not aes
664  // FIXME: this needs reimplementation after the TargetParser rewrite
665  bool HasSHA2 = false;
666  bool HasAES = false;
667  const auto ItCrypto =
668  llvm::find_if(llvm::reverse(Features), [](const StringRef F) {
669  return F.contains("crypto");
670  });
671  const auto ItSHA2 =
672  llvm::find_if(llvm::reverse(Features), [](const StringRef F) {
673  return F.contains("crypto") || F.contains("sha2");
674  });
675  const auto ItAES =
676  llvm::find_if(llvm::reverse(Features), [](const StringRef F) {
677  return F.contains("crypto") || F.contains("aes");
678  });
679  const bool FoundSHA2 = ItSHA2 != Features.rend();
680  const bool FoundAES = ItAES != Features.rend();
681  if (FoundSHA2)
682  HasSHA2 = ItSHA2->take_front() == "+";
683  if (FoundAES)
684  HasAES = ItAES->take_front() == "+";
685  if (ItCrypto != Features.rend()) {
686  if (HasSHA2 && HasAES)
687  Features.push_back("+crypto");
688  else
689  Features.push_back("-crypto");
690  if (HasSHA2)
691  Features.push_back("+sha2");
692  else
693  Features.push_back("-sha2");
694  if (HasAES)
695  Features.push_back("+aes");
696  else
697  Features.push_back("-aes");
698  }
699 
700  if (HasSHA2 || HasAES) {
701  StringRef ArchSuffix = arm::getLLVMArchSuffixForARM(
702  arm::getARMTargetCPU(CPUName, ArchName, Triple), ArchName, Triple);
703  llvm::ARM::ProfileKind ArchProfile =
704  llvm::ARM::parseArchProfile(ArchSuffix);
705  if (!((llvm::ARM::parseArchVersion(ArchSuffix) >= 8) &&
706  (ArchProfile == llvm::ARM::ProfileKind::A ||
707  ArchProfile == llvm::ARM::ProfileKind::R))) {
708  if (HasSHA2)
709  D.Diag(clang::diag::warn_target_unsupported_extension)
710  << "sha2"
711  << llvm::ARM::getArchName(llvm::ARM::parseArch(ArchSuffix));
712  if (HasAES)
713  D.Diag(clang::diag::warn_target_unsupported_extension)
714  << "aes"
715  << llvm::ARM::getArchName(llvm::ARM::parseArch(ArchSuffix));
716  // With -fno-integrated-as -mfpu=crypto-neon-fp-armv8 some assemblers such
717  // as the GNU assembler will permit the use of crypto instructions as the
718  // fpu will override the architecture. We keep the crypto feature in this
719  // case to preserve compatibility. In all other cases we remove the crypto
720  // feature.
721  if (!Args.hasArg(options::OPT_fno_integrated_as)) {
722  Features.push_back("-sha2");
723  Features.push_back("-aes");
724  }
725  }
726  }
727 
728  // Propagate frame-chain model selection
729  if (Arg *A = Args.getLastArg(options::OPT_mframe_chain)) {
730  StringRef FrameChainOption = A->getValue();
731  if (FrameChainOption.startswith("aapcs"))
732  Features.push_back("+aapcs-frame-chain");
733  if (FrameChainOption == "aapcs+leaf")
734  Features.push_back("+aapcs-frame-chain-leaf");
735  }
736 
737  // CMSE: Check for target 8M (for -mcmse to be applicable) is performed later.
738  if (Args.getLastArg(options::OPT_mcmse))
739  Features.push_back("+8msecext");
740 
741  if (Arg *A = Args.getLastArg(options::OPT_mfix_cmse_cve_2021_35465,
742  options::OPT_mno_fix_cmse_cve_2021_35465)) {
743  if (!Args.getLastArg(options::OPT_mcmse))
744  D.Diag(diag::err_opt_not_valid_without_opt)
745  << A->getOption().getName() << "-mcmse";
746 
747  if (A->getOption().matches(options::OPT_mfix_cmse_cve_2021_35465))
748  Features.push_back("+fix-cmse-cve-2021-35465");
749  else
750  Features.push_back("-fix-cmse-cve-2021-35465");
751  }
752 
753  // This also handles the -m(no-)fix-cortex-a72-1655431 arguments via aliases.
754  if (Arg *A = Args.getLastArg(options::OPT_mfix_cortex_a57_aes_1742098,
755  options::OPT_mno_fix_cortex_a57_aes_1742098)) {
756  if (A->getOption().matches(options::OPT_mfix_cortex_a57_aes_1742098)) {
757  Features.push_back("+fix-cortex-a57-aes-1742098");
758  } else {
759  Features.push_back("-fix-cortex-a57-aes-1742098");
760  }
761  }
762 
763  // Look for the last occurrence of -mlong-calls or -mno-long-calls. If
764  // neither options are specified, see if we are compiling for kernel/kext and
765  // decide whether to pass "+long-calls" based on the OS and its version.
766  if (Arg *A = Args.getLastArg(options::OPT_mlong_calls,
767  options::OPT_mno_long_calls)) {
768  if (A->getOption().matches(options::OPT_mlong_calls))
769  Features.push_back("+long-calls");
770  } else if (KernelOrKext && (!Triple.isiOS() || Triple.isOSVersionLT(6)) &&
771  !Triple.isWatchOS()) {
772  Features.push_back("+long-calls");
773  }
774 
775  // Generate execute-only output (no data access to code sections).
776  // This only makes sense for the compiler, not for the assembler.
777  if (!ForAS) {
778  // Supported only on ARMv6T2 and ARMv7 and above.
779  // Cannot be combined with -mno-movt.
780  if (Arg *A = Args.getLastArg(options::OPT_mexecute_only, options::OPT_mno_execute_only)) {
781  if (A->getOption().matches(options::OPT_mexecute_only)) {
782  if (getARMSubArchVersionNumber(Triple) < 7 &&
783  llvm::ARM::parseArch(Triple.getArchName()) != llvm::ARM::ArchKind::ARMV6T2)
784  D.Diag(diag::err_target_unsupported_execute_only) << Triple.getArchName();
785  else if (Arg *B = Args.getLastArg(options::OPT_mno_movt))
786  D.Diag(diag::err_opt_not_valid_with_opt)
787  << A->getAsString(Args) << B->getAsString(Args);
788  Features.push_back("+execute-only");
789  }
790  }
791  }
792 
793  // Kernel code has more strict alignment requirements.
794  if (KernelOrKext) {
795  Features.push_back("+strict-align");
796  } else if (Arg *A = Args.getLastArg(options::OPT_mno_unaligned_access,
797  options::OPT_munaligned_access)) {
798  if (A->getOption().matches(options::OPT_munaligned_access)) {
799  // No v6M core supports unaligned memory access (v6M ARM ARM A3.2).
800  if (Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v6m)
801  D.Diag(diag::err_target_unsupported_unaligned) << "v6m";
802  // v8M Baseline follows on from v6M, so doesn't support unaligned memory
803  // access either.
804  else if (Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v8m_baseline)
805  D.Diag(diag::err_target_unsupported_unaligned) << "v8m.base";
806  } else
807  Features.push_back("+strict-align");
808  } else {
809  // Assume pre-ARMv6 doesn't support unaligned accesses.
810  //
811  // ARMv6 may or may not support unaligned accesses depending on the
812  // SCTLR.U bit, which is architecture-specific. We assume ARMv6
813  // Darwin and NetBSD targets support unaligned accesses, and others don't.
814  //
815  // ARMv7 always has SCTLR.U set to 1, but it has a new SCTLR.A bit
816  // which raises an alignment fault on unaligned accesses. Linux
817  // defaults this bit to 0 and handles it as a system-wide (not
818  // per-process) setting. It is therefore safe to assume that ARMv7+
819  // Linux targets support unaligned accesses. The same goes for NaCl
820  // and Windows.
821  //
822  // The above behavior is consistent with GCC.
823  int VersionNum = getARMSubArchVersionNumber(Triple);
824  if (Triple.isOSDarwin() || Triple.isOSNetBSD()) {
825  if (VersionNum < 6 ||
826  Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v6m)
827  Features.push_back("+strict-align");
828  } else if (Triple.isOSLinux() || Triple.isOSNaCl() ||
829  Triple.isOSWindows()) {
830  if (VersionNum < 7)
831  Features.push_back("+strict-align");
832  } else
833  Features.push_back("+strict-align");
834  }
835 
836  // llvm does not support reserving registers in general. There is support
837  // for reserving r9 on ARM though (defined as a platform-specific register
838  // in ARM EABI).
839  if (Args.hasArg(options::OPT_ffixed_r9))
840  Features.push_back("+reserve-r9");
841 
842  // The kext linker doesn't know how to deal with movw/movt.
843  if (KernelOrKext || Args.hasArg(options::OPT_mno_movt))
844  Features.push_back("+no-movt");
845 
846  if (Args.hasArg(options::OPT_mno_neg_immediates))
847  Features.push_back("+no-neg-immediates");
848 
849  // Enable/disable straight line speculation hardening.
850  if (Arg *A = Args.getLastArg(options::OPT_mharden_sls_EQ)) {
851  StringRef Scope = A->getValue();
852  bool EnableRetBr = false;
853  bool EnableBlr = false;
854  bool DisableComdat = false;
855  if (Scope != "none") {
857  Scope.split(Opts, ",");
858  for (auto Opt : Opts) {
859  Opt = Opt.trim();
860  if (Opt == "all") {
861  EnableBlr = true;
862  EnableRetBr = true;
863  continue;
864  }
865  if (Opt == "retbr") {
866  EnableRetBr = true;
867  continue;
868  }
869  if (Opt == "blr") {
870  EnableBlr = true;
871  continue;
872  }
873  if (Opt == "comdat") {
874  DisableComdat = false;
875  continue;
876  }
877  if (Opt == "nocomdat") {
878  DisableComdat = true;
879  continue;
880  }
881  D.Diag(diag::err_drv_unsupported_option_argument)
882  << A->getSpelling() << Scope;
883  break;
884  }
885  }
886 
887  if (EnableRetBr || EnableBlr)
888  if (!(isARMAProfile(Triple) && getARMSubArchVersionNumber(Triple) >= 7))
889  D.Diag(diag::err_sls_hardening_arm_not_supported)
890  << Scope << A->getAsString(Args);
891 
892  if (EnableRetBr)
893  Features.push_back("+harden-sls-retbr");
894  if (EnableBlr)
895  Features.push_back("+harden-sls-blr");
896  if (DisableComdat) {
897  Features.push_back("+harden-sls-nocomdat");
898  }
899  }
900 
901  if (Args.getLastArg(options::OPT_mno_bti_at_return_twice))
902  Features.push_back("+no-bti-at-return-twice");
903 }
904 
905 std::string arm::getARMArch(StringRef Arch, const llvm::Triple &Triple) {
906  std::string MArch;
907  if (!Arch.empty())
908  MArch = std::string(Arch);
909  else
910  MArch = std::string(Triple.getArchName());
911  MArch = StringRef(MArch).split("+").first.lower();
912 
913  // Handle -march=native.
914  if (MArch == "native") {
915  std::string CPU = std::string(llvm::sys::getHostCPUName());
916  if (CPU != "generic") {
917  // Translate the native cpu into the architecture suffix for that CPU.
918  StringRef Suffix = arm::getLLVMArchSuffixForARM(CPU, MArch, Triple);
919  // If there is no valid architecture suffix for this CPU we don't know how
920  // to handle it, so return no architecture.
921  if (Suffix.empty())
922  MArch = "";
923  else
924  MArch = std::string("arm") + Suffix.str();
925  }
926  }
927 
928  return MArch;
929 }
930 
931 /// Get the (LLVM) name of the minimum ARM CPU for the arch we are targeting.
932 StringRef arm::getARMCPUForMArch(StringRef Arch, const llvm::Triple &Triple) {
933  std::string MArch = getARMArch(Arch, Triple);
934  // getARMCPUForArch defaults to the triple if MArch is empty, but empty MArch
935  // here means an -march=native that we can't handle, so instead return no CPU.
936  if (MArch.empty())
937  return StringRef();
938 
939  // We need to return an empty string here on invalid MArch values as the
940  // various places that call this function can't cope with a null result.
941  return llvm::ARM::getARMCPUForArch(Triple, MArch);
942 }
943 
944 /// getARMTargetCPU - Get the (LLVM) name of the ARM cpu we are targeting.
945 std::string arm::getARMTargetCPU(StringRef CPU, StringRef Arch,
946  const llvm::Triple &Triple) {
947  // FIXME: Warn on inconsistent use of -mcpu and -march.
948  // If we have -mcpu=, use that.
949  if (!CPU.empty()) {
950  std::string MCPU = StringRef(CPU).split("+").first.lower();
951  // Handle -mcpu=native.
952  if (MCPU == "native")
953  return std::string(llvm::sys::getHostCPUName());
954  else
955  return MCPU;
956  }
957 
958  return std::string(getARMCPUForMArch(Arch, Triple));
959 }
960 
961 /// getLLVMArchSuffixForARM - Get the LLVM ArchKind value to use for a
962 /// particular CPU (or Arch, if CPU is generic). This is needed to
963 /// pass to functions like llvm::ARM::getDefaultFPU which need an
964 /// ArchKind as well as a CPU name.
965 llvm::ARM::ArchKind arm::getLLVMArchKindForARM(StringRef CPU, StringRef Arch,
966  const llvm::Triple &Triple) {
967  llvm::ARM::ArchKind ArchKind;
968  if (CPU == "generic" || CPU.empty()) {
969  std::string ARMArch = tools::arm::getARMArch(Arch, Triple);
970  ArchKind = llvm::ARM::parseArch(ARMArch);
971  if (ArchKind == llvm::ARM::ArchKind::INVALID)
972  // In case of generic Arch, i.e. "arm",
973  // extract arch from default cpu of the Triple
974  ArchKind =
975  llvm::ARM::parseCPUArch(llvm::ARM::getARMCPUForArch(Triple, ARMArch));
976  } else {
977  // FIXME: horrible hack to get around the fact that Cortex-A7 is only an
978  // armv7k triple if it's actually been specified via "-arch armv7k".
979  ArchKind = (Arch == "armv7k" || Arch == "thumbv7k")
980  ? llvm::ARM::ArchKind::ARMV7K
981  : llvm::ARM::parseCPUArch(CPU);
982  }
983  return ArchKind;
984 }
985 
986 /// getLLVMArchSuffixForARM - Get the LLVM arch name to use for a particular
987 /// CPU (or Arch, if CPU is generic).
988 // FIXME: This is redundant with -mcpu, why does LLVM use this.
989 StringRef arm::getLLVMArchSuffixForARM(StringRef CPU, StringRef Arch,
990  const llvm::Triple &Triple) {
991  llvm::ARM::ArchKind ArchKind = getLLVMArchKindForARM(CPU, Arch, Triple);
992  if (ArchKind == llvm::ARM::ArchKind::INVALID)
993  return "";
994  return llvm::ARM::getSubArch(ArchKind);
995 }
996 
997 void arm::appendBE8LinkFlag(const ArgList &Args, ArgStringList &CmdArgs,
998  const llvm::Triple &Triple) {
999  if (Args.hasArg(options::OPT_r))
1000  return;
1001 
1002  // ARMv7 (and later) and ARMv6-M do not support BE-32, so instruct the linker
1003  // to generate BE-8 executables.
1004  if (arm::getARMSubArchVersionNumber(Triple) >= 7 || arm::isARMMProfile(Triple))
1005  CmdArgs.push_back("--be8");
1006 }
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Definition: ARM.cpp:156
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Definition: ARM.cpp:86
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Scope - A scope is a transient data structure that is used while parsing the program.
Definition: Scope.h:40
clang::driver::tools::arm::getARMCPUForMArch
StringRef getARMCPUForMArch(llvm::StringRef Arch, const llvm::Triple &Triple)
llvm::opt
Definition: DiagnosticOptions.h:19
DriverDiagnostic.h
clang::driver::tools::arm::FloatABI::Hard
@ Hard
checkARMArchName
static void checkARMArchName(const Driver &D, const Arg *A, const ArgList &Args, llvm::StringRef ArchName, llvm::StringRef CPUName, std::vector< StringRef > &Features, const llvm::Triple &Triple, unsigned &ArgFPUID)
Definition: ARM.cpp:113
clang::driver::tools::arm::FloatABI::Invalid
@ Invalid
clang::driver::tools::arm::getARMSubArchVersionNumber
int getARMSubArchVersionNumber(const llvm::Triple &Triple)
Definition: ARM.cpp:25
clang::driver::ToolChain
ToolChain - Access to tools for a single platform.
Definition: ToolChain.h:91
Value
Value
Definition: UninitializedValues.cpp:103
clang::driver::tools::arm::getARMTargetCPU
std::string getARMTargetCPU(StringRef CPU, llvm::StringRef Arch, const llvm::Triple &Triple)
checkARMCPUName
static void checkARMCPUName(const Driver &D, const Arg *A, const ArgList &Args, llvm::StringRef CPUName, llvm::StringRef ArchName, std::vector< StringRef > &Features, const llvm::Triple &Triple, unsigned &ArgFPUID)
Definition: ARM.cpp:129
clang::driver::tools::arm::getDefaultFloatABI
FloatABI getDefaultFloatABI(const llvm::Triple &Triple)
Definition: ARM.cpp:318
clang::driver::types::ID
ID
Definition: Types.h:23
clang::driver::tools::arm::getARMArchCPUFromArgs
void getARMArchCPUFromArgs(const llvm::opt::ArgList &Args, llvm::StringRef &Arch, llvm::StringRef &CPU, bool FromAs=false)
clang::driver::tools::arm::getReadTPMode
ReadTPMode getReadTPMode(const Driver &D, const llvm::opt::ArgList &Args, const llvm::Triple &Triple, bool ForAS)
clang
Definition: CalledOnceCheck.h:17
clang::driver::Driver
Driver - Encapsulate logic for constructing compilation processes from a set of gcc-driver-like comma...
Definition: Driver.h:75
distance
float __ovld __cnfn distance(float, float)
Returns the distance between p0 and p1.
clang::driver::tools::arm::getARMArch
std::string getARMArch(llvm::StringRef Arch, const llvm::Triple &Triple)
clang::driver::tools::arm::getLLVMArchSuffixForARM
StringRef getLLVMArchSuffixForARM(llvm::StringRef CPU, llvm::StringRef Arch, const llvm::Triple &Triple)
ARM.h
clang::driver::tools::arm::ReadTPMode
ReadTPMode
Definition: ARM.h:38
clang::driver
Definition: Action.h:31
clang::driver::tools::arm::appendBE8LinkFlag
void appendBE8LinkFlag(const llvm::opt::ArgList &Args, llvm::opt::ArgStringList &CmdArgs, const llvm::Triple &Triple)
clang::driver::tools::arm::isARMAProfile
bool isARMAProfile(const llvm::Triple &Triple)
Definition: ARM.cpp:37
clang::driver::tools::arm::getARMTargetFeatures
void getARMTargetFeatures(const Driver &D, const llvm::Triple &Triple, const llvm::opt::ArgList &Args, std::vector< llvm::StringRef > &Features, bool ForAS)
clang::RISCV::Invalid
@ Invalid
Definition: RISCVVIntrinsicUtils.h:171
clang::driver::tools::arm::useAAPCSForMachO
bool useAAPCSForMachO(const llvm::Triple &T)
Definition: ARM.cpp:145
DecodeARMFeaturesFromCPU
static void DecodeARMFeaturesFromCPU(const Driver &D, StringRef CPU, std::vector< StringRef > &Features)
Definition: ARM.cpp:100