137 case NVPTX::BI__nvvm_atom_add_gen_i:
138 case NVPTX::BI__nvvm_atom_add_gen_l:
139 case NVPTX::BI__nvvm_atom_add_gen_ll:
143 cir::MemOrder::Relaxed);
144 case NVPTX::BI__nvvm_atom_sub_gen_i:
145 case NVPTX::BI__nvvm_atom_sub_gen_l:
146 case NVPTX::BI__nvvm_atom_sub_gen_ll:
150 cir::MemOrder::Relaxed);
151 case NVPTX::BI__nvvm_atom_and_gen_i:
152 case NVPTX::BI__nvvm_atom_and_gen_l:
153 case NVPTX::BI__nvvm_atom_and_gen_ll:
157 cir::MemOrder::Relaxed);
158 case NVPTX::BI__nvvm_atom_or_gen_i:
159 case NVPTX::BI__nvvm_atom_or_gen_l:
160 case NVPTX::BI__nvvm_atom_or_gen_ll:
164 cir::MemOrder::Relaxed);
165 case NVPTX::BI__nvvm_atom_xor_gen_i:
166 case NVPTX::BI__nvvm_atom_xor_gen_l:
167 case NVPTX::BI__nvvm_atom_xor_gen_ll:
171 cir::MemOrder::Relaxed);
172 case NVPTX::BI__nvvm_atom_xchg_gen_i:
173 case NVPTX::BI__nvvm_atom_xchg_gen_l:
174 case NVPTX::BI__nvvm_atom_xchg_gen_ll:
176 case NVPTX::BI__nvvm_atom_max_gen_i:
177 case NVPTX::BI__nvvm_atom_max_gen_l:
178 case NVPTX::BI__nvvm_atom_max_gen_ll:
182 cir::MemOrder::Relaxed);
183 case NVPTX::BI__nvvm_atom_max_gen_ui:
184 case NVPTX::BI__nvvm_atom_max_gen_ul:
185 case NVPTX::BI__nvvm_atom_max_gen_ull:
189 cir::MemOrder::Relaxed);
190 case NVPTX::BI__nvvm_atom_min_gen_i:
191 case NVPTX::BI__nvvm_atom_min_gen_l:
192 case NVPTX::BI__nvvm_atom_min_gen_ll:
196 cir::MemOrder::Relaxed);
197 case NVPTX::BI__nvvm_atom_min_gen_ui:
198 case NVPTX::BI__nvvm_atom_min_gen_ul:
199 case NVPTX::BI__nvvm_atom_min_gen_ull:
203 cir::MemOrder::Relaxed);
204 case NVPTX::BI__nvvm_atom_cas_gen_us:
205 case NVPTX::BI__nvvm_atom_cas_gen_i:
206 case NVPTX::BI__nvvm_atom_cas_gen_l:
207 case NVPTX::BI__nvvm_atom_cas_gen_ll:
209 cir::MemOrder::Relaxed,
210 cir::SyncScopeKind::System);
211 case NVPTX::BI__nvvm_atom_add_gen_f:
212 case NVPTX::BI__nvvm_atom_add_gen_d:
214 cir::SyncScopeKind::System);
215 case NVPTX::BI__nvvm_atom_inc_gen_ui:
219 cir::MemOrder::Relaxed);
220 case NVPTX::BI__nvvm_atom_dec_gen_ui:
224 cir::MemOrder::Relaxed);
225 case NVPTX::BI__nvvm_ldg_c:
226 case NVPTX::BI__nvvm_ldg_sc:
227 case NVPTX::BI__nvvm_ldg_c2:
228 case NVPTX::BI__nvvm_ldg_sc2:
229 case NVPTX::BI__nvvm_ldg_c4:
230 case NVPTX::BI__nvvm_ldg_sc4:
231 case NVPTX::BI__nvvm_ldg_s:
232 case NVPTX::BI__nvvm_ldg_s2:
233 case NVPTX::BI__nvvm_ldg_s4:
234 case NVPTX::BI__nvvm_ldg_i:
235 case NVPTX::BI__nvvm_ldg_i2:
236 case NVPTX::BI__nvvm_ldg_i4:
237 case NVPTX::BI__nvvm_ldg_l:
238 case NVPTX::BI__nvvm_ldg_l2:
239 case NVPTX::BI__nvvm_ldg_ll:
240 case NVPTX::BI__nvvm_ldg_ll2:
241 case NVPTX::BI__nvvm_ldg_uc:
242 case NVPTX::BI__nvvm_ldg_uc2:
243 case NVPTX::BI__nvvm_ldg_uc4:
244 case NVPTX::BI__nvvm_ldg_us:
245 case NVPTX::BI__nvvm_ldg_us2:
246 case NVPTX::BI__nvvm_ldg_us4:
247 case NVPTX::BI__nvvm_ldg_ui:
248 case NVPTX::BI__nvvm_ldg_ui2:
249 case NVPTX::BI__nvvm_ldg_ui4:
250 case NVPTX::BI__nvvm_ldg_ul:
251 case NVPTX::BI__nvvm_ldg_ul2:
252 case NVPTX::BI__nvvm_ldg_ull:
253 case NVPTX::BI__nvvm_ldg_ull2:
254 case NVPTX::BI__nvvm_ldg_f:
255 case NVPTX::BI__nvvm_ldg_f2:
256 case NVPTX::BI__nvvm_ldg_f4:
257 case NVPTX::BI__nvvm_ldg_d:
258 case NVPTX::BI__nvvm_ldg_d2:
260 case NVPTX::BI__nvvm_ldu_c:
261 case NVPTX::BI__nvvm_ldu_sc:
262 case NVPTX::BI__nvvm_ldu_c2:
263 case NVPTX::BI__nvvm_ldu_sc2:
264 case NVPTX::BI__nvvm_ldu_c4:
265 case NVPTX::BI__nvvm_ldu_sc4:
266 case NVPTX::BI__nvvm_ldu_s:
267 case NVPTX::BI__nvvm_ldu_s2:
268 case NVPTX::BI__nvvm_ldu_s4:
269 case NVPTX::BI__nvvm_ldu_i:
270 case NVPTX::BI__nvvm_ldu_i2:
271 case NVPTX::BI__nvvm_ldu_i4:
272 case NVPTX::BI__nvvm_ldu_l:
273 case NVPTX::BI__nvvm_ldu_l2:
274 case NVPTX::BI__nvvm_ldu_ll:
275 case NVPTX::BI__nvvm_ldu_ll2:
276 case NVPTX::BI__nvvm_ldu_uc:
277 case NVPTX::BI__nvvm_ldu_uc2:
278 case NVPTX::BI__nvvm_ldu_uc4:
279 case NVPTX::BI__nvvm_ldu_us:
280 case NVPTX::BI__nvvm_ldu_us2:
281 case NVPTX::BI__nvvm_ldu_us4:
282 case NVPTX::BI__nvvm_ldu_ui:
283 case NVPTX::BI__nvvm_ldu_ui2:
284 case NVPTX::BI__nvvm_ldu_ui4:
285 case NVPTX::BI__nvvm_ldu_ul:
286 case NVPTX::BI__nvvm_ldu_ul2:
287 case NVPTX::BI__nvvm_ldu_ull:
288 case NVPTX::BI__nvvm_ldu_ull2:
290 case NVPTX::BI__nvvm_ldu_f:
291 case NVPTX::BI__nvvm_ldu_f2:
292 case NVPTX::BI__nvvm_ldu_f4:
293 case NVPTX::BI__nvvm_ldu_d:
294 case NVPTX::BI__nvvm_ldu_d2:
296 case NVPTX::BI__nvvm_atom_cta_add_gen_i:
297 case NVPTX::BI__nvvm_atom_cta_add_gen_l:
298 case NVPTX::BI__nvvm_atom_cta_add_gen_ll:
300 cir::SyncScopeKind::Workgroup);
301 case NVPTX::BI__nvvm_atom_sys_add_gen_i:
302 case NVPTX::BI__nvvm_atom_sys_add_gen_l:
303 case NVPTX::BI__nvvm_atom_sys_add_gen_ll:
305 cir::SyncScopeKind::System);
306 case NVPTX::BI__nvvm_atom_cta_add_gen_f:
307 case NVPTX::BI__nvvm_atom_cta_add_gen_d:
309 cir::SyncScopeKind::Workgroup);
310 case NVPTX::BI__nvvm_atom_sys_add_gen_f:
311 case NVPTX::BI__nvvm_atom_sys_add_gen_d:
313 cir::SyncScopeKind::System);
314 case NVPTX::BI__nvvm_atom_cta_xchg_gen_i:
315 case NVPTX::BI__nvvm_atom_cta_xchg_gen_l:
316 case NVPTX::BI__nvvm_atom_cta_xchg_gen_ll:
318 case NVPTX::BI__nvvm_atom_sys_xchg_gen_i:
319 case NVPTX::BI__nvvm_atom_sys_xchg_gen_l:
320 case NVPTX::BI__nvvm_atom_sys_xchg_gen_ll:
322 case NVPTX::BI__nvvm_atom_cta_max_gen_i:
323 case NVPTX::BI__nvvm_atom_cta_max_gen_ui:
324 case NVPTX::BI__nvvm_atom_cta_max_gen_l:
325 case NVPTX::BI__nvvm_atom_cta_max_gen_ul:
326 case NVPTX::BI__nvvm_atom_cta_max_gen_ll:
327 case NVPTX::BI__nvvm_atom_cta_max_gen_ull:
329 cir::SyncScopeKind::Workgroup);
330 case NVPTX::BI__nvvm_atom_sys_max_gen_i:
331 case NVPTX::BI__nvvm_atom_sys_max_gen_ui:
332 case NVPTX::BI__nvvm_atom_sys_max_gen_l:
333 case NVPTX::BI__nvvm_atom_sys_max_gen_ul:
334 case NVPTX::BI__nvvm_atom_sys_max_gen_ll:
335 case NVPTX::BI__nvvm_atom_sys_max_gen_ull:
337 cir::SyncScopeKind::System);
338 case NVPTX::BI__nvvm_atom_cta_min_gen_i:
339 case NVPTX::BI__nvvm_atom_cta_min_gen_ui:
340 case NVPTX::BI__nvvm_atom_cta_min_gen_l:
341 case NVPTX::BI__nvvm_atom_cta_min_gen_ul:
342 case NVPTX::BI__nvvm_atom_cta_min_gen_ll:
343 case NVPTX::BI__nvvm_atom_cta_min_gen_ull:
345 cir::SyncScopeKind::Workgroup);
346 case NVPTX::BI__nvvm_atom_sys_min_gen_i:
347 case NVPTX::BI__nvvm_atom_sys_min_gen_ui:
348 case NVPTX::BI__nvvm_atom_sys_min_gen_l:
349 case NVPTX::BI__nvvm_atom_sys_min_gen_ul:
350 case NVPTX::BI__nvvm_atom_sys_min_gen_ll:
351 case NVPTX::BI__nvvm_atom_sys_min_gen_ull:
353 cir::SyncScopeKind::System);
354 case NVPTX::BI__nvvm_atom_cta_inc_gen_ui:
356 cir::SyncScopeKind::Workgroup);
357 case NVPTX::BI__nvvm_atom_cta_dec_gen_ui:
359 cir::SyncScopeKind::Workgroup);
360 case NVPTX::BI__nvvm_atom_sys_inc_gen_ui:
362 cir::SyncScopeKind::System);
363 case NVPTX::BI__nvvm_atom_sys_dec_gen_ui:
365 cir::SyncScopeKind::System);
366 case NVPTX::BI__nvvm_atom_cta_and_gen_i:
367 case NVPTX::BI__nvvm_atom_cta_and_gen_l:
368 case NVPTX::BI__nvvm_atom_cta_and_gen_ll:
370 cir::SyncScopeKind::Workgroup);
371 case NVPTX::BI__nvvm_atom_sys_and_gen_i:
372 case NVPTX::BI__nvvm_atom_sys_and_gen_l:
373 case NVPTX::BI__nvvm_atom_sys_and_gen_ll:
375 cir::SyncScopeKind::System);
376 case NVPTX::BI__nvvm_atom_cta_or_gen_i:
377 case NVPTX::BI__nvvm_atom_cta_or_gen_l:
378 case NVPTX::BI__nvvm_atom_cta_or_gen_ll:
380 cir::SyncScopeKind::Workgroup);
381 case NVPTX::BI__nvvm_atom_sys_or_gen_i:
382 case NVPTX::BI__nvvm_atom_sys_or_gen_l:
383 case NVPTX::BI__nvvm_atom_sys_or_gen_ll:
385 cir::SyncScopeKind::System);
386 case NVPTX::BI__nvvm_atom_cta_xor_gen_i:
387 case NVPTX::BI__nvvm_atom_cta_xor_gen_l:
388 case NVPTX::BI__nvvm_atom_cta_xor_gen_ll:
390 cir::SyncScopeKind::Workgroup);
391 case NVPTX::BI__nvvm_atom_sys_xor_gen_i:
392 case NVPTX::BI__nvvm_atom_sys_xor_gen_l:
393 case NVPTX::BI__nvvm_atom_sys_xor_gen_ll:
395 cir::SyncScopeKind::System);
396 case NVPTX::BI__nvvm_atom_cta_cas_gen_us:
397 case NVPTX::BI__nvvm_atom_cta_cas_gen_i:
398 case NVPTX::BI__nvvm_atom_cta_cas_gen_l:
399 case NVPTX::BI__nvvm_atom_cta_cas_gen_ll:
401 cir::MemOrder::Relaxed,
402 cir::SyncScopeKind::Workgroup);
403 case NVPTX::BI__nvvm_atom_sys_cas_gen_us:
404 case NVPTX::BI__nvvm_atom_sys_cas_gen_i:
405 case NVPTX::BI__nvvm_atom_sys_cas_gen_l:
406 case NVPTX::BI__nvvm_atom_sys_cas_gen_ll:
408 cir::MemOrder::Relaxed,
409 cir::SyncScopeKind::System);
410 case NVPTX::BI__nvvm_match_all_sync_i32p:
411 case NVPTX::BI__nvvm_match_all_sync_i64p:
412 cgm.errorNYI(
expr->getSourceRange(),
413 std::string(
"unimplemented NVPTX builtin call: ") +
415 return mlir::Value{};
417 case NVPTX::BI__hmma_m16n16k16_ld_a:
418 case NVPTX::BI__hmma_m16n16k16_ld_b:
419 case NVPTX::BI__hmma_m16n16k16_ld_c_f16:
420 case NVPTX::BI__hmma_m16n16k16_ld_c_f32:
421 case NVPTX::BI__hmma_m32n8k16_ld_a:
422 case NVPTX::BI__hmma_m32n8k16_ld_b:
423 case NVPTX::BI__hmma_m32n8k16_ld_c_f16:
424 case NVPTX::BI__hmma_m32n8k16_ld_c_f32:
425 case NVPTX::BI__hmma_m8n32k16_ld_a:
426 case NVPTX::BI__hmma_m8n32k16_ld_b:
427 case NVPTX::BI__hmma_m8n32k16_ld_c_f16:
428 case NVPTX::BI__hmma_m8n32k16_ld_c_f32:
429 cgm.errorNYI(
expr->getSourceRange(),
430 std::string(
"unimplemented NVPTX builtin call: ") +
432 return mlir::Value{};
433 case NVPTX::BI__imma_m16n16k16_ld_a_s8:
434 case NVPTX::BI__imma_m16n16k16_ld_a_u8:
435 case NVPTX::BI__imma_m16n16k16_ld_b_s8:
436 case NVPTX::BI__imma_m16n16k16_ld_b_u8:
437 case NVPTX::BI__imma_m16n16k16_ld_c:
438 case NVPTX::BI__imma_m32n8k16_ld_a_s8:
439 case NVPTX::BI__imma_m32n8k16_ld_a_u8:
440 case NVPTX::BI__imma_m32n8k16_ld_b_s8:
441 case NVPTX::BI__imma_m32n8k16_ld_b_u8:
442 case NVPTX::BI__imma_m32n8k16_ld_c:
443 case NVPTX::BI__imma_m8n32k16_ld_a_s8:
444 case NVPTX::BI__imma_m8n32k16_ld_a_u8:
445 case NVPTX::BI__imma_m8n32k16_ld_b_s8:
446 case NVPTX::BI__imma_m8n32k16_ld_b_u8:
447 case NVPTX::BI__imma_m8n32k16_ld_c:
448 cgm.errorNYI(
expr->getSourceRange(),
449 std::string(
"unimplemented NVPTX builtin call: ") +
451 return mlir::Value{};
452 case NVPTX::BI__imma_m8n8k32_ld_a_s4:
453 case NVPTX::BI__imma_m8n8k32_ld_a_u4:
454 case NVPTX::BI__imma_m8n8k32_ld_b_s4:
455 case NVPTX::BI__imma_m8n8k32_ld_b_u4:
456 case NVPTX::BI__imma_m8n8k32_ld_c:
457 case NVPTX::BI__bmma_m8n8k128_ld_a_b1:
458 case NVPTX::BI__bmma_m8n8k128_ld_b_b1:
459 case NVPTX::BI__bmma_m8n8k128_ld_c:
460 cgm.errorNYI(
expr->getSourceRange(),
461 std::string(
"unimplemented NVPTX builtin call: ") +
463 return mlir::Value{};
464 case NVPTX::BI__dmma_m8n8k4_ld_a:
465 case NVPTX::BI__dmma_m8n8k4_ld_b:
466 case NVPTX::BI__dmma_m8n8k4_ld_c:
467 cgm.errorNYI(
expr->getSourceRange(),
468 std::string(
"unimplemented NVPTX builtin call: ") +
470 return mlir::Value{};
471 case NVPTX::BI__mma_bf16_m16n16k16_ld_a:
472 case NVPTX::BI__mma_bf16_m16n16k16_ld_b:
473 case NVPTX::BI__mma_bf16_m8n32k16_ld_a:
474 case NVPTX::BI__mma_bf16_m8n32k16_ld_b:
475 case NVPTX::BI__mma_bf16_m32n8k16_ld_a:
476 case NVPTX::BI__mma_bf16_m32n8k16_ld_b:
477 case NVPTX::BI__mma_tf32_m16n16k8_ld_a:
478 case NVPTX::BI__mma_tf32_m16n16k8_ld_b:
479 case NVPTX::BI__mma_tf32_m16n16k8_ld_c:
480 cgm.errorNYI(
expr->getSourceRange(),
481 std::string(
"unimplemented NVPTX builtin call: ") +
483 return mlir::Value{};
484 case NVPTX::BI__hmma_m16n16k16_st_c_f16:
485 case NVPTX::BI__hmma_m16n16k16_st_c_f32:
486 case NVPTX::BI__hmma_m32n8k16_st_c_f16:
487 case NVPTX::BI__hmma_m32n8k16_st_c_f32:
488 case NVPTX::BI__hmma_m8n32k16_st_c_f16:
489 case NVPTX::BI__hmma_m8n32k16_st_c_f32:
490 case NVPTX::BI__imma_m16n16k16_st_c_i32:
491 case NVPTX::BI__imma_m32n8k16_st_c_i32:
492 case NVPTX::BI__imma_m8n32k16_st_c_i32:
493 case NVPTX::BI__imma_m8n8k32_st_c_i32:
494 case NVPTX::BI__bmma_m8n8k128_st_c_i32:
495 case NVPTX::BI__dmma_m8n8k4_st_c_f64:
496 case NVPTX::BI__mma_m16n16k8_st_c_f32:
497 cgm.errorNYI(
expr->getSourceRange(),
498 std::string(
"unimplemented NVPTX builtin call: ") +
500 return mlir::Value{};
503 case NVPTX::BI__hmma_m16n16k16_mma_f16f16:
504 case NVPTX::BI__hmma_m16n16k16_mma_f32f16:
505 case NVPTX::BI__hmma_m16n16k16_mma_f32f32:
506 case NVPTX::BI__hmma_m16n16k16_mma_f16f32:
507 case NVPTX::BI__hmma_m32n8k16_mma_f16f16:
508 case NVPTX::BI__hmma_m32n8k16_mma_f32f16:
509 case NVPTX::BI__hmma_m32n8k16_mma_f32f32:
510 case NVPTX::BI__hmma_m32n8k16_mma_f16f32:
511 case NVPTX::BI__hmma_m8n32k16_mma_f16f16:
512 case NVPTX::BI__hmma_m8n32k16_mma_f32f16:
513 case NVPTX::BI__hmma_m8n32k16_mma_f32f32:
514 case NVPTX::BI__hmma_m8n32k16_mma_f16f32:
515 case NVPTX::BI__imma_m16n16k16_mma_s8:
516 case NVPTX::BI__imma_m16n16k16_mma_u8:
517 case NVPTX::BI__imma_m32n8k16_mma_s8:
518 case NVPTX::BI__imma_m32n8k16_mma_u8:
519 case NVPTX::BI__imma_m8n32k16_mma_s8:
520 case NVPTX::BI__imma_m8n32k16_mma_u8:
521 case NVPTX::BI__imma_m8n8k32_mma_s4:
522 case NVPTX::BI__imma_m8n8k32_mma_u4:
523 case NVPTX::BI__bmma_m8n8k128_mma_xor_popc_b1:
524 case NVPTX::BI__bmma_m8n8k128_mma_and_popc_b1:
525 case NVPTX::BI__dmma_m8n8k4_mma_f64:
526 case NVPTX::BI__mma_bf16_m16n16k16_mma_f32:
527 case NVPTX::BI__mma_bf16_m8n32k16_mma_f32:
528 case NVPTX::BI__mma_bf16_m32n8k16_mma_f32:
529 case NVPTX::BI__mma_tf32_m16n16k8_mma_f32:
530 cgm.errorNYI(
expr->getSourceRange(),
531 std::string(
"unimplemented NVPTX builtin call: ") +
533 return mlir::Value{};
535 case NVPTX::BI__nvvm_ff2f16x2_rn:
536 cgm.errorNYI(
expr->getSourceRange(),
537 std::string(
"unimplemented NVPTX builtin call: ") +
539 return mlir::Value{};
540 case NVPTX::BI__nvvm_ff2f16x2_rn_relu:
541 cgm.errorNYI(
expr->getSourceRange(),
542 std::string(
"unimplemented NVPTX builtin call: ") +
544 return mlir::Value{};
545 case NVPTX::BI__nvvm_ff2f16x2_rz:
546 cgm.errorNYI(
expr->getSourceRange(),
547 std::string(
"unimplemented NVPTX builtin call: ") +
549 return mlir::Value{};
550 case NVPTX::BI__nvvm_ff2f16x2_rz_relu:
551 cgm.errorNYI(
expr->getSourceRange(),
552 std::string(
"unimplemented NVPTX builtin call: ") +
554 return mlir::Value{};
555 case NVPTX::BI__nvvm_fma_rn_f16:
558 case NVPTX::BI__nvvm_fma_rn_f16x2:
561 case NVPTX::BI__nvvm_fma_rn_ftz_f16:
564 case NVPTX::BI__nvvm_fma_rn_ftz_f16x2:
567 case NVPTX::BI__nvvm_fma_rn_ftz_relu_f16:
570 case NVPTX::BI__nvvm_fma_rn_ftz_relu_f16x2:
572 "nvvm.fma.rn.ftz.relu.f16x2")
574 case NVPTX::BI__nvvm_fma_rn_ftz_sat_f16:
577 case NVPTX::BI__nvvm_fma_rn_ftz_sat_f16x2:
579 "nvvm.fma.rn.ftz.sat.f16x2")
581 case NVPTX::BI__nvvm_fma_rn_relu_f16:
584 case NVPTX::BI__nvvm_fma_rn_relu_f16x2:
587 case NVPTX::BI__nvvm_fma_rn_sat_f16:
590 case NVPTX::BI__nvvm_fma_rn_sat_f16x2:
593 case NVPTX::BI__nvvm_fma_rn_oob_f16:
594 case NVPTX::BI__nvvm_fma_rn_oob_f16x2:
595 case NVPTX::BI__nvvm_fma_rn_oob_bf16:
596 case NVPTX::BI__nvvm_fma_rn_oob_bf16x2:
599 case NVPTX::BI__nvvm_fma_rn_oob_relu_f16:
600 case NVPTX::BI__nvvm_fma_rn_oob_relu_f16x2:
601 case NVPTX::BI__nvvm_fma_rn_oob_relu_bf16:
602 case NVPTX::BI__nvvm_fma_rn_oob_relu_bf16x2:
605 case NVPTX::BI__nvvm_fmax_f16:
608 case NVPTX::BI__nvvm_fmax_f16x2:
611 case NVPTX::BI__nvvm_fmax_ftz_f16:
614 case NVPTX::BI__nvvm_fmax_ftz_f16x2:
617 case NVPTX::BI__nvvm_fmax_ftz_nan_f16:
620 case NVPTX::BI__nvvm_fmax_ftz_nan_f16x2:
623 case NVPTX::BI__nvvm_fmax_ftz_nan_xorsign_abs_f16:
625 expr,
"nvvm.fmax.ftz.nan.xorsign.abs.f16")
627 case NVPTX::BI__nvvm_fmax_ftz_nan_xorsign_abs_f16x2:
629 expr,
"nvvm.fmax.ftz.nan.xorsign.abs.f16x2")
631 case NVPTX::BI__nvvm_fmax_ftz_xorsign_abs_f16:
633 "nvvm.fmax.ftz.xorsign.abs.f16")
635 case NVPTX::BI__nvvm_fmax_ftz_xorsign_abs_f16x2:
637 expr,
"nvvm.fmax.ftz.xorsign.abs.f16x2")
639 case NVPTX::BI__nvvm_fmax_nan_f16:
642 case NVPTX::BI__nvvm_fmax_nan_f16x2:
645 case NVPTX::BI__nvvm_fmax_nan_xorsign_abs_f16:
647 "nvvm.fmax.nan.xorsign.abs.f16")
649 case NVPTX::BI__nvvm_fmax_nan_xorsign_abs_f16x2:
651 expr,
"nvvm.fmax.nan.xorsign.abs.f16x2")
653 case NVPTX::BI__nvvm_fmax_xorsign_abs_f16:
655 "nvvm.fmax.xorsign.abs.f16")
657 case NVPTX::BI__nvvm_fmax_xorsign_abs_f16x2:
659 "nvvm.fmax.xorsign.abs.f16x2")
661 case NVPTX::BI__nvvm_fmin_f16:
664 case NVPTX::BI__nvvm_fmin_f16x2:
667 case NVPTX::BI__nvvm_fmin_ftz_f16:
670 case NVPTX::BI__nvvm_fmin_ftz_f16x2:
673 case NVPTX::BI__nvvm_fmin_ftz_nan_f16:
676 case NVPTX::BI__nvvm_fmin_ftz_nan_f16x2:
679 case NVPTX::BI__nvvm_fmin_ftz_nan_xorsign_abs_f16:
681 expr,
"nvvm.fmin.ftz.nan.xorsign.abs.f16")
683 case NVPTX::BI__nvvm_fmin_ftz_nan_xorsign_abs_f16x2:
685 expr,
"nvvm.fmin.ftz.nan.xorsign.abs.f16x2")
687 case NVPTX::BI__nvvm_fmin_ftz_xorsign_abs_f16:
689 "nvvm.fmin.ftz.xorsign.abs.f16")
691 case NVPTX::BI__nvvm_fmin_ftz_xorsign_abs_f16x2:
693 expr,
"nvvm.fmin.ftz.xorsign.abs.f16x2")
695 case NVPTX::BI__nvvm_fmin_nan_f16:
698 case NVPTX::BI__nvvm_fmin_nan_f16x2:
701 case NVPTX::BI__nvvm_fmin_nan_xorsign_abs_f16:
703 "nvvm.fmin.nan.xorsign.abs.f16")
705 case NVPTX::BI__nvvm_fmin_nan_xorsign_abs_f16x2:
707 expr,
"nvvm.fmin.nan.xorsign.abs.f16x2")
709 case NVPTX::BI__nvvm_fmin_xorsign_abs_f16:
711 "nvvm.fmin.xorsign.abs.f16")
713 case NVPTX::BI__nvvm_fmin_xorsign_abs_f16x2:
715 "nvvm.fmin.xorsign.abs.f16x2")
717 case NVPTX::BI__nvvm_fabs_f:
718 case NVPTX::BI__nvvm_abs_bf16:
719 case NVPTX::BI__nvvm_abs_bf16x2:
720 case NVPTX::BI__nvvm_fabs_f16:
721 case NVPTX::BI__nvvm_fabs_f16x2:
723 case NVPTX::BI__nvvm_fabs_ftz_f:
724 case NVPTX::BI__nvvm_fabs_ftz_f16:
725 case NVPTX::BI__nvvm_fabs_ftz_f16x2:
727 case NVPTX::BI__nvvm_fabs_d:
729 case NVPTX::BI__nvvm_ex2_approx_d:
730 case NVPTX::BI__nvvm_ex2_approx_f:
731 case NVPTX::BI__nvvm_ex2_approx_f16:
732 case NVPTX::BI__nvvm_ex2_approx_f16x2:
734 case NVPTX::BI__nvvm_ex2_approx_ftz_f:
736 case NVPTX::BI__nvvm_add_rn_f:
737 case NVPTX::BI__nvvm_add_rn_d:
739 llvm::APFloat::rmNearestTiesToEven);
740 case NVPTX::BI__nvvm_add_rz_f:
741 case NVPTX::BI__nvvm_add_rz_d:
743 case NVPTX::BI__nvvm_add_rm_f:
744 case NVPTX::BI__nvvm_add_rm_d:
746 llvm::APFloat::rmTowardNegative);
747 case NVPTX::BI__nvvm_add_rp_f:
748 case NVPTX::BI__nvvm_add_rp_d:
750 llvm::APFloat::rmTowardPositive);
751 case NVPTX::BI__nvvm_add_rn_ftz_f:
753 llvm::APFloat::rmNearestTiesToEven);
754 case NVPTX::BI__nvvm_add_rz_ftz_f:
756 llvm::APFloat::rmTowardZero);
757 case NVPTX::BI__nvvm_add_rm_ftz_f:
759 llvm::APFloat::rmTowardNegative);
760 case NVPTX::BI__nvvm_add_rp_ftz_f:
762 llvm::APFloat::rmTowardPositive);
763 case NVPTX::BI__nvvm_add_rn_sat_f:
764 case NVPTX::BI__nvvm_add_rn_sat_f16:
765 case NVPTX::BI__nvvm_add_rn_sat_v2f16:
767 llvm::APFloat::rmNearestTiesToEven);
768 case NVPTX::BI__nvvm_add_rz_sat_f:
770 llvm::APFloat::rmTowardZero);
771 case NVPTX::BI__nvvm_add_rm_sat_f:
773 llvm::APFloat::rmTowardNegative);
774 case NVPTX::BI__nvvm_add_rp_sat_f:
776 llvm::APFloat::rmTowardPositive);
777 case NVPTX::BI__nvvm_add_rn_ftz_sat_f:
778 case NVPTX::BI__nvvm_add_rn_ftz_sat_f16:
779 case NVPTX::BI__nvvm_add_rn_ftz_sat_v2f16:
781 llvm::APFloat::rmNearestTiesToEven);
782 case NVPTX::BI__nvvm_add_rz_ftz_sat_f:
784 llvm::APFloat::rmTowardZero);
785 case NVPTX::BI__nvvm_add_rm_ftz_sat_f:
787 llvm::APFloat::rmTowardNegative);
788 case NVPTX::BI__nvvm_add_rp_ftz_sat_f:
790 llvm::APFloat::rmTowardPositive);
791 case NVPTX::BI__nvvm_ldg_h:
792 case NVPTX::BI__nvvm_ldg_h2:
793 cgm.errorNYI(
expr->getSourceRange(),
794 std::string(
"unimplemented NVPTX builtin call: ") +
796 return mlir::Value{};
797 case NVPTX::BI__nvvm_ldu_h:
798 case NVPTX::BI__nvvm_ldu_h2:
800 case NVPTX::BI__nvvm_cp_async_ca_shared_global_4:
801 cgm.errorNYI(
expr->getSourceRange(),
802 std::string(
"unimplemented NVPTX builtin call: ") +
804 return mlir::Value{};
805 case NVPTX::BI__nvvm_cp_async_ca_shared_global_8:
806 cgm.errorNYI(
expr->getSourceRange(),
807 std::string(
"unimplemented NVPTX builtin call: ") +
809 return mlir::Value{};
810 case NVPTX::BI__nvvm_cp_async_ca_shared_global_16:
811 cgm.errorNYI(
expr->getSourceRange(),
812 std::string(
"unimplemented NVPTX builtin call: ") +
814 return mlir::Value{};
815 case NVPTX::BI__nvvm_cp_async_cg_shared_global_16:
816 cgm.errorNYI(
expr->getSourceRange(),
817 std::string(
"unimplemented NVPTX builtin call: ") +
819 return mlir::Value{};
820 case NVPTX::BI__nvvm_read_ptx_sreg_clusterid_x:
821 cgm.errorNYI(
expr->getSourceRange(),
822 std::string(
"unimplemented NVPTX builtin call: ") +
824 return mlir::Value{};
825 case NVPTX::BI__nvvm_read_ptx_sreg_clusterid_y:
826 cgm.errorNYI(
expr->getSourceRange(),
827 std::string(
"unimplemented NVPTX builtin call: ") +
829 return mlir::Value{};
830 case NVPTX::BI__nvvm_read_ptx_sreg_clusterid_z:
831 cgm.errorNYI(
expr->getSourceRange(),
832 std::string(
"unimplemented NVPTX builtin call: ") +
834 return mlir::Value{};
835 case NVPTX::BI__nvvm_read_ptx_sreg_clusterid_w:
836 cgm.errorNYI(
expr->getSourceRange(),
837 std::string(
"unimplemented NVPTX builtin call: ") +
839 return mlir::Value{};
840 case NVPTX::BI__nvvm_read_ptx_sreg_nclusterid_x:
841 cgm.errorNYI(
expr->getSourceRange(),
842 std::string(
"unimplemented NVPTX builtin call: ") +
844 return mlir::Value{};
845 case NVPTX::BI__nvvm_read_ptx_sreg_nclusterid_y:
846 cgm.errorNYI(
expr->getSourceRange(),
847 std::string(
"unimplemented NVPTX builtin call: ") +
849 return mlir::Value{};
850 case NVPTX::BI__nvvm_read_ptx_sreg_nclusterid_z:
851 cgm.errorNYI(
expr->getSourceRange(),
852 std::string(
"unimplemented NVPTX builtin call: ") +
854 return mlir::Value{};
855 case NVPTX::BI__nvvm_read_ptx_sreg_nclusterid_w:
856 cgm.errorNYI(
expr->getSourceRange(),
857 std::string(
"unimplemented NVPTX builtin call: ") +
859 return mlir::Value{};
860 case NVPTX::BI__nvvm_read_ptx_sreg_cluster_ctaid_x:
861 cgm.errorNYI(
expr->getSourceRange(),
862 std::string(
"unimplemented NVPTX builtin call: ") +
864 return mlir::Value{};
865 case NVPTX::BI__nvvm_read_ptx_sreg_cluster_ctaid_y:
866 cgm.errorNYI(
expr->getSourceRange(),
867 std::string(
"unimplemented NVPTX builtin call: ") +
869 return mlir::Value{};
870 case NVPTX::BI__nvvm_read_ptx_sreg_cluster_ctaid_z:
871 cgm.errorNYI(
expr->getSourceRange(),
872 std::string(
"unimplemented NVPTX builtin call: ") +
874 return mlir::Value{};
875 case NVPTX::BI__nvvm_read_ptx_sreg_cluster_ctaid_w:
876 cgm.errorNYI(
expr->getSourceRange(),
877 std::string(
"unimplemented NVPTX builtin call: ") +
879 return mlir::Value{};
880 case NVPTX::BI__nvvm_read_ptx_sreg_cluster_nctaid_x:
881 cgm.errorNYI(
expr->getSourceRange(),
882 std::string(
"unimplemented NVPTX builtin call: ") +
884 return mlir::Value{};
885 case NVPTX::BI__nvvm_read_ptx_sreg_cluster_nctaid_y:
886 cgm.errorNYI(
expr->getSourceRange(),
887 std::string(
"unimplemented NVPTX builtin call: ") +
889 return mlir::Value{};
890 case NVPTX::BI__nvvm_read_ptx_sreg_cluster_nctaid_z:
891 cgm.errorNYI(
expr->getSourceRange(),
892 std::string(
"unimplemented NVPTX builtin call: ") +
894 return mlir::Value{};
895 case NVPTX::BI__nvvm_read_ptx_sreg_cluster_nctaid_w:
896 cgm.errorNYI(
expr->getSourceRange(),
897 std::string(
"unimplemented NVPTX builtin call: ") +
899 return mlir::Value{};
900 case NVPTX::BI__nvvm_read_ptx_sreg_cluster_ctarank:
901 cgm.errorNYI(
expr->getSourceRange(),
902 std::string(
"unimplemented NVPTX builtin call: ") +
904 return mlir::Value{};
905 case NVPTX::BI__nvvm_read_ptx_sreg_cluster_nctarank:
906 cgm.errorNYI(
expr->getSourceRange(),
907 std::string(
"unimplemented NVPTX builtin call: ") +
909 return mlir::Value{};
910 case NVPTX::BI__nvvm_is_explicit_cluster:
911 cgm.errorNYI(
expr->getSourceRange(),
912 std::string(
"unimplemented NVPTX builtin call: ") +
914 return mlir::Value{};
915 case NVPTX::BI__nvvm_isspacep_shared_cluster:
916 cgm.errorNYI(
expr->getSourceRange(),
917 std::string(
"unimplemented NVPTX builtin call: ") +
919 return mlir::Value{};
920 case NVPTX::BI__nvvm_mapa:
921 cgm.errorNYI(
expr->getSourceRange(),
922 std::string(
"unimplemented NVPTX builtin call: ") +
924 return mlir::Value{};
925 case NVPTX::BI__nvvm_mapa_shared_cluster:
926 cgm.errorNYI(
expr->getSourceRange(),
927 std::string(
"unimplemented NVPTX builtin call: ") +
929 return mlir::Value{};
930 case NVPTX::BI__nvvm_getctarank:
931 cgm.errorNYI(
expr->getSourceRange(),
932 std::string(
"unimplemented NVPTX builtin call: ") +
934 return mlir::Value{};
935 case NVPTX::BI__nvvm_getctarank_shared_cluster:
936 cgm.errorNYI(
expr->getSourceRange(),
937 std::string(
"unimplemented NVPTX builtin call: ") +
939 return mlir::Value{};
940 case NVPTX::BI__nvvm_barrier_cluster_arrive:
941 return builder.emitIntrinsicCallOp(
getLoc(
expr->getExprLoc()),
942 "nvvm.barrier.cluster.arrive",
943 builder.getVoidTy());
944 case NVPTX::BI__nvvm_barrier_cluster_arrive_relaxed:
945 return builder.emitIntrinsicCallOp(
getLoc(
expr->getExprLoc()),
946 "nvvm.barrier.cluster.arrive.relaxed",
947 builder.getVoidTy());
948 case NVPTX::BI__nvvm_barrier_cluster_wait:
949 return builder.emitIntrinsicCallOp(
getLoc(
expr->getExprLoc()),
950 "nvvm.barrier.cluster.wait",
951 builder.getVoidTy());
952 case NVPTX::BI__nvvm_fence_sc_cluster:
953 return builder.emitIntrinsicCallOp(
getLoc(
expr->getExprLoc()),
954 "nvvm.fence.sc.cluster",
955 builder.getVoidTy());
956 case NVPTX::BI__nvvm_bar_sync:
957 return builder.emitIntrinsicCallOp(
958 getLoc(
expr->getExprLoc()),
"nvvm.barrier.cta.sync.aligned.all",
959 builder.getVoidTy(), mlir::ValueRange{emitScalarExpr(expr->getArg(0))});
960 case NVPTX::BI__syncthreads:
961 return builder.emitIntrinsicCallOp(
962 getLoc(
expr->getExprLoc()),
"nvvm.barrier.cta.sync.aligned.all",
964 mlir::ValueRange{builder.getConstInt(getLoc(expr->getExprLoc()),
965 builder.getSInt32Ty(), 0)});
966 case NVPTX::BI__nvvm_barrier_sync:
967 return builder.emitIntrinsicCallOp(
968 getLoc(
expr->getExprLoc()),
"nvvm.barrier.cta.sync.all",
969 builder.getVoidTy(), mlir::ValueRange{emitScalarExpr(expr->getArg(0))});
970 case NVPTX::BI__nvvm_barrier_sync_cnt:
971 return builder.emitIntrinsicCallOp(
972 getLoc(
expr->getExprLoc()),
"nvvm.barrier.cta.sync.count",
974 mlir::ValueRange{emitScalarExpr(expr->getArg(0)),
975 emitScalarExpr(expr->getArg(1))});
976 case NVPTX::BI__nvvm_bar0_and:
978 "nvvm.barrier.cta.red.and.aligned.all",
980 case NVPTX::BI__nvvm_bar0_or:
983 case NVPTX::BI__nvvm_bar0_popc:
985 "nvvm.barrier.cta.red.popc.aligned.all",