136 case NVPTX::BI__nvvm_atom_add_gen_i:
137 case NVPTX::BI__nvvm_atom_add_gen_l:
138 case NVPTX::BI__nvvm_atom_add_gen_ll:
142 cir::MemOrder::Relaxed);
143 case NVPTX::BI__nvvm_atom_sub_gen_i:
144 case NVPTX::BI__nvvm_atom_sub_gen_l:
145 case NVPTX::BI__nvvm_atom_sub_gen_ll:
149 cir::MemOrder::Relaxed);
150 case NVPTX::BI__nvvm_atom_and_gen_i:
151 case NVPTX::BI__nvvm_atom_and_gen_l:
152 case NVPTX::BI__nvvm_atom_and_gen_ll:
156 cir::MemOrder::Relaxed);
157 case NVPTX::BI__nvvm_atom_or_gen_i:
158 case NVPTX::BI__nvvm_atom_or_gen_l:
159 case NVPTX::BI__nvvm_atom_or_gen_ll:
163 cir::MemOrder::Relaxed);
164 case NVPTX::BI__nvvm_atom_xor_gen_i:
165 case NVPTX::BI__nvvm_atom_xor_gen_l:
166 case NVPTX::BI__nvvm_atom_xor_gen_ll:
170 cir::MemOrder::Relaxed);
171 case NVPTX::BI__nvvm_atom_xchg_gen_i:
172 case NVPTX::BI__nvvm_atom_xchg_gen_l:
173 case NVPTX::BI__nvvm_atom_xchg_gen_ll:
175 case NVPTX::BI__nvvm_atom_max_gen_i:
176 case NVPTX::BI__nvvm_atom_max_gen_l:
177 case NVPTX::BI__nvvm_atom_max_gen_ll:
181 cir::MemOrder::Relaxed);
182 case NVPTX::BI__nvvm_atom_max_gen_ui:
183 case NVPTX::BI__nvvm_atom_max_gen_ul:
184 case NVPTX::BI__nvvm_atom_max_gen_ull:
188 cir::MemOrder::Relaxed);
189 case NVPTX::BI__nvvm_atom_min_gen_i:
190 case NVPTX::BI__nvvm_atom_min_gen_l:
191 case NVPTX::BI__nvvm_atom_min_gen_ll:
195 cir::MemOrder::Relaxed);
196 case NVPTX::BI__nvvm_atom_min_gen_ui:
197 case NVPTX::BI__nvvm_atom_min_gen_ul:
198 case NVPTX::BI__nvvm_atom_min_gen_ull:
202 cir::MemOrder::Relaxed);
203 case NVPTX::BI__nvvm_atom_cas_gen_us:
204 case NVPTX::BI__nvvm_atom_cas_gen_i:
205 case NVPTX::BI__nvvm_atom_cas_gen_l:
206 case NVPTX::BI__nvvm_atom_cas_gen_ll:
208 cir::MemOrder::Relaxed,
209 cir::SyncScopeKind::System);
210 case NVPTX::BI__nvvm_atom_add_gen_f:
211 case NVPTX::BI__nvvm_atom_add_gen_d:
213 cir::SyncScopeKind::System);
214 case NVPTX::BI__nvvm_atom_inc_gen_ui:
218 cir::MemOrder::Relaxed);
219 case NVPTX::BI__nvvm_atom_dec_gen_ui:
223 cir::MemOrder::Relaxed);
224 case NVPTX::BI__nvvm_ldg_c:
225 case NVPTX::BI__nvvm_ldg_sc:
226 case NVPTX::BI__nvvm_ldg_c2:
227 case NVPTX::BI__nvvm_ldg_sc2:
228 case NVPTX::BI__nvvm_ldg_c4:
229 case NVPTX::BI__nvvm_ldg_sc4:
230 case NVPTX::BI__nvvm_ldg_s:
231 case NVPTX::BI__nvvm_ldg_s2:
232 case NVPTX::BI__nvvm_ldg_s4:
233 case NVPTX::BI__nvvm_ldg_i:
234 case NVPTX::BI__nvvm_ldg_i2:
235 case NVPTX::BI__nvvm_ldg_i4:
236 case NVPTX::BI__nvvm_ldg_l:
237 case NVPTX::BI__nvvm_ldg_l2:
238 case NVPTX::BI__nvvm_ldg_ll:
239 case NVPTX::BI__nvvm_ldg_ll2:
240 case NVPTX::BI__nvvm_ldg_uc:
241 case NVPTX::BI__nvvm_ldg_uc2:
242 case NVPTX::BI__nvvm_ldg_uc4:
243 case NVPTX::BI__nvvm_ldg_us:
244 case NVPTX::BI__nvvm_ldg_us2:
245 case NVPTX::BI__nvvm_ldg_us4:
246 case NVPTX::BI__nvvm_ldg_ui:
247 case NVPTX::BI__nvvm_ldg_ui2:
248 case NVPTX::BI__nvvm_ldg_ui4:
249 case NVPTX::BI__nvvm_ldg_ul:
250 case NVPTX::BI__nvvm_ldg_ul2:
251 case NVPTX::BI__nvvm_ldg_ull:
252 case NVPTX::BI__nvvm_ldg_ull2:
253 case NVPTX::BI__nvvm_ldg_f:
254 case NVPTX::BI__nvvm_ldg_f2:
255 case NVPTX::BI__nvvm_ldg_f4:
256 case NVPTX::BI__nvvm_ldg_d:
257 case NVPTX::BI__nvvm_ldg_d2:
259 case NVPTX::BI__nvvm_ldu_c:
260 case NVPTX::BI__nvvm_ldu_sc:
261 case NVPTX::BI__nvvm_ldu_c2:
262 case NVPTX::BI__nvvm_ldu_sc2:
263 case NVPTX::BI__nvvm_ldu_c4:
264 case NVPTX::BI__nvvm_ldu_sc4:
265 case NVPTX::BI__nvvm_ldu_s:
266 case NVPTX::BI__nvvm_ldu_s2:
267 case NVPTX::BI__nvvm_ldu_s4:
268 case NVPTX::BI__nvvm_ldu_i:
269 case NVPTX::BI__nvvm_ldu_i2:
270 case NVPTX::BI__nvvm_ldu_i4:
271 case NVPTX::BI__nvvm_ldu_l:
272 case NVPTX::BI__nvvm_ldu_l2:
273 case NVPTX::BI__nvvm_ldu_ll:
274 case NVPTX::BI__nvvm_ldu_ll2:
275 case NVPTX::BI__nvvm_ldu_uc:
276 case NVPTX::BI__nvvm_ldu_uc2:
277 case NVPTX::BI__nvvm_ldu_uc4:
278 case NVPTX::BI__nvvm_ldu_us:
279 case NVPTX::BI__nvvm_ldu_us2:
280 case NVPTX::BI__nvvm_ldu_us4:
281 case NVPTX::BI__nvvm_ldu_ui:
282 case NVPTX::BI__nvvm_ldu_ui2:
283 case NVPTX::BI__nvvm_ldu_ui4:
284 case NVPTX::BI__nvvm_ldu_ul:
285 case NVPTX::BI__nvvm_ldu_ul2:
286 case NVPTX::BI__nvvm_ldu_ull:
287 case NVPTX::BI__nvvm_ldu_ull2:
289 case NVPTX::BI__nvvm_ldu_f:
290 case NVPTX::BI__nvvm_ldu_f2:
291 case NVPTX::BI__nvvm_ldu_f4:
292 case NVPTX::BI__nvvm_ldu_d:
293 case NVPTX::BI__nvvm_ldu_d2:
295 case NVPTX::BI__nvvm_atom_cta_add_gen_i:
296 case NVPTX::BI__nvvm_atom_cta_add_gen_l:
297 case NVPTX::BI__nvvm_atom_cta_add_gen_ll:
299 cir::SyncScopeKind::Workgroup);
300 case NVPTX::BI__nvvm_atom_sys_add_gen_i:
301 case NVPTX::BI__nvvm_atom_sys_add_gen_l:
302 case NVPTX::BI__nvvm_atom_sys_add_gen_ll:
304 cir::SyncScopeKind::System);
305 case NVPTX::BI__nvvm_atom_cta_add_gen_f:
306 case NVPTX::BI__nvvm_atom_cta_add_gen_d:
308 cir::SyncScopeKind::Workgroup);
309 case NVPTX::BI__nvvm_atom_sys_add_gen_f:
310 case NVPTX::BI__nvvm_atom_sys_add_gen_d:
312 cir::SyncScopeKind::System);
313 case NVPTX::BI__nvvm_atom_cta_xchg_gen_i:
314 case NVPTX::BI__nvvm_atom_cta_xchg_gen_l:
315 case NVPTX::BI__nvvm_atom_cta_xchg_gen_ll:
317 case NVPTX::BI__nvvm_atom_sys_xchg_gen_i:
318 case NVPTX::BI__nvvm_atom_sys_xchg_gen_l:
319 case NVPTX::BI__nvvm_atom_sys_xchg_gen_ll:
321 case NVPTX::BI__nvvm_atom_cta_max_gen_i:
322 case NVPTX::BI__nvvm_atom_cta_max_gen_ui:
323 case NVPTX::BI__nvvm_atom_cta_max_gen_l:
324 case NVPTX::BI__nvvm_atom_cta_max_gen_ul:
325 case NVPTX::BI__nvvm_atom_cta_max_gen_ll:
326 case NVPTX::BI__nvvm_atom_cta_max_gen_ull:
328 cir::SyncScopeKind::Workgroup);
329 case NVPTX::BI__nvvm_atom_sys_max_gen_i:
330 case NVPTX::BI__nvvm_atom_sys_max_gen_ui:
331 case NVPTX::BI__nvvm_atom_sys_max_gen_l:
332 case NVPTX::BI__nvvm_atom_sys_max_gen_ul:
333 case NVPTX::BI__nvvm_atom_sys_max_gen_ll:
334 case NVPTX::BI__nvvm_atom_sys_max_gen_ull:
336 cir::SyncScopeKind::System);
337 case NVPTX::BI__nvvm_atom_cta_min_gen_i:
338 case NVPTX::BI__nvvm_atom_cta_min_gen_ui:
339 case NVPTX::BI__nvvm_atom_cta_min_gen_l:
340 case NVPTX::BI__nvvm_atom_cta_min_gen_ul:
341 case NVPTX::BI__nvvm_atom_cta_min_gen_ll:
342 case NVPTX::BI__nvvm_atom_cta_min_gen_ull:
344 cir::SyncScopeKind::Workgroup);
345 case NVPTX::BI__nvvm_atom_sys_min_gen_i:
346 case NVPTX::BI__nvvm_atom_sys_min_gen_ui:
347 case NVPTX::BI__nvvm_atom_sys_min_gen_l:
348 case NVPTX::BI__nvvm_atom_sys_min_gen_ul:
349 case NVPTX::BI__nvvm_atom_sys_min_gen_ll:
350 case NVPTX::BI__nvvm_atom_sys_min_gen_ull:
352 cir::SyncScopeKind::System);
353 case NVPTX::BI__nvvm_atom_cta_inc_gen_ui:
355 cir::SyncScopeKind::Workgroup);
356 case NVPTX::BI__nvvm_atom_cta_dec_gen_ui:
358 cir::SyncScopeKind::Workgroup);
359 case NVPTX::BI__nvvm_atom_sys_inc_gen_ui:
361 cir::SyncScopeKind::System);
362 case NVPTX::BI__nvvm_atom_sys_dec_gen_ui:
364 cir::SyncScopeKind::System);
365 case NVPTX::BI__nvvm_atom_cta_and_gen_i:
366 case NVPTX::BI__nvvm_atom_cta_and_gen_l:
367 case NVPTX::BI__nvvm_atom_cta_and_gen_ll:
369 cir::SyncScopeKind::Workgroup);
370 case NVPTX::BI__nvvm_atom_sys_and_gen_i:
371 case NVPTX::BI__nvvm_atom_sys_and_gen_l:
372 case NVPTX::BI__nvvm_atom_sys_and_gen_ll:
374 cir::SyncScopeKind::System);
375 case NVPTX::BI__nvvm_atom_cta_or_gen_i:
376 case NVPTX::BI__nvvm_atom_cta_or_gen_l:
377 case NVPTX::BI__nvvm_atom_cta_or_gen_ll:
379 cir::SyncScopeKind::Workgroup);
380 case NVPTX::BI__nvvm_atom_sys_or_gen_i:
381 case NVPTX::BI__nvvm_atom_sys_or_gen_l:
382 case NVPTX::BI__nvvm_atom_sys_or_gen_ll:
384 cir::SyncScopeKind::System);
385 case NVPTX::BI__nvvm_atom_cta_xor_gen_i:
386 case NVPTX::BI__nvvm_atom_cta_xor_gen_l:
387 case NVPTX::BI__nvvm_atom_cta_xor_gen_ll:
389 cir::SyncScopeKind::Workgroup);
390 case NVPTX::BI__nvvm_atom_sys_xor_gen_i:
391 case NVPTX::BI__nvvm_atom_sys_xor_gen_l:
392 case NVPTX::BI__nvvm_atom_sys_xor_gen_ll:
394 cir::SyncScopeKind::System);
395 case NVPTX::BI__nvvm_atom_cta_cas_gen_us:
396 case NVPTX::BI__nvvm_atom_cta_cas_gen_i:
397 case NVPTX::BI__nvvm_atom_cta_cas_gen_l:
398 case NVPTX::BI__nvvm_atom_cta_cas_gen_ll:
400 cir::MemOrder::Relaxed,
401 cir::SyncScopeKind::Workgroup);
402 case NVPTX::BI__nvvm_atom_sys_cas_gen_us:
403 case NVPTX::BI__nvvm_atom_sys_cas_gen_i:
404 case NVPTX::BI__nvvm_atom_sys_cas_gen_l:
405 case NVPTX::BI__nvvm_atom_sys_cas_gen_ll:
407 cir::MemOrder::Relaxed,
408 cir::SyncScopeKind::System);
409 case NVPTX::BI__nvvm_match_all_sync_i32p:
410 case NVPTX::BI__nvvm_match_all_sync_i64p:
411 cgm.errorNYI(
expr->getSourceRange(),
412 std::string(
"unimplemented NVPTX builtin call: ") +
414 return mlir::Value{};
416 case NVPTX::BI__hmma_m16n16k16_ld_a:
417 case NVPTX::BI__hmma_m16n16k16_ld_b:
418 case NVPTX::BI__hmma_m16n16k16_ld_c_f16:
419 case NVPTX::BI__hmma_m16n16k16_ld_c_f32:
420 case NVPTX::BI__hmma_m32n8k16_ld_a:
421 case NVPTX::BI__hmma_m32n8k16_ld_b:
422 case NVPTX::BI__hmma_m32n8k16_ld_c_f16:
423 case NVPTX::BI__hmma_m32n8k16_ld_c_f32:
424 case NVPTX::BI__hmma_m8n32k16_ld_a:
425 case NVPTX::BI__hmma_m8n32k16_ld_b:
426 case NVPTX::BI__hmma_m8n32k16_ld_c_f16:
427 case NVPTX::BI__hmma_m8n32k16_ld_c_f32:
428 cgm.errorNYI(
expr->getSourceRange(),
429 std::string(
"unimplemented NVPTX builtin call: ") +
431 return mlir::Value{};
432 case NVPTX::BI__imma_m16n16k16_ld_a_s8:
433 case NVPTX::BI__imma_m16n16k16_ld_a_u8:
434 case NVPTX::BI__imma_m16n16k16_ld_b_s8:
435 case NVPTX::BI__imma_m16n16k16_ld_b_u8:
436 case NVPTX::BI__imma_m16n16k16_ld_c:
437 case NVPTX::BI__imma_m32n8k16_ld_a_s8:
438 case NVPTX::BI__imma_m32n8k16_ld_a_u8:
439 case NVPTX::BI__imma_m32n8k16_ld_b_s8:
440 case NVPTX::BI__imma_m32n8k16_ld_b_u8:
441 case NVPTX::BI__imma_m32n8k16_ld_c:
442 case NVPTX::BI__imma_m8n32k16_ld_a_s8:
443 case NVPTX::BI__imma_m8n32k16_ld_a_u8:
444 case NVPTX::BI__imma_m8n32k16_ld_b_s8:
445 case NVPTX::BI__imma_m8n32k16_ld_b_u8:
446 case NVPTX::BI__imma_m8n32k16_ld_c:
447 cgm.errorNYI(
expr->getSourceRange(),
448 std::string(
"unimplemented NVPTX builtin call: ") +
450 return mlir::Value{};
451 case NVPTX::BI__imma_m8n8k32_ld_a_s4:
452 case NVPTX::BI__imma_m8n8k32_ld_a_u4:
453 case NVPTX::BI__imma_m8n8k32_ld_b_s4:
454 case NVPTX::BI__imma_m8n8k32_ld_b_u4:
455 case NVPTX::BI__imma_m8n8k32_ld_c:
456 case NVPTX::BI__bmma_m8n8k128_ld_a_b1:
457 case NVPTX::BI__bmma_m8n8k128_ld_b_b1:
458 case NVPTX::BI__bmma_m8n8k128_ld_c:
459 cgm.errorNYI(
expr->getSourceRange(),
460 std::string(
"unimplemented NVPTX builtin call: ") +
462 return mlir::Value{};
463 case NVPTX::BI__dmma_m8n8k4_ld_a:
464 case NVPTX::BI__dmma_m8n8k4_ld_b:
465 case NVPTX::BI__dmma_m8n8k4_ld_c:
466 cgm.errorNYI(
expr->getSourceRange(),
467 std::string(
"unimplemented NVPTX builtin call: ") +
469 return mlir::Value{};
470 case NVPTX::BI__mma_bf16_m16n16k16_ld_a:
471 case NVPTX::BI__mma_bf16_m16n16k16_ld_b:
472 case NVPTX::BI__mma_bf16_m8n32k16_ld_a:
473 case NVPTX::BI__mma_bf16_m8n32k16_ld_b:
474 case NVPTX::BI__mma_bf16_m32n8k16_ld_a:
475 case NVPTX::BI__mma_bf16_m32n8k16_ld_b:
476 case NVPTX::BI__mma_tf32_m16n16k8_ld_a:
477 case NVPTX::BI__mma_tf32_m16n16k8_ld_b:
478 case NVPTX::BI__mma_tf32_m16n16k8_ld_c:
479 cgm.errorNYI(
expr->getSourceRange(),
480 std::string(
"unimplemented NVPTX builtin call: ") +
482 return mlir::Value{};
483 case NVPTX::BI__hmma_m16n16k16_st_c_f16:
484 case NVPTX::BI__hmma_m16n16k16_st_c_f32:
485 case NVPTX::BI__hmma_m32n8k16_st_c_f16:
486 case NVPTX::BI__hmma_m32n8k16_st_c_f32:
487 case NVPTX::BI__hmma_m8n32k16_st_c_f16:
488 case NVPTX::BI__hmma_m8n32k16_st_c_f32:
489 case NVPTX::BI__imma_m16n16k16_st_c_i32:
490 case NVPTX::BI__imma_m32n8k16_st_c_i32:
491 case NVPTX::BI__imma_m8n32k16_st_c_i32:
492 case NVPTX::BI__imma_m8n8k32_st_c_i32:
493 case NVPTX::BI__bmma_m8n8k128_st_c_i32:
494 case NVPTX::BI__dmma_m8n8k4_st_c_f64:
495 case NVPTX::BI__mma_m16n16k8_st_c_f32:
496 cgm.errorNYI(
expr->getSourceRange(),
497 std::string(
"unimplemented NVPTX builtin call: ") +
499 return mlir::Value{};
502 case NVPTX::BI__hmma_m16n16k16_mma_f16f16:
503 case NVPTX::BI__hmma_m16n16k16_mma_f32f16:
504 case NVPTX::BI__hmma_m16n16k16_mma_f32f32:
505 case NVPTX::BI__hmma_m16n16k16_mma_f16f32:
506 case NVPTX::BI__hmma_m32n8k16_mma_f16f16:
507 case NVPTX::BI__hmma_m32n8k16_mma_f32f16:
508 case NVPTX::BI__hmma_m32n8k16_mma_f32f32:
509 case NVPTX::BI__hmma_m32n8k16_mma_f16f32:
510 case NVPTX::BI__hmma_m8n32k16_mma_f16f16:
511 case NVPTX::BI__hmma_m8n32k16_mma_f32f16:
512 case NVPTX::BI__hmma_m8n32k16_mma_f32f32:
513 case NVPTX::BI__hmma_m8n32k16_mma_f16f32:
514 case NVPTX::BI__imma_m16n16k16_mma_s8:
515 case NVPTX::BI__imma_m16n16k16_mma_u8:
516 case NVPTX::BI__imma_m32n8k16_mma_s8:
517 case NVPTX::BI__imma_m32n8k16_mma_u8:
518 case NVPTX::BI__imma_m8n32k16_mma_s8:
519 case NVPTX::BI__imma_m8n32k16_mma_u8:
520 case NVPTX::BI__imma_m8n8k32_mma_s4:
521 case NVPTX::BI__imma_m8n8k32_mma_u4:
522 case NVPTX::BI__bmma_m8n8k128_mma_xor_popc_b1:
523 case NVPTX::BI__bmma_m8n8k128_mma_and_popc_b1:
524 case NVPTX::BI__dmma_m8n8k4_mma_f64:
525 case NVPTX::BI__mma_bf16_m16n16k16_mma_f32:
526 case NVPTX::BI__mma_bf16_m8n32k16_mma_f32:
527 case NVPTX::BI__mma_bf16_m32n8k16_mma_f32:
528 case NVPTX::BI__mma_tf32_m16n16k8_mma_f32:
529 cgm.errorNYI(
expr->getSourceRange(),
530 std::string(
"unimplemented NVPTX builtin call: ") +
532 return mlir::Value{};
534 case NVPTX::BI__nvvm_ff2f16x2_rn:
535 cgm.errorNYI(
expr->getSourceRange(),
536 std::string(
"unimplemented NVPTX builtin call: ") +
538 return mlir::Value{};
539 case NVPTX::BI__nvvm_ff2f16x2_rn_relu:
540 cgm.errorNYI(
expr->getSourceRange(),
541 std::string(
"unimplemented NVPTX builtin call: ") +
543 return mlir::Value{};
544 case NVPTX::BI__nvvm_ff2f16x2_rz:
545 cgm.errorNYI(
expr->getSourceRange(),
546 std::string(
"unimplemented NVPTX builtin call: ") +
548 return mlir::Value{};
549 case NVPTX::BI__nvvm_ff2f16x2_rz_relu:
550 cgm.errorNYI(
expr->getSourceRange(),
551 std::string(
"unimplemented NVPTX builtin call: ") +
553 return mlir::Value{};
554 case NVPTX::BI__nvvm_fma_rn_f16:
557 case NVPTX::BI__nvvm_fma_rn_f16x2:
560 case NVPTX::BI__nvvm_fma_rn_ftz_f16:
563 case NVPTX::BI__nvvm_fma_rn_ftz_f16x2:
566 case NVPTX::BI__nvvm_fma_rn_ftz_relu_f16:
569 case NVPTX::BI__nvvm_fma_rn_ftz_relu_f16x2:
571 "nvvm.fma.rn.ftz.relu.f16x2")
573 case NVPTX::BI__nvvm_fma_rn_ftz_sat_f16:
576 case NVPTX::BI__nvvm_fma_rn_ftz_sat_f16x2:
578 "nvvm.fma.rn.ftz.sat.f16x2")
580 case NVPTX::BI__nvvm_fma_rn_relu_f16:
583 case NVPTX::BI__nvvm_fma_rn_relu_f16x2:
586 case NVPTX::BI__nvvm_fma_rn_sat_f16:
589 case NVPTX::BI__nvvm_fma_rn_sat_f16x2:
592 case NVPTX::BI__nvvm_fma_rn_oob_f16:
593 case NVPTX::BI__nvvm_fma_rn_oob_f16x2:
594 case NVPTX::BI__nvvm_fma_rn_oob_bf16:
595 case NVPTX::BI__nvvm_fma_rn_oob_bf16x2:
598 case NVPTX::BI__nvvm_fma_rn_oob_relu_f16:
599 case NVPTX::BI__nvvm_fma_rn_oob_relu_f16x2:
600 case NVPTX::BI__nvvm_fma_rn_oob_relu_bf16:
601 case NVPTX::BI__nvvm_fma_rn_oob_relu_bf16x2:
604 case NVPTX::BI__nvvm_fmax_f16:
607 case NVPTX::BI__nvvm_fmax_f16x2:
610 case NVPTX::BI__nvvm_fmax_ftz_f16:
613 case NVPTX::BI__nvvm_fmax_ftz_f16x2:
616 case NVPTX::BI__nvvm_fmax_ftz_nan_f16:
619 case NVPTX::BI__nvvm_fmax_ftz_nan_f16x2:
622 case NVPTX::BI__nvvm_fmax_ftz_nan_xorsign_abs_f16:
624 expr,
"nvvm.fmax.ftz.nan.xorsign.abs.f16")
626 case NVPTX::BI__nvvm_fmax_ftz_nan_xorsign_abs_f16x2:
628 expr,
"nvvm.fmax.ftz.nan.xorsign.abs.f16x2")
630 case NVPTX::BI__nvvm_fmax_ftz_xorsign_abs_f16:
632 "nvvm.fmax.ftz.xorsign.abs.f16")
634 case NVPTX::BI__nvvm_fmax_ftz_xorsign_abs_f16x2:
636 expr,
"nvvm.fmax.ftz.xorsign.abs.f16x2")
638 case NVPTX::BI__nvvm_fmax_nan_f16:
641 case NVPTX::BI__nvvm_fmax_nan_f16x2:
644 case NVPTX::BI__nvvm_fmax_nan_xorsign_abs_f16:
646 "nvvm.fmax.nan.xorsign.abs.f16")
648 case NVPTX::BI__nvvm_fmax_nan_xorsign_abs_f16x2:
650 expr,
"nvvm.fmax.nan.xorsign.abs.f16x2")
652 case NVPTX::BI__nvvm_fmax_xorsign_abs_f16:
654 "nvvm.fmax.xorsign.abs.f16")
656 case NVPTX::BI__nvvm_fmax_xorsign_abs_f16x2:
658 "nvvm.fmax.xorsign.abs.f16x2")
660 case NVPTX::BI__nvvm_fmin_f16:
663 case NVPTX::BI__nvvm_fmin_f16x2:
666 case NVPTX::BI__nvvm_fmin_ftz_f16:
669 case NVPTX::BI__nvvm_fmin_ftz_f16x2:
672 case NVPTX::BI__nvvm_fmin_ftz_nan_f16:
675 case NVPTX::BI__nvvm_fmin_ftz_nan_f16x2:
678 case NVPTX::BI__nvvm_fmin_ftz_nan_xorsign_abs_f16:
680 expr,
"nvvm.fmin.ftz.nan.xorsign.abs.f16")
682 case NVPTX::BI__nvvm_fmin_ftz_nan_xorsign_abs_f16x2:
684 expr,
"nvvm.fmin.ftz.nan.xorsign.abs.f16x2")
686 case NVPTX::BI__nvvm_fmin_ftz_xorsign_abs_f16:
688 "nvvm.fmin.ftz.xorsign.abs.f16")
690 case NVPTX::BI__nvvm_fmin_ftz_xorsign_abs_f16x2:
692 expr,
"nvvm.fmin.ftz.xorsign.abs.f16x2")
694 case NVPTX::BI__nvvm_fmin_nan_f16:
697 case NVPTX::BI__nvvm_fmin_nan_f16x2:
700 case NVPTX::BI__nvvm_fmin_nan_xorsign_abs_f16:
702 "nvvm.fmin.nan.xorsign.abs.f16")
704 case NVPTX::BI__nvvm_fmin_nan_xorsign_abs_f16x2:
706 expr,
"nvvm.fmin.nan.xorsign.abs.f16x2")
708 case NVPTX::BI__nvvm_fmin_xorsign_abs_f16:
710 "nvvm.fmin.xorsign.abs.f16")
712 case NVPTX::BI__nvvm_fmin_xorsign_abs_f16x2:
714 "nvvm.fmin.xorsign.abs.f16x2")
716 case NVPTX::BI__nvvm_fabs_f:
717 case NVPTX::BI__nvvm_abs_bf16:
718 case NVPTX::BI__nvvm_abs_bf16x2:
719 case NVPTX::BI__nvvm_fabs_f16:
720 case NVPTX::BI__nvvm_fabs_f16x2:
722 case NVPTX::BI__nvvm_fabs_ftz_f:
723 case NVPTX::BI__nvvm_fabs_ftz_f16:
724 case NVPTX::BI__nvvm_fabs_ftz_f16x2:
726 case NVPTX::BI__nvvm_fabs_d:
728 case NVPTX::BI__nvvm_ex2_approx_d:
729 case NVPTX::BI__nvvm_ex2_approx_f:
730 case NVPTX::BI__nvvm_ex2_approx_f16:
731 case NVPTX::BI__nvvm_ex2_approx_f16x2:
733 case NVPTX::BI__nvvm_ex2_approx_ftz_f:
735 case NVPTX::BI__nvvm_add_rn_f:
736 case NVPTX::BI__nvvm_add_rn_d:
738 llvm::APFloat::rmNearestTiesToEven);
739 case NVPTX::BI__nvvm_add_rz_f:
740 case NVPTX::BI__nvvm_add_rz_d:
742 llvm::APFloat::rmTowardZero);
743 case NVPTX::BI__nvvm_add_rm_f:
744 case NVPTX::BI__nvvm_add_rm_d:
746 llvm::APFloat::rmTowardNegative);
747 case NVPTX::BI__nvvm_add_rp_f:
748 case NVPTX::BI__nvvm_add_rp_d:
750 llvm::APFloat::rmTowardPositive);
751 case NVPTX::BI__nvvm_add_rn_ftz_f:
753 llvm::APFloat::rmNearestTiesToEven);
754 case NVPTX::BI__nvvm_add_rz_ftz_f:
756 llvm::APFloat::rmTowardZero);
757 case NVPTX::BI__nvvm_add_rm_ftz_f:
759 llvm::APFloat::rmTowardNegative);
760 case NVPTX::BI__nvvm_add_rp_ftz_f:
762 llvm::APFloat::rmTowardPositive);
763 case NVPTX::BI__nvvm_add_rn_sat_f:
764 case NVPTX::BI__nvvm_add_rn_sat_f16:
765 case NVPTX::BI__nvvm_add_rn_sat_v2f16:
767 llvm::APFloat::rmNearestTiesToEven);
768 case NVPTX::BI__nvvm_add_rz_sat_f:
770 llvm::APFloat::rmTowardZero);
771 case NVPTX::BI__nvvm_add_rm_sat_f:
773 llvm::APFloat::rmTowardNegative);
774 case NVPTX::BI__nvvm_add_rp_sat_f:
776 llvm::APFloat::rmTowardPositive);
777 case NVPTX::BI__nvvm_add_rn_ftz_sat_f:
778 case NVPTX::BI__nvvm_add_rn_ftz_sat_f16:
779 case NVPTX::BI__nvvm_add_rn_ftz_sat_v2f16:
781 llvm::APFloat::rmNearestTiesToEven);
782 case NVPTX::BI__nvvm_add_rz_ftz_sat_f:
784 llvm::APFloat::rmTowardZero);
785 case NVPTX::BI__nvvm_add_rm_ftz_sat_f:
787 llvm::APFloat::rmTowardNegative);
788 case NVPTX::BI__nvvm_add_rp_ftz_sat_f:
790 llvm::APFloat::rmTowardPositive);
791 case NVPTX::BI__nvvm_mul_rn_f:
792 case NVPTX::BI__nvvm_mul_rn_d:
794 llvm::APFloat::rmNearestTiesToEven);
795 case NVPTX::BI__nvvm_mul_rz_f:
796 case NVPTX::BI__nvvm_mul_rz_d:
798 llvm::APFloat::rmTowardZero);
799 case NVPTX::BI__nvvm_mul_rm_f:
800 case NVPTX::BI__nvvm_mul_rm_d:
802 llvm::APFloat::rmTowardNegative);
803 case NVPTX::BI__nvvm_mul_rp_f:
804 case NVPTX::BI__nvvm_mul_rp_d:
806 llvm::APFloat::rmTowardPositive);
807 case NVPTX::BI__nvvm_mul_rn_ftz_f:
809 llvm::APFloat::rmNearestTiesToEven);
810 case NVPTX::BI__nvvm_mul_rz_ftz_f:
812 llvm::APFloat::rmTowardZero);
813 case NVPTX::BI__nvvm_mul_rm_ftz_f:
815 llvm::APFloat::rmTowardNegative);
816 case NVPTX::BI__nvvm_mul_rp_ftz_f:
818 llvm::APFloat::rmTowardPositive);
819 case NVPTX::BI__nvvm_mul_rn_sat_f16:
820 case NVPTX::BI__nvvm_mul_rn_sat_v2f16:
822 llvm::APFloat::rmNearestTiesToEven);
823 case NVPTX::BI__nvvm_mul_rn_ftz_sat_f16:
824 case NVPTX::BI__nvvm_mul_rn_ftz_sat_v2f16:
826 llvm::APFloat::rmNearestTiesToEven);
827 case NVPTX::BI__nvvm_ldg_h:
828 case NVPTX::BI__nvvm_ldg_h2:
829 cgm.errorNYI(
expr->getSourceRange(),
830 std::string(
"unimplemented NVPTX builtin call: ") +
832 return mlir::Value{};
833 case NVPTX::BI__nvvm_ldu_h:
834 case NVPTX::BI__nvvm_ldu_h2:
836 case NVPTX::BI__nvvm_cp_async_ca_shared_global_4:
837 cgm.errorNYI(
expr->getSourceRange(),
838 std::string(
"unimplemented NVPTX builtin call: ") +
840 return mlir::Value{};
841 case NVPTX::BI__nvvm_cp_async_ca_shared_global_8:
842 cgm.errorNYI(
expr->getSourceRange(),
843 std::string(
"unimplemented NVPTX builtin call: ") +
845 return mlir::Value{};
846 case NVPTX::BI__nvvm_cp_async_ca_shared_global_16:
847 cgm.errorNYI(
expr->getSourceRange(),
848 std::string(
"unimplemented NVPTX builtin call: ") +
850 return mlir::Value{};
851 case NVPTX::BI__nvvm_cp_async_cg_shared_global_16:
852 cgm.errorNYI(
expr->getSourceRange(),
853 std::string(
"unimplemented NVPTX builtin call: ") +
855 return mlir::Value{};
856 case NVPTX::BI__nvvm_read_ptx_sreg_clusterid_x:
857 cgm.errorNYI(
expr->getSourceRange(),
858 std::string(
"unimplemented NVPTX builtin call: ") +
860 return mlir::Value{};
861 case NVPTX::BI__nvvm_read_ptx_sreg_clusterid_y:
862 cgm.errorNYI(
expr->getSourceRange(),
863 std::string(
"unimplemented NVPTX builtin call: ") +
865 return mlir::Value{};
866 case NVPTX::BI__nvvm_read_ptx_sreg_clusterid_z:
867 cgm.errorNYI(
expr->getSourceRange(),
868 std::string(
"unimplemented NVPTX builtin call: ") +
870 return mlir::Value{};
871 case NVPTX::BI__nvvm_read_ptx_sreg_clusterid_w:
872 cgm.errorNYI(
expr->getSourceRange(),
873 std::string(
"unimplemented NVPTX builtin call: ") +
875 return mlir::Value{};
876 case NVPTX::BI__nvvm_read_ptx_sreg_nclusterid_x:
877 cgm.errorNYI(
expr->getSourceRange(),
878 std::string(
"unimplemented NVPTX builtin call: ") +
880 return mlir::Value{};
881 case NVPTX::BI__nvvm_read_ptx_sreg_nclusterid_y:
882 cgm.errorNYI(
expr->getSourceRange(),
883 std::string(
"unimplemented NVPTX builtin call: ") +
885 return mlir::Value{};
886 case NVPTX::BI__nvvm_read_ptx_sreg_nclusterid_z:
887 cgm.errorNYI(
expr->getSourceRange(),
888 std::string(
"unimplemented NVPTX builtin call: ") +
890 return mlir::Value{};
891 case NVPTX::BI__nvvm_read_ptx_sreg_nclusterid_w:
892 cgm.errorNYI(
expr->getSourceRange(),
893 std::string(
"unimplemented NVPTX builtin call: ") +
895 return mlir::Value{};
896 case NVPTX::BI__nvvm_read_ptx_sreg_cluster_ctaid_x:
897 cgm.errorNYI(
expr->getSourceRange(),
898 std::string(
"unimplemented NVPTX builtin call: ") +
900 return mlir::Value{};
901 case NVPTX::BI__nvvm_read_ptx_sreg_cluster_ctaid_y:
902 cgm.errorNYI(
expr->getSourceRange(),
903 std::string(
"unimplemented NVPTX builtin call: ") +
905 return mlir::Value{};
906 case NVPTX::BI__nvvm_read_ptx_sreg_cluster_ctaid_z:
907 cgm.errorNYI(
expr->getSourceRange(),
908 std::string(
"unimplemented NVPTX builtin call: ") +
910 return mlir::Value{};
911 case NVPTX::BI__nvvm_read_ptx_sreg_cluster_ctaid_w:
912 cgm.errorNYI(
expr->getSourceRange(),
913 std::string(
"unimplemented NVPTX builtin call: ") +
915 return mlir::Value{};
916 case NVPTX::BI__nvvm_read_ptx_sreg_cluster_nctaid_x:
917 cgm.errorNYI(
expr->getSourceRange(),
918 std::string(
"unimplemented NVPTX builtin call: ") +
920 return mlir::Value{};
921 case NVPTX::BI__nvvm_read_ptx_sreg_cluster_nctaid_y:
922 cgm.errorNYI(
expr->getSourceRange(),
923 std::string(
"unimplemented NVPTX builtin call: ") +
925 return mlir::Value{};
926 case NVPTX::BI__nvvm_read_ptx_sreg_cluster_nctaid_z:
927 cgm.errorNYI(
expr->getSourceRange(),
928 std::string(
"unimplemented NVPTX builtin call: ") +
930 return mlir::Value{};
931 case NVPTX::BI__nvvm_read_ptx_sreg_cluster_nctaid_w:
932 cgm.errorNYI(
expr->getSourceRange(),
933 std::string(
"unimplemented NVPTX builtin call: ") +
935 return mlir::Value{};
936 case NVPTX::BI__nvvm_read_ptx_sreg_cluster_ctarank:
937 cgm.errorNYI(
expr->getSourceRange(),
938 std::string(
"unimplemented NVPTX builtin call: ") +
940 return mlir::Value{};
941 case NVPTX::BI__nvvm_read_ptx_sreg_cluster_nctarank:
942 cgm.errorNYI(
expr->getSourceRange(),
943 std::string(
"unimplemented NVPTX builtin call: ") +
945 return mlir::Value{};
946 case NVPTX::BI__nvvm_is_explicit_cluster:
947 cgm.errorNYI(
expr->getSourceRange(),
948 std::string(
"unimplemented NVPTX builtin call: ") +
950 return mlir::Value{};
951 case NVPTX::BI__nvvm_isspacep_shared_cluster:
952 cgm.errorNYI(
expr->getSourceRange(),
953 std::string(
"unimplemented NVPTX builtin call: ") +
955 return mlir::Value{};
956 case NVPTX::BI__nvvm_mapa:
957 cgm.errorNYI(
expr->getSourceRange(),
958 std::string(
"unimplemented NVPTX builtin call: ") +
960 return mlir::Value{};
961 case NVPTX::BI__nvvm_mapa_shared_cluster:
962 cgm.errorNYI(
expr->getSourceRange(),
963 std::string(
"unimplemented NVPTX builtin call: ") +
965 return mlir::Value{};
966 case NVPTX::BI__nvvm_getctarank:
967 cgm.errorNYI(
expr->getSourceRange(),
968 std::string(
"unimplemented NVPTX builtin call: ") +
970 return mlir::Value{};
971 case NVPTX::BI__nvvm_getctarank_shared_cluster:
972 cgm.errorNYI(
expr->getSourceRange(),
973 std::string(
"unimplemented NVPTX builtin call: ") +
975 return mlir::Value{};
976 case NVPTX::BI__nvvm_barrier_cluster_arrive:
977 return builder.emitIntrinsicCallOp(
getLoc(
expr->getExprLoc()),
978 "nvvm.barrier.cluster.arrive",
979 builder.getVoidTy());
980 case NVPTX::BI__nvvm_barrier_cluster_arrive_relaxed:
981 return builder.emitIntrinsicCallOp(
getLoc(
expr->getExprLoc()),
982 "nvvm.barrier.cluster.arrive.relaxed",
983 builder.getVoidTy());
984 case NVPTX::BI__nvvm_barrier_cluster_wait:
985 return builder.emitIntrinsicCallOp(
getLoc(
expr->getExprLoc()),
986 "nvvm.barrier.cluster.wait",
987 builder.getVoidTy());
988 case NVPTX::BI__nvvm_fence_sc_cluster:
989 return builder.emitIntrinsicCallOp(
getLoc(
expr->getExprLoc()),
990 "nvvm.fence.sc.cluster",
991 builder.getVoidTy());
992 case NVPTX::BI__nvvm_bar_sync:
993 return builder.emitIntrinsicCallOp(
994 getLoc(
expr->getExprLoc()),
"nvvm.barrier.cta.sync.aligned.all",
995 builder.getVoidTy(), mlir::ValueRange{emitScalarExpr(expr->getArg(0))});
996 case NVPTX::BI__syncthreads:
997 return builder.emitIntrinsicCallOp(
998 getLoc(
expr->getExprLoc()),
"nvvm.barrier.cta.sync.aligned.all",
1000 mlir::ValueRange{builder.getConstInt(getLoc(expr->getExprLoc()),
1001 builder.getSInt32Ty(), 0)});
1002 case NVPTX::BI__nvvm_barrier_sync:
1003 return builder.emitIntrinsicCallOp(
1004 getLoc(
expr->getExprLoc()),
"nvvm.barrier.cta.sync.all",
1005 builder.getVoidTy(), mlir::ValueRange{emitScalarExpr(expr->getArg(0))});
1006 case NVPTX::BI__nvvm_barrier_sync_cnt:
1007 return builder.emitIntrinsicCallOp(
1008 getLoc(
expr->getExprLoc()),
"nvvm.barrier.cta.sync.count",
1009 builder.getVoidTy(),
1010 mlir::ValueRange{emitScalarExpr(expr->getArg(0)),
1011 emitScalarExpr(expr->getArg(1))});
1012 case NVPTX::BI__nvvm_bar0_and:
1014 "nvvm.barrier.cta.red.and.aligned.all",
1016 case NVPTX::BI__nvvm_bar0_or:
1019 case NVPTX::BI__nvvm_bar0_popc:
1021 "nvvm.barrier.cta.red.popc.aligned.all",
1025 return std::nullopt;