9#ifndef __CLANG_GPU_DEVICE_FUNCTIONS_H__
10#define __CLANG_GPU_DEVICE_FUNCTIONS_H__
12#if defined(__HIP__) || defined(__CUDA__)
15#define __host__ __attribute__((host))
16#define __device__ __attribute__((device))
17#define __global__ __attribute__((global))
18#define __shared__ __attribute__((shared))
19#define __constant__ __attribute__((constant))
20#define __managed__ __attribute__((managed))
25#pragma push_macro("__GPU_DEVICE__")
26#define __GPU_DEVICE__ static __inline__ __attribute__((device, always_inline))
28#pragma push_macro("MAYBE_UNDEF")
29#define MAYBE_UNDEF __attribute__((maybe_undef))
38__GPU_DEVICE__
unsigned int __popc(
unsigned int __x) {
39 return __builtin_popcountg(__x);
41__GPU_DEVICE__
unsigned int __popcll(
unsigned long long __x) {
42 return __builtin_popcountg(__x);
45__GPU_DEVICE__
int __clz(
int __x) {
46 return __builtin_clzg((
unsigned int)__x, 32);
48__GPU_DEVICE__
int __clzll(
long long __x) {
49 return __builtin_clzg((
unsigned long long)__x, 64);
52__GPU_DEVICE__
int __ffs(
int __x) {
53 return __builtin_ctzg((
unsigned int)__x, -1) + 1;
55__GPU_DEVICE__
int __ffs(
unsigned int __x) {
56 return __builtin_ctzg(__x, -1) + 1;
58__GPU_DEVICE__
int __ffsll(
long long __x) {
59 return __builtin_ctzg((
unsigned long long)__x, -1) + 1;
61__GPU_DEVICE__
int __ffsll(
unsigned long long __x) {
62 return __builtin_ctzg(__x, -1) + 1;
65__GPU_DEVICE__
unsigned int __brev(
unsigned int __x) {
66 return __builtin_elementwise_bitreverse(__x);
68__GPU_DEVICE__
unsigned long long __brevll(
unsigned long long __x) {
69 return __builtin_elementwise_bitreverse(__x);
73 return ((
int(
unsigned(__x) << 8) >> 8)) * ((
int(
unsigned(
__y) << 8) >> 8));
75__GPU_DEVICE__
int __umul24(
unsigned int __x,
unsigned int __y) {
76 return int((__x & 0x00ffffffu) * (
__y & 0x00ffffffu));
80 return int(((
long long)__x * (
long long)
__y) >> 32);
82__GPU_DEVICE__
unsigned int __umulhi(
unsigned int __x,
unsigned int __y) {
83 return (
unsigned int)(((
unsigned long long)__x * (
unsigned long long)
__y) >>
86__GPU_DEVICE__
long long __mul64hi(
long long __x,
long long __y) {
87 return (
long long)(((__int128)__x * (__int128)
__y) >> 64);
89__GPU_DEVICE__
unsigned long long __umul64hi(
unsigned long long __x,
90 unsigned long long __y) {
92 unsigned long long)(((
unsigned __int128)__x * (
unsigned __int128)
__y) >>
96__GPU_DEVICE__
unsigned int __sad(
int __x,
int __y,
unsigned int __z) {
97 return __x >
__y ? __x -
__y + __z :
__y - __x + __z;
99__GPU_DEVICE__
unsigned int __usad(
unsigned int __x,
unsigned int __y,
101 return __x >
__y ? __x -
__y + __z :
__y - __x + __z;
104__GPU_DEVICE__
int __hadd(
int __x,
int __y) {
105 return int(((
long long)__x + (
long long)
__y) >> 1);
108 return int(((
long long)__x + (
long long)
__y + 1) >> 1);
110__GPU_DEVICE__
unsigned int __uhadd(
unsigned int __x,
unsigned int __y) {
111 return (
unsigned int)(((
unsigned long long)__x + (
unsigned long long)
__y) >>
114__GPU_DEVICE__
unsigned int __urhadd(
unsigned int __x,
unsigned int __y) {
116 unsigned int)(((
unsigned long long)__x + (
unsigned long long)
__y + 1) >>
120__GPU_DEVICE__
unsigned int __byte_perm(
unsigned int __x,
unsigned int __y,
122 unsigned long long __tmp = ((
unsigned long long)
__y << 32) | __x;
123 unsigned int __result = 0;
124 for (
int __i = 0; __i < 4; ++__i) {
125 unsigned int __sel = (__s >> (__i * 4)) & 0x7u;
126 __result |= (
unsigned int)((__tmp >> (__sel * 8)) & 0xffu) << (__i * 8);
135__GPU_DEVICE__
unsigned int __lastbit_u32_u64(
unsigned long long __x) {
136 return (
unsigned int)__builtin_ctzg(__x, -1);
139__GPU_DEVICE__
unsigned int __bitextract_u32(
unsigned int __src,
140 unsigned int __offset,
141 unsigned int __width) {
142 unsigned int __o = __offset & 31u;
143 unsigned int __w = __width & 31u;
144 return __w == 0 ? 0u : (
__src << (32u - __o - __w)) >> (32u - __w);
146__GPU_DEVICE__
unsigned long long __bitextract_u64(
unsigned long long __src,
147 unsigned int __offset,
148 unsigned int __width) {
149 unsigned long long __o = __offset & 63u;
150 unsigned long long __w = __width & 63u;
151 return __w == 0 ? 0ull : (
__src << (64ull - __o - __w)) >> (64ull - __w);
154__GPU_DEVICE__
unsigned int __bitinsert_u32(
unsigned int __dst,
156 unsigned int __offset,
157 unsigned int __width) {
158 unsigned int __o = __offset & 31u;
159 unsigned int __mask = (1u << (__width & 31u)) - 1u;
160 return (__dst & ~(__mask << __o)) | ((
__src & __mask) << __o);
162__GPU_DEVICE__
unsigned long long __bitinsert_u64(
unsigned long long __dst,
163 unsigned long long __src,
164 unsigned int __offset,
165 unsigned int __width) {
166 unsigned long long __o = __offset & 63u;
167 unsigned long long __mask = (1ull << (__width & 63u)) - 1ull;
168 return (__dst & ~(__mask << __o)) | ((
__src & __mask) << __o);
176 return __builtin_bit_cast(
int, __x);
179 return __builtin_bit_cast(
unsigned int, __x);
182 return __builtin_bit_cast(
float, __x);
185 return __builtin_bit_cast(
float, __x);
188 return __builtin_bit_cast(
long long, __x);
191 return __builtin_bit_cast(
double, __x);
194 return int(__builtin_bit_cast(
unsigned long long, __x) >> 32);
197 return int(__builtin_bit_cast(
unsigned long long, __x));
200 return __builtin_bit_cast(
double,
201 ((
unsigned long long)(
unsigned int)__hi << 32) |
202 (
unsigned long long)(
unsigned int)__lo);
211#define __GPU_CVT_FP2INT(__name, __res, __arg) \
212 __GPU_DEVICE__ __res __name##_rd(__arg __x) { \
213 return (__res)__builtin_elementwise_floor(__x); \
215 __GPU_DEVICE__ __res __name##_rn(__arg __x) { \
216 return (__res)__builtin_elementwise_rint(__x); \
218 __GPU_DEVICE__ __res __name##_ru(__arg __x) { \
219 return (__res)__builtin_elementwise_ceil(__x); \
221 __GPU_DEVICE__ __res __name##_rz(__arg __x) { return (__res)__x; }
223__GPU_CVT_FP2INT(__double2int,
int,
double)
224__GPU_CVT_FP2INT(__double2uint,
unsigned int,
double)
225__GPU_CVT_FP2INT(__double2ll,
long long,
double)
226__GPU_CVT_FP2INT(__double2ull,
unsigned long long,
double)
227__GPU_CVT_FP2INT(__float2int,
int,
float)
228__GPU_CVT_FP2INT(__float2uint,
unsigned int,
float)
229__GPU_CVT_FP2INT(__float2ll,
long long,
float)
230__GPU_CVT_FP2INT(__float2ull,
unsigned long long,
float)
232#undef __GPU_CVT_FP2INT
239#define __GPU_CVT_TO_F(__name, __res, __arg) \
240 __GPU_DEVICE__ __res __name##_rd(__arg __x) { __builtin_trap(); } \
241 __GPU_DEVICE__ __res __name##_rn(__arg __x) { return (__res)__x; } \
242 __GPU_DEVICE__ __res __name##_ru(__arg __x) { __builtin_trap(); } \
243 __GPU_DEVICE__ __res __name##_rz(__arg __x) { __builtin_trap(); }
245__GPU_CVT_TO_F(__int2float,
float,
int)
246__GPU_CVT_TO_F(__uint2float,
float,
unsigned int)
247__GPU_CVT_TO_F(__ll2float,
float,
long long)
248__GPU_CVT_TO_F(__ull2float,
float,
unsigned long long)
249__GPU_CVT_TO_F(__ll2double,
double,
long long)
250__GPU_CVT_TO_F(__ull2double,
double,
unsigned long long)
251__GPU_CVT_TO_F(__double2float,
float,
double)
258__GPU_DEVICE__
double __uint2double_rn(
unsigned int __x) {
return (
double)__x; }
264__GPU_DEVICE__
unsigned int __lane_id(
void) {
return __gpu_lane_id(); }
266__GPU_DEVICE__
unsigned long long __ballot(
int __pred) {
269__GPU_DEVICE__
unsigned long long __ballot64(
int __pred) {
272__GPU_DEVICE__
unsigned long long __activemask(
void) {
276__GPU_DEVICE__
int __all(
int __pred) {
279__GPU_DEVICE__
int __any(
int __pred) {
283template <
typename __T>
284__GPU_DEVICE__
int __gpu_fns_impl(__T __mask,
unsigned int __base,
286 const int __bits =
int(
sizeof(__T)) * 8;
288 int __off = __offset;
290 __m &= (__T(1) << __base);
292 }
else if (__offset < 0) {
293 __m = __builtin_elementwise_bitreverse(__mask);
294 __base = (
unsigned int)(__bits - 1) - __base;
297 __m &= (~__T(0)) << __base;
298 if (__builtin_popcountg(__m) < __off)
301 for (
int __i = __bits / 2; __i > 0; __i >>= 1) {
302 __T __lo = __m & ((__T(1) << __i) - 1);
303 int __pcnt = __builtin_popcountg(__lo);
304 if (__pcnt < __off) {
312 return __offset < 0 ? (__bits - 1) - __total : __total;
314__GPU_DEVICE__
int __fns64(
unsigned long long __mask,
unsigned int __base,
316 return __gpu_fns_impl(__mask, __base, __offset);
318__GPU_DEVICE__
int __fns32(
unsigned long long __mask,
unsigned int __base,
320 return __gpu_fns_impl((
unsigned int)__mask, __base, __offset);
322__GPU_DEVICE__
int __fns(
unsigned int __mask,
unsigned int __base,
324 return __fns32(__mask, __base, __offset);
332#if !defined(__CUDA__)
336template <
typename __Fn>
337__GPU_DEVICE__
int __gpu_block_reduce_impl(
int __val,
int __init, __Fn __op) {
343 unsigned int __nwarps = (__nthreads + __lanes - 1) / __lanes;
351 __scratch[__tid / __lanes] = __val;
355 for (
unsigned int __i = 0; __i < __nwarps; ++__i)
356 __acc = __op(__acc, __scratch[__i]);
363 int __val = __builtin_popcountg(
__gpu_ballot(__mask, __pred));
364 return __gpu_block_reduce_impl(__val, 0,
370 return __gpu_block_reduce_impl(__val, 1,
376 return __gpu_block_reduce_impl(__val, 0,
381 __scoped_atomic_thread_fence(__ATOMIC_SEQ_CST, __MEMORY_SCOPE_DEVICE);
384 __scoped_atomic_thread_fence(__ATOMIC_SEQ_CST, __MEMORY_SCOPE_WRKGRP);
387 __scoped_atomic_thread_fence(__ATOMIC_SEQ_CST, __MEMORY_SCOPE_SYSTEM);
394__GPU_DEVICE__
long long __clock64(
void) {
395 return (
long long)__builtin_readcyclecounter();
397__GPU_DEVICE__
long long __clock(
void) {
return __clock64(); }
398__GPU_DEVICE__
long long clock64(
void) {
return __clock64(); }
399__GPU_DEVICE__
long long clock(
void) {
return __clock(); }
400__GPU_DEVICE__
long long wall_clock64(
void) {
401 return (
long long)__builtin_readsteadycounter();
407#pragma pop_macro("MAYBE_UNDEF")
408#pragma pop_macro("__GPU_DEVICE__")
__DEVICE__ unsigned long long __umul64hi(unsigned long long __a, unsigned long long __b)
__DEVICE__ void __threadfence(void)
__DEVICE__ unsigned int __usad(unsigned int __a, unsigned int __b, unsigned int __c)
__DEVICE__ float __uint_as_float(unsigned int __a)
__DEVICE__ unsigned int __float_as_uint(float __a)
__DEVICE__ int __any(int __a)
__DEVICE__ double __uint2double_rn(unsigned int __a)
__DEVICE__ int __ffsll(long long __a)
__DEVICE__ int __popc(unsigned int __a)
__DEVICE__ long long clock64()
__DEVICE__ long long __mul64hi(long long __a, long long __b)
__DEVICE__ long long __double_as_longlong(double __a)
__DEVICE__ int __mul24(int __a, int __b)
__DEVICE__ unsigned int __uhadd(unsigned int __a, unsigned int __b)
__DEVICE__ unsigned int __umul24(unsigned int __a, unsigned int __b)
__DEVICE__ void __threadfence_block(void)
__DEVICE__ int __clzll(long long __a)
__DEVICE__ int __rhadd(int __a, int __b)
__DEVICE__ int __mulhi(int __a, int __b)
__DEVICE__ unsigned int __umulhi(unsigned int __a, unsigned int __b)
__DEVICE__ unsigned int __sad(int __a, int __b, unsigned int __c)
__DEVICE__ int __double2loint(double __a)
__DEVICE__ unsigned long long __brevll(unsigned long long __a)
__DEVICE__ unsigned int __ballot(int __a)
__DEVICE__ unsigned int __urhadd(unsigned int __a, unsigned int __b)
__DEVICE__ int __syncthreads_and(int __a)
__DEVICE__ double __int2double_rn(int __a)
__DEVICE__ double __hiloint2double(int __a, int __b)
__DEVICE__ unsigned int __brev(unsigned int __a)
__DEVICE__ int __float_as_int(float __a)
__DEVICE__ int __ffs(int __a)
__DEVICE__ void __threadfence_system(void)
__DEVICE__ int __hadd(int __a, int __b)
__DEVICE__ int __clz(int __a)
__DEVICE__ double __longlong_as_double(long long __a)
__DEVICE__ int __all(int __a)
__DEVICE__ float __int_as_float(int __a)
__DEVICE__ int __syncthreads_or(int __a)
__DEVICE__ int __syncthreads_count(int __a)
__DEVICE__ int __double2hiint(double __a)
__DEVICE__ unsigned int __byte_perm(unsigned int __a, unsigned int __b, unsigned int __c)
__DEVICE__ int __popcll(unsigned long long __a)
_Float16 __2f16 __attribute__((ext_vector_type(2)))
Zeroes the upper 128 bits (bits 255:128) of all YMM registers.
static __inline__ vector float vector float __b
static _DEFAULT_FN_ATTRS __inline__ uint32_t __gpu_lane_id(void)
static _DEFAULT_FN_ATTRS __inline__ uint64_t __gpu_lane_mask(void)
static _DEFAULT_FN_ATTRS __inline__ uint32_t __gpu_num_lanes(void)
static _DEFAULT_FN_ATTRS __inline__ uint64_t __gpu_ballot(uint64_t __lane_mask, bool __x)
static _DEFAULT_FN_ATTRS __inline__ void __gpu_sync_threads(void)
static __inline__ uint32_t uint32_t __y
static __inline__ void int __a
static _DEFAULT_FN_ATTRS __inline__ bool __gpu_is_first_in_lane(uint64_t __lane_mask)
static _DEFAULT_FN_ATTRS __inline__ uint32_t __gpu_num_threads(int __dim)
static _DEFAULT_FN_ATTRS __inline__ uint32_t __gpu_thread_id(int __dim)
static __inline__ void const void * __src