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__clang_gpu_device_functions.h
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1//===---- __clang_gpu_device_functions.h - GPU device functions ------------===
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===-----------------------------------------------------------------------===
8
9#ifndef __CLANG_GPU_DEVICE_FUNCTIONS_H__
10#define __CLANG_GPU_DEVICE_FUNCTIONS_H__
11
12#if defined(__HIP__) || defined(__CUDA__)
13
14#include <gpuintrin.h>
15
16#pragma push_macro("__GPU_DEVICE__")
17#define __GPU_DEVICE__ static __inline__ __attribute__((device, always_inline))
18
19__GPU_DEVICE__ unsigned int __popc(unsigned int __x) {
20 return __builtin_popcountg(__x);
21}
22__GPU_DEVICE__ unsigned int __popcll(unsigned long long __x) {
23 return __builtin_popcountg(__x);
24}
25
26__GPU_DEVICE__ int __clz(int __x) {
27 return __builtin_clzg((unsigned int)__x, 32);
28}
29__GPU_DEVICE__ int __clzll(long long __x) {
30 return __builtin_clzg((unsigned long long)__x, 64);
31}
32
33__GPU_DEVICE__ int __ffs(int __x) {
34 return __builtin_ctzg((unsigned int)__x, -1) + 1;
35}
36__GPU_DEVICE__ int __ffs(unsigned int __x) {
37 return __builtin_ctzg(__x, -1) + 1;
38}
39__GPU_DEVICE__ int __ffsll(long long __x) {
40 return __builtin_ctzg((unsigned long long)__x, -1) + 1;
41}
42__GPU_DEVICE__ int __ffsll(unsigned long long __x) {
43 return __builtin_ctzg(__x, -1) + 1;
44}
45
46__GPU_DEVICE__ unsigned int __brev(unsigned int __x) {
47 return __builtin_elementwise_bitreverse(__x);
48}
49__GPU_DEVICE__ unsigned long long __brevll(unsigned long long __x) {
50 return __builtin_elementwise_bitreverse(__x);
51}
52
53__GPU_DEVICE__ int __mul24(int __x, int __y) {
54 return ((int(unsigned(__x) << 8) >> 8)) * ((int(unsigned(__y) << 8) >> 8));
55}
56__GPU_DEVICE__ int __umul24(unsigned int __x, unsigned int __y) {
57 return int((__x & 0x00ffffffu) * (__y & 0x00ffffffu));
58}
59
60__GPU_DEVICE__ int __mulhi(int __x, int __y) {
61 return int(((long long)__x * (long long)__y) >> 32);
62}
63__GPU_DEVICE__ unsigned int __umulhi(unsigned int __x, unsigned int __y) {
64 return (unsigned int)(((unsigned long long)__x * (unsigned long long)__y) >>
65 32);
66}
67__GPU_DEVICE__ long long __mul64hi(long long __x, long long __y) {
68 return (long long)(((__int128)__x * (__int128)__y) >> 64);
69}
70__GPU_DEVICE__ unsigned long long __umul64hi(unsigned long long __x,
71 unsigned long long __y) {
72 return (
73 unsigned long long)(((unsigned __int128)__x * (unsigned __int128)__y) >>
74 64);
75}
76
77__GPU_DEVICE__ unsigned int __sad(int __x, int __y, unsigned int __z) {
78 return __x > __y ? __x - __y + __z : __y - __x + __z;
79}
80__GPU_DEVICE__ unsigned int __usad(unsigned int __x, unsigned int __y,
81 unsigned int __z) {
82 return __x > __y ? __x - __y + __z : __y - __x + __z;
83}
84
85__GPU_DEVICE__ int __hadd(int __x, int __y) {
86 return int(((long long)__x + (long long)__y) >> 1);
87}
88__GPU_DEVICE__ int __rhadd(int __x, int __y) {
89 return int(((long long)__x + (long long)__y + 1) >> 1);
90}
91__GPU_DEVICE__ unsigned int __uhadd(unsigned int __x, unsigned int __y) {
92 return (unsigned int)(((unsigned long long)__x + (unsigned long long)__y) >>
93 1);
94}
95__GPU_DEVICE__ unsigned int __urhadd(unsigned int __x, unsigned int __y) {
96 return (
97 unsigned int)(((unsigned long long)__x + (unsigned long long)__y + 1) >>
98 1);
99}
100
101__GPU_DEVICE__ unsigned int __byte_perm(unsigned int __x, unsigned int __y,
102 unsigned int __s) {
103 unsigned long long __tmp = ((unsigned long long)__y << 32) | __x;
104 unsigned int __result = 0;
105 for (int __i = 0; __i < 4; ++__i) {
106 unsigned int __sel = (__s >> (__i * 4)) & 0x7u;
107 __result |= (unsigned int)((__tmp >> (__sel * 8)) & 0xffu) << (__i * 8);
108 }
109 return __result;
110}
111
112__GPU_DEVICE__ unsigned int __lastbit_u32_u64(unsigned long long __x) {
113 return (unsigned int)__builtin_ctzg(__x, -1);
114}
115
116__GPU_DEVICE__ unsigned int __bitextract_u32(unsigned int __src,
117 unsigned int __offset,
118 unsigned int __width) {
119 unsigned int __o = __offset & 31u;
120 unsigned int __w = __width & 31u;
121 return __w == 0 ? 0u : (__src << (32u - __o - __w)) >> (32u - __w);
122}
123__GPU_DEVICE__ unsigned long long __bitextract_u64(unsigned long long __src,
124 unsigned int __offset,
125 unsigned int __width) {
126 unsigned long long __o = __offset & 63u;
127 unsigned long long __w = __width & 63u;
128 return __w == 0 ? 0ull : (__src << (64ull - __o - __w)) >> (64ull - __w);
129}
130
131__GPU_DEVICE__ unsigned int __bitinsert_u32(unsigned int __dst,
132 unsigned int __src,
133 unsigned int __offset,
134 unsigned int __width) {
135 unsigned int __o = __offset & 31u;
136 unsigned int __mask = (1u << (__width & 31u)) - 1u;
137 return (__dst & ~(__mask << __o)) | ((__src & __mask) << __o);
138}
139__GPU_DEVICE__ unsigned long long __bitinsert_u64(unsigned long long __dst,
140 unsigned long long __src,
141 unsigned int __offset,
142 unsigned int __width) {
143 unsigned long long __o = __offset & 63u;
144 unsigned long long __mask = (1ull << (__width & 63u)) - 1ull;
145 return (__dst & ~(__mask << __o)) | ((__src & __mask) << __o);
146}
147
148__GPU_DEVICE__ int __float_as_int(float __x) {
149 return __builtin_bit_cast(int, __x);
150}
151__GPU_DEVICE__ unsigned int __float_as_uint(float __x) {
152 return __builtin_bit_cast(unsigned int, __x);
153}
154__GPU_DEVICE__ float __int_as_float(int __x) {
155 return __builtin_bit_cast(float, __x);
156}
157__GPU_DEVICE__ float __uint_as_float(unsigned int __x) {
158 return __builtin_bit_cast(float, __x);
159}
160__GPU_DEVICE__ long long __double_as_longlong(double __x) {
161 return __builtin_bit_cast(long long, __x);
162}
163__GPU_DEVICE__ double __longlong_as_double(long long __x) {
164 return __builtin_bit_cast(double, __x);
165}
166__GPU_DEVICE__ int __double2hiint(double __x) {
167 return int(__builtin_bit_cast(unsigned long long, __x) >> 32);
168}
169__GPU_DEVICE__ int __double2loint(double __x) {
170 return int(__builtin_bit_cast(unsigned long long, __x));
171}
172__GPU_DEVICE__ double __hiloint2double(int __hi, int __lo) {
173 return __builtin_bit_cast(double,
174 ((unsigned long long)(unsigned int)__hi << 32) |
175 (unsigned long long)(unsigned int)__lo);
176}
177
178#define __GPU_CVT_FP2INT(__name, __res, __arg) \
179 __GPU_DEVICE__ __res __name##_rd(__arg __x) { \
180 return (__res)__builtin_elementwise_floor(__x); \
181 } \
182 __GPU_DEVICE__ __res __name##_rn(__arg __x) { \
183 return (__res)__builtin_elementwise_rint(__x); \
184 } \
185 __GPU_DEVICE__ __res __name##_ru(__arg __x) { \
186 return (__res)__builtin_elementwise_ceil(__x); \
187 } \
188 __GPU_DEVICE__ __res __name##_rz(__arg __x) { return (__res)__x; }
189
190__GPU_CVT_FP2INT(__double2int, int, double)
191__GPU_CVT_FP2INT(__double2uint, unsigned int, double)
192__GPU_CVT_FP2INT(__double2ll, long long, double)
193__GPU_CVT_FP2INT(__double2ull, unsigned long long, double)
194__GPU_CVT_FP2INT(__float2int, int, float)
195__GPU_CVT_FP2INT(__float2uint, unsigned int, float)
196__GPU_CVT_FP2INT(__float2ll, long long, float)
197__GPU_CVT_FP2INT(__float2ull, unsigned long long, float)
198
199#undef __GPU_CVT_FP2INT
200
201// TODO: Directed rounding (rd/ru/rz) on the widening conversions needs a
202// FENV_ROUND pragma that is not yet wired up, so only round-to-nearest is
203// exact.
204#define __GPU_CVT_TO_F(__name, __res, __arg) \
205 __GPU_DEVICE__ __res __name##_rd(__arg __x) { __builtin_trap(); } \
206 __GPU_DEVICE__ __res __name##_rn(__arg __x) { return (__res)__x; } \
207 __GPU_DEVICE__ __res __name##_ru(__arg __x) { __builtin_trap(); } \
208 __GPU_DEVICE__ __res __name##_rz(__arg __x) { __builtin_trap(); }
209
210__GPU_CVT_TO_F(__int2float, float, int)
211__GPU_CVT_TO_F(__uint2float, float, unsigned int)
212__GPU_CVT_TO_F(__ll2float, float, long long)
213__GPU_CVT_TO_F(__ull2float, float, unsigned long long)
214__GPU_CVT_TO_F(__ll2double, double, long long)
215__GPU_CVT_TO_F(__ull2double, double, unsigned long long)
216__GPU_CVT_TO_F(__double2float, float, double)
217
218#undef __GPU_CVT_TO_F
219
220__GPU_DEVICE__ double __int2double_rn(int __x) { return (double)__x; }
221__GPU_DEVICE__ double __uint2double_rn(unsigned int __x) { return (double)__x; }
222
223__GPU_DEVICE__ unsigned int __lane_id(void) { return __gpu_lane_id(); }
224
225__GPU_DEVICE__ unsigned long long __ballot(int __pred) {
226 return __gpu_ballot(__gpu_lane_mask(), __pred);
227}
228__GPU_DEVICE__ unsigned long long __ballot64(int __pred) {
229 return __gpu_ballot(__gpu_lane_mask(), __pred);
230}
231__GPU_DEVICE__ unsigned long long __activemask(void) {
232 return __gpu_ballot(__gpu_lane_mask(), 1);
233}
234
235__GPU_DEVICE__ int __all(int __pred) {
236 return __gpu_ballot(__gpu_lane_mask(), __pred) == __gpu_lane_mask();
237}
238__GPU_DEVICE__ int __any(int __pred) {
239 return __gpu_ballot(__gpu_lane_mask(), __pred) != 0ull;
240}
241
242template <typename __T>
243__GPU_DEVICE__ int __gpu_fns_impl(__T __mask, unsigned int __base,
244 int __offset) {
245 const int __bits = int(sizeof(__T)) * 8;
246 __T __m = __mask;
247 int __off = __offset;
248 if (__offset == 0) {
249 __m &= (__T(1) << __base);
250 __off = 1;
251 } else if (__offset < 0) {
252 __m = __builtin_elementwise_bitreverse(__mask);
253 __base = (unsigned int)(__bits - 1) - __base;
254 __off = -__offset;
255 }
256 __m &= (~__T(0)) << __base;
257 if (__builtin_popcountg(__m) < __off)
258 return -1;
259 int __total = 0;
260 for (int __i = __bits / 2; __i > 0; __i >>= 1) {
261 __T __lo = __m & ((__T(1) << __i) - 1);
262 int __pcnt = __builtin_popcountg(__lo);
263 if (__pcnt < __off) {
264 __m >>= __i;
265 __off -= __pcnt;
266 __total += __i;
267 } else {
268 __m = __lo;
269 }
270 }
271 return __offset < 0 ? (__bits - 1) - __total : __total;
272}
273__GPU_DEVICE__ int __fns64(unsigned long long __mask, unsigned int __base,
274 int __offset) {
275 return __gpu_fns_impl(__mask, __base, __offset);
276}
277__GPU_DEVICE__ int __fns32(unsigned long long __mask, unsigned int __base,
278 int __offset) {
279 return __gpu_fns_impl((unsigned int)__mask, __base, __offset);
280}
281__GPU_DEVICE__ int __fns(unsigned int __mask, unsigned int __base,
282 int __offset) {
283 return __fns32(__mask, __base, __offset);
284}
285
286// CUDA lowers __syncthreads to an NVPTX builtin directly.
287#if !defined(__NVPTX__)
288__GPU_DEVICE__ void __syncthreads(void) { __gpu_sync_threads(); }
289#endif
290
291template <typename __Fn>
292__GPU_DEVICE__ int __gpu_block_reduce_impl(int __val, int __init, __Fn __op) {
293 static __attribute__((shared)) int __scratch[32];
294 unsigned int __lanes = __gpu_num_lanes();
295 unsigned int __nthreads = __gpu_num_threads(__GPU_X_DIM) *
298 unsigned int __nwarps = (__nthreads + __lanes - 1) / __lanes;
299 unsigned int __tid =
304
306 __scratch[__tid / __lanes] = __val;
308
309 int __acc = __init;
310 for (unsigned int __i = 0; __i < __nwarps; ++__i)
311 __acc = __op(__acc, __scratch[__i]);
313 return __acc;
314}
315
316__GPU_DEVICE__ int __syncthreads_count(int __pred) {
317 unsigned long long __mask = __gpu_lane_mask();
318 int __val = __builtin_popcountg(__gpu_ballot(__mask, __pred));
319 return __gpu_block_reduce_impl(__val, 0,
320 [](int __a, int __b) { return __a + __b; });
321}
322__GPU_DEVICE__ int __syncthreads_and(int __pred) {
323 unsigned long long __mask = __gpu_lane_mask();
324 int __val = __gpu_ballot(__mask, __pred) == __mask;
325 return __gpu_block_reduce_impl(__val, 1,
326 [](int __a, int __b) { return __a & __b; });
327}
328__GPU_DEVICE__ int __syncthreads_or(int __pred) {
329 unsigned long long __mask = __gpu_lane_mask();
330 int __val = __gpu_ballot(__mask, __pred) != 0ull;
331 return __gpu_block_reduce_impl(__val, 0,
332 [](int __a, int __b) { return __a | __b; });
333}
334
335__GPU_DEVICE__ void __threadfence(void) {
336 __scoped_atomic_thread_fence(__ATOMIC_SEQ_CST, __MEMORY_SCOPE_DEVICE);
337}
338__GPU_DEVICE__ void __threadfence_block(void) {
339 __scoped_atomic_thread_fence(__ATOMIC_SEQ_CST, __MEMORY_SCOPE_WRKGRP);
340}
341__GPU_DEVICE__ void __threadfence_system(void) {
342 __scoped_atomic_thread_fence(__ATOMIC_SEQ_CST, __MEMORY_SCOPE_SYSTEM);
343}
344
345__GPU_DEVICE__ long long __clock64(void) {
346 return (long long)__builtin_readcyclecounter();
347}
348__GPU_DEVICE__ long long __clock(void) { return __clock64(); }
349__GPU_DEVICE__ long long clock64(void) { return __clock64(); }
350__GPU_DEVICE__ long long clock(void) { return __clock(); }
351__GPU_DEVICE__ long long wall_clock64(void) {
352 return (long long)__builtin_readsteadycounter();
353}
354
355#pragma pop_macro("__GPU_DEVICE__")
356
357#endif // device compile
358#endif // __CLANG_GPU_DEVICE_FUNCTIONS_H__
__DEVICE__ unsigned long long __umul64hi(unsigned long long __a, unsigned long long __b)
__DEVICE__ void __threadfence(void)
__DEVICE__ unsigned int __usad(unsigned int __a, unsigned int __b, unsigned int __c)
__DEVICE__ float __uint_as_float(unsigned int __a)
__DEVICE__ unsigned int __float_as_uint(float __a)
__DEVICE__ int __any(int __a)
__DEVICE__ double __uint2double_rn(unsigned int __a)
__DEVICE__ int __ffsll(long long __a)
__DEVICE__ int __popc(unsigned int __a)
__DEVICE__ long long clock64()
__DEVICE__ long long __mul64hi(long long __a, long long __b)
__DEVICE__ long long __double_as_longlong(double __a)
__DEVICE__ int __mul24(int __a, int __b)
__DEVICE__ unsigned int __uhadd(unsigned int __a, unsigned int __b)
__DEVICE__ unsigned int __umul24(unsigned int __a, unsigned int __b)
__DEVICE__ void __threadfence_block(void)
__DEVICE__ int __clzll(long long __a)
__DEVICE__ int clock()
__DEVICE__ int __rhadd(int __a, int __b)
__DEVICE__ int __mulhi(int __a, int __b)
__DEVICE__ unsigned int __umulhi(unsigned int __a, unsigned int __b)
__DEVICE__ unsigned int __sad(int __a, int __b, unsigned int __c)
__DEVICE__ int __double2loint(double __a)
__DEVICE__ unsigned long long __brevll(unsigned long long __a)
__DEVICE__ unsigned int __ballot(int __a)
__DEVICE__ unsigned int __urhadd(unsigned int __a, unsigned int __b)
__DEVICE__ int __syncthreads_and(int __a)
__DEVICE__ double __int2double_rn(int __a)
__DEVICE__ double __hiloint2double(int __a, int __b)
__DEVICE__ unsigned int __brev(unsigned int __a)
__DEVICE__ int __float_as_int(float __a)
__DEVICE__ int __ffs(int __a)
__DEVICE__ void __threadfence_system(void)
__DEVICE__ int __hadd(int __a, int __b)
__DEVICE__ int __clz(int __a)
__DEVICE__ double __longlong_as_double(long long __a)
__DEVICE__ int __all(int __a)
__DEVICE__ float __int_as_float(int __a)
__DEVICE__ int __syncthreads_or(int __a)
__DEVICE__ int __syncthreads_count(int __a)
__DEVICE__ int __double2hiint(double __a)
__DEVICE__ unsigned int __byte_perm(unsigned int __a, unsigned int __b, unsigned int __c)
__DEVICE__ int __popcll(unsigned long long __a)
_Float16 __2f16 __attribute__((ext_vector_type(2)))
Zeroes the upper 128 bits (bits 255:128) of all YMM registers.
static __inline__ vector float vector float __b
Definition altivec.h:578
static _DEFAULT_FN_ATTRS __inline__ uint32_t __gpu_lane_id(void)
static _DEFAULT_FN_ATTRS __inline__ uint64_t __gpu_lane_mask(void)
static _DEFAULT_FN_ATTRS __inline__ uint32_t __gpu_num_lanes(void)
static _DEFAULT_FN_ATTRS __inline__ uint64_t __gpu_ballot(uint64_t __lane_mask, bool __x)
static _DEFAULT_FN_ATTRS __inline__ void __gpu_sync_threads(void)
static __inline__ uint32_t uint32_t __y
Definition arm_acle.h:132
static __inline__ void int __a
Definition emmintrin.h:4077
#define __GPU_Y_DIM
Definition gpuintrin.h:52
static _DEFAULT_FN_ATTRS __inline__ bool __gpu_is_first_in_lane(uint64_t __lane_mask)
Definition gpuintrin.h:119
static _DEFAULT_FN_ATTRS __inline__ uint32_t __gpu_num_threads(int __dim)
Definition gpuintrin.h:84
static _DEFAULT_FN_ATTRS __inline__ uint32_t __gpu_thread_id(int __dim)
Definition gpuintrin.h:98
#define __GPU_X_DIM
Definition gpuintrin.h:51
#define __GPU_Z_DIM
Definition gpuintrin.h:53
static __inline__ void const void * __src