#include "CIRGenTypes.h"
#include "CIRGenCXXABI.h"
#include "CIRGenFunctionInfo.h"
#include "CIRGenModule.h"
#include "mlir/IR/BuiltinTypes.h"
#include "clang/AST/ASTContext.h"
#include "clang/AST/GlobalDecl.h"
#include "clang/AST/Type.h"
#include "clang/Basic/TargetInfo.h"
#include "clang/CIR/Dialect/IR/CIRTypes.h"
#include <cassert>
#include "clang/Basic/AMDGPUTypes.def"
Go to the source code of this file.
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| #define | AMDGPU_OPAQUE_PTR_TYPE(Name, Id, SingletonId, Width, Align, AS) |
| #define | AMDGPU_NAMED_BARRIER_TYPE(Name, Id, SingletonId, Width, Align, Scope) |
| #define | AMDGPU_TYPE(Name, Id, SingletonId, Width, Align) |
◆ AMDGPU_NAMED_BARRIER_TYPE
| #define AMDGPU_NAMED_BARRIER_TYPE |
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| Name, |
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| Id, |
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| SingletonId, |
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| Width, |
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| Align, |
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| Scope ) |
Value: case BuiltinType::Id: \
llvm_unreachable("NYI");
◆ AMDGPU_OPAQUE_PTR_TYPE
| #define AMDGPU_OPAQUE_PTR_TYPE |
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| Name, |
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| Id, |
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| SingletonId, |
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| Width, |
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| Align, |
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| AS ) |
Value: case BuiltinType::Id: { \
if (BuiltinType::Id == BuiltinType::AMDGPUTexture) { \
resultType = cir::VectorType::get(builder.getSInt32Ty(), 8); \
} else { \
resultType = builder.getPointerTo(cgm.voidTy); \
} \
break; \
}
◆ AMDGPU_TYPE
| #define AMDGPU_TYPE |
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| Name, |
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| Id, |
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| SingletonId, |
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| Width, |
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| Align ) |
Value: case BuiltinType::Id: \
llvm_unreachable("NYI");
◆ isSafeToConvert() [1/3]
◆ isSafeToConvert() [2/3]
Return true if it is safe to convert the specified record decl to CIR and lay it out, false if doing so would cause us to get into a recursive compilation mess.
Definition at line 141 of file CIRGenTypes.cpp.
References clang::CIRGen::CIRGenTypes::cacheSafeToConvert(), clang::RecordDecl::fields(), clang::CIRGen::CIRGenTypes::getASTContext(), clang::ASTContext::getCanonicalTagType(), clang::CanQual< T >::getTypePtr(), clang::CIRGen::CIRGenTypes::isCachedSafeToConvert(), clang::TagDecl::isCompleteDefinition(), clang::CIRGen::CIRGenTypes::isRecordBeingLaidOut(), clang::CIRGen::CIRGenTypes::isRecordLayoutComplete(), and isSafeToConvert().
◆ isSafeToConvert() [3/3]