clang  14.0.0git
hexagon_types.h
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1 /******************************************************************************/
2 /* (c) 2020 Qualcomm Innovation Center, Inc. All rights reserved. */
3 /* */
4 /******************************************************************************/
5 #ifndef HEXAGON_TYPES_H
6 #define HEXAGON_TYPES_H
7 
8 #include <hexagon_protos.h>
9 
10 /* Hexagon names */
11 #define HEXAGON_Vect HEXAGON_Vect64
12 #define HEXAGON_V_GET_D HEXAGON_V64_GET_D
13 #define HEXAGON_V_GET_UD HEXAGON_V64_GET_UD
14 #define HEXAGON_V_GET_W0 HEXAGON_V64_GET_W0
15 #define HEXAGON_V_GET_W1 HEXAGON_V64_GET_W1
16 #define HEXAGON_V_GET_UW0 HEXAGON_V64_GET_UW0
17 #define HEXAGON_V_GET_UW1 HEXAGON_V64_GET_UW1
18 #define HEXAGON_V_GET_H0 HEXAGON_V64_GET_H0
19 #define HEXAGON_V_GET_H1 HEXAGON_V64_GET_H1
20 #define HEXAGON_V_GET_H2 HEXAGON_V64_GET_H2
21 #define HEXAGON_V_GET_H3 HEXAGON_V64_GET_H3
22 #define HEXAGON_V_GET_UH0 HEXAGON_V64_GET_UH0
23 #define HEXAGON_V_GET_UH1 HEXAGON_V64_GET_UH1
24 #define HEXAGON_V_GET_UH2 HEXAGON_V64_GET_UH2
25 #define HEXAGON_V_GET_UH3 HEXAGON_V64_GET_UH3
26 #define HEXAGON_V_GET_B0 HEXAGON_V64_GET_B0
27 #define HEXAGON_V_GET_B1 HEXAGON_V64_GET_B1
28 #define HEXAGON_V_GET_B2 HEXAGON_V64_GET_B2
29 #define HEXAGON_V_GET_B3 HEXAGON_V64_GET_B3
30 #define HEXAGON_V_GET_B4 HEXAGON_V64_GET_B4
31 #define HEXAGON_V_GET_B5 HEXAGON_V64_GET_B5
32 #define HEXAGON_V_GET_B6 HEXAGON_V64_GET_B6
33 #define HEXAGON_V_GET_B7 HEXAGON_V64_GET_B7
34 #define HEXAGON_V_GET_UB0 HEXAGON_V64_GET_UB0
35 #define HEXAGON_V_GET_UB1 HEXAGON_V64_GET_UB1
36 #define HEXAGON_V_GET_UB2 HEXAGON_V64_GET_UB2
37 #define HEXAGON_V_GET_UB3 HEXAGON_V64_GET_UB3
38 #define HEXAGON_V_GET_UB4 HEXAGON_V64_GET_UB4
39 #define HEXAGON_V_GET_UB5 HEXAGON_V64_GET_UB5
40 #define HEXAGON_V_GET_UB6 HEXAGON_V64_GET_UB6
41 #define HEXAGON_V_GET_UB7 HEXAGON_V64_GET_UB7
42 #define HEXAGON_V_PUT_D HEXAGON_V64_PUT_D
43 #define HEXAGON_V_PUT_W0 HEXAGON_V64_PUT_W0
44 #define HEXAGON_V_PUT_W1 HEXAGON_V64_PUT_W1
45 #define HEXAGON_V_PUT_H0 HEXAGON_V64_PUT_H0
46 #define HEXAGON_V_PUT_H1 HEXAGON_V64_PUT_H1
47 #define HEXAGON_V_PUT_H2 HEXAGON_V64_PUT_H2
48 #define HEXAGON_V_PUT_H3 HEXAGON_V64_PUT_H3
49 #define HEXAGON_V_PUT_B0 HEXAGON_V64_PUT_B0
50 #define HEXAGON_V_PUT_B1 HEXAGON_V64_PUT_B1
51 #define HEXAGON_V_PUT_B2 HEXAGON_V64_PUT_B2
52 #define HEXAGON_V_PUT_B3 HEXAGON_V64_PUT_B3
53 #define HEXAGON_V_PUT_B4 HEXAGON_V64_PUT_B4
54 #define HEXAGON_V_PUT_B5 HEXAGON_V64_PUT_B5
55 #define HEXAGON_V_PUT_B6 HEXAGON_V64_PUT_B6
56 #define HEXAGON_V_PUT_B7 HEXAGON_V64_PUT_B7
57 #define HEXAGON_V_CREATE_D HEXAGON_V64_CREATE_D
58 #define HEXAGON_V_CREATE_W HEXAGON_V64_CREATE_W
59 #define HEXAGON_V_CREATE_H HEXAGON_V64_CREATE_H
60 #define HEXAGON_V_CREATE_B HEXAGON_V64_CREATE_B
61 
62 #ifdef __cplusplus
63 #define HEXAGON_VectC HEXAGON_Vect64C
64 #endif /* __cplusplus */
65 
66 /* 64 Bit Vectors */
67 
68 typedef long long __attribute__((__may_alias__)) HEXAGON_Vect64;
69 
70 /* Extract doubleword macros */
71 
72 #define HEXAGON_V64_GET_D(v) (v)
73 #define HEXAGON_V64_GET_UD(v) ((unsigned long long)(v))
74 
75 /* Extract word macros */
76 
77 #define HEXAGON_V64_GET_W0(v) \
78  __extension__({ \
79  union { \
80  long long d; \
81  int w[2]; \
82  } _HEXAGON_V64_internal_union; \
83  _HEXAGON_V64_internal_union.d = (v); \
84  _HEXAGON_V64_internal_union.w[0]; \
85  })
86 #define HEXAGON_V64_GET_W1(v) \
87  __extension__({ \
88  union { \
89  long long d; \
90  int w[2]; \
91  } _HEXAGON_V64_internal_union; \
92  _HEXAGON_V64_internal_union.d = (v); \
93  _HEXAGON_V64_internal_union.w[1]; \
94  })
95 #define HEXAGON_V64_GET_UW0(v) \
96  __extension__({ \
97  union { \
98  long long d; \
99  unsigned int uw[2]; \
100  } _HEXAGON_V64_internal_union; \
101  _HEXAGON_V64_internal_union.d = (v); \
102  _HEXAGON_V64_internal_union.uw[0]; \
103  })
104 #define HEXAGON_V64_GET_UW1(v) \
105  __extension__({ \
106  union { \
107  long long d; \
108  unsigned int uw[2]; \
109  } _HEXAGON_V64_internal_union; \
110  _HEXAGON_V64_internal_union.d = (v); \
111  _HEXAGON_V64_internal_union.uw[1]; \
112  })
113 
114 /* Extract half word macros */
115 
116 #define HEXAGON_V64_GET_H0(v) \
117  __extension__({ \
118  union { \
119  long long d; \
120  short h[4]; \
121  } _HEXAGON_V64_internal_union; \
122  _HEXAGON_V64_internal_union.d = (v); \
123  _HEXAGON_V64_internal_union.h[0]; \
124  })
125 #define HEXAGON_V64_GET_H1(v) \
126  __extension__({ \
127  union { \
128  long long d; \
129  short h[4]; \
130  } _HEXAGON_V64_internal_union; \
131  _HEXAGON_V64_internal_union.d = (v); \
132  _HEXAGON_V64_internal_union.h[1]; \
133  })
134 #define HEXAGON_V64_GET_H2(v) \
135  __extension__({ \
136  union { \
137  long long d; \
138  short h[4]; \
139  } _HEXAGON_V64_internal_union; \
140  _HEXAGON_V64_internal_union.d = (v); \
141  _HEXAGON_V64_internal_union.h[2]; \
142  })
143 #define HEXAGON_V64_GET_H3(v) \
144  __extension__({ \
145  union { \
146  long long d; \
147  short h[4]; \
148  } _HEXAGON_V64_internal_union; \
149  _HEXAGON_V64_internal_union.d = (v); \
150  _HEXAGON_V64_internal_union.h[3]; \
151  })
152 #define HEXAGON_V64_GET_UH0(v) \
153  __extension__({ \
154  union { \
155  long long d; \
156  unsigned short uh[4]; \
157  } _HEXAGON_V64_internal_union; \
158  _HEXAGON_V64_internal_union.d = (v); \
159  _HEXAGON_V64_internal_union.uh[0]; \
160  })
161 #define HEXAGON_V64_GET_UH1(v) \
162  __extension__({ \
163  union { \
164  long long d; \
165  unsigned short uh[4]; \
166  } _HEXAGON_V64_internal_union; \
167  _HEXAGON_V64_internal_union.d = (v); \
168  _HEXAGON_V64_internal_union.uh[1]; \
169  })
170 #define HEXAGON_V64_GET_UH2(v) \
171  __extension__({ \
172  union { \
173  long long d; \
174  unsigned short uh[4]; \
175  } _HEXAGON_V64_internal_union; \
176  _HEXAGON_V64_internal_union.d = (v); \
177  _HEXAGON_V64_internal_union.uh[2]; \
178  })
179 #define HEXAGON_V64_GET_UH3(v) \
180  __extension__({ \
181  union { \
182  long long d; \
183  unsigned short uh[4]; \
184  } _HEXAGON_V64_internal_union; \
185  _HEXAGON_V64_internal_union.d = (v); \
186  _HEXAGON_V64_internal_union.uh[3]; \
187  })
188 
189 /* Extract byte macros */
190 
191 #define HEXAGON_V64_GET_B0(v) \
192  __extension__({ \
193  union { \
194  long long d; \
195  signed char b[8]; \
196  } _HEXAGON_V64_internal_union; \
197  _HEXAGON_V64_internal_union.d = (v); \
198  _HEXAGON_V64_internal_union.b[0]; \
199  })
200 #define HEXAGON_V64_GET_B1(v) \
201  __extension__({ \
202  union { \
203  long long d; \
204  signed char b[8]; \
205  } _HEXAGON_V64_internal_union; \
206  _HEXAGON_V64_internal_union.d = (v); \
207  _HEXAGON_V64_internal_union.b[1]; \
208  })
209 #define HEXAGON_V64_GET_B2(v) \
210  __extension__({ \
211  union { \
212  long long d; \
213  signed char b[8]; \
214  } _HEXAGON_V64_internal_union; \
215  _HEXAGON_V64_internal_union.d = (v); \
216  _HEXAGON_V64_internal_union.b[2]; \
217  })
218 #define HEXAGON_V64_GET_B3(v) \
219  __extension__({ \
220  union { \
221  long long d; \
222  signed char b[8]; \
223  } _HEXAGON_V64_internal_union; \
224  _HEXAGON_V64_internal_union.d = (v); \
225  _HEXAGON_V64_internal_union.b[3]; \
226  })
227 #define HEXAGON_V64_GET_B4(v) \
228  __extension__({ \
229  union { \
230  long long d; \
231  signed char b[8]; \
232  } _HEXAGON_V64_internal_union; \
233  _HEXAGON_V64_internal_union.d = (v); \
234  _HEXAGON_V64_internal_union.b[4]; \
235  })
236 #define HEXAGON_V64_GET_B5(v) \
237  __extension__({ \
238  union { \
239  long long d; \
240  signed char b[8]; \
241  } _HEXAGON_V64_internal_union; \
242  _HEXAGON_V64_internal_union.d = (v); \
243  _HEXAGON_V64_internal_union.b[5]; \
244  })
245 #define HEXAGON_V64_GET_B6(v) \
246  __extension__({ \
247  union { \
248  long long d; \
249  signed char b[8]; \
250  } _HEXAGON_V64_internal_union; \
251  _HEXAGON_V64_internal_union.d = (v); \
252  _HEXAGON_V64_internal_union.b[6]; \
253  })
254 #define HEXAGON_V64_GET_B7(v) \
255  __extension__({ \
256  union { \
257  long long d; \
258  signed char b[8]; \
259  } _HEXAGON_V64_internal_union; \
260  _HEXAGON_V64_internal_union.d = (v); \
261  _HEXAGON_V64_internal_union.b[7]; \
262  })
263 #define HEXAGON_V64_GET_UB0(v) \
264  __extension__({ \
265  union { \
266  long long d; \
267  unsigned char ub[8]; \
268  } _HEXAGON_V64_internal_union; \
269  _HEXAGON_V64_internal_union.d = (v); \
270  _HEXAGON_V64_internal_union.ub[0]; \
271  })
272 #define HEXAGON_V64_GET_UB1(v) \
273  __extension__({ \
274  union { \
275  long long d; \
276  unsigned char ub[8]; \
277  } _HEXAGON_V64_internal_union; \
278  _HEXAGON_V64_internal_union.d = (v); \
279  _HEXAGON_V64_internal_union.ub[1]; \
280  })
281 #define HEXAGON_V64_GET_UB2(v) \
282  __extension__({ \
283  union { \
284  long long d; \
285  unsigned char ub[8]; \
286  } _HEXAGON_V64_internal_union; \
287  _HEXAGON_V64_internal_union.d = (v); \
288  _HEXAGON_V64_internal_union.ub[2]; \
289  })
290 #define HEXAGON_V64_GET_UB3(v) \
291  __extension__({ \
292  union { \
293  long long d; \
294  unsigned char ub[8]; \
295  } _HEXAGON_V64_internal_union; \
296  _HEXAGON_V64_internal_union.d = (v); \
297  _HEXAGON_V64_internal_union.ub[3]; \
298  })
299 #define HEXAGON_V64_GET_UB4(v) \
300  __extension__({ \
301  union { \
302  long long d; \
303  unsigned char ub[8]; \
304  } _HEXAGON_V64_internal_union; \
305  _HEXAGON_V64_internal_union.d = (v); \
306  _HEXAGON_V64_internal_union.ub[4]; \
307  })
308 #define HEXAGON_V64_GET_UB5(v) \
309  __extension__({ \
310  union { \
311  long long d; \
312  unsigned char ub[8]; \
313  } _HEXAGON_V64_internal_union; \
314  _HEXAGON_V64_internal_union.d = (v); \
315  _HEXAGON_V64_internal_union.ub[5]; \
316  })
317 #define HEXAGON_V64_GET_UB6(v) \
318  __extension__({ \
319  union { \
320  long long d; \
321  unsigned char ub[8]; \
322  } _HEXAGON_V64_internal_union; \
323  _HEXAGON_V64_internal_union.d = (v); \
324  _HEXAGON_V64_internal_union.ub[6]; \
325  })
326 #define HEXAGON_V64_GET_UB7(v) \
327  __extension__({ \
328  union { \
329  long long d; \
330  unsigned char ub[8]; \
331  } _HEXAGON_V64_internal_union; \
332  _HEXAGON_V64_internal_union.d = (v); \
333  _HEXAGON_V64_internal_union.ub[7]; \
334  })
335 
336 /* NOTE: All set macros return a HEXAGON_Vect64 type */
337 
338 /* Set doubleword macro */
339 
340 #define HEXAGON_V64_PUT_D(v, new) (new)
341 
342 /* Set word macros */
343 
344 #ifdef __hexagon__
345 
346 #define HEXAGON_V64_PUT_W0(v, new) \
347  __extension__({ \
348  union { \
349  long long d; \
350  int w[2]; \
351  } _HEXAGON_V64_internal_union; \
352  _HEXAGON_V64_internal_union.d = (v); \
353  _HEXAGON_V64_internal_union.w[0] = (new); \
354  _HEXAGON_V64_internal_union.d; \
355  })
356 #define HEXAGON_V64_PUT_W1(v, new) \
357  __extension__({ \
358  union { \
359  long long d; \
360  int w[2]; \
361  } _HEXAGON_V64_internal_union; \
362  _HEXAGON_V64_internal_union.d = (v); \
363  _HEXAGON_V64_internal_union.w[1] = (new); \
364  _HEXAGON_V64_internal_union.d; \
365  })
366 
367 #else /* !__hexagon__ */
368 
369 #define HEXAGON_V64_PUT_W0(v, new) \
370  (((v) & 0xffffffff00000000LL) | ((HEXAGON_Vect64)((unsigned int)(new))))
371 #define HEXAGON_V64_PUT_W1(v, new) \
372  (((v) & 0x00000000ffffffffLL) | (((HEXAGON_Vect64)(new)) << 32LL))
373 
374 #endif /* !__hexagon__ */
375 
376 /* Set half word macros */
377 
378 #ifdef __hexagon__
379 
380 #define HEXAGON_V64_PUT_H0(v, new) \
381  __extension__({ \
382  union { \
383  long long d; \
384  short h[4]; \
385  } _HEXAGON_V64_internal_union; \
386  _HEXAGON_V64_internal_union.d = (v); \
387  _HEXAGON_V64_internal_union.h[0] = (new); \
388  _HEXAGON_V64_internal_union.d; \
389  })
390 #define HEXAGON_V64_PUT_H1(v, new) \
391  __extension__({ \
392  union { \
393  long long d; \
394  short h[4]; \
395  } _HEXAGON_V64_internal_union; \
396  _HEXAGON_V64_internal_union.d = (v); \
397  _HEXAGON_V64_internal_union.h[1] = (new); \
398  _HEXAGON_V64_internal_union.d; \
399  })
400 #define HEXAGON_V64_PUT_H2(v, new) \
401  __extension__({ \
402  union { \
403  long long d; \
404  short h[4]; \
405  } _HEXAGON_V64_internal_union; \
406  _HEXAGON_V64_internal_union.d = (v); \
407  _HEXAGON_V64_internal_union.h[2] = (new); \
408  _HEXAGON_V64_internal_union.d; \
409  })
410 #define HEXAGON_V64_PUT_H3(v, new) \
411  __extension__({ \
412  union { \
413  long long d; \
414  short h[4]; \
415  } _HEXAGON_V64_internal_union; \
416  _HEXAGON_V64_internal_union.d = (v); \
417  _HEXAGON_V64_internal_union.h[3] = (new); \
418  _HEXAGON_V64_internal_union.d; \
419  })
420 
421 #else /* !__hexagon__ */
422 
423 #define HEXAGON_V64_PUT_H0(v, new) \
424  (((v) & 0xffffffffffff0000LL) | ((HEXAGON_Vect64)((unsigned short)(new))))
425 #define HEXAGON_V64_PUT_H1(v, new) \
426  (((v) & 0xffffffff0000ffffLL) | (((HEXAGON_Vect64)((unsigned short)(new))) << 16LL))
427 #define HEXAGON_V64_PUT_H2(v, new) \
428  (((v) & 0xffff0000ffffffffLL) | (((HEXAGON_Vect64)((unsigned short)(new))) << 32LL))
429 #define HEXAGON_V64_PUT_H3(v, new) \
430  (((v) & 0x0000ffffffffffffLL) | (((HEXAGON_Vect64)(new)) << 48LL))
431 
432 #endif /* !__hexagon__ */
433 
434 /* Set byte macros */
435 
436 #ifdef __hexagon__
437 
438 #define HEXAGON_V64_PUT_B0(v, new) \
439  __extension__({ \
440  union { \
441  long long d; \
442  char b[8]; \
443  } _HEXAGON_V64_internal_union; \
444  _HEXAGON_V64_internal_union.d = (v); \
445  _HEXAGON_V64_internal_union.b[0] = (new); \
446  _HEXAGON_V64_internal_union.d; \
447  })
448 #define HEXAGON_V64_PUT_B1(v, new) \
449  __extension__({ \
450  union { \
451  long long d; \
452  char b[8]; \
453  } _HEXAGON_V64_internal_union; \
454  _HEXAGON_V64_internal_union.d = (v); \
455  _HEXAGON_V64_internal_union.b[1] = (new); \
456  _HEXAGON_V64_internal_union.d; \
457  })
458 #define HEXAGON_V64_PUT_B2(v, new) \
459  __extension__({ \
460  union { \
461  long long d; \
462  char b[8]; \
463  } _HEXAGON_V64_internal_union; \
464  _HEXAGON_V64_internal_union.d = (v); \
465  _HEXAGON_V64_internal_union.b[2] = (new); \
466  _HEXAGON_V64_internal_union.d; \
467  })
468 #define HEXAGON_V64_PUT_B3(v, new) \
469  __extension__({ \
470  union { \
471  long long d; \
472  char b[8]; \
473  } _HEXAGON_V64_internal_union; \
474  _HEXAGON_V64_internal_union.d = (v); \
475  _HEXAGON_V64_internal_union.b[3] = (new); \
476  _HEXAGON_V64_internal_union.d; \
477  })
478 #define HEXAGON_V64_PUT_B4(v, new) \
479  __extension__({ \
480  union { \
481  long long d; \
482  char b[8]; \
483  } _HEXAGON_V64_internal_union; \
484  _HEXAGON_V64_internal_union.d = (v); \
485  _HEXAGON_V64_internal_union.b[4] = (new); \
486  _HEXAGON_V64_internal_union.d; \
487  })
488 #define HEXAGON_V64_PUT_B5(v, new) \
489  __extension__({ \
490  union { \
491  long long d; \
492  char b[8]; \
493  } _HEXAGON_V64_internal_union; \
494  _HEXAGON_V64_internal_union.d = (v); \
495  _HEXAGON_V64_internal_union.b[5] = (new); \
496  _HEXAGON_V64_internal_union.d; \
497  })
498 #define HEXAGON_V64_PUT_B6(v, new) \
499  __extension__({ \
500  union { \
501  long long d; \
502  char b[8]; \
503  } _HEXAGON_V64_internal_union; \
504  _HEXAGON_V64_internal_union.d = (v); \
505  _HEXAGON_V64_internal_union.b[6] = (new); \
506  _HEXAGON_V64_internal_union.d; \
507  })
508 #define HEXAGON_V64_PUT_B7(v, new) \
509  __extension__({ \
510  union { \
511  long long d; \
512  char b[8]; \
513  } _HEXAGON_V64_internal_union; \
514  _HEXAGON_V64_internal_union.d = (v); \
515  _HEXAGON_V64_internal_union.b[7] = (new); \
516  _HEXAGON_V64_internal_union.d; \
517  })
518 
519 #else /* !__hexagon__ */
520 
521 #define HEXAGON_V64_PUT_B0(v, new) \
522  (((v) & 0xffffffffffffff00LL) | ((HEXAGON_Vect64)((unsigned char)(new))))
523 #define HEXAGON_V64_PUT_B1(v, new) \
524  (((v) & 0xffffffffffff00ffLL) | (((HEXAGON_Vect64)((unsigned char)(new))) << 8LL))
525 #define HEXAGON_V64_PUT_B2(v, new) \
526  (((v) & 0xffffffffff00ffffLL) | (((HEXAGON_Vect64)((unsigned char)(new))) << 16LL))
527 #define HEXAGON_V64_PUT_B3(v, new) \
528  (((v) & 0xffffffff00ffffffLL) | (((HEXAGON_Vect64)((unsigned char)(new))) << 24LL))
529 #define HEXAGON_V64_PUT_B4(v, new) \
530  (((v) & 0xffffff00ffffffffLL) | (((HEXAGON_Vect64)((unsigned char)(new))) << 32LL))
531 #define HEXAGON_V64_PUT_B5(v, new) \
532  (((v) & 0xffff00ffffffffffLL) | (((HEXAGON_Vect64)((unsigned char)(new))) << 40LL))
533 #define HEXAGON_V64_PUT_B6(v, new) \
534  (((v) & 0xff00ffffffffffffLL) | (((HEXAGON_Vect64)((unsigned char)(new))) << 48LL))
535 #define HEXAGON_V64_PUT_B7(v, new) \
536  (((v) & 0x00ffffffffffffffLL) | (((HEXAGON_Vect64)(new)) << 56LL))
537 
538 #endif /* !__hexagon__ */
539 
540 /* NOTE: All create macros return a HEXAGON_Vect64 type */
541 
542 /* Create from a doubleword */
543 
544 #define HEXAGON_V64_CREATE_D(d) (d)
545 
546 /* Create from words */
547 
548 #ifdef __hexagon__
549 
550 #define HEXAGON_V64_CREATE_W(w1, w0) \
551  __extension__({ \
552  union { \
553  long long d; \
554  int w[2]; \
555  } _HEXAGON_V64_internal_union; \
556  _HEXAGON_V64_internal_union.w[0] = (w0); \
557  _HEXAGON_V64_internal_union.w[1] = (w1); \
558  _HEXAGON_V64_internal_union.d; \
559  })
560 
561 #else /* !__hexagon__ */
562 
563 #define HEXAGON_V64_CREATE_W(w1, w0) \
564  ((((HEXAGON_Vect64)(w1)) << 32LL) | ((HEXAGON_Vect64)((w0) & 0xffffffff)))
565 
566 #endif /* !__hexagon__ */
567 
568 /* Create from half words */
569 
570 #ifdef __hexagon__
571 
572 #define HEXAGON_V64_CREATE_H(h3, h2, h1, h0) \
573  __extension__({ \
574  union { \
575  long long d; \
576  short h[4]; \
577  } _HEXAGON_V64_internal_union; \
578  _HEXAGON_V64_internal_union.h[0] = (h0); \
579  _HEXAGON_V64_internal_union.h[1] = (h1); \
580  _HEXAGON_V64_internal_union.h[2] = (h2); \
581  _HEXAGON_V64_internal_union.h[3] = (h3); \
582  _HEXAGON_V64_internal_union.d; \
583  })
584 
585 #else /* !__hexagon__ */
586 
587 #define HEXAGON_V64_CREATE_H(h3, h2, h1, h0) \
588  ((((HEXAGON_Vect64)(h3)) << 48LL) | (((HEXAGON_Vect64)((h2) & 0xffff)) << 32LL) | \
589  (((HEXAGON_Vect64)((h1) & 0xffff)) << 16LL) | ((HEXAGON_Vect64)((h0) & 0xffff)))
590 
591 #endif /* !__hexagon__ */
592 
593 /* Create from bytes */
594 
595 #ifdef __hexagon__
596 
597 #define HEXAGON_V64_CREATE_B(b7, b6, b5, b4, b3, b2, b1, b0) \
598  __extension__({ \
599  union { \
600  long long d; \
601  char b[8]; \
602  } _HEXAGON_V64_internal_union; \
603  _HEXAGON_V64_internal_union.b[0] = (b0); \
604  _HEXAGON_V64_internal_union.b[1] = (b1); \
605  _HEXAGON_V64_internal_union.b[2] = (b2); \
606  _HEXAGON_V64_internal_union.b[3] = (b3); \
607  _HEXAGON_V64_internal_union.b[4] = (b4); \
608  _HEXAGON_V64_internal_union.b[5] = (b5); \
609  _HEXAGON_V64_internal_union.b[6] = (b6); \
610  _HEXAGON_V64_internal_union.b[7] = (b7); \
611  _HEXAGON_V64_internal_union.d; \
612  })
613 
614 #else /* !__hexagon__ */
615 
616 #define HEXAGON_V64_CREATE_B(b7, b6, b5, b4, b3, b2, b1, b0) \
617  ((((HEXAGON_Vect64)(b7)) << 56LL) | (((HEXAGON_Vect64)((b6) & 0xff)) << 48LL) | \
618  (((HEXAGON_Vect64)((b5) & 0xff)) << 40LL) | (((HEXAGON_Vect64)((b4) & 0xff)) << 32LL) | \
619  (((HEXAGON_Vect64)((b3) & 0xff)) << 24LL) | (((HEXAGON_Vect64)((b2) & 0xff)) << 16LL) | \
620  (((HEXAGON_Vect64)((b1) & 0xff)) << 8LL) | ((HEXAGON_Vect64)((b0) & 0xff)))
621 
622 #endif /* !__hexagon__ */
623 
624 #ifdef __cplusplus
625 
626 class HEXAGON_Vect64C {
627 public:
628  // Constructors
629  HEXAGON_Vect64C(long long d = 0) : data(d) {};
630  HEXAGON_Vect64C(int w1, int w0) : data(HEXAGON_V64_CREATE_W(w1, w0)) {};
631  HEXAGON_Vect64C(short h3, short h2, short h1, short h0)
632  : data(HEXAGON_V64_CREATE_H(h3, h2, h1, h0)) {};
633  HEXAGON_Vect64C(signed char b7, signed char b6, signed char b5, signed char b4,
634  signed char b3, signed char b2, signed char b1, signed char b0)
635  : data(HEXAGON_V64_CREATE_B(b7, b6, b5, b4, b3, b2, b1, b0)) {};
636  HEXAGON_Vect64C(const HEXAGON_Vect64C &v) : data(v.data) {};
637 
638  HEXAGON_Vect64C &operator=(const HEXAGON_Vect64C &v) {
639  data = v.data;
640  return *this;
641  };
642 
643  operator long long() {
644  return data;
645  };
646 
647  // Extract doubleword methods
648  long long D(void) {
649  return HEXAGON_V64_GET_D(data);
650  };
651  unsigned long long UD(void) {
652  return HEXAGON_V64_GET_UD(data);
653  };
654 
655  // Extract word methods
656  int W0(void) {
657  return HEXAGON_V64_GET_W0(data);
658  };
659  int W1(void) {
660  return HEXAGON_V64_GET_W1(data);
661  };
662  unsigned int UW0(void) {
663  return HEXAGON_V64_GET_UW0(data);
664  };
665  unsigned int UW1(void) {
666  return HEXAGON_V64_GET_UW1(data);
667  };
668 
669  // Extract half word methods
670  short H0(void) {
671  return HEXAGON_V64_GET_H0(data);
672  };
673  short H1(void) {
674  return HEXAGON_V64_GET_H1(data);
675  };
676  short H2(void) {
677  return HEXAGON_V64_GET_H2(data);
678  };
679  short H3(void) {
680  return HEXAGON_V64_GET_H3(data);
681  };
682  unsigned short UH0(void) {
683  return HEXAGON_V64_GET_UH0(data);
684  };
685  unsigned short UH1(void) {
686  return HEXAGON_V64_GET_UH1(data);
687  };
688  unsigned short UH2(void) {
689  return HEXAGON_V64_GET_UH2(data);
690  };
691  unsigned short UH3(void) {
692  return HEXAGON_V64_GET_UH3(data);
693  };
694 
695  // Extract byte methods
696  signed char B0(void) {
697  return HEXAGON_V64_GET_B0(data);
698  };
699  signed char B1(void) {
700  return HEXAGON_V64_GET_B1(data);
701  };
702  signed char B2(void) {
703  return HEXAGON_V64_GET_B2(data);
704  };
705  signed char B3(void) {
706  return HEXAGON_V64_GET_B3(data);
707  };
708  signed char B4(void) {
709  return HEXAGON_V64_GET_B4(data);
710  };
711  signed char B5(void) {
712  return HEXAGON_V64_GET_B5(data);
713  };
714  signed char B6(void) {
715  return HEXAGON_V64_GET_B6(data);
716  };
717  signed char B7(void) {
718  return HEXAGON_V64_GET_B7(data);
719  };
720  unsigned char UB0(void) {
721  return HEXAGON_V64_GET_UB0(data);
722  };
723  unsigned char UB1(void) {
724  return HEXAGON_V64_GET_UB1(data);
725  };
726  unsigned char UB2(void) {
727  return HEXAGON_V64_GET_UB2(data);
728  };
729  unsigned char UB3(void) {
730  return HEXAGON_V64_GET_UB3(data);
731  };
732  unsigned char UB4(void) {
733  return HEXAGON_V64_GET_UB4(data);
734  };
735  unsigned char UB5(void) {
736  return HEXAGON_V64_GET_UB5(data);
737  };
738  unsigned char UB6(void) {
739  return HEXAGON_V64_GET_UB6(data);
740  };
741  unsigned char UB7(void) {
742  return HEXAGON_V64_GET_UB7(data);
743  };
744 
745  // NOTE: All set methods return a HEXAGON_Vect64C type
746 
747  // Set doubleword method
748  HEXAGON_Vect64C D(long long d) {
749  return HEXAGON_Vect64C(HEXAGON_V64_PUT_D(data, d));
750  };
751 
752  // Set word methods
753  HEXAGON_Vect64C W0(int w) {
754  return HEXAGON_Vect64C(HEXAGON_V64_PUT_W0(data, w));
755  };
756  HEXAGON_Vect64C W1(int w) {
757  return HEXAGON_Vect64C(HEXAGON_V64_PUT_W1(data, w));
758  };
759 
760  // Set half word methods
761  HEXAGON_Vect64C H0(short h) {
762  return HEXAGON_Vect64C(HEXAGON_V64_PUT_H0(data, h));
763  };
764  HEXAGON_Vect64C H1(short h) {
765  return HEXAGON_Vect64C(HEXAGON_V64_PUT_H1(data, h));
766  };
767  HEXAGON_Vect64C H2(short h) {
768  return HEXAGON_Vect64C(HEXAGON_V64_PUT_H2(data, h));
769  };
770  HEXAGON_Vect64C H3(short h) {
771  return HEXAGON_Vect64C(HEXAGON_V64_PUT_H3(data, h));
772  };
773 
774  // Set byte methods
775  HEXAGON_Vect64C B0(signed char b) {
776  return HEXAGON_Vect64C(HEXAGON_V64_PUT_B0(data, b));
777  };
778  HEXAGON_Vect64C B1(signed char b) {
779  return HEXAGON_Vect64C(HEXAGON_V64_PUT_B1(data, b));
780  };
781  HEXAGON_Vect64C B2(signed char b) {
782  return HEXAGON_Vect64C(HEXAGON_V64_PUT_B2(data, b));
783  };
784  HEXAGON_Vect64C B3(signed char b) {
785  return HEXAGON_Vect64C(HEXAGON_V64_PUT_B3(data, b));
786  };
787  HEXAGON_Vect64C B4(signed char b) {
788  return HEXAGON_Vect64C(HEXAGON_V64_PUT_B4(data, b));
789  };
790  HEXAGON_Vect64C B5(signed char b) {
791  return HEXAGON_Vect64C(HEXAGON_V64_PUT_B5(data, b));
792  };
793  HEXAGON_Vect64C B6(signed char b) {
794  return HEXAGON_Vect64C(HEXAGON_V64_PUT_B6(data, b));
795  };
796  HEXAGON_Vect64C B7(signed char b) {
797  return HEXAGON_Vect64C(HEXAGON_V64_PUT_B7(data, b));
798  };
799 
800 private:
801  long long data;
802 };
803 
804 #endif /* __cplusplus */
805 
806 /* 32 Bit Vectors */
807 
808 typedef int HEXAGON_Vect32;
809 
810 /* Extract word macros */
811 
812 #define HEXAGON_V32_GET_W(v) (v)
813 #define HEXAGON_V32_GET_UW(v) ((unsigned int)(v))
814 
815 /* Extract half word macros */
816 
817 #define HEXAGON_V32_GET_H0(v) \
818  __extension__({ \
819  union { \
820  int w; \
821  short h[2]; \
822  } _HEXAGON_V32_internal_union; \
823  _HEXAGON_V32_internal_union.w = (v); \
824  _HEXAGON_V32_internal_union.h[0]; \
825  })
826 #define HEXAGON_V32_GET_H1(v) \
827  __extension__({ \
828  union { \
829  int w; \
830  short h[2]; \
831  } _HEXAGON_V32_internal_union; \
832  _HEXAGON_V32_internal_union.w = (v); \
833  _HEXAGON_V32_internal_union.h[1]; \
834  })
835 #define HEXAGON_V32_GET_UH0(v) \
836  __extension__({ \
837  union { \
838  int w; \
839  unsigned short uh[2]; \
840  } _HEXAGON_V32_internal_union; \
841  _HEXAGON_V32_internal_union.w = (v); \
842  _HEXAGON_V32_internal_union.uh[0]; \
843  })
844 #define HEXAGON_V32_GET_UH1(v) \
845  __extension__({ \
846  union { \
847  int w; \
848  unsigned short uh[2]; \
849  } _HEXAGON_V32_internal_union; \
850  _HEXAGON_V32_internal_union.w = (v); \
851  _HEXAGON_V32_internal_union.uh[1]; \
852  })
853 
854 /* Extract byte macros */
855 
856 #define HEXAGON_V32_GET_B0(v) \
857  __extension__({ \
858  union { \
859  int w; \
860  signed char b[4]; \
861  } _HEXAGON_V32_internal_union; \
862  _HEXAGON_V32_internal_union.w = (v); \
863  _HEXAGON_V32_internal_union.b[0]; \
864  })
865 #define HEXAGON_V32_GET_B1(v) \
866  __extension__({ \
867  union { \
868  int w; \
869  signed char b[4]; \
870  } _HEXAGON_V32_internal_union; \
871  _HEXAGON_V32_internal_union.w = (v); \
872  _HEXAGON_V32_internal_union.b[1]; \
873  })
874 #define HEXAGON_V32_GET_B2(v) \
875  __extension__({ \
876  union { \
877  int w; \
878  signed char b[4]; \
879  } _HEXAGON_V32_internal_union; \
880  _HEXAGON_V32_internal_union.w = (v); \
881  _HEXAGON_V32_internal_union.b[2]; \
882  })
883 #define HEXAGON_V32_GET_B3(v) \
884  __extension__({ \
885  union { \
886  int w; \
887  signed char b[4]; \
888  } _HEXAGON_V32_internal_union; \
889  _HEXAGON_V32_internal_union.w = (v); \
890  _HEXAGON_V32_internal_union.b[3]; \
891  })
892 #define HEXAGON_V32_GET_UB0(v) \
893  __extension__({ \
894  union { \
895  int w; \
896  unsigned char ub[4]; \
897  } _HEXAGON_V32_internal_union; \
898  _HEXAGON_V32_internal_union.w = (v); \
899  _HEXAGON_V32_internal_union.ub[0]; \
900  })
901 #define HEXAGON_V32_GET_UB1(v) \
902  __extension__({ \
903  union { \
904  int w; \
905  unsigned char ub[4]; \
906  } _HEXAGON_V32_internal_union; \
907  _HEXAGON_V32_internal_union.w = (v); \
908  _HEXAGON_V32_internal_union.ub[1]; \
909  })
910 #define HEXAGON_V32_GET_UB2(v) \
911  __extension__({ \
912  union { \
913  int w; \
914  unsigned char ub[4]; \
915  } _HEXAGON_V32_internal_union; \
916  _HEXAGON_V32_internal_union.w = (v); \
917  _HEXAGON_V32_internal_union.ub[2]; \
918  })
919 #define HEXAGON_V32_GET_UB3(v) \
920  __extension__({ \
921  union { \
922  int w; \
923  unsigned char ub[4]; \
924  } _HEXAGON_V32_internal_union; \
925  _HEXAGON_V32_internal_union.w = (v); \
926  _HEXAGON_V32_internal_union.ub[3]; \
927  })
928 
929 /* NOTE: All set macros return a HEXAGON_Vect32 type */
930 
931 /* Set word macro */
932 
933 #define HEXAGON_V32_PUT_W(v, new) (new)
934 
935 /* Set half word macros */
936 
937 #ifdef __hexagon__
938 
939 #define HEXAGON_V32_PUT_H0(v, new) \
940  __extension__({ \
941  union { \
942  int w; \
943  short h[2]; \
944  } _HEXAGON_V32_internal_union; \
945  _HEXAGON_V32_internal_union.w = (v); \
946  _HEXAGON_V32_internal_union.h[0] = (new); \
947  _HEXAGON_V32_internal_union.w; \
948  })
949 #define HEXAGON_V32_PUT_H1(v, new) \
950  __extension__({ \
951  union { \
952  int w; \
953  short h[2]; \
954  } _HEXAGON_V32_internal_union; \
955  _HEXAGON_V32_internal_union.w = (v); \
956  _HEXAGON_V32_internal_union.h[1] = (new); \
957  _HEXAGON_V32_internal_union.w; \
958  })
959 
960 #else /* !__hexagon__ */
961 
962 #define HEXAGON_V32_PUT_H0(v, new) \
963  (((v) & 0xffff0000) | ((HEXAGON_Vect32)((unsigned short)(new))))
964 #define HEXAGON_V32_PUT_H1(v, new) (((v) & 0x0000ffff) | (((HEXAGON_Vect32)(new)) << 16))
965 
966 #endif /* !__hexagon__ */
967 
968 /* Set byte macros */
969 
970 #ifdef __hexagon__
971 
972 #define HEXAGON_V32_PUT_B0(v, new) \
973  __extension__({ \
974  union { \
975  int w; \
976  char b[4]; \
977  } _HEXAGON_V32_internal_union; \
978  _HEXAGON_V32_internal_union.w = (v); \
979  _HEXAGON_V32_internal_union.b[0] = (new); \
980  _HEXAGON_V32_internal_union.w; \
981  })
982 #define HEXAGON_V32_PUT_B1(v, new) \
983  __extension__({ \
984  union { \
985  int w; \
986  char b[4]; \
987  } _HEXAGON_V32_internal_union; \
988  _HEXAGON_V32_internal_union.w = (v); \
989  _HEXAGON_V32_internal_union.b[1] = (new); \
990  _HEXAGON_V32_internal_union.w; \
991  })
992 #define HEXAGON_V32_PUT_B2(v, new) \
993  __extension__({ \
994  union { \
995  int w; \
996  char b[4]; \
997  } _HEXAGON_V32_internal_union; \
998  _HEXAGON_V32_internal_union.w = (v); \
999  _HEXAGON_V32_internal_union.b[2] = (new); \
1000  _HEXAGON_V32_internal_union.w; \
1001  })
1002 #define HEXAGON_V32_PUT_B3(v, new) \
1003  __extension__({ \
1004  union { \
1005  int w; \
1006  char b[4]; \
1007  } _HEXAGON_V32_internal_union; \
1008  _HEXAGON_V32_internal_union.w = (v); \
1009  _HEXAGON_V32_internal_union.b[3] = (new); \
1010  _HEXAGON_V32_internal_union.w; \
1011  })
1012 
1013 #else /* !__hexagon__ */
1014 
1015 #define HEXAGON_V32_PUT_B0(v, new) \
1016  (((v) & 0xffffff00) | ((HEXAGON_Vect32)((unsigned char)(new))))
1017 #define HEXAGON_V32_PUT_B1(v, new) \
1018  (((v) & 0xffff00ff) | (((HEXAGON_Vect32)((unsigned char)(new))) << 8))
1019 #define HEXAGON_V32_PUT_B2(v, new) \
1020  (((v) & 0xff00ffff) | (((HEXAGON_Vect32)((unsigned char)(new))) << 16))
1021 #define HEXAGON_V32_PUT_B3(v, new) (((v) & 0x00ffffff) | (((HEXAGON_Vect32)(new)) << 24))
1022 
1023 #endif /* !__hexagon__ */
1024 
1025 /* NOTE: All create macros return a HEXAGON_Vect32 type */
1026 
1027 /* Create from a word */
1028 
1029 #define HEXAGON_V32_CREATE_W(w) (w)
1030 
1031 /* Create from half words */
1032 
1033 #ifdef __hexagon__
1034 
1035 #define HEXAGON_V32_CREATE_H(h1, h0) \
1036  __extension__({ \
1037  union { \
1038  long long d; \
1039  short h[2]; \
1040  } _HEXAGON_V32_internal_union; \
1041  _HEXAGON_V32_internal_union.h[0] = (h0); \
1042  _HEXAGON_V32_internal_union.h[1] = (h1); \
1043  _HEXAGON_V32_internal_union.d; \
1044  })
1045 
1046 #else /* !__hexagon__ */
1047 
1048 #define HEXAGON_V32_CREATE_H(h1, h0) \
1049  ((((HEXAGON_Vect32)(h1)) << 16) | ((HEXAGON_Vect32)((h0) & 0xffff)))
1050 
1051 #endif /* !__hexagon__ */
1052 
1053 /* Create from bytes */
1054 #ifdef __hexagon__
1055 
1056 #define HEXAGON_V32_CREATE_B(b3, b2, b1, b0) \
1057  __extension__({ \
1058  union { \
1059  long long d; \
1060  char b[4]; \
1061  } _HEXAGON_V32_internal_union; \
1062  _HEXAGON_V32_internal_union.b[0] = (b0); \
1063  _HEXAGON_V32_internal_union.b[1] = (b1); \
1064  _HEXAGON_V32_internal_union.b[2] = (b2); \
1065  _HEXAGON_V32_internal_union.b[3] = (b3); \
1066  _HEXAGON_V32_internal_union.d; \
1067  })
1068 
1069 #else /* !__hexagon__ */
1070 
1071 #define HEXAGON_V32_CREATE_B(b3, b2, b1, b0) \
1072  ((((HEXAGON_Vect32)(b3)) << 24) | (((HEXAGON_Vect32)((b2) & 0xff)) << 16) | \
1073  (((HEXAGON_Vect32)((b1) & 0xff)) << 8) | ((HEXAGON_Vect32)((b0) & 0xff)))
1074 
1075 #endif /* !__hexagon__ */
1076 
1077 #ifdef __cplusplus
1078 
1079 class HEXAGON_Vect32C {
1080 public:
1081  // Constructors
1082  HEXAGON_Vect32C(int w = 0) : data(w) {};
1083  HEXAGON_Vect32C(short h1, short h0) : data(HEXAGON_V32_CREATE_H(h1, h0)) {};
1084  HEXAGON_Vect32C(signed char b3, signed char b2, signed char b1, signed char b0)
1085  : data(HEXAGON_V32_CREATE_B(b3, b2, b1, b0)) {};
1086  HEXAGON_Vect32C(const HEXAGON_Vect32C &v) : data(v.data) {};
1087 
1088  HEXAGON_Vect32C &operator=(const HEXAGON_Vect32C &v) {
1089  data = v.data;
1090  return *this;
1091  };
1092 
1093  operator int() {
1094  return data;
1095  };
1096 
1097  // Extract word methods
1098  int W(void) {
1099  return HEXAGON_V32_GET_W(data);
1100  };
1101  unsigned int UW(void) {
1102  return HEXAGON_V32_GET_UW(data);
1103  };
1104 
1105  // Extract half word methods
1106  short H0(void) {
1107  return HEXAGON_V32_GET_H0(data);
1108  };
1109  short H1(void) {
1110  return HEXAGON_V32_GET_H1(data);
1111  };
1112  unsigned short UH0(void) {
1113  return HEXAGON_V32_GET_UH0(data);
1114  };
1115  unsigned short UH1(void) {
1116  return HEXAGON_V32_GET_UH1(data);
1117  };
1118 
1119  // Extract byte methods
1120  signed char B0(void) {
1121  return HEXAGON_V32_GET_B0(data);
1122  };
1123  signed char B1(void) {
1124  return HEXAGON_V32_GET_B1(data);
1125  };
1126  signed char B2(void) {
1127  return HEXAGON_V32_GET_B2(data);
1128  };
1129  signed char B3(void) {
1130  return HEXAGON_V32_GET_B3(data);
1131  };
1132  unsigned char UB0(void) {
1133  return HEXAGON_V32_GET_UB0(data);
1134  };
1135  unsigned char UB1(void) {
1136  return HEXAGON_V32_GET_UB1(data);
1137  };
1138  unsigned char UB2(void) {
1139  return HEXAGON_V32_GET_UB2(data);
1140  };
1141  unsigned char UB3(void) {
1142  return HEXAGON_V32_GET_UB3(data);
1143  };
1144 
1145  // NOTE: All set methods return a HEXAGON_Vect32C type
1146 
1147  // Set word method
1148  HEXAGON_Vect32C W(int w) {
1149  return HEXAGON_Vect32C(HEXAGON_V32_PUT_W(data, w));
1150  };
1151 
1152  // Set half word methods
1153  HEXAGON_Vect32C H0(short h) {
1154  return HEXAGON_Vect32C(HEXAGON_V32_PUT_H0(data, h));
1155  };
1156  HEXAGON_Vect32C H1(short h) {
1157  return HEXAGON_Vect32C(HEXAGON_V32_PUT_H1(data, h));
1158  };
1159 
1160  // Set byte methods
1161  HEXAGON_Vect32C B0(signed char b) {
1162  return HEXAGON_Vect32C(HEXAGON_V32_PUT_B0(data, b));
1163  };
1164  HEXAGON_Vect32C B1(signed char b) {
1165  return HEXAGON_Vect32C(HEXAGON_V32_PUT_B1(data, b));
1166  };
1167  HEXAGON_Vect32C B2(signed char b) {
1168  return HEXAGON_Vect32C(HEXAGON_V32_PUT_B2(data, b));
1169  };
1170  HEXAGON_Vect32C B3(signed char b) {
1171  return HEXAGON_Vect32C(HEXAGON_V32_PUT_B3(data, b));
1172  };
1173 
1174 private:
1175  int data;
1176 };
1177 
1178 #endif /* __cplusplus */
1179 
1180 // V65 Silver types
1181 #if __Q6S_ARCH__ >= 65
1182  // Silver vector types are 128 bytes, and pairs are 256. The vector predicate
1183  // types are 16 bytes and 32 bytes for pairs.
1184  typedef long HEXAGON_VecPred128 __attribute__((__vector_size__(16)))
1185  __attribute__((aligned(128)));
1186 
1187  typedef long HEXAGON_VecPred256 __attribute__((__vector_size__(32)))
1188  __attribute__((aligned(128)));
1189 
1190  typedef long HEXAGON_Vect1024 __attribute__((__vector_size__(128)))
1191  __attribute__((aligned(128)));
1192 
1193  typedef long HEXAGON_Vect2048 __attribute__((__vector_size__(256)))
1194  __attribute__((aligned(256)));
1195 
1196  typedef long HEXAGON_UVect1024 __attribute__((__vector_size__(128)))
1197  __attribute__((aligned(4)));
1198 
1199  typedef long HEXAGON_UVect2048 __attribute__((__vector_size__(256)))
1200  __attribute__((aligned(4)));
1201 
1202  #define Q6S_VectorPredPair HEXAGON_VecPred256
1203  #define Q6S_VectorPred HEXAGON_VecPred128
1204  #define Q6S_Vector HEXAGON_Vect1024
1205  #define Q6S_VectorPair HEXAGON_Vect2048
1206  #define Q6S_UVector HEXAGON_UVect1024
1207  #define Q6S_UVectorPair HEXAGON_UVect2048
1208 
1209 #else /* __Q6S_ARCH__ >= 65 */
1210 
1211 // V65 Vector types
1212 #if __HVX_ARCH__ >= 65
1213 #if defined __HVX__ && (__HVX_LENGTH__ == 128)
1214  typedef long HEXAGON_VecPred128 __attribute__((__vector_size__(128)))
1215  __attribute__((aligned(128)));
1216 
1217  typedef long HEXAGON_Vect1024 __attribute__((__vector_size__(128)))
1218  __attribute__((aligned(128)));
1219 
1220  typedef long HEXAGON_Vect2048 __attribute__((__vector_size__(256)))
1221  __attribute__((aligned(256)));
1222 
1223  typedef long HEXAGON_UVect1024 __attribute__((__vector_size__(128)))
1224  __attribute__((aligned(4)));
1225 
1226  typedef long HEXAGON_UVect2048 __attribute__((__vector_size__(256)))
1227  __attribute__((aligned(4)));
1228 
1229  #define HVX_VectorPred HEXAGON_VecPred128
1230  #define HVX_Vector HEXAGON_Vect1024
1231  #define HVX_VectorPair HEXAGON_Vect2048
1232  #define HVX_UVector HEXAGON_UVect1024
1233  #define HVX_UVectorPair HEXAGON_UVect2048
1234 #else /* defined __HVX__ && (__HVX_LENGTH__ == 128) */
1235 #if defined __HVX__ && (__HVX_LENGTH__ == 64)
1236  typedef long HEXAGON_VecPred64 __attribute__((__vector_size__(64)))
1237  __attribute__((aligned(64)));
1238 
1239  typedef long HEXAGON_Vect512 __attribute__((__vector_size__(64)))
1240  __attribute__((aligned(64)));
1241 
1242  typedef long HEXAGON_Vect1024 __attribute__((__vector_size__(128)))
1243  __attribute__((aligned(128)));
1244 
1245  typedef long HEXAGON_UVect512 __attribute__((__vector_size__(64)))
1246  __attribute__((aligned(4)));
1247 
1248  typedef long HEXAGON_UVect1024 __attribute__((__vector_size__(128)))
1249  __attribute__((aligned(4)));
1250 
1251  #define HVX_VectorPred HEXAGON_VecPred64
1252  #define HVX_Vector HEXAGON_Vect512
1253  #define HVX_VectorPair HEXAGON_Vect1024
1254  #define HVX_UVector HEXAGON_UVect512
1255  #define HVX_UVectorPair HEXAGON_UVect1024
1256 #endif /* defined __HVX__ && (__HVX_LENGTH__ == 64) */
1257 #endif /* defined __HVX__ && (__HVX_LENGTH__ == 128) */
1258 #endif /* __HVX_ARCH__ >= 65 */
1259 #endif /* __Q6S_ARCH__ >= 65 */
1260 
1261 /* Predicates */
1262 
1263 typedef int HEXAGON_Pred;
1264 
1265 /***
1266  *** backward compatibility aliases
1267  ***/
1268 
1269 /* Old names */
1270 #define Q6Vect Q6Vect64
1271 #define Q6V_GET_D Q6V64_GET_D
1272 #define Q6V_GET_UD Q6V64_GET_UD
1273 #define Q6V_GET_W0 Q6V64_GET_W0
1274 #define Q6V_GET_W1 Q6V64_GET_W1
1275 #define Q6V_GET_UW0 Q6V64_GET_UW0
1276 #define Q6V_GET_UW1 Q6V64_GET_UW1
1277 #define Q6V_GET_H0 Q6V64_GET_H0
1278 #define Q6V_GET_H1 Q6V64_GET_H1
1279 #define Q6V_GET_H2 Q6V64_GET_H2
1280 #define Q6V_GET_H3 Q6V64_GET_H3
1281 #define Q6V_GET_UH0 Q6V64_GET_UH0
1282 #define Q6V_GET_UH1 Q6V64_GET_UH1
1283 #define Q6V_GET_UH2 Q6V64_GET_UH2
1284 #define Q6V_GET_UH3 Q6V64_GET_UH3
1285 #define Q6V_GET_B0 Q6V64_GET_B0
1286 #define Q6V_GET_B1 Q6V64_GET_B1
1287 #define Q6V_GET_B2 Q6V64_GET_B2
1288 #define Q6V_GET_B3 Q6V64_GET_B3
1289 #define Q6V_GET_B4 Q6V64_GET_B4
1290 #define Q6V_GET_B5 Q6V64_GET_B5
1291 #define Q6V_GET_B6 Q6V64_GET_B6
1292 #define Q6V_GET_B7 Q6V64_GET_B7
1293 #define Q6V_GET_UB0 Q6V64_GET_UB0
1294 #define Q6V_GET_UB1 Q6V64_GET_UB1
1295 #define Q6V_GET_UB2 Q6V64_GET_UB2
1296 #define Q6V_GET_UB3 Q6V64_GET_UB3
1297 #define Q6V_GET_UB4 Q6V64_GET_UB4
1298 #define Q6V_GET_UB5 Q6V64_GET_UB5
1299 #define Q6V_GET_UB6 Q6V64_GET_UB6
1300 #define Q6V_GET_UB7 Q6V64_GET_UB7
1301 #define Q6V_PUT_D Q6V64_PUT_D
1302 #define Q6V_PUT_W0 Q6V64_PUT_W0
1303 #define Q6V_PUT_W1 Q6V64_PUT_W1
1304 #define Q6V_PUT_H0 Q6V64_PUT_H0
1305 #define Q6V_PUT_H1 Q6V64_PUT_H1
1306 #define Q6V_PUT_H2 Q6V64_PUT_H2
1307 #define Q6V_PUT_H3 Q6V64_PUT_H3
1308 #define Q6V_PUT_B0 Q6V64_PUT_B0
1309 #define Q6V_PUT_B1 Q6V64_PUT_B1
1310 #define Q6V_PUT_B2 Q6V64_PUT_B2
1311 #define Q6V_PUT_B3 Q6V64_PUT_B3
1312 #define Q6V_PUT_B4 Q6V64_PUT_B4
1313 #define Q6V_PUT_B5 Q6V64_PUT_B5
1314 #define Q6V_PUT_B6 Q6V64_PUT_B6
1315 #define Q6V_PUT_B7 Q6V64_PUT_B7
1316 #define Q6V_CREATE_D Q6V64_CREATE_D
1317 #define Q6V_CREATE_W Q6V64_CREATE_W
1318 #define Q6V_CREATE_H Q6V64_CREATE_H
1319 #define Q6V_CREATE_B Q6V64_CREATE_B
1320 
1321 #ifdef __cplusplus
1322 #define Q6VectC Q6Vect64C
1323 #endif /* __cplusplus */
1324 
1325 /* 64 Bit Vectors */
1326 
1327 typedef long long __attribute__((__may_alias__)) Q6Vect64;
1328 
1329 /* Extract doubleword macros */
1330 
1331 #define Q6V64_GET_D(v) (v)
1332 #define Q6V64_GET_UD(v) ((unsigned long long)(v))
1333 
1334 /* Extract word macros */
1335 
1336 #define Q6V64_GET_W0(v) \
1337  __extension__({ \
1338  union { \
1339  long long d; \
1340  int w[2]; \
1341  } _Q6V64_internal_union; \
1342  _Q6V64_internal_union.d = (v); \
1343  _Q6V64_internal_union.w[0]; \
1344  })
1345 #define Q6V64_GET_W1(v) \
1346  __extension__({ \
1347  union { \
1348  long long d; \
1349  int w[2]; \
1350  } _Q6V64_internal_union; \
1351  _Q6V64_internal_union.d = (v); \
1352  _Q6V64_internal_union.w[1]; \
1353  })
1354 #define Q6V64_GET_UW0(v) \
1355  __extension__({ \
1356  union { \
1357  long long d; \
1358  unsigned int uw[2]; \
1359  } _Q6V64_internal_union; \
1360  _Q6V64_internal_union.d = (v); \
1361  _Q6V64_internal_union.uw[0]; \
1362  })
1363 #define Q6V64_GET_UW1(v) \
1364  __extension__({ \
1365  union { \
1366  long long d; \
1367  unsigned int uw[2]; \
1368  } _Q6V64_internal_union; \
1369  _Q6V64_internal_union.d = (v); \
1370  _Q6V64_internal_union.uw[1]; \
1371  })
1372 
1373 /* Extract half word macros */
1374 
1375 #define Q6V64_GET_H0(v) \
1376  __extension__({ \
1377  union { \
1378  long long d; \
1379  short h[4]; \
1380  } _Q6V64_internal_union; \
1381  _Q6V64_internal_union.d = (v); \
1382  _Q6V64_internal_union.h[0]; \
1383  })
1384 #define Q6V64_GET_H1(v) \
1385  __extension__({ \
1386  union { \
1387  long long d; \
1388  short h[4]; \
1389  } _Q6V64_internal_union; \
1390  _Q6V64_internal_union.d = (v); \
1391  _Q6V64_internal_union.h[1]; \
1392  })
1393 #define Q6V64_GET_H2(v) \
1394  __extension__({ \
1395  union { \
1396  long long d; \
1397  short h[4]; \
1398  } _Q6V64_internal_union; \
1399  _Q6V64_internal_union.d = (v); \
1400  _Q6V64_internal_union.h[2]; \
1401  })
1402 #define Q6V64_GET_H3(v) \
1403  __extension__({ \
1404  union { \
1405  long long d; \
1406  short h[4]; \
1407  } _Q6V64_internal_union; \
1408  _Q6V64_internal_union.d = (v); \
1409  _Q6V64_internal_union.h[3]; \
1410  })
1411 #define Q6V64_GET_UH0(v) \
1412  __extension__({ \
1413  union { \
1414  long long d; \
1415  unsigned short uh[4]; \
1416  } _Q6V64_internal_union; \
1417  _Q6V64_internal_union.d = (v); \
1418  _Q6V64_internal_union.uh[0]; \
1419  })
1420 #define Q6V64_GET_UH1(v) \
1421  __extension__({ \
1422  union { \
1423  long long d; \
1424  unsigned short uh[4]; \
1425  } _Q6V64_internal_union; \
1426  _Q6V64_internal_union.d = (v); \
1427  _Q6V64_internal_union.uh[1]; \
1428  })
1429 #define Q6V64_GET_UH2(v) \
1430  __extension__({ \
1431  union { \
1432  long long d; \
1433  unsigned short uh[4]; \
1434  } _Q6V64_internal_union; \
1435  _Q6V64_internal_union.d = (v); \
1436  _Q6V64_internal_union.uh[2]; \
1437  })
1438 #define Q6V64_GET_UH3(v) \
1439  __extension__({ \
1440  union { \
1441  long long d; \
1442  unsigned short uh[4]; \
1443  } _Q6V64_internal_union; \
1444  _Q6V64_internal_union.d = (v); \
1445  _Q6V64_internal_union.uh[3]; \
1446  })
1447 
1448 /* Extract byte macros */
1449 
1450 #define Q6V64_GET_B0(v) \
1451  __extension__({ \
1452  union { \
1453  long long d; \
1454  signed char b[8]; \
1455  } _Q6V64_internal_union; \
1456  _Q6V64_internal_union.d = (v); \
1457  _Q6V64_internal_union.b[0]; \
1458  })
1459 #define Q6V64_GET_B1(v) \
1460  __extension__({ \
1461  union { \
1462  long long d; \
1463  signed char b[8]; \
1464  } _Q6V64_internal_union; \
1465  _Q6V64_internal_union.d = (v); \
1466  _Q6V64_internal_union.b[1]; \
1467  })
1468 #define Q6V64_GET_B2(v) \
1469  __extension__({ \
1470  union { \
1471  long long d; \
1472  signed char b[8]; \
1473  } _Q6V64_internal_union; \
1474  _Q6V64_internal_union.d = (v); \
1475  _Q6V64_internal_union.b[2]; \
1476  })
1477 #define Q6V64_GET_B3(v) \
1478  __extension__({ \
1479  union { \
1480  long long d; \
1481  signed char b[8]; \
1482  } _Q6V64_internal_union; \
1483  _Q6V64_internal_union.d = (v); \
1484  _Q6V64_internal_union.b[3]; \
1485  })
1486 #define Q6V64_GET_B4(v) \
1487  __extension__({ \
1488  union { \
1489  long long d; \
1490  signed char b[8]; \
1491  } _Q6V64_internal_union; \
1492  _Q6V64_internal_union.d = (v); \
1493  _Q6V64_internal_union.b[4]; \
1494  })
1495 #define Q6V64_GET_B5(v) \
1496  __extension__({ \
1497  union { \
1498  long long d; \
1499  signed char b[8]; \
1500  } _Q6V64_internal_union; \
1501  _Q6V64_internal_union.d = (v); \
1502  _Q6V64_internal_union.b[5]; \
1503  })
1504 #define Q6V64_GET_B6(v) \
1505  __extension__({ \
1506  union { \
1507  long long d; \
1508  signed char b[8]; \
1509  } _Q6V64_internal_union; \
1510  _Q6V64_internal_union.d = (v); \
1511  _Q6V64_internal_union.b[6]; \
1512  })
1513 #define Q6V64_GET_B7(v) \
1514  __extension__({ \
1515  union { \
1516  long long d; \
1517  signed char b[8]; \
1518  } _Q6V64_internal_union; \
1519  _Q6V64_internal_union.d = (v); \
1520  _Q6V64_internal_union.b[7]; \
1521  })
1522 #define Q6V64_GET_UB0(v) \
1523  __extension__({ \
1524  union { \
1525  long long d; \
1526  unsigned char ub[8]; \
1527  } _Q6V64_internal_union; \
1528  _Q6V64_internal_union.d = (v); \
1529  _Q6V64_internal_union.ub[0]; \
1530  })
1531 #define Q6V64_GET_UB1(v) \
1532  __extension__({ \
1533  union { \
1534  long long d; \
1535  unsigned char ub[8]; \
1536  } _Q6V64_internal_union; \
1537  _Q6V64_internal_union.d = (v); \
1538  _Q6V64_internal_union.ub[1]; \
1539  })
1540 #define Q6V64_GET_UB2(v) \
1541  __extension__({ \
1542  union { \
1543  long long d; \
1544  unsigned char ub[8]; \
1545  } _Q6V64_internal_union; \
1546  _Q6V64_internal_union.d = (v); \
1547  _Q6V64_internal_union.ub[2]; \
1548  })
1549 #define Q6V64_GET_UB3(v) \
1550  __extension__({ \
1551  union { \
1552  long long d; \
1553  unsigned char ub[8]; \
1554  } _Q6V64_internal_union; \
1555  _Q6V64_internal_union.d = (v); \
1556  _Q6V64_internal_union.ub[3]; \
1557  })
1558 #define Q6V64_GET_UB4(v) \
1559  __extension__({ \
1560  union { \
1561  long long d; \
1562  unsigned char ub[8]; \
1563  } _Q6V64_internal_union; \
1564  _Q6V64_internal_union.d = (v); \
1565  _Q6V64_internal_union.ub[4]; \
1566  })
1567 #define Q6V64_GET_UB5(v) \
1568  __extension__({ \
1569  union { \
1570  long long d; \
1571  unsigned char ub[8]; \
1572  } _Q6V64_internal_union; \
1573  _Q6V64_internal_union.d = (v); \
1574  _Q6V64_internal_union.ub[5]; \
1575  })
1576 #define Q6V64_GET_UB6(v) \
1577  __extension__({ \
1578  union { \
1579  long long d; \
1580  unsigned char ub[8]; \
1581  } _Q6V64_internal_union; \
1582  _Q6V64_internal_union.d = (v); \
1583  _Q6V64_internal_union.ub[6]; \
1584  })
1585 #define Q6V64_GET_UB7(v) \
1586  __extension__({ \
1587  union { \
1588  long long d; \
1589  unsigned char ub[8]; \
1590  } _Q6V64_internal_union; \
1591  _Q6V64_internal_union.d = (v); \
1592  _Q6V64_internal_union.ub[7]; \
1593  })
1594 
1595 /* NOTE: All set macros return a Q6Vect64 type */
1596 
1597 /* Set doubleword macro */
1598 
1599 #define Q6V64_PUT_D(v, new) (new)
1600 
1601 /* Set word macros */
1602 
1603 #ifdef __qdsp6__
1604 
1605 #define Q6V64_PUT_W0(v, new) \
1606  __extension__({ \
1607  union { \
1608  long long d; \
1609  int w[2]; \
1610  } _Q6V64_internal_union; \
1611  _Q6V64_internal_union.d = (v); \
1612  _Q6V64_internal_union.w[0] = (new); \
1613  _Q6V64_internal_union.d; \
1614  })
1615 #define Q6V64_PUT_W1(v, new) \
1616  __extension__({ \
1617  union { \
1618  long long d; \
1619  int w[2]; \
1620  } _Q6V64_internal_union; \
1621  _Q6V64_internal_union.d = (v); \
1622  _Q6V64_internal_union.w[1] = (new); \
1623  _Q6V64_internal_union.d; \
1624  })
1625 
1626 #else /* !__qdsp6__ */
1627 
1628 #define Q6V64_PUT_W0(v, new) \
1629  (((v) & 0xffffffff00000000LL) | ((Q6Vect64)((unsigned int)(new))))
1630 #define Q6V64_PUT_W1(v, new) \
1631  (((v) & 0x00000000ffffffffLL) | (((Q6Vect64)(new)) << 32LL))
1632 
1633 #endif /* !__qdsp6__ */
1634 
1635 /* Set half word macros */
1636 
1637 #ifdef __qdsp6__
1638 
1639 #define Q6V64_PUT_H0(v, new) \
1640  __extension__({ \
1641  union { \
1642  long long d; \
1643  short h[4]; \
1644  } _Q6V64_internal_union; \
1645  _Q6V64_internal_union.d = (v); \
1646  _Q6V64_internal_union.h[0] = (new); \
1647  _Q6V64_internal_union.d; \
1648  })
1649 #define Q6V64_PUT_H1(v, new) \
1650  __extension__({ \
1651  union { \
1652  long long d; \
1653  short h[4]; \
1654  } _Q6V64_internal_union; \
1655  _Q6V64_internal_union.d = (v); \
1656  _Q6V64_internal_union.h[1] = (new); \
1657  _Q6V64_internal_union.d; \
1658  })
1659 #define Q6V64_PUT_H2(v, new) \
1660  __extension__({ \
1661  union { \
1662  long long d; \
1663  short h[4]; \
1664  } _Q6V64_internal_union; \
1665  _Q6V64_internal_union.d = (v); \
1666  _Q6V64_internal_union.h[2] = (new); \
1667  _Q6V64_internal_union.d; \
1668  })
1669 #define Q6V64_PUT_H3(v, new) \
1670  __extension__({ \
1671  union { \
1672  long long d; \
1673  short h[4]; \
1674  } _Q6V64_internal_union; \
1675  _Q6V64_internal_union.d = (v); \
1676  _Q6V64_internal_union.h[3] = (new); \
1677  _Q6V64_internal_union.d; \
1678  })
1679 
1680 #else /* !__qdsp6__ */
1681 
1682 #define Q6V64_PUT_H0(v, new) \
1683  (((v) & 0xffffffffffff0000LL) | ((Q6Vect64)((unsigned short)(new))))
1684 #define Q6V64_PUT_H1(v, new) \
1685  (((v) & 0xffffffff0000ffffLL) | (((Q6Vect64)((unsigned short)(new))) << 16LL))
1686 #define Q6V64_PUT_H2(v, new) \
1687  (((v) & 0xffff0000ffffffffLL) | (((Q6Vect64)((unsigned short)(new))) << 32LL))
1688 #define Q6V64_PUT_H3(v, new) \
1689  (((v) & 0x0000ffffffffffffLL) | (((Q6Vect64)(new)) << 48LL))
1690 
1691 #endif /* !__qdsp6__ */
1692 
1693 /* Set byte macros */
1694 
1695 #ifdef __qdsp6__
1696 
1697 #define Q6V64_PUT_B0(v, new) \
1698  __extension__({ \
1699  union { \
1700  long long d; \
1701  char b[8]; \
1702  } _Q6V64_internal_union; \
1703  _Q6V64_internal_union.d = (v); \
1704  _Q6V64_internal_union.b[0] = (new); \
1705  _Q6V64_internal_union.d; \
1706  })
1707 #define Q6V64_PUT_B1(v, new) \
1708  __extension__({ \
1709  union { \
1710  long long d; \
1711  char b[8]; \
1712  } _Q6V64_internal_union; \
1713  _Q6V64_internal_union.d = (v); \
1714  _Q6V64_internal_union.b[1] = (new); \
1715  _Q6V64_internal_union.d; \
1716  })
1717 #define Q6V64_PUT_B2(v, new) \
1718  __extension__({ \
1719  union { \
1720  long long d; \
1721  char b[8]; \
1722  } _Q6V64_internal_union; \
1723  _Q6V64_internal_union.d = (v); \
1724  _Q6V64_internal_union.b[2] = (new); \
1725  _Q6V64_internal_union.d; \
1726  })
1727 #define Q6V64_PUT_B3(v, new) \
1728  __extension__({ \
1729  union { \
1730  long long d; \
1731  char b[8]; \
1732  } _Q6V64_internal_union; \
1733  _Q6V64_internal_union.d = (v); \
1734  _Q6V64_internal_union.b[3] = (new); \
1735  _Q6V64_internal_union.d; \
1736  })
1737 #define Q6V64_PUT_B4(v, new) \
1738  __extension__({ \
1739  union { \
1740  long long d; \
1741  char b[8]; \
1742  } _Q6V64_internal_union; \
1743  _Q6V64_internal_union.d = (v); \
1744  _Q6V64_internal_union.b[4] = (new); \
1745  _Q6V64_internal_union.d; \
1746  })
1747 #define Q6V64_PUT_B5(v, new) \
1748  __extension__({ \
1749  union { \
1750  long long d; \
1751  char b[8]; \
1752  } _Q6V64_internal_union; \
1753  _Q6V64_internal_union.d = (v); \
1754  _Q6V64_internal_union.b[5] = (new); \
1755  _Q6V64_internal_union.d; \
1756  })
1757 #define Q6V64_PUT_B6(v, new) \
1758  __extension__({ \
1759  union { \
1760  long long d; \
1761  char b[8]; \
1762  } _Q6V64_internal_union; \
1763  _Q6V64_internal_union.d = (v); \
1764  _Q6V64_internal_union.b[6] = (new); \
1765  _Q6V64_internal_union.d; \
1766  })
1767 #define Q6V64_PUT_B7(v, new) \
1768  __extension__({ \
1769  union { \
1770  long long d; \
1771  char b[8]; \
1772  } _Q6V64_internal_union; \
1773  _Q6V64_internal_union.d = (v); \
1774  _Q6V64_internal_union.b[7] = (new); \
1775  _Q6V64_internal_union.d; \
1776  })
1777 
1778 #else /* !__qdsp6__ */
1779 
1780 #define Q6V64_PUT_B0(v, new) \
1781  (((v) & 0xffffffffffffff00LL) | ((Q6Vect64)((unsigned char)(new))))
1782 #define Q6V64_PUT_B1(v, new) \
1783  (((v) & 0xffffffffffff00ffLL) | (((Q6Vect64)((unsigned char)(new))) << 8LL))
1784 #define Q6V64_PUT_B2(v, new) \
1785  (((v) & 0xffffffffff00ffffLL) | (((Q6Vect64)((unsigned char)(new))) << 16LL))
1786 #define Q6V64_PUT_B3(v, new) \
1787  (((v) & 0xffffffff00ffffffLL) | (((Q6Vect64)((unsigned char)(new))) << 24LL))
1788 #define Q6V64_PUT_B4(v, new) \
1789  (((v) & 0xffffff00ffffffffLL) | (((Q6Vect64)((unsigned char)(new))) << 32LL))
1790 #define Q6V64_PUT_B5(v, new) \
1791  (((v) & 0xffff00ffffffffffLL) | (((Q6Vect64)((unsigned char)(new))) << 40LL))
1792 #define Q6V64_PUT_B6(v, new) \
1793  (((v) & 0xff00ffffffffffffLL) | (((Q6Vect64)((unsigned char)(new))) << 48LL))
1794 #define Q6V64_PUT_B7(v, new) \
1795  (((v) & 0x00ffffffffffffffLL) | (((Q6Vect64)(new)) << 56LL))
1796 
1797 #endif /* !__qdsp6__ */
1798 
1799 /* NOTE: All create macros return a Q6Vect64 type */
1800 
1801 /* Create from a doubleword */
1802 
1803 #define Q6V64_CREATE_D(d) (d)
1804 
1805 /* Create from words */
1806 
1807 #ifdef __qdsp6__
1808 
1809 #define Q6V64_CREATE_W(w1, w0) \
1810  __extension__({ \
1811  union { \
1812  long long d; \
1813  int w[2]; \
1814  } _Q6V64_internal_union; \
1815  _Q6V64_internal_union.w[0] = (w0); \
1816  _Q6V64_internal_union.w[1] = (w1); \
1817  _Q6V64_internal_union.d; \
1818  })
1819 
1820 #else /* !__qdsp6__ */
1821 
1822 #define Q6V64_CREATE_W(w1, w0) \
1823  ((((Q6Vect64)(w1)) << 32LL) | ((Q6Vect64)((w0) & 0xffffffff)))
1824 
1825 #endif /* !__qdsp6__ */
1826 
1827 /* Create from half words */
1828 
1829 #ifdef __qdsp6__
1830 
1831 #define Q6V64_CREATE_H(h3, h2, h1, h0) \
1832  __extension__({ \
1833  union { \
1834  long long d; \
1835  short h[4]; \
1836  } _Q6V64_internal_union; \
1837  _Q6V64_internal_union.h[0] = (h0); \
1838  _Q6V64_internal_union.h[1] = (h1); \
1839  _Q6V64_internal_union.h[2] = (h2); \
1840  _Q6V64_internal_union.h[3] = (h3); \
1841  _Q6V64_internal_union.d; \
1842  })
1843 
1844 #else /* !__qdsp6__ */
1845 
1846 #define Q6V64_CREATE_H(h3, h2, h1, h0) \
1847  ((((Q6Vect64)(h3)) << 48LL) | (((Q6Vect64)((h2) & 0xffff)) << 32LL) | \
1848  (((Q6Vect64)((h1) & 0xffff)) << 16LL) | ((Q6Vect64)((h0) & 0xffff)))
1849 
1850 #endif /* !__qdsp6__ */
1851 
1852 /* Create from bytes */
1853 
1854 #ifdef __qdsp6__
1855 
1856 #define Q6V64_CREATE_B(b7, b6, b5, b4, b3, b2, b1, b0) \
1857  __extension__({ \
1858  union { \
1859  long long d; \
1860  char b[8]; \
1861  } _Q6V64_internal_union; \
1862  _Q6V64_internal_union.b[0] = (b0); \
1863  _Q6V64_internal_union.b[1] = (b1); \
1864  _Q6V64_internal_union.b[2] = (b2); \
1865  _Q6V64_internal_union.b[3] = (b3); \
1866  _Q6V64_internal_union.b[4] = (b4); \
1867  _Q6V64_internal_union.b[5] = (b5); \
1868  _Q6V64_internal_union.b[6] = (b6); \
1869  _Q6V64_internal_union.b[7] = (b7); \
1870  _Q6V64_internal_union.d; \
1871  })
1872 
1873 #else /* !__qdsp6__ */
1874 
1875 #define Q6V64_CREATE_B(b7, b6, b5, b4, b3, b2, b1, b0) \
1876  ((((Q6Vect64)(b7)) << 56LL) | (((Q6Vect64)((b6) & 0xff)) << 48LL) | \
1877  (((Q6Vect64)((b5) & 0xff)) << 40LL) | (((Q6Vect64)((b4) & 0xff)) << 32LL) | \
1878  (((Q6Vect64)((b3) & 0xff)) << 24LL) | (((Q6Vect64)((b2) & 0xff)) << 16LL) | \
1879  (((Q6Vect64)((b1) & 0xff)) << 8LL) | ((Q6Vect64)((b0) & 0xff)))
1880 
1881 #endif /* !__qdsp6__ */
1882 
1883 #ifdef __cplusplus
1884 
1885 class Q6Vect64C {
1886 public:
1887  // Constructors
1888  Q6Vect64C(long long d = 0) : data(d) {};
1889  Q6Vect64C(int w1, int w0) : data(Q6V64_CREATE_W(w1, w0)) {};
1890  Q6Vect64C(short h3, short h2, short h1, short h0)
1891  : data(Q6V64_CREATE_H(h3, h2, h1, h0)) {};
1892  Q6Vect64C(signed char b7, signed char b6, signed char b5, signed char b4,
1893  signed char b3, signed char b2, signed char b1, signed char b0)
1894  : data(Q6V64_CREATE_B(b7, b6, b5, b4, b3, b2, b1, b0)) {};
1895  Q6Vect64C(const Q6Vect64C &v) : data(v.data) {};
1896 
1897  Q6Vect64C &operator=(const Q6Vect64C &v) {
1898  data = v.data;
1899  return *this;
1900  };
1901 
1902  operator long long() {
1903  return data;
1904  };
1905 
1906  // Extract doubleword methods
1907  long long D(void) {
1908  return Q6V64_GET_D(data);
1909  };
1910  unsigned long long UD(void) {
1911  return Q6V64_GET_UD(data);
1912  };
1913 
1914  // Extract word methods
1915  int W0(void) {
1916  return Q6V64_GET_W0(data);
1917  };
1918  int W1(void) {
1919  return Q6V64_GET_W1(data);
1920  };
1921  unsigned int UW0(void) {
1922  return Q6V64_GET_UW0(data);
1923  };
1924  unsigned int UW1(void) {
1925  return Q6V64_GET_UW1(data);
1926  };
1927 
1928  // Extract half word methods
1929  short H0(void) {
1930  return Q6V64_GET_H0(data);
1931  };
1932  short H1(void) {
1933  return Q6V64_GET_H1(data);
1934  };
1935  short H2(void) {
1936  return Q6V64_GET_H2(data);
1937  };
1938  short H3(void) {
1939  return Q6V64_GET_H3(data);
1940  };
1941  unsigned short UH0(void) {
1942  return Q6V64_GET_UH0(data);
1943  };
1944  unsigned short UH1(void) {
1945  return Q6V64_GET_UH1(data);
1946  };
1947  unsigned short UH2(void) {
1948  return Q6V64_GET_UH2(data);
1949  };
1950  unsigned short UH3(void) {
1951  return Q6V64_GET_UH3(data);
1952  };
1953 
1954  // Extract byte methods
1955  signed char B0(void) {
1956  return Q6V64_GET_B0(data);
1957  };
1958  signed char B1(void) {
1959  return Q6V64_GET_B1(data);
1960  };
1961  signed char B2(void) {
1962  return Q6V64_GET_B2(data);
1963  };
1964  signed char B3(void) {
1965  return Q6V64_GET_B3(data);
1966  };
1967  signed char B4(void) {
1968  return Q6V64_GET_B4(data);
1969  };
1970  signed char B5(void) {
1971  return Q6V64_GET_B5(data);
1972  };
1973  signed char B6(void) {
1974  return Q6V64_GET_B6(data);
1975  };
1976  signed char B7(void) {
1977  return Q6V64_GET_B7(data);
1978  };
1979  unsigned char UB0(void) {
1980  return Q6V64_GET_UB0(data);
1981  };
1982  unsigned char UB1(void) {
1983  return Q6V64_GET_UB1(data);
1984  };
1985  unsigned char UB2(void) {
1986  return Q6V64_GET_UB2(data);
1987  };
1988  unsigned char UB3(void) {
1989  return Q6V64_GET_UB3(data);
1990  };
1991  unsigned char UB4(void) {
1992  return Q6V64_GET_UB4(data);
1993  };
1994  unsigned char UB5(void) {
1995  return Q6V64_GET_UB5(data);
1996  };
1997  unsigned char UB6(void) {
1998  return Q6V64_GET_UB6(data);
1999  };
2000  unsigned char UB7(void) {
2001  return Q6V64_GET_UB7(data);
2002  };
2003 
2004  // NOTE: All set methods return a Q6Vect64C type
2005 
2006  // Set doubleword method
2007  Q6Vect64C D(long long d) {
2008  return Q6Vect64C(Q6V64_PUT_D(data, d));
2009  };
2010 
2011  // Set word methods
2012  Q6Vect64C W0(int w) {
2013  return Q6Vect64C(Q6V64_PUT_W0(data, w));
2014  };
2015  Q6Vect64C W1(int w) {
2016  return Q6Vect64C(Q6V64_PUT_W1(data, w));
2017  };
2018 
2019  // Set half word methods
2020  Q6Vect64C H0(short h) {
2021  return Q6Vect64C(Q6V64_PUT_H0(data, h));
2022  };
2023  Q6Vect64C H1(short h) {
2024  return Q6Vect64C(Q6V64_PUT_H1(data, h));
2025  };
2026  Q6Vect64C H2(short h) {
2027  return Q6Vect64C(Q6V64_PUT_H2(data, h));
2028  };
2029  Q6Vect64C H3(short h) {
2030  return Q6Vect64C(Q6V64_PUT_H3(data, h));
2031  };
2032 
2033  // Set byte methods
2034  Q6Vect64C B0(signed char b) {
2035  return Q6Vect64C(Q6V64_PUT_B0(data, b));
2036  };
2037  Q6Vect64C B1(signed char b) {
2038  return Q6Vect64C(Q6V64_PUT_B1(data, b));
2039  };
2040  Q6Vect64C B2(signed char b) {
2041  return Q6Vect64C(Q6V64_PUT_B2(data, b));
2042  };
2043  Q6Vect64C B3(signed char b) {
2044  return Q6Vect64C(Q6V64_PUT_B3(data, b));
2045  };
2046  Q6Vect64C B4(signed char b) {
2047  return Q6Vect64C(Q6V64_PUT_B4(data, b));
2048  };
2049  Q6Vect64C B5(signed char b) {
2050  return Q6Vect64C(Q6V64_PUT_B5(data, b));
2051  };
2052  Q6Vect64C B6(signed char b) {
2053  return Q6Vect64C(Q6V64_PUT_B6(data, b));
2054  };
2055  Q6Vect64C B7(signed char b) {
2056  return Q6Vect64C(Q6V64_PUT_B7(data, b));
2057  };
2058 
2059 private:
2060  long long data;
2061 };
2062 
2063 #endif /* __cplusplus */
2064 
2065 /* 32 Bit Vectors */
2066 
2067 typedef int Q6Vect32;
2068 
2069 /* Extract word macros */
2070 
2071 #define Q6V32_GET_W(v) (v)
2072 #define Q6V32_GET_UW(v) ((unsigned int)(v))
2073 
2074 /* Extract half word macros */
2075 
2076 #define Q6V32_GET_H0(v) \
2077  __extension__({ \
2078  union { \
2079  int w; \
2080  short h[2]; \
2081  } _Q6V32_internal_union; \
2082  _Q6V32_internal_union.w = (v); \
2083  _Q6V32_internal_union.h[0]; \
2084  })
2085 #define Q6V32_GET_H1(v) \
2086  __extension__({ \
2087  union { \
2088  int w; \
2089  short h[2]; \
2090  } _Q6V32_internal_union; \
2091  _Q6V32_internal_union.w = (v); \
2092  _Q6V32_internal_union.h[1]; \
2093  })
2094 #define Q6V32_GET_UH0(v) \
2095  __extension__({ \
2096  union { \
2097  int w; \
2098  unsigned short uh[2]; \
2099  } _Q6V32_internal_union; \
2100  _Q6V32_internal_union.w = (v); \
2101  _Q6V32_internal_union.uh[0]; \
2102  })
2103 #define Q6V32_GET_UH1(v) \
2104  __extension__({ \
2105  union { \
2106  int w; \
2107  unsigned short uh[2]; \
2108  } _Q6V32_internal_union; \
2109  _Q6V32_internal_union.w = (v); \
2110  _Q6V32_internal_union.uh[1]; \
2111  })
2112 
2113 /* Extract byte macros */
2114 
2115 #define Q6V32_GET_B0(v) \
2116  __extension__({ \
2117  union { \
2118  int w; \
2119  signed char b[4]; \
2120  } _Q6V32_internal_union; \
2121  _Q6V32_internal_union.w = (v); \
2122  _Q6V32_internal_union.b[0]; \
2123  })
2124 #define Q6V32_GET_B1(v) \
2125  __extension__({ \
2126  union { \
2127  int w; \
2128  signed char b[4]; \
2129  } _Q6V32_internal_union; \
2130  _Q6V32_internal_union.w = (v); \
2131  _Q6V32_internal_union.b[1]; \
2132  })
2133 #define Q6V32_GET_B2(v) \
2134  __extension__({ \
2135  union { \
2136  int w; \
2137  signed char b[4]; \
2138  } _Q6V32_internal_union; \
2139  _Q6V32_internal_union.w = (v); \
2140  _Q6V32_internal_union.b[2]; \
2141  })
2142 #define Q6V32_GET_B3(v) \
2143  __extension__({ \
2144  union { \
2145  int w; \
2146  signed char b[4]; \
2147  } _Q6V32_internal_union; \
2148  _Q6V32_internal_union.w = (v); \
2149  _Q6V32_internal_union.b[3]; \
2150  })
2151 #define Q6V32_GET_UB0(v) \
2152  __extension__({ \
2153  union { \
2154  int w; \
2155  unsigned char ub[4]; \
2156  } _Q6V32_internal_union; \
2157  _Q6V32_internal_union.w = (v); \
2158  _Q6V32_internal_union.ub[0]; \
2159  })
2160 #define Q6V32_GET_UB1(v) \
2161  __extension__({ \
2162  union { \
2163  int w; \
2164  unsigned char ub[4]; \
2165  } _Q6V32_internal_union; \
2166  _Q6V32_internal_union.w = (v); \
2167  _Q6V32_internal_union.ub[1]; \
2168  })
2169 #define Q6V32_GET_UB2(v) \
2170  __extension__({ \
2171  union { \
2172  int w; \
2173  unsigned char ub[4]; \
2174  } _Q6V32_internal_union; \
2175  _Q6V32_internal_union.w = (v); \
2176  _Q6V32_internal_union.ub[2]; \
2177  })
2178 #define Q6V32_GET_UB3(v) \
2179  __extension__({ \
2180  union { \
2181  int w; \
2182  unsigned char ub[4]; \
2183  } _Q6V32_internal_union; \
2184  _Q6V32_internal_union.w = (v); \
2185  _Q6V32_internal_union.ub[3]; \
2186  })
2187 
2188 /* NOTE: All set macros return a Q6Vect32 type */
2189 
2190 /* Set word macro */
2191 
2192 #define Q6V32_PUT_W(v, new) (new)
2193 
2194 /* Set half word macros */
2195 
2196 #ifdef __qdsp6__
2197 
2198 #define Q6V32_PUT_H0(v, new) \
2199  __extension__({ \
2200  union { \
2201  int w; \
2202  short h[2]; \
2203  } _Q6V32_internal_union; \
2204  _Q6V32_internal_union.w = (v); \
2205  _Q6V32_internal_union.h[0] = (new); \
2206  _Q6V32_internal_union.w; \
2207  })
2208 #define Q6V32_PUT_H1(v, new) \
2209  __extension__({ \
2210  union { \
2211  int w; \
2212  short h[2]; \
2213  } _Q6V32_internal_union; \
2214  _Q6V32_internal_union.w = (v); \
2215  _Q6V32_internal_union.h[1] = (new); \
2216  _Q6V32_internal_union.w; \
2217  })
2218 
2219 #else /* !__qdsp6__ */
2220 
2221 #define Q6V32_PUT_H0(v, new) \
2222  (((v) & 0xffff0000) | ((Q6Vect32)((unsigned short)(new))))
2223 #define Q6V32_PUT_H1(v, new) (((v) & 0x0000ffff) | (((Q6Vect32)(new)) << 16))
2224 
2225 #endif /* !__qdsp6__ */
2226 
2227 /* Set byte macros */
2228 
2229 #ifdef __qdsp6__
2230 
2231 #define Q6V32_PUT_B0(v, new) \
2232  __extension__({ \
2233  union { \
2234  int w; \
2235  char b[4]; \
2236  } _Q6V32_internal_union; \
2237  _Q6V32_internal_union.w = (v); \
2238  _Q6V32_internal_union.b[0] = (new); \
2239  _Q6V32_internal_union.w; \
2240  })
2241 #define Q6V32_PUT_B1(v, new) \
2242  __extension__({ \
2243  union { \
2244  int w; \
2245  char b[4]; \
2246  } _Q6V32_internal_union; \
2247  _Q6V32_internal_union.w = (v); \
2248  _Q6V32_internal_union.b[1] = (new); \
2249  _Q6V32_internal_union.w; \
2250  })
2251 #define Q6V32_PUT_B2(v, new) \
2252  __extension__({ \
2253  union { \
2254  int w; \
2255  char b[4]; \
2256  } _Q6V32_internal_union; \
2257  _Q6V32_internal_union.w = (v); \
2258  _Q6V32_internal_union.b[2] = (new); \
2259  _Q6V32_internal_union.w; \
2260  })
2261 #define Q6V32_PUT_B3(v, new) \
2262  __extension__({ \
2263  union { \
2264  int w; \
2265  char b[4]; \
2266  } _Q6V32_internal_union; \
2267  _Q6V32_internal_union.w = (v); \
2268  _Q6V32_internal_union.b[3] = (new); \
2269  _Q6V32_internal_union.w; \
2270  })
2271 
2272 #else /* !__qdsp6__ */
2273 
2274 #define Q6V32_PUT_B0(v, new) \
2275  (((v) & 0xffffff00) | ((Q6Vect32)((unsigned char)(new))))
2276 #define Q6V32_PUT_B1(v, new) \
2277  (((v) & 0xffff00ff) | (((Q6Vect32)((unsigned char)(new))) << 8))
2278 #define Q6V32_PUT_B2(v, new) \
2279  (((v) & 0xff00ffff) | (((Q6Vect32)((unsigned char)(new))) << 16))
2280 #define Q6V32_PUT_B3(v, new) (((v) & 0x00ffffff) | (((Q6Vect32)(new)) << 24))
2281 
2282 #endif /* !__qdsp6__ */
2283 
2284 /* NOTE: All create macros return a Q6Vect32 type */
2285 
2286 /* Create from a word */
2287 
2288 #define Q6V32_CREATE_W(w) (w)
2289 
2290 /* Create from half words */
2291 
2292 #ifdef __qdsp6__
2293 
2294 #define Q6V32_CREATE_H(h1, h0) \
2295  __extension__({ \
2296  union { \
2297  long long d; \
2298  short h[2]; \
2299  } _Q6V32_internal_union; \
2300  _Q6V32_internal_union.h[0] = (h0); \
2301  _Q6V32_internal_union.h[1] = (h1); \
2302  _Q6V32_internal_union.d; \
2303  })
2304 
2305 #else /* !__qdsp6__ */
2306 
2307 #define Q6V32_CREATE_H(h1, h0) \
2308  ((((Q6Vect32)(h1)) << 16) | ((Q6Vect32)((h0) & 0xffff)))
2309 
2310 #endif /* !__qdsp6__ */
2311 
2312 /* Create from bytes */
2313 #ifdef __qdsp6__
2314 
2315 #define Q6V32_CREATE_B(b3, b2, b1, b0) \
2316  __extension__({ \
2317  union { \
2318  long long d; \
2319  char b[4]; \
2320  } _Q6V32_internal_union; \
2321  _Q6V32_internal_union.b[0] = (b0); \
2322  _Q6V32_internal_union.b[1] = (b1); \
2323  _Q6V32_internal_union.b[2] = (b2); \
2324  _Q6V32_internal_union.b[3] = (b3); \
2325  _Q6V32_internal_union.d; \
2326  })
2327 
2328 #else /* !__qdsp6__ */
2329 
2330 #define Q6V32_CREATE_B(b3, b2, b1, b0) \
2331  ((((Q6Vect32)(b3)) << 24) | (((Q6Vect32)((b2) & 0xff)) << 16) | \
2332  (((Q6Vect32)((b1) & 0xff)) << 8) | ((Q6Vect32)((b0) & 0xff)))
2333 
2334 #endif /* !__qdsp6__ */
2335 
2336 #ifdef __cplusplus
2337 
2338 class Q6Vect32C {
2339 public:
2340  // Constructors
2341  Q6Vect32C(int w = 0) : data(w) {};
2342  Q6Vect32C(short h1, short h0) : data(Q6V32_CREATE_H(h1, h0)) {};
2343  Q6Vect32C(signed char b3, signed char b2, signed char b1, signed char b0)
2344  : data(Q6V32_CREATE_B(b3, b2, b1, b0)) {};
2345  Q6Vect32C(const Q6Vect32C &v) : data(v.data) {};
2346 
2347  Q6Vect32C &operator=(const Q6Vect32C &v) {
2348  data = v.data;
2349  return *this;
2350  };
2351 
2352  operator int() {
2353  return data;
2354  };
2355 
2356  // Extract word methods
2357  int W(void) {
2358  return Q6V32_GET_W(data);
2359  };
2360  unsigned int UW(void) {
2361  return Q6V32_GET_UW(data);
2362  };
2363 
2364  // Extract half word methods
2365  short H0(void) {
2366  return Q6V32_GET_H0(data);
2367  };
2368  short H1(void) {
2369  return Q6V32_GET_H1(data);
2370  };
2371  unsigned short UH0(void) {
2372  return Q6V32_GET_UH0(data);
2373  };
2374  unsigned short UH1(void) {
2375  return Q6V32_GET_UH1(data);
2376  };
2377 
2378  // Extract byte methods
2379  signed char B0(void) {
2380  return Q6V32_GET_B0(data);
2381  };
2382  signed char B1(void) {
2383  return Q6V32_GET_B1(data);
2384  };
2385  signed char B2(void) {
2386  return Q6V32_GET_B2(data);
2387  };
2388  signed char B3(void) {
2389  return Q6V32_GET_B3(data);
2390  };
2391  unsigned char UB0(void) {
2392  return Q6V32_GET_UB0(data);
2393  };
2394  unsigned char UB1(void) {
2395  return Q6V32_GET_UB1(data);
2396  };
2397  unsigned char UB2(void) {
2398  return Q6V32_GET_UB2(data);
2399  };
2400  unsigned char UB3(void) {
2401  return Q6V32_GET_UB3(data);
2402  };
2403 
2404  // NOTE: All set methods return a Q6Vect32C type
2405 
2406  // Set word method
2407  Q6Vect32C W(int w) {
2408  return Q6Vect32C(Q6V32_PUT_W(data, w));
2409  };
2410 
2411  // Set half word methods
2412  Q6Vect32C H0(short h) {
2413  return Q6Vect32C(Q6V32_PUT_H0(data, h));
2414  };
2415  Q6Vect32C H1(short h) {
2416  return Q6Vect32C(Q6V32_PUT_H1(data, h));
2417  };
2418 
2419  // Set byte methods
2420  Q6Vect32C B0(signed char b) {
2421  return Q6Vect32C(Q6V32_PUT_B0(data, b));
2422  };
2423  Q6Vect32C B1(signed char b) {
2424  return Q6Vect32C(Q6V32_PUT_B1(data, b));
2425  };
2426  Q6Vect32C B2(signed char b) {
2427  return Q6Vect32C(Q6V32_PUT_B2(data, b));
2428  };
2429  Q6Vect32C B3(signed char b) {
2430  return Q6Vect32C(Q6V32_PUT_B3(data, b));
2431  };
2432 
2433 private:
2434  int data;
2435 };
2436 
2437 #endif /* __cplusplus */
2438 
2439 // V65 Vector types
2440 #if __HVX_ARCH__ >= 65
2441 #if defined __HVX__ && (__HVX_LENGTH__ == 128)
2442 typedef long Q6VecPred128 __attribute__((__vector_size__(128)))
2443  __attribute__((aligned(128)));
2444 
2445 typedef long Q6Vect1024 __attribute__((__vector_size__(128)))
2446  __attribute__((aligned(128)));
2447 
2448 typedef long Q6Vect2048 __attribute__((__vector_size__(256)))
2449  __attribute__((aligned(256)));
2450 
2451 #else /* defined __HVX__ && (__HVX_LENGTH__ == 128) */
2452 #if defined __HVX__ && (__HVX_LENGTH__ == 64)
2453 typedef long Q6VecPred64 __attribute__((__vector_size__(64)))
2454  __attribute__((aligned(64)));
2455 
2456 typedef long Q6Vect512 __attribute__((__vector_size__(64)))
2457  __attribute__((aligned(64)));
2458 
2459 typedef long Q6Vect1024 __attribute__((__vector_size__(128)))
2460  __attribute__((aligned(128)));
2461 
2462 #endif /* defined __HVX__ && (__HVX_LENGTH__ == 64) */
2463 #endif /* defined __HVX__ && (__HVX_LENGTH__ == 128) */
2464 #endif /* __HVX_ARCH__ >= 65 */
2465 
2466 /* Predicates */
2467 
2468 typedef int Q6Pred;
2469 
2470 
2471 #ifdef __HVX__
2472 
2473 // Extract HVX VectorPair macro.
2474 #define HEXAGON_HVX_GET_W(v) (v)
2475 
2476 // Extract HVX Vector macros.
2477 #define HEXAGON_HVX_GET_V0(v) \
2478  __extension__({ \
2479  union { \
2480  HVX_VectorPair W; \
2481  HVX_Vector V[2]; \
2482  } _HEXAGON_HVX_internal_union; \
2483  _HEXAGON_HVX_internal_union.W = (v); \
2484  _HEXAGON_HVX_internal_union.V[0]; \
2485  })
2486 #define HEXAGON_HVX_GET_V1(v) \
2487  __extension__({ \
2488  union { \
2489  HVX_VectorPair W; \
2490  HVX_Vector V[2]; \
2491  } _HEXAGON_HVX_internal_union; \
2492  _HEXAGON_HVX_internal_union.W = (v); \
2493  _HEXAGON_HVX_internal_union.V[1]; \
2494  })
2495 #define HEXAGON_HVX_GET_P(v) \
2496  __extension__({ \
2497  union { \
2498  HVX_VectorPair W; \
2499  HVX_VectorPred P[2]; \
2500  } _HEXAGON_HVX_internal_union; \
2501  _HEXAGON_HVX_internal_union.W = (v); \
2502  _HEXAGON_HVX_internal_union.P[0]; \
2503  })
2504 
2505 // Set HVX VectorPair macro.
2506 #define HEXAGON_HVX_PUT_W(v, new) (new)
2507 
2508 // Set HVX Vector macros.
2509 #define HEXAGON_HVX_PUT_V0(v, new) \
2510  __extension__({ \
2511  union { \
2512  HVX_VectorPair W; \
2513  HVX_Vector V[2]; \
2514  } _HEXAGON_HVX_internal_union; \
2515  _HEXAGON_HVX_internal_union.W = (v); \
2516  _HEXAGON_HVX_internal_union.V[0] = (new); \
2517  _HEXAGON_HVX_internal_union.W; \
2518  })
2519 
2520 #define HEXAGON_HVX_PUT_V1(v, new) \
2521  __extension__({ \
2522  union { \
2523  HVX_VectorPair W; \
2524  HVX_Vector V[2]; \
2525  } _HEXAGON_HVX_internal_union; \
2526  _HEXAGON_HVX_internal_union.W = (v); \
2527  _HEXAGON_HVX_internal_union.V[1] = (new); \
2528  _HEXAGON_HVX_internal_union.W; \
2529  })
2530 
2531 #define HEXAGON_HVX_PUT_P(v, new) \
2532  __extension__({ \
2533  union { \
2534  HVX_VectorPair W; \
2535  HVX_VectorPred P[2]; \
2536  } _HEXAGON_HVX_internal_union; \
2537  _HEXAGON_HVX_internal_union.W = (v); \
2538  _HEXAGON_HVX_internal_union.P[0] = (new); \
2539  _HEXAGON_HVX_internal_union.W; \
2540  })
2541 
2542 
2543 #define HEXAGON_HVX_CREATE_W(v1, v0) \
2544  __extension__({ \
2545  union { \
2546  HVX_VectorPair W; \
2547  HVX_Vector V[2]; \
2548  } _HEXAGON_HVX_internal_union; \
2549  _HEXAGON_HVX_internal_union.V[0] = (v0); \
2550  _HEXAGON_HVX_internal_union.V[1] = (v1); \
2551  _HEXAGON_HVX_internal_union.W; \
2552  })
2553 
2554 #ifdef __cplusplus
2555 
2556 class HVX_Vect {
2557 public:
2558  // Constructors.
2559  // Default.
2560  HVX_Vect() : data(Q6_W_vcombine_VV(Q6_V_vzero(), Q6_V_vzero())){};
2561 
2562  // Custom constructors.
2563  HVX_Vect(HVX_VectorPair W) : data(W){};
2564  HVX_Vect(HVX_Vector v1, HVX_Vector v0) : data(HEXAGON_HVX_CREATE_W(v1, v0)){};
2565 
2566  // Copy constructor.
2567  HVX_Vect(const HVX_Vect &W) = default;
2568 
2569  // Move constructor.
2570  HVX_Vect(HVX_Vect &&W) = default;
2571 
2572  // Assignment operator.
2573  HVX_Vect &operator=(const HVX_Vect &W) = default;
2574 
2575  operator HVX_VectorPair() { return data; };
2576 
2577  // Extract VectorPair method.
2578  HVX_VectorPair W(void) { return HEXAGON_HVX_GET_W(data); };
2579 
2580  // Extract Vector methods.
2581  HVX_Vector V0(void) { return HEXAGON_HVX_GET_V0(data); };
2582  HVX_Vector V1(void) { return HEXAGON_HVX_GET_V1(data); };
2583  HVX_VectorPred P(void) { return HEXAGON_HVX_GET_P(data); };
2584 
2585  // NOTE: All set methods return a HVX_Vect type.
2586  // Set HVX VectorPair method.
2587  HVX_Vect W(HVX_VectorPair w) { return HVX_Vect(HEXAGON_HVX_PUT_W(data, w)); };
2588 
2589  // Set HVX Vector methods.
2590  HVX_Vect V0(HVX_Vector v) { return HVX_Vect(HEXAGON_HVX_PUT_V0(data, v)); };
2591  HVX_Vect V1(HVX_Vector v) { return HVX_Vect(HEXAGON_HVX_PUT_V1(data, v)); };
2592  HVX_Vect P(HVX_VectorPred p) { return HVX_Vect(HEXAGON_HVX_PUT_P(data, p)); };
2593 
2594 private:
2595  HVX_VectorPair data;
2596 };
2597 
2598 #endif /* __cplusplus */
2599 #endif /* __HVX__ */
2600 
2601 #define HEXAGON_UDMA_DM0_STATUS_IDLE 0x00000000
2602 #define HEXAGON_UDMA_DM0_STATUS_RUN 0x00000001
2603 #define HEXAGON_UDMA_DM0_STATUS_ERROR 0x00000002
2604 #define HEXAGON_UDMA_DESC_DSTATE_INCOMPLETE 0
2605 #define HEXAGON_UDMA_DESC_DSTATE_COMPLETE 1
2606 #define HEXAGON_UDMA_DESC_ORDER_NOORDER 0
2607 #define HEXAGON_UDMA_DESC_ORDER_ORDER 1
2608 #define HEXAGON_UDMA_DESC_BYPASS_OFF 0
2609 #define HEXAGON_UDMA_DESC_BYPASS_ON 1
2610 #define HEXAGON_UDMA_DESC_COMP_NONE 0
2611 #define HEXAGON_UDMA_DESC_COMP_DLBC 1
2612 #define HEXAGON_UDMA_DESC_DESCTYPE_TYPE0 0
2613 #define HEXAGON_UDMA_DESC_DESCTYPE_TYPE1 1
2614 
2616 {
2617  void *next;
2618  unsigned int length:24;
2619  unsigned int desctype:2;
2620  unsigned int dstcomp:1;
2621  unsigned int srccomp:1;
2622  unsigned int dstbypass:1;
2623  unsigned int srcbypass:1;
2624  unsigned int order:1;
2625  unsigned int dstate:1;
2626  void *src;
2627  void *dst;
2629 
2631 {
2632  void *next;
2633  unsigned int length:24;
2634  unsigned int desctype:2;
2635  unsigned int dstcomp:1;
2636  unsigned int srccomp:1;
2637  unsigned int dstbypass:1;
2638  unsigned int srcbypass:1;
2639  unsigned int order:1;
2640  unsigned int dstate:1;
2641  void *src;
2642  void *dst;
2643  unsigned int allocation:28;
2644  unsigned int padding:4;
2645  unsigned int roiwidth:16;
2646  unsigned int roiheight:16;
2647  unsigned int srcstride:16;
2648  unsigned int dststride:16;
2649  unsigned int srcwidthoffset:16;
2650  unsigned int dstwidthoffset:16;
2652 
2653 #endif /* !HEXAGON_TYPES_H */
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Definition: hexagon_types.h:616
HEXAGON_V64_PUT_B0
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HEXAGON_V32_GET_UB0
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Q6V64_GET_B0
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HEXAGON_V64_PUT_B7
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Definition: hexagon_types.h:1576
v
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__attribute__
long long __attribute__((__may_alias__)) HEXAGON_Vect64
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Definition: hexagon_types.h:317
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Definition: hexagon_types.h:423
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Definition: hexagon_types.h:844