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f16cintrin.h
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1 /*===---- f16cintrin.h - F16C intrinsics -----------------------------------===
2  *
3  * Permission is hereby granted, free of charge, to any person obtaining a copy
4  * of this software and associated documentation files (the "Software"), to deal
5  * in the Software without restriction, including without limitation the rights
6  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
7  * copies of the Software, and to permit persons to whom the Software is
8  * furnished to do so, subject to the following conditions:
9  *
10  * The above copyright notice and this permission notice shall be included in
11  * all copies or substantial portions of the Software.
12  *
13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
16  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
17  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
18  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
19  * THE SOFTWARE.
20  *
21  *===-----------------------------------------------------------------------===
22  */
23 
24 #if !defined __IMMINTRIN_H
25 #error "Never use <f16cintrin.h> directly; include <immintrin.h> instead."
26 #endif
27 
28 #ifndef __F16CINTRIN_H
29 #define __F16CINTRIN_H
30 
31 /* Define the default attributes for the functions in this file. */
32 #define __DEFAULT_FN_ATTRS \
33  __attribute__((__always_inline__, __nodebug__, __target__("f16c")))
34 
35 /* NOTE: Intel documents the 128-bit versions of these as being in emmintrin.h,
36  * but that's because icc can emulate these without f16c using a library call.
37  * Since we don't do that let's leave these in f16cintrin.h.
38  */
39 
40 /// Converts a 16-bit half-precision float value into a 32-bit float
41 /// value.
42 ///
43 /// \headerfile <x86intrin.h>
44 ///
45 /// This intrinsic corresponds to the <c> VCVTPH2PS </c> instruction.
46 ///
47 /// \param __a
48 /// A 16-bit half-precision float value.
49 /// \returns The converted 32-bit float value.
50 static __inline float __DEFAULT_FN_ATTRS
51 _cvtsh_ss(unsigned short __a)
52 {
53  __v8hi v = {(short)__a, 0, 0, 0, 0, 0, 0, 0};
54  __v4sf r = __builtin_ia32_vcvtph2ps(v);
55  return r[0];
56 }
57 
58 /// Converts a 32-bit single-precision float value to a 16-bit
59 /// half-precision float value.
60 ///
61 /// \headerfile <x86intrin.h>
62 ///
63 /// \code
64 /// unsigned short _cvtss_sh(float a, const int imm);
65 /// \endcode
66 ///
67 /// This intrinsic corresponds to the <c> VCVTPS2PH </c> instruction.
68 ///
69 /// \param a
70 /// A 32-bit single-precision float value to be converted to a 16-bit
71 /// half-precision float value.
72 /// \param imm
73 /// An immediate value controlling rounding using bits [2:0]: \n
74 /// 000: Nearest \n
75 /// 001: Down \n
76 /// 010: Up \n
77 /// 011: Truncate \n
78 /// 1XX: Use MXCSR.RC for rounding
79 /// \returns The converted 16-bit half-precision float value.
80 #define _cvtss_sh(a, imm) \
81  (unsigned short)(((__v8hi)__builtin_ia32_vcvtps2ph((__v4sf){a, 0, 0, 0}, \
82  (imm)))[0])
83 
84 /// Converts a 128-bit vector containing 32-bit float values into a
85 /// 128-bit vector containing 16-bit half-precision float values.
86 ///
87 /// \headerfile <x86intrin.h>
88 ///
89 /// \code
90 /// __m128i _mm_cvtps_ph(__m128 a, const int imm);
91 /// \endcode
92 ///
93 /// This intrinsic corresponds to the <c> VCVTPS2PH </c> instruction.
94 ///
95 /// \param a
96 /// A 128-bit vector containing 32-bit float values.
97 /// \param imm
98 /// An immediate value controlling rounding using bits [2:0]: \n
99 /// 000: Nearest \n
100 /// 001: Down \n
101 /// 010: Up \n
102 /// 011: Truncate \n
103 /// 1XX: Use MXCSR.RC for rounding
104 /// \returns A 128-bit vector containing converted 16-bit half-precision float
105 /// values. The lower 64 bits are used to store the converted 16-bit
106 /// half-precision floating-point values.
107 #define _mm_cvtps_ph(a, imm) \
108  (__m128i)__builtin_ia32_vcvtps2ph((__v4sf)(__m128)(a), (imm))
109 
110 /// Converts a 128-bit vector containing 16-bit half-precision float
111 /// values into a 128-bit vector containing 32-bit float values.
112 ///
113 /// \headerfile <x86intrin.h>
114 ///
115 /// This intrinsic corresponds to the <c> VCVTPH2PS </c> instruction.
116 ///
117 /// \param __a
118 /// A 128-bit vector containing 16-bit half-precision float values. The lower
119 /// 64 bits are used in the conversion.
120 /// \returns A 128-bit vector of [4 x float] containing converted float values.
121 static __inline __m128 __DEFAULT_FN_ATTRS
122 _mm_cvtph_ps(__m128i __a)
123 {
124  return (__m128)__builtin_ia32_vcvtph2ps((__v8hi)__a);
125 }
126 
127 /// Converts a 256-bit vector of [8 x float] into a 128-bit vector
128 /// containing 16-bit half-precision float values.
129 ///
130 /// \headerfile <x86intrin.h>
131 ///
132 /// \code
133 /// __m128i _mm256_cvtps_ph(__m256 a, const int imm);
134 /// \endcode
135 ///
136 /// This intrinsic corresponds to the <c> VCVTPS2PH </c> instruction.
137 ///
138 /// \param a
139 /// A 256-bit vector containing 32-bit single-precision float values to be
140 /// converted to 16-bit half-precision float values.
141 /// \param imm
142 /// An immediate value controlling rounding using bits [2:0]: \n
143 /// 000: Nearest \n
144 /// 001: Down \n
145 /// 010: Up \n
146 /// 011: Truncate \n
147 /// 1XX: Use MXCSR.RC for rounding
148 /// \returns A 128-bit vector containing the converted 16-bit half-precision
149 /// float values.
150 #define _mm256_cvtps_ph(a, imm) \
151  (__m128i)__builtin_ia32_vcvtps2ph256((__v8sf)(__m256)(a), (imm))
152 
153 /// Converts a 128-bit vector containing 16-bit half-precision float
154 /// values into a 256-bit vector of [8 x float].
155 ///
156 /// \headerfile <x86intrin.h>
157 ///
158 /// This intrinsic corresponds to the <c> VCVTPH2PS </c> instruction.
159 ///
160 /// \param __a
161 /// A 128-bit vector containing 16-bit half-precision float values to be
162 /// converted to 32-bit single-precision float values.
163 /// \returns A vector of [8 x float] containing the converted 32-bit
164 /// single-precision float values.
165 static __inline __m256 __attribute__((__always_inline__, __nodebug__, __target__("f16c")))
166 _mm256_cvtph_ps(__m128i __a)
167 {
168  return (__m256)__builtin_ia32_vcvtph2ps256((__v8hi)__a);
169 }
170 
171 #undef __DEFAULT_FN_ATTRS
172 
173 #endif /* __F16CINTRIN_H */
static __inline float __DEFAULT_FN_ATTRS _cvtsh_ss(unsigned short __a)
Converts a 16-bit half-precision float value into a 32-bit float value.
Definition: f16cintrin.h:51
#define __DEFAULT_FN_ATTRS
Definition: f16cintrin.h:32
do v
Definition: arm_acle.h:78
static __inline __m256 __attribute__((__always_inline__, __nodebug__, __target__("f16c"))) _mm256_cvtph_ps(__m128i __a)
Converts a 128-bit vector containing 16-bit half-precision float values into a 256-bit vector of [8 x...
Definition: f16cintrin.h:165
static __inline __m128 __DEFAULT_FN_ATTRS _mm_cvtph_ps(__m128i __a)
Converts a 128-bit vector containing 16-bit half-precision float values into a 128-bit vector contain...
Definition: f16cintrin.h:122