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immintrin.h
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1 /*===---- immintrin.h - Intel intrinsics -----------------------------------===
2  *
3  * Permission is hereby granted, free of charge, to any person obtaining a copy
4  * of this software and associated documentation files (the "Software"), to deal
5  * in the Software without restriction, including without limitation the rights
6  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
7  * copies of the Software, and to permit persons to whom the Software is
8  * furnished to do so, subject to the following conditions:
9  *
10  * The above copyright notice and this permission notice shall be included in
11  * all copies or substantial portions of the Software.
12  *
13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
16  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
17  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
18  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
19  * THE SOFTWARE.
20  *
21  *===-----------------------------------------------------------------------===
22  */
23 
24 #ifndef __IMMINTRIN_H
25 #define __IMMINTRIN_H
26 
27 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__MMX__)
28 #include <mmintrin.h>
29 #endif
30 
31 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__SSE__)
32 #include <xmmintrin.h>
33 #endif
34 
35 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__SSE2__)
36 #include <emmintrin.h>
37 #endif
38 
39 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__SSE3__)
40 #include <pmmintrin.h>
41 #endif
42 
43 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__SSSE3__)
44 #include <tmmintrin.h>
45 #endif
46 
47 #if !defined(_MSC_VER) || __has_feature(modules) || \
48  (defined(__SSE4_2__) || defined(__SSE4_1__))
49 #include <smmintrin.h>
50 #endif
51 
52 #if !defined(_MSC_VER) || __has_feature(modules) || \
53  (defined(__AES__) || defined(__PCLMUL__))
54 #include <wmmintrin.h>
55 #endif
56 
57 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__CLFLUSHOPT__)
58 #include <clflushoptintrin.h>
59 #endif
60 
61 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__CLWB__)
62 #include <clwbintrin.h>
63 #endif
64 
65 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__AVX__)
66 #include <avxintrin.h>
67 #endif
68 
69 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__AVX2__)
70 #include <avx2intrin.h>
71 
72 /* The 256-bit versions of functions in f16cintrin.h.
73  Intel documents these as being in immintrin.h, and
74  they depend on typedefs from avxintrin.h. */
75 
76 /// \brief Converts a 256-bit vector of [8 x float] into a 128-bit vector
77 /// containing 16-bit half-precision float values.
78 ///
79 /// \headerfile <x86intrin.h>
80 ///
81 /// \code
82 /// __m128i _mm256_cvtps_ph(__m256 a, const int imm);
83 /// \endcode
84 ///
85 /// This intrinsic corresponds to the <c> VCVTPS2PH </c> instruction.
86 ///
87 /// \param a
88 /// A 256-bit vector containing 32-bit single-precision float values to be
89 /// converted to 16-bit half-precision float values.
90 /// \param imm
91 /// An immediate value controlling rounding using bits [2:0]: \n
92 /// 000: Nearest \n
93 /// 001: Down \n
94 /// 010: Up \n
95 /// 011: Truncate \n
96 /// 1XX: Use MXCSR.RC for rounding
97 /// \returns A 128-bit vector containing the converted 16-bit half-precision
98 /// float values.
99 #define _mm256_cvtps_ph(a, imm) __extension__ ({ \
100  (__m128i)__builtin_ia32_vcvtps2ph256((__v8sf)(__m256)(a), (imm)); })
101 
102 /// \brief Converts a 128-bit vector containing 16-bit half-precision float
103 /// values into a 256-bit vector of [8 x float].
104 ///
105 /// \headerfile <x86intrin.h>
106 ///
107 /// This intrinsic corresponds to the <c> VCVTPH2PS </c> instruction.
108 ///
109 /// \param __a
110 /// A 128-bit vector containing 16-bit half-precision float values to be
111 /// converted to 32-bit single-precision float values.
112 /// \returns A vector of [8 x float] containing the converted 32-bit
113 /// single-precision float values.
114 static __inline __m256 __attribute__((__always_inline__, __nodebug__, __target__("f16c")))
115 _mm256_cvtph_ps(__m128i __a)
116 {
117  return (__m256)__builtin_ia32_vcvtph2ps256((__v8hi)__a);
118 }
119 #endif /* __AVX2__ */
120 
121 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__VPCLMULQDQ__)
122 #include <vpclmulqdqintrin.h>
123 #endif
124 
125 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__BMI__)
126 #include <bmiintrin.h>
127 #endif
128 
129 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__BMI2__)
130 #include <bmi2intrin.h>
131 #endif
132 
133 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__LZCNT__)
134 #include <lzcntintrin.h>
135 #endif
136 
137 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__FMA__)
138 #include <fmaintrin.h>
139 #endif
140 
141 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__AVX512F__)
142 #include <avx512fintrin.h>
143 #endif
144 
145 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__AVX512VL__)
146 #include <avx512vlintrin.h>
147 #endif
148 
149 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__AVX512BW__)
150 #include <avx512bwintrin.h>
151 #endif
152 
153 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__AVX512BITALG__)
154 #include <avx512bitalgintrin.h>
155 #endif
156 
157 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__AVX512CD__)
158 #include <avx512cdintrin.h>
159 #endif
160 
161 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__AVX512VPOPCNTDQ__)
162 #include <avx512vpopcntdqintrin.h>
163 #endif
164 
165 #if !defined(_MSC_VER) || __has_feature(modules) || \
166  (defined(__AVX512VL__) && defined(__AVX512VPOPCNTDQ__))
167 #include <avx512vpopcntdqvlintrin.h>
168 #endif
169 
170 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__AVX512VNNI__)
171 #include <avx512vnniintrin.h>
172 #endif
173 
174 #if !defined(_MSC_VER) || __has_feature(modules) || \
175  (defined(__AVX512VL__) && defined(__AVX512VNNI__))
176 #include <avx512vlvnniintrin.h>
177 #endif
178 
179 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__AVX512DQ__)
180 #include <avx512dqintrin.h>
181 #endif
182 
183 #if !defined(_MSC_VER) || __has_feature(modules) || \
184  (defined(__AVX512VL__) && defined(__AVX512BITALG__))
185 #include <avx512vlbitalgintrin.h>
186 #endif
187 
188 #if !defined(_MSC_VER) || __has_feature(modules) || \
189  (defined(__AVX512VL__) && defined(__AVX512BW__))
190 #include <avx512vlbwintrin.h>
191 #endif
192 
193 #if !defined(_MSC_VER) || __has_feature(modules) || \
194  (defined(__AVX512VL__) && defined(__AVX512CD__))
195 #include <avx512vlcdintrin.h>
196 #endif
197 
198 #if !defined(_MSC_VER) || __has_feature(modules) || \
199  (defined(__AVX512VL__) && defined(__AVX512DQ__))
200 #include <avx512vldqintrin.h>
201 #endif
202 
203 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__AVX512ER__)
204 #include <avx512erintrin.h>
205 #endif
206 
207 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__AVX512IFMA__)
208 #include <avx512ifmaintrin.h>
209 #endif
210 
211 #if !defined(_MSC_VER) || __has_feature(modules) || \
212  (defined(__AVX512IFMA__) && defined(__AVX512VL__))
213 #include <avx512ifmavlintrin.h>
214 #endif
215 
216 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__AVX512VBMI__)
217 #include <avx512vbmiintrin.h>
218 #endif
219 
220 #if !defined(_MSC_VER) || __has_feature(modules) || \
221  (defined(__AVX512VBMI__) && defined(__AVX512VL__))
222 #include <avx512vbmivlintrin.h>
223 #endif
224 
225 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__AVX512VBMI2__)
226 #include <avx512vbmi2intrin.h>
227 #endif
228 
229 #if !defined(_MSC_VER) || __has_feature(modules) || \
230  (defined(__AVX512VBMI2__) && defined(__AVX512VL__))
231 #include <avx512vlvbmi2intrin.h>
232 #endif
233 
234 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__AVX512PF__)
235 #include <avx512pfintrin.h>
236 #endif
237 
238 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__PKU__)
239 #include <pkuintrin.h>
240 #endif
241 
242 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__VAES__)
243 #include <vaesintrin.h>
244 #endif
245 
246 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__GFNI__)
247 #include <gfniintrin.h>
248 #endif
249 
250 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__RDPID__)
251 /// \brief Returns the value of the IA32_TSC_AUX MSR (0xc0000103).
252 ///
253 /// \headerfile <immintrin.h>
254 ///
255 /// This intrinsic corresponds to the <c> RDPID </c> instruction.
256 static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__, __target__("rdpid")))
257 _rdpid_u32(void) {
258  return __builtin_ia32_rdpid();
259 }
260 #endif // __RDPID__
261 
262 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__RDRND__)
263 static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd")))
264 _rdrand16_step(unsigned short *__p)
265 {
266  return __builtin_ia32_rdrand16_step(__p);
267 }
268 
269 static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd")))
270 _rdrand32_step(unsigned int *__p)
271 {
272  return __builtin_ia32_rdrand32_step(__p);
273 }
274 
275 #ifdef __x86_64__
276 static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd")))
277 _rdrand64_step(unsigned long long *__p)
278 {
279  return __builtin_ia32_rdrand64_step(__p);
280 }
281 #endif
282 #endif /* __RDRND__ */
283 
284 /* __bit_scan_forward */
285 static __inline__ int __attribute__((__always_inline__, __nodebug__))
286 _bit_scan_forward(int __A) {
287  return __builtin_ctz(__A);
288 }
289 
290 /* __bit_scan_reverse */
291 static __inline__ int __attribute__((__always_inline__, __nodebug__))
292 _bit_scan_reverse(int __A) {
293  return 31 - __builtin_clz(__A);
294 }
295 
296 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__FSGSBASE__)
297 #ifdef __x86_64__
298 static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
299 _readfsbase_u32(void)
300 {
301  return __builtin_ia32_rdfsbase32();
302 }
303 
304 static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
305 _readfsbase_u64(void)
306 {
307  return __builtin_ia32_rdfsbase64();
308 }
309 
310 static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
311 _readgsbase_u32(void)
312 {
313  return __builtin_ia32_rdgsbase32();
314 }
315 
316 static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
317 _readgsbase_u64(void)
318 {
319  return __builtin_ia32_rdgsbase64();
320 }
321 
322 static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
323 _writefsbase_u32(unsigned int __V)
324 {
325  return __builtin_ia32_wrfsbase32(__V);
326 }
327 
328 static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
329 _writefsbase_u64(unsigned long long __V)
330 {
331  return __builtin_ia32_wrfsbase64(__V);
332 }
333 
334 static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
335 _writegsbase_u32(unsigned int __V)
336 {
337  return __builtin_ia32_wrgsbase32(__V);
338 }
339 
340 static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
341 _writegsbase_u64(unsigned long long __V)
342 {
343  return __builtin_ia32_wrgsbase64(__V);
344 }
345 
346 #endif
347 #endif /* __FSGSBASE__ */
348 
349 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__RTM__)
350 #include <rtmintrin.h>
351 #include <xtestintrin.h>
352 #endif
353 
354 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__SHA__)
355 #include <shaintrin.h>
356 #endif
357 
358 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__FXSR__)
359 #include <fxsrintrin.h>
360 #endif
361 
362 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__XSAVE__)
363 #include <xsaveintrin.h>
364 #endif
365 
366 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__XSAVEOPT__)
367 #include <xsaveoptintrin.h>
368 #endif
369 
370 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__XSAVEC__)
371 #include <xsavecintrin.h>
372 #endif
373 
374 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__XSAVES__)
375 #include <xsavesintrin.h>
376 #endif
377 
378 #if !defined(_MSC_VER) || __has_feature(modules) || defined(__SHSTK__)
379 #include <cetintrin.h>
380 #endif
381 
382 /* Some intrinsics inside adxintrin.h are available only on processors with ADX,
383  * whereas others are also available at all times. */
384 #include <adxintrin.h>
385 
386 #endif /* __IMMINTRIN_H */
static __inline unsigned char unsigned int unsigned int unsigned int * __p
Definition: adxintrin.h:38
static __inline __m256 __attribute__((__always_inline__, __nodebug__, __target__("f16c"))) _mm256_cvtph_ps(__m128i __a)
Converts a 128-bit vector containing 16-bit half-precision float values into a 256-bit vector of [8 x...
Definition: immintrin.h:114