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avx512fintrin.h
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1 /*===---- avx512fintrin.h - AVX512F intrinsics -----------------------------===
2  *
3  * Permission is hereby granted, free of charge, to any person obtaining a copy
4  * of this software and associated documentation files (the "Software"), to deal
5  * in the Software without restriction, including without limitation the rights
6  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
7  * copies of the Software, and to permit persons to whom the Software is
8  * furnished to do so, subject to the following conditions:
9  *
10  * The above copyright notice and this permission notice shall be included in
11  * all copies or substantial portions of the Software.
12  *
13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
16  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
17  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
18  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
19  * THE SOFTWARE.
20  *
21  *===-----------------------------------------------------------------------===
22  */
23 #ifndef __IMMINTRIN_H
24 #error "Never use <avx512fintrin.h> directly; include <immintrin.h> instead."
25 #endif
26 
27 #ifndef __AVX512FINTRIN_H
28 #define __AVX512FINTRIN_H
29 
30 typedef char __v64qi __attribute__((__vector_size__(64)));
31 typedef short __v32hi __attribute__((__vector_size__(64)));
32 typedef double __v8df __attribute__((__vector_size__(64)));
33 typedef float __v16sf __attribute__((__vector_size__(64)));
34 typedef long long __v8di __attribute__((__vector_size__(64)));
35 typedef int __v16si __attribute__((__vector_size__(64)));
36 
37 /* Unsigned types */
38 typedef unsigned char __v64qu __attribute__((__vector_size__(64)));
39 typedef unsigned short __v32hu __attribute__((__vector_size__(64)));
40 typedef unsigned long long __v8du __attribute__((__vector_size__(64)));
41 typedef unsigned int __v16su __attribute__((__vector_size__(64)));
42 
43 typedef float __m512 __attribute__((__vector_size__(64)));
44 typedef double __m512d __attribute__((__vector_size__(64)));
45 typedef long long __m512i __attribute__((__vector_size__(64)));
46 
47 typedef unsigned char __mmask8;
48 typedef unsigned short __mmask16;
49 
50 /* Rounding mode macros. */
51 #define _MM_FROUND_TO_NEAREST_INT 0x00
52 #define _MM_FROUND_TO_NEG_INF 0x01
53 #define _MM_FROUND_TO_POS_INF 0x02
54 #define _MM_FROUND_TO_ZERO 0x03
55 #define _MM_FROUND_CUR_DIRECTION 0x04
56 
57 /* Constants for integer comparison predicates */
58 typedef enum {
59  _MM_CMPINT_EQ, /* Equal */
60  _MM_CMPINT_LT, /* Less than */
61  _MM_CMPINT_LE, /* Less than or Equal */
63  _MM_CMPINT_NE, /* Not Equal */
64  _MM_CMPINT_NLT, /* Not Less than */
65 #define _MM_CMPINT_GE _MM_CMPINT_NLT /* Greater than or Equal */
66  _MM_CMPINT_NLE /* Not Less than or Equal */
67 #define _MM_CMPINT_GT _MM_CMPINT_NLE /* Greater than */
69 
70 typedef enum
71 {
72  _MM_PERM_AAAA = 0x00, _MM_PERM_AAAB = 0x01, _MM_PERM_AAAC = 0x02,
73  _MM_PERM_AAAD = 0x03, _MM_PERM_AABA = 0x04, _MM_PERM_AABB = 0x05,
74  _MM_PERM_AABC = 0x06, _MM_PERM_AABD = 0x07, _MM_PERM_AACA = 0x08,
75  _MM_PERM_AACB = 0x09, _MM_PERM_AACC = 0x0A, _MM_PERM_AACD = 0x0B,
76  _MM_PERM_AADA = 0x0C, _MM_PERM_AADB = 0x0D, _MM_PERM_AADC = 0x0E,
77  _MM_PERM_AADD = 0x0F, _MM_PERM_ABAA = 0x10, _MM_PERM_ABAB = 0x11,
78  _MM_PERM_ABAC = 0x12, _MM_PERM_ABAD = 0x13, _MM_PERM_ABBA = 0x14,
79  _MM_PERM_ABBB = 0x15, _MM_PERM_ABBC = 0x16, _MM_PERM_ABBD = 0x17,
80  _MM_PERM_ABCA = 0x18, _MM_PERM_ABCB = 0x19, _MM_PERM_ABCC = 0x1A,
81  _MM_PERM_ABCD = 0x1B, _MM_PERM_ABDA = 0x1C, _MM_PERM_ABDB = 0x1D,
82  _MM_PERM_ABDC = 0x1E, _MM_PERM_ABDD = 0x1F, _MM_PERM_ACAA = 0x20,
83  _MM_PERM_ACAB = 0x21, _MM_PERM_ACAC = 0x22, _MM_PERM_ACAD = 0x23,
84  _MM_PERM_ACBA = 0x24, _MM_PERM_ACBB = 0x25, _MM_PERM_ACBC = 0x26,
85  _MM_PERM_ACBD = 0x27, _MM_PERM_ACCA = 0x28, _MM_PERM_ACCB = 0x29,
86  _MM_PERM_ACCC = 0x2A, _MM_PERM_ACCD = 0x2B, _MM_PERM_ACDA = 0x2C,
87  _MM_PERM_ACDB = 0x2D, _MM_PERM_ACDC = 0x2E, _MM_PERM_ACDD = 0x2F,
88  _MM_PERM_ADAA = 0x30, _MM_PERM_ADAB = 0x31, _MM_PERM_ADAC = 0x32,
89  _MM_PERM_ADAD = 0x33, _MM_PERM_ADBA = 0x34, _MM_PERM_ADBB = 0x35,
90  _MM_PERM_ADBC = 0x36, _MM_PERM_ADBD = 0x37, _MM_PERM_ADCA = 0x38,
91  _MM_PERM_ADCB = 0x39, _MM_PERM_ADCC = 0x3A, _MM_PERM_ADCD = 0x3B,
92  _MM_PERM_ADDA = 0x3C, _MM_PERM_ADDB = 0x3D, _MM_PERM_ADDC = 0x3E,
93  _MM_PERM_ADDD = 0x3F, _MM_PERM_BAAA = 0x40, _MM_PERM_BAAB = 0x41,
94  _MM_PERM_BAAC = 0x42, _MM_PERM_BAAD = 0x43, _MM_PERM_BABA = 0x44,
95  _MM_PERM_BABB = 0x45, _MM_PERM_BABC = 0x46, _MM_PERM_BABD = 0x47,
96  _MM_PERM_BACA = 0x48, _MM_PERM_BACB = 0x49, _MM_PERM_BACC = 0x4A,
97  _MM_PERM_BACD = 0x4B, _MM_PERM_BADA = 0x4C, _MM_PERM_BADB = 0x4D,
98  _MM_PERM_BADC = 0x4E, _MM_PERM_BADD = 0x4F, _MM_PERM_BBAA = 0x50,
99  _MM_PERM_BBAB = 0x51, _MM_PERM_BBAC = 0x52, _MM_PERM_BBAD = 0x53,
100  _MM_PERM_BBBA = 0x54, _MM_PERM_BBBB = 0x55, _MM_PERM_BBBC = 0x56,
101  _MM_PERM_BBBD = 0x57, _MM_PERM_BBCA = 0x58, _MM_PERM_BBCB = 0x59,
102  _MM_PERM_BBCC = 0x5A, _MM_PERM_BBCD = 0x5B, _MM_PERM_BBDA = 0x5C,
103  _MM_PERM_BBDB = 0x5D, _MM_PERM_BBDC = 0x5E, _MM_PERM_BBDD = 0x5F,
104  _MM_PERM_BCAA = 0x60, _MM_PERM_BCAB = 0x61, _MM_PERM_BCAC = 0x62,
105  _MM_PERM_BCAD = 0x63, _MM_PERM_BCBA = 0x64, _MM_PERM_BCBB = 0x65,
106  _MM_PERM_BCBC = 0x66, _MM_PERM_BCBD = 0x67, _MM_PERM_BCCA = 0x68,
107  _MM_PERM_BCCB = 0x69, _MM_PERM_BCCC = 0x6A, _MM_PERM_BCCD = 0x6B,
108  _MM_PERM_BCDA = 0x6C, _MM_PERM_BCDB = 0x6D, _MM_PERM_BCDC = 0x6E,
109  _MM_PERM_BCDD = 0x6F, _MM_PERM_BDAA = 0x70, _MM_PERM_BDAB = 0x71,
110  _MM_PERM_BDAC = 0x72, _MM_PERM_BDAD = 0x73, _MM_PERM_BDBA = 0x74,
111  _MM_PERM_BDBB = 0x75, _MM_PERM_BDBC = 0x76, _MM_PERM_BDBD = 0x77,
112  _MM_PERM_BDCA = 0x78, _MM_PERM_BDCB = 0x79, _MM_PERM_BDCC = 0x7A,
113  _MM_PERM_BDCD = 0x7B, _MM_PERM_BDDA = 0x7C, _MM_PERM_BDDB = 0x7D,
114  _MM_PERM_BDDC = 0x7E, _MM_PERM_BDDD = 0x7F, _MM_PERM_CAAA = 0x80,
115  _MM_PERM_CAAB = 0x81, _MM_PERM_CAAC = 0x82, _MM_PERM_CAAD = 0x83,
116  _MM_PERM_CABA = 0x84, _MM_PERM_CABB = 0x85, _MM_PERM_CABC = 0x86,
117  _MM_PERM_CABD = 0x87, _MM_PERM_CACA = 0x88, _MM_PERM_CACB = 0x89,
118  _MM_PERM_CACC = 0x8A, _MM_PERM_CACD = 0x8B, _MM_PERM_CADA = 0x8C,
119  _MM_PERM_CADB = 0x8D, _MM_PERM_CADC = 0x8E, _MM_PERM_CADD = 0x8F,
120  _MM_PERM_CBAA = 0x90, _MM_PERM_CBAB = 0x91, _MM_PERM_CBAC = 0x92,
121  _MM_PERM_CBAD = 0x93, _MM_PERM_CBBA = 0x94, _MM_PERM_CBBB = 0x95,
122  _MM_PERM_CBBC = 0x96, _MM_PERM_CBBD = 0x97, _MM_PERM_CBCA = 0x98,
123  _MM_PERM_CBCB = 0x99, _MM_PERM_CBCC = 0x9A, _MM_PERM_CBCD = 0x9B,
124  _MM_PERM_CBDA = 0x9C, _MM_PERM_CBDB = 0x9D, _MM_PERM_CBDC = 0x9E,
125  _MM_PERM_CBDD = 0x9F, _MM_PERM_CCAA = 0xA0, _MM_PERM_CCAB = 0xA1,
126  _MM_PERM_CCAC = 0xA2, _MM_PERM_CCAD = 0xA3, _MM_PERM_CCBA = 0xA4,
127  _MM_PERM_CCBB = 0xA5, _MM_PERM_CCBC = 0xA6, _MM_PERM_CCBD = 0xA7,
128  _MM_PERM_CCCA = 0xA8, _MM_PERM_CCCB = 0xA9, _MM_PERM_CCCC = 0xAA,
129  _MM_PERM_CCCD = 0xAB, _MM_PERM_CCDA = 0xAC, _MM_PERM_CCDB = 0xAD,
130  _MM_PERM_CCDC = 0xAE, _MM_PERM_CCDD = 0xAF, _MM_PERM_CDAA = 0xB0,
131  _MM_PERM_CDAB = 0xB1, _MM_PERM_CDAC = 0xB2, _MM_PERM_CDAD = 0xB3,
132  _MM_PERM_CDBA = 0xB4, _MM_PERM_CDBB = 0xB5, _MM_PERM_CDBC = 0xB6,
133  _MM_PERM_CDBD = 0xB7, _MM_PERM_CDCA = 0xB8, _MM_PERM_CDCB = 0xB9,
134  _MM_PERM_CDCC = 0xBA, _MM_PERM_CDCD = 0xBB, _MM_PERM_CDDA = 0xBC,
135  _MM_PERM_CDDB = 0xBD, _MM_PERM_CDDC = 0xBE, _MM_PERM_CDDD = 0xBF,
136  _MM_PERM_DAAA = 0xC0, _MM_PERM_DAAB = 0xC1, _MM_PERM_DAAC = 0xC2,
137  _MM_PERM_DAAD = 0xC3, _MM_PERM_DABA = 0xC4, _MM_PERM_DABB = 0xC5,
138  _MM_PERM_DABC = 0xC6, _MM_PERM_DABD = 0xC7, _MM_PERM_DACA = 0xC8,
139  _MM_PERM_DACB = 0xC9, _MM_PERM_DACC = 0xCA, _MM_PERM_DACD = 0xCB,
140  _MM_PERM_DADA = 0xCC, _MM_PERM_DADB = 0xCD, _MM_PERM_DADC = 0xCE,
141  _MM_PERM_DADD = 0xCF, _MM_PERM_DBAA = 0xD0, _MM_PERM_DBAB = 0xD1,
142  _MM_PERM_DBAC = 0xD2, _MM_PERM_DBAD = 0xD3, _MM_PERM_DBBA = 0xD4,
143  _MM_PERM_DBBB = 0xD5, _MM_PERM_DBBC = 0xD6, _MM_PERM_DBBD = 0xD7,
144  _MM_PERM_DBCA = 0xD8, _MM_PERM_DBCB = 0xD9, _MM_PERM_DBCC = 0xDA,
145  _MM_PERM_DBCD = 0xDB, _MM_PERM_DBDA = 0xDC, _MM_PERM_DBDB = 0xDD,
146  _MM_PERM_DBDC = 0xDE, _MM_PERM_DBDD = 0xDF, _MM_PERM_DCAA = 0xE0,
147  _MM_PERM_DCAB = 0xE1, _MM_PERM_DCAC = 0xE2, _MM_PERM_DCAD = 0xE3,
148  _MM_PERM_DCBA = 0xE4, _MM_PERM_DCBB = 0xE5, _MM_PERM_DCBC = 0xE6,
149  _MM_PERM_DCBD = 0xE7, _MM_PERM_DCCA = 0xE8, _MM_PERM_DCCB = 0xE9,
150  _MM_PERM_DCCC = 0xEA, _MM_PERM_DCCD = 0xEB, _MM_PERM_DCDA = 0xEC,
151  _MM_PERM_DCDB = 0xED, _MM_PERM_DCDC = 0xEE, _MM_PERM_DCDD = 0xEF,
152  _MM_PERM_DDAA = 0xF0, _MM_PERM_DDAB = 0xF1, _MM_PERM_DDAC = 0xF2,
153  _MM_PERM_DDAD = 0xF3, _MM_PERM_DDBA = 0xF4, _MM_PERM_DDBB = 0xF5,
154  _MM_PERM_DDBC = 0xF6, _MM_PERM_DDBD = 0xF7, _MM_PERM_DDCA = 0xF8,
155  _MM_PERM_DDCB = 0xF9, _MM_PERM_DDCC = 0xFA, _MM_PERM_DDCD = 0xFB,
156  _MM_PERM_DDDA = 0xFC, _MM_PERM_DDDB = 0xFD, _MM_PERM_DDDC = 0xFE,
158 } _MM_PERM_ENUM;
159 
160 typedef enum
161 {
162  _MM_MANT_NORM_1_2, /* interval [1, 2) */
163  _MM_MANT_NORM_p5_2, /* interval [0.5, 2) */
164  _MM_MANT_NORM_p5_1, /* interval [0.5, 1) */
165  _MM_MANT_NORM_p75_1p5 /* interval [0.75, 1.5) */
167 
168 typedef enum
169 {
170  _MM_MANT_SIGN_src, /* sign = sign(SRC) */
171  _MM_MANT_SIGN_zero, /* sign = 0 */
172  _MM_MANT_SIGN_nan /* DEST = NaN if sign(SRC) = 1 */
174 
175 /* Define the default attributes for the functions in this file. */
176 #define __DEFAULT_FN_ATTRS512 __attribute__((__always_inline__, __nodebug__, __target__("avx512f"), __min_vector_width__(512)))
177 #define __DEFAULT_FN_ATTRS128 __attribute__((__always_inline__, __nodebug__, __target__("avx512f"), __min_vector_width__(128)))
178 
179 /* Create vectors with repeated elements */
180 
181 static __inline __m512i __DEFAULT_FN_ATTRS512
183 {
184  return __extension__ (__m512i)(__v8di){ 0, 0, 0, 0, 0, 0, 0, 0 };
185 }
186 
187 #define _mm512_setzero_epi32 _mm512_setzero_si512
188 
189 static __inline__ __m512d __DEFAULT_FN_ATTRS512
191 {
192  return (__m512d)__builtin_ia32_undef512();
193 }
194 
195 static __inline__ __m512 __DEFAULT_FN_ATTRS512
197 {
198  return (__m512)__builtin_ia32_undef512();
199 }
200 
201 static __inline__ __m512 __DEFAULT_FN_ATTRS512
203 {
204  return (__m512)__builtin_ia32_undef512();
205 }
206 
207 static __inline__ __m512i __DEFAULT_FN_ATTRS512
209 {
210  return (__m512i)__builtin_ia32_undef512();
211 }
212 
213 static __inline__ __m512i __DEFAULT_FN_ATTRS512
215 {
216  return (__m512i)__builtin_shufflevector((__v4si) __A, (__v4si) __A,
217  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
218 }
219 
220 static __inline__ __m512i __DEFAULT_FN_ATTRS512
221 _mm512_mask_broadcastd_epi32 (__m512i __O, __mmask16 __M, __m128i __A)
222 {
223  return (__m512i)__builtin_ia32_selectd_512(__M,
224  (__v16si) _mm512_broadcastd_epi32(__A),
225  (__v16si) __O);
226 }
227 
228 static __inline__ __m512i __DEFAULT_FN_ATTRS512
229 _mm512_maskz_broadcastd_epi32 (__mmask16 __M, __m128i __A)
230 {
231  return (__m512i)__builtin_ia32_selectd_512(__M,
232  (__v16si) _mm512_broadcastd_epi32(__A),
233  (__v16si) _mm512_setzero_si512());
234 }
235 
236 static __inline__ __m512i __DEFAULT_FN_ATTRS512
238 {
239  return (__m512i)__builtin_shufflevector((__v2di) __A, (__v2di) __A,
240  0, 0, 0, 0, 0, 0, 0, 0);
241 }
242 
243 static __inline__ __m512i __DEFAULT_FN_ATTRS512
244 _mm512_mask_broadcastq_epi64 (__m512i __O, __mmask8 __M, __m128i __A)
245 {
246  return (__m512i)__builtin_ia32_selectq_512(__M,
247  (__v8di) _mm512_broadcastq_epi64(__A),
248  (__v8di) __O);
249 
250 }
251 
252 static __inline__ __m512i __DEFAULT_FN_ATTRS512
253 _mm512_maskz_broadcastq_epi64 (__mmask8 __M, __m128i __A)
254 {
255  return (__m512i)__builtin_ia32_selectq_512(__M,
256  (__v8di) _mm512_broadcastq_epi64(__A),
257  (__v8di) _mm512_setzero_si512());
258 }
259 
260 
261 static __inline __m512 __DEFAULT_FN_ATTRS512
263 {
264  return __extension__ (__m512){ 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0,
265  0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0 };
266 }
267 
268 #define _mm512_setzero _mm512_setzero_ps
269 
270 static __inline __m512d __DEFAULT_FN_ATTRS512
272 {
273  return __extension__ (__m512d){ 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0 };
274 }
275 
276 static __inline __m512 __DEFAULT_FN_ATTRS512
277 _mm512_set1_ps(float __w)
278 {
279  return __extension__ (__m512){ __w, __w, __w, __w, __w, __w, __w, __w,
280  __w, __w, __w, __w, __w, __w, __w, __w };
281 }
282 
283 static __inline __m512d __DEFAULT_FN_ATTRS512
284 _mm512_set1_pd(double __w)
285 {
286  return __extension__ (__m512d){ __w, __w, __w, __w, __w, __w, __w, __w };
287 }
288 
289 static __inline __m512i __DEFAULT_FN_ATTRS512
291 {
292  return __extension__ (__m512i)(__v64qi){
293  __w, __w, __w, __w, __w, __w, __w, __w,
294  __w, __w, __w, __w, __w, __w, __w, __w,
295  __w, __w, __w, __w, __w, __w, __w, __w,
296  __w, __w, __w, __w, __w, __w, __w, __w,
297  __w, __w, __w, __w, __w, __w, __w, __w,
298  __w, __w, __w, __w, __w, __w, __w, __w,
299  __w, __w, __w, __w, __w, __w, __w, __w,
300  __w, __w, __w, __w, __w, __w, __w, __w };
301 }
302 
303 static __inline __m512i __DEFAULT_FN_ATTRS512
305 {
306  return __extension__ (__m512i)(__v32hi){
307  __w, __w, __w, __w, __w, __w, __w, __w,
308  __w, __w, __w, __w, __w, __w, __w, __w,
309  __w, __w, __w, __w, __w, __w, __w, __w,
310  __w, __w, __w, __w, __w, __w, __w, __w };
311 }
312 
313 static __inline __m512i __DEFAULT_FN_ATTRS512
315 {
316  return __extension__ (__m512i)(__v16si){
317  __s, __s, __s, __s, __s, __s, __s, __s,
318  __s, __s, __s, __s, __s, __s, __s, __s };
319 }
320 
321 static __inline __m512i __DEFAULT_FN_ATTRS512
322 _mm512_maskz_set1_epi32(__mmask16 __M, int __A)
323 {
324  return (__m512i)__builtin_ia32_selectd_512(__M,
325  (__v16si)_mm512_set1_epi32(__A),
326  (__v16si)_mm512_setzero_si512());
327 }
328 
329 static __inline __m512i __DEFAULT_FN_ATTRS512
330 _mm512_set1_epi64(long long __d)
331 {
332  return __extension__(__m512i)(__v8di){ __d, __d, __d, __d, __d, __d, __d, __d };
333 }
334 
335 static __inline __m512i __DEFAULT_FN_ATTRS512
336 _mm512_maskz_set1_epi64(__mmask8 __M, long long __A)
337 {
338  return (__m512i)__builtin_ia32_selectq_512(__M,
339  (__v8di)_mm512_set1_epi64(__A),
340  (__v8di)_mm512_setzero_si512());
341 }
342 
343 static __inline__ __m512 __DEFAULT_FN_ATTRS512
345 {
346  return (__m512)__builtin_shufflevector((__v4sf) __A, (__v4sf) __A,
347  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
348 }
349 
350 static __inline __m512i __DEFAULT_FN_ATTRS512
351 _mm512_set4_epi32 (int __A, int __B, int __C, int __D)
352 {
353  return __extension__ (__m512i)(__v16si)
354  { __D, __C, __B, __A, __D, __C, __B, __A,
355  __D, __C, __B, __A, __D, __C, __B, __A };
356 }
357 
358 static __inline __m512i __DEFAULT_FN_ATTRS512
359 _mm512_set4_epi64 (long long __A, long long __B, long long __C,
360  long long __D)
361 {
362  return __extension__ (__m512i) (__v8di)
363  { __D, __C, __B, __A, __D, __C, __B, __A };
364 }
365 
366 static __inline __m512d __DEFAULT_FN_ATTRS512
367 _mm512_set4_pd (double __A, double __B, double __C, double __D)
368 {
369  return __extension__ (__m512d)
370  { __D, __C, __B, __A, __D, __C, __B, __A };
371 }
372 
373 static __inline __m512 __DEFAULT_FN_ATTRS512
374 _mm512_set4_ps (float __A, float __B, float __C, float __D)
375 {
376  return __extension__ (__m512)
377  { __D, __C, __B, __A, __D, __C, __B, __A,
378  __D, __C, __B, __A, __D, __C, __B, __A };
379 }
380 
381 #define _mm512_setr4_epi32(e0,e1,e2,e3) \
382  _mm512_set4_epi32((e3),(e2),(e1),(e0))
383 
384 #define _mm512_setr4_epi64(e0,e1,e2,e3) \
385  _mm512_set4_epi64((e3),(e2),(e1),(e0))
386 
387 #define _mm512_setr4_pd(e0,e1,e2,e3) \
388  _mm512_set4_pd((e3),(e2),(e1),(e0))
389 
390 #define _mm512_setr4_ps(e0,e1,e2,e3) \
391  _mm512_set4_ps((e3),(e2),(e1),(e0))
392 
393 static __inline__ __m512d __DEFAULT_FN_ATTRS512
395 {
396  return (__m512d)__builtin_shufflevector((__v2df) __A, (__v2df) __A,
397  0, 0, 0, 0, 0, 0, 0, 0);
398 }
399 
400 /* Cast between vector types */
401 
402 static __inline __m512d __DEFAULT_FN_ATTRS512
404 {
405  return __builtin_shufflevector(__a, __a, 0, 1, 2, 3, -1, -1, -1, -1);
406 }
407 
408 static __inline __m512 __DEFAULT_FN_ATTRS512
410 {
411  return __builtin_shufflevector(__a, __a, 0, 1, 2, 3, 4, 5, 6, 7,
412  -1, -1, -1, -1, -1, -1, -1, -1);
413 }
414 
415 static __inline __m128d __DEFAULT_FN_ATTRS512
417 {
418  return __builtin_shufflevector(__a, __a, 0, 1);
419 }
420 
421 static __inline __m256d __DEFAULT_FN_ATTRS512
423 {
424  return __builtin_shufflevector(__A, __A, 0, 1, 2, 3);
425 }
426 
427 static __inline __m128 __DEFAULT_FN_ATTRS512
429 {
430  return __builtin_shufflevector(__a, __a, 0, 1, 2, 3);
431 }
432 
433 static __inline __m256 __DEFAULT_FN_ATTRS512
435 {
436  return __builtin_shufflevector(__A, __A, 0, 1, 2, 3, 4, 5, 6, 7);
437 }
438 
439 static __inline __m512 __DEFAULT_FN_ATTRS512
440 _mm512_castpd_ps (__m512d __A)
441 {
442  return (__m512) (__A);
443 }
444 
445 static __inline __m512i __DEFAULT_FN_ATTRS512
446 _mm512_castpd_si512 (__m512d __A)
447 {
448  return (__m512i) (__A);
449 }
450 
451 static __inline__ __m512d __DEFAULT_FN_ATTRS512
453 {
454  return __builtin_shufflevector( __A, __A, 0, 1, -1, -1, -1, -1, -1, -1);
455 }
456 
457 static __inline __m512d __DEFAULT_FN_ATTRS512
458 _mm512_castps_pd (__m512 __A)
459 {
460  return (__m512d) (__A);
461 }
462 
463 static __inline __m512i __DEFAULT_FN_ATTRS512
465 {
466  return (__m512i) (__A);
467 }
468 
469 static __inline__ __m512 __DEFAULT_FN_ATTRS512
471 {
472  return __builtin_shufflevector( __A, __A, 0, 1, 2, 3, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1);
473 }
474 
475 static __inline__ __m512i __DEFAULT_FN_ATTRS512
477 {
478  return __builtin_shufflevector( __A, __A, 0, 1, -1, -1, -1, -1, -1, -1);
479 }
480 
481 static __inline__ __m512i __DEFAULT_FN_ATTRS512
483 {
484  return __builtin_shufflevector( __A, __A, 0, 1, 2, 3, -1, -1, -1, -1);
485 }
486 
487 static __inline __m512 __DEFAULT_FN_ATTRS512
488 _mm512_castsi512_ps (__m512i __A)
489 {
490  return (__m512) (__A);
491 }
492 
493 static __inline __m512d __DEFAULT_FN_ATTRS512
494 _mm512_castsi512_pd (__m512i __A)
495 {
496  return (__m512d) (__A);
497 }
498 
499 static __inline __m128i __DEFAULT_FN_ATTRS512
501 {
502  return (__m128i)__builtin_shufflevector(__A, __A , 0, 1);
503 }
504 
505 static __inline __m256i __DEFAULT_FN_ATTRS512
507 {
508  return (__m256i)__builtin_shufflevector(__A, __A , 0, 1, 2, 3);
509 }
510 
511 static __inline__ __mmask16 __DEFAULT_FN_ATTRS512
513 {
514  return (__mmask16)__a;
515 }
516 
517 static __inline__ int __DEFAULT_FN_ATTRS512
519 {
520  return (int)__a;
521 }
522 
523 /// Constructs a 512-bit floating-point vector of [8 x double] from a
524 /// 128-bit floating-point vector of [2 x double]. The lower 128 bits
525 /// contain the value of the source vector. The upper 384 bits are set
526 /// to zero.
527 ///
528 /// \headerfile <x86intrin.h>
529 ///
530 /// This intrinsic has no corresponding instruction.
531 ///
532 /// \param __a
533 /// A 128-bit vector of [2 x double].
534 /// \returns A 512-bit floating-point vector of [8 x double]. The lower 128 bits
535 /// contain the value of the parameter. The upper 384 bits are set to zero.
536 static __inline __m512d __DEFAULT_FN_ATTRS512
538 {
539  return __builtin_shufflevector((__v2df)__a, (__v2df)_mm_setzero_pd(), 0, 1, 2, 3, 2, 3, 2, 3);
540 }
541 
542 /// Constructs a 512-bit floating-point vector of [8 x double] from a
543 /// 256-bit floating-point vector of [4 x double]. The lower 256 bits
544 /// contain the value of the source vector. The upper 256 bits are set
545 /// to zero.
546 ///
547 /// \headerfile <x86intrin.h>
548 ///
549 /// This intrinsic has no corresponding instruction.
550 ///
551 /// \param __a
552 /// A 256-bit vector of [4 x double].
553 /// \returns A 512-bit floating-point vector of [8 x double]. The lower 256 bits
554 /// contain the value of the parameter. The upper 256 bits are set to zero.
555 static __inline __m512d __DEFAULT_FN_ATTRS512
557 {
558  return __builtin_shufflevector((__v4df)__a, (__v4df)_mm256_setzero_pd(), 0, 1, 2, 3, 4, 5, 6, 7);
559 }
560 
561 /// Constructs a 512-bit floating-point vector of [16 x float] from a
562 /// 128-bit floating-point vector of [4 x float]. The lower 128 bits contain
563 /// the value of the source vector. The upper 384 bits are set to zero.
564 ///
565 /// \headerfile <x86intrin.h>
566 ///
567 /// This intrinsic has no corresponding instruction.
568 ///
569 /// \param __a
570 /// A 128-bit vector of [4 x float].
571 /// \returns A 512-bit floating-point vector of [16 x float]. The lower 128 bits
572 /// contain the value of the parameter. The upper 384 bits are set to zero.
573 static __inline __m512 __DEFAULT_FN_ATTRS512
575 {
576  return __builtin_shufflevector((__v4sf)__a, (__v4sf)_mm_setzero_ps(), 0, 1, 2, 3, 4, 5, 6, 7, 4, 5, 6, 7, 4, 5, 6, 7);
577 }
578 
579 /// Constructs a 512-bit floating-point vector of [16 x float] from a
580 /// 256-bit floating-point vector of [8 x float]. The lower 256 bits contain
581 /// the value of the source vector. The upper 256 bits are set to zero.
582 ///
583 /// \headerfile <x86intrin.h>
584 ///
585 /// This intrinsic has no corresponding instruction.
586 ///
587 /// \param __a
588 /// A 256-bit vector of [8 x float].
589 /// \returns A 512-bit floating-point vector of [16 x float]. The lower 256 bits
590 /// contain the value of the parameter. The upper 256 bits are set to zero.
591 static __inline __m512 __DEFAULT_FN_ATTRS512
593 {
594  return __builtin_shufflevector((__v8sf)__a, (__v8sf)_mm256_setzero_ps(), 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
595 }
596 
597 /// Constructs a 512-bit integer vector from a 128-bit integer vector.
598 /// The lower 128 bits contain the value of the source vector. The upper
599 /// 384 bits are set to zero.
600 ///
601 /// \headerfile <x86intrin.h>
602 ///
603 /// This intrinsic has no corresponding instruction.
604 ///
605 /// \param __a
606 /// A 128-bit integer vector.
607 /// \returns A 512-bit integer vector. The lower 128 bits contain the value of
608 /// the parameter. The upper 384 bits are set to zero.
609 static __inline __m512i __DEFAULT_FN_ATTRS512
611 {
612  return __builtin_shufflevector((__v2di)__a, (__v2di)_mm_setzero_si128(), 0, 1, 2, 3, 2, 3, 2, 3);
613 }
614 
615 /// Constructs a 512-bit integer vector from a 256-bit integer vector.
616 /// The lower 256 bits contain the value of the source vector. The upper
617 /// 256 bits are set to zero.
618 ///
619 /// \headerfile <x86intrin.h>
620 ///
621 /// This intrinsic has no corresponding instruction.
622 ///
623 /// \param __a
624 /// A 256-bit integer vector.
625 /// \returns A 512-bit integer vector. The lower 256 bits contain the value of
626 /// the parameter. The upper 256 bits are set to zero.
627 static __inline __m512i __DEFAULT_FN_ATTRS512
629 {
630  return __builtin_shufflevector((__v4di)__a, (__v4di)_mm256_setzero_si256(), 0, 1, 2, 3, 4, 5, 6, 7);
631 }
632 
633 /* Bitwise operators */
634 static __inline__ __m512i __DEFAULT_FN_ATTRS512
635 _mm512_and_epi32(__m512i __a, __m512i __b)
636 {
637  return (__m512i)((__v16su)__a & (__v16su)__b);
638 }
639 
640 static __inline__ __m512i __DEFAULT_FN_ATTRS512
641 _mm512_mask_and_epi32(__m512i __src, __mmask16 __k, __m512i __a, __m512i __b)
642 {
643  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__k,
644  (__v16si) _mm512_and_epi32(__a, __b),
645  (__v16si) __src);
646 }
647 
648 static __inline__ __m512i __DEFAULT_FN_ATTRS512
649 _mm512_maskz_and_epi32(__mmask16 __k, __m512i __a, __m512i __b)
650 {
651  return (__m512i) _mm512_mask_and_epi32(_mm512_setzero_si512 (),
652  __k, __a, __b);
653 }
654 
655 static __inline__ __m512i __DEFAULT_FN_ATTRS512
656 _mm512_and_epi64(__m512i __a, __m512i __b)
657 {
658  return (__m512i)((__v8du)__a & (__v8du)__b);
659 }
660 
661 static __inline__ __m512i __DEFAULT_FN_ATTRS512
662 _mm512_mask_and_epi64(__m512i __src, __mmask8 __k, __m512i __a, __m512i __b)
663 {
664  return (__m512i) __builtin_ia32_selectq_512 ((__mmask8) __k,
665  (__v8di) _mm512_and_epi64(__a, __b),
666  (__v8di) __src);
667 }
668 
669 static __inline__ __m512i __DEFAULT_FN_ATTRS512
670 _mm512_maskz_and_epi64(__mmask8 __k, __m512i __a, __m512i __b)
671 {
672  return (__m512i) _mm512_mask_and_epi64(_mm512_setzero_si512 (),
673  __k, __a, __b);
674 }
675 
676 static __inline__ __m512i __DEFAULT_FN_ATTRS512
677 _mm512_andnot_si512 (__m512i __A, __m512i __B)
678 {
679  return (__m512i)(~(__v8du)__A & (__v8du)__B);
680 }
681 
682 static __inline__ __m512i __DEFAULT_FN_ATTRS512
683 _mm512_andnot_epi32 (__m512i __A, __m512i __B)
684 {
685  return (__m512i)(~(__v16su)__A & (__v16su)__B);
686 }
687 
688 static __inline__ __m512i __DEFAULT_FN_ATTRS512
689 _mm512_mask_andnot_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m512i __B)
690 {
691  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
692  (__v16si)_mm512_andnot_epi32(__A, __B),
693  (__v16si)__W);
694 }
695 
696 static __inline__ __m512i __DEFAULT_FN_ATTRS512
697 _mm512_maskz_andnot_epi32(__mmask16 __U, __m512i __A, __m512i __B)
698 {
700  __U, __A, __B);
701 }
702 
703 static __inline__ __m512i __DEFAULT_FN_ATTRS512
704 _mm512_andnot_epi64(__m512i __A, __m512i __B)
705 {
706  return (__m512i)(~(__v8du)__A & (__v8du)__B);
707 }
708 
709 static __inline__ __m512i __DEFAULT_FN_ATTRS512
710 _mm512_mask_andnot_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B)
711 {
712  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
713  (__v8di)_mm512_andnot_epi64(__A, __B),
714  (__v8di)__W);
715 }
716 
717 static __inline__ __m512i __DEFAULT_FN_ATTRS512
718 _mm512_maskz_andnot_epi64(__mmask8 __U, __m512i __A, __m512i __B)
719 {
721  __U, __A, __B);
722 }
723 
724 static __inline__ __m512i __DEFAULT_FN_ATTRS512
725 _mm512_or_epi32(__m512i __a, __m512i __b)
726 {
727  return (__m512i)((__v16su)__a | (__v16su)__b);
728 }
729 
730 static __inline__ __m512i __DEFAULT_FN_ATTRS512
731 _mm512_mask_or_epi32(__m512i __src, __mmask16 __k, __m512i __a, __m512i __b)
732 {
733  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__k,
734  (__v16si)_mm512_or_epi32(__a, __b),
735  (__v16si)__src);
736 }
737 
738 static __inline__ __m512i __DEFAULT_FN_ATTRS512
739 _mm512_maskz_or_epi32(__mmask16 __k, __m512i __a, __m512i __b)
740 {
741  return (__m512i)_mm512_mask_or_epi32(_mm512_setzero_si512(), __k, __a, __b);
742 }
743 
744 static __inline__ __m512i __DEFAULT_FN_ATTRS512
745 _mm512_or_epi64(__m512i __a, __m512i __b)
746 {
747  return (__m512i)((__v8du)__a | (__v8du)__b);
748 }
749 
750 static __inline__ __m512i __DEFAULT_FN_ATTRS512
751 _mm512_mask_or_epi64(__m512i __src, __mmask8 __k, __m512i __a, __m512i __b)
752 {
753  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__k,
754  (__v8di)_mm512_or_epi64(__a, __b),
755  (__v8di)__src);
756 }
757 
758 static __inline__ __m512i __DEFAULT_FN_ATTRS512
759 _mm512_maskz_or_epi64(__mmask8 __k, __m512i __a, __m512i __b)
760 {
761  return (__m512i)_mm512_mask_or_epi64(_mm512_setzero_si512(), __k, __a, __b);
762 }
763 
764 static __inline__ __m512i __DEFAULT_FN_ATTRS512
765 _mm512_xor_epi32(__m512i __a, __m512i __b)
766 {
767  return (__m512i)((__v16su)__a ^ (__v16su)__b);
768 }
769 
770 static __inline__ __m512i __DEFAULT_FN_ATTRS512
771 _mm512_mask_xor_epi32(__m512i __src, __mmask16 __k, __m512i __a, __m512i __b)
772 {
773  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__k,
774  (__v16si)_mm512_xor_epi32(__a, __b),
775  (__v16si)__src);
776 }
777 
778 static __inline__ __m512i __DEFAULT_FN_ATTRS512
779 _mm512_maskz_xor_epi32(__mmask16 __k, __m512i __a, __m512i __b)
780 {
781  return (__m512i)_mm512_mask_xor_epi32(_mm512_setzero_si512(), __k, __a, __b);
782 }
783 
784 static __inline__ __m512i __DEFAULT_FN_ATTRS512
785 _mm512_xor_epi64(__m512i __a, __m512i __b)
786 {
787  return (__m512i)((__v8du)__a ^ (__v8du)__b);
788 }
789 
790 static __inline__ __m512i __DEFAULT_FN_ATTRS512
791 _mm512_mask_xor_epi64(__m512i __src, __mmask8 __k, __m512i __a, __m512i __b)
792 {
793  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__k,
794  (__v8di)_mm512_xor_epi64(__a, __b),
795  (__v8di)__src);
796 }
797 
798 static __inline__ __m512i __DEFAULT_FN_ATTRS512
799 _mm512_maskz_xor_epi64(__mmask8 __k, __m512i __a, __m512i __b)
800 {
801  return (__m512i)_mm512_mask_xor_epi64(_mm512_setzero_si512(), __k, __a, __b);
802 }
803 
804 static __inline__ __m512i __DEFAULT_FN_ATTRS512
805 _mm512_and_si512(__m512i __a, __m512i __b)
806 {
807  return (__m512i)((__v8du)__a & (__v8du)__b);
808 }
809 
810 static __inline__ __m512i __DEFAULT_FN_ATTRS512
811 _mm512_or_si512(__m512i __a, __m512i __b)
812 {
813  return (__m512i)((__v8du)__a | (__v8du)__b);
814 }
815 
816 static __inline__ __m512i __DEFAULT_FN_ATTRS512
817 _mm512_xor_si512(__m512i __a, __m512i __b)
818 {
819  return (__m512i)((__v8du)__a ^ (__v8du)__b);
820 }
821 
822 /* Arithmetic */
823 
824 static __inline __m512d __DEFAULT_FN_ATTRS512
825 _mm512_add_pd(__m512d __a, __m512d __b)
826 {
827  return (__m512d)((__v8df)__a + (__v8df)__b);
828 }
829 
830 static __inline __m512 __DEFAULT_FN_ATTRS512
831 _mm512_add_ps(__m512 __a, __m512 __b)
832 {
833  return (__m512)((__v16sf)__a + (__v16sf)__b);
834 }
835 
836 static __inline __m512d __DEFAULT_FN_ATTRS512
837 _mm512_mul_pd(__m512d __a, __m512d __b)
838 {
839  return (__m512d)((__v8df)__a * (__v8df)__b);
840 }
841 
842 static __inline __m512 __DEFAULT_FN_ATTRS512
843 _mm512_mul_ps(__m512 __a, __m512 __b)
844 {
845  return (__m512)((__v16sf)__a * (__v16sf)__b);
846 }
847 
848 static __inline __m512d __DEFAULT_FN_ATTRS512
849 _mm512_sub_pd(__m512d __a, __m512d __b)
850 {
851  return (__m512d)((__v8df)__a - (__v8df)__b);
852 }
853 
854 static __inline __m512 __DEFAULT_FN_ATTRS512
855 _mm512_sub_ps(__m512 __a, __m512 __b)
856 {
857  return (__m512)((__v16sf)__a - (__v16sf)__b);
858 }
859 
860 static __inline__ __m512i __DEFAULT_FN_ATTRS512
861 _mm512_add_epi64 (__m512i __A, __m512i __B)
862 {
863  return (__m512i) ((__v8du) __A + (__v8du) __B);
864 }
865 
866 static __inline__ __m512i __DEFAULT_FN_ATTRS512
867 _mm512_mask_add_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B)
868 {
869  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
870  (__v8di)_mm512_add_epi64(__A, __B),
871  (__v8di)__W);
872 }
873 
874 static __inline__ __m512i __DEFAULT_FN_ATTRS512
875 _mm512_maskz_add_epi64(__mmask8 __U, __m512i __A, __m512i __B)
876 {
877  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
878  (__v8di)_mm512_add_epi64(__A, __B),
879  (__v8di)_mm512_setzero_si512());
880 }
881 
882 static __inline__ __m512i __DEFAULT_FN_ATTRS512
883 _mm512_sub_epi64 (__m512i __A, __m512i __B)
884 {
885  return (__m512i) ((__v8du) __A - (__v8du) __B);
886 }
887 
888 static __inline__ __m512i __DEFAULT_FN_ATTRS512
889 _mm512_mask_sub_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B)
890 {
891  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
892  (__v8di)_mm512_sub_epi64(__A, __B),
893  (__v8di)__W);
894 }
895 
896 static __inline__ __m512i __DEFAULT_FN_ATTRS512
897 _mm512_maskz_sub_epi64(__mmask8 __U, __m512i __A, __m512i __B)
898 {
899  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
900  (__v8di)_mm512_sub_epi64(__A, __B),
901  (__v8di)_mm512_setzero_si512());
902 }
903 
904 static __inline__ __m512i __DEFAULT_FN_ATTRS512
905 _mm512_add_epi32 (__m512i __A, __m512i __B)
906 {
907  return (__m512i) ((__v16su) __A + (__v16su) __B);
908 }
909 
910 static __inline__ __m512i __DEFAULT_FN_ATTRS512
911 _mm512_mask_add_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m512i __B)
912 {
913  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
914  (__v16si)_mm512_add_epi32(__A, __B),
915  (__v16si)__W);
916 }
917 
918 static __inline__ __m512i __DEFAULT_FN_ATTRS512
919 _mm512_maskz_add_epi32 (__mmask16 __U, __m512i __A, __m512i __B)
920 {
921  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
922  (__v16si)_mm512_add_epi32(__A, __B),
923  (__v16si)_mm512_setzero_si512());
924 }
925 
926 static __inline__ __m512i __DEFAULT_FN_ATTRS512
927 _mm512_sub_epi32 (__m512i __A, __m512i __B)
928 {
929  return (__m512i) ((__v16su) __A - (__v16su) __B);
930 }
931 
932 static __inline__ __m512i __DEFAULT_FN_ATTRS512
933 _mm512_mask_sub_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m512i __B)
934 {
935  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
936  (__v16si)_mm512_sub_epi32(__A, __B),
937  (__v16si)__W);
938 }
939 
940 static __inline__ __m512i __DEFAULT_FN_ATTRS512
941 _mm512_maskz_sub_epi32(__mmask16 __U, __m512i __A, __m512i __B)
942 {
943  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
944  (__v16si)_mm512_sub_epi32(__A, __B),
945  (__v16si)_mm512_setzero_si512());
946 }
947 
948 #define _mm512_max_round_pd(A, B, R) \
949  (__m512d)__builtin_ia32_maxpd512((__v8df)(__m512d)(A), \
950  (__v8df)(__m512d)(B), (int)(R))
951 
952 #define _mm512_mask_max_round_pd(W, U, A, B, R) \
953  (__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \
954  (__v8df)_mm512_max_round_pd((A), (B), (R)), \
955  (__v8df)(W))
956 
957 #define _mm512_maskz_max_round_pd(U, A, B, R) \
958  (__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \
959  (__v8df)_mm512_max_round_pd((A), (B), (R)), \
960  (__v8df)_mm512_setzero_pd())
961 
962 static __inline__ __m512d __DEFAULT_FN_ATTRS512
963 _mm512_max_pd(__m512d __A, __m512d __B)
964 {
965  return (__m512d) __builtin_ia32_maxpd512((__v8df) __A, (__v8df) __B,
967 }
968 
969 static __inline__ __m512d __DEFAULT_FN_ATTRS512
970 _mm512_mask_max_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d __B)
971 {
972  return (__m512d)__builtin_ia32_selectpd_512(__U,
973  (__v8df)_mm512_max_pd(__A, __B),
974  (__v8df)__W);
975 }
976 
977 static __inline__ __m512d __DEFAULT_FN_ATTRS512
978 _mm512_maskz_max_pd (__mmask8 __U, __m512d __A, __m512d __B)
979 {
980  return (__m512d)__builtin_ia32_selectpd_512(__U,
981  (__v8df)_mm512_max_pd(__A, __B),
982  (__v8df)_mm512_setzero_pd());
983 }
984 
985 #define _mm512_max_round_ps(A, B, R) \
986  (__m512)__builtin_ia32_maxps512((__v16sf)(__m512)(A), \
987  (__v16sf)(__m512)(B), (int)(R))
988 
989 #define _mm512_mask_max_round_ps(W, U, A, B, R) \
990  (__m512)__builtin_ia32_selectps_512((__mmask16)(U), \
991  (__v16sf)_mm512_max_round_ps((A), (B), (R)), \
992  (__v16sf)(W))
993 
994 #define _mm512_maskz_max_round_ps(U, A, B, R) \
995  (__m512)__builtin_ia32_selectps_512((__mmask16)(U), \
996  (__v16sf)_mm512_max_round_ps((A), (B), (R)), \
997  (__v16sf)_mm512_setzero_ps())
998 
999 static __inline__ __m512 __DEFAULT_FN_ATTRS512
1000 _mm512_max_ps(__m512 __A, __m512 __B)
1001 {
1002  return (__m512) __builtin_ia32_maxps512((__v16sf) __A, (__v16sf) __B,
1004 }
1005 
1006 static __inline__ __m512 __DEFAULT_FN_ATTRS512
1007 _mm512_mask_max_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B)
1008 {
1009  return (__m512)__builtin_ia32_selectps_512(__U,
1010  (__v16sf)_mm512_max_ps(__A, __B),
1011  (__v16sf)__W);
1012 }
1013 
1014 static __inline__ __m512 __DEFAULT_FN_ATTRS512
1015 _mm512_maskz_max_ps (__mmask16 __U, __m512 __A, __m512 __B)
1016 {
1017  return (__m512)__builtin_ia32_selectps_512(__U,
1018  (__v16sf)_mm512_max_ps(__A, __B),
1019  (__v16sf)_mm512_setzero_ps());
1020 }
1021 
1022 static __inline__ __m128 __DEFAULT_FN_ATTRS128
1023 _mm_mask_max_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) {
1024  return (__m128) __builtin_ia32_maxss_round_mask ((__v4sf) __A,
1025  (__v4sf) __B,
1026  (__v4sf) __W,
1027  (__mmask8) __U,
1029 }
1030 
1031 static __inline__ __m128 __DEFAULT_FN_ATTRS128
1032 _mm_maskz_max_ss(__mmask8 __U,__m128 __A, __m128 __B) {
1033  return (__m128) __builtin_ia32_maxss_round_mask ((__v4sf) __A,
1034  (__v4sf) __B,
1035  (__v4sf) _mm_setzero_ps (),
1036  (__mmask8) __U,
1038 }
1039 
1040 #define _mm_max_round_ss(A, B, R) \
1041  (__m128)__builtin_ia32_maxss_round_mask((__v4sf)(__m128)(A), \
1042  (__v4sf)(__m128)(B), \
1043  (__v4sf)_mm_setzero_ps(), \
1044  (__mmask8)-1, (int)(R))
1045 
1046 #define _mm_mask_max_round_ss(W, U, A, B, R) \
1047  (__m128)__builtin_ia32_maxss_round_mask((__v4sf)(__m128)(A), \
1048  (__v4sf)(__m128)(B), \
1049  (__v4sf)(__m128)(W), (__mmask8)(U), \
1050  (int)(R))
1051 
1052 #define _mm_maskz_max_round_ss(U, A, B, R) \
1053  (__m128)__builtin_ia32_maxss_round_mask((__v4sf)(__m128)(A), \
1054  (__v4sf)(__m128)(B), \
1055  (__v4sf)_mm_setzero_ps(), \
1056  (__mmask8)(U), (int)(R))
1057 
1058 static __inline__ __m128d __DEFAULT_FN_ATTRS128
1059 _mm_mask_max_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) {
1060  return (__m128d) __builtin_ia32_maxsd_round_mask ((__v2df) __A,
1061  (__v2df) __B,
1062  (__v2df) __W,
1063  (__mmask8) __U,
1065 }
1066 
1067 static __inline__ __m128d __DEFAULT_FN_ATTRS128
1068 _mm_maskz_max_sd(__mmask8 __U,__m128d __A, __m128d __B) {
1069  return (__m128d) __builtin_ia32_maxsd_round_mask ((__v2df) __A,
1070  (__v2df) __B,
1071  (__v2df) _mm_setzero_pd (),
1072  (__mmask8) __U,
1074 }
1075 
1076 #define _mm_max_round_sd(A, B, R) \
1077  (__m128d)__builtin_ia32_maxsd_round_mask((__v2df)(__m128d)(A), \
1078  (__v2df)(__m128d)(B), \
1079  (__v2df)_mm_setzero_pd(), \
1080  (__mmask8)-1, (int)(R))
1081 
1082 #define _mm_mask_max_round_sd(W, U, A, B, R) \
1083  (__m128d)__builtin_ia32_maxsd_round_mask((__v2df)(__m128d)(A), \
1084  (__v2df)(__m128d)(B), \
1085  (__v2df)(__m128d)(W), \
1086  (__mmask8)(U), (int)(R))
1087 
1088 #define _mm_maskz_max_round_sd(U, A, B, R) \
1089  (__m128d)__builtin_ia32_maxsd_round_mask((__v2df)(__m128d)(A), \
1090  (__v2df)(__m128d)(B), \
1091  (__v2df)_mm_setzero_pd(), \
1092  (__mmask8)(U), (int)(R))
1093 
1094 static __inline __m512i
1096 _mm512_max_epi32(__m512i __A, __m512i __B)
1097 {
1098  return (__m512i)__builtin_ia32_pmaxsd512((__v16si)__A, (__v16si)__B);
1099 }
1100 
1101 static __inline__ __m512i __DEFAULT_FN_ATTRS512
1102 _mm512_mask_max_epi32 (__m512i __W, __mmask16 __M, __m512i __A, __m512i __B)
1103 {
1104  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
1105  (__v16si)_mm512_max_epi32(__A, __B),
1106  (__v16si)__W);
1107 }
1108 
1109 static __inline__ __m512i __DEFAULT_FN_ATTRS512
1110 _mm512_maskz_max_epi32 (__mmask16 __M, __m512i __A, __m512i __B)
1111 {
1112  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
1113  (__v16si)_mm512_max_epi32(__A, __B),
1114  (__v16si)_mm512_setzero_si512());
1115 }
1116 
1117 static __inline __m512i __DEFAULT_FN_ATTRS512
1118 _mm512_max_epu32(__m512i __A, __m512i __B)
1119 {
1120  return (__m512i)__builtin_ia32_pmaxud512((__v16si)__A, (__v16si)__B);
1121 }
1122 
1123 static __inline__ __m512i __DEFAULT_FN_ATTRS512
1124 _mm512_mask_max_epu32 (__m512i __W, __mmask16 __M, __m512i __A, __m512i __B)
1125 {
1126  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
1127  (__v16si)_mm512_max_epu32(__A, __B),
1128  (__v16si)__W);
1129 }
1130 
1131 static __inline__ __m512i __DEFAULT_FN_ATTRS512
1132 _mm512_maskz_max_epu32 (__mmask16 __M, __m512i __A, __m512i __B)
1133 {
1134  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
1135  (__v16si)_mm512_max_epu32(__A, __B),
1136  (__v16si)_mm512_setzero_si512());
1137 }
1138 
1139 static __inline __m512i __DEFAULT_FN_ATTRS512
1140 _mm512_max_epi64(__m512i __A, __m512i __B)
1141 {
1142  return (__m512i)__builtin_ia32_pmaxsq512((__v8di)__A, (__v8di)__B);
1143 }
1144 
1145 static __inline__ __m512i __DEFAULT_FN_ATTRS512
1146 _mm512_mask_max_epi64 (__m512i __W, __mmask8 __M, __m512i __A, __m512i __B)
1147 {
1148  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
1149  (__v8di)_mm512_max_epi64(__A, __B),
1150  (__v8di)__W);
1151 }
1152 
1153 static __inline__ __m512i __DEFAULT_FN_ATTRS512
1154 _mm512_maskz_max_epi64 (__mmask8 __M, __m512i __A, __m512i __B)
1155 {
1156  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
1157  (__v8di)_mm512_max_epi64(__A, __B),
1158  (__v8di)_mm512_setzero_si512());
1159 }
1160 
1161 static __inline __m512i __DEFAULT_FN_ATTRS512
1162 _mm512_max_epu64(__m512i __A, __m512i __B)
1163 {
1164  return (__m512i)__builtin_ia32_pmaxuq512((__v8di)__A, (__v8di)__B);
1165 }
1166 
1167 static __inline__ __m512i __DEFAULT_FN_ATTRS512
1168 _mm512_mask_max_epu64 (__m512i __W, __mmask8 __M, __m512i __A, __m512i __B)
1169 {
1170  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
1171  (__v8di)_mm512_max_epu64(__A, __B),
1172  (__v8di)__W);
1173 }
1174 
1175 static __inline__ __m512i __DEFAULT_FN_ATTRS512
1176 _mm512_maskz_max_epu64 (__mmask8 __M, __m512i __A, __m512i __B)
1177 {
1178  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
1179  (__v8di)_mm512_max_epu64(__A, __B),
1180  (__v8di)_mm512_setzero_si512());
1181 }
1182 
1183 #define _mm512_min_round_pd(A, B, R) \
1184  (__m512d)__builtin_ia32_minpd512((__v8df)(__m512d)(A), \
1185  (__v8df)(__m512d)(B), (int)(R))
1186 
1187 #define _mm512_mask_min_round_pd(W, U, A, B, R) \
1188  (__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \
1189  (__v8df)_mm512_min_round_pd((A), (B), (R)), \
1190  (__v8df)(W))
1191 
1192 #define _mm512_maskz_min_round_pd(U, A, B, R) \
1193  (__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \
1194  (__v8df)_mm512_min_round_pd((A), (B), (R)), \
1195  (__v8df)_mm512_setzero_pd())
1196 
1197 static __inline__ __m512d __DEFAULT_FN_ATTRS512
1198 _mm512_min_pd(__m512d __A, __m512d __B)
1199 {
1200  return (__m512d) __builtin_ia32_minpd512((__v8df) __A, (__v8df) __B,
1202 }
1203 
1204 static __inline__ __m512d __DEFAULT_FN_ATTRS512
1205 _mm512_mask_min_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d __B)
1206 {
1207  return (__m512d)__builtin_ia32_selectpd_512(__U,
1208  (__v8df)_mm512_min_pd(__A, __B),
1209  (__v8df)__W);
1210 }
1211 
1212 static __inline__ __m512d __DEFAULT_FN_ATTRS512
1213 _mm512_maskz_min_pd (__mmask8 __U, __m512d __A, __m512d __B)
1214 {
1215  return (__m512d)__builtin_ia32_selectpd_512(__U,
1216  (__v8df)_mm512_min_pd(__A, __B),
1217  (__v8df)_mm512_setzero_pd());
1218 }
1219 
1220 #define _mm512_min_round_ps(A, B, R) \
1221  (__m512)__builtin_ia32_minps512((__v16sf)(__m512)(A), \
1222  (__v16sf)(__m512)(B), (int)(R))
1223 
1224 #define _mm512_mask_min_round_ps(W, U, A, B, R) \
1225  (__m512)__builtin_ia32_selectps_512((__mmask16)(U), \
1226  (__v16sf)_mm512_min_round_ps((A), (B), (R)), \
1227  (__v16sf)(W))
1228 
1229 #define _mm512_maskz_min_round_ps(U, A, B, R) \
1230  (__m512)__builtin_ia32_selectps_512((__mmask16)(U), \
1231  (__v16sf)_mm512_min_round_ps((A), (B), (R)), \
1232  (__v16sf)_mm512_setzero_ps())
1233 
1234 static __inline__ __m512 __DEFAULT_FN_ATTRS512
1235 _mm512_min_ps(__m512 __A, __m512 __B)
1236 {
1237  return (__m512) __builtin_ia32_minps512((__v16sf) __A, (__v16sf) __B,
1239 }
1240 
1241 static __inline__ __m512 __DEFAULT_FN_ATTRS512
1242 _mm512_mask_min_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B)
1243 {
1244  return (__m512)__builtin_ia32_selectps_512(__U,
1245  (__v16sf)_mm512_min_ps(__A, __B),
1246  (__v16sf)__W);
1247 }
1248 
1249 static __inline__ __m512 __DEFAULT_FN_ATTRS512
1250 _mm512_maskz_min_ps (__mmask16 __U, __m512 __A, __m512 __B)
1251 {
1252  return (__m512)__builtin_ia32_selectps_512(__U,
1253  (__v16sf)_mm512_min_ps(__A, __B),
1254  (__v16sf)_mm512_setzero_ps());
1255 }
1256 
1257 static __inline__ __m128 __DEFAULT_FN_ATTRS128
1258 _mm_mask_min_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) {
1259  return (__m128) __builtin_ia32_minss_round_mask ((__v4sf) __A,
1260  (__v4sf) __B,
1261  (__v4sf) __W,
1262  (__mmask8) __U,
1264 }
1265 
1266 static __inline__ __m128 __DEFAULT_FN_ATTRS128
1267 _mm_maskz_min_ss(__mmask8 __U,__m128 __A, __m128 __B) {
1268  return (__m128) __builtin_ia32_minss_round_mask ((__v4sf) __A,
1269  (__v4sf) __B,
1270  (__v4sf) _mm_setzero_ps (),
1271  (__mmask8) __U,
1273 }
1274 
1275 #define _mm_min_round_ss(A, B, R) \
1276  (__m128)__builtin_ia32_minss_round_mask((__v4sf)(__m128)(A), \
1277  (__v4sf)(__m128)(B), \
1278  (__v4sf)_mm_setzero_ps(), \
1279  (__mmask8)-1, (int)(R))
1280 
1281 #define _mm_mask_min_round_ss(W, U, A, B, R) \
1282  (__m128)__builtin_ia32_minss_round_mask((__v4sf)(__m128)(A), \
1283  (__v4sf)(__m128)(B), \
1284  (__v4sf)(__m128)(W), (__mmask8)(U), \
1285  (int)(R))
1286 
1287 #define _mm_maskz_min_round_ss(U, A, B, R) \
1288  (__m128)__builtin_ia32_minss_round_mask((__v4sf)(__m128)(A), \
1289  (__v4sf)(__m128)(B), \
1290  (__v4sf)_mm_setzero_ps(), \
1291  (__mmask8)(U), (int)(R))
1292 
1293 static __inline__ __m128d __DEFAULT_FN_ATTRS128
1294 _mm_mask_min_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) {
1295  return (__m128d) __builtin_ia32_minsd_round_mask ((__v2df) __A,
1296  (__v2df) __B,
1297  (__v2df) __W,
1298  (__mmask8) __U,
1300 }
1301 
1302 static __inline__ __m128d __DEFAULT_FN_ATTRS128
1303 _mm_maskz_min_sd(__mmask8 __U,__m128d __A, __m128d __B) {
1304  return (__m128d) __builtin_ia32_minsd_round_mask ((__v2df) __A,
1305  (__v2df) __B,
1306  (__v2df) _mm_setzero_pd (),
1307  (__mmask8) __U,
1309 }
1310 
1311 #define _mm_min_round_sd(A, B, R) \
1312  (__m128d)__builtin_ia32_minsd_round_mask((__v2df)(__m128d)(A), \
1313  (__v2df)(__m128d)(B), \
1314  (__v2df)_mm_setzero_pd(), \
1315  (__mmask8)-1, (int)(R))
1316 
1317 #define _mm_mask_min_round_sd(W, U, A, B, R) \
1318  (__m128d)__builtin_ia32_minsd_round_mask((__v2df)(__m128d)(A), \
1319  (__v2df)(__m128d)(B), \
1320  (__v2df)(__m128d)(W), \
1321  (__mmask8)(U), (int)(R))
1322 
1323 #define _mm_maskz_min_round_sd(U, A, B, R) \
1324  (__m128d)__builtin_ia32_minsd_round_mask((__v2df)(__m128d)(A), \
1325  (__v2df)(__m128d)(B), \
1326  (__v2df)_mm_setzero_pd(), \
1327  (__mmask8)(U), (int)(R))
1328 
1329 static __inline __m512i
1331 _mm512_min_epi32(__m512i __A, __m512i __B)
1332 {
1333  return (__m512i)__builtin_ia32_pminsd512((__v16si)__A, (__v16si)__B);
1334 }
1335 
1336 static __inline__ __m512i __DEFAULT_FN_ATTRS512
1337 _mm512_mask_min_epi32 (__m512i __W, __mmask16 __M, __m512i __A, __m512i __B)
1338 {
1339  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
1340  (__v16si)_mm512_min_epi32(__A, __B),
1341  (__v16si)__W);
1342 }
1343 
1344 static __inline__ __m512i __DEFAULT_FN_ATTRS512
1345 _mm512_maskz_min_epi32 (__mmask16 __M, __m512i __A, __m512i __B)
1346 {
1347  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
1348  (__v16si)_mm512_min_epi32(__A, __B),
1349  (__v16si)_mm512_setzero_si512());
1350 }
1351 
1352 static __inline __m512i __DEFAULT_FN_ATTRS512
1353 _mm512_min_epu32(__m512i __A, __m512i __B)
1354 {
1355  return (__m512i)__builtin_ia32_pminud512((__v16si)__A, (__v16si)__B);
1356 }
1357 
1358 static __inline__ __m512i __DEFAULT_FN_ATTRS512
1359 _mm512_mask_min_epu32 (__m512i __W, __mmask16 __M, __m512i __A, __m512i __B)
1360 {
1361  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
1362  (__v16si)_mm512_min_epu32(__A, __B),
1363  (__v16si)__W);
1364 }
1365 
1366 static __inline__ __m512i __DEFAULT_FN_ATTRS512
1367 _mm512_maskz_min_epu32 (__mmask16 __M, __m512i __A, __m512i __B)
1368 {
1369  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
1370  (__v16si)_mm512_min_epu32(__A, __B),
1371  (__v16si)_mm512_setzero_si512());
1372 }
1373 
1374 static __inline __m512i __DEFAULT_FN_ATTRS512
1375 _mm512_min_epi64(__m512i __A, __m512i __B)
1376 {
1377  return (__m512i)__builtin_ia32_pminsq512((__v8di)__A, (__v8di)__B);
1378 }
1379 
1380 static __inline__ __m512i __DEFAULT_FN_ATTRS512
1381 _mm512_mask_min_epi64 (__m512i __W, __mmask8 __M, __m512i __A, __m512i __B)
1382 {
1383  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
1384  (__v8di)_mm512_min_epi64(__A, __B),
1385  (__v8di)__W);
1386 }
1387 
1388 static __inline__ __m512i __DEFAULT_FN_ATTRS512
1389 _mm512_maskz_min_epi64 (__mmask8 __M, __m512i __A, __m512i __B)
1390 {
1391  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
1392  (__v8di)_mm512_min_epi64(__A, __B),
1393  (__v8di)_mm512_setzero_si512());
1394 }
1395 
1396 static __inline __m512i __DEFAULT_FN_ATTRS512
1397 _mm512_min_epu64(__m512i __A, __m512i __B)
1398 {
1399  return (__m512i)__builtin_ia32_pminuq512((__v8di)__A, (__v8di)__B);
1400 }
1401 
1402 static __inline__ __m512i __DEFAULT_FN_ATTRS512
1403 _mm512_mask_min_epu64 (__m512i __W, __mmask8 __M, __m512i __A, __m512i __B)
1404 {
1405  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
1406  (__v8di)_mm512_min_epu64(__A, __B),
1407  (__v8di)__W);
1408 }
1409 
1410 static __inline__ __m512i __DEFAULT_FN_ATTRS512
1411 _mm512_maskz_min_epu64 (__mmask8 __M, __m512i __A, __m512i __B)
1412 {
1413  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
1414  (__v8di)_mm512_min_epu64(__A, __B),
1415  (__v8di)_mm512_setzero_si512());
1416 }
1417 
1418 static __inline __m512i __DEFAULT_FN_ATTRS512
1419 _mm512_mul_epi32(__m512i __X, __m512i __Y)
1420 {
1421  return (__m512i)__builtin_ia32_pmuldq512((__v16si)__X, (__v16si) __Y);
1422 }
1423 
1424 static __inline __m512i __DEFAULT_FN_ATTRS512
1425 _mm512_mask_mul_epi32(__m512i __W, __mmask8 __M, __m512i __X, __m512i __Y)
1426 {
1427  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
1428  (__v8di)_mm512_mul_epi32(__X, __Y),
1429  (__v8di)__W);
1430 }
1431 
1432 static __inline __m512i __DEFAULT_FN_ATTRS512
1433 _mm512_maskz_mul_epi32(__mmask8 __M, __m512i __X, __m512i __Y)
1434 {
1435  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
1436  (__v8di)_mm512_mul_epi32(__X, __Y),
1437  (__v8di)_mm512_setzero_si512 ());
1438 }
1439 
1440 static __inline __m512i __DEFAULT_FN_ATTRS512
1441 _mm512_mul_epu32(__m512i __X, __m512i __Y)
1442 {
1443  return (__m512i)__builtin_ia32_pmuludq512((__v16si)__X, (__v16si)__Y);
1444 }
1445 
1446 static __inline __m512i __DEFAULT_FN_ATTRS512
1447 _mm512_mask_mul_epu32(__m512i __W, __mmask8 __M, __m512i __X, __m512i __Y)
1448 {
1449  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
1450  (__v8di)_mm512_mul_epu32(__X, __Y),
1451  (__v8di)__W);
1452 }
1453 
1454 static __inline __m512i __DEFAULT_FN_ATTRS512
1455 _mm512_maskz_mul_epu32(__mmask8 __M, __m512i __X, __m512i __Y)
1456 {
1457  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
1458  (__v8di)_mm512_mul_epu32(__X, __Y),
1459  (__v8di)_mm512_setzero_si512 ());
1460 }
1461 
1462 static __inline __m512i __DEFAULT_FN_ATTRS512
1463 _mm512_mullo_epi32 (__m512i __A, __m512i __B)
1464 {
1465  return (__m512i) ((__v16su) __A * (__v16su) __B);
1466 }
1467 
1468 static __inline __m512i __DEFAULT_FN_ATTRS512
1469 _mm512_maskz_mullo_epi32(__mmask16 __M, __m512i __A, __m512i __B)
1470 {
1471  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
1472  (__v16si)_mm512_mullo_epi32(__A, __B),
1473  (__v16si)_mm512_setzero_si512());
1474 }
1475 
1476 static __inline __m512i __DEFAULT_FN_ATTRS512
1477 _mm512_mask_mullo_epi32(__m512i __W, __mmask16 __M, __m512i __A, __m512i __B)
1478 {
1479  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
1480  (__v16si)_mm512_mullo_epi32(__A, __B),
1481  (__v16si)__W);
1482 }
1483 
1484 static __inline__ __m512i __DEFAULT_FN_ATTRS512
1485 _mm512_mullox_epi64 (__m512i __A, __m512i __B) {
1486  return (__m512i) ((__v8du) __A * (__v8du) __B);
1487 }
1488 
1489 static __inline__ __m512i __DEFAULT_FN_ATTRS512
1490 _mm512_mask_mullox_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) {
1491  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
1492  (__v8di)_mm512_mullox_epi64(__A, __B),
1493  (__v8di)__W);
1494 }
1495 
1496 #define _mm512_sqrt_round_pd(A, R) \
1497  (__m512d)__builtin_ia32_sqrtpd512((__v8df)(__m512d)(A), (int)(R))
1498 
1499 #define _mm512_mask_sqrt_round_pd(W, U, A, R) \
1500  (__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \
1501  (__v8df)_mm512_sqrt_round_pd((A), (R)), \
1502  (__v8df)(__m512d)(W))
1503 
1504 #define _mm512_maskz_sqrt_round_pd(U, A, R) \
1505  (__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \
1506  (__v8df)_mm512_sqrt_round_pd((A), (R)), \
1507  (__v8df)_mm512_setzero_pd())
1508 
1509 static __inline__ __m512d __DEFAULT_FN_ATTRS512
1510 _mm512_sqrt_pd(__m512d __A)
1511 {
1512  return (__m512d)__builtin_ia32_sqrtpd512((__v8df)__A,
1514 }
1515 
1516 static __inline__ __m512d __DEFAULT_FN_ATTRS512
1517 _mm512_mask_sqrt_pd (__m512d __W, __mmask8 __U, __m512d __A)
1518 {
1519  return (__m512d)__builtin_ia32_selectpd_512(__U,
1520  (__v8df)_mm512_sqrt_pd(__A),
1521  (__v8df)__W);
1522 }
1523 
1524 static __inline__ __m512d __DEFAULT_FN_ATTRS512
1525 _mm512_maskz_sqrt_pd (__mmask8 __U, __m512d __A)
1526 {
1527  return (__m512d)__builtin_ia32_selectpd_512(__U,
1528  (__v8df)_mm512_sqrt_pd(__A),
1529  (__v8df)_mm512_setzero_pd());
1530 }
1531 
1532 #define _mm512_sqrt_round_ps(A, R) \
1533  (__m512)__builtin_ia32_sqrtps512((__v16sf)(__m512)(A), (int)(R))
1534 
1535 #define _mm512_mask_sqrt_round_ps(W, U, A, R) \
1536  (__m512)__builtin_ia32_selectps_512((__mmask16)(U), \
1537  (__v16sf)_mm512_sqrt_round_ps((A), (R)), \
1538  (__v16sf)(__m512)(W))
1539 
1540 #define _mm512_maskz_sqrt_round_ps(U, A, R) \
1541  (__m512)__builtin_ia32_selectps_512((__mmask16)(U), \
1542  (__v16sf)_mm512_sqrt_round_ps((A), (R)), \
1543  (__v16sf)_mm512_setzero_ps())
1544 
1545 static __inline__ __m512 __DEFAULT_FN_ATTRS512
1546 _mm512_sqrt_ps(__m512 __A)
1547 {
1548  return (__m512)__builtin_ia32_sqrtps512((__v16sf)__A,
1550 }
1551 
1552 static __inline__ __m512 __DEFAULT_FN_ATTRS512
1553 _mm512_mask_sqrt_ps(__m512 __W, __mmask16 __U, __m512 __A)
1554 {
1555  return (__m512)__builtin_ia32_selectps_512(__U,
1556  (__v16sf)_mm512_sqrt_ps(__A),
1557  (__v16sf)__W);
1558 }
1559 
1560 static __inline__ __m512 __DEFAULT_FN_ATTRS512
1561 _mm512_maskz_sqrt_ps( __mmask16 __U, __m512 __A)
1562 {
1563  return (__m512)__builtin_ia32_selectps_512(__U,
1564  (__v16sf)_mm512_sqrt_ps(__A),
1565  (__v16sf)_mm512_setzero_ps());
1566 }
1567 
1568 static __inline__ __m512d __DEFAULT_FN_ATTRS512
1569 _mm512_rsqrt14_pd(__m512d __A)
1570 {
1571  return (__m512d) __builtin_ia32_rsqrt14pd512_mask ((__v8df) __A,
1572  (__v8df)
1573  _mm512_setzero_pd (),
1574  (__mmask8) -1);}
1575 
1576 static __inline__ __m512d __DEFAULT_FN_ATTRS512
1577 _mm512_mask_rsqrt14_pd (__m512d __W, __mmask8 __U, __m512d __A)
1578 {
1579  return (__m512d) __builtin_ia32_rsqrt14pd512_mask ((__v8df) __A,
1580  (__v8df) __W,
1581  (__mmask8) __U);
1582 }
1583 
1584 static __inline__ __m512d __DEFAULT_FN_ATTRS512
1585 _mm512_maskz_rsqrt14_pd (__mmask8 __U, __m512d __A)
1586 {
1587  return (__m512d) __builtin_ia32_rsqrt14pd512_mask ((__v8df) __A,
1588  (__v8df)
1589  _mm512_setzero_pd (),
1590  (__mmask8) __U);
1591 }
1592 
1593 static __inline__ __m512 __DEFAULT_FN_ATTRS512
1595 {
1596  return (__m512) __builtin_ia32_rsqrt14ps512_mask ((__v16sf) __A,
1597  (__v16sf)
1598  _mm512_setzero_ps (),
1599  (__mmask16) -1);
1600 }
1601 
1602 static __inline__ __m512 __DEFAULT_FN_ATTRS512
1603 _mm512_mask_rsqrt14_ps (__m512 __W, __mmask16 __U, __m512 __A)
1604 {
1605  return (__m512) __builtin_ia32_rsqrt14ps512_mask ((__v16sf) __A,
1606  (__v16sf) __W,
1607  (__mmask16) __U);
1608 }
1609 
1610 static __inline__ __m512 __DEFAULT_FN_ATTRS512
1611 _mm512_maskz_rsqrt14_ps (__mmask16 __U, __m512 __A)
1612 {
1613  return (__m512) __builtin_ia32_rsqrt14ps512_mask ((__v16sf) __A,
1614  (__v16sf)
1615  _mm512_setzero_ps (),
1616  (__mmask16) __U);
1617 }
1618 
1619 static __inline__ __m128 __DEFAULT_FN_ATTRS128
1620 _mm_rsqrt14_ss(__m128 __A, __m128 __B)
1621 {
1622  return (__m128) __builtin_ia32_rsqrt14ss_mask ((__v4sf) __A,
1623  (__v4sf) __B,
1624  (__v4sf)
1625  _mm_setzero_ps (),
1626  (__mmask8) -1);
1627 }
1628 
1629 static __inline__ __m128 __DEFAULT_FN_ATTRS128
1630 _mm_mask_rsqrt14_ss (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B)
1631 {
1632  return (__m128) __builtin_ia32_rsqrt14ss_mask ((__v4sf) __A,
1633  (__v4sf) __B,
1634  (__v4sf) __W,
1635  (__mmask8) __U);
1636 }
1637 
1638 static __inline__ __m128 __DEFAULT_FN_ATTRS128
1639 _mm_maskz_rsqrt14_ss (__mmask8 __U, __m128 __A, __m128 __B)
1640 {
1641  return (__m128) __builtin_ia32_rsqrt14ss_mask ((__v4sf) __A,
1642  (__v4sf) __B,
1643  (__v4sf) _mm_setzero_ps (),
1644  (__mmask8) __U);
1645 }
1646 
1647 static __inline__ __m128d __DEFAULT_FN_ATTRS128
1648 _mm_rsqrt14_sd(__m128d __A, __m128d __B)
1649 {
1650  return (__m128d) __builtin_ia32_rsqrt14sd_mask ((__v2df) __A,
1651  (__v2df) __B,
1652  (__v2df)
1653  _mm_setzero_pd (),
1654  (__mmask8) -1);
1655 }
1656 
1657 static __inline__ __m128d __DEFAULT_FN_ATTRS128
1658 _mm_mask_rsqrt14_sd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B)
1659 {
1660  return (__m128d) __builtin_ia32_rsqrt14sd_mask ( (__v2df) __A,
1661  (__v2df) __B,
1662  (__v2df) __W,
1663  (__mmask8) __U);
1664 }
1665 
1666 static __inline__ __m128d __DEFAULT_FN_ATTRS128
1667 _mm_maskz_rsqrt14_sd (__mmask8 __U, __m128d __A, __m128d __B)
1668 {
1669  return (__m128d) __builtin_ia32_rsqrt14sd_mask ( (__v2df) __A,
1670  (__v2df) __B,
1671  (__v2df) _mm_setzero_pd (),
1672  (__mmask8) __U);
1673 }
1674 
1675 static __inline__ __m512d __DEFAULT_FN_ATTRS512
1676 _mm512_rcp14_pd(__m512d __A)
1677 {
1678  return (__m512d) __builtin_ia32_rcp14pd512_mask ((__v8df) __A,
1679  (__v8df)
1680  _mm512_setzero_pd (),
1681  (__mmask8) -1);
1682 }
1683 
1684 static __inline__ __m512d __DEFAULT_FN_ATTRS512
1685 _mm512_mask_rcp14_pd (__m512d __W, __mmask8 __U, __m512d __A)
1686 {
1687  return (__m512d) __builtin_ia32_rcp14pd512_mask ((__v8df) __A,
1688  (__v8df) __W,
1689  (__mmask8) __U);
1690 }
1691 
1692 static __inline__ __m512d __DEFAULT_FN_ATTRS512
1693 _mm512_maskz_rcp14_pd (__mmask8 __U, __m512d __A)
1694 {
1695  return (__m512d) __builtin_ia32_rcp14pd512_mask ((__v8df) __A,
1696  (__v8df)
1697  _mm512_setzero_pd (),
1698  (__mmask8) __U);
1699 }
1700 
1701 static __inline__ __m512 __DEFAULT_FN_ATTRS512
1702 _mm512_rcp14_ps(__m512 __A)
1703 {
1704  return (__m512) __builtin_ia32_rcp14ps512_mask ((__v16sf) __A,
1705  (__v16sf)
1706  _mm512_setzero_ps (),
1707  (__mmask16) -1);
1708 }
1709 
1710 static __inline__ __m512 __DEFAULT_FN_ATTRS512
1711 _mm512_mask_rcp14_ps (__m512 __W, __mmask16 __U, __m512 __A)
1712 {
1713  return (__m512) __builtin_ia32_rcp14ps512_mask ((__v16sf) __A,
1714  (__v16sf) __W,
1715  (__mmask16) __U);
1716 }
1717 
1718 static __inline__ __m512 __DEFAULT_FN_ATTRS512
1719 _mm512_maskz_rcp14_ps (__mmask16 __U, __m512 __A)
1720 {
1721  return (__m512) __builtin_ia32_rcp14ps512_mask ((__v16sf) __A,
1722  (__v16sf)
1723  _mm512_setzero_ps (),
1724  (__mmask16) __U);
1725 }
1726 
1727 static __inline__ __m128 __DEFAULT_FN_ATTRS128
1728 _mm_rcp14_ss(__m128 __A, __m128 __B)
1729 {
1730  return (__m128) __builtin_ia32_rcp14ss_mask ((__v4sf) __A,
1731  (__v4sf) __B,
1732  (__v4sf)
1733  _mm_setzero_ps (),
1734  (__mmask8) -1);
1735 }
1736 
1737 static __inline__ __m128 __DEFAULT_FN_ATTRS128
1738 _mm_mask_rcp14_ss (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B)
1739 {
1740  return (__m128) __builtin_ia32_rcp14ss_mask ((__v4sf) __A,
1741  (__v4sf) __B,
1742  (__v4sf) __W,
1743  (__mmask8) __U);
1744 }
1745 
1746 static __inline__ __m128 __DEFAULT_FN_ATTRS128
1747 _mm_maskz_rcp14_ss (__mmask8 __U, __m128 __A, __m128 __B)
1748 {
1749  return (__m128) __builtin_ia32_rcp14ss_mask ((__v4sf) __A,
1750  (__v4sf) __B,
1751  (__v4sf) _mm_setzero_ps (),
1752  (__mmask8) __U);
1753 }
1754 
1755 static __inline__ __m128d __DEFAULT_FN_ATTRS128
1756 _mm_rcp14_sd(__m128d __A, __m128d __B)
1757 {
1758  return (__m128d) __builtin_ia32_rcp14sd_mask ((__v2df) __A,
1759  (__v2df) __B,
1760  (__v2df)
1761  _mm_setzero_pd (),
1762  (__mmask8) -1);
1763 }
1764 
1765 static __inline__ __m128d __DEFAULT_FN_ATTRS128
1766 _mm_mask_rcp14_sd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B)
1767 {
1768  return (__m128d) __builtin_ia32_rcp14sd_mask ( (__v2df) __A,
1769  (__v2df) __B,
1770  (__v2df) __W,
1771  (__mmask8) __U);
1772 }
1773 
1774 static __inline__ __m128d __DEFAULT_FN_ATTRS128
1775 _mm_maskz_rcp14_sd (__mmask8 __U, __m128d __A, __m128d __B)
1776 {
1777  return (__m128d) __builtin_ia32_rcp14sd_mask ( (__v2df) __A,
1778  (__v2df) __B,
1779  (__v2df) _mm_setzero_pd (),
1780  (__mmask8) __U);
1781 }
1782 
1783 static __inline __m512 __DEFAULT_FN_ATTRS512
1784 _mm512_floor_ps(__m512 __A)
1785 {
1786  return (__m512) __builtin_ia32_rndscaleps_mask ((__v16sf) __A,
1788  (__v16sf) __A, -1,
1790 }
1791 
1792 static __inline__ __m512 __DEFAULT_FN_ATTRS512
1793 _mm512_mask_floor_ps (__m512 __W, __mmask16 __U, __m512 __A)
1794 {
1795  return (__m512) __builtin_ia32_rndscaleps_mask ((__v16sf) __A,
1797  (__v16sf) __W, __U,
1799 }
1800 
1801 static __inline __m512d __DEFAULT_FN_ATTRS512
1802 _mm512_floor_pd(__m512d __A)
1803 {
1804  return (__m512d) __builtin_ia32_rndscalepd_mask ((__v8df) __A,
1806  (__v8df) __A, -1,
1808 }
1809 
1810 static __inline__ __m512d __DEFAULT_FN_ATTRS512
1811 _mm512_mask_floor_pd (__m512d __W, __mmask8 __U, __m512d __A)
1812 {
1813  return (__m512d) __builtin_ia32_rndscalepd_mask ((__v8df) __A,
1815  (__v8df) __W, __U,
1817 }
1818 
1819 static __inline__ __m512 __DEFAULT_FN_ATTRS512
1820 _mm512_mask_ceil_ps (__m512 __W, __mmask16 __U, __m512 __A)
1821 {
1822  return (__m512) __builtin_ia32_rndscaleps_mask ((__v16sf) __A,
1824  (__v16sf) __W, __U,
1826 }
1827 
1828 static __inline __m512 __DEFAULT_FN_ATTRS512
1829 _mm512_ceil_ps(__m512 __A)
1830 {
1831  return (__m512) __builtin_ia32_rndscaleps_mask ((__v16sf) __A,
1833  (__v16sf) __A, -1,
1835 }
1836 
1837 static __inline __m512d __DEFAULT_FN_ATTRS512
1838 _mm512_ceil_pd(__m512d __A)
1839 {
1840  return (__m512d) __builtin_ia32_rndscalepd_mask ((__v8df) __A,
1842  (__v8df) __A, -1,
1844 }
1845 
1846 static __inline__ __m512d __DEFAULT_FN_ATTRS512
1847 _mm512_mask_ceil_pd (__m512d __W, __mmask8 __U, __m512d __A)
1848 {
1849  return (__m512d) __builtin_ia32_rndscalepd_mask ((__v8df) __A,
1851  (__v8df) __W, __U,
1853 }
1854 
1855 static __inline __m512i __DEFAULT_FN_ATTRS512
1856 _mm512_abs_epi64(__m512i __A)
1857 {
1858  return (__m512i)__builtin_ia32_pabsq512((__v8di)__A);
1859 }
1860 
1861 static __inline__ __m512i __DEFAULT_FN_ATTRS512
1862 _mm512_mask_abs_epi64 (__m512i __W, __mmask8 __U, __m512i __A)
1863 {
1864  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
1865  (__v8di)_mm512_abs_epi64(__A),
1866  (__v8di)__W);
1867 }
1868 
1869 static __inline__ __m512i __DEFAULT_FN_ATTRS512
1870 _mm512_maskz_abs_epi64 (__mmask8 __U, __m512i __A)
1871 {
1872  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
1873  (__v8di)_mm512_abs_epi64(__A),
1874  (__v8di)_mm512_setzero_si512());
1875 }
1876 
1877 static __inline __m512i __DEFAULT_FN_ATTRS512
1878 _mm512_abs_epi32(__m512i __A)
1879 {
1880  return (__m512i)__builtin_ia32_pabsd512((__v16si) __A);
1881 }
1882 
1883 static __inline__ __m512i __DEFAULT_FN_ATTRS512
1884 _mm512_mask_abs_epi32 (__m512i __W, __mmask16 __U, __m512i __A)
1885 {
1886  return (__m512i)__builtin_ia32_selectd_512(__U,
1887  (__v16si)_mm512_abs_epi32(__A),
1888  (__v16si)__W);
1889 }
1890 
1891 static __inline__ __m512i __DEFAULT_FN_ATTRS512
1892 _mm512_maskz_abs_epi32 (__mmask16 __U, __m512i __A)
1893 {
1894  return (__m512i)__builtin_ia32_selectd_512(__U,
1895  (__v16si)_mm512_abs_epi32(__A),
1896  (__v16si)_mm512_setzero_si512());
1897 }
1898 
1899 static __inline__ __m128 __DEFAULT_FN_ATTRS128
1900 _mm_mask_add_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) {
1901  __A = _mm_add_ss(__A, __B);
1902  return __builtin_ia32_selectss_128(__U, __A, __W);
1903 }
1904 
1905 static __inline__ __m128 __DEFAULT_FN_ATTRS128
1906 _mm_maskz_add_ss(__mmask8 __U,__m128 __A, __m128 __B) {
1907  __A = _mm_add_ss(__A, __B);
1908  return __builtin_ia32_selectss_128(__U, __A, _mm_setzero_ps());
1909 }
1910 
1911 #define _mm_add_round_ss(A, B, R) \
1912  (__m128)__builtin_ia32_addss_round_mask((__v4sf)(__m128)(A), \
1913  (__v4sf)(__m128)(B), \
1914  (__v4sf)_mm_setzero_ps(), \
1915  (__mmask8)-1, (int)(R))
1916 
1917 #define _mm_mask_add_round_ss(W, U, A, B, R) \
1918  (__m128)__builtin_ia32_addss_round_mask((__v4sf)(__m128)(A), \
1919  (__v4sf)(__m128)(B), \
1920  (__v4sf)(__m128)(W), (__mmask8)(U), \
1921  (int)(R))
1922 
1923 #define _mm_maskz_add_round_ss(U, A, B, R) \
1924  (__m128)__builtin_ia32_addss_round_mask((__v4sf)(__m128)(A), \
1925  (__v4sf)(__m128)(B), \
1926  (__v4sf)_mm_setzero_ps(), \
1927  (__mmask8)(U), (int)(R))
1928 
1929 static __inline__ __m128d __DEFAULT_FN_ATTRS128
1930 _mm_mask_add_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) {
1931  __A = _mm_add_sd(__A, __B);
1932  return __builtin_ia32_selectsd_128(__U, __A, __W);
1933 }
1934 
1935 static __inline__ __m128d __DEFAULT_FN_ATTRS128
1936 _mm_maskz_add_sd(__mmask8 __U,__m128d __A, __m128d __B) {
1937  __A = _mm_add_sd(__A, __B);
1938  return __builtin_ia32_selectsd_128(__U, __A, _mm_setzero_pd());
1939 }
1940 #define _mm_add_round_sd(A, B, R) \
1941  (__m128d)__builtin_ia32_addsd_round_mask((__v2df)(__m128d)(A), \
1942  (__v2df)(__m128d)(B), \
1943  (__v2df)_mm_setzero_pd(), \
1944  (__mmask8)-1, (int)(R))
1945 
1946 #define _mm_mask_add_round_sd(W, U, A, B, R) \
1947  (__m128d)__builtin_ia32_addsd_round_mask((__v2df)(__m128d)(A), \
1948  (__v2df)(__m128d)(B), \
1949  (__v2df)(__m128d)(W), \
1950  (__mmask8)(U), (int)(R))
1951 
1952 #define _mm_maskz_add_round_sd(U, A, B, R) \
1953  (__m128d)__builtin_ia32_addsd_round_mask((__v2df)(__m128d)(A), \
1954  (__v2df)(__m128d)(B), \
1955  (__v2df)_mm_setzero_pd(), \
1956  (__mmask8)(U), (int)(R))
1957 
1958 static __inline__ __m512d __DEFAULT_FN_ATTRS512
1959 _mm512_mask_add_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {
1960  return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
1961  (__v8df)_mm512_add_pd(__A, __B),
1962  (__v8df)__W);
1963 }
1964 
1965 static __inline__ __m512d __DEFAULT_FN_ATTRS512
1966 _mm512_maskz_add_pd(__mmask8 __U, __m512d __A, __m512d __B) {
1967  return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
1968  (__v8df)_mm512_add_pd(__A, __B),
1969  (__v8df)_mm512_setzero_pd());
1970 }
1971 
1972 static __inline__ __m512 __DEFAULT_FN_ATTRS512
1973 _mm512_mask_add_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {
1974  return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
1975  (__v16sf)_mm512_add_ps(__A, __B),
1976  (__v16sf)__W);
1977 }
1978 
1979 static __inline__ __m512 __DEFAULT_FN_ATTRS512
1980 _mm512_maskz_add_ps(__mmask16 __U, __m512 __A, __m512 __B) {
1981  return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
1982  (__v16sf)_mm512_add_ps(__A, __B),
1983  (__v16sf)_mm512_setzero_ps());
1984 }
1985 
1986 #define _mm512_add_round_pd(A, B, R) \
1987  (__m512d)__builtin_ia32_addpd512((__v8df)(__m512d)(A), \
1988  (__v8df)(__m512d)(B), (int)(R))
1989 
1990 #define _mm512_mask_add_round_pd(W, U, A, B, R) \
1991  (__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \
1992  (__v8df)_mm512_add_round_pd((A), (B), (R)), \
1993  (__v8df)(__m512d)(W));
1994 
1995 #define _mm512_maskz_add_round_pd(U, A, B, R) \
1996  (__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \
1997  (__v8df)_mm512_add_round_pd((A), (B), (R)), \
1998  (__v8df)_mm512_setzero_pd());
1999 
2000 #define _mm512_add_round_ps(A, B, R) \
2001  (__m512)__builtin_ia32_addps512((__v16sf)(__m512)(A), \
2002  (__v16sf)(__m512)(B), (int)(R))
2003 
2004 #define _mm512_mask_add_round_ps(W, U, A, B, R) \
2005  (__m512)__builtin_ia32_selectps_512((__mmask16)(U), \
2006  (__v16sf)_mm512_add_round_ps((A), (B), (R)), \
2007  (__v16sf)(__m512)(W));
2008 
2009 #define _mm512_maskz_add_round_ps(U, A, B, R) \
2010  (__m512)__builtin_ia32_selectps_512((__mmask16)(U), \
2011  (__v16sf)_mm512_add_round_ps((A), (B), (R)), \
2012  (__v16sf)_mm512_setzero_ps());
2013 
2014 static __inline__ __m128 __DEFAULT_FN_ATTRS128
2015 _mm_mask_sub_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) {
2016  __A = _mm_sub_ss(__A, __B);
2017  return __builtin_ia32_selectss_128(__U, __A, __W);
2018 }
2019 
2020 static __inline__ __m128 __DEFAULT_FN_ATTRS128
2021 _mm_maskz_sub_ss(__mmask8 __U,__m128 __A, __m128 __B) {
2022  __A = _mm_sub_ss(__A, __B);
2023  return __builtin_ia32_selectss_128(__U, __A, _mm_setzero_ps());
2024 }
2025 #define _mm_sub_round_ss(A, B, R) \
2026  (__m128)__builtin_ia32_subss_round_mask((__v4sf)(__m128)(A), \
2027  (__v4sf)(__m128)(B), \
2028  (__v4sf)_mm_setzero_ps(), \
2029  (__mmask8)-1, (int)(R))
2030 
2031 #define _mm_mask_sub_round_ss(W, U, A, B, R) \
2032  (__m128)__builtin_ia32_subss_round_mask((__v4sf)(__m128)(A), \
2033  (__v4sf)(__m128)(B), \
2034  (__v4sf)(__m128)(W), (__mmask8)(U), \
2035  (int)(R))
2036 
2037 #define _mm_maskz_sub_round_ss(U, A, B, R) \
2038  (__m128)__builtin_ia32_subss_round_mask((__v4sf)(__m128)(A), \
2039  (__v4sf)(__m128)(B), \
2040  (__v4sf)_mm_setzero_ps(), \
2041  (__mmask8)(U), (int)(R))
2042 
2043 static __inline__ __m128d __DEFAULT_FN_ATTRS128
2044 _mm_mask_sub_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) {
2045  __A = _mm_sub_sd(__A, __B);
2046  return __builtin_ia32_selectsd_128(__U, __A, __W);
2047 }
2048 
2049 static __inline__ __m128d __DEFAULT_FN_ATTRS128
2050 _mm_maskz_sub_sd(__mmask8 __U,__m128d __A, __m128d __B) {
2051  __A = _mm_sub_sd(__A, __B);
2052  return __builtin_ia32_selectsd_128(__U, __A, _mm_setzero_pd());
2053 }
2054 
2055 #define _mm_sub_round_sd(A, B, R) \
2056  (__m128d)__builtin_ia32_subsd_round_mask((__v2df)(__m128d)(A), \
2057  (__v2df)(__m128d)(B), \
2058  (__v2df)_mm_setzero_pd(), \
2059  (__mmask8)-1, (int)(R))
2060 
2061 #define _mm_mask_sub_round_sd(W, U, A, B, R) \
2062  (__m128d)__builtin_ia32_subsd_round_mask((__v2df)(__m128d)(A), \
2063  (__v2df)(__m128d)(B), \
2064  (__v2df)(__m128d)(W), \
2065  (__mmask8)(U), (int)(R))
2066 
2067 #define _mm_maskz_sub_round_sd(U, A, B, R) \
2068  (__m128d)__builtin_ia32_subsd_round_mask((__v2df)(__m128d)(A), \
2069  (__v2df)(__m128d)(B), \
2070  (__v2df)_mm_setzero_pd(), \
2071  (__mmask8)(U), (int)(R))
2072 
2073 static __inline__ __m512d __DEFAULT_FN_ATTRS512
2074 _mm512_mask_sub_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {
2075  return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
2076  (__v8df)_mm512_sub_pd(__A, __B),
2077  (__v8df)__W);
2078 }
2079 
2080 static __inline__ __m512d __DEFAULT_FN_ATTRS512
2081 _mm512_maskz_sub_pd(__mmask8 __U, __m512d __A, __m512d __B) {
2082  return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
2083  (__v8df)_mm512_sub_pd(__A, __B),
2084  (__v8df)_mm512_setzero_pd());
2085 }
2086 
2087 static __inline__ __m512 __DEFAULT_FN_ATTRS512
2088 _mm512_mask_sub_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {
2089  return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
2090  (__v16sf)_mm512_sub_ps(__A, __B),
2091  (__v16sf)__W);
2092 }
2093 
2094 static __inline__ __m512 __DEFAULT_FN_ATTRS512
2095 _mm512_maskz_sub_ps(__mmask16 __U, __m512 __A, __m512 __B) {
2096  return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
2097  (__v16sf)_mm512_sub_ps(__A, __B),
2098  (__v16sf)_mm512_setzero_ps());
2099 }
2100 
2101 #define _mm512_sub_round_pd(A, B, R) \
2102  (__m512d)__builtin_ia32_subpd512((__v8df)(__m512d)(A), \
2103  (__v8df)(__m512d)(B), (int)(R))
2104 
2105 #define _mm512_mask_sub_round_pd(W, U, A, B, R) \
2106  (__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \
2107  (__v8df)_mm512_sub_round_pd((A), (B), (R)), \
2108  (__v8df)(__m512d)(W));
2109 
2110 #define _mm512_maskz_sub_round_pd(U, A, B, R) \
2111  (__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \
2112  (__v8df)_mm512_sub_round_pd((A), (B), (R)), \
2113  (__v8df)_mm512_setzero_pd());
2114 
2115 #define _mm512_sub_round_ps(A, B, R) \
2116  (__m512)__builtin_ia32_subps512((__v16sf)(__m512)(A), \
2117  (__v16sf)(__m512)(B), (int)(R))
2118 
2119 #define _mm512_mask_sub_round_ps(W, U, A, B, R) \
2120  (__m512)__builtin_ia32_selectps_512((__mmask16)(U), \
2121  (__v16sf)_mm512_sub_round_ps((A), (B), (R)), \
2122  (__v16sf)(__m512)(W));
2123 
2124 #define _mm512_maskz_sub_round_ps(U, A, B, R) \
2125  (__m512)__builtin_ia32_selectps_512((__mmask16)(U), \
2126  (__v16sf)_mm512_sub_round_ps((A), (B), (R)), \
2127  (__v16sf)_mm512_setzero_ps());
2128 
2129 static __inline__ __m128 __DEFAULT_FN_ATTRS128
2130 _mm_mask_mul_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) {
2131  __A = _mm_mul_ss(__A, __B);
2132  return __builtin_ia32_selectss_128(__U, __A, __W);
2133 }
2134 
2135 static __inline__ __m128 __DEFAULT_FN_ATTRS128
2136 _mm_maskz_mul_ss(__mmask8 __U,__m128 __A, __m128 __B) {
2137  __A = _mm_mul_ss(__A, __B);
2138  return __builtin_ia32_selectss_128(__U, __A, _mm_setzero_ps());
2139 }
2140 #define _mm_mul_round_ss(A, B, R) \
2141  (__m128)__builtin_ia32_mulss_round_mask((__v4sf)(__m128)(A), \
2142  (__v4sf)(__m128)(B), \
2143  (__v4sf)_mm_setzero_ps(), \
2144  (__mmask8)-1, (int)(R))
2145 
2146 #define _mm_mask_mul_round_ss(W, U, A, B, R) \
2147  (__m128)__builtin_ia32_mulss_round_mask((__v4sf)(__m128)(A), \
2148  (__v4sf)(__m128)(B), \
2149  (__v4sf)(__m128)(W), (__mmask8)(U), \
2150  (int)(R))
2151 
2152 #define _mm_maskz_mul_round_ss(U, A, B, R) \
2153  (__m128)__builtin_ia32_mulss_round_mask((__v4sf)(__m128)(A), \
2154  (__v4sf)(__m128)(B), \
2155  (__v4sf)_mm_setzero_ps(), \
2156  (__mmask8)(U), (int)(R))
2157 
2158 static __inline__ __m128d __DEFAULT_FN_ATTRS128
2159 _mm_mask_mul_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) {
2160  __A = _mm_mul_sd(__A, __B);
2161  return __builtin_ia32_selectsd_128(__U, __A, __W);
2162 }
2163 
2164 static __inline__ __m128d __DEFAULT_FN_ATTRS128
2165 _mm_maskz_mul_sd(__mmask8 __U,__m128d __A, __m128d __B) {
2166  __A = _mm_mul_sd(__A, __B);
2167  return __builtin_ia32_selectsd_128(__U, __A, _mm_setzero_pd());
2168 }
2169 
2170 #define _mm_mul_round_sd(A, B, R) \
2171  (__m128d)__builtin_ia32_mulsd_round_mask((__v2df)(__m128d)(A), \
2172  (__v2df)(__m128d)(B), \
2173  (__v2df)_mm_setzero_pd(), \
2174  (__mmask8)-1, (int)(R))
2175 
2176 #define _mm_mask_mul_round_sd(W, U, A, B, R) \
2177  (__m128d)__builtin_ia32_mulsd_round_mask((__v2df)(__m128d)(A), \
2178  (__v2df)(__m128d)(B), \
2179  (__v2df)(__m128d)(W), \
2180  (__mmask8)(U), (int)(R))
2181 
2182 #define _mm_maskz_mul_round_sd(U, A, B, R) \
2183  (__m128d)__builtin_ia32_mulsd_round_mask((__v2df)(__m128d)(A), \
2184  (__v2df)(__m128d)(B), \
2185  (__v2df)_mm_setzero_pd(), \
2186  (__mmask8)(U), (int)(R))
2187 
2188 static __inline__ __m512d __DEFAULT_FN_ATTRS512
2189 _mm512_mask_mul_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {
2190  return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
2191  (__v8df)_mm512_mul_pd(__A, __B),
2192  (__v8df)__W);
2193 }
2194 
2195 static __inline__ __m512d __DEFAULT_FN_ATTRS512
2196 _mm512_maskz_mul_pd(__mmask8 __U, __m512d __A, __m512d __B) {
2197  return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
2198  (__v8df)_mm512_mul_pd(__A, __B),
2199  (__v8df)_mm512_setzero_pd());
2200 }
2201 
2202 static __inline__ __m512 __DEFAULT_FN_ATTRS512
2203 _mm512_mask_mul_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {
2204  return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
2205  (__v16sf)_mm512_mul_ps(__A, __B),
2206  (__v16sf)__W);
2207 }
2208 
2209 static __inline__ __m512 __DEFAULT_FN_ATTRS512
2210 _mm512_maskz_mul_ps(__mmask16 __U, __m512 __A, __m512 __B) {
2211  return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
2212  (__v16sf)_mm512_mul_ps(__A, __B),
2213  (__v16sf)_mm512_setzero_ps());
2214 }
2215 
2216 #define _mm512_mul_round_pd(A, B, R) \
2217  (__m512d)__builtin_ia32_mulpd512((__v8df)(__m512d)(A), \
2218  (__v8df)(__m512d)(B), (int)(R))
2219 
2220 #define _mm512_mask_mul_round_pd(W, U, A, B, R) \
2221  (__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \
2222  (__v8df)_mm512_mul_round_pd((A), (B), (R)), \
2223  (__v8df)(__m512d)(W));
2224 
2225 #define _mm512_maskz_mul_round_pd(U, A, B, R) \
2226  (__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \
2227  (__v8df)_mm512_mul_round_pd((A), (B), (R)), \
2228  (__v8df)_mm512_setzero_pd());
2229 
2230 #define _mm512_mul_round_ps(A, B, R) \
2231  (__m512)__builtin_ia32_mulps512((__v16sf)(__m512)(A), \
2232  (__v16sf)(__m512)(B), (int)(R))
2233 
2234 #define _mm512_mask_mul_round_ps(W, U, A, B, R) \
2235  (__m512)__builtin_ia32_selectps_512((__mmask16)(U), \
2236  (__v16sf)_mm512_mul_round_ps((A), (B), (R)), \
2237  (__v16sf)(__m512)(W));
2238 
2239 #define _mm512_maskz_mul_round_ps(U, A, B, R) \
2240  (__m512)__builtin_ia32_selectps_512((__mmask16)(U), \
2241  (__v16sf)_mm512_mul_round_ps((A), (B), (R)), \
2242  (__v16sf)_mm512_setzero_ps());
2243 
2244 static __inline__ __m128 __DEFAULT_FN_ATTRS128
2245 _mm_mask_div_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) {
2246  __A = _mm_div_ss(__A, __B);
2247  return __builtin_ia32_selectss_128(__U, __A, __W);
2248 }
2249 
2250 static __inline__ __m128 __DEFAULT_FN_ATTRS128
2251 _mm_maskz_div_ss(__mmask8 __U,__m128 __A, __m128 __B) {
2252  __A = _mm_div_ss(__A, __B);
2253  return __builtin_ia32_selectss_128(__U, __A, _mm_setzero_ps());
2254 }
2255 
2256 #define _mm_div_round_ss(A, B, R) \
2257  (__m128)__builtin_ia32_divss_round_mask((__v4sf)(__m128)(A), \
2258  (__v4sf)(__m128)(B), \
2259  (__v4sf)_mm_setzero_ps(), \
2260  (__mmask8)-1, (int)(R))
2261 
2262 #define _mm_mask_div_round_ss(W, U, A, B, R) \
2263  (__m128)__builtin_ia32_divss_round_mask((__v4sf)(__m128)(A), \
2264  (__v4sf)(__m128)(B), \
2265  (__v4sf)(__m128)(W), (__mmask8)(U), \
2266  (int)(R))
2267 
2268 #define _mm_maskz_div_round_ss(U, A, B, R) \
2269  (__m128)__builtin_ia32_divss_round_mask((__v4sf)(__m128)(A), \
2270  (__v4sf)(__m128)(B), \
2271  (__v4sf)_mm_setzero_ps(), \
2272  (__mmask8)(U), (int)(R))
2273 
2274 static __inline__ __m128d __DEFAULT_FN_ATTRS128
2275 _mm_mask_div_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) {
2276  __A = _mm_div_sd(__A, __B);
2277  return __builtin_ia32_selectsd_128(__U, __A, __W);
2278 }
2279 
2280 static __inline__ __m128d __DEFAULT_FN_ATTRS128
2281 _mm_maskz_div_sd(__mmask8 __U,__m128d __A, __m128d __B) {
2282  __A = _mm_div_sd(__A, __B);
2283  return __builtin_ia32_selectsd_128(__U, __A, _mm_setzero_pd());
2284 }
2285 
2286 #define _mm_div_round_sd(A, B, R) \
2287  (__m128d)__builtin_ia32_divsd_round_mask((__v2df)(__m128d)(A), \
2288  (__v2df)(__m128d)(B), \
2289  (__v2df)_mm_setzero_pd(), \
2290  (__mmask8)-1, (int)(R))
2291 
2292 #define _mm_mask_div_round_sd(W, U, A, B, R) \
2293  (__m128d)__builtin_ia32_divsd_round_mask((__v2df)(__m128d)(A), \
2294  (__v2df)(__m128d)(B), \
2295  (__v2df)(__m128d)(W), \
2296  (__mmask8)(U), (int)(R))
2297 
2298 #define _mm_maskz_div_round_sd(U, A, B, R) \
2299  (__m128d)__builtin_ia32_divsd_round_mask((__v2df)(__m128d)(A), \
2300  (__v2df)(__m128d)(B), \
2301  (__v2df)_mm_setzero_pd(), \
2302  (__mmask8)(U), (int)(R))
2303 
2304 static __inline __m512d __DEFAULT_FN_ATTRS512
2305 _mm512_div_pd(__m512d __a, __m512d __b)
2306 {
2307  return (__m512d)((__v8df)__a/(__v8df)__b);
2308 }
2309 
2310 static __inline__ __m512d __DEFAULT_FN_ATTRS512
2311 _mm512_mask_div_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {
2312  return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
2313  (__v8df)_mm512_div_pd(__A, __B),
2314  (__v8df)__W);
2315 }
2316 
2317 static __inline__ __m512d __DEFAULT_FN_ATTRS512
2318 _mm512_maskz_div_pd(__mmask8 __U, __m512d __A, __m512d __B) {
2319  return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
2320  (__v8df)_mm512_div_pd(__A, __B),
2321  (__v8df)_mm512_setzero_pd());
2322 }
2323 
2324 static __inline __m512 __DEFAULT_FN_ATTRS512
2325 _mm512_div_ps(__m512 __a, __m512 __b)
2326 {
2327  return (__m512)((__v16sf)__a/(__v16sf)__b);
2328 }
2329 
2330 static __inline__ __m512 __DEFAULT_FN_ATTRS512
2331 _mm512_mask_div_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {
2332  return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
2333  (__v16sf)_mm512_div_ps(__A, __B),
2334  (__v16sf)__W);
2335 }
2336 
2337 static __inline__ __m512 __DEFAULT_FN_ATTRS512
2338 _mm512_maskz_div_ps(__mmask16 __U, __m512 __A, __m512 __B) {
2339  return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
2340  (__v16sf)_mm512_div_ps(__A, __B),
2341  (__v16sf)_mm512_setzero_ps());
2342 }
2343 
2344 #define _mm512_div_round_pd(A, B, R) \
2345  (__m512d)__builtin_ia32_divpd512((__v8df)(__m512d)(A), \
2346  (__v8df)(__m512d)(B), (int)(R))
2347 
2348 #define _mm512_mask_div_round_pd(W, U, A, B, R) \
2349  (__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \
2350  (__v8df)_mm512_div_round_pd((A), (B), (R)), \
2351  (__v8df)(__m512d)(W));
2352 
2353 #define _mm512_maskz_div_round_pd(U, A, B, R) \
2354  (__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \
2355  (__v8df)_mm512_div_round_pd((A), (B), (R)), \
2356  (__v8df)_mm512_setzero_pd());
2357 
2358 #define _mm512_div_round_ps(A, B, R) \
2359  (__m512)__builtin_ia32_divps512((__v16sf)(__m512)(A), \
2360  (__v16sf)(__m512)(B), (int)(R))
2361 
2362 #define _mm512_mask_div_round_ps(W, U, A, B, R) \
2363  (__m512)__builtin_ia32_selectps_512((__mmask16)(U), \
2364  (__v16sf)_mm512_div_round_ps((A), (B), (R)), \
2365  (__v16sf)(__m512)(W));
2366 
2367 #define _mm512_maskz_div_round_ps(U, A, B, R) \
2368  (__m512)__builtin_ia32_selectps_512((__mmask16)(U), \
2369  (__v16sf)_mm512_div_round_ps((A), (B), (R)), \
2370  (__v16sf)_mm512_setzero_ps());
2371 
2372 #define _mm512_roundscale_ps(A, B) \
2373  (__m512)__builtin_ia32_rndscaleps_mask((__v16sf)(__m512)(A), (int)(B), \
2374  (__v16sf)_mm512_undefined_ps(), \
2375  (__mmask16)-1, \
2376  _MM_FROUND_CUR_DIRECTION)
2377 
2378 #define _mm512_mask_roundscale_ps(A, B, C, imm) \
2379  (__m512)__builtin_ia32_rndscaleps_mask((__v16sf)(__m512)(C), (int)(imm), \
2380  (__v16sf)(__m512)(A), (__mmask16)(B), \
2381  _MM_FROUND_CUR_DIRECTION)
2382 
2383 #define _mm512_maskz_roundscale_ps(A, B, imm) \
2384  (__m512)__builtin_ia32_rndscaleps_mask((__v16sf)(__m512)(B), (int)(imm), \
2385  (__v16sf)_mm512_setzero_ps(), \
2386  (__mmask16)(A), \
2387  _MM_FROUND_CUR_DIRECTION)
2388 
2389 #define _mm512_mask_roundscale_round_ps(A, B, C, imm, R) \
2390  (__m512)__builtin_ia32_rndscaleps_mask((__v16sf)(__m512)(C), (int)(imm), \
2391  (__v16sf)(__m512)(A), (__mmask16)(B), \
2392  (int)(R))
2393 
2394 #define _mm512_maskz_roundscale_round_ps(A, B, imm, R) \
2395  (__m512)__builtin_ia32_rndscaleps_mask((__v16sf)(__m512)(B), (int)(imm), \
2396  (__v16sf)_mm512_setzero_ps(), \
2397  (__mmask16)(A), (int)(R))
2398 
2399 #define _mm512_roundscale_round_ps(A, imm, R) \
2400  (__m512)__builtin_ia32_rndscaleps_mask((__v16sf)(__m512)(A), (int)(imm), \
2401  (__v16sf)_mm512_undefined_ps(), \
2402  (__mmask16)-1, (int)(R))
2403 
2404 #define _mm512_roundscale_pd(A, B) \
2405  (__m512d)__builtin_ia32_rndscalepd_mask((__v8df)(__m512d)(A), (int)(B), \
2406  (__v8df)_mm512_undefined_pd(), \
2407  (__mmask8)-1, \
2408  _MM_FROUND_CUR_DIRECTION)
2409 
2410 #define _mm512_mask_roundscale_pd(A, B, C, imm) \
2411  (__m512d)__builtin_ia32_rndscalepd_mask((__v8df)(__m512d)(C), (int)(imm), \
2412  (__v8df)(__m512d)(A), (__mmask8)(B), \
2413  _MM_FROUND_CUR_DIRECTION)
2414 
2415 #define _mm512_maskz_roundscale_pd(A, B, imm) \
2416  (__m512d)__builtin_ia32_rndscalepd_mask((__v8df)(__m512d)(B), (int)(imm), \
2417  (__v8df)_mm512_setzero_pd(), \
2418  (__mmask8)(A), \
2419  _MM_FROUND_CUR_DIRECTION)
2420 
2421 #define _mm512_mask_roundscale_round_pd(A, B, C, imm, R) \
2422  (__m512d)__builtin_ia32_rndscalepd_mask((__v8df)(__m512d)(C), (int)(imm), \
2423  (__v8df)(__m512d)(A), (__mmask8)(B), \
2424  (int)(R))
2425 
2426 #define _mm512_maskz_roundscale_round_pd(A, B, imm, R) \
2427  (__m512d)__builtin_ia32_rndscalepd_mask((__v8df)(__m512d)(B), (int)(imm), \
2428  (__v8df)_mm512_setzero_pd(), \
2429  (__mmask8)(A), (int)(R))
2430 
2431 #define _mm512_roundscale_round_pd(A, imm, R) \
2432  (__m512d)__builtin_ia32_rndscalepd_mask((__v8df)(__m512d)(A), (int)(imm), \
2433  (__v8df)_mm512_undefined_pd(), \
2434  (__mmask8)-1, (int)(R))
2435 
2436 #define _mm512_fmadd_round_pd(A, B, C, R) \
2437  (__m512d)__builtin_ia32_vfmaddpd512_mask((__v8df)(__m512d)(A), \
2438  (__v8df)(__m512d)(B), \
2439  (__v8df)(__m512d)(C), \
2440  (__mmask8)-1, (int)(R))
2441 
2442 
2443 #define _mm512_mask_fmadd_round_pd(A, U, B, C, R) \
2444  (__m512d)__builtin_ia32_vfmaddpd512_mask((__v8df)(__m512d)(A), \
2445  (__v8df)(__m512d)(B), \
2446  (__v8df)(__m512d)(C), \
2447  (__mmask8)(U), (int)(R))
2448 
2449 
2450 #define _mm512_mask3_fmadd_round_pd(A, B, C, U, R) \
2451  (__m512d)__builtin_ia32_vfmaddpd512_mask3((__v8df)(__m512d)(A), \
2452  (__v8df)(__m512d)(B), \
2453  (__v8df)(__m512d)(C), \
2454  (__mmask8)(U), (int)(R))
2455 
2456 
2457 #define _mm512_maskz_fmadd_round_pd(U, A, B, C, R) \
2458  (__m512d)__builtin_ia32_vfmaddpd512_maskz((__v8df)(__m512d)(A), \
2459  (__v8df)(__m512d)(B), \
2460  (__v8df)(__m512d)(C), \
2461  (__mmask8)(U), (int)(R))
2462 
2463 
2464 #define _mm512_fmsub_round_pd(A, B, C, R) \
2465  (__m512d)__builtin_ia32_vfmaddpd512_mask((__v8df)(__m512d)(A), \
2466  (__v8df)(__m512d)(B), \
2467  -(__v8df)(__m512d)(C), \
2468  (__mmask8)-1, (int)(R))
2469 
2470 
2471 #define _mm512_mask_fmsub_round_pd(A, U, B, C, R) \
2472  (__m512d)__builtin_ia32_vfmaddpd512_mask((__v8df)(__m512d)(A), \
2473  (__v8df)(__m512d)(B), \
2474  -(__v8df)(__m512d)(C), \
2475  (__mmask8)(U), (int)(R))
2476 
2477 
2478 #define _mm512_maskz_fmsub_round_pd(U, A, B, C, R) \
2479  (__m512d)__builtin_ia32_vfmaddpd512_maskz((__v8df)(__m512d)(A), \
2480  (__v8df)(__m512d)(B), \
2481  -(__v8df)(__m512d)(C), \
2482  (__mmask8)(U), (int)(R))
2483 
2484 
2485 #define _mm512_fnmadd_round_pd(A, B, C, R) \
2486  (__m512d)__builtin_ia32_vfmaddpd512_mask(-(__v8df)(__m512d)(A), \
2487  (__v8df)(__m512d)(B), \
2488  (__v8df)(__m512d)(C), \
2489  (__mmask8)-1, (int)(R))
2490 
2491 
2492 #define _mm512_mask3_fnmadd_round_pd(A, B, C, U, R) \
2493  (__m512d)__builtin_ia32_vfmaddpd512_mask3(-(__v8df)(__m512d)(A), \
2494  (__v8df)(__m512d)(B), \
2495  (__v8df)(__m512d)(C), \
2496  (__mmask8)(U), (int)(R))
2497 
2498 
2499 #define _mm512_maskz_fnmadd_round_pd(U, A, B, C, R) \
2500  (__m512d)__builtin_ia32_vfmaddpd512_maskz(-(__v8df)(__m512d)(A), \
2501  (__v8df)(__m512d)(B), \
2502  (__v8df)(__m512d)(C), \
2503  (__mmask8)(U), (int)(R))
2504 
2505 
2506 #define _mm512_fnmsub_round_pd(A, B, C, R) \
2507  (__m512d)__builtin_ia32_vfmaddpd512_mask(-(__v8df)(__m512d)(A), \
2508  (__v8df)(__m512d)(B), \
2509  -(__v8df)(__m512d)(C), \
2510  (__mmask8)-1, (int)(R))
2511 
2512 
2513 #define _mm512_maskz_fnmsub_round_pd(U, A, B, C, R) \
2514  (__m512d)__builtin_ia32_vfmaddpd512_maskz(-(__v8df)(__m512d)(A), \
2515  (__v8df)(__m512d)(B), \
2516  -(__v8df)(__m512d)(C), \
2517  (__mmask8)(U), (int)(R))
2518 
2519 
2520 static __inline__ __m512d __DEFAULT_FN_ATTRS512
2521 _mm512_fmadd_pd(__m512d __A, __m512d __B, __m512d __C)
2522 {
2523  return (__m512d) __builtin_ia32_vfmaddpd512_mask ((__v8df) __A,
2524  (__v8df) __B,
2525  (__v8df) __C,
2526  (__mmask8) -1,
2528 }
2529 
2530 static __inline__ __m512d __DEFAULT_FN_ATTRS512
2531 _mm512_mask_fmadd_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C)
2532 {
2533  return (__m512d) __builtin_ia32_vfmaddpd512_mask ((__v8df) __A,
2534  (__v8df) __B,
2535  (__v8df) __C,
2536  (__mmask8) __U,
2538 }
2539 
2540 static __inline__ __m512d __DEFAULT_FN_ATTRS512
2541 _mm512_mask3_fmadd_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U)
2542 {
2543  return (__m512d) __builtin_ia32_vfmaddpd512_mask3 ((__v8df) __A,
2544  (__v8df) __B,
2545  (__v8df) __C,
2546  (__mmask8) __U,
2548 }
2549 
2550 static __inline__ __m512d __DEFAULT_FN_ATTRS512
2551 _mm512_maskz_fmadd_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C)
2552 {
2553  return (__m512d) __builtin_ia32_vfmaddpd512_maskz ((__v8df) __A,
2554  (__v8df) __B,
2555  (__v8df) __C,
2556  (__mmask8) __U,
2558 }
2559 
2560 static __inline__ __m512d __DEFAULT_FN_ATTRS512
2561 _mm512_fmsub_pd(__m512d __A, __m512d __B, __m512d __C)
2562 {
2563  return (__m512d) __builtin_ia32_vfmaddpd512_mask ((__v8df) __A,
2564  (__v8df) __B,
2565  -(__v8df) __C,
2566  (__mmask8) -1,
2568 }
2569 
2570 static __inline__ __m512d __DEFAULT_FN_ATTRS512
2571 _mm512_mask_fmsub_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C)
2572 {
2573  return (__m512d) __builtin_ia32_vfmaddpd512_mask ((__v8df) __A,
2574  (__v8df) __B,
2575  -(__v8df) __C,
2576  (__mmask8) __U,
2578 }
2579 
2580 static __inline__ __m512d __DEFAULT_FN_ATTRS512
2581 _mm512_maskz_fmsub_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C)
2582 {
2583  return (__m512d) __builtin_ia32_vfmaddpd512_maskz ((__v8df) __A,
2584  (__v8df) __B,
2585  -(__v8df) __C,
2586  (__mmask8) __U,
2588 }
2589 
2590 static __inline__ __m512d __DEFAULT_FN_ATTRS512
2591 _mm512_fnmadd_pd(__m512d __A, __m512d __B, __m512d __C)
2592 {
2593  return (__m512d) __builtin_ia32_vfmaddpd512_mask ((__v8df) __A,
2594  -(__v8df) __B,
2595  (__v8df) __C,
2596  (__mmask8) -1,
2598 }
2599 
2600 static __inline__ __m512d __DEFAULT_FN_ATTRS512
2601 _mm512_mask3_fnmadd_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U)
2602 {
2603  return (__m512d) __builtin_ia32_vfmaddpd512_mask3 (-(__v8df) __A,
2604  (__v8df) __B,
2605  (__v8df) __C,
2606  (__mmask8) __U,
2608 }
2609 
2610 static __inline__ __m512d __DEFAULT_FN_ATTRS512
2611 _mm512_maskz_fnmadd_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C)
2612 {
2613  return (__m512d) __builtin_ia32_vfmaddpd512_maskz (-(__v8df) __A,
2614  (__v8df) __B,
2615  (__v8df) __C,
2616  (__mmask8) __U,
2618 }
2619 
2620 static __inline__ __m512d __DEFAULT_FN_ATTRS512
2621 _mm512_fnmsub_pd(__m512d __A, __m512d __B, __m512d __C)
2622 {
2623  return (__m512d) __builtin_ia32_vfmaddpd512_mask ((__v8df) __A,
2624  -(__v8df) __B,
2625  -(__v8df) __C,
2626  (__mmask8) -1,
2628 }
2629 
2630 static __inline__ __m512d __DEFAULT_FN_ATTRS512
2631 _mm512_maskz_fnmsub_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C)
2632 {
2633  return (__m512d) __builtin_ia32_vfmaddpd512_maskz (-(__v8df) __A,
2634  (__v8df) __B,
2635  -(__v8df) __C,
2636  (__mmask8) __U,
2638 }
2639 
2640 #define _mm512_fmadd_round_ps(A, B, C, R) \
2641  (__m512)__builtin_ia32_vfmaddps512_mask((__v16sf)(__m512)(A), \
2642  (__v16sf)(__m512)(B), \
2643  (__v16sf)(__m512)(C), \
2644  (__mmask16)-1, (int)(R))
2645 
2646 
2647 #define _mm512_mask_fmadd_round_ps(A, U, B, C, R) \
2648  (__m512)__builtin_ia32_vfmaddps512_mask((__v16sf)(__m512)(A), \
2649  (__v16sf)(__m512)(B), \
2650  (__v16sf)(__m512)(C), \
2651  (__mmask16)(U), (int)(R))
2652 
2653 
2654 #define _mm512_mask3_fmadd_round_ps(A, B, C, U, R) \
2655  (__m512)__builtin_ia32_vfmaddps512_mask3((__v16sf)(__m512)(A), \
2656  (__v16sf)(__m512)(B), \
2657  (__v16sf)(__m512)(C), \
2658  (__mmask16)(U), (int)(R))
2659 
2660 
2661 #define _mm512_maskz_fmadd_round_ps(U, A, B, C, R) \
2662  (__m512)__builtin_ia32_vfmaddps512_maskz((__v16sf)(__m512)(A), \
2663  (__v16sf)(__m512)(B), \
2664  (__v16sf)(__m512)(C), \
2665  (__mmask16)(U), (int)(R))
2666 
2667 
2668 #define _mm512_fmsub_round_ps(A, B, C, R) \
2669  (__m512)__builtin_ia32_vfmaddps512_mask((__v16sf)(__m512)(A), \
2670  (__v16sf)(__m512)(B), \
2671  -(__v16sf)(__m512)(C), \
2672  (__mmask16)-1, (int)(R))
2673 
2674 
2675 #define _mm512_mask_fmsub_round_ps(A, U, B, C, R) \
2676  (__m512)__builtin_ia32_vfmaddps512_mask((__v16sf)(__m512)(A), \
2677  (__v16sf)(__m512)(B), \
2678  -(__v16sf)(__m512)(C), \
2679  (__mmask16)(U), (int)(R))
2680 
2681 
2682 #define _mm512_maskz_fmsub_round_ps(U, A, B, C, R) \
2683  (__m512)__builtin_ia32_vfmaddps512_maskz((__v16sf)(__m512)(A), \
2684  (__v16sf)(__m512)(B), \
2685  -(__v16sf)(__m512)(C), \
2686  (__mmask16)(U), (int)(R))
2687 
2688 
2689 #define _mm512_fnmadd_round_ps(A, B, C, R) \
2690  (__m512)__builtin_ia32_vfmaddps512_mask((__v16sf)(__m512)(A), \
2691  -(__v16sf)(__m512)(B), \
2692  (__v16sf)(__m512)(C), \
2693  (__mmask16)-1, (int)(R))
2694 
2695 
2696 #define _mm512_mask3_fnmadd_round_ps(A, B, C, U, R) \
2697  (__m512)__builtin_ia32_vfmaddps512_mask3(-(__v16sf)(__m512)(A), \
2698  (__v16sf)(__m512)(B), \
2699  (__v16sf)(__m512)(C), \
2700  (__mmask16)(U), (int)(R))
2701 
2702 
2703 #define _mm512_maskz_fnmadd_round_ps(U, A, B, C, R) \
2704  (__m512)__builtin_ia32_vfmaddps512_maskz(-(__v16sf)(__m512)(A), \
2705  (__v16sf)(__m512)(B), \
2706  (__v16sf)(__m512)(C), \
2707  (__mmask16)(U), (int)(R))
2708 
2709 
2710 #define _mm512_fnmsub_round_ps(A, B, C, R) \
2711  (__m512)__builtin_ia32_vfmaddps512_mask((__v16sf)(__m512)(A), \
2712  -(__v16sf)(__m512)(B), \
2713  -(__v16sf)(__m512)(C), \
2714  (__mmask16)-1, (int)(R))
2715 
2716 
2717 #define _mm512_maskz_fnmsub_round_ps(U, A, B, C, R) \
2718  (__m512)__builtin_ia32_vfmaddps512_maskz(-(__v16sf)(__m512)(A), \
2719  (__v16sf)(__m512)(B), \
2720  -(__v16sf)(__m512)(C), \
2721  (__mmask16)(U), (int)(R))
2722 
2723 
2724 static __inline__ __m512 __DEFAULT_FN_ATTRS512
2725 _mm512_fmadd_ps(__m512 __A, __m512 __B, __m512 __C)
2726 {
2727  return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A,
2728  (__v16sf) __B,
2729  (__v16sf) __C,
2730  (__mmask16) -1,
2732 }
2733 
2734 static __inline__ __m512 __DEFAULT_FN_ATTRS512
2735 _mm512_mask_fmadd_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C)
2736 {
2737  return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A,
2738  (__v16sf) __B,
2739  (__v16sf) __C,
2740  (__mmask16) __U,
2742 }
2743 
2744 static __inline__ __m512 __DEFAULT_FN_ATTRS512
2745 _mm512_mask3_fmadd_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U)
2746 {
2747  return (__m512) __builtin_ia32_vfmaddps512_mask3 ((__v16sf) __A,
2748  (__v16sf) __B,
2749  (__v16sf) __C,
2750  (__mmask16) __U,
2752 }
2753 
2754 static __inline__ __m512 __DEFAULT_FN_ATTRS512
2755 _mm512_maskz_fmadd_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C)
2756 {
2757  return (__m512) __builtin_ia32_vfmaddps512_maskz ((__v16sf) __A,
2758  (__v16sf) __B,
2759  (__v16sf) __C,
2760  (__mmask16) __U,
2762 }
2763 
2764 static __inline__ __m512 __DEFAULT_FN_ATTRS512
2765 _mm512_fmsub_ps(__m512 __A, __m512 __B, __m512 __C)
2766 {
2767  return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A,
2768  (__v16sf) __B,
2769  -(__v16sf) __C,
2770  (__mmask16) -1,
2772 }
2773 
2774 static __inline__ __m512 __DEFAULT_FN_ATTRS512
2775 _mm512_mask_fmsub_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C)
2776 {
2777  return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A,
2778  (__v16sf) __B,
2779  -(__v16sf) __C,
2780  (__mmask16) __U,
2782 }
2783 
2784 static __inline__ __m512 __DEFAULT_FN_ATTRS512
2785 _mm512_maskz_fmsub_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C)
2786 {
2787  return (__m512) __builtin_ia32_vfmaddps512_maskz ((__v16sf) __A,
2788  (__v16sf) __B,
2789  -(__v16sf) __C,
2790  (__mmask16) __U,
2792 }
2793 
2794 static __inline__ __m512 __DEFAULT_FN_ATTRS512
2795 _mm512_fnmadd_ps(__m512 __A, __m512 __B, __m512 __C)
2796 {
2797  return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A,
2798  -(__v16sf) __B,
2799  (__v16sf) __C,
2800  (__mmask16) -1,
2802 }
2803 
2804 static __inline__ __m512 __DEFAULT_FN_ATTRS512
2805 _mm512_mask3_fnmadd_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U)
2806 {
2807  return (__m512) __builtin_ia32_vfmaddps512_mask3 (-(__v16sf) __A,
2808  (__v16sf) __B,
2809  (__v16sf) __C,
2810  (__mmask16) __U,
2812 }
2813 
2814 static __inline__ __m512 __DEFAULT_FN_ATTRS512
2815 _mm512_maskz_fnmadd_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C)
2816 {
2817  return (__m512) __builtin_ia32_vfmaddps512_maskz (-(__v16sf) __A,
2818  (__v16sf) __B,
2819  (__v16sf) __C,
2820  (__mmask16) __U,
2822 }
2823 
2824 static __inline__ __m512 __DEFAULT_FN_ATTRS512
2825 _mm512_fnmsub_ps(__m512 __A, __m512 __B, __m512 __C)
2826 {
2827  return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A,
2828  -(__v16sf) __B,
2829  -(__v16sf) __C,
2830  (__mmask16) -1,
2832 }
2833 
2834 static __inline__ __m512 __DEFAULT_FN_ATTRS512
2835 _mm512_maskz_fnmsub_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C)
2836 {
2837  return (__m512) __builtin_ia32_vfmaddps512_maskz (-(__v16sf) __A,
2838  (__v16sf) __B,
2839  -(__v16sf) __C,
2840  (__mmask16) __U,
2842 }
2843 
2844 #define _mm512_fmaddsub_round_pd(A, B, C, R) \
2845  (__m512d)__builtin_ia32_vfmaddsubpd512_mask((__v8df)(__m512d)(A), \
2846  (__v8df)(__m512d)(B), \
2847  (__v8df)(__m512d)(C), \
2848  (__mmask8)-1, (int)(R))
2849 
2850 
2851 #define _mm512_mask_fmaddsub_round_pd(A, U, B, C, R) \
2852  (__m512d)__builtin_ia32_vfmaddsubpd512_mask((__v8df)(__m512d)(A), \
2853  (__v8df)(__m512d)(B), \
2854  (__v8df)(__m512d)(C), \
2855  (__mmask8)(U), (int)(R))
2856 
2857 
2858 #define _mm512_mask3_fmaddsub_round_pd(A, B, C, U, R) \
2859  (__m512d)__builtin_ia32_vfmaddsubpd512_mask3((__v8df)(__m512d)(A), \
2860  (__v8df)(__m512d)(B), \
2861  (__v8df)(__m512d)(C), \
2862  (__mmask8)(U), (int)(R))
2863 
2864 
2865 #define _mm512_maskz_fmaddsub_round_pd(U, A, B, C, R) \
2866  (__m512d)__builtin_ia32_vfmaddsubpd512_maskz((__v8df)(__m512d)(A), \
2867  (__v8df)(__m512d)(B), \
2868  (__v8df)(__m512d)(C), \
2869  (__mmask8)(U), (int)(R))
2870 
2871 
2872 #define _mm512_fmsubadd_round_pd(A, B, C, R) \
2873  (__m512d)__builtin_ia32_vfmaddsubpd512_mask((__v8df)(__m512d)(A), \
2874  (__v8df)(__m512d)(B), \
2875  -(__v8df)(__m512d)(C), \
2876  (__mmask8)-1, (int)(R))
2877 
2878 
2879 #define _mm512_mask_fmsubadd_round_pd(A, U, B, C, R) \
2880  (__m512d)__builtin_ia32_vfmaddsubpd512_mask((__v8df)(__m512d)(A), \
2881  (__v8df)(__m512d)(B), \
2882  -(__v8df)(__m512d)(C), \
2883  (__mmask8)(U), (int)(R))
2884 
2885 
2886 #define _mm512_maskz_fmsubadd_round_pd(U, A, B, C, R) \
2887  (__m512d)__builtin_ia32_vfmaddsubpd512_maskz((__v8df)(__m512d)(A), \
2888  (__v8df)(__m512d)(B), \
2889  -(__v8df)(__m512d)(C), \
2890  (__mmask8)(U), (int)(R))
2891 
2892 
2893 static __inline__ __m512d __DEFAULT_FN_ATTRS512
2894 _mm512_fmaddsub_pd(__m512d __A, __m512d __B, __m512d __C)
2895 {
2896  return (__m512d) __builtin_ia32_vfmaddsubpd512_mask ((__v8df) __A,
2897  (__v8df) __B,
2898  (__v8df) __C,
2899  (__mmask8) -1,
2901 }
2902 
2903 static __inline__ __m512d __DEFAULT_FN_ATTRS512
2904 _mm512_mask_fmaddsub_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C)
2905 {
2906  return (__m512d) __builtin_ia32_vfmaddsubpd512_mask ((__v8df) __A,
2907  (__v8df) __B,
2908  (__v8df) __C,
2909  (__mmask8) __U,
2911 }
2912 
2913 static __inline__ __m512d __DEFAULT_FN_ATTRS512
2914 _mm512_mask3_fmaddsub_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U)
2915 {
2916  return (__m512d) __builtin_ia32_vfmaddsubpd512_mask3 ((__v8df) __A,
2917  (__v8df) __B,
2918  (__v8df) __C,
2919  (__mmask8) __U,
2921 }
2922 
2923 static __inline__ __m512d __DEFAULT_FN_ATTRS512
2924 _mm512_maskz_fmaddsub_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C)
2925 {
2926  return (__m512d) __builtin_ia32_vfmaddsubpd512_maskz ((__v8df) __A,
2927  (__v8df) __B,
2928  (__v8df) __C,
2929  (__mmask8) __U,
2931 }
2932 
2933 static __inline__ __m512d __DEFAULT_FN_ATTRS512
2934 _mm512_fmsubadd_pd(__m512d __A, __m512d __B, __m512d __C)
2935 {
2936  return (__m512d) __builtin_ia32_vfmaddsubpd512_mask ((__v8df) __A,
2937  (__v8df) __B,
2938  -(__v8df) __C,
2939  (__mmask8) -1,
2941 }
2942 
2943 static __inline__ __m512d __DEFAULT_FN_ATTRS512
2944 _mm512_mask_fmsubadd_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C)
2945 {
2946  return (__m512d) __builtin_ia32_vfmaddsubpd512_mask ((__v8df) __A,
2947  (__v8df) __B,
2948  -(__v8df) __C,
2949  (__mmask8) __U,
2951 }
2952 
2953 static __inline__ __m512d __DEFAULT_FN_ATTRS512
2954 _mm512_maskz_fmsubadd_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C)
2955 {
2956  return (__m512d) __builtin_ia32_vfmaddsubpd512_maskz ((__v8df) __A,
2957  (__v8df) __B,
2958  -(__v8df) __C,
2959  (__mmask8) __U,
2961 }
2962 
2963 #define _mm512_fmaddsub_round_ps(A, B, C, R) \
2964  (__m512)__builtin_ia32_vfmaddsubps512_mask((__v16sf)(__m512)(A), \
2965  (__v16sf)(__m512)(B), \
2966  (__v16sf)(__m512)(C), \
2967  (__mmask16)-1, (int)(R))
2968 
2969 
2970 #define _mm512_mask_fmaddsub_round_ps(A, U, B, C, R) \
2971  (__m512)__builtin_ia32_vfmaddsubps512_mask((__v16sf)(__m512)(A), \
2972  (__v16sf)(__m512)(B), \
2973  (__v16sf)(__m512)(C), \
2974  (__mmask16)(U), (int)(R))
2975 
2976 
2977 #define _mm512_mask3_fmaddsub_round_ps(A, B, C, U, R) \
2978  (__m512)__builtin_ia32_vfmaddsubps512_mask3((__v16sf)(__m512)(A), \
2979  (__v16sf)(__m512)(B), \
2980  (__v16sf)(__m512)(C), \
2981  (__mmask16)(U), (int)(R))
2982 
2983 
2984 #define _mm512_maskz_fmaddsub_round_ps(U, A, B, C, R) \
2985  (__m512)__builtin_ia32_vfmaddsubps512_maskz((__v16sf)(__m512)(A), \
2986  (__v16sf)(__m512)(B), \
2987  (__v16sf)(__m512)(C), \
2988  (__mmask16)(U), (int)(R))
2989 
2990 
2991 #define _mm512_fmsubadd_round_ps(A, B, C, R) \
2992  (__m512)__builtin_ia32_vfmaddsubps512_mask((__v16sf)(__m512)(A), \
2993  (__v16sf)(__m512)(B), \
2994  -(__v16sf)(__m512)(C), \
2995  (__mmask16)-1, (int)(R))
2996 
2997 
2998 #define _mm512_mask_fmsubadd_round_ps(A, U, B, C, R) \
2999  (__m512)__builtin_ia32_vfmaddsubps512_mask((__v16sf)(__m512)(A), \
3000  (__v16sf)(__m512)(B), \
3001  -(__v16sf)(__m512)(C), \
3002  (__mmask16)(U), (int)(R))
3003 
3004 
3005 #define _mm512_maskz_fmsubadd_round_ps(U, A, B, C, R) \
3006  (__m512)__builtin_ia32_vfmaddsubps512_maskz((__v16sf)(__m512)(A), \
3007  (__v16sf)(__m512)(B), \
3008  -(__v16sf)(__m512)(C), \
3009  (__mmask16)(U), (int)(R))
3010 
3011 
3012 static __inline__ __m512 __DEFAULT_FN_ATTRS512
3013 _mm512_fmaddsub_ps(__m512 __A, __m512 __B, __m512 __C)
3014 {
3015  return (__m512) __builtin_ia32_vfmaddsubps512_mask ((__v16sf) __A,
3016  (__v16sf) __B,
3017  (__v16sf) __C,
3018  (__mmask16) -1,
3020 }
3021 
3022 static __inline__ __m512 __DEFAULT_FN_ATTRS512
3023 _mm512_mask_fmaddsub_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C)
3024 {
3025  return (__m512) __builtin_ia32_vfmaddsubps512_mask ((__v16sf) __A,
3026  (__v16sf) __B,
3027  (__v16sf) __C,
3028  (__mmask16) __U,
3030 }
3031 
3032 static __inline__ __m512 __DEFAULT_FN_ATTRS512
3033 _mm512_mask3_fmaddsub_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U)
3034 {
3035  return (__m512) __builtin_ia32_vfmaddsubps512_mask3 ((__v16sf) __A,
3036  (__v16sf) __B,
3037  (__v16sf) __C,
3038  (__mmask16) __U,
3040 }
3041 
3042 static __inline__ __m512 __DEFAULT_FN_ATTRS512
3043 _mm512_maskz_fmaddsub_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C)
3044 {
3045  return (__m512) __builtin_ia32_vfmaddsubps512_maskz ((__v16sf) __A,
3046  (__v16sf) __B,
3047  (__v16sf) __C,
3048  (__mmask16) __U,
3050 }
3051 
3052 static __inline__ __m512 __DEFAULT_FN_ATTRS512
3053 _mm512_fmsubadd_ps(__m512 __A, __m512 __B, __m512 __C)
3054 {
3055  return (__m512) __builtin_ia32_vfmaddsubps512_mask ((__v16sf) __A,
3056  (__v16sf) __B,
3057  -(__v16sf) __C,
3058  (__mmask16) -1,
3060 }
3061 
3062 static __inline__ __m512 __DEFAULT_FN_ATTRS512
3063 _mm512_mask_fmsubadd_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C)
3064 {
3065  return (__m512) __builtin_ia32_vfmaddsubps512_mask ((__v16sf) __A,
3066  (__v16sf) __B,
3067  -(__v16sf) __C,
3068  (__mmask16) __U,
3070 }
3071 
3072 static __inline__ __m512 __DEFAULT_FN_ATTRS512
3073 _mm512_maskz_fmsubadd_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C)
3074 {
3075  return (__m512) __builtin_ia32_vfmaddsubps512_maskz ((__v16sf) __A,
3076  (__v16sf) __B,
3077  -(__v16sf) __C,
3078  (__mmask16) __U,
3080 }
3081 
3082 #define _mm512_mask3_fmsub_round_pd(A, B, C, U, R) \
3083  (__m512d)__builtin_ia32_vfmsubpd512_mask3((__v8df)(__m512d)(A), \
3084  (__v8df)(__m512d)(B), \
3085  (__v8df)(__m512d)(C), \
3086  (__mmask8)(U), (int)(R))
3087 
3088 
3089 static __inline__ __m512d __DEFAULT_FN_ATTRS512
3090 _mm512_mask3_fmsub_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U)
3091 {
3092  return (__m512d)__builtin_ia32_vfmsubpd512_mask3 ((__v8df) __A,
3093  (__v8df) __B,
3094  (__v8df) __C,
3095  (__mmask8) __U,
3097 }
3098 
3099 #define _mm512_mask3_fmsub_round_ps(A, B, C, U, R) \
3100  (__m512)__builtin_ia32_vfmsubps512_mask3((__v16sf)(__m512)(A), \
3101  (__v16sf)(__m512)(B), \
3102  (__v16sf)(__m512)(C), \
3103  (__mmask16)(U), (int)(R))
3104 
3105 static __inline__ __m512 __DEFAULT_FN_ATTRS512
3106 _mm512_mask3_fmsub_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U)
3107 {
3108  return (__m512)__builtin_ia32_vfmsubps512_mask3 ((__v16sf) __A,
3109  (__v16sf) __B,
3110  (__v16sf) __C,
3111  (__mmask16) __U,
3113 }
3114 
3115 #define _mm512_mask3_fmsubadd_round_pd(A, B, C, U, R) \
3116  (__m512d)__builtin_ia32_vfmsubaddpd512_mask3((__v8df)(__m512d)(A), \
3117  (__v8df)(__m512d)(B), \
3118  (__v8df)(__m512d)(C), \
3119  (__mmask8)(U), (int)(R))
3120 
3121 
3122 static __inline__ __m512d __DEFAULT_FN_ATTRS512
3123 _mm512_mask3_fmsubadd_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U)
3124 {
3125  return (__m512d)__builtin_ia32_vfmsubaddpd512_mask3 ((__v8df) __A,
3126  (__v8df) __B,
3127  (__v8df) __C,
3128  (__mmask8) __U,
3130 }
3131 
3132 #define _mm512_mask3_fmsubadd_round_ps(A, B, C, U, R) \
3133  (__m512)__builtin_ia32_vfmsubaddps512_mask3((__v16sf)(__m512)(A), \
3134  (__v16sf)(__m512)(B), \
3135  (__v16sf)(__m512)(C), \
3136  (__mmask16)(U), (int)(R))
3137 
3138 
3139 static __inline__ __m512 __DEFAULT_FN_ATTRS512
3140 _mm512_mask3_fmsubadd_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U)
3141 {
3142  return (__m512)__builtin_ia32_vfmsubaddps512_mask3 ((__v16sf) __A,
3143  (__v16sf) __B,
3144  (__v16sf) __C,
3145  (__mmask16) __U,
3147 }
3148 
3149 #define _mm512_mask_fnmadd_round_pd(A, U, B, C, R) \
3150  (__m512d)__builtin_ia32_vfmaddpd512_mask((__v8df)(__m512d)(A), \
3151  -(__v8df)(__m512d)(B), \
3152  (__v8df)(__m512d)(C), \
3153  (__mmask8)(U), (int)(R))
3154 
3155 
3156 static __inline__ __m512d __DEFAULT_FN_ATTRS512
3157 _mm512_mask_fnmadd_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C)
3158 {
3159  return (__m512d) __builtin_ia32_vfmaddpd512_mask ((__v8df) __A,
3160  -(__v8df) __B,
3161  (__v8df) __C,
3162  (__mmask8) __U,
3164 }
3165 
3166 #define _mm512_mask_fnmadd_round_ps(A, U, B, C, R) \
3167  (__m512)__builtin_ia32_vfmaddps512_mask((__v16sf)(__m512)(A), \
3168  -(__v16sf)(__m512)(B), \
3169  (__v16sf)(__m512)(C), \
3170  (__mmask16)(U), (int)(R))
3171 
3172 
3173 static __inline__ __m512 __DEFAULT_FN_ATTRS512
3174 _mm512_mask_fnmadd_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C)
3175 {
3176  return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A,
3177  -(__v16sf) __B,
3178  (__v16sf) __C,
3179  (__mmask16) __U,
3181 }
3182 
3183 #define _mm512_mask_fnmsub_round_pd(A, U, B, C, R) \
3184  (__m512d)__builtin_ia32_vfmaddpd512_mask((__v8df)(__m512d)(A), \
3185  -(__v8df)(__m512d)(B), \
3186  -(__v8df)(__m512d)(C), \
3187  (__mmask8)(U), (int)(R))
3188 
3189 
3190 #define _mm512_mask3_fnmsub_round_pd(A, B, C, U, R) \
3191  (__m512d)__builtin_ia32_vfmsubpd512_mask3(-(__v8df)(__m512d)(A), \
3192  (__v8df)(__m512d)(B), \
3193  (__v8df)(__m512d)(C), \
3194  (__mmask8)(U), (int)(R))
3195 
3196 
3197 static __inline__ __m512d __DEFAULT_FN_ATTRS512
3198 _mm512_mask_fnmsub_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C)
3199 {
3200  return (__m512d) __builtin_ia32_vfmaddpd512_mask ((__v8df) __A,
3201  -(__v8df) __B,
3202  -(__v8df) __C,
3203  (__mmask8) __U,
3205 }
3206 
3207 static __inline__ __m512d __DEFAULT_FN_ATTRS512
3208 _mm512_mask3_fnmsub_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U)
3209 {
3210  return (__m512d) __builtin_ia32_vfmsubpd512_mask3 (-(__v8df) __A,
3211  (__v8df) __B,
3212  (__v8df) __C,
3213  (__mmask8) __U,
3215 }
3216 
3217 #define _mm512_mask_fnmsub_round_ps(A, U, B, C, R) \
3218  (__m512)__builtin_ia32_vfmaddps512_mask((__v16sf)(__m512)(A), \
3219  -(__v16sf)(__m512)(B), \
3220  -(__v16sf)(__m512)(C), \
3221  (__mmask16)(U), (int)(R))
3222 
3223 
3224 #define _mm512_mask3_fnmsub_round_ps(A, B, C, U, R) \
3225  (__m512)__builtin_ia32_vfmsubps512_mask3(-(__v16sf)(__m512)(A), \
3226  (__v16sf)(__m512)(B), \
3227  (__v16sf)(__m512)(C), \
3228  (__mmask16)(U), (int)(R))
3229 
3230 
3231 static __inline__ __m512 __DEFAULT_FN_ATTRS512
3232 _mm512_mask_fnmsub_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C)
3233 {
3234  return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A,
3235  -(__v16sf) __B,
3236  -(__v16sf) __C,
3237  (__mmask16) __U,
3239 }
3240 
3241 static __inline__ __m512 __DEFAULT_FN_ATTRS512
3242 _mm512_mask3_fnmsub_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U)
3243 {
3244  return (__m512) __builtin_ia32_vfmsubps512_mask3 (-(__v16sf) __A,
3245  (__v16sf) __B,
3246  (__v16sf) __C,
3247  (__mmask16) __U,
3249 }
3250 
3251 
3252 
3253 /* Vector permutations */
3254 
3255 static __inline __m512i __DEFAULT_FN_ATTRS512
3256 _mm512_permutex2var_epi32(__m512i __A, __m512i __I, __m512i __B)
3257 {
3258  return (__m512i)__builtin_ia32_vpermi2vard512((__v16si)__A, (__v16si) __I,
3259  (__v16si) __B);
3260 }
3261 
3262 static __inline__ __m512i __DEFAULT_FN_ATTRS512
3263 _mm512_mask_permutex2var_epi32(__m512i __A, __mmask16 __U, __m512i __I,
3264  __m512i __B)
3265 {
3266  return (__m512i)__builtin_ia32_selectd_512(__U,
3267  (__v16si)_mm512_permutex2var_epi32(__A, __I, __B),
3268  (__v16si)__A);
3269 }
3270 
3271 static __inline__ __m512i __DEFAULT_FN_ATTRS512
3272 _mm512_mask2_permutex2var_epi32(__m512i __A, __m512i __I, __mmask16 __U,
3273  __m512i __B)
3274 {
3275  return (__m512i)__builtin_ia32_selectd_512(__U,
3276  (__v16si)_mm512_permutex2var_epi32(__A, __I, __B),
3277  (__v16si)__I);
3278 }
3279 
3280 static __inline__ __m512i __DEFAULT_FN_ATTRS512
3281 _mm512_maskz_permutex2var_epi32(__mmask16 __U, __m512i __A, __m512i __I,
3282  __m512i __B)
3283 {
3284  return (__m512i)__builtin_ia32_selectd_512(__U,
3285  (__v16si)_mm512_permutex2var_epi32(__A, __I, __B),
3286  (__v16si)_mm512_setzero_si512());
3287 }
3288 
3289 static __inline __m512i __DEFAULT_FN_ATTRS512
3290 _mm512_permutex2var_epi64(__m512i __A, __m512i __I, __m512i __B)
3291 {
3292  return (__m512i)__builtin_ia32_vpermi2varq512((__v8di)__A, (__v8di) __I,
3293  (__v8di) __B);
3294 }
3295 
3296 static __inline__ __m512i __DEFAULT_FN_ATTRS512
3297 _mm512_mask_permutex2var_epi64(__m512i __A, __mmask8 __U, __m512i __I,
3298  __m512i __B)
3299 {
3300  return (__m512i)__builtin_ia32_selectq_512(__U,
3301  (__v8di)_mm512_permutex2var_epi64(__A, __I, __B),
3302  (__v8di)__A);
3303 }
3304 
3305 static __inline__ __m512i __DEFAULT_FN_ATTRS512
3306 _mm512_mask2_permutex2var_epi64(__m512i __A, __m512i __I, __mmask8 __U,
3307  __m512i __B)
3308 {
3309  return (__m512i)__builtin_ia32_selectq_512(__U,
3310  (__v8di)_mm512_permutex2var_epi64(__A, __I, __B),
3311  (__v8di)__I);
3312 }
3313 
3314 static __inline__ __m512i __DEFAULT_FN_ATTRS512
3315 _mm512_maskz_permutex2var_epi64(__mmask8 __U, __m512i __A, __m512i __I,
3316  __m512i __B)
3317 {
3318  return (__m512i)__builtin_ia32_selectq_512(__U,
3319  (__v8di)_mm512_permutex2var_epi64(__A, __I, __B),
3320  (__v8di)_mm512_setzero_si512());
3321 }
3322 
3323 #define _mm512_alignr_epi64(A, B, I) \
3324  (__m512i)__builtin_ia32_alignq512((__v8di)(__m512i)(A), \
3325  (__v8di)(__m512i)(B), (int)(I))
3326 
3327 #define _mm512_mask_alignr_epi64(W, U, A, B, imm) \
3328  (__m512i)__builtin_ia32_selectq_512((__mmask8)(U), \
3329  (__v8di)_mm512_alignr_epi64((A), (B), (imm)), \
3330  (__v8di)(__m512i)(W))
3331 
3332 #define _mm512_maskz_alignr_epi64(U, A, B, imm) \
3333  (__m512i)__builtin_ia32_selectq_512((__mmask8)(U), \
3334  (__v8di)_mm512_alignr_epi64((A), (B), (imm)), \
3335  (__v8di)_mm512_setzero_si512())
3336 
3337 #define _mm512_alignr_epi32(A, B, I) \
3338  (__m512i)__builtin_ia32_alignd512((__v16si)(__m512i)(A), \
3339  (__v16si)(__m512i)(B), (int)(I))
3340 
3341 #define _mm512_mask_alignr_epi32(W, U, A, B, imm) \
3342  (__m512i)__builtin_ia32_selectd_512((__mmask16)(U), \
3343  (__v16si)_mm512_alignr_epi32((A), (B), (imm)), \
3344  (__v16si)(__m512i)(W))
3345 
3346 #define _mm512_maskz_alignr_epi32(U, A, B, imm) \
3347  (__m512i)__builtin_ia32_selectd_512((__mmask16)(U), \
3348  (__v16si)_mm512_alignr_epi32((A), (B), (imm)), \
3349  (__v16si)_mm512_setzero_si512())
3350 /* Vector Extract */
3351 
3352 #define _mm512_extractf64x4_pd(A, I) \
3353  (__m256d)__builtin_ia32_extractf64x4_mask((__v8df)(__m512d)(A), (int)(I), \
3354  (__v4df)_mm256_undefined_pd(), \
3355  (__mmask8)-1)
3356 
3357 #define _mm512_mask_extractf64x4_pd(W, U, A, imm) \
3358  (__m256d)__builtin_ia32_extractf64x4_mask((__v8df)(__m512d)(A), (int)(imm), \
3359  (__v4df)(__m256d)(W), \
3360  (__mmask8)(U))
3361 
3362 #define _mm512_maskz_extractf64x4_pd(U, A, imm) \
3363  (__m256d)__builtin_ia32_extractf64x4_mask((__v8df)(__m512d)(A), (int)(imm), \
3364  (__v4df)_mm256_setzero_pd(), \
3365  (__mmask8)(U))
3366 
3367 #define _mm512_extractf32x4_ps(A, I) \
3368  (__m128)__builtin_ia32_extractf32x4_mask((__v16sf)(__m512)(A), (int)(I), \
3369  (__v4sf)_mm_undefined_ps(), \
3370  (__mmask8)-1)
3371 
3372 #define _mm512_mask_extractf32x4_ps(W, U, A, imm) \
3373  (__m128)__builtin_ia32_extractf32x4_mask((__v16sf)(__m512)(A), (int)(imm), \
3374  (__v4sf)(__m128)(W), \
3375  (__mmask8)(U))
3376 
3377 #define _mm512_maskz_extractf32x4_ps(U, A, imm) \
3378  (__m128)__builtin_ia32_extractf32x4_mask((__v16sf)(__m512)(A), (int)(imm), \
3379  (__v4sf)_mm_setzero_ps(), \
3380  (__mmask8)(U))
3381 
3382 /* Vector Blend */
3383 
3384 static __inline __m512d __DEFAULT_FN_ATTRS512
3385 _mm512_mask_blend_pd(__mmask8 __U, __m512d __A, __m512d __W)
3386 {
3387  return (__m512d) __builtin_ia32_selectpd_512 ((__mmask8) __U,
3388  (__v8df) __W,
3389  (__v8df) __A);
3390 }
3391 
3392 static __inline __m512 __DEFAULT_FN_ATTRS512
3393 _mm512_mask_blend_ps(__mmask16 __U, __m512 __A, __m512 __W)
3394 {
3395  return (__m512) __builtin_ia32_selectps_512 ((__mmask16) __U,
3396  (__v16sf) __W,
3397  (__v16sf) __A);
3398 }
3399 
3400 static __inline __m512i __DEFAULT_FN_ATTRS512
3401 _mm512_mask_blend_epi64(__mmask8 __U, __m512i __A, __m512i __W)
3402 {
3403  return (__m512i) __builtin_ia32_selectq_512 ((__mmask8) __U,
3404  (__v8di) __W,
3405  (__v8di) __A);
3406 }
3407 
3408 static __inline __m512i __DEFAULT_FN_ATTRS512
3409 _mm512_mask_blend_epi32(__mmask16 __U, __m512i __A, __m512i __W)
3410 {
3411  return (__m512i) __builtin_ia32_selectd_512 ((__mmask16) __U,
3412  (__v16si) __W,
3413  (__v16si) __A);
3414 }
3415 
3416 /* Compare */
3417 
3418 #define _mm512_cmp_round_ps_mask(A, B, P, R) \
3419  (__mmask16)__builtin_ia32_cmpps512_mask((__v16sf)(__m512)(A), \
3420  (__v16sf)(__m512)(B), (int)(P), \
3421  (__mmask16)-1, (int)(R))
3422 
3423 #define _mm512_mask_cmp_round_ps_mask(U, A, B, P, R) \
3424  (__mmask16)__builtin_ia32_cmpps512_mask((__v16sf)(__m512)(A), \
3425  (__v16sf)(__m512)(B), (int)(P), \
3426  (__mmask16)(U), (int)(R))
3427 
3428 #define _mm512_cmp_ps_mask(A, B, P) \
3429  _mm512_cmp_round_ps_mask((A), (B), (P), _MM_FROUND_CUR_DIRECTION)
3430 #define _mm512_mask_cmp_ps_mask(U, A, B, P) \
3431  _mm512_mask_cmp_round_ps_mask((U), (A), (B), (P), _MM_FROUND_CUR_DIRECTION)
3432 
3433 #define _mm512_cmpeq_ps_mask(A, B) \
3434  _mm512_cmp_ps_mask((A), (B), _CMP_EQ_OQ)
3435 #define _mm512_mask_cmpeq_ps_mask(k, A, B) \
3436  _mm512_mask_cmp_ps_mask((k), (A), (B), _CMP_EQ_OQ)
3437 
3438 #define _mm512_cmplt_ps_mask(A, B) \
3439  _mm512_cmp_ps_mask((A), (B), _CMP_LT_OS)
3440 #define _mm512_mask_cmplt_ps_mask(k, A, B) \
3441  _mm512_mask_cmp_ps_mask((k), (A), (B), _CMP_LT_OS)
3442 
3443 #define _mm512_cmple_ps_mask(A, B) \
3444  _mm512_cmp_ps_mask((A), (B), _CMP_LE_OS)
3445 #define _mm512_mask_cmple_ps_mask(k, A, B) \
3446  _mm512_mask_cmp_ps_mask((k), (A), (B), _CMP_LE_OS)
3447 
3448 #define _mm512_cmpunord_ps_mask(A, B) \
3449  _mm512_cmp_ps_mask((A), (B), _CMP_UNORD_Q)
3450 #define _mm512_mask_cmpunord_ps_mask(k, A, B) \
3451  _mm512_mask_cmp_ps_mask((k), (A), (B), _CMP_UNORD_Q)
3452 
3453 #define _mm512_cmpneq_ps_mask(A, B) \
3454  _mm512_cmp_ps_mask((A), (B), _CMP_NEQ_UQ)
3455 #define _mm512_mask_cmpneq_ps_mask(k, A, B) \
3456  _mm512_mask_cmp_ps_mask((k), (A), (B), _CMP_NEQ_UQ)
3457 
3458 #define _mm512_cmpnlt_ps_mask(A, B) \
3459  _mm512_cmp_ps_mask((A), (B), _CMP_NLT_US)
3460 #define _mm512_mask_cmpnlt_ps_mask(k, A, B) \
3461  _mm512_mask_cmp_ps_mask((k), (A), (B), _CMP_NLT_US)
3462 
3463 #define _mm512_cmpnle_ps_mask(A, B) \
3464  _mm512_cmp_ps_mask((A), (B), _CMP_NLE_US)
3465 #define _mm512_mask_cmpnle_ps_mask(k, A, B) \
3466  _mm512_mask_cmp_ps_mask((k), (A), (B), _CMP_NLE_US)
3467 
3468 #define _mm512_cmpord_ps_mask(A, B) \
3469  _mm512_cmp_ps_mask((A), (B), _CMP_ORD_Q)
3470 #define _mm512_mask_cmpord_ps_mask(k, A, B) \
3471  _mm512_mask_cmp_ps_mask((k), (A), (B), _CMP_ORD_Q)
3472 
3473 #define _mm512_cmp_round_pd_mask(A, B, P, R) \
3474  (__mmask8)__builtin_ia32_cmppd512_mask((__v8df)(__m512d)(A), \
3475  (__v8df)(__m512d)(B), (int)(P), \
3476  (__mmask8)-1, (int)(R))
3477 
3478 #define _mm512_mask_cmp_round_pd_mask(U, A, B, P, R) \
3479  (__mmask8)__builtin_ia32_cmppd512_mask((__v8df)(__m512d)(A), \
3480  (__v8df)(__m512d)(B), (int)(P), \
3481  (__mmask8)(U), (int)(R))
3482 
3483 #define _mm512_cmp_pd_mask(A, B, P) \
3484  _mm512_cmp_round_pd_mask((A), (B), (P), _MM_FROUND_CUR_DIRECTION)
3485 #define _mm512_mask_cmp_pd_mask(U, A, B, P) \
3486  _mm512_mask_cmp_round_pd_mask((U), (A), (B), (P), _MM_FROUND_CUR_DIRECTION)
3487 
3488 #define _mm512_cmpeq_pd_mask(A, B) \
3489  _mm512_cmp_pd_mask((A), (B), _CMP_EQ_OQ)
3490 #define _mm512_mask_cmpeq_pd_mask(k, A, B) \
3491  _mm512_mask_cmp_pd_mask((k), (A), (B), _CMP_EQ_OQ)
3492 
3493 #define _mm512_cmplt_pd_mask(A, B) \
3494  _mm512_cmp_pd_mask((A), (B), _CMP_LT_OS)
3495 #define _mm512_mask_cmplt_pd_mask(k, A, B) \
3496  _mm512_mask_cmp_pd_mask((k), (A), (B), _CMP_LT_OS)
3497 
3498 #define _mm512_cmple_pd_mask(A, B) \
3499  _mm512_cmp_pd_mask((A), (B), _CMP_LE_OS)
3500 #define _mm512_mask_cmple_pd_mask(k, A, B) \
3501  _mm512_mask_cmp_pd_mask((k), (A), (B), _CMP_LE_OS)
3502 
3503 #define _mm512_cmpunord_pd_mask(A, B) \
3504  _mm512_cmp_pd_mask((A), (B), _CMP_UNORD_Q)
3505 #define _mm512_mask_cmpunord_pd_mask(k, A, B) \
3506  _mm512_mask_cmp_pd_mask((k), (A), (B), _CMP_UNORD_Q)
3507 
3508 #define _mm512_cmpneq_pd_mask(A, B) \
3509  _mm512_cmp_pd_mask((A), (B), _CMP_NEQ_UQ)
3510 #define _mm512_mask_cmpneq_pd_mask(k, A, B) \
3511  _mm512_mask_cmp_pd_mask((k), (A), (B), _CMP_NEQ_UQ)
3512 
3513 #define _mm512_cmpnlt_pd_mask(A, B) \
3514  _mm512_cmp_pd_mask((A), (B), _CMP_NLT_US)
3515 #define _mm512_mask_cmpnlt_pd_mask(k, A, B) \
3516  _mm512_mask_cmp_pd_mask((k), (A), (B), _CMP_NLT_US)
3517 
3518 #define _mm512_cmpnle_pd_mask(A, B) \
3519  _mm512_cmp_pd_mask((A), (B), _CMP_NLE_US)
3520 #define _mm512_mask_cmpnle_pd_mask(k, A, B) \
3521  _mm512_mask_cmp_pd_mask((k), (A), (B), _CMP_NLE_US)
3522 
3523 #define _mm512_cmpord_pd_mask(A, B) \
3524  _mm512_cmp_pd_mask((A), (B), _CMP_ORD_Q)
3525 #define _mm512_mask_cmpord_pd_mask(k, A, B) \
3526  _mm512_mask_cmp_pd_mask((k), (A), (B), _CMP_ORD_Q)
3527 
3528 /* Conversion */
3529 
3530 #define _mm512_cvtt_roundps_epu32(A, R) \
3531  (__m512i)__builtin_ia32_cvttps2udq512_mask((__v16sf)(__m512)(A), \
3532  (__v16si)_mm512_undefined_epi32(), \
3533  (__mmask16)-1, (int)(R))
3534 
3535 #define _mm512_mask_cvtt_roundps_epu32(W, U, A, R) \
3536  (__m512i)__builtin_ia32_cvttps2udq512_mask((__v16sf)(__m512)(A), \
3537  (__v16si)(__m512i)(W), \
3538  (__mmask16)(U), (int)(R))
3539 
3540 #define _mm512_maskz_cvtt_roundps_epu32(U, A, R) \
3541  (__m512i)__builtin_ia32_cvttps2udq512_mask((__v16sf)(__m512)(A), \
3542  (__v16si)_mm512_setzero_si512(), \
3543  (__mmask16)(U), (int)(R))
3544 
3545 
3546 static __inline __m512i __DEFAULT_FN_ATTRS512
3548 {
3549  return (__m512i) __builtin_ia32_cvttps2udq512_mask ((__v16sf) __A,
3550  (__v16si)
3552  (__mmask16) -1,
3554 }
3555 
3556 static __inline__ __m512i __DEFAULT_FN_ATTRS512
3557 _mm512_mask_cvttps_epu32 (__m512i __W, __mmask16 __U, __m512 __A)
3558 {
3559  return (__m512i) __builtin_ia32_cvttps2udq512_mask ((__v16sf) __A,
3560  (__v16si) __W,
3561  (__mmask16) __U,
3563 }
3564 
3565 static __inline__ __m512i __DEFAULT_FN_ATTRS512
3566 _mm512_maskz_cvttps_epu32 (__mmask16 __U, __m512 __A)
3567 {
3568  return (__m512i) __builtin_ia32_cvttps2udq512_mask ((__v16sf) __A,
3569  (__v16si) _mm512_setzero_si512 (),
3570  (__mmask16) __U,
3572 }
3573 
3574 #define _mm512_cvt_roundepi32_ps(A, R) \
3575  (__m512)__builtin_ia32_cvtdq2ps512_mask((__v16si)(__m512i)(A), \
3576  (__v16sf)_mm512_setzero_ps(), \
3577  (__mmask16)-1, (int)(R))
3578 
3579 #define _mm512_mask_cvt_roundepi32_ps(W, U, A, R) \
3580  (__m512)__builtin_ia32_cvtdq2ps512_mask((__v16si)(__m512i)(A), \
3581  (__v16sf)(__m512)(W), \
3582  (__mmask16)(U), (int)(R))
3583 
3584 #define _mm512_maskz_cvt_roundepi32_ps(U, A, R) \
3585  (__m512)__builtin_ia32_cvtdq2ps512_mask((__v16si)(__m512i)(A), \
3586  (__v16sf)_mm512_setzero_ps(), \
3587  (__mmask16)(U), (int)(R))
3588 
3589 #define _mm512_cvt_roundepu32_ps(A, R) \
3590  (__m512)__builtin_ia32_cvtudq2ps512_mask((__v16si)(__m512i)(A), \
3591  (__v16sf)_mm512_setzero_ps(), \
3592  (__mmask16)-1, (int)(R))
3593 
3594 #define _mm512_mask_cvt_roundepu32_ps(W, U, A, R) \
3595  (__m512)__builtin_ia32_cvtudq2ps512_mask((__v16si)(__m512i)(A), \
3596  (__v16sf)(__m512)(W), \
3597  (__mmask16)(U), (int)(R))
3598 
3599 #define _mm512_maskz_cvt_roundepu32_ps(U, A, R) \
3600  (__m512)__builtin_ia32_cvtudq2ps512_mask((__v16si)(__m512i)(A), \
3601  (__v16sf)_mm512_setzero_ps(), \
3602  (__mmask16)(U), (int)(R))
3603 
3604 static __inline__ __m512 __DEFAULT_FN_ATTRS512
3605 _mm512_cvtepu32_ps (__m512i __A)
3606 {
3607  return (__m512)__builtin_convertvector((__v16su)__A, __v16sf);
3608 }
3609 
3610 static __inline__ __m512 __DEFAULT_FN_ATTRS512
3611 _mm512_mask_cvtepu32_ps (__m512 __W, __mmask16 __U, __m512i __A)
3612 {
3613  return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
3614  (__v16sf)_mm512_cvtepu32_ps(__A),
3615  (__v16sf)__W);
3616 }
3617 
3618 static __inline__ __m512 __DEFAULT_FN_ATTRS512
3619 _mm512_maskz_cvtepu32_ps (__mmask16 __U, __m512i __A)
3620 {
3621  return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
3622  (__v16sf)_mm512_cvtepu32_ps(__A),
3623  (__v16sf)_mm512_setzero_ps());
3624 }
3625 
3626 static __inline __m512d __DEFAULT_FN_ATTRS512
3628 {
3629  return (__m512d)__builtin_convertvector((__v8si)__A, __v8df);
3630 }
3631 
3632 static __inline__ __m512d __DEFAULT_FN_ATTRS512
3633 _mm512_mask_cvtepi32_pd (__m512d __W, __mmask8 __U, __m256i __A)
3634 {
3635  return (__m512d)__builtin_ia32_selectpd_512((__mmask8) __U,
3636  (__v8df)_mm512_cvtepi32_pd(__A),
3637  (__v8df)__W);
3638 }
3639 
3640 static __inline__ __m512d __DEFAULT_FN_ATTRS512
3641 _mm512_maskz_cvtepi32_pd (__mmask8 __U, __m256i __A)
3642 {
3643  return (__m512d)__builtin_ia32_selectpd_512((__mmask8) __U,
3644  (__v8df)_mm512_cvtepi32_pd(__A),
3645  (__v8df)_mm512_setzero_pd());
3646 }
3647 
3648 static __inline__ __m512d __DEFAULT_FN_ATTRS512
3650 {
3651  return (__m512d) _mm512_cvtepi32_pd(_mm512_castsi512_si256(__A));
3652 }
3653 
3654 static __inline__ __m512d __DEFAULT_FN_ATTRS512
3655 _mm512_mask_cvtepi32lo_pd(__m512d __W, __mmask8 __U,__m512i __A)
3656 {
3657  return (__m512d) _mm512_mask_cvtepi32_pd(__W, __U, _mm512_castsi512_si256(__A));
3658 }
3659 
3660 static __inline__ __m512 __DEFAULT_FN_ATTRS512
3661 _mm512_cvtepi32_ps (__m512i __A)
3662 {
3663  return (__m512)__builtin_convertvector((__v16si)__A, __v16sf);
3664 }
3665 
3666 static __inline__ __m512 __DEFAULT_FN_ATTRS512
3667 _mm512_mask_cvtepi32_ps (__m512 __W, __mmask16 __U, __m512i __A)
3668 {
3669  return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
3670  (__v16sf)_mm512_cvtepi32_ps(__A),
3671  (__v16sf)__W);
3672 }
3673 
3674 static __inline__ __m512 __DEFAULT_FN_ATTRS512
3675 _mm512_maskz_cvtepi32_ps (__mmask16 __U, __m512i __A)
3676 {
3677  return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
3678  (__v16sf)_mm512_cvtepi32_ps(__A),
3679  (__v16sf)_mm512_setzero_ps());
3680 }
3681 
3682 static __inline __m512d __DEFAULT_FN_ATTRS512
3684 {
3685  return (__m512d)__builtin_convertvector((__v8su)__A, __v8df);
3686 }
3687 
3688 static __inline__ __m512d __DEFAULT_FN_ATTRS512
3689 _mm512_mask_cvtepu32_pd (__m512d __W, __mmask8 __U, __m256i __A)
3690 {
3691  return (__m512d)__builtin_ia32_selectpd_512((__mmask8) __U,
3692  (__v8df)_mm512_cvtepu32_pd(__A),
3693  (__v8df)__W);
3694 }
3695 
3696 static __inline__ __m512d __DEFAULT_FN_ATTRS512
3697 _mm512_maskz_cvtepu32_pd (__mmask8 __U, __m256i __A)
3698 {
3699  return (__m512d)__builtin_ia32_selectpd_512((__mmask8) __U,
3700  (__v8df)_mm512_cvtepu32_pd(__A),
3701  (__v8df)_mm512_setzero_pd());
3702 }
3703 
3704 static __inline__ __m512d __DEFAULT_FN_ATTRS512
3706 {
3707  return (__m512d) _mm512_cvtepu32_pd(_mm512_castsi512_si256(__A));
3708 }
3709 
3710 static __inline__ __m512d __DEFAULT_FN_ATTRS512
3711 _mm512_mask_cvtepu32lo_pd(__m512d __W, __mmask8 __U,__m512i __A)
3712 {
3713  return (__m512d) _mm512_mask_cvtepu32_pd(__W, __U, _mm512_castsi512_si256(__A));
3714 }
3715 
3716 #define _mm512_cvt_roundpd_ps(A, R) \
3717  (__m256)__builtin_ia32_cvtpd2ps512_mask((__v8df)(__m512d)(A), \
3718  (__v8sf)_mm256_setzero_ps(), \
3719  (__mmask8)-1, (int)(R))
3720 
3721 #define _mm512_mask_cvt_roundpd_ps(W, U, A, R) \
3722  (__m256)__builtin_ia32_cvtpd2ps512_mask((__v8df)(__m512d)(A), \
3723  (__v8sf)(__m256)(W), (__mmask8)(U), \
3724  (int)(R))
3725 
3726 #define _mm512_maskz_cvt_roundpd_ps(U, A, R) \
3727  (__m256)__builtin_ia32_cvtpd2ps512_mask((__v8df)(__m512d)(A), \
3728  (__v8sf)_mm256_setzero_ps(), \
3729  (__mmask8)(U), (int)(R))
3730 
3731 static __inline__ __m256 __DEFAULT_FN_ATTRS512
3732 _mm512_cvtpd_ps (__m512d __A)
3733 {
3734  return (__m256) __builtin_ia32_cvtpd2ps512_mask ((__v8df) __A,
3735  (__v8sf) _mm256_undefined_ps (),
3736  (__mmask8) -1,
3738 }
3739 
3740 static __inline__ __m256 __DEFAULT_FN_ATTRS512
3741 _mm512_mask_cvtpd_ps (__m256 __W, __mmask8 __U, __m512d __A)
3742 {
3743  return (__m256) __builtin_ia32_cvtpd2ps512_mask ((__v8df) __A,
3744  (__v8sf) __W,
3745  (__mmask8) __U,
3747 }
3748 
3749 static __inline__ __m256 __DEFAULT_FN_ATTRS512
3750 _mm512_maskz_cvtpd_ps (__mmask8 __U, __m512d __A)
3751 {
3752  return (__m256) __builtin_ia32_cvtpd2ps512_mask ((__v8df) __A,
3753  (__v8sf) _mm256_setzero_ps (),
3754  (__mmask8) __U,
3756 }
3757 
3758 static __inline__ __m512 __DEFAULT_FN_ATTRS512
3759 _mm512_cvtpd_pslo (__m512d __A)
3760 {
3761  return (__m512) __builtin_shufflevector((__v8sf) _mm512_cvtpd_ps(__A),
3762  (__v8sf) _mm256_setzero_ps (),
3763  0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
3764 }
3765 
3766 static __inline__ __m512 __DEFAULT_FN_ATTRS512
3767 _mm512_mask_cvtpd_pslo (__m512 __W, __mmask8 __U,__m512d __A)
3768 {
3769  return (__m512) __builtin_shufflevector (
3771  __U, __A),
3772  (__v8sf) _mm256_setzero_ps (),
3773  0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
3774 }
3775 
3776 #define _mm512_cvt_roundps_ph(A, I) \
3777  (__m256i)__builtin_ia32_vcvtps2ph512_mask((__v16sf)(__m512)(A), (int)(I), \
3778  (__v16hi)_mm256_undefined_si256(), \
3779  (__mmask16)-1)
3780 
3781 #define _mm512_mask_cvt_roundps_ph(U, W, A, I) \
3782  (__m256i)__builtin_ia32_vcvtps2ph512_mask((__v16sf)(__m512)(A), (int)(I), \
3783  (__v16hi)(__m256i)(U), \
3784  (__mmask16)(W))
3785 
3786 #define _mm512_maskz_cvt_roundps_ph(W, A, I) \
3787  (__m256i)__builtin_ia32_vcvtps2ph512_mask((__v16sf)(__m512)(A), (int)(I), \
3788  (__v16hi)_mm256_setzero_si256(), \
3789  (__mmask16)(W))
3790 
3791 #define _mm512_cvtps_ph(A, I) \
3792  (__m256i)__builtin_ia32_vcvtps2ph512_mask((__v16sf)(__m512)(A), (int)(I), \
3793  (__v16hi)_mm256_setzero_si256(), \
3794  (__mmask16)-1)
3795 
3796 #define _mm512_mask_cvtps_ph(U, W, A, I) \
3797  (__m256i)__builtin_ia32_vcvtps2ph512_mask((__v16sf)(__m512)(A), (int)(I), \
3798  (__v16hi)(__m256i)(U), \
3799  (__mmask16)(W))
3800 
3801 #define _mm512_maskz_cvtps_ph(W, A, I) \
3802  (__m256i)__builtin_ia32_vcvtps2ph512_mask((__v16sf)(__m512)(A), (int)(I), \
3803  (__v16hi)_mm256_setzero_si256(), \
3804  (__mmask16)(W))
3805 
3806 #define _mm512_cvt_roundph_ps(A, R) \
3807  (__m512)__builtin_ia32_vcvtph2ps512_mask((__v16hi)(__m256i)(A), \
3808  (__v16sf)_mm512_undefined_ps(), \
3809  (__mmask16)-1, (int)(R))
3810 
3811 #define _mm512_mask_cvt_roundph_ps(W, U, A, R) \
3812  (__m512)__builtin_ia32_vcvtph2ps512_mask((__v16hi)(__m256i)(A), \
3813  (__v16sf)(__m512)(W), \
3814  (__mmask16)(U), (int)(R))
3815 
3816 #define _mm512_maskz_cvt_roundph_ps(U, A, R) \
3817  (__m512)__builtin_ia32_vcvtph2ps512_mask((__v16hi)(__m256i)(A), \
3818  (__v16sf)_mm512_setzero_ps(), \
3819  (__mmask16)(U), (int)(R))
3820 
3821 
3822 static __inline __m512 __DEFAULT_FN_ATTRS512
3823 _mm512_cvtph_ps(__m256i __A)
3824 {
3825  return (__m512) __builtin_ia32_vcvtph2ps512_mask ((__v16hi) __A,
3826  (__v16sf)
3827  _mm512_setzero_ps (),
3828  (__mmask16) -1,
3830 }
3831 
3832 static __inline__ __m512 __DEFAULT_FN_ATTRS512
3833 _mm512_mask_cvtph_ps (__m512 __W, __mmask16 __U, __m256i __A)
3834 {
3835  return (__m512) __builtin_ia32_vcvtph2ps512_mask ((__v16hi) __A,
3836  (__v16sf) __W,
3837  (__mmask16) __U,
3839 }
3840 
3841 static __inline__ __m512 __DEFAULT_FN_ATTRS512
3842 _mm512_maskz_cvtph_ps (__mmask16 __U, __m256i __A)
3843 {
3844  return (__m512) __builtin_ia32_vcvtph2ps512_mask ((__v16hi) __A,
3845  (__v16sf) _mm512_setzero_ps (),
3846  (__mmask16) __U,
3848 }
3849 
3850 #define _mm512_cvtt_roundpd_epi32(A, R) \
3851  (__m256i)__builtin_ia32_cvttpd2dq512_mask((__v8df)(__m512d)(A), \
3852  (__v8si)_mm256_setzero_si256(), \
3853  (__mmask8)-1, (int)(R))
3854 
3855 #define _mm512_mask_cvtt_roundpd_epi32(W, U, A, R) \
3856  (__m256i)__builtin_ia32_cvttpd2dq512_mask((__v8df)(__m512d)(A), \
3857  (__v8si)(__m256i)(W), \
3858  (__mmask8)(U), (int)(R))
3859 
3860 #define _mm512_maskz_cvtt_roundpd_epi32(U, A, R) \
3861  (__m256i)__builtin_ia32_cvttpd2dq512_mask((__v8df)(__m512d)(A), \
3862  (__v8si)_mm256_setzero_si256(), \
3863  (__mmask8)(U), (int)(R))
3864 
3865 static __inline __m256i __DEFAULT_FN_ATTRS512
3867 {
3868  return (__m256i)__builtin_ia32_cvttpd2dq512_mask((__v8df) __a,
3869  (__v8si)_mm256_setzero_si256(),
3870  (__mmask8) -1,
3872 }
3873 
3874 static __inline__ __m256i __DEFAULT_FN_ATTRS512
3875 _mm512_mask_cvttpd_epi32 (__m256i __W, __mmask8 __U, __m512d __A)
3876 {
3877  return (__m256i) __builtin_ia32_cvttpd2dq512_mask ((__v8df) __A,
3878  (__v8si) __W,
3879  (__mmask8) __U,
3881 }
3882 
3883 static __inline__ __m256i __DEFAULT_FN_ATTRS512
3884 _mm512_maskz_cvttpd_epi32 (__mmask8 __U, __m512d __A)
3885 {
3886  return (__m256i) __builtin_ia32_cvttpd2dq512_mask ((__v8df) __A,
3887  (__v8si) _mm256_setzero_si256 (),
3888  (__mmask8) __U,
3890 }
3891 
3892 #define _mm512_cvtt_roundps_epi32(A, R) \
3893  (__m512i)__builtin_ia32_cvttps2dq512_mask((__v16sf)(__m512)(A), \
3894  (__v16si)_mm512_setzero_si512(), \
3895  (__mmask16)-1, (int)(R))
3896 
3897 #define _mm512_mask_cvtt_roundps_epi32(W, U, A, R) \
3898  (__m512i)__builtin_ia32_cvttps2dq512_mask((__v16sf)(__m512)(A), \
3899  (__v16si)(__m512i)(W), \
3900  (__mmask16)(U), (int)(R))
3901 
3902 #define _mm512_maskz_cvtt_roundps_epi32(U, A, R) \
3903  (__m512i)__builtin_ia32_cvttps2dq512_mask((__v16sf)(__m512)(A), \
3904  (__v16si)_mm512_setzero_si512(), \
3905  (__mmask16)(U), (int)(R))
3906 
3907 static __inline __m512i __DEFAULT_FN_ATTRS512
3909 {
3910  return (__m512i)
3911  __builtin_ia32_cvttps2dq512_mask((__v16sf) __a,
3912  (__v16si) _mm512_setzero_si512 (),
3913  (__mmask16) -1, _MM_FROUND_CUR_DIRECTION);
3914 }
3915 
3916 static __inline__ __m512i __DEFAULT_FN_ATTRS512
3917 _mm512_mask_cvttps_epi32 (__m512i __W, __mmask16 __U, __m512 __A)
3918 {
3919  return (__m512i) __builtin_ia32_cvttps2dq512_mask ((__v16sf) __A,
3920  (__v16si) __W,
3921  (__mmask16) __U,
3923 }
3924 
3925 static __inline__ __m512i __DEFAULT_FN_ATTRS512
3926 _mm512_maskz_cvttps_epi32 (__mmask16 __U, __m512 __A)
3927 {
3928  return (__m512i) __builtin_ia32_cvttps2dq512_mask ((__v16sf) __A,
3929  (__v16si) _mm512_setzero_si512 (),
3930  (__mmask16) __U,
3932 }
3933 
3934 #define _mm512_cvt_roundps_epi32(A, R) \
3935  (__m512i)__builtin_ia32_cvtps2dq512_mask((__v16sf)(__m512)(A), \
3936  (__v16si)_mm512_setzero_si512(), \
3937  (__mmask16)-1, (int)(R))
3938 
3939 #define _mm512_mask_cvt_roundps_epi32(W, U, A, R) \
3940  (__m512i)__builtin_ia32_cvtps2dq512_mask((__v16sf)(__m512)(A), \
3941  (__v16si)(__m512i)(W), \
3942  (__mmask16)(U), (int)(R))
3943 
3944 #define _mm512_maskz_cvt_roundps_epi32(U, A, R) \
3945  (__m512i)__builtin_ia32_cvtps2dq512_mask((__v16sf)(__m512)(A), \
3946  (__v16si)_mm512_setzero_si512(), \
3947  (__mmask16)(U), (int)(R))
3948 
3949 static __inline__ __m512i __DEFAULT_FN_ATTRS512
3951 {
3952  return (__m512i) __builtin_ia32_cvtps2dq512_mask ((__v16sf) __A,
3953  (__v16si) _mm512_undefined_epi32 (),
3954  (__mmask16) -1,
3956 }
3957 
3958 static __inline__ __m512i __DEFAULT_FN_ATTRS512
3959 _mm512_mask_cvtps_epi32 (__m512i __W, __mmask16 __U, __m512 __A)
3960 {
3961  return (__m512i) __builtin_ia32_cvtps2dq512_mask ((__v16sf) __A,
3962  (__v16si) __W,
3963  (__mmask16) __U,
3965 }
3966 
3967 static __inline__ __m512i __DEFAULT_FN_ATTRS512
3968 _mm512_maskz_cvtps_epi32 (__mmask16 __U, __m512 __A)
3969 {
3970  return (__m512i) __builtin_ia32_cvtps2dq512_mask ((__v16sf) __A,
3971  (__v16si)
3973  (__mmask16) __U,
3975 }
3976 
3977 #define _mm512_cvt_roundpd_epi32(A, R) \
3978  (__m256i)__builtin_ia32_cvtpd2dq512_mask((__v8df)(__m512d)(A), \
3979  (__v8si)_mm256_setzero_si256(), \
3980  (__mmask8)-1, (int)(R))
3981 
3982 #define _mm512_mask_cvt_roundpd_epi32(W, U, A, R) \
3983  (__m256i)__builtin_ia32_cvtpd2dq512_mask((__v8df)(__m512d)(A), \
3984  (__v8si)(__m256i)(W), \
3985  (__mmask8)(U), (int)(R))
3986 
3987 #define _mm512_maskz_cvt_roundpd_epi32(U, A, R) \
3988  (__m256i)__builtin_ia32_cvtpd2dq512_mask((__v8df)(__m512d)(A), \
3989  (__v8si)_mm256_setzero_si256(), \
3990  (__mmask8)(U), (int)(R))
3991 
3992 static __inline__ __m256i __DEFAULT_FN_ATTRS512
3993 _mm512_cvtpd_epi32 (__m512d __A)
3994 {
3995  return (__m256i) __builtin_ia32_cvtpd2dq512_mask ((__v8df) __A,
3996  (__v8si)
3998  (__mmask8) -1,
4000 }
4001 
4002 static __inline__ __m256i __DEFAULT_FN_ATTRS512
4003 _mm512_mask_cvtpd_epi32 (__m256i __W, __mmask8 __U, __m512d __A)
4004 {
4005  return (__m256i) __builtin_ia32_cvtpd2dq512_mask ((__v8df) __A,
4006  (__v8si) __W,
4007  (__mmask8) __U,
4009 }
4010 
4011 static __inline__ __m256i __DEFAULT_FN_ATTRS512
4012 _mm512_maskz_cvtpd_epi32 (__mmask8 __U, __m512d __A)
4013 {
4014  return (__m256i) __builtin_ia32_cvtpd2dq512_mask ((__v8df) __A,
4015  (__v8si)
4017  (__mmask8) __U,
4019 }
4020 
4021 #define _mm512_cvt_roundps_epu32(A, R) \
4022  (__m512i)__builtin_ia32_cvtps2udq512_mask((__v16sf)(__m512)(A), \
4023  (__v16si)_mm512_setzero_si512(), \
4024  (__mmask16)-1, (int)(R))
4025 
4026 #define _mm512_mask_cvt_roundps_epu32(W, U, A, R) \
4027  (__m512i)__builtin_ia32_cvtps2udq512_mask((__v16sf)(__m512)(A), \
4028  (__v16si)(__m512i)(W), \
4029  (__mmask16)(U), (int)(R))
4030 
4031 #define _mm512_maskz_cvt_roundps_epu32(U, A, R) \
4032  (__m512i)__builtin_ia32_cvtps2udq512_mask((__v16sf)(__m512)(A), \
4033  (__v16si)_mm512_setzero_si512(), \
4034  (__mmask16)(U), (int)(R))
4035 
4036 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4037 _mm512_cvtps_epu32 ( __m512 __A)
4038 {
4039  return (__m512i) __builtin_ia32_cvtps2udq512_mask ((__v16sf) __A,\
4040  (__v16si)\
4042  (__mmask16) -1,\
4044 }
4045 
4046 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4047 _mm512_mask_cvtps_epu32 (__m512i __W, __mmask16 __U, __m512 __A)
4048 {
4049  return (__m512i) __builtin_ia32_cvtps2udq512_mask ((__v16sf) __A,
4050  (__v16si) __W,
4051  (__mmask16) __U,
4053 }
4054 
4055 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4056 _mm512_maskz_cvtps_epu32 ( __mmask16 __U, __m512 __A)
4057 {
4058  return (__m512i) __builtin_ia32_cvtps2udq512_mask ((__v16sf) __A,
4059  (__v16si)
4061  (__mmask16) __U ,
4063 }
4064 
4065 #define _mm512_cvt_roundpd_epu32(A, R) \
4066  (__m256i)__builtin_ia32_cvtpd2udq512_mask((__v8df)(__m512d)(A), \
4067  (__v8si)_mm256_setzero_si256(), \
4068  (__mmask8)-1, (int)(R))
4069 
4070 #define _mm512_mask_cvt_roundpd_epu32(W, U, A, R) \
4071  (__m256i)__builtin_ia32_cvtpd2udq512_mask((__v8df)(__m512d)(A), \
4072  (__v8si)(__m256i)(W), \
4073  (__mmask8)(U), (int)(R))
4074 
4075 #define _mm512_maskz_cvt_roundpd_epu32(U, A, R) \
4076  (__m256i)__builtin_ia32_cvtpd2udq512_mask((__v8df)(__m512d)(A), \
4077  (__v8si)_mm256_setzero_si256(), \
4078  (__mmask8)(U), (int)(R))
4079 
4080 static __inline__ __m256i __DEFAULT_FN_ATTRS512
4081 _mm512_cvtpd_epu32 (__m512d __A)
4082 {
4083  return (__m256i) __builtin_ia32_cvtpd2udq512_mask ((__v8df) __A,
4084  (__v8si)
4086  (__mmask8) -1,
4088 }
4089 
4090 static __inline__ __m256i __DEFAULT_FN_ATTRS512
4091 _mm512_mask_cvtpd_epu32 (__m256i __W, __mmask8 __U, __m512d __A)
4092 {
4093  return (__m256i) __builtin_ia32_cvtpd2udq512_mask ((__v8df) __A,
4094  (__v8si) __W,
4095  (__mmask8) __U,
4097 }
4098 
4099 static __inline__ __m256i __DEFAULT_FN_ATTRS512
4100 _mm512_maskz_cvtpd_epu32 (__mmask8 __U, __m512d __A)
4101 {
4102  return (__m256i) __builtin_ia32_cvtpd2udq512_mask ((__v8df) __A,
4103  (__v8si)
4105  (__mmask8) __U,
4107 }
4108 
4109 static __inline__ double __DEFAULT_FN_ATTRS512
4111 {
4112  return __a[0];
4113 }
4114 
4115 static __inline__ float __DEFAULT_FN_ATTRS512
4117 {
4118  return __a[0];
4119 }
4120 
4121 /* Unpack and Interleave */
4122 
4123 static __inline __m512d __DEFAULT_FN_ATTRS512
4124 _mm512_unpackhi_pd(__m512d __a, __m512d __b)
4125 {
4126  return (__m512d)__builtin_shufflevector((__v8df)__a, (__v8df)__b,
4127  1, 9, 1+2, 9+2, 1+4, 9+4, 1+6, 9+6);
4128 }
4129 
4130 static __inline__ __m512d __DEFAULT_FN_ATTRS512
4131 _mm512_mask_unpackhi_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B)
4132 {
4133  return (__m512d)__builtin_ia32_selectpd_512((__mmask8) __U,
4134  (__v8df)_mm512_unpackhi_pd(__A, __B),
4135  (__v8df)__W);
4136 }
4137 
4138 static __inline__ __m512d __DEFAULT_FN_ATTRS512
4139 _mm512_maskz_unpackhi_pd(__mmask8 __U, __m512d __A, __m512d __B)
4140 {
4141  return (__m512d)__builtin_ia32_selectpd_512((__mmask8) __U,
4142  (__v8df)_mm512_unpackhi_pd(__A, __B),
4143  (__v8df)_mm512_setzero_pd());
4144 }
4145 
4146 static __inline __m512d __DEFAULT_FN_ATTRS512
4147 _mm512_unpacklo_pd(__m512d __a, __m512d __b)
4148 {
4149  return (__m512d)__builtin_shufflevector((__v8df)__a, (__v8df)__b,
4150  0, 8, 0+2, 8+2, 0+4, 8+4, 0+6, 8+6);
4151 }
4152 
4153 static __inline__ __m512d __DEFAULT_FN_ATTRS512
4154 _mm512_mask_unpacklo_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B)
4155 {
4156  return (__m512d)__builtin_ia32_selectpd_512((__mmask8) __U,
4157  (__v8df)_mm512_unpacklo_pd(__A, __B),
4158  (__v8df)__W);
4159 }
4160 
4161 static __inline__ __m512d __DEFAULT_FN_ATTRS512
4162 _mm512_maskz_unpacklo_pd (__mmask8 __U, __m512d __A, __m512d __B)
4163 {
4164  return (__m512d)__builtin_ia32_selectpd_512((__mmask8) __U,
4165  (__v8df)_mm512_unpacklo_pd(__A, __B),
4166  (__v8df)_mm512_setzero_pd());
4167 }
4168 
4169 static __inline __m512 __DEFAULT_FN_ATTRS512
4170 _mm512_unpackhi_ps(__m512 __a, __m512 __b)
4171 {
4172  return (__m512)__builtin_shufflevector((__v16sf)__a, (__v16sf)__b,
4173  2, 18, 3, 19,
4174  2+4, 18+4, 3+4, 19+4,
4175  2+8, 18+8, 3+8, 19+8,
4176  2+12, 18+12, 3+12, 19+12);
4177 }
4178 
4179 static __inline__ __m512 __DEFAULT_FN_ATTRS512
4180 _mm512_mask_unpackhi_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B)
4181 {
4182  return (__m512)__builtin_ia32_selectps_512((__mmask16) __U,
4183  (__v16sf)_mm512_unpackhi_ps(__A, __B),
4184  (__v16sf)__W);
4185 }
4186 
4187 static __inline__ __m512 __DEFAULT_FN_ATTRS512
4188 _mm512_maskz_unpackhi_ps (__mmask16 __U, __m512 __A, __m512 __B)
4189 {
4190  return (__m512)__builtin_ia32_selectps_512((__mmask16) __U,
4191  (__v16sf)_mm512_unpackhi_ps(__A, __B),
4192  (__v16sf)_mm512_setzero_ps());
4193 }
4194 
4195 static __inline __m512 __DEFAULT_FN_ATTRS512
4196 _mm512_unpacklo_ps(__m512 __a, __m512 __b)
4197 {
4198  return (__m512)__builtin_shufflevector((__v16sf)__a, (__v16sf)__b,
4199  0, 16, 1, 17,
4200  0+4, 16+4, 1+4, 17+4,
4201  0+8, 16+8, 1+8, 17+8,
4202  0+12, 16+12, 1+12, 17+12);
4203 }
4204 
4205 static __inline__ __m512 __DEFAULT_FN_ATTRS512
4206 _mm512_mask_unpacklo_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B)
4207 {
4208  return (__m512)__builtin_ia32_selectps_512((__mmask16) __U,
4209  (__v16sf)_mm512_unpacklo_ps(__A, __B),
4210  (__v16sf)__W);
4211 }
4212 
4213 static __inline__ __m512 __DEFAULT_FN_ATTRS512
4214 _mm512_maskz_unpacklo_ps (__mmask16 __U, __m512 __A, __m512 __B)
4215 {
4216  return (__m512)__builtin_ia32_selectps_512((__mmask16) __U,
4217  (__v16sf)_mm512_unpacklo_ps(__A, __B),
4218  (__v16sf)_mm512_setzero_ps());
4219 }
4220 
4221 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4222 _mm512_unpackhi_epi32(__m512i __A, __m512i __B)
4223 {
4224  return (__m512i)__builtin_shufflevector((__v16si)__A, (__v16si)__B,
4225  2, 18, 3, 19,
4226  2+4, 18+4, 3+4, 19+4,
4227  2+8, 18+8, 3+8, 19+8,
4228  2+12, 18+12, 3+12, 19+12);
4229 }
4230 
4231 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4232 _mm512_mask_unpackhi_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m512i __B)
4233 {
4234  return (__m512i)__builtin_ia32_selectd_512((__mmask16) __U,
4235  (__v16si)_mm512_unpackhi_epi32(__A, __B),
4236  (__v16si)__W);
4237 }
4238 
4239 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4240 _mm512_maskz_unpackhi_epi32(__mmask16 __U, __m512i __A, __m512i __B)
4241 {
4242  return (__m512i)__builtin_ia32_selectd_512((__mmask16) __U,
4243  (__v16si)_mm512_unpackhi_epi32(__A, __B),
4244  (__v16si)_mm512_setzero_si512());
4245 }
4246 
4247 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4248 _mm512_unpacklo_epi32(__m512i __A, __m512i __B)
4249 {
4250  return (__m512i)__builtin_shufflevector((__v16si)__A, (__v16si)__B,
4251  0, 16, 1, 17,
4252  0+4, 16+4, 1+4, 17+4,
4253  0+8, 16+8, 1+8, 17+8,
4254  0+12, 16+12, 1+12, 17+12);
4255 }
4256 
4257 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4258 _mm512_mask_unpacklo_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m512i __B)
4259 {
4260  return (__m512i)__builtin_ia32_selectd_512((__mmask16) __U,
4261  (__v16si)_mm512_unpacklo_epi32(__A, __B),
4262  (__v16si)__W);
4263 }
4264 
4265 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4266 _mm512_maskz_unpacklo_epi32(__mmask16 __U, __m512i __A, __m512i __B)
4267 {
4268  return (__m512i)__builtin_ia32_selectd_512((__mmask16) __U,
4269  (__v16si)_mm512_unpacklo_epi32(__A, __B),
4270  (__v16si)_mm512_setzero_si512());
4271 }
4272 
4273 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4274 _mm512_unpackhi_epi64(__m512i __A, __m512i __B)
4275 {
4276  return (__m512i)__builtin_shufflevector((__v8di)__A, (__v8di)__B,
4277  1, 9, 1+2, 9+2, 1+4, 9+4, 1+6, 9+6);
4278 }
4279 
4280 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4281 _mm512_mask_unpackhi_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B)
4282 {
4283  return (__m512i)__builtin_ia32_selectq_512((__mmask8) __U,
4284  (__v8di)_mm512_unpackhi_epi64(__A, __B),
4285  (__v8di)__W);
4286 }
4287 
4288 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4289 _mm512_maskz_unpackhi_epi64(__mmask8 __U, __m512i __A, __m512i __B)
4290 {
4291  return (__m512i)__builtin_ia32_selectq_512((__mmask8) __U,
4292  (__v8di)_mm512_unpackhi_epi64(__A, __B),
4293  (__v8di)_mm512_setzero_si512());
4294 }
4295 
4296 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4297 _mm512_unpacklo_epi64 (__m512i __A, __m512i __B)
4298 {
4299  return (__m512i)__builtin_shufflevector((__v8di)__A, (__v8di)__B,
4300  0, 8, 0+2, 8+2, 0+4, 8+4, 0+6, 8+6);
4301 }
4302 
4303 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4304 _mm512_mask_unpacklo_epi64 (__m512i __W, __mmask8 __U, __m512i __A, __m512i __B)
4305 {
4306  return (__m512i)__builtin_ia32_selectq_512((__mmask8) __U,
4307  (__v8di)_mm512_unpacklo_epi64(__A, __B),
4308  (__v8di)__W);
4309 }
4310 
4311 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4312 _mm512_maskz_unpacklo_epi64 (__mmask8 __U, __m512i __A, __m512i __B)
4313 {
4314  return (__m512i)__builtin_ia32_selectq_512((__mmask8) __U,
4315  (__v8di)_mm512_unpacklo_epi64(__A, __B),
4316  (__v8di)_mm512_setzero_si512());
4317 }
4318 
4319 
4320 /* SIMD load ops */
4321 
4322 static __inline __m512i __DEFAULT_FN_ATTRS512
4323 _mm512_loadu_si512 (void const *__P)
4324 {
4325  struct __loadu_si512 {
4326  __m512i __v;
4327  } __attribute__((__packed__, __may_alias__));
4328  return ((struct __loadu_si512*)__P)->__v;
4329 }
4330 
4331 static __inline __m512i __DEFAULT_FN_ATTRS512
4332 _mm512_mask_loadu_epi32 (__m512i __W, __mmask16 __U, void const *__P)
4333 {
4334  return (__m512i) __builtin_ia32_loaddqusi512_mask ((const int *) __P,
4335  (__v16si) __W,
4336  (__mmask16) __U);
4337 }
4338 
4339 
4340 static __inline __m512i __DEFAULT_FN_ATTRS512
4341 _mm512_maskz_loadu_epi32(__mmask16 __U, void const *__P)
4342 {
4343  return (__m512i) __builtin_ia32_loaddqusi512_mask ((const int *)__P,
4344  (__v16si)
4346  (__mmask16) __U);
4347 }
4348 
4349 static __inline __m512i __DEFAULT_FN_ATTRS512
4350 _mm512_mask_loadu_epi64 (__m512i __W, __mmask8 __U, void const *__P)
4351 {
4352  return (__m512i) __builtin_ia32_loaddqudi512_mask ((const long long *) __P,
4353  (__v8di) __W,
4354  (__mmask8) __U);
4355 }
4356 
4357 static __inline __m512i __DEFAULT_FN_ATTRS512
4358 _mm512_maskz_loadu_epi64(__mmask8 __U, void const *__P)
4359 {
4360  return (__m512i) __builtin_ia32_loaddqudi512_mask ((const long long *)__P,
4361  (__v8di)
4363  (__mmask8) __U);
4364 }
4365 
4366 static __inline __m512 __DEFAULT_FN_ATTRS512
4367 _mm512_mask_loadu_ps (__m512 __W, __mmask16 __U, void const *__P)
4368 {
4369  return (__m512) __builtin_ia32_loadups512_mask ((const float *) __P,
4370  (__v16sf) __W,
4371  (__mmask16) __U);
4372 }
4373 
4374 static __inline __m512 __DEFAULT_FN_ATTRS512
4375 _mm512_maskz_loadu_ps(__mmask16 __U, void const *__P)
4376 {
4377  return (__m512) __builtin_ia32_loadups512_mask ((const float *)__P,
4378  (__v16sf)
4379  _mm512_setzero_ps (),
4380  (__mmask16) __U);
4381 }
4382 
4383 static __inline __m512d __DEFAULT_FN_ATTRS512
4384 _mm512_mask_loadu_pd (__m512d __W, __mmask8 __U, void const *__P)
4385 {
4386  return (__m512d) __builtin_ia32_loadupd512_mask ((const double *) __P,
4387  (__v8df) __W,
4388  (__mmask8) __U);
4389 }
4390 
4391 static __inline __m512d __DEFAULT_FN_ATTRS512
4392 _mm512_maskz_loadu_pd(__mmask8 __U, void const *__P)
4393 {
4394  return (__m512d) __builtin_ia32_loadupd512_mask ((const double *)__P,
4395  (__v8df)
4396  _mm512_setzero_pd (),
4397  (__mmask8) __U);
4398 }
4399 
4400 static __inline __m512d __DEFAULT_FN_ATTRS512
4401 _mm512_loadu_pd(void const *__p)
4402 {
4403  struct __loadu_pd {
4404  __m512d __v;
4405  } __attribute__((__packed__, __may_alias__));
4406  return ((struct __loadu_pd*)__p)->__v;
4407 }
4408 
4409 static __inline __m512 __DEFAULT_FN_ATTRS512
4410 _mm512_loadu_ps(void const *__p)
4411 {
4412  struct __loadu_ps {
4413  __m512 __v;
4414  } __attribute__((__packed__, __may_alias__));
4415  return ((struct __loadu_ps*)__p)->__v;
4416 }
4417 
4418 static __inline __m512 __DEFAULT_FN_ATTRS512
4419 _mm512_load_ps(void const *__p)
4420 {
4421  return *(__m512*)__p;
4422 }
4423 
4424 static __inline __m512 __DEFAULT_FN_ATTRS512
4425 _mm512_mask_load_ps (__m512 __W, __mmask16 __U, void const *__P)
4426 {
4427  return (__m512) __builtin_ia32_loadaps512_mask ((const __v16sf *) __P,
4428  (__v16sf) __W,
4429  (__mmask16) __U);
4430 }
4431 
4432 static __inline __m512 __DEFAULT_FN_ATTRS512
4433 _mm512_maskz_load_ps(__mmask16 __U, void const *__P)
4434 {
4435  return (__m512) __builtin_ia32_loadaps512_mask ((const __v16sf *)__P,
4436  (__v16sf)
4437  _mm512_setzero_ps (),
4438  (__mmask16) __U);
4439 }
4440 
4441 static __inline __m512d __DEFAULT_FN_ATTRS512
4442 _mm512_load_pd(void const *__p)
4443 {
4444  return *(__m512d*)__p;
4445 }
4446 
4447 static __inline __m512d __DEFAULT_FN_ATTRS512
4448 _mm512_mask_load_pd (__m512d __W, __mmask8 __U, void const *__P)
4449 {
4450  return (__m512d) __builtin_ia32_loadapd512_mask ((const __v8df *) __P,
4451  (__v8df) __W,
4452  (__mmask8) __U);
4453 }
4454 
4455 static __inline __m512d __DEFAULT_FN_ATTRS512
4456 _mm512_maskz_load_pd(__mmask8 __U, void const *__P)
4457 {
4458  return (__m512d) __builtin_ia32_loadapd512_mask ((const __v8df *)__P,
4459  (__v8df)
4460  _mm512_setzero_pd (),
4461  (__mmask8) __U);
4462 }
4463 
4464 static __inline __m512i __DEFAULT_FN_ATTRS512
4465 _mm512_load_si512 (void const *__P)
4466 {
4467  return *(__m512i *) __P;
4468 }
4469 
4470 static __inline __m512i __DEFAULT_FN_ATTRS512
4471 _mm512_load_epi32 (void const *__P)
4472 {
4473  return *(__m512i *) __P;
4474 }
4475 
4476 static __inline __m512i __DEFAULT_FN_ATTRS512
4477 _mm512_load_epi64 (void const *__P)
4478 {
4479  return *(__m512i *) __P;
4480 }
4481 
4482 /* SIMD store ops */
4483 
4484 static __inline void __DEFAULT_FN_ATTRS512
4485 _mm512_mask_storeu_epi64(void *__P, __mmask8 __U, __m512i __A)
4486 {
4487  __builtin_ia32_storedqudi512_mask ((long long *)__P, (__v8di) __A,
4488  (__mmask8) __U);
4489 }
4490 
4491 static __inline void __DEFAULT_FN_ATTRS512
4492 _mm512_storeu_si512 (void *__P, __m512i __A)
4493 {
4494  struct __storeu_si512 {
4495  __m512i __v;
4496  } __attribute__((__packed__, __may_alias__));
4497  ((struct __storeu_si512*)__P)->__v = __A;
4498 }
4499 
4500 static __inline void __DEFAULT_FN_ATTRS512
4501 _mm512_mask_storeu_epi32(void *__P, __mmask16 __U, __m512i __A)
4502 {
4503  __builtin_ia32_storedqusi512_mask ((int *)__P, (__v16si) __A,
4504  (__mmask16) __U);
4505 }
4506 
4507 static __inline void __DEFAULT_FN_ATTRS512
4508 _mm512_mask_storeu_pd(void *__P, __mmask8 __U, __m512d __A)
4509 {
4510  __builtin_ia32_storeupd512_mask ((double *)__P, (__v8df) __A, (__mmask8) __U);
4511 }
4512 
4513 static __inline void __DEFAULT_FN_ATTRS512
4514 _mm512_storeu_pd(void *__P, __m512d __A)
4515 {
4516  struct __storeu_pd {
4517  __m512d __v;
4518  } __attribute__((__packed__, __may_alias__));
4519  ((struct __storeu_pd*)__P)->__v = __A;
4520 }
4521 
4522 static __inline void __DEFAULT_FN_ATTRS512
4523 _mm512_mask_storeu_ps(void *__P, __mmask16 __U, __m512 __A)
4524 {
4525  __builtin_ia32_storeups512_mask ((float *)__P, (__v16sf) __A,
4526  (__mmask16) __U);
4527 }
4528 
4529 static __inline void __DEFAULT_FN_ATTRS512
4530 _mm512_storeu_ps(void *__P, __m512 __A)
4531 {
4532  struct __storeu_ps {
4533  __m512 __v;
4534  } __attribute__((__packed__, __may_alias__));
4535  ((struct __storeu_ps*)__P)->__v = __A;
4536 }
4537 
4538 static __inline void __DEFAULT_FN_ATTRS512
4539 _mm512_mask_store_pd(void *__P, __mmask8 __U, __m512d __A)
4540 {
4541  __builtin_ia32_storeapd512_mask ((__v8df *)__P, (__v8df) __A, (__mmask8) __U);
4542 }
4543 
4544 static __inline void __DEFAULT_FN_ATTRS512
4545 _mm512_store_pd(void *__P, __m512d __A)
4546 {
4547  *(__m512d*)__P = __A;
4548 }
4549 
4550 static __inline void __DEFAULT_FN_ATTRS512
4551 _mm512_mask_store_ps(void *__P, __mmask16 __U, __m512 __A)
4552 {
4553  __builtin_ia32_storeaps512_mask ((__v16sf *)__P, (__v16sf) __A,
4554  (__mmask16) __U);
4555 }
4556 
4557 static __inline void __DEFAULT_FN_ATTRS512
4558 _mm512_store_ps(void *__P, __m512 __A)
4559 {
4560  *(__m512*)__P = __A;
4561 }
4562 
4563 static __inline void __DEFAULT_FN_ATTRS512
4564 _mm512_store_si512 (void *__P, __m512i __A)
4565 {
4566  *(__m512i *) __P = __A;
4567 }
4568 
4569 static __inline void __DEFAULT_FN_ATTRS512
4570 _mm512_store_epi32 (void *__P, __m512i __A)
4571 {
4572  *(__m512i *) __P = __A;
4573 }
4574 
4575 static __inline void __DEFAULT_FN_ATTRS512
4576 _mm512_store_epi64 (void *__P, __m512i __A)
4577 {
4578  *(__m512i *) __P = __A;
4579 }
4580 
4581 /* Mask ops */
4582 
4583 static __inline __mmask16 __DEFAULT_FN_ATTRS512
4584 _mm512_knot(__mmask16 __M)
4585 {
4586  return __builtin_ia32_knothi(__M);
4587 }
4588 
4589 /* Integer compare */
4590 
4591 #define _mm512_cmpeq_epi32_mask(A, B) \
4592  _mm512_cmp_epi32_mask((A), (B), _MM_CMPINT_EQ)
4593 #define _mm512_mask_cmpeq_epi32_mask(k, A, B) \
4594  _mm512_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_EQ)
4595 #define _mm512_cmpge_epi32_mask(A, B) \
4596  _mm512_cmp_epi32_mask((A), (B), _MM_CMPINT_GE)
4597 #define _mm512_mask_cmpge_epi32_mask(k, A, B) \
4598  _mm512_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_GE)
4599 #define _mm512_cmpgt_epi32_mask(A, B) \
4600  _mm512_cmp_epi32_mask((A), (B), _MM_CMPINT_GT)
4601 #define _mm512_mask_cmpgt_epi32_mask(k, A, B) \
4602  _mm512_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_GT)
4603 #define _mm512_cmple_epi32_mask(A, B) \
4604  _mm512_cmp_epi32_mask((A), (B), _MM_CMPINT_LE)
4605 #define _mm512_mask_cmple_epi32_mask(k, A, B) \
4606  _mm512_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_LE)
4607 #define _mm512_cmplt_epi32_mask(A, B) \
4608  _mm512_cmp_epi32_mask((A), (B), _MM_CMPINT_LT)
4609 #define _mm512_mask_cmplt_epi32_mask(k, A, B) \
4610  _mm512_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_LT)
4611 #define _mm512_cmpneq_epi32_mask(A, B) \
4612  _mm512_cmp_epi32_mask((A), (B), _MM_CMPINT_NE)
4613 #define _mm512_mask_cmpneq_epi32_mask(k, A, B) \
4614  _mm512_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_NE)
4615 
4616 #define _mm512_cmpeq_epu32_mask(A, B) \
4617  _mm512_cmp_epu32_mask((A), (B), _MM_CMPINT_EQ)
4618 #define _mm512_mask_cmpeq_epu32_mask(k, A, B) \
4619  _mm512_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_EQ)
4620 #define _mm512_cmpge_epu32_mask(A, B) \
4621  _mm512_cmp_epu32_mask((A), (B), _MM_CMPINT_GE)
4622 #define _mm512_mask_cmpge_epu32_mask(k, A, B) \
4623  _mm512_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_GE)
4624 #define _mm512_cmpgt_epu32_mask(A, B) \
4625  _mm512_cmp_epu32_mask((A), (B), _MM_CMPINT_GT)
4626 #define _mm512_mask_cmpgt_epu32_mask(k, A, B) \
4627  _mm512_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_GT)
4628 #define _mm512_cmple_epu32_mask(A, B) \
4629  _mm512_cmp_epu32_mask((A), (B), _MM_CMPINT_LE)
4630 #define _mm512_mask_cmple_epu32_mask(k, A, B) \
4631  _mm512_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_LE)
4632 #define _mm512_cmplt_epu32_mask(A, B) \
4633  _mm512_cmp_epu32_mask((A), (B), _MM_CMPINT_LT)
4634 #define _mm512_mask_cmplt_epu32_mask(k, A, B) \
4635  _mm512_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_LT)
4636 #define _mm512_cmpneq_epu32_mask(A, B) \
4637  _mm512_cmp_epu32_mask((A), (B), _MM_CMPINT_NE)
4638 #define _mm512_mask_cmpneq_epu32_mask(k, A, B) \
4639  _mm512_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_NE)
4640 
4641 #define _mm512_cmpeq_epi64_mask(A, B) \
4642  _mm512_cmp_epi64_mask((A), (B), _MM_CMPINT_EQ)
4643 #define _mm512_mask_cmpeq_epi64_mask(k, A, B) \
4644  _mm512_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_EQ)
4645 #define _mm512_cmpge_epi64_mask(A, B) \
4646  _mm512_cmp_epi64_mask((A), (B), _MM_CMPINT_GE)
4647 #define _mm512_mask_cmpge_epi64_mask(k, A, B) \
4648  _mm512_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_GE)
4649 #define _mm512_cmpgt_epi64_mask(A, B) \
4650  _mm512_cmp_epi64_mask((A), (B), _MM_CMPINT_GT)
4651 #define _mm512_mask_cmpgt_epi64_mask(k, A, B) \
4652  _mm512_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_GT)
4653 #define _mm512_cmple_epi64_mask(A, B) \
4654  _mm512_cmp_epi64_mask((A), (B), _MM_CMPINT_LE)
4655 #define _mm512_mask_cmple_epi64_mask(k, A, B) \
4656  _mm512_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_LE)
4657 #define _mm512_cmplt_epi64_mask(A, B) \
4658  _mm512_cmp_epi64_mask((A), (B), _MM_CMPINT_LT)
4659 #define _mm512_mask_cmplt_epi64_mask(k, A, B) \
4660  _mm512_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_LT)
4661 #define _mm512_cmpneq_epi64_mask(A, B) \
4662  _mm512_cmp_epi64_mask((A), (B), _MM_CMPINT_NE)
4663 #define _mm512_mask_cmpneq_epi64_mask(k, A, B) \
4664  _mm512_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_NE)
4665 
4666 #define _mm512_cmpeq_epu64_mask(A, B) \
4667  _mm512_cmp_epu64_mask((A), (B), _MM_CMPINT_EQ)
4668 #define _mm512_mask_cmpeq_epu64_mask(k, A, B) \
4669  _mm512_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_EQ)
4670 #define _mm512_cmpge_epu64_mask(A, B) \
4671  _mm512_cmp_epu64_mask((A), (B), _MM_CMPINT_GE)
4672 #define _mm512_mask_cmpge_epu64_mask(k, A, B) \
4673  _mm512_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_GE)
4674 #define _mm512_cmpgt_epu64_mask(A, B) \
4675  _mm512_cmp_epu64_mask((A), (B), _MM_CMPINT_GT)
4676 #define _mm512_mask_cmpgt_epu64_mask(k, A, B) \
4677  _mm512_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_GT)
4678 #define _mm512_cmple_epu64_mask(A, B) \
4679  _mm512_cmp_epu64_mask((A), (B), _MM_CMPINT_LE)
4680 #define _mm512_mask_cmple_epu64_mask(k, A, B) \
4681  _mm512_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_LE)
4682 #define _mm512_cmplt_epu64_mask(A, B) \
4683  _mm512_cmp_epu64_mask((A), (B), _MM_CMPINT_LT)
4684 #define _mm512_mask_cmplt_epu64_mask(k, A, B) \
4685  _mm512_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_LT)
4686 #define _mm512_cmpneq_epu64_mask(A, B) \
4687  _mm512_cmp_epu64_mask((A), (B), _MM_CMPINT_NE)
4688 #define _mm512_mask_cmpneq_epu64_mask(k, A, B) \
4689  _mm512_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_NE)
4690 
4691 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4693 {
4694  /* This function always performs a signed extension, but __v16qi is a char
4695  which may be signed or unsigned, so use __v16qs. */
4696  return (__m512i)__builtin_convertvector((__v16qs)__A, __v16si);
4697 }
4698 
4699 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4700 _mm512_mask_cvtepi8_epi32(__m512i __W, __mmask16 __U, __m128i __A)
4701 {
4702  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
4703  (__v16si)_mm512_cvtepi8_epi32(__A),
4704  (__v16si)__W);
4705 }
4706 
4707 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4708 _mm512_maskz_cvtepi8_epi32(__mmask16 __U, __m128i __A)
4709 {
4710  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
4711  (__v16si)_mm512_cvtepi8_epi32(__A),
4712  (__v16si)_mm512_setzero_si512());
4713 }
4714 
4715 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4717 {
4718  /* This function always performs a signed extension, but __v16qi is a char
4719  which may be signed or unsigned, so use __v16qs. */
4720  return (__m512i)__builtin_convertvector(__builtin_shufflevector((__v16qs)__A, (__v16qs)__A, 0, 1, 2, 3, 4, 5, 6, 7), __v8di);
4721 }
4722 
4723 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4724 _mm512_mask_cvtepi8_epi64(__m512i __W, __mmask8 __U, __m128i __A)
4725 {
4726  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
4727  (__v8di)_mm512_cvtepi8_epi64(__A),
4728  (__v8di)__W);
4729 }
4730 
4731 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4732 _mm512_maskz_cvtepi8_epi64(__mmask8 __U, __m128i __A)
4733 {
4734  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
4735  (__v8di)_mm512_cvtepi8_epi64(__A),
4736  (__v8di)_mm512_setzero_si512 ());
4737 }
4738 
4739 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4741 {
4742  return (__m512i)__builtin_convertvector((__v8si)__X, __v8di);
4743 }
4744 
4745 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4746 _mm512_mask_cvtepi32_epi64(__m512i __W, __mmask8 __U, __m256i __X)
4747 {
4748  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
4749  (__v8di)_mm512_cvtepi32_epi64(__X),
4750  (__v8di)__W);
4751 }
4752 
4753 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4754 _mm512_maskz_cvtepi32_epi64(__mmask8 __U, __m256i __X)
4755 {
4756  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
4757  (__v8di)_mm512_cvtepi32_epi64(__X),
4758  (__v8di)_mm512_setzero_si512());
4759 }
4760 
4761 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4763 {
4764  return (__m512i)__builtin_convertvector((__v16hi)__A, __v16si);
4765 }
4766 
4767 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4768 _mm512_mask_cvtepi16_epi32(__m512i __W, __mmask16 __U, __m256i __A)
4769 {
4770  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
4771  (__v16si)_mm512_cvtepi16_epi32(__A),
4772  (__v16si)__W);
4773 }
4774 
4775 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4776 _mm512_maskz_cvtepi16_epi32(__mmask16 __U, __m256i __A)
4777 {
4778  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
4779  (__v16si)_mm512_cvtepi16_epi32(__A),
4780  (__v16si)_mm512_setzero_si512 ());
4781 }
4782 
4783 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4785 {
4786  return (__m512i)__builtin_convertvector((__v8hi)__A, __v8di);
4787 }
4788 
4789 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4790 _mm512_mask_cvtepi16_epi64(__m512i __W, __mmask8 __U, __m128i __A)
4791 {
4792  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
4793  (__v8di)_mm512_cvtepi16_epi64(__A),
4794  (__v8di)__W);
4795 }
4796 
4797 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4798 _mm512_maskz_cvtepi16_epi64(__mmask8 __U, __m128i __A)
4799 {
4800  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
4801  (__v8di)_mm512_cvtepi16_epi64(__A),
4802  (__v8di)_mm512_setzero_si512());
4803 }
4804 
4805 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4807 {
4808  return (__m512i)__builtin_convertvector((__v16qu)__A, __v16si);
4809 }
4810 
4811 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4812 _mm512_mask_cvtepu8_epi32(__m512i __W, __mmask16 __U, __m128i __A)
4813 {
4814  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
4815  (__v16si)_mm512_cvtepu8_epi32(__A),
4816  (__v16si)__W);
4817 }
4818 
4819 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4820 _mm512_maskz_cvtepu8_epi32(__mmask16 __U, __m128i __A)
4821 {
4822  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
4823  (__v16si)_mm512_cvtepu8_epi32(__A),
4824  (__v16si)_mm512_setzero_si512());
4825 }
4826 
4827 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4829 {
4830  return (__m512i)__builtin_convertvector(__builtin_shufflevector((__v16qu)__A, (__v16qu)__A, 0, 1, 2, 3, 4, 5, 6, 7), __v8di);
4831 }
4832 
4833 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4834 _mm512_mask_cvtepu8_epi64(__m512i __W, __mmask8 __U, __m128i __A)
4835 {
4836  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
4837  (__v8di)_mm512_cvtepu8_epi64(__A),
4838  (__v8di)__W);
4839 }
4840 
4841 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4842 _mm512_maskz_cvtepu8_epi64(__mmask8 __U, __m128i __A)
4843 {
4844  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
4845  (__v8di)_mm512_cvtepu8_epi64(__A),
4846  (__v8di)_mm512_setzero_si512());
4847 }
4848 
4849 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4851 {
4852  return (__m512i)__builtin_convertvector((__v8su)__X, __v8di);
4853 }
4854 
4855 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4856 _mm512_mask_cvtepu32_epi64(__m512i __W, __mmask8 __U, __m256i __X)
4857 {
4858  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
4859  (__v8di)_mm512_cvtepu32_epi64(__X),
4860  (__v8di)__W);
4861 }
4862 
4863 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4864 _mm512_maskz_cvtepu32_epi64(__mmask8 __U, __m256i __X)
4865 {
4866  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
4867  (__v8di)_mm512_cvtepu32_epi64(__X),
4868  (__v8di)_mm512_setzero_si512());
4869 }
4870 
4871 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4873 {
4874  return (__m512i)__builtin_convertvector((__v16hu)__A, __v16si);
4875 }
4876 
4877 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4878 _mm512_mask_cvtepu16_epi32(__m512i __W, __mmask16 __U, __m256i __A)
4879 {
4880  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
4881  (__v16si)_mm512_cvtepu16_epi32(__A),
4882  (__v16si)__W);
4883 }
4884 
4885 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4886 _mm512_maskz_cvtepu16_epi32(__mmask16 __U, __m256i __A)
4887 {
4888  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
4889  (__v16si)_mm512_cvtepu16_epi32(__A),
4890  (__v16si)_mm512_setzero_si512());
4891 }
4892 
4893 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4895 {
4896  return (__m512i)__builtin_convertvector((__v8hu)__A, __v8di);
4897 }
4898 
4899 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4900 _mm512_mask_cvtepu16_epi64(__m512i __W, __mmask8 __U, __m128i __A)
4901 {
4902  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
4903  (__v8di)_mm512_cvtepu16_epi64(__A),
4904  (__v8di)__W);
4905 }
4906 
4907 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4908 _mm512_maskz_cvtepu16_epi64(__mmask8 __U, __m128i __A)
4909 {
4910  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
4911  (__v8di)_mm512_cvtepu16_epi64(__A),
4912  (__v8di)_mm512_setzero_si512());
4913 }
4914 
4915 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4916 _mm512_rorv_epi32 (__m512i __A, __m512i __B)
4917 {
4918  return (__m512i)__builtin_ia32_prorvd512((__v16si)__A, (__v16si)__B);
4919 }
4920 
4921 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4922 _mm512_mask_rorv_epi32 (__m512i __W, __mmask16 __U, __m512i __A, __m512i __B)
4923 {
4924  return (__m512i)__builtin_ia32_selectd_512(__U,
4925  (__v16si)_mm512_rorv_epi32(__A, __B),
4926  (__v16si)__W);
4927 }
4928 
4929 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4930 _mm512_maskz_rorv_epi32 (__mmask16 __U, __m512i __A, __m512i __B)
4931 {
4932  return (__m512i)__builtin_ia32_selectd_512(__U,
4933  (__v16si)_mm512_rorv_epi32(__A, __B),
4934  (__v16si)_mm512_setzero_si512());
4935 }
4936 
4937 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4938 _mm512_rorv_epi64 (__m512i __A, __m512i __B)
4939 {
4940  return (__m512i)__builtin_ia32_prorvq512((__v8di)__A, (__v8di)__B);
4941 }
4942 
4943 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4944 _mm512_mask_rorv_epi64 (__m512i __W, __mmask8 __U, __m512i __A, __m512i __B)
4945 {
4946  return (__m512i)__builtin_ia32_selectq_512(__U,
4947  (__v8di)_mm512_rorv_epi64(__A, __B),
4948  (__v8di)__W);
4949 }
4950 
4951 static __inline__ __m512i __DEFAULT_FN_ATTRS512
4952 _mm512_maskz_rorv_epi64 (__mmask8 __U, __m512i __A, __m512i __B)
4953 {
4954  return (__m512i)__builtin_ia32_selectq_512(__U,
4955  (__v8di)_mm512_rorv_epi64(__A, __B),
4956  (__v8di)_mm512_setzero_si512());
4957 }
4958 
4959 
4960 
4961 #define _mm512_cmp_epi32_mask(a, b, p) \
4962  (__mmask16)__builtin_ia32_cmpd512_mask((__v16si)(__m512i)(a), \
4963  (__v16si)(__m512i)(b), (int)(p), \
4964  (__mmask16)-1)
4965 
4966 #define _mm512_cmp_epu32_mask(a, b, p) \
4967  (__mmask16)__builtin_ia32_ucmpd512_mask((__v16si)(__m512i)(a), \
4968  (__v16si)(__m512i)(b), (int)(p), \
4969  (__mmask16)-1)
4970 
4971 #define _mm512_cmp_epi64_mask(a, b, p) \
4972  (__mmask8)__builtin_ia32_cmpq512_mask((__v8di)(__m512i)(a), \
4973  (__v8di)(__m512i)(b), (int)(p), \
4974  (__mmask8)-1)
4975 
4976 #define _mm512_cmp_epu64_mask(a, b, p) \
4977  (__mmask8)__builtin_ia32_ucmpq512_mask((__v8di)(__m512i)(a), \
4978  (__v8di)(__m512i)(b), (int)(p), \
4979  (__mmask8)-1)
4980 
4981 #define _mm512_mask_cmp_epi32_mask(m, a, b, p) \
4982  (__mmask16)__builtin_ia32_cmpd512_mask((__v16si)(__m512i)(a), \
4983  (__v16si)(__m512i)(b), (int)(p), \
4984  (__mmask16)(m))
4985 
4986 #define _mm512_mask_cmp_epu32_mask(m, a, b, p) \
4987  (__mmask16)__builtin_ia32_ucmpd512_mask((__v16si)(__m512i)(a), \
4988  (__v16si)(__m512i)(b), (int)(p), \
4989  (__mmask16)(m))
4990 
4991 #define _mm512_mask_cmp_epi64_mask(m, a, b, p) \
4992  (__mmask8)__builtin_ia32_cmpq512_mask((__v8di)(__m512i)(a), \
4993  (__v8di)(__m512i)(b), (int)(p), \
4994  (__mmask8)(m))
4995 
4996 #define _mm512_mask_cmp_epu64_mask(m, a, b, p) \
4997  (__mmask8)__builtin_ia32_ucmpq512_mask((__v8di)(__m512i)(a), \
4998  (__v8di)(__m512i)(b), (int)(p), \
4999  (__mmask8)(m))
5000 
5001 #define _mm512_rol_epi32(a, b) \
5002  (__m512i)__builtin_ia32_prold512((__v16si)(__m512i)(a), (int)(b))
5003 
5004 #define _mm512_mask_rol_epi32(W, U, a, b) \
5005  (__m512i)__builtin_ia32_selectd_512((__mmask16)(U), \
5006  (__v16si)_mm512_rol_epi32((a), (b)), \
5007  (__v16si)(__m512i)(W))
5008 
5009 #define _mm512_maskz_rol_epi32(U, a, b) \
5010  (__m512i)__builtin_ia32_selectd_512((__mmask16)(U), \
5011  (__v16si)_mm512_rol_epi32((a), (b)), \
5012  (__v16si)_mm512_setzero_si512())
5013 
5014 #define _mm512_rol_epi64(a, b) \
5015  (__m512i)__builtin_ia32_prolq512((__v8di)(__m512i)(a), (int)(b))
5016 
5017 #define _mm512_mask_rol_epi64(W, U, a, b) \
5018  (__m512i)__builtin_ia32_selectq_512((__mmask8)(U), \
5019  (__v8di)_mm512_rol_epi64((a), (b)), \
5020  (__v8di)(__m512i)(W))
5021 
5022 #define _mm512_maskz_rol_epi64(U, a, b) \
5023  (__m512i)__builtin_ia32_selectq_512((__mmask8)(U), \
5024  (__v8di)_mm512_rol_epi64((a), (b)), \
5025  (__v8di)_mm512_setzero_si512())
5026 
5027 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5028 _mm512_rolv_epi32 (__m512i __A, __m512i __B)
5029 {
5030  return (__m512i)__builtin_ia32_prolvd512((__v16si)__A, (__v16si)__B);
5031 }
5032 
5033 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5034 _mm512_mask_rolv_epi32 (__m512i __W, __mmask16 __U, __m512i __A, __m512i __B)
5035 {
5036  return (__m512i)__builtin_ia32_selectd_512(__U,
5037  (__v16si)_mm512_rolv_epi32(__A, __B),
5038  (__v16si)__W);
5039 }
5040 
5041 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5042 _mm512_maskz_rolv_epi32 (__mmask16 __U, __m512i __A, __m512i __B)
5043 {
5044  return (__m512i)__builtin_ia32_selectd_512(__U,
5045  (__v16si)_mm512_rolv_epi32(__A, __B),
5046  (__v16si)_mm512_setzero_si512());
5047 }
5048 
5049 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5050 _mm512_rolv_epi64 (__m512i __A, __m512i __B)
5051 {
5052  return (__m512i)__builtin_ia32_prolvq512((__v8di)__A, (__v8di)__B);
5053 }
5054 
5055 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5056 _mm512_mask_rolv_epi64 (__m512i __W, __mmask8 __U, __m512i __A, __m512i __B)
5057 {
5058  return (__m512i)__builtin_ia32_selectq_512(__U,
5059  (__v8di)_mm512_rolv_epi64(__A, __B),
5060  (__v8di)__W);
5061 }
5062 
5063 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5064 _mm512_maskz_rolv_epi64 (__mmask8 __U, __m512i __A, __m512i __B)
5065 {
5066  return (__m512i)__builtin_ia32_selectq_512(__U,
5067  (__v8di)_mm512_rolv_epi64(__A, __B),
5068  (__v8di)_mm512_setzero_si512());
5069 }
5070 
5071 #define _mm512_ror_epi32(A, B) \
5072  (__m512i)__builtin_ia32_prord512((__v16si)(__m512i)(A), (int)(B))
5073 
5074 #define _mm512_mask_ror_epi32(W, U, A, B) \
5075  (__m512i)__builtin_ia32_selectd_512((__mmask16)(U), \
5076  (__v16si)_mm512_ror_epi32((A), (B)), \
5077  (__v16si)(__m512i)(W))
5078 
5079 #define _mm512_maskz_ror_epi32(U, A, B) \
5080  (__m512i)__builtin_ia32_selectd_512((__mmask16)(U), \
5081  (__v16si)_mm512_ror_epi32((A), (B)), \
5082  (__v16si)_mm512_setzero_si512())
5083 
5084 #define _mm512_ror_epi64(A, B) \
5085  (__m512i)__builtin_ia32_prorq512((__v8di)(__m512i)(A), (int)(B))
5086 
5087 #define _mm512_mask_ror_epi64(W, U, A, B) \
5088  (__m512i)__builtin_ia32_selectq_512((__mmask8)(U), \
5089  (__v8di)_mm512_ror_epi64((A), (B)), \
5090  (__v8di)(__m512i)(W))
5091 
5092 #define _mm512_maskz_ror_epi64(U, A, B) \
5093  (__m512i)__builtin_ia32_selectq_512((__mmask8)(U), \
5094  (__v8di)_mm512_ror_epi64((A), (B)), \
5095  (__v8di)_mm512_setzero_si512())
5096 
5097 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5098 _mm512_slli_epi32(__m512i __A, int __B)
5099 {
5100  return (__m512i)__builtin_ia32_pslldi512((__v16si)__A, __B);
5101 }
5102 
5103 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5104 _mm512_mask_slli_epi32(__m512i __W, __mmask16 __U, __m512i __A, int __B)
5105 {
5106  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
5107  (__v16si)_mm512_slli_epi32(__A, __B),
5108  (__v16si)__W);
5109 }
5110 
5111 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5112 _mm512_maskz_slli_epi32(__mmask16 __U, __m512i __A, int __B) {
5113  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
5114  (__v16si)_mm512_slli_epi32(__A, __B),
5115  (__v16si)_mm512_setzero_si512());
5116 }
5117 
5118 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5119 _mm512_slli_epi64(__m512i __A, int __B)
5120 {
5121  return (__m512i)__builtin_ia32_psllqi512((__v8di)__A, __B);
5122 }
5123 
5124 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5125 _mm512_mask_slli_epi64(__m512i __W, __mmask8 __U, __m512i __A, int __B)
5126 {
5127  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
5128  (__v8di)_mm512_slli_epi64(__A, __B),
5129  (__v8di)__W);
5130 }
5131 
5132 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5133 _mm512_maskz_slli_epi64(__mmask8 __U, __m512i __A, int __B)
5134 {
5135  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
5136  (__v8di)_mm512_slli_epi64(__A, __B),
5137  (__v8di)_mm512_setzero_si512());
5138 }
5139 
5140 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5141 _mm512_srli_epi32(__m512i __A, int __B)
5142 {
5143  return (__m512i)__builtin_ia32_psrldi512((__v16si)__A, __B);
5144 }
5145 
5146 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5147 _mm512_mask_srli_epi32(__m512i __W, __mmask16 __U, __m512i __A, int __B)
5148 {
5149  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
5150  (__v16si)_mm512_srli_epi32(__A, __B),
5151  (__v16si)__W);
5152 }
5153 
5154 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5155 _mm512_maskz_srli_epi32(__mmask16 __U, __m512i __A, int __B) {
5156  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
5157  (__v16si)_mm512_srli_epi32(__A, __B),
5158  (__v16si)_mm512_setzero_si512());
5159 }
5160 
5161 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5162 _mm512_srli_epi64(__m512i __A, int __B)
5163 {
5164  return (__m512i)__builtin_ia32_psrlqi512((__v8di)__A, __B);
5165 }
5166 
5167 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5168 _mm512_mask_srli_epi64(__m512i __W, __mmask8 __U, __m512i __A, int __B)
5169 {
5170  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
5171  (__v8di)_mm512_srli_epi64(__A, __B),
5172  (__v8di)__W);
5173 }
5174 
5175 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5176 _mm512_maskz_srli_epi64(__mmask8 __U, __m512i __A, int __B)
5177 {
5178  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
5179  (__v8di)_mm512_srli_epi64(__A, __B),
5180  (__v8di)_mm512_setzero_si512());
5181 }
5182 
5183 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5184 _mm512_mask_load_epi32 (__m512i __W, __mmask16 __U, void const *__P)
5185 {
5186  return (__m512i) __builtin_ia32_movdqa32load512_mask ((const __v16si *) __P,
5187  (__v16si) __W,
5188  (__mmask16) __U);
5189 }
5190 
5191 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5192 _mm512_maskz_load_epi32 (__mmask16 __U, void const *__P)
5193 {
5194  return (__m512i) __builtin_ia32_movdqa32load512_mask ((const __v16si *) __P,
5195  (__v16si)
5197  (__mmask16) __U);
5198 }
5199 
5200 static __inline__ void __DEFAULT_FN_ATTRS512
5201 _mm512_mask_store_epi32 (void *__P, __mmask16 __U, __m512i __A)
5202 {
5203  __builtin_ia32_movdqa32store512_mask ((__v16si *) __P, (__v16si) __A,
5204  (__mmask16) __U);
5205 }
5206 
5207 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5208 _mm512_mask_mov_epi32 (__m512i __W, __mmask16 __U, __m512i __A)
5209 {
5210  return (__m512i) __builtin_ia32_selectd_512 ((__mmask16) __U,
5211  (__v16si) __A,
5212  (__v16si) __W);
5213 }
5214 
5215 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5216 _mm512_maskz_mov_epi32 (__mmask16 __U, __m512i __A)
5217 {
5218  return (__m512i) __builtin_ia32_selectd_512 ((__mmask16) __U,
5219  (__v16si) __A,
5220  (__v16si) _mm512_setzero_si512 ());
5221 }
5222 
5223 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5224 _mm512_mask_mov_epi64 (__m512i __W, __mmask8 __U, __m512i __A)
5225 {
5226  return (__m512i) __builtin_ia32_selectq_512 ((__mmask8) __U,
5227  (__v8di) __A,
5228  (__v8di) __W);
5229 }
5230 
5231 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5232 _mm512_maskz_mov_epi64 (__mmask8 __U, __m512i __A)
5233 {
5234  return (__m512i) __builtin_ia32_selectq_512 ((__mmask8) __U,
5235  (__v8di) __A,
5236  (__v8di) _mm512_setzero_si512 ());
5237 }
5238 
5239 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5240 _mm512_mask_load_epi64 (__m512i __W, __mmask8 __U, void const *__P)
5241 {
5242  return (__m512i) __builtin_ia32_movdqa64load512_mask ((const __v8di *) __P,
5243  (__v8di) __W,
5244  (__mmask8) __U);
5245 }
5246 
5247 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5248 _mm512_maskz_load_epi64 (__mmask8 __U, void const *__P)
5249 {
5250  return (__m512i) __builtin_ia32_movdqa64load512_mask ((const __v8di *) __P,
5251  (__v8di)
5253  (__mmask8) __U);
5254 }
5255 
5256 static __inline__ void __DEFAULT_FN_ATTRS512
5257 _mm512_mask_store_epi64 (void *__P, __mmask8 __U, __m512i __A)
5258 {
5259  __builtin_ia32_movdqa64store512_mask ((__v8di *) __P, (__v8di) __A,
5260  (__mmask8) __U);
5261 }
5262 
5263 static __inline__ __m512d __DEFAULT_FN_ATTRS512
5264 _mm512_movedup_pd (__m512d __A)
5265 {
5266  return (__m512d)__builtin_shufflevector((__v8df)__A, (__v8df)__A,
5267  0, 0, 2, 2, 4, 4, 6, 6);
5268 }
5269 
5270 static __inline__ __m512d __DEFAULT_FN_ATTRS512
5271 _mm512_mask_movedup_pd (__m512d __W, __mmask8 __U, __m512d __A)
5272 {
5273  return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
5274  (__v8df)_mm512_movedup_pd(__A),
5275  (__v8df)__W);
5276 }
5277 
5278 static __inline__ __m512d __DEFAULT_FN_ATTRS512
5279 _mm512_maskz_movedup_pd (__mmask8 __U, __m512d __A)
5280 {
5281  return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
5282  (__v8df)_mm512_movedup_pd(__A),
5283  (__v8df)_mm512_setzero_pd());
5284 }
5285 
5286 #define _mm512_fixupimm_round_pd(A, B, C, imm, R) \
5287  (__m512d)__builtin_ia32_fixupimmpd512_mask((__v8df)(__m512d)(A), \
5288  (__v8df)(__m512d)(B), \
5289  (__v8di)(__m512i)(C), (int)(imm), \
5290  (__mmask8)-1, (int)(R))
5291 
5292 #define _mm512_mask_fixupimm_round_pd(A, U, B, C, imm, R) \
5293  (__m512d)__builtin_ia32_fixupimmpd512_mask((__v8df)(__m512d)(A), \
5294  (__v8df)(__m512d)(B), \
5295  (__v8di)(__m512i)(C), (int)(imm), \
5296  (__mmask8)(U), (int)(R))
5297 
5298 #define _mm512_fixupimm_pd(A, B, C, imm) \
5299  (__m512d)__builtin_ia32_fixupimmpd512_mask((__v8df)(__m512d)(A), \
5300  (__v8df)(__m512d)(B), \
5301  (__v8di)(__m512i)(C), (int)(imm), \
5302  (__mmask8)-1, \
5303  _MM_FROUND_CUR_DIRECTION)
5304 
5305 #define _mm512_mask_fixupimm_pd(A, U, B, C, imm) \
5306  (__m512d)__builtin_ia32_fixupimmpd512_mask((__v8df)(__m512d)(A), \
5307  (__v8df)(__m512d)(B), \
5308  (__v8di)(__m512i)(C), (int)(imm), \
5309  (__mmask8)(U), \
5310  _MM_FROUND_CUR_DIRECTION)
5311 
5312 #define _mm512_maskz_fixupimm_round_pd(U, A, B, C, imm, R) \
5313  (__m512d)__builtin_ia32_fixupimmpd512_maskz((__v8df)(__m512d)(A), \
5314  (__v8df)(__m512d)(B), \
5315  (__v8di)(__m512i)(C), \
5316  (int)(imm), (__mmask8)(U), \
5317  (int)(R))
5318 
5319 #define _mm512_maskz_fixupimm_pd(U, A, B, C, imm) \
5320  (__m512d)__builtin_ia32_fixupimmpd512_maskz((__v8df)(__m512d)(A), \
5321  (__v8df)(__m512d)(B), \
5322  (__v8di)(__m512i)(C), \
5323  (int)(imm), (__mmask8)(U), \
5324  _MM_FROUND_CUR_DIRECTION)
5325 
5326 #define _mm512_fixupimm_round_ps(A, B, C, imm, R) \
5327  (__m512)__builtin_ia32_fixupimmps512_mask((__v16sf)(__m512)(A), \
5328  (__v16sf)(__m512)(B), \
5329  (__v16si)(__m512i)(C), (int)(imm), \
5330  (__mmask16)-1, (int)(R))
5331 
5332 #define _mm512_mask_fixupimm_round_ps(A, U, B, C, imm, R) \
5333  (__m512)__builtin_ia32_fixupimmps512_mask((__v16sf)(__m512)(A), \
5334  (__v16sf)(__m512)(B), \
5335  (__v16si)(__m512i)(C), (int)(imm), \
5336  (__mmask16)(U), (int)(R))
5337 
5338 #define _mm512_fixupimm_ps(A, B, C, imm) \
5339  (__m512)__builtin_ia32_fixupimmps512_mask((__v16sf)(__m512)(A), \
5340  (__v16sf)(__m512)(B), \
5341  (__v16si)(__m512i)(C), (int)(imm), \
5342  (__mmask16)-1, \
5343  _MM_FROUND_CUR_DIRECTION)
5344 
5345 #define _mm512_mask_fixupimm_ps(A, U, B, C, imm) \
5346  (__m512)__builtin_ia32_fixupimmps512_mask((__v16sf)(__m512)(A), \
5347  (__v16sf)(__m512)(B), \
5348  (__v16si)(__m512i)(C), (int)(imm), \
5349  (__mmask16)(U), \
5350  _MM_FROUND_CUR_DIRECTION)
5351 
5352 #define _mm512_maskz_fixupimm_round_ps(U, A, B, C, imm, R) \
5353  (__m512)__builtin_ia32_fixupimmps512_maskz((__v16sf)(__m512)(A), \
5354  (__v16sf)(__m512)(B), \
5355  (__v16si)(__m512i)(C), \
5356  (int)(imm), (__mmask16)(U), \
5357  (int)(R))
5358 
5359 #define _mm512_maskz_fixupimm_ps(U, A, B, C, imm) \
5360  (__m512)__builtin_ia32_fixupimmps512_maskz((__v16sf)(__m512)(A), \
5361  (__v16sf)(__m512)(B), \
5362  (__v16si)(__m512i)(C), \
5363  (int)(imm), (__mmask16)(U), \
5364  _MM_FROUND_CUR_DIRECTION)
5365 
5366 #define _mm_fixupimm_round_sd(A, B, C, imm, R) \
5367  (__m128d)__builtin_ia32_fixupimmsd_mask((__v2df)(__m128d)(A), \
5368  (__v2df)(__m128d)(B), \
5369  (__v2di)(__m128i)(C), (int)(imm), \
5370  (__mmask8)-1, (int)(R))
5371 
5372 #define _mm_mask_fixupimm_round_sd(A, U, B, C, imm, R) \
5373  (__m128d)__builtin_ia32_fixupimmsd_mask((__v2df)(__m128d)(A), \
5374  (__v2df)(__m128d)(B), \
5375  (__v2di)(__m128i)(C), (int)(imm), \
5376  (__mmask8)(U), (int)(R))
5377 
5378 #define _mm_fixupimm_sd(A, B, C, imm) \
5379  (__m128d)__builtin_ia32_fixupimmsd_mask((__v2df)(__m128d)(A), \
5380  (__v2df)(__m128d)(B), \
5381  (__v2di)(__m128i)(C), (int)(imm), \
5382  (__mmask8)-1, \
5383  _MM_FROUND_CUR_DIRECTION)
5384 
5385 #define _mm_mask_fixupimm_sd(A, U, B, C, imm) \
5386  (__m128d)__builtin_ia32_fixupimmsd_mask((__v2df)(__m128d)(A), \
5387  (__v2df)(__m128d)(B), \
5388  (__v2di)(__m128i)(C), (int)(imm), \
5389  (__mmask8)(U), \
5390  _MM_FROUND_CUR_DIRECTION)
5391 
5392 #define _mm_maskz_fixupimm_round_sd(U, A, B, C, imm, R) \
5393  (__m128d)__builtin_ia32_fixupimmsd_maskz((__v2df)(__m128d)(A), \
5394  (__v2df)(__m128d)(B), \
5395  (__v2di)(__m128i)(C), (int)(imm), \
5396  (__mmask8)(U), (int)(R))
5397 
5398 #define _mm_maskz_fixupimm_sd(U, A, B, C, imm) \
5399  (__m128d)__builtin_ia32_fixupimmsd_maskz((__v2df)(__m128d)(A), \
5400  (__v2df)(__m128d)(B), \
5401  (__v2di)(__m128i)(C), (int)(imm), \
5402  (__mmask8)(U), \
5403  _MM_FROUND_CUR_DIRECTION)
5404 
5405 #define _mm_fixupimm_round_ss(A, B, C, imm, R) \
5406  (__m128)__builtin_ia32_fixupimmss_mask((__v4sf)(__m128)(A), \
5407  (__v4sf)(__m128)(B), \
5408  (__v4si)(__m128i)(C), (int)(imm), \
5409  (__mmask8)-1, (int)(R))
5410 
5411 #define _mm_mask_fixupimm_round_ss(A, U, B, C, imm, R) \
5412  (__m128)__builtin_ia32_fixupimmss_mask((__v4sf)(__m128)(A), \
5413  (__v4sf)(__m128)(B), \
5414  (__v4si)(__m128i)(C), (int)(imm), \
5415  (__mmask8)(U), (int)(R))
5416 
5417 #define _mm_fixupimm_ss(A, B, C, imm) \
5418  (__m128)__builtin_ia32_fixupimmss_mask((__v4sf)(__m128)(A), \
5419  (__v4sf)(__m128)(B), \
5420  (__v4si)(__m128i)(C), (int)(imm), \
5421  (__mmask8)-1, \
5422  _MM_FROUND_CUR_DIRECTION)
5423 
5424 #define _mm_mask_fixupimm_ss(A, U, B, C, imm) \
5425  (__m128)__builtin_ia32_fixupimmss_mask((__v4sf)(__m128)(A), \
5426  (__v4sf)(__m128)(B), \
5427  (__v4si)(__m128i)(C), (int)(imm), \
5428  (__mmask8)(U), \
5429  _MM_FROUND_CUR_DIRECTION)
5430 
5431 #define _mm_maskz_fixupimm_round_ss(U, A, B, C, imm, R) \
5432  (__m128)__builtin_ia32_fixupimmss_maskz((__v4sf)(__m128)(A), \
5433  (__v4sf)(__m128)(B), \
5434  (__v4si)(__m128i)(C), (int)(imm), \
5435  (__mmask8)(U), (int)(R))
5436 
5437 #define _mm_maskz_fixupimm_ss(U, A, B, C, imm) \
5438  (__m128)__builtin_ia32_fixupimmss_maskz((__v4sf)(__m128)(A), \
5439  (__v4sf)(__m128)(B), \
5440  (__v4si)(__m128i)(C), (int)(imm), \
5441  (__mmask8)(U), \
5442  _MM_FROUND_CUR_DIRECTION)
5443 
5444 #define _mm_getexp_round_sd(A, B, R) \
5445  (__m128d)__builtin_ia32_getexpsd128_round_mask((__v2df)(__m128d)(A), \
5446  (__v2df)(__m128d)(B), \
5447  (__v2df)_mm_setzero_pd(), \
5448  (__mmask8)-1, (int)(R))
5449 
5450 
5451 static __inline__ __m128d __DEFAULT_FN_ATTRS128
5452 _mm_getexp_sd (__m128d __A, __m128d __B)
5453 {
5454  return (__m128d) __builtin_ia32_getexpsd128_round_mask ((__v2df) __A,
5455  (__v2df) __B, (__v2df) _mm_setzero_pd(), (__mmask8) -1, _MM_FROUND_CUR_DIRECTION);
5456 }
5457 
5458 static __inline__ __m128d __DEFAULT_FN_ATTRS128
5459 _mm_mask_getexp_sd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B)
5460 {
5461  return (__m128d) __builtin_ia32_getexpsd128_round_mask ( (__v2df) __A,
5462  (__v2df) __B,
5463  (__v2df) __W,
5464  (__mmask8) __U,
5466 }
5467 
5468 #define _mm_mask_getexp_round_sd(W, U, A, B, R) \
5469  (__m128d)__builtin_ia32_getexpsd128_round_mask((__v2df)(__m128d)(A), \
5470  (__v2df)(__m128d)(B), \
5471  (__v2df)(__m128d)(W), \
5472  (__mmask8)(U), (int)(R))
5473 
5474 static __inline__ __m128d __DEFAULT_FN_ATTRS128
5475 _mm_maskz_getexp_sd (__mmask8 __U, __m128d __A, __m128d __B)
5476 {
5477  return (__m128d) __builtin_ia32_getexpsd128_round_mask ( (__v2df) __A,
5478  (__v2df) __B,
5479  (__v2df) _mm_setzero_pd (),
5480  (__mmask8) __U,
5482 }
5483 
5484 #define _mm_maskz_getexp_round_sd(U, A, B, R) \
5485  (__m128d)__builtin_ia32_getexpsd128_round_mask((__v2df)(__m128d)(A), \
5486  (__v2df)(__m128d)(B), \
5487  (__v2df)_mm_setzero_pd(), \
5488  (__mmask8)(U), (int)(R))
5489 
5490 #define _mm_getexp_round_ss(A, B, R) \
5491  (__m128)__builtin_ia32_getexpss128_round_mask((__v4sf)(__m128)(A), \
5492  (__v4sf)(__m128)(B), \
5493  (__v4sf)_mm_setzero_ps(), \
5494  (__mmask8)-1, (int)(R))
5495 
5496 static __inline__ __m128 __DEFAULT_FN_ATTRS128
5497 _mm_getexp_ss (__m128 __A, __m128 __B)
5498 {
5499  return (__m128) __builtin_ia32_getexpss128_round_mask ((__v4sf) __A,
5500  (__v4sf) __B, (__v4sf) _mm_setzero_ps(), (__mmask8) -1, _MM_FROUND_CUR_DIRECTION);
5501 }
5502 
5503 static __inline__ __m128 __DEFAULT_FN_ATTRS128
5504 _mm_mask_getexp_ss (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B)
5505 {
5506  return (__m128) __builtin_ia32_getexpss128_round_mask ((__v4sf) __A,
5507  (__v4sf) __B,
5508  (__v4sf) __W,
5509  (__mmask8) __U,
5511 }
5512 
5513 #define _mm_mask_getexp_round_ss(W, U, A, B, R) \
5514  (__m128)__builtin_ia32_getexpss128_round_mask((__v4sf)(__m128)(A), \
5515  (__v4sf)(__m128)(B), \
5516  (__v4sf)(__m128)(W), \
5517  (__mmask8)(U), (int)(R))
5518 
5519 static __inline__ __m128 __DEFAULT_FN_ATTRS128
5520 _mm_maskz_getexp_ss (__mmask8 __U, __m128 __A, __m128 __B)
5521 {
5522  return (__m128) __builtin_ia32_getexpss128_round_mask ((__v4sf) __A,
5523  (__v4sf) __B,
5524  (__v4sf) _mm_setzero_ps (),
5525  (__mmask8) __U,
5527 }
5528 
5529 #define _mm_maskz_getexp_round_ss(U, A, B, R) \
5530  (__m128)__builtin_ia32_getexpss128_round_mask((__v4sf)(__m128)(A), \
5531  (__v4sf)(__m128)(B), \
5532  (__v4sf)_mm_setzero_ps(), \
5533  (__mmask8)(U), (int)(R))
5534 
5535 #define _mm_getmant_round_sd(A, B, C, D, R) \
5536  (__m128d)__builtin_ia32_getmantsd_round_mask((__v2df)(__m128d)(A), \
5537  (__v2df)(__m128d)(B), \
5538  (int)(((D)<<2) | (C)), \
5539  (__v2df)_mm_setzero_pd(), \
5540  (__mmask8)-1, (int)(R))
5541 
5542 #define _mm_getmant_sd(A, B, C, D) \
5543  (__m128d)__builtin_ia32_getmantsd_round_mask((__v2df)(__m128d)(A), \
5544  (__v2df)(__m128d)(B), \
5545  (int)(((D)<<2) | (C)), \
5546  (__v2df)_mm_setzero_pd(), \
5547  (__mmask8)-1, \
5548  _MM_FROUND_CUR_DIRECTION)
5549 
5550 #define _mm_mask_getmant_sd(W, U, A, B, C, D) \
5551  (__m128d)__builtin_ia32_getmantsd_round_mask((__v2df)(__m128d)(A), \
5552  (__v2df)(__m128d)(B), \
5553  (int)(((D)<<2) | (C)), \
5554  (__v2df)(__m128d)(W), \
5555  (__mmask8)(U), \
5556  _MM_FROUND_CUR_DIRECTION)
5557 
5558 #define _mm_mask_getmant_round_sd(W, U, A, B, C, D, R) \
5559  (__m128d)__builtin_ia32_getmantsd_round_mask((__v2df)(__m128d)(A), \
5560  (__v2df)(__m128d)(B), \
5561  (int)(((D)<<2) | (C)), \
5562  (__v2df)(__m128d)(W), \
5563  (__mmask8)(U), (int)(R))
5564 
5565 #define _mm_maskz_getmant_sd(U, A, B, C, D) \
5566  (__m128d)__builtin_ia32_getmantsd_round_mask((__v2df)(__m128d)(A), \
5567  (__v2df)(__m128d)(B), \
5568  (int)(((D)<<2) | (C)), \
5569  (__v2df)_mm_setzero_pd(), \
5570  (__mmask8)(U), \
5571  _MM_FROUND_CUR_DIRECTION)
5572 
5573 #define _mm_maskz_getmant_round_sd(U, A, B, C, D, R) \
5574  (__m128d)__builtin_ia32_getmantsd_round_mask((__v2df)(__m128d)(A), \
5575  (__v2df)(__m128d)(B), \
5576  (int)(((D)<<2) | (C)), \
5577  (__v2df)_mm_setzero_pd(), \
5578  (__mmask8)(U), (int)(R))
5579 
5580 #define _mm_getmant_round_ss(A, B, C, D, R) \
5581  (__m128)__builtin_ia32_getmantss_round_mask((__v4sf)(__m128)(A), \
5582  (__v4sf)(__m128)(B), \
5583  (int)(((D)<<2) | (C)), \
5584  (__v4sf)_mm_setzero_ps(), \
5585  (__mmask8)-1, (int)(R))
5586 
5587 #define _mm_getmant_ss(A, B, C, D) \
5588  (__m128)__builtin_ia32_getmantss_round_mask((__v4sf)(__m128)(A), \
5589  (__v4sf)(__m128)(B), \
5590  (int)(((D)<<2) | (C)), \
5591  (__v4sf)_mm_setzero_ps(), \
5592  (__mmask8)-1, \
5593  _MM_FROUND_CUR_DIRECTION)
5594 
5595 #define _mm_mask_getmant_ss(W, U, A, B, C, D) \
5596  (__m128)__builtin_ia32_getmantss_round_mask((__v4sf)(__m128)(A), \
5597  (__v4sf)(__m128)(B), \
5598  (int)(((D)<<2) | (C)), \
5599  (__v4sf)(__m128)(W), \
5600  (__mmask8)(U), \
5601  _MM_FROUND_CUR_DIRECTION)
5602 
5603 #define _mm_mask_getmant_round_ss(W, U, A, B, C, D, R) \
5604  (__m128)__builtin_ia32_getmantss_round_mask((__v4sf)(__m128)(A), \
5605  (__v4sf)(__m128)(B), \
5606  (int)(((D)<<2) | (C)), \
5607  (__v4sf)(__m128)(W), \
5608  (__mmask8)(U), (int)(R))
5609 
5610 #define _mm_maskz_getmant_ss(U, A, B, C, D) \
5611  (__m128)__builtin_ia32_getmantss_round_mask((__v4sf)(__m128)(A), \
5612  (__v4sf)(__m128)(B), \
5613  (int)(((D)<<2) | (C)), \
5614  (__v4sf)_mm_setzero_ps(), \
5615  (__mmask8)(U), \
5616  _MM_FROUND_CUR_DIRECTION)
5617 
5618 #define _mm_maskz_getmant_round_ss(U, A, B, C, D, R) \
5619  (__m128)__builtin_ia32_getmantss_round_mask((__v4sf)(__m128)(A), \
5620  (__v4sf)(__m128)(B), \
5621  (int)(((D)<<2) | (C)), \
5622  (__v4sf)_mm_setzero_ps(), \
5623  (__mmask8)(U), (int)(R))
5624 
5625 static __inline__ __mmask16 __DEFAULT_FN_ATTRS512
5626 _mm512_kmov (__mmask16 __A)
5627 {
5628  return __A;
5629 }
5630 
5631 #define _mm_comi_round_sd(A, B, P, R) \
5632  (int)__builtin_ia32_vcomisd((__v2df)(__m128d)(A), (__v2df)(__m128d)(B), \
5633  (int)(P), (int)(R))
5634 
5635 #define _mm_comi_round_ss(A, B, P, R) \
5636  (int)__builtin_ia32_vcomiss((__v4sf)(__m128)(A), (__v4sf)(__m128)(B), \
5637  (int)(P), (int)(R))
5638 
5639 #ifdef __x86_64__
5640 #define _mm_cvt_roundsd_si64(A, R) \
5641  (long long)__builtin_ia32_vcvtsd2si64((__v2df)(__m128d)(A), (int)(R))
5642 #endif
5643 
5644 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5645 _mm512_sll_epi32(__m512i __A, __m128i __B)
5646 {
5647  return (__m512i)__builtin_ia32_pslld512((__v16si) __A, (__v4si)__B);
5648 }
5649 
5650 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5651 _mm512_mask_sll_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m128i __B)
5652 {
5653  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
5654  (__v16si)_mm512_sll_epi32(__A, __B),
5655  (__v16si)__W);
5656 }
5657 
5658 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5659 _mm512_maskz_sll_epi32(__mmask16 __U, __m512i __A, __m128i __B)
5660 {
5661  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
5662  (__v16si)_mm512_sll_epi32(__A, __B),
5663  (__v16si)_mm512_setzero_si512());
5664 }
5665 
5666 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5667 _mm512_sll_epi64(__m512i __A, __m128i __B)
5668 {
5669  return (__m512i)__builtin_ia32_psllq512((__v8di)__A, (__v2di)__B);
5670 }
5671 
5672 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5673 _mm512_mask_sll_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m128i __B)
5674 {
5675  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
5676  (__v8di)_mm512_sll_epi64(__A, __B),
5677  (__v8di)__W);
5678 }
5679 
5680 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5681 _mm512_maskz_sll_epi64(__mmask8 __U, __m512i __A, __m128i __B)
5682 {
5683  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
5684  (__v8di)_mm512_sll_epi64(__A, __B),
5685  (__v8di)_mm512_setzero_si512());
5686 }
5687 
5688 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5689 _mm512_sllv_epi32(__m512i __X, __m512i __Y)
5690 {
5691  return (__m512i)__builtin_ia32_psllv16si((__v16si)__X, (__v16si)__Y);
5692 }
5693 
5694 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5695 _mm512_mask_sllv_epi32(__m512i __W, __mmask16 __U, __m512i __X, __m512i __Y)
5696 {
5697  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
5698  (__v16si)_mm512_sllv_epi32(__X, __Y),
5699  (__v16si)__W);
5700 }
5701 
5702 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5703 _mm512_maskz_sllv_epi32(__mmask16 __U, __m512i __X, __m512i __Y)
5704 {
5705  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
5706  (__v16si)_mm512_sllv_epi32(__X, __Y),
5707  (__v16si)_mm512_setzero_si512());
5708 }
5709 
5710 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5711 _mm512_sllv_epi64(__m512i __X, __m512i __Y)
5712 {
5713  return (__m512i)__builtin_ia32_psllv8di((__v8di)__X, (__v8di)__Y);
5714 }
5715 
5716 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5717 _mm512_mask_sllv_epi64(__m512i __W, __mmask8 __U, __m512i __X, __m512i __Y)
5718 {
5719  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
5720  (__v8di)_mm512_sllv_epi64(__X, __Y),
5721  (__v8di)__W);
5722 }
5723 
5724 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5725 _mm512_maskz_sllv_epi64(__mmask8 __U, __m512i __X, __m512i __Y)
5726 {
5727  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
5728  (__v8di)_mm512_sllv_epi64(__X, __Y),
5729  (__v8di)_mm512_setzero_si512());
5730 }
5731 
5732 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5733 _mm512_sra_epi32(__m512i __A, __m128i __B)
5734 {
5735  return (__m512i)__builtin_ia32_psrad512((__v16si) __A, (__v4si)__B);
5736 }
5737 
5738 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5739 _mm512_mask_sra_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m128i __B)
5740 {
5741  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
5742  (__v16si)_mm512_sra_epi32(__A, __B),
5743  (__v16si)__W);
5744 }
5745 
5746 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5747 _mm512_maskz_sra_epi32(__mmask16 __U, __m512i __A, __m128i __B)
5748 {
5749  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
5750  (__v16si)_mm512_sra_epi32(__A, __B),
5751  (__v16si)_mm512_setzero_si512());
5752 }
5753 
5754 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5755 _mm512_sra_epi64(__m512i __A, __m128i __B)
5756 {
5757  return (__m512i)__builtin_ia32_psraq512((__v8di)__A, (__v2di)__B);
5758 }
5759 
5760 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5761 _mm512_mask_sra_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m128i __B)
5762 {
5763  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
5764  (__v8di)_mm512_sra_epi64(__A, __B),
5765  (__v8di)__W);
5766 }
5767 
5768 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5769 _mm512_maskz_sra_epi64(__mmask8 __U, __m512i __A, __m128i __B)
5770 {
5771  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
5772  (__v8di)_mm512_sra_epi64(__A, __B),
5773  (__v8di)_mm512_setzero_si512());
5774 }
5775 
5776 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5777 _mm512_srav_epi32(__m512i __X, __m512i __Y)
5778 {
5779  return (__m512i)__builtin_ia32_psrav16si((__v16si)__X, (__v16si)__Y);
5780 }
5781 
5782 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5783 _mm512_mask_srav_epi32(__m512i __W, __mmask16 __U, __m512i __X, __m512i __Y)
5784 {
5785  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
5786  (__v16si)_mm512_srav_epi32(__X, __Y),
5787  (__v16si)__W);
5788 }
5789 
5790 static __inline__ __m512i __DEFAULT_FN_ATTRS512
5791 _mm512_maskz_srav_epi32(__mmask16 __U, __m512i __X, __m512i __Y)
5792 {
5793  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
5794  (__v16si)_mm512_srav_epi32(__X, __Y),
5795  (__v16si)_mm512_setzero_si512());
5796 }