clang 19.0.0git
PPC.cpp
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1//===--- PPC.cpp - Implement PPC target feature support -------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements PPC TargetInfo objects.
10//
11//===----------------------------------------------------------------------===//
12
13#include "PPC.h"
14#include "clang/Basic/Diagnostic.h"
15#include "clang/Basic/MacroBuilder.h"
16#include "clang/Basic/TargetBuiltins.h"
17
18using namespace clang;
19using namespace clang::targets;
20
21static constexpr Builtin::Info BuiltinInfo[] = {
22#define BUILTIN(ID, TYPE, ATTRS) \
23 {#ID, TYPE, ATTRS, nullptr, HeaderDesc::NO_HEADER, ALL_LANGUAGES},
24#define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) \
25 {#ID, TYPE, ATTRS, FEATURE, HeaderDesc::NO_HEADER, ALL_LANGUAGES},
26#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) \
27 {#ID, TYPE, ATTRS, nullptr, HeaderDesc::HEADER, ALL_LANGUAGES},
28#include "clang/Basic/BuiltinsPPC.def"
29};
30
31/// handleTargetFeatures - Perform initialization based on the user
32/// configured set of features.
33bool PPCTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
34 DiagnosticsEngine &Diags) {
35 FloatABI = HardFloat;
36 for (const auto &Feature : Features) {
37 if (Feature == "+altivec") {
38 HasAltivec = true;
39 } else if (Feature == "+vsx") {
40 HasVSX = true;
41 } else if (Feature == "+crbits") {
42 UseCRBits = true;
43 } else if (Feature == "+bpermd") {
44 HasBPERMD = true;
45 } else if (Feature == "+extdiv") {
46 HasExtDiv = true;
47 } else if (Feature == "+power8-vector") {
48 HasP8Vector = true;
49 } else if (Feature == "+crypto") {
50 HasP8Crypto = true;
51 } else if (Feature == "+direct-move") {
52 HasDirectMove = true;
53 } else if (Feature == "+htm") {
54 HasHTM = true;
55 } else if (Feature == "+float128") {
56 HasFloat128 = !getTriple().isOSAIX();
57 } else if (Feature == "+power9-vector") {
58 HasP9Vector = true;
59 } else if (Feature == "+power10-vector") {
60 HasP10Vector = true;
61 } else if (Feature == "+pcrelative-memops") {
62 HasPCRelativeMemops = true;
63 } else if (Feature == "+prefix-instrs") {
64 HasPrefixInstrs = true;
65 } else if (Feature == "+spe" || Feature == "+efpu2") {
66 HasStrictFP = false;
67 HasSPE = true;
68 LongDoubleWidth = LongDoubleAlign = 64;
69 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
70 } else if (Feature == "-hard-float") {
71 FloatABI = SoftFloat;
72 } else if (Feature == "+paired-vector-memops") {
73 PairedVectorMemops = true;
74 } else if (Feature == "+mma") {
75 HasMMA = true;
76 } else if (Feature == "+rop-protect") {
77 HasROPProtect = true;
78 } else if (Feature == "+privileged") {
79 HasPrivileged = true;
80 } else if (Feature == "+aix-small-local-exec-tls") {
81 HasAIXSmallLocalExecTLS = true;
82 } else if (Feature == "+aix-small-local-dynamic-tls") {
83 HasAIXSmallLocalDynamicTLS = true;
84 } else if (Feature == "+isa-v206-instructions") {
85 IsISA2_06 = true;
86 } else if (Feature == "+isa-v207-instructions") {
87 IsISA2_07 = true;
88 } else if (Feature == "+isa-v30-instructions") {
89 IsISA3_0 = true;
90 } else if (Feature == "+isa-v31-instructions") {
91 IsISA3_1 = true;
92 } else if (Feature == "+quadword-atomics") {
93 HasQuadwordAtomics = true;
94 }
95 // TODO: Finish this list and add an assert that we've handled them
96 // all.
97 }
98
99 return true;
100}
101
102static void defineXLCompatMacros(MacroBuilder &Builder) {
103 Builder.defineMacro("__popcntb", "__builtin_ppc_popcntb");
104 Builder.defineMacro("__poppar4", "__builtin_ppc_poppar4");
105 Builder.defineMacro("__poppar8", "__builtin_ppc_poppar8");
106 Builder.defineMacro("__eieio", "__builtin_ppc_eieio");
107 Builder.defineMacro("__iospace_eieio", "__builtin_ppc_iospace_eieio");
108 Builder.defineMacro("__isync", "__builtin_ppc_isync");
109 Builder.defineMacro("__lwsync", "__builtin_ppc_lwsync");
110 Builder.defineMacro("__iospace_lwsync", "__builtin_ppc_iospace_lwsync");
111 Builder.defineMacro("__sync", "__builtin_ppc_sync");
112 Builder.defineMacro("__iospace_sync", "__builtin_ppc_iospace_sync");
113 Builder.defineMacro("__dcbfl", "__builtin_ppc_dcbfl");
114 Builder.defineMacro("__dcbflp", "__builtin_ppc_dcbflp");
115 Builder.defineMacro("__dcbst", "__builtin_ppc_dcbst");
116 Builder.defineMacro("__dcbt", "__builtin_ppc_dcbt");
117 Builder.defineMacro("__dcbtst", "__builtin_ppc_dcbtst");
118 Builder.defineMacro("__dcbz", "__builtin_ppc_dcbz");
119 Builder.defineMacro("__icbt", "__builtin_ppc_icbt");
120 Builder.defineMacro("__compare_and_swap", "__builtin_ppc_compare_and_swap");
121 Builder.defineMacro("__compare_and_swaplp",
122 "__builtin_ppc_compare_and_swaplp");
123 Builder.defineMacro("__fetch_and_add", "__builtin_ppc_fetch_and_add");
124 Builder.defineMacro("__fetch_and_addlp", "__builtin_ppc_fetch_and_addlp");
125 Builder.defineMacro("__fetch_and_and", "__builtin_ppc_fetch_and_and");
126 Builder.defineMacro("__fetch_and_andlp", "__builtin_ppc_fetch_and_andlp");
127 Builder.defineMacro("__fetch_and_or", "__builtin_ppc_fetch_and_or");
128 Builder.defineMacro("__fetch_and_orlp", "__builtin_ppc_fetch_and_orlp");
129 Builder.defineMacro("__fetch_and_swap", "__builtin_ppc_fetch_and_swap");
130 Builder.defineMacro("__fetch_and_swaplp", "__builtin_ppc_fetch_and_swaplp");
131 Builder.defineMacro("__ldarx", "__builtin_ppc_ldarx");
132 Builder.defineMacro("__lwarx", "__builtin_ppc_lwarx");
133 Builder.defineMacro("__lharx", "__builtin_ppc_lharx");
134 Builder.defineMacro("__lbarx", "__builtin_ppc_lbarx");
135 Builder.defineMacro("__stfiw", "__builtin_ppc_stfiw");
136 Builder.defineMacro("__stdcx", "__builtin_ppc_stdcx");
137 Builder.defineMacro("__stwcx", "__builtin_ppc_stwcx");
138 Builder.defineMacro("__sthcx", "__builtin_ppc_sthcx");
139 Builder.defineMacro("__stbcx", "__builtin_ppc_stbcx");
140 Builder.defineMacro("__tdw", "__builtin_ppc_tdw");
141 Builder.defineMacro("__tw", "__builtin_ppc_tw");
142 Builder.defineMacro("__trap", "__builtin_ppc_trap");
143 Builder.defineMacro("__trapd", "__builtin_ppc_trapd");
144 Builder.defineMacro("__fcfid", "__builtin_ppc_fcfid");
145 Builder.defineMacro("__fcfud", "__builtin_ppc_fcfud");
146 Builder.defineMacro("__fctid", "__builtin_ppc_fctid");
147 Builder.defineMacro("__fctidz", "__builtin_ppc_fctidz");
148 Builder.defineMacro("__fctiw", "__builtin_ppc_fctiw");
149 Builder.defineMacro("__fctiwz", "__builtin_ppc_fctiwz");
150 Builder.defineMacro("__fctudz", "__builtin_ppc_fctudz");
151 Builder.defineMacro("__fctuwz", "__builtin_ppc_fctuwz");
152 Builder.defineMacro("__cmpeqb", "__builtin_ppc_cmpeqb");
153 Builder.defineMacro("__cmprb", "__builtin_ppc_cmprb");
154 Builder.defineMacro("__setb", "__builtin_ppc_setb");
155 Builder.defineMacro("__cmpb", "__builtin_ppc_cmpb");
156 Builder.defineMacro("__mulhd", "__builtin_ppc_mulhd");
157 Builder.defineMacro("__mulhdu", "__builtin_ppc_mulhdu");
158 Builder.defineMacro("__mulhw", "__builtin_ppc_mulhw");
159 Builder.defineMacro("__mulhwu", "__builtin_ppc_mulhwu");
160 Builder.defineMacro("__maddhd", "__builtin_ppc_maddhd");
161 Builder.defineMacro("__maddhdu", "__builtin_ppc_maddhdu");
162 Builder.defineMacro("__maddld", "__builtin_ppc_maddld");
163 Builder.defineMacro("__rlwnm", "__builtin_ppc_rlwnm");
164 Builder.defineMacro("__rlwimi", "__builtin_ppc_rlwimi");
165 Builder.defineMacro("__rldimi", "__builtin_ppc_rldimi");
166 Builder.defineMacro("__load2r", "__builtin_ppc_load2r");
167 Builder.defineMacro("__load4r", "__builtin_ppc_load4r");
168 Builder.defineMacro("__load8r", "__builtin_ppc_load8r");
169 Builder.defineMacro("__store2r", "__builtin_ppc_store2r");
170 Builder.defineMacro("__store4r", "__builtin_ppc_store4r");
171 Builder.defineMacro("__store8r", "__builtin_ppc_store8r");
172 Builder.defineMacro("__extract_exp", "__builtin_ppc_extract_exp");
173 Builder.defineMacro("__extract_sig", "__builtin_ppc_extract_sig");
174 Builder.defineMacro("__mtfsb0", "__builtin_ppc_mtfsb0");
175 Builder.defineMacro("__mtfsb1", "__builtin_ppc_mtfsb1");
176 Builder.defineMacro("__mtfsf", "__builtin_ppc_mtfsf");
177 Builder.defineMacro("__mtfsfi", "__builtin_ppc_mtfsfi");
178 Builder.defineMacro("__insert_exp", "__builtin_ppc_insert_exp");
179 Builder.defineMacro("__fmsub", "__builtin_ppc_fmsub");
180 Builder.defineMacro("__fmsubs", "__builtin_ppc_fmsubs");
181 Builder.defineMacro("__fnmadd", "__builtin_ppc_fnmadd");
182 Builder.defineMacro("__fnmadds", "__builtin_ppc_fnmadds");
183 Builder.defineMacro("__fnmsub", "__builtin_ppc_fnmsub");
184 Builder.defineMacro("__fnmsubs", "__builtin_ppc_fnmsubs");
185 Builder.defineMacro("__fre", "__builtin_ppc_fre");
186 Builder.defineMacro("__fres", "__builtin_ppc_fres");
187 Builder.defineMacro("__swdiv_nochk", "__builtin_ppc_swdiv_nochk");
188 Builder.defineMacro("__swdivs_nochk", "__builtin_ppc_swdivs_nochk");
189 Builder.defineMacro("__alloca", "__builtin_alloca");
190 Builder.defineMacro("__vcipher", "__builtin_altivec_crypto_vcipher");
191 Builder.defineMacro("__vcipherlast", "__builtin_altivec_crypto_vcipherlast");
192 Builder.defineMacro("__vncipher", "__builtin_altivec_crypto_vncipher");
193 Builder.defineMacro("__vncipherlast",
194 "__builtin_altivec_crypto_vncipherlast");
195 Builder.defineMacro("__vpermxor", "__builtin_altivec_crypto_vpermxor");
196 Builder.defineMacro("__vpmsumb", "__builtin_altivec_crypto_vpmsumb");
197 Builder.defineMacro("__vpmsumd", "__builtin_altivec_crypto_vpmsumd");
198 Builder.defineMacro("__vpmsumh", "__builtin_altivec_crypto_vpmsumh");
199 Builder.defineMacro("__vpmsumw", "__builtin_altivec_crypto_vpmsumw");
200 Builder.defineMacro("__divde", "__builtin_divde");
201 Builder.defineMacro("__divwe", "__builtin_divwe");
202 Builder.defineMacro("__divdeu", "__builtin_divdeu");
203 Builder.defineMacro("__divweu", "__builtin_divweu");
204 Builder.defineMacro("__alignx", "__builtin_ppc_alignx");
205 Builder.defineMacro("__bcopy", "bcopy");
206 Builder.defineMacro("__bpermd", "__builtin_bpermd");
207 Builder.defineMacro("__cntlz4", "__builtin_clz");
208 Builder.defineMacro("__cntlz8", "__builtin_clzll");
209 Builder.defineMacro("__cmplx", "__builtin_complex");
210 Builder.defineMacro("__cmplxf", "__builtin_complex");
211 Builder.defineMacro("__cnttz4", "__builtin_ctz");
212 Builder.defineMacro("__cnttz8", "__builtin_ctzll");
213 Builder.defineMacro("__darn", "__builtin_darn");
214 Builder.defineMacro("__darn_32", "__builtin_darn_32");
215 Builder.defineMacro("__darn_raw", "__builtin_darn_raw");
216 Builder.defineMacro("__dcbf", "__builtin_dcbf");
217 Builder.defineMacro("__fence", "__builtin_ppc_fence");
218 Builder.defineMacro("__fmadd", "__builtin_fma");
219 Builder.defineMacro("__fmadds", "__builtin_fmaf");
220 Builder.defineMacro("__abs", "__builtin_abs");
221 Builder.defineMacro("__labs", "__builtin_labs");
222 Builder.defineMacro("__llabs", "__builtin_llabs");
223 Builder.defineMacro("__popcnt4", "__builtin_popcount");
224 Builder.defineMacro("__popcnt8", "__builtin_popcountll");
225 Builder.defineMacro("__readflm", "__builtin_readflm");
226 Builder.defineMacro("__rotatel4", "__builtin_rotateleft32");
227 Builder.defineMacro("__rotatel8", "__builtin_rotateleft64");
228 Builder.defineMacro("__rdlam", "__builtin_ppc_rdlam");
229 Builder.defineMacro("__setflm", "__builtin_setflm");
230 Builder.defineMacro("__setrnd", "__builtin_setrnd");
231 Builder.defineMacro("__dcbtstt", "__builtin_ppc_dcbtstt");
232 Builder.defineMacro("__dcbtt", "__builtin_ppc_dcbtt");
233 Builder.defineMacro("__mftbu", "__builtin_ppc_mftbu");
234 Builder.defineMacro("__mfmsr", "__builtin_ppc_mfmsr");
235 Builder.defineMacro("__mtmsr", "__builtin_ppc_mtmsr");
236 Builder.defineMacro("__mfspr", "__builtin_ppc_mfspr");
237 Builder.defineMacro("__mtspr", "__builtin_ppc_mtspr");
238 Builder.defineMacro("__fric", "__builtin_ppc_fric");
239 Builder.defineMacro("__frim", "__builtin_ppc_frim");
240 Builder.defineMacro("__frims", "__builtin_ppc_frims");
241 Builder.defineMacro("__frin", "__builtin_ppc_frin");
242 Builder.defineMacro("__frins", "__builtin_ppc_frins");
243 Builder.defineMacro("__frip", "__builtin_ppc_frip");
244 Builder.defineMacro("__frips", "__builtin_ppc_frips");
245 Builder.defineMacro("__friz", "__builtin_ppc_friz");
246 Builder.defineMacro("__frizs", "__builtin_ppc_frizs");
247 Builder.defineMacro("__fsel", "__builtin_ppc_fsel");
248 Builder.defineMacro("__fsels", "__builtin_ppc_fsels");
249 Builder.defineMacro("__frsqrte", "__builtin_ppc_frsqrte");
250 Builder.defineMacro("__frsqrtes", "__builtin_ppc_frsqrtes");
251 Builder.defineMacro("__fsqrt", "__builtin_ppc_fsqrt");
252 Builder.defineMacro("__fsqrts", "__builtin_ppc_fsqrts");
253 Builder.defineMacro("__addex", "__builtin_ppc_addex");
254 Builder.defineMacro("__cmplxl", "__builtin_complex");
255 Builder.defineMacro("__compare_exp_uo", "__builtin_ppc_compare_exp_uo");
256 Builder.defineMacro("__compare_exp_lt", "__builtin_ppc_compare_exp_lt");
257 Builder.defineMacro("__compare_exp_gt", "__builtin_ppc_compare_exp_gt");
258 Builder.defineMacro("__compare_exp_eq", "__builtin_ppc_compare_exp_eq");
259 Builder.defineMacro("__test_data_class", "__builtin_ppc_test_data_class");
260 Builder.defineMacro("__swdiv", "__builtin_ppc_swdiv");
261 Builder.defineMacro("__swdivs", "__builtin_ppc_swdivs");
262 Builder.defineMacro("__fnabs", "__builtin_ppc_fnabs");
263 Builder.defineMacro("__fnabss", "__builtin_ppc_fnabss");
264 Builder.defineMacro("__builtin_maxfe", "__builtin_ppc_maxfe");
265 Builder.defineMacro("__builtin_maxfl", "__builtin_ppc_maxfl");
266 Builder.defineMacro("__builtin_maxfs", "__builtin_ppc_maxfs");
267 Builder.defineMacro("__builtin_minfe", "__builtin_ppc_minfe");
268 Builder.defineMacro("__builtin_minfl", "__builtin_ppc_minfl");
269 Builder.defineMacro("__builtin_minfs", "__builtin_ppc_minfs");
270 Builder.defineMacro("__builtin_mffs", "__builtin_ppc_mffs");
271 Builder.defineMacro("__builtin_mffsl", "__builtin_ppc_mffsl");
272 Builder.defineMacro("__builtin_mtfsf", "__builtin_ppc_mtfsf");
273 Builder.defineMacro("__builtin_set_fpscr_rn", "__builtin_ppc_set_fpscr_rn");
274}
275
276/// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
277/// #defines that are not tied to a specific subtarget.
278void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
279 MacroBuilder &Builder) const {
280
281 // We define the XLC compatibility macros only on AIX and Linux since XLC
282 // was never available on any other platforms.
283 if (getTriple().isOSAIX() || getTriple().isOSLinux())
284 defineXLCompatMacros(Builder);
285
286 // Target identification.
287 Builder.defineMacro("__ppc__");
288 Builder.defineMacro("__PPC__");
289 Builder.defineMacro("_ARCH_PPC");
290 Builder.defineMacro("__powerpc__");
291 Builder.defineMacro("__POWERPC__");
292 if (PointerWidth == 64) {
293 Builder.defineMacro("_ARCH_PPC64");
294 Builder.defineMacro("__powerpc64__");
295 Builder.defineMacro("__PPC64__");
296 } else if (getTriple().isOSAIX()) {
297 // The XL compilers on AIX define _ARCH_PPC64 for both 32 and 64-bit modes.
298 Builder.defineMacro("_ARCH_PPC64");
299 }
300 if (getTriple().isOSAIX()) {
301 Builder.defineMacro("__THW_PPC__");
302 // Define __PPC and __powerpc for AIX XL C/C++ compatibility
303 Builder.defineMacro("__PPC");
304 Builder.defineMacro("__powerpc");
305 }
306
307 // Target properties.
308 if (getTriple().getArch() == llvm::Triple::ppc64le ||
309 getTriple().getArch() == llvm::Triple::ppcle) {
310 Builder.defineMacro("_LITTLE_ENDIAN");
311 } else {
312 if (!getTriple().isOSNetBSD() &&
313 !getTriple().isOSOpenBSD())
314 Builder.defineMacro("_BIG_ENDIAN");
315 }
316
317 // ABI options.
318 if (ABI == "elfv1")
319 Builder.defineMacro("_CALL_ELF", "1");
320 if (ABI == "elfv2")
321 Builder.defineMacro("_CALL_ELF", "2");
322
323 // This typically is only for a new enough linker (bfd >= 2.16.2 or gold), but
324 // our support post-dates this and it should work on all 64-bit ppc linux
325 // platforms. It is guaranteed to work on all elfv2 platforms.
326 if (getTriple().getOS() == llvm::Triple::Linux && PointerWidth == 64)
327 Builder.defineMacro("_CALL_LINUX", "1");
328
329 // Subtarget options.
330 if (!getTriple().isOSAIX()){
331 Builder.defineMacro("__NATURAL_ALIGNMENT__");
332 }
333 Builder.defineMacro("__REGISTER_PREFIX__", "");
334
335 // FIXME: Should be controlled by command line option.
336 if (LongDoubleWidth == 128) {
337 Builder.defineMacro("__LONG_DOUBLE_128__");
338 Builder.defineMacro("__LONGDOUBLE128");
339 if (Opts.PPCIEEELongDouble)
340 Builder.defineMacro("__LONG_DOUBLE_IEEE128__");
341 else
342 Builder.defineMacro("__LONG_DOUBLE_IBM128__");
343 }
344
345 if (getTriple().isOSAIX() && Opts.LongDoubleSize == 64) {
346 assert(LongDoubleWidth == 64);
347 Builder.defineMacro("__LONGDOUBLE64");
348 }
349
350 // Define this for elfv2 (64-bit only).
351 if (ABI == "elfv2")
352 Builder.defineMacro("__STRUCT_PARM_ALIGN__", "16");
353
354 if (ArchDefs & ArchDefineName)
355 Builder.defineMacro(Twine("_ARCH_", StringRef(CPU).upper()));
356 if (ArchDefs & ArchDefinePpcgr)
357 Builder.defineMacro("_ARCH_PPCGR");
358 if (ArchDefs & ArchDefinePpcsq)
359 Builder.defineMacro("_ARCH_PPCSQ");
360 if (ArchDefs & ArchDefine440)
361 Builder.defineMacro("_ARCH_440");
362 if (ArchDefs & ArchDefine603)
363 Builder.defineMacro("_ARCH_603");
364 if (ArchDefs & ArchDefine604)
365 Builder.defineMacro("_ARCH_604");
366 if (ArchDefs & ArchDefinePwr4)
367 Builder.defineMacro("_ARCH_PWR4");
368 if (ArchDefs & ArchDefinePwr5)
369 Builder.defineMacro("_ARCH_PWR5");
370 if (ArchDefs & ArchDefinePwr5x)
371 Builder.defineMacro("_ARCH_PWR5X");
372 if (ArchDefs & ArchDefinePwr6)
373 Builder.defineMacro("_ARCH_PWR6");
374 if (ArchDefs & ArchDefinePwr6x)
375 Builder.defineMacro("_ARCH_PWR6X");
376 if (ArchDefs & ArchDefinePwr7)
377 Builder.defineMacro("_ARCH_PWR7");
378 if (ArchDefs & ArchDefinePwr8)
379 Builder.defineMacro("_ARCH_PWR8");
380 if (ArchDefs & ArchDefinePwr9)
381 Builder.defineMacro("_ARCH_PWR9");
382 if (ArchDefs & ArchDefinePwr10)
383 Builder.defineMacro("_ARCH_PWR10");
384 if (ArchDefs & ArchDefineA2)
385 Builder.defineMacro("_ARCH_A2");
386 if (ArchDefs & ArchDefineE500)
387 Builder.defineMacro("__NO_LWSYNC__");
388 if (ArchDefs & ArchDefineFuture)
389 Builder.defineMacro("_ARCH_PWR_FUTURE");
390
391 if (HasAltivec) {
392 Builder.defineMacro("__VEC__", "10206");
393 Builder.defineMacro("__ALTIVEC__");
394 }
395 if (HasSPE) {
396 Builder.defineMacro("__SPE__");
397 Builder.defineMacro("__NO_FPRS__");
398 }
399 if (HasVSX)
400 Builder.defineMacro("__VSX__");
401 if (HasP8Vector)
402 Builder.defineMacro("__POWER8_VECTOR__");
403 if (HasP8Crypto)
404 Builder.defineMacro("__CRYPTO__");
405 if (HasHTM)
406 Builder.defineMacro("__HTM__");
407 if (HasFloat128)
408 Builder.defineMacro("__FLOAT128__");
409 if (HasP9Vector)
410 Builder.defineMacro("__POWER9_VECTOR__");
411 if (HasMMA)
412 Builder.defineMacro("__MMA__");
413 if (HasROPProtect)
414 Builder.defineMacro("__ROP_PROTECT__");
415 if (HasP10Vector)
416 Builder.defineMacro("__POWER10_VECTOR__");
417 if (HasPCRelativeMemops)
418 Builder.defineMacro("__PCREL__");
419
420 Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
421 Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
422 Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
423 if (PointerWidth == 64)
424 Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
425
426 // We have support for the bswap intrinsics so we can define this.
427 Builder.defineMacro("__HAVE_BSWAP__", "1");
428
429 // FIXME: The following are not yet generated here by Clang, but are
430 // generated by GCC:
431 //
432 // _SOFT_FLOAT_
433 // __RECIP_PRECISION__
434 // __APPLE_ALTIVEC__
435 // __RECIP__
436 // __RECIPF__
437 // __RSQRTE__
438 // __RSQRTEF__
439 // _SOFT_DOUBLE_
440 // __NO_LWSYNC__
441 // __CMODEL_MEDIUM__
442 // __CMODEL_LARGE__
443 // _CALL_SYSV
444 // _CALL_DARWIN
445}
446
447// Handle explicit options being passed to the compiler here:
448// - if we've explicitly turned off vsx and turned on any of:
449// - power8-vector
450// - direct-move
451// - float128
452// - power9-vector
453// - paired-vector-memops
454// - mma
455// - power10-vector
456// - if we've explicitly turned on vsx and turned off altivec.
457// - if we've explicitly turned off hard-float and turned on altivec.
458// then go ahead and error since the customer has expressed an incompatible
459// set of options.
460static bool ppcUserFeaturesCheck(DiagnosticsEngine &Diags,
461 const std::vector<std::string> &FeaturesVec) {
462 // Cannot allow soft-float with Altivec.
463 if (llvm::is_contained(FeaturesVec, "-hard-float") &&
464 llvm::is_contained(FeaturesVec, "+altivec")) {
465 Diags.Report(diag::err_opt_not_valid_with_opt) << "-msoft-float"
466 << "-maltivec";
467 return false;
468 }
469
470 // Cannot allow soft-float with VSX.
471 if (llvm::is_contained(FeaturesVec, "-hard-float") &&
472 llvm::is_contained(FeaturesVec, "+vsx")) {
473 Diags.Report(diag::err_opt_not_valid_with_opt) << "-msoft-float"
474 << "-mvsx";
475 return false;
476 }
477
478 // Cannot allow VSX with no Altivec.
479 if (llvm::is_contained(FeaturesVec, "+vsx") &&
480 llvm::is_contained(FeaturesVec, "-altivec")) {
481 Diags.Report(diag::err_opt_not_valid_with_opt) << "-mvsx"
482 << "-mno-altivec";
483 return false;
484 }
485
486 // vsx was not explicitly turned off.
487 if (!llvm::is_contained(FeaturesVec, "-vsx"))
488 return true;
489
490 auto FindVSXSubfeature = [&](StringRef Feature, StringRef Option) {
491 if (llvm::is_contained(FeaturesVec, Feature)) {
492 Diags.Report(diag::err_opt_not_valid_with_opt) << Option << "-mno-vsx";
493 return true;
494 }
495 return false;
496 };
497
498 bool Found = FindVSXSubfeature("+power8-vector", "-mpower8-vector");
499 Found |= FindVSXSubfeature("+direct-move", "-mdirect-move");
500 Found |= FindVSXSubfeature("+float128", "-mfloat128");
501 Found |= FindVSXSubfeature("+power9-vector", "-mpower9-vector");
502 Found |= FindVSXSubfeature("+paired-vector-memops", "-mpaired-vector-memops");
503 Found |= FindVSXSubfeature("+mma", "-mmma");
504 Found |= FindVSXSubfeature("+power10-vector", "-mpower10-vector");
505
506 // Return false if any vsx subfeatures was found.
507 return !Found;
508}
509
510bool PPCTargetInfo::initFeatureMap(
511 llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, StringRef CPU,
512 const std::vector<std::string> &FeaturesVec) const {
513 Features["altivec"] = llvm::StringSwitch<bool>(CPU)
514 .Case("7400", true)
515 .Case("g4", true)
516 .Case("7450", true)
517 .Case("g4+", true)
518 .Case("970", true)
519 .Case("g5", true)
520 .Case("pwr6", true)
521 .Case("pwr7", true)
522 .Case("pwr8", true)
523 .Case("pwr9", true)
524 .Case("ppc64", true)
525 .Case("ppc64le", true)
526 .Default(false);
527
528 Features["power9-vector"] = (CPU == "pwr9");
529 Features["crypto"] = llvm::StringSwitch<bool>(CPU)
530 .Case("ppc64le", true)
531 .Case("pwr9", true)
532 .Case("pwr8", true)
533 .Default(false);
534 Features["power8-vector"] = llvm::StringSwitch<bool>(CPU)
535 .Case("ppc64le", true)
536 .Case("pwr9", true)
537 .Case("pwr8", true)
538 .Default(false);
539 Features["bpermd"] = llvm::StringSwitch<bool>(CPU)
540 .Case("ppc64le", true)
541 .Case("pwr9", true)
542 .Case("pwr8", true)
543 .Case("pwr7", true)
544 .Default(false);
545 Features["extdiv"] = llvm::StringSwitch<bool>(CPU)
546 .Case("ppc64le", true)
547 .Case("pwr9", true)
548 .Case("pwr8", true)
549 .Case("pwr7", true)
550 .Default(false);
551 Features["direct-move"] = llvm::StringSwitch<bool>(CPU)
552 .Case("ppc64le", true)
553 .Case("pwr9", true)
554 .Case("pwr8", true)
555 .Default(false);
556 Features["crbits"] = llvm::StringSwitch<bool>(CPU)
557 .Case("ppc64le", true)
558 .Case("pwr9", true)
559 .Case("pwr8", true)
560 .Default(false);
561 Features["vsx"] = llvm::StringSwitch<bool>(CPU)
562 .Case("ppc64le", true)
563 .Case("pwr9", true)
564 .Case("pwr8", true)
565 .Case("pwr7", true)
566 .Default(false);
567 Features["htm"] = llvm::StringSwitch<bool>(CPU)
568 .Case("ppc64le", true)
569 .Case("pwr9", true)
570 .Case("pwr8", true)
571 .Default(false);
572
573 // ROP Protect is off by default.
574 Features["rop-protect"] = false;
575 // Privileged instructions are off by default.
576 Features["privileged"] = false;
577
578 // The code generated by the -maix-small-local-[exec|dynamic]-tls option is
579 // turned off by default.
580 Features["aix-small-local-exec-tls"] = false;
581 Features["aix-small-local-dynamic-tls"] = false;
582
583 Features["spe"] = llvm::StringSwitch<bool>(CPU)
584 .Case("8548", true)
585 .Case("e500", true)
586 .Default(false);
587
588 Features["isa-v206-instructions"] = llvm::StringSwitch<bool>(CPU)
589 .Case("ppc64le", true)
590 .Case("pwr9", true)
591 .Case("pwr8", true)
592 .Case("pwr7", true)
593 .Case("a2", true)
594 .Default(false);
595
596 Features["isa-v207-instructions"] = llvm::StringSwitch<bool>(CPU)
597 .Case("ppc64le", true)
598 .Case("pwr9", true)
599 .Case("pwr8", true)
600 .Default(false);
601
602 Features["isa-v30-instructions"] =
603 llvm::StringSwitch<bool>(CPU).Case("pwr9", true).Default(false);
604
605 Features["quadword-atomics"] =
606 getTriple().isArch64Bit() && llvm::StringSwitch<bool>(CPU)
607 .Case("pwr9", true)
608 .Case("pwr8", true)
609 .Default(false);
610
611 // Power10 includes all the same features as Power9 plus any features specific
612 // to the Power10 core.
613 if (CPU == "pwr10" || CPU == "power10") {
614 initFeatureMap(Features, Diags, "pwr9", FeaturesVec);
615 addP10SpecificFeatures(Features);
616 }
617
618 // Future CPU should include all of the features of Power 10 as well as any
619 // additional features (yet to be determined) specific to it.
620 if (CPU == "future") {
621 initFeatureMap(Features, Diags, "pwr10", FeaturesVec);
622 addFutureSpecificFeatures(Features);
623 }
624
625 if (!ppcUserFeaturesCheck(Diags, FeaturesVec))
626 return false;
627
628 if (!(ArchDefs & ArchDefinePwr7) && (ArchDefs & ArchDefinePpcgr) &&
629 llvm::is_contained(FeaturesVec, "+float128")) {
630 // We have __float128 on PPC but not pre-VSX targets.
631 Diags.Report(diag::err_opt_not_valid_with_opt) << "-mfloat128" << CPU;
632 return false;
633 }
634
635 if (!(ArchDefs & ArchDefinePwr10)) {
636 if (llvm::is_contained(FeaturesVec, "+mma")) {
637 // MMA operations are not available pre-Power10.
638 Diags.Report(diag::err_opt_not_valid_with_opt) << "-mmma" << CPU;
639 return false;
640 }
641 if (llvm::is_contained(FeaturesVec, "+pcrel")) {
642 // PC-Relative instructions are not available pre-Power10,
643 // and these instructions also require prefixed instructions support.
644 Diags.Report(diag::err_opt_not_valid_without_opt)
645 << "-mpcrel"
646 << "-mcpu=pwr10 -mprefixed";
647 return false;
648 }
649 if (llvm::is_contained(FeaturesVec, "+prefixed")) {
650 // Prefixed instructions are not available pre-Power10.
651 Diags.Report(diag::err_opt_not_valid_without_opt) << "-mprefixed"
652 << "-mcpu=pwr10";
653 return false;
654 }
655 if (llvm::is_contained(FeaturesVec, "+paired-vector-memops")) {
656 // Paired vector memops are not available pre-Power10.
657 Diags.Report(diag::err_opt_not_valid_without_opt)
658 << "-mpaired-vector-memops"
659 << "-mcpu=pwr10";
660 return false;
661 }
662 }
663
664 if (!(ArchDefs & ArchDefinePwr8) &&
665 llvm::is_contained(FeaturesVec, "+rop-protect")) {
666 // We can turn on ROP Protect on Power 8 and above.
667 Diags.Report(diag::err_opt_not_valid_with_opt) << "-mrop-protect" << CPU;
668 return false;
669 }
670
671 if (!(ArchDefs & ArchDefinePwr8) &&
672 llvm::is_contained(FeaturesVec, "+privileged")) {
673 Diags.Report(diag::err_opt_not_valid_with_opt) << "-mprivileged" << CPU;
674 return false;
675 }
676
677 return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
678}
679
680// Add any Power10 specific features.
681void PPCTargetInfo::addP10SpecificFeatures(
682 llvm::StringMap<bool> &Features) const {
683 Features["htm"] = false; // HTM was removed for P10.
684 Features["paired-vector-memops"] = true;
685 Features["mma"] = true;
686 Features["power10-vector"] = true;
687 Features["pcrelative-memops"] = true;
688 Features["prefix-instrs"] = true;
689 Features["isa-v31-instructions"] = true;
690}
691
692// Add features specific to the "Future" CPU.
693void PPCTargetInfo::addFutureSpecificFeatures(
694 llvm::StringMap<bool> &Features) const {}
695
696bool PPCTargetInfo::hasFeature(StringRef Feature) const {
697 return llvm::StringSwitch<bool>(Feature)
698 .Case("powerpc", true)
699 .Case("altivec", HasAltivec)
700 .Case("vsx", HasVSX)
701 .Case("crbits", UseCRBits)
702 .Case("power8-vector", HasP8Vector)
703 .Case("crypto", HasP8Crypto)
704 .Case("direct-move", HasDirectMove)
705 .Case("htm", HasHTM)
706 .Case("bpermd", HasBPERMD)
707 .Case("extdiv", HasExtDiv)
708 .Case("float128", HasFloat128)
709 .Case("power9-vector", HasP9Vector)
710 .Case("paired-vector-memops", PairedVectorMemops)
711 .Case("power10-vector", HasP10Vector)
712 .Case("pcrelative-memops", HasPCRelativeMemops)
713 .Case("prefix-instrs", HasPrefixInstrs)
714 .Case("spe", HasSPE)
715 .Case("mma", HasMMA)
716 .Case("rop-protect", HasROPProtect)
717 .Case("privileged", HasPrivileged)
718 .Case("aix-small-local-exec-tls", HasAIXSmallLocalExecTLS)
719 .Case("aix-small-local-dynamic-tls", HasAIXSmallLocalDynamicTLS)
720 .Case("isa-v206-instructions", IsISA2_06)
721 .Case("isa-v207-instructions", IsISA2_07)
722 .Case("isa-v30-instructions", IsISA3_0)
723 .Case("isa-v31-instructions", IsISA3_1)
724 .Case("quadword-atomics", HasQuadwordAtomics)
725 .Default(false);
726}
727
728void PPCTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
729 StringRef Name, bool Enabled) const {
730 if (Enabled) {
731 if (Name == "efpu2")
732 Features["spe"] = true;
733 // If we're enabling any of the vsx based features then enable vsx and
734 // altivec. We'll diagnose any problems later.
735 bool FeatureHasVSX = llvm::StringSwitch<bool>(Name)
736 .Case("vsx", true)
737 .Case("direct-move", true)
738 .Case("power8-vector", true)
739 .Case("power9-vector", true)
740 .Case("paired-vector-memops", true)
741 .Case("power10-vector", true)
742 .Case("float128", true)
743 .Case("mma", true)
744 .Default(false);
745 if (FeatureHasVSX)
746 Features["vsx"] = Features["altivec"] = true;
747 if (Name == "power9-vector")
748 Features["power8-vector"] = true;
749 else if (Name == "power10-vector")
750 Features["power8-vector"] = Features["power9-vector"] = true;
751 if (Name == "pcrel")
752 Features["pcrelative-memops"] = true;
753 else if (Name == "prefixed")
754 Features["prefix-instrs"] = true;
755 else
756 Features[Name] = true;
757 } else {
758 if (Name == "spe")
759 Features["efpu2"] = false;
760 // If we're disabling altivec or vsx go ahead and disable all of the vsx
761 // features.
762 if ((Name == "altivec") || (Name == "vsx"))
763 Features["vsx"] = Features["direct-move"] = Features["power8-vector"] =
764 Features["float128"] = Features["power9-vector"] =
765 Features["paired-vector-memops"] = Features["mma"] =
766 Features["power10-vector"] = false;
767 if (Name == "power8-vector")
768 Features["power9-vector"] = Features["paired-vector-memops"] =
769 Features["mma"] = Features["power10-vector"] = false;
770 else if (Name == "power9-vector")
771 Features["paired-vector-memops"] = Features["mma"] =
772 Features["power10-vector"] = false;
773 if (Name == "pcrel")
774 Features["pcrelative-memops"] = false;
775 else if (Name == "prefixed")
776 Features["prefix-instrs"] = false;
777 else
778 Features[Name] = false;
779 }
780}
781
782// Make sure that registers are added in the correct array index which should be
783// the DWARF number for PPC registers.
784const char *const PPCTargetInfo::GCCRegNames[] = {
785 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8",
786 "r9", "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17",
787 "r18", "r19", "r20", "r21", "r22", "r23", "r24", "r25", "r26",
788 "r27", "r28", "r29", "r30", "r31", "f0", "f1", "f2", "f3",
789 "f4", "f5", "f6", "f7", "f8", "f9", "f10", "f11", "f12",
790 "f13", "f14", "f15", "f16", "f17", "f18", "f19", "f20", "f21",
791 "f22", "f23", "f24", "f25", "f26", "f27", "f28", "f29", "f30",
792 "f31", "mq", "lr", "ctr", "ap", "cr0", "cr1", "cr2", "cr3",
793 "cr4", "cr5", "cr6", "cr7", "xer", "v0", "v1", "v2", "v3",
794 "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12",
795 "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21",
796 "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30",
797 "v31", "vrsave", "vscr", "spe_acc", "spefscr", "sfp"
798};
799
800ArrayRef<const char *> PPCTargetInfo::getGCCRegNames() const {
801 return llvm::ArrayRef(GCCRegNames);
802}
803
804const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
805 // While some of these aliases do map to different registers
806 // they still share the same register name.
807 {{"0"}, "r0"}, {{"1", "sp"}, "r1"}, {{"2"}, "r2"},
808 {{"3"}, "r3"}, {{"4"}, "r4"}, {{"5"}, "r5"},
809 {{"6"}, "r6"}, {{"7"}, "r7"}, {{"8"}, "r8"},
810 {{"9"}, "r9"}, {{"10"}, "r10"}, {{"11"}, "r11"},
811 {{"12"}, "r12"}, {{"13"}, "r13"}, {{"14"}, "r14"},
812 {{"15"}, "r15"}, {{"16"}, "r16"}, {{"17"}, "r17"},
813 {{"18"}, "r18"}, {{"19"}, "r19"}, {{"20"}, "r20"},
814 {{"21"}, "r21"}, {{"22"}, "r22"}, {{"23"}, "r23"},
815 {{"24"}, "r24"}, {{"25"}, "r25"}, {{"26"}, "r26"},
816 {{"27"}, "r27"}, {{"28"}, "r28"}, {{"29"}, "r29"},
817 {{"30"}, "r30"}, {{"31"}, "r31"}, {{"fr0"}, "f0"},
818 {{"fr1"}, "f1"}, {{"fr2"}, "f2"}, {{"fr3"}, "f3"},
819 {{"fr4"}, "f4"}, {{"fr5"}, "f5"}, {{"fr6"}, "f6"},
820 {{"fr7"}, "f7"}, {{"fr8"}, "f8"}, {{"fr9"}, "f9"},
821 {{"fr10"}, "f10"}, {{"fr11"}, "f11"}, {{"fr12"}, "f12"},
822 {{"fr13"}, "f13"}, {{"fr14"}, "f14"}, {{"fr15"}, "f15"},
823 {{"fr16"}, "f16"}, {{"fr17"}, "f17"}, {{"fr18"}, "f18"},
824 {{"fr19"}, "f19"}, {{"fr20"}, "f20"}, {{"fr21"}, "f21"},
825 {{"fr22"}, "f22"}, {{"fr23"}, "f23"}, {{"fr24"}, "f24"},
826 {{"fr25"}, "f25"}, {{"fr26"}, "f26"}, {{"fr27"}, "f27"},
827 {{"fr28"}, "f28"}, {{"fr29"}, "f29"}, {{"fr30"}, "f30"},
828 {{"fr31"}, "f31"}, {{"cc"}, "cr0"},
829};
830
831ArrayRef<TargetInfo::GCCRegAlias> PPCTargetInfo::getGCCRegAliases() const {
832 return llvm::ArrayRef(GCCRegAliases);
833}
834
835// PPC ELFABIv2 DWARF Definition "Table 2.26. Mappings of Common Registers".
836// vs0 ~ vs31 is mapping to 32 - 63,
837// vs32 ~ vs63 is mapping to 77 - 108.
838// And this mapping applies to all OSes which run on powerpc.
839const TargetInfo::AddlRegName GCCAddlRegNames[] = {
840 // Table of additional register names to use in user input.
841 {{"vs0"}, 32}, {{"vs1"}, 33}, {{"vs2"}, 34}, {{"vs3"}, 35},
842 {{"vs4"}, 36}, {{"vs5"}, 37}, {{"vs6"}, 38}, {{"vs7"}, 39},
843 {{"vs8"}, 40}, {{"vs9"}, 41}, {{"vs10"}, 42}, {{"vs11"}, 43},
844 {{"vs12"}, 44}, {{"vs13"}, 45}, {{"vs14"}, 46}, {{"vs15"}, 47},
845 {{"vs16"}, 48}, {{"vs17"}, 49}, {{"vs18"}, 50}, {{"vs19"}, 51},
846 {{"vs20"}, 52}, {{"vs21"}, 53}, {{"vs22"}, 54}, {{"vs23"}, 55},
847 {{"vs24"}, 56}, {{"vs25"}, 57}, {{"vs26"}, 58}, {{"vs27"}, 59},
848 {{"vs28"}, 60}, {{"vs29"}, 61}, {{"vs30"}, 62}, {{"vs31"}, 63},
849 {{"vs32"}, 77}, {{"vs33"}, 78}, {{"vs34"}, 79}, {{"vs35"}, 80},
850 {{"vs36"}, 81}, {{"vs37"}, 82}, {{"vs38"}, 83}, {{"vs39"}, 84},
851 {{"vs40"}, 85}, {{"vs41"}, 86}, {{"vs42"}, 87}, {{"vs43"}, 88},
852 {{"vs44"}, 89}, {{"vs45"}, 90}, {{"vs46"}, 91}, {{"vs47"}, 92},
853 {{"vs48"}, 93}, {{"vs49"}, 94}, {{"vs50"}, 95}, {{"vs51"}, 96},
854 {{"vs52"}, 97}, {{"vs53"}, 98}, {{"vs54"}, 99}, {{"vs55"}, 100},
855 {{"vs56"}, 101}, {{"vs57"}, 102}, {{"vs58"}, 103}, {{"vs59"}, 104},
856 {{"vs60"}, 105}, {{"vs61"}, 106}, {{"vs62"}, 107}, {{"vs63"}, 108},
857};
858
859ArrayRef<TargetInfo::AddlRegName> PPCTargetInfo::getGCCAddlRegNames() const {
860 return llvm::ArrayRef(GCCAddlRegNames);
861}
862
863static constexpr llvm::StringLiteral ValidCPUNames[] = {
864 {"generic"}, {"440"}, {"450"}, {"601"}, {"602"},
865 {"603"}, {"603e"}, {"603ev"}, {"604"}, {"604e"},
866 {"620"}, {"630"}, {"g3"}, {"7400"}, {"g4"},
867 {"7450"}, {"g4+"}, {"750"}, {"8548"}, {"970"},
868 {"g5"}, {"a2"}, {"e500"}, {"e500mc"}, {"e5500"},
869 {"power3"}, {"pwr3"}, {"power4"}, {"pwr4"}, {"power5"},
870 {"pwr5"}, {"power5x"}, {"pwr5x"}, {"power6"}, {"pwr6"},
871 {"power6x"}, {"pwr6x"}, {"power7"}, {"pwr7"}, {"power8"},
872 {"pwr8"}, {"power9"}, {"pwr9"}, {"power10"}, {"pwr10"},
873 {"powerpc"}, {"ppc"}, {"ppc32"}, {"powerpc64"}, {"ppc64"},
874 {"powerpc64le"}, {"ppc64le"}, {"future"}};
875
876bool PPCTargetInfo::isValidCPUName(StringRef Name) const {
877 return llvm::is_contained(ValidCPUNames, Name);
878}
879
880void PPCTargetInfo::fillValidCPUList(SmallVectorImpl<StringRef> &Values) const {
881 Values.append(std::begin(ValidCPUNames), std::end(ValidCPUNames));
882}
883
884void PPCTargetInfo::adjust(DiagnosticsEngine &Diags, LangOptions &Opts) {
885 if (HasAltivec)
886 Opts.AltiVec = 1;
887 TargetInfo::adjust(Diags, Opts);
888 if (LongDoubleFormat != &llvm::APFloat::IEEEdouble())
889 LongDoubleFormat = Opts.PPCIEEELongDouble
890 ? &llvm::APFloat::IEEEquad()
891 : &llvm::APFloat::PPCDoubleDouble();
892 Opts.IEEE128 = 1;
893 if (getTriple().isOSAIX() && Opts.EnableAIXQuadwordAtomicsABI &&
894 HasQuadwordAtomics)
895 MaxAtomicInlineWidth = 128;
896}
897
898ArrayRef<Builtin::Info> PPCTargetInfo::getTargetBuiltins() const {
899 return llvm::ArrayRef(BuiltinInfo,
900 clang::PPC::LastTSBuiltin - Builtin::FirstTSBuiltin);
901}
902
903bool PPCTargetInfo::validateCpuSupports(StringRef FeatureStr) const {
904 llvm::Triple Triple = getTriple();
905 if (Triple.isOSAIX()) {
906#define PPC_AIX_FEATURE(NAME, DESC, SUPPORT_METHOD, INDEX, MASK, COMP_OP, \
907 VALUE) \
908 .Case(NAME, true)
909 return llvm::StringSwitch<bool>(FeatureStr)
910#include "llvm/TargetParser/PPCTargetParser.def"
911 .Default(false);
912 }
913
914 assert(Triple.isOSLinux() &&
915 "__builtin_cpu_supports() is only supported for AIX and Linux.");
916
917#define PPC_LNX_FEATURE(NAME, DESC, ENUMNAME, ENUMVAL, HWCAPN) .Case(NAME, true)
918 return llvm::StringSwitch<bool>(FeatureStr)
919#include "llvm/TargetParser/PPCTargetParser.def"
920 .Default(false);
921}
922
923bool PPCTargetInfo::validateCpuIs(StringRef CPUName) const {
924 llvm::Triple Triple = getTriple();
925 if (Triple.isOSAIX()) {
926#define PPC_AIX_CPU(NAME, SUPPORT_METHOD, INDEX, OP, VALUE) .Case(NAME, true)
927 return llvm::StringSwitch<bool>(CPUName)
928#include "llvm/TargetParser/PPCTargetParser.def"
929 .Default(false);
930 }
931
932 assert(Triple.isOSLinux() &&
933 "__builtin_cpu_is() is only supported for AIX and Linux.");
934#define PPC_LNX_CPU(NAME, NUM) .Case(NAME, true)
935 return llvm::StringSwitch<bool>(CPUName)
936#include "llvm/TargetParser/PPCTargetParser.def"
937 .Default(false);
938}
Diagnostic.h
Defines the Diagnostic-related interfaces.
ValidCPUNames
static constexpr llvm::StringLiteral ValidCPUNames[]
Definition: BPF.cpp:69
GCCAddlRegNames
const TargetInfo::AddlRegName GCCAddlRegNames[]
Definition: PPC.cpp:839
BuiltinInfo
static constexpr Builtin::Info BuiltinInfo[]
Definition: PPC.cpp:21
defineXLCompatMacros
static void defineXLCompatMacros(MacroBuilder &Builder)
Definition: PPC.cpp:102
ppcUserFeaturesCheck
static bool ppcUserFeaturesCheck(DiagnosticsEngine &Diags, const std::vector< std::string > &FeaturesVec)
Definition: PPC.cpp:460
BuiltinInfo
static constexpr Builtin::Info BuiltinInfo[]
Definition: Builtins.cpp:32
MacroBuilder.h
Defines the clang::MacroBuilder utility class.
TargetBuiltins.h
Enumerates target-specific builtins in their own namespaces within namespace clang.
clang::DiagnosticsEngine
Concrete class used by the front-end to report problems and issues.
Definition: Diagnostic.h:192
clang::DiagnosticsEngine::Report
DiagnosticBuilder Report(SourceLocation Loc, unsigned DiagID)
Issue the message to the client.
Definition: Diagnostic.h:1547
clang::LangOptions
Keeps track of the various options that can be enabled, which controls the dialect of C or C++ that i...
Definition: LangOptions.h:461
clang::TargetInfo::getTriple
const llvm::Triple & getTriple() const
Returns the target triple of the primary target.
Definition: TargetInfo.h:1236
clang::TargetInfo::adjust
virtual void adjust(DiagnosticsEngine &Diags, LangOptions &Opts)
Set forced language options.
Definition: TargetInfo.cpp:392
clang::TargetInfo::initFeatureMap
virtual bool initFeatureMap(llvm::StringMap< bool > &Features, DiagnosticsEngine &Diags, StringRef CPU, const std::vector< std::string > &FeatureVec) const
Initialize the map with the default set of target features for the CPU this should include all legal ...
Definition: TargetInfo.cpp:532
clang::TargetInfo::MaxAtomicInlineWidth
unsigned char MaxAtomicInlineWidth
Definition: TargetInfo.h:238
clang::targets::PPCTargetInfo::addFutureSpecificFeatures
void addFutureSpecificFeatures(llvm::StringMap< bool > &Features) const
Definition: PPC.cpp:693
clang::targets::PPCTargetInfo::getGCCRegNames
ArrayRef< const char * > getGCCRegNames() const override
Definition: PPC.cpp:800
clang::targets::PPCTargetInfo::validateCpuIs
bool validateCpuIs(StringRef Name) const override
Definition: PPC.cpp:923
clang::targets::PPCTargetInfo::isValidCPUName
bool isValidCPUName(StringRef Name) const override
Determine whether this TargetInfo supports the given CPU name.
Definition: PPC.cpp:876
clang::targets::PPCTargetInfo::handleTargetFeatures
bool handleTargetFeatures(std::vector< std::string > &Features, DiagnosticsEngine &Diags) override
handleTargetFeatures - Perform initialization based on the user configured set of features.
Definition: PPC.cpp:33
clang::targets::PPCTargetInfo::hasFeature
bool hasFeature(StringRef Feature) const override
Determine whether the given target has the given feature.
Definition: PPC.cpp:696
clang::targets::PPCTargetInfo::getGCCRegAliases
ArrayRef< TargetInfo::GCCRegAlias > getGCCRegAliases() const override
Definition: PPC.cpp:831
clang::targets::PPCTargetInfo::getTargetBuiltins
ArrayRef< Builtin::Info > getTargetBuiltins() const override
Return information about target-specific builtins for the current primary target, and info about whic...
Definition: PPC.cpp:898
clang::targets::PPCTargetInfo::adjust
void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) override
Set forced language options.
Definition: PPC.cpp:884
clang::targets::PPCTargetInfo::addP10SpecificFeatures
void addP10SpecificFeatures(llvm::StringMap< bool > &Features) const
Definition: PPC.cpp:681
clang::targets::PPCTargetInfo::setFeatureEnabled
void setFeatureEnabled(llvm::StringMap< bool > &Features, StringRef Name, bool Enabled) const override
Enable or disable a specific target feature; the feature name must be valid.
Definition: PPC.cpp:728
clang::targets::PPCTargetInfo::getTargetDefines
void getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const override
PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific #defines that are not tied to ...
Definition: PPC.cpp:278
clang::targets::PPCTargetInfo::getGCCAddlRegNames
ArrayRef< TargetInfo::AddlRegName > getGCCAddlRegNames() const override
Definition: PPC.cpp:859
clang::targets::PPCTargetInfo::validateCpuSupports
bool validateCpuSupports(StringRef Feature) const override
Definition: PPC.cpp:903
clang::targets::PPCTargetInfo::initFeatureMap
bool initFeatureMap(llvm::StringMap< bool > &Features, DiagnosticsEngine &Diags, StringRef CPU, const std::vector< std::string > &FeaturesVec) const override
Initialize the map with the default set of target features for the CPU this should include all legal ...
Definition: PPC.cpp:510
clang::targets::PPCTargetInfo::fillValidCPUList
void fillValidCPUList(SmallVectorImpl< StringRef > &Values) const override
Fill a SmallVectorImpl with the valid values to setCPU.
Definition: PPC.cpp:880
clang
The JSON file list parser is used to communicate input to InstallAPI.
Definition: CalledOnceCheck.h:17
clang::TransferrableTargetInfo::LongDoubleFormat
const llvm::fltSemantics * LongDoubleFormat
Definition: TargetInfo.h:135
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