clang  6.0.0svn
Mips.cpp
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1 //===--- Mips.cpp - Implement Mips target feature support -----------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements Mips TargetInfo objects.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "Mips.h"
15 #include "Targets.h"
16 #include "clang/Basic/Diagnostic.h"
19 #include "llvm/ADT/StringSwitch.h"
20 
21 using namespace clang;
22 using namespace clang::targets;
23 
24 const Builtin::Info MipsTargetInfo::BuiltinInfo[] = {
25 #define BUILTIN(ID, TYPE, ATTRS) \
26  {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr},
27 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) \
28  {#ID, TYPE, ATTRS, HEADER, ALL_LANGUAGES, nullptr},
29 #include "clang/Basic/BuiltinsMips.def"
30 };
31 
33  return llvm::StringSwitch<bool>(CPU)
34  .Case("mips3", true)
35  .Case("mips4", true)
36  .Case("mips5", true)
37  .Case("mips64", true)
38  .Case("mips64r2", true)
39  .Case("mips64r3", true)
40  .Case("mips64r5", true)
41  .Case("mips64r6", true)
42  .Case("octeon", true)
43  .Default(false);
44  return false;
45 }
46 
47 bool MipsTargetInfo::isValidCPUName(StringRef Name) const {
48  return llvm::StringSwitch<bool>(Name)
49  .Case("mips1", true)
50  .Case("mips2", true)
51  .Case("mips3", true)
52  .Case("mips4", true)
53  .Case("mips5", true)
54  .Case("mips32", true)
55  .Case("mips32r2", true)
56  .Case("mips32r3", true)
57  .Case("mips32r5", true)
58  .Case("mips32r6", true)
59  .Case("mips64", true)
60  .Case("mips64r2", true)
61  .Case("mips64r3", true)
62  .Case("mips64r5", true)
63  .Case("mips64r6", true)
64  .Case("octeon", true)
65  .Case("p5600", true)
66  .Default(false);
67 }
68 
70  MacroBuilder &Builder) const {
71  if (BigEndian) {
72  DefineStd(Builder, "MIPSEB", Opts);
73  Builder.defineMacro("_MIPSEB");
74  } else {
75  DefineStd(Builder, "MIPSEL", Opts);
76  Builder.defineMacro("_MIPSEL");
77  }
78 
79  Builder.defineMacro("__mips__");
80  Builder.defineMacro("_mips");
81  if (Opts.GNUMode)
82  Builder.defineMacro("mips");
83 
84  if (ABI == "o32") {
85  Builder.defineMacro("__mips", "32");
86  Builder.defineMacro("_MIPS_ISA", "_MIPS_ISA_MIPS32");
87  } else {
88  Builder.defineMacro("__mips", "64");
89  Builder.defineMacro("__mips64");
90  Builder.defineMacro("__mips64__");
91  Builder.defineMacro("_MIPS_ISA", "_MIPS_ISA_MIPS64");
92  }
93 
94  const std::string ISARev = llvm::StringSwitch<std::string>(getCPU())
95  .Cases("mips32", "mips64", "1")
96  .Cases("mips32r2", "mips64r2", "2")
97  .Cases("mips32r3", "mips64r3", "3")
98  .Cases("mips32r5", "mips64r5", "5")
99  .Cases("mips32r6", "mips64r6", "6")
100  .Default("");
101  if (!ISARev.empty())
102  Builder.defineMacro("__mips_isa_rev", ISARev);
103 
104  if (ABI == "o32") {
105  Builder.defineMacro("__mips_o32");
106  Builder.defineMacro("_ABIO32", "1");
107  Builder.defineMacro("_MIPS_SIM", "_ABIO32");
108  } else if (ABI == "n32") {
109  Builder.defineMacro("__mips_n32");
110  Builder.defineMacro("_ABIN32", "2");
111  Builder.defineMacro("_MIPS_SIM", "_ABIN32");
112  } else if (ABI == "n64") {
113  Builder.defineMacro("__mips_n64");
114  Builder.defineMacro("_ABI64", "3");
115  Builder.defineMacro("_MIPS_SIM", "_ABI64");
116  } else
117  llvm_unreachable("Invalid ABI.");
118 
119  if (!IsNoABICalls) {
120  Builder.defineMacro("__mips_abicalls");
121  if (CanUseBSDABICalls)
122  Builder.defineMacro("__ABICALLS__");
123  }
124 
125  Builder.defineMacro("__REGISTER_PREFIX__", "");
126 
127  switch (FloatABI) {
128  case HardFloat:
129  Builder.defineMacro("__mips_hard_float", Twine(1));
130  break;
131  case SoftFloat:
132  Builder.defineMacro("__mips_soft_float", Twine(1));
133  break;
134  }
135 
136  if (IsSingleFloat)
137  Builder.defineMacro("__mips_single_float", Twine(1));
138 
139  Builder.defineMacro("__mips_fpr", HasFP64 ? Twine(64) : Twine(32));
140  Builder.defineMacro("_MIPS_FPSET",
141  Twine(32 / (HasFP64 || IsSingleFloat ? 1 : 2)));
142 
143  if (IsMips16)
144  Builder.defineMacro("__mips16", Twine(1));
145 
146  if (IsMicromips)
147  Builder.defineMacro("__mips_micromips", Twine(1));
148 
149  if (IsNan2008)
150  Builder.defineMacro("__mips_nan2008", Twine(1));
151 
152  if (IsAbs2008)
153  Builder.defineMacro("__mips_abs2008", Twine(1));
154 
155  switch (DspRev) {
156  default:
157  break;
158  case DSP1:
159  Builder.defineMacro("__mips_dsp_rev", Twine(1));
160  Builder.defineMacro("__mips_dsp", Twine(1));
161  break;
162  case DSP2:
163  Builder.defineMacro("__mips_dsp_rev", Twine(2));
164  Builder.defineMacro("__mips_dspr2", Twine(1));
165  Builder.defineMacro("__mips_dsp", Twine(1));
166  break;
167  }
168 
169  if (HasMSA)
170  Builder.defineMacro("__mips_msa", Twine(1));
171 
172  if (DisableMadd4)
173  Builder.defineMacro("__mips_no_madd4", Twine(1));
174 
175  Builder.defineMacro("_MIPS_SZPTR", Twine(getPointerWidth(0)));
176  Builder.defineMacro("_MIPS_SZINT", Twine(getIntWidth()));
177  Builder.defineMacro("_MIPS_SZLONG", Twine(getLongWidth()));
178 
179  Builder.defineMacro("_MIPS_ARCH", "\"" + CPU + "\"");
180  Builder.defineMacro("_MIPS_ARCH_" + StringRef(CPU).upper());
181 
182  // These shouldn't be defined for MIPS-I but there's no need to check
183  // for that since MIPS-I isn't supported.
184  Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
185  Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
186  Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
187 
188  // 32-bit MIPS processors don't have the necessary lld/scd instructions
189  // found in 64-bit processors. In the case of O32 on a 64-bit processor,
190  // the instructions exist but using them violates the ABI since they
191  // require 64-bit GPRs and O32 only supports 32-bit GPRs.
192  if (ABI == "n32" || ABI == "n64")
193  Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
194 }
195 
196 bool MipsTargetInfo::hasFeature(StringRef Feature) const {
197  return llvm::StringSwitch<bool>(Feature)
198  .Case("mips", true)
199  .Case("fp64", HasFP64)
200  .Default(false);
201 }
202 
204  return llvm::makeArrayRef(BuiltinInfo, clang::Mips::LastTSBuiltin -
206 }
207 
209  // microMIPS64R6 backend was removed.
210  if ((getTriple().getArch() == llvm::Triple::mips64 ||
211  getTriple().getArch() == llvm::Triple::mips64el) &&
212  IsMicromips && (ABI == "n32" || ABI == "n64")) {
213  Diags.Report(diag::err_target_unsupported_cpu_for_micromips) << CPU;
214  return false;
215  }
216  // FIXME: It's valid to use O32 on a 64-bit CPU but the backend can't handle
217  // this yet. It's better to fail here than on the backend assertion.
218  if (processorSupportsGPR64() && ABI == "o32") {
219  Diags.Report(diag::err_target_unsupported_abi) << ABI << CPU;
220  return false;
221  }
222 
223  // 64-bit ABI's require 64-bit CPU's.
224  if (!processorSupportsGPR64() && (ABI == "n32" || ABI == "n64")) {
225  Diags.Report(diag::err_target_unsupported_abi) << ABI << CPU;
226  return false;
227  }
228 
229  // FIXME: It's valid to use O32 on a mips64/mips64el triple but the backend
230  // can't handle this yet. It's better to fail here than on the
231  // backend assertion.
232  if ((getTriple().getArch() == llvm::Triple::mips64 ||
233  getTriple().getArch() == llvm::Triple::mips64el) &&
234  ABI == "o32") {
235  Diags.Report(diag::err_target_unsupported_abi_for_triple)
236  << ABI << getTriple().str();
237  return false;
238  }
239 
240  // FIXME: It's valid to use N32/N64 on a mips/mipsel triple but the backend
241  // can't handle this yet. It's better to fail here than on the
242  // backend assertion.
243  if ((getTriple().getArch() == llvm::Triple::mips ||
244  getTriple().getArch() == llvm::Triple::mipsel) &&
245  (ABI == "n32" || ABI == "n64")) {
246  Diags.Report(diag::err_target_unsupported_abi_for_triple)
247  << ABI << getTriple().str();
248  return false;
249  }
250 
251  return true;
252 }
void DefineStd(MacroBuilder &Builder, StringRef MacroName, const LangOptions &Opts)
DefineStd - Define a macro name and standard variants.
Definition: Targets.cpp:53
Defines the clang::MacroBuilder utility class.
unsigned getLongWidth() const
getLongWidth/Align - Return the size of &#39;signed long&#39; and &#39;unsigned long&#39; for this target...
Definition: TargetInfo.h:351
bool hasFeature(StringRef Feature) const override
Determine whether the given target has the given feature.
Definition: Mips.cpp:196
const llvm::Triple & getTriple() const
Returns the target triple of the primary target.
Definition: TargetInfo.h:790
DiagnosticBuilder Report(SourceLocation Loc, unsigned DiagID)
Issue the message to the client.
Definition: Diagnostic.h:1207
void getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const override
===-— Other target property query methods --------------------——===//
Definition: Mips.cpp:69
uint64_t getPointerWidth(unsigned AddrSpace) const
Return the width of pointers on this target, for the specified address space.
Definition: TargetInfo.h:311
Keeps track of the various options that can be enabled, which controls the dialect of C or C++ that i...
Definition: LangOptions.h:48
Concrete class used by the front-end to report problems and issues.
Definition: Diagnostic.h:147
Defines the Diagnostic-related interfaces.
bool validateTarget(DiagnosticsEngine &Diags) const override
Check the target is valid after it is fully initialized.
Definition: Mips.cpp:208
unsigned getIntWidth() const
getIntWidth/Align - Return the size of &#39;signed int&#39; and &#39;unsigned int&#39; for this target, in bits.
Definition: TargetInfo.h:346
Enumerates target-specific builtins in their own namespaces within namespace clang.
const std::string & getCPU() const
Definition: Mips.h:170
Dataflow Directional Tag Classes.
bool processorSupportsGPR64() const
Definition: Mips.cpp:32
ArrayRef< Builtin::Info > getTargetBuiltins() const override
Return information about target-specific builtins for the current primary target, and info about whic...
Definition: Mips.cpp:203
bool isValidCPUName(StringRef Name) const override
brief Determine whether this TargetInfo supports the given CPU name.
Definition: Mips.cpp:47
void defineMacro(const Twine &Name, const Twine &Value="1")
Append a #define line for macro of the form "\#define Name Value\n".
Definition: MacroBuilder.h:30