clang  8.0.0svn
Mips.h
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1 //===--- Mips.h - Declare Mips target feature support -----------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file declares Mips TargetInfo objects.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_CLANG_LIB_BASIC_TARGETS_MIPS_H
15 #define LLVM_CLANG_LIB_BASIC_TARGETS_MIPS_H
16 
17 #include "clang/Basic/TargetInfo.h"
19 #include "llvm/ADT/Triple.h"
20 #include "llvm/Support/Compiler.h"
21 
22 namespace clang {
23 namespace targets {
24 
25 class LLVM_LIBRARY_VISIBILITY MipsTargetInfo : public TargetInfo {
26  void setDataLayout() {
27  StringRef Layout;
28 
29  if (ABI == "o32")
30  Layout = "m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64";
31  else if (ABI == "n32")
32  Layout = "m:e-p:32:32-i8:8:32-i16:16:32-i64:64-n32:64-S128";
33  else if (ABI == "n64")
34  Layout = "m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128";
35  else
36  llvm_unreachable("Invalid ABI");
37 
38  if (BigEndian)
39  resetDataLayout(("E-" + Layout).str());
40  else
41  resetDataLayout(("e-" + Layout).str());
42  }
43 
44  static const Builtin::Info BuiltinInfo[];
45  std::string CPU;
46  bool IsMips16;
47  bool IsMicromips;
48  bool IsNan2008;
49  bool IsAbs2008;
50  bool IsSingleFloat;
51  bool IsNoABICalls;
52  bool CanUseBSDABICalls;
53  enum MipsFloatABI { HardFloat, SoftFloat } FloatABI;
54  enum DspRevEnum { NoDSP, DSP1, DSP2 } DspRev;
55  bool HasMSA;
56  bool DisableMadd4;
57  bool UseIndirectJumpHazard;
58 
59 protected:
60  bool HasFP64;
61  std::string ABI;
62 
63 public:
64  MipsTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
65  : TargetInfo(Triple), IsMips16(false), IsMicromips(false),
66  IsNan2008(false), IsAbs2008(false), IsSingleFloat(false),
67  IsNoABICalls(false), CanUseBSDABICalls(false), FloatABI(HardFloat),
68  DspRev(NoDSP), HasMSA(false), DisableMadd4(false),
69  UseIndirectJumpHazard(false), HasFP64(false) {
70  TheCXXABI.set(TargetCXXABI::GenericMIPS);
71 
72  setABI(getTriple().isMIPS32() ? "o32" : "n64");
73 
74  CPU = ABI == "o32" ? "mips32r2" : "mips64r2";
75 
76  CanUseBSDABICalls = Triple.getOS() == llvm::Triple::FreeBSD ||
77  Triple.getOS() == llvm::Triple::OpenBSD;
78  }
79 
80  bool isIEEE754_2008Default() const {
81  return CPU == "mips32r6" || CPU == "mips64r6";
82  }
83 
84  bool isFP64Default() const {
85  return CPU == "mips32r6" || ABI == "n32" || ABI == "n64" || ABI == "64";
86  }
87 
88  bool isNan2008() const override { return IsNan2008; }
89 
90  bool processorSupportsGPR64() const;
91 
92  StringRef getABI() const override { return ABI; }
93 
94  bool setABI(const std::string &Name) override {
95  if (Name == "o32") {
96  setO32ABITypes();
97  ABI = Name;
98  return true;
99  }
100 
101  if (Name == "n32") {
102  setN32ABITypes();
103  ABI = Name;
104  return true;
105  }
106  if (Name == "n64") {
107  setN64ABITypes();
108  ABI = Name;
109  return true;
110  }
111  return false;
112  }
113 
114  void setO32ABITypes() {
115  Int64Type = SignedLongLong;
116  IntMaxType = Int64Type;
117  LongDoubleFormat = &llvm::APFloat::IEEEdouble();
118  LongDoubleWidth = LongDoubleAlign = 64;
119  LongWidth = LongAlign = 32;
120  MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32;
121  PointerWidth = PointerAlign = 32;
122  PtrDiffType = SignedInt;
123  SizeType = UnsignedInt;
124  SuitableAlign = 64;
125  }
126 
128  LongDoubleWidth = LongDoubleAlign = 128;
129  LongDoubleFormat = &llvm::APFloat::IEEEquad();
130  if (getTriple().getOS() == llvm::Triple::FreeBSD) {
131  LongDoubleWidth = LongDoubleAlign = 64;
132  LongDoubleFormat = &llvm::APFloat::IEEEdouble();
133  }
134  MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
135  SuitableAlign = 128;
136  }
137 
138  void setN64ABITypes() {
139  setN32N64ABITypes();
140  if (getTriple().getOS() == llvm::Triple::OpenBSD) {
141  Int64Type = SignedLongLong;
142  } else {
143  Int64Type = SignedLong;
144  }
145  IntMaxType = Int64Type;
146  LongWidth = LongAlign = 64;
147  PointerWidth = PointerAlign = 64;
148  PtrDiffType = SignedLong;
149  SizeType = UnsignedLong;
150  }
151 
152  void setN32ABITypes() {
153  setN32N64ABITypes();
154  Int64Type = SignedLongLong;
155  IntMaxType = Int64Type;
156  LongWidth = LongAlign = 32;
157  PointerWidth = PointerAlign = 32;
158  PtrDiffType = SignedInt;
159  SizeType = UnsignedInt;
160  }
161 
162  bool isValidCPUName(StringRef Name) const override;
163  void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
164 
165  bool setCPU(const std::string &Name) override {
166  CPU = Name;
167  return isValidCPUName(Name);
168  }
169 
170  const std::string &getCPU() const { return CPU; }
171  bool
172  initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags,
173  StringRef CPU,
174  const std::vector<std::string> &FeaturesVec) const override {
175  if (CPU.empty())
176  CPU = getCPU();
177  if (CPU == "octeon")
178  Features["mips64r2"] = Features["cnmips"] = true;
179  else
180  Features[CPU] = true;
181  return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
182  }
183 
184  void getTargetDefines(const LangOptions &Opts,
185  MacroBuilder &Builder) const override;
186 
187  ArrayRef<Builtin::Info> getTargetBuiltins() const override;
188 
189  bool hasFeature(StringRef Feature) const override;
190 
193  }
194 
196  static const char *const GCCRegNames[] = {
197  // CPU register names
198  // Must match second column of GCCRegAliases
199  "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", "$9", "$10",
200  "$11", "$12", "$13", "$14", "$15", "$16", "$17", "$18", "$19", "$20",
201  "$21", "$22", "$23", "$24", "$25", "$26", "$27", "$28", "$29", "$30",
202  "$31",
203  // Floating point register names
204  "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", "$f9",
205  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", "$f16", "$f17", "$f18",
206  "$f19", "$f20", "$f21", "$f22", "$f23", "$f24", "$f25", "$f26", "$f27",
207  "$f28", "$f29", "$f30", "$f31",
208  // Hi/lo and condition register names
209  "hi", "lo", "", "$fcc0", "$fcc1", "$fcc2", "$fcc3", "$fcc4", "$fcc5",
210  "$fcc6", "$fcc7", "$ac1hi", "$ac1lo", "$ac2hi", "$ac2lo", "$ac3hi",
211  "$ac3lo",
212  // MSA register names
213  "$w0", "$w1", "$w2", "$w3", "$w4", "$w5", "$w6", "$w7", "$w8", "$w9",
214  "$w10", "$w11", "$w12", "$w13", "$w14", "$w15", "$w16", "$w17", "$w18",
215  "$w19", "$w20", "$w21", "$w22", "$w23", "$w24", "$w25", "$w26", "$w27",
216  "$w28", "$w29", "$w30", "$w31",
217  // MSA control register names
218  "$msair", "$msacsr", "$msaaccess", "$msasave", "$msamodify",
219  "$msarequest", "$msamap", "$msaunmap"
220  };
221  return llvm::makeArrayRef(GCCRegNames);
222  }
223 
224  bool validateAsmConstraint(const char *&Name,
225  TargetInfo::ConstraintInfo &Info) const override {
226  switch (*Name) {
227  default:
228  return false;
229  case 'r': // CPU registers.
230  case 'd': // Equivalent to "r" unless generating MIPS16 code.
231  case 'y': // Equivalent to "r", backward compatibility only.
232  case 'f': // floating-point registers.
233  case 'c': // $25 for indirect jumps
234  case 'l': // lo register
235  case 'x': // hilo register pair
236  Info.setAllowsRegister();
237  return true;
238  case 'I': // Signed 16-bit constant
239  case 'J': // Integer 0
240  case 'K': // Unsigned 16-bit constant
241  case 'L': // Signed 32-bit constant, lower 16-bit zeros (for lui)
242  case 'M': // Constants not loadable via lui, addiu, or ori
243  case 'N': // Constant -1 to -65535
244  case 'O': // A signed 15-bit constant
245  case 'P': // A constant between 1 go 65535
246  return true;
247  case 'R': // An address that can be used in a non-macro load or store
248  Info.setAllowsMemory();
249  return true;
250  case 'Z':
251  if (Name[1] == 'C') { // An address usable by ll, and sc.
252  Info.setAllowsMemory();
253  Name++; // Skip over 'Z'.
254  return true;
255  }
256  return false;
257  }
258  }
259 
260  std::string convertConstraint(const char *&Constraint) const override {
261  std::string R;
262  switch (*Constraint) {
263  case 'Z': // Two-character constraint; add "^" hint for later parsing.
264  if (Constraint[1] == 'C') {
265  R = std::string("^") + std::string(Constraint, 2);
266  Constraint++;
267  return R;
268  }
269  break;
270  }
271  return TargetInfo::convertConstraint(Constraint);
272  }
273 
274  const char *getClobbers() const override {
275  // In GCC, $1 is not widely used in generated code (it's used only in a few
276  // specific situations), so there is no real need for users to add it to
277  // the clobbers list if they want to use it in their inline assembly code.
278  //
279  // In LLVM, $1 is treated as a normal GPR and is always allocatable during
280  // code generation, so using it in inline assembly without adding it to the
281  // clobbers list can cause conflicts between the inline assembly code and
282  // the surrounding generated code.
283  //
284  // Another problem is that LLVM is allowed to choose $1 for inline assembly
285  // operands, which will conflict with the ".set at" assembler option (which
286  // we use only for inline assembly, in order to maintain compatibility with
287  // GCC) and will also conflict with the user's usage of $1.
288  //
289  // The easiest way to avoid these conflicts and keep $1 as an allocatable
290  // register for generated code is to automatically clobber $1 for all inline
291  // assembly code.
292  //
293  // FIXME: We should automatically clobber $1 only for inline assembly code
294  // which actually uses it. This would allow LLVM to use $1 for inline
295  // assembly operands if the user's assembly code doesn't use it.
296  return "~{$1}";
297  }
298 
299  bool handleTargetFeatures(std::vector<std::string> &Features,
300  DiagnosticsEngine &Diags) override {
301  IsMips16 = false;
302  IsMicromips = false;
303  IsNan2008 = isIEEE754_2008Default();
304  IsAbs2008 = isIEEE754_2008Default();
305  IsSingleFloat = false;
306  FloatABI = HardFloat;
307  DspRev = NoDSP;
308  HasFP64 = isFP64Default();
309 
310  for (const auto &Feature : Features) {
311  if (Feature == "+single-float")
312  IsSingleFloat = true;
313  else if (Feature == "+soft-float")
314  FloatABI = SoftFloat;
315  else if (Feature == "+mips16")
316  IsMips16 = true;
317  else if (Feature == "+micromips")
318  IsMicromips = true;
319  else if (Feature == "+dsp")
320  DspRev = std::max(DspRev, DSP1);
321  else if (Feature == "+dspr2")
322  DspRev = std::max(DspRev, DSP2);
323  else if (Feature == "+msa")
324  HasMSA = true;
325  else if (Feature == "+nomadd4")
326  DisableMadd4 = true;
327  else if (Feature == "+fp64")
328  HasFP64 = true;
329  else if (Feature == "-fp64")
330  HasFP64 = false;
331  else if (Feature == "+nan2008")
332  IsNan2008 = true;
333  else if (Feature == "-nan2008")
334  IsNan2008 = false;
335  else if (Feature == "+abs2008")
336  IsAbs2008 = true;
337  else if (Feature == "-abs2008")
338  IsAbs2008 = false;
339  else if (Feature == "+noabicalls")
340  IsNoABICalls = true;
341  else if (Feature == "+use-indirect-jump-hazard")
342  UseIndirectJumpHazard = true;
343  }
344 
345  setDataLayout();
346 
347  return true;
348  }
349 
350  int getEHDataRegisterNumber(unsigned RegNo) const override {
351  if (RegNo == 0)
352  return 4;
353  if (RegNo == 1)
354  return 5;
355  return -1;
356  }
357 
358  bool isCLZForZeroUndef() const override { return false; }
359 
361  static const TargetInfo::GCCRegAlias O32RegAliases[] = {
362  {{"at"}, "$1"}, {{"v0"}, "$2"}, {{"v1"}, "$3"},
363  {{"a0"}, "$4"}, {{"a1"}, "$5"}, {{"a2"}, "$6"},
364  {{"a3"}, "$7"}, {{"t0"}, "$8"}, {{"t1"}, "$9"},
365  {{"t2"}, "$10"}, {{"t3"}, "$11"}, {{"t4"}, "$12"},
366  {{"t5"}, "$13"}, {{"t6"}, "$14"}, {{"t7"}, "$15"},
367  {{"s0"}, "$16"}, {{"s1"}, "$17"}, {{"s2"}, "$18"},
368  {{"s3"}, "$19"}, {{"s4"}, "$20"}, {{"s5"}, "$21"},
369  {{"s6"}, "$22"}, {{"s7"}, "$23"}, {{"t8"}, "$24"},
370  {{"t9"}, "$25"}, {{"k0"}, "$26"}, {{"k1"}, "$27"},
371  {{"gp"}, "$28"}, {{"sp", "$sp"}, "$29"}, {{"fp", "$fp"}, "$30"},
372  {{"ra"}, "$31"}
373  };
374  static const TargetInfo::GCCRegAlias NewABIRegAliases[] = {
375  {{"at"}, "$1"}, {{"v0"}, "$2"}, {{"v1"}, "$3"},
376  {{"a0"}, "$4"}, {{"a1"}, "$5"}, {{"a2"}, "$6"},
377  {{"a3"}, "$7"}, {{"a4"}, "$8"}, {{"a5"}, "$9"},
378  {{"a6"}, "$10"}, {{"a7"}, "$11"}, {{"t0"}, "$12"},
379  {{"t1"}, "$13"}, {{"t2"}, "$14"}, {{"t3"}, "$15"},
380  {{"s0"}, "$16"}, {{"s1"}, "$17"}, {{"s2"}, "$18"},
381  {{"s3"}, "$19"}, {{"s4"}, "$20"}, {{"s5"}, "$21"},
382  {{"s6"}, "$22"}, {{"s7"}, "$23"}, {{"t8"}, "$24"},
383  {{"t9"}, "$25"}, {{"k0"}, "$26"}, {{"k1"}, "$27"},
384  {{"gp"}, "$28"}, {{"sp", "$sp"}, "$29"}, {{"fp", "$fp"}, "$30"},
385  {{"ra"}, "$31"}
386  };
387  if (ABI == "o32")
388  return llvm::makeArrayRef(O32RegAliases);
389  return llvm::makeArrayRef(NewABIRegAliases);
390  }
391 
392  bool hasInt128Type() const override {
393  return (ABI == "n32" || ABI == "n64") || getTargetOpts().ForceEnableInt128;
394  }
395 
396  bool validateTarget(DiagnosticsEngine &Diags) const override;
397 };
398 } // namespace targets
399 } // namespace clang
400 
401 #endif // LLVM_CLANG_LIB_BASIC_TARGETS_MIPS_H
std::string convertConstraint(const char *&Constraint) const override
Definition: Mips.h:260
ArrayRef< const char * > getGCCRegNames() const override
Definition: Mips.h:195
BuiltinVaListKind getBuiltinVaListKind() const override
Returns the kind of __builtin_va_list type that should be used with this target.
Definition: Mips.h:191
static const Builtin::Info BuiltinInfo[]
Definition: Builtins.cpp:21
static bool hasFeature(StringRef Feature, const LangOptions &LangOpts, const TargetInfo &Target)
Determine whether a translation unit built using the current language options has the given feature...
Definition: Module.cpp:76
const char * getClobbers() const override
Returns a string of target-specific clobbers, in LLVM format.
Definition: Mips.h:274
Options for controlling the target.
Definition: TargetOptions.h:26
The generic Mips ABI is a modified version of the Itanium ABI.
Definition: TargetCXXABI.h:90
Keeps track of the various options that can be enabled, which controls the dialect of C or C++ that i...
Definition: LangOptions.h:50
int getEHDataRegisterNumber(unsigned RegNo) const override
Return the register number that __builtin_eh_return_regno would return with the specified argument...
Definition: Mips.h:350
Concrete class used by the front-end to report problems and issues.
Definition: Diagnostic.h:149
bool handleTargetFeatures(std::vector< std::string > &Features, DiagnosticsEngine &Diags) override
Perform initialization based on the user configured set of features (e.g., +sse4).
Definition: Mips.h:299
static const char *const GCCRegNames[]
Definition: X86.cpp:44
typedef void* __builtin_va_list;
Definition: TargetInfo.h:186
Exposes information about the current target.
Definition: TargetInfo.h:54
virtual bool initFeatureMap(llvm::StringMap< bool > &Features, DiagnosticsEngine &Diags, StringRef CPU, const std::vector< std::string > &FeatureVec) const
Initialize the map with the default set of target features for the CPU this should include all legal ...
Definition: TargetInfo.cpp:385
bool setCPU(const std::string &Name) override
Target the specified CPU.
Definition: Mips.h:165
bool isFP64Default() const
Definition: Mips.h:84
bool hasInt128Type() const override
Determine whether the __int128 type is supported on this target.
Definition: Mips.h:392
bool isIEEE754_2008Default() const
Definition: Mips.h:80
bool initFeatureMap(llvm::StringMap< bool > &Features, DiagnosticsEngine &Diags, StringRef CPU, const std::vector< std::string > &FeaturesVec) const override
Initialize the map with the default set of target features for the CPU this should include all legal ...
Definition: Mips.h:172
bool isCLZForZeroUndef() const override
The __builtin_clz* and __builtin_ctz* built-in functions are specified to have undefined results for ...
Definition: Mips.h:358
#define false
Definition: stdbool.h:33
Defines the clang::TargetOptions class.
StringRef getABI() const override
Get the ABI currently in use.
Definition: Mips.h:92
const std::string & getCPU() const
Definition: Mips.h:170
Dataflow Directional Tag Classes.
ArrayRef< TargetInfo::GCCRegAlias > getGCCRegAliases() const override
Definition: Mips.h:360
bool isNan2008() const override
Returns true if NaN encoding is IEEE 754-2008.
Definition: Mips.h:88
BuiltinVaListKind
The different kinds of __builtin_va_list types defined by the target implementation.
Definition: TargetInfo.h:181
bool setABI(const std::string &Name) override
Use the specified ABI.
Definition: Mips.h:94
Defines the clang::TargetInfo interface.
__DEVICE__ int max(int __a, int __b)
bool validateAsmConstraint(const char *&Name, TargetInfo::ConstraintInfo &Info) const override
Definition: Mips.h:224
MipsTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
Definition: Mips.h:64
virtual std::string convertConstraint(const char *&Constraint) const
Definition: TargetInfo.h:932