clang 23.0.0git
riscv_crypto.h
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1/*===---- riscv_crypto.h - RISC-V Zk* intrinsics ---------------------------===
2 *
3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 * See https://llvm.org/LICENSE.txt for license information.
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 *
7 *===-----------------------------------------------------------------------===
8 */
9
10#ifndef __RISCV_CRYPTO_H
11#define __RISCV_CRYPTO_H
12
13#include <stdint.h>
14
15#if defined(__cplusplus)
16extern "C" {
17#endif
18
19#define __riscv_intrinsic_zkn 1
20#define __riscv_intrinsic_zknd 1
21#define __riscv_intrinsic_zkne 1
22#define __riscv_intrinsic_zknh 1
23#define __riscv_intrinsic_zks 1
24#define __riscv_intrinsic_zksed 1
25#define __riscv_intrinsic_zksh 1
26
27#if defined(__riscv_zknd)
28#if __riscv_xlen == 32
29#define __riscv_aes32dsi(x, y, bs) __builtin_riscv_aes32dsi(x, y, bs)
30#define __riscv_aes32dsmi(x, y, bs) __builtin_riscv_aes32dsmi(x, y, bs)
31#endif
32
33#if __riscv_xlen == 64
34static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
35__riscv_aes64ds(uint64_t __x, uint64_t __y) {
36 return __builtin_riscv_aes64ds(__x, __y);
37}
38
39static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
40__riscv_aes64dsm(uint64_t __x, uint64_t __y) {
41 return __builtin_riscv_aes64dsm(__x, __y);
42}
43
44static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
45__riscv_aes64im(uint64_t __x) {
46 return __builtin_riscv_aes64im(__x);
47}
48#endif
49#endif // defined(__riscv_zknd)
50
51#if defined(__riscv_zkne)
52#if __riscv_xlen == 32
53#define __riscv_aes32esi(x, y, bs) __builtin_riscv_aes32esi(x, y, bs)
54#define __riscv_aes32esmi(x, y, bs) __builtin_riscv_aes32esmi(x, y, bs)
55#endif
56
57#if __riscv_xlen == 64
58static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
59__riscv_aes64es(uint64_t __x, uint64_t __y) {
60 return __builtin_riscv_aes64es(__x, __y);
61}
62
63static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
64__riscv_aes64esm(uint64_t __x, uint64_t __y) {
65 return __builtin_riscv_aes64esm(__x, __y);
66}
67#endif
68#endif // defined(__riscv_zkne)
69
70#if defined(__riscv_zknd) || defined(__riscv_zkne)
71#if __riscv_xlen == 64
72#define __riscv_aes64ks1i(x, rnum) __builtin_riscv_aes64ks1i(x, rnum)
73
74static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
75__riscv_aes64ks2(uint64_t __x, uint64_t __y) {
76 return __builtin_riscv_aes64ks2(__x, __y);
77}
78#endif
79#endif // defined(__riscv_zknd) || defined(__riscv_zkne)
80
81#if defined(__riscv_zknh)
82static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
83__riscv_sha256sig0(uint32_t __x) {
84 return __builtin_riscv_sha256sig0(__x);
85}
86
87static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
88__riscv_sha256sig1(uint32_t __x) {
89 return __builtin_riscv_sha256sig1(__x);
90}
91
92static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
93__riscv_sha256sum0(uint32_t __x) {
94 return __builtin_riscv_sha256sum0(__x);
95}
96
97static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
98__riscv_sha256sum1(uint32_t __x) {
99 return __builtin_riscv_sha256sum1(__x);
100}
101
102#if __riscv_xlen == 32
103static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
104__riscv_sha512sig0h(uint32_t __x, uint32_t __y) {
105 return __builtin_riscv_sha512sig0h(__x, __y);
106}
107
108static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
109__riscv_sha512sig0l(uint32_t __x, uint32_t __y) {
110 return __builtin_riscv_sha512sig0l(__x, __y);
111}
112
113static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
114__riscv_sha512sig1h(uint32_t __x, uint32_t __y) {
115 return __builtin_riscv_sha512sig1h(__x, __y);
116}
117
118static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
119__riscv_sha512sig1l(uint32_t __x, uint32_t __y) {
120 return __builtin_riscv_sha512sig1l(__x, __y);
121}
122
123static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
124__riscv_sha512sum0r(uint32_t __x, uint32_t __y) {
125 return __builtin_riscv_sha512sum0r(__x, __y);
126}
127
128static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
129__riscv_sha512sum1r(uint32_t __x, uint32_t __y) {
130 return __builtin_riscv_sha512sum1r(__x, __y);
131}
132#endif
133
134#if __riscv_xlen == 64
135static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
136__riscv_sha512sig0(uint64_t __x) {
137 return __builtin_riscv_sha512sig0(__x);
138}
139
140static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
141__riscv_sha512sig1(uint64_t __x) {
142 return __builtin_riscv_sha512sig1(__x);
143}
144
145static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
146__riscv_sha512sum0(uint64_t __x) {
147 return __builtin_riscv_sha512sum0(__x);
148}
149
150static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
151__riscv_sha512sum1(uint64_t __x) {
152 return __builtin_riscv_sha512sum1(__x);
153}
154#endif
155#endif // defined(__riscv_zknh)
156
157#if defined(__riscv_zksh)
158static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
159__riscv_sm3p0(uint32_t __x) {
160 return __builtin_riscv_sm3p0(__x);
161}
162
163static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
164__riscv_sm3p1(uint32_t __x) {
165 return __builtin_riscv_sm3p1(__x);
166}
167#endif // defined(__riscv_zksh)
168
169#if defined(__riscv_zksed)
170#define __riscv_sm4ed(x, y, bs) __builtin_riscv_sm4ed(x, y, bs);
171#define __riscv_sm4ks(x, y, bs) __builtin_riscv_sm4ks(x, y, bs);
172#endif // defined(__riscv_zksed)
173
174#if defined(__cplusplus)
175}
176#endif
177
178#endif
_Float16 __2f16 __attribute__((ext_vector_type(2)))
Zeroes the upper 128 bits (bits 255:128) of all YMM registers.
static __inline__ uint32_t uint32_t __y
Definition arm_acle.h:132