10#ifndef __RISCV_BITMANIP_H
11#define __RISCV_BITMANIP_H
15#if defined(__cplusplus)
19#define __riscv_intrinsic_b 1
20#define __riscv_intrinsic_zbb 1
21#define __riscv_intrinsic_zbc 1
22#define __riscv_intrinsic_zbkb 1
23#define __riscv_intrinsic_zbkc 1
24#define __riscv_intrinsic_zbkx 1
26#if defined(__riscv_zbb)
29 return __builtin_riscv_orc_b_32(__x);
32static __inline__
unsigned __attribute__((__always_inline__, __nodebug__))
34 return __builtin_riscv_clz_32(__x);
37static __inline__
unsigned __attribute__((__always_inline__, __nodebug__))
39 return __builtin_riscv_ctz_32(__x);
42static __inline__
unsigned __attribute__((__always_inline__, __nodebug__))
44 return __builtin_popcount(__x);
48static __inline__ uint64_t
__attribute__((__always_inline__, __nodebug__))
49__riscv_orc_b_64(uint64_t __x) {
50 return __builtin_riscv_orc_b_64(__x);
53static __inline__
unsigned __attribute__((__always_inline__, __nodebug__))
54__riscv_clz_64(uint64_t __x) {
55 return __builtin_riscv_clz_64(__x);
58static __inline__
unsigned __attribute__((__always_inline__, __nodebug__))
59__riscv_ctz_64(uint64_t __x) {
60 return __builtin_riscv_ctz_64(__x);
63static __inline__
unsigned __attribute__((__always_inline__, __nodebug__))
64__riscv_cpop_64(uint64_t __x) {
65 return __builtin_popcountll(__x);
70#if defined(__riscv_zbb) || defined(__riscv_zbkb)
73 return __builtin_bswap32(__x);
78 return __builtin_rotateleft32(__x,
__y);
83 return __builtin_rotateright32(__x,
__y);
87static __inline__ uint64_t
__attribute__((__always_inline__, __nodebug__))
88__riscv_rev8_64(uint64_t __x) {
89 return __builtin_bswap64(__x);
92static __inline__ uint64_t
__attribute__((__always_inline__, __nodebug__))
94 return __builtin_rotateleft64(__x,
__y);
97static __inline__ uint64_t
__attribute__((__always_inline__, __nodebug__))
99 return __builtin_rotateright64(__x,
__y);
104#if defined(__riscv_zbkb)
107 return __builtin_riscv_brev8_32(__x);
110#if __riscv_xlen == 64
111static __inline__ uint64_t
__attribute__((__always_inline__, __nodebug__))
112__riscv_brev8_64(uint64_t __x) {
113 return __builtin_riscv_brev8_64(__x);
117#if __riscv_xlen == 32
120 return __builtin_riscv_unzip_32(__x);
125 return __builtin_riscv_zip_32(__x);
130#if defined(__riscv_zbc)
131#if __riscv_xlen == 32
134 return __builtin_riscv_clmulr_32(__x,
__y);
138#if __riscv_xlen == 64
139static __inline__ uint64_t
__attribute__((__always_inline__, __nodebug__))
140__riscv_clmulr_64(uint64_t __x, uint64_t
__y) {
141 return __builtin_riscv_clmulr_64(__x,
__y);
146#if defined(__riscv_zbkc) || defined(__riscv_zbc)
149 return __builtin_riscv_clmul_32(__x,
__y);
152#if __riscv_xlen == 32
155 return __builtin_riscv_clmulh_32(__x,
__y);
159#if __riscv_xlen == 64
160static __inline__ uint64_t
__attribute__((__always_inline__, __nodebug__))
161__riscv_clmul_64(uint64_t __x, uint64_t
__y) {
162 return __builtin_riscv_clmul_64(__x,
__y);
165static __inline__ uint64_t
__attribute__((__always_inline__, __nodebug__))
166__riscv_clmulh_64(uint64_t __x, uint64_t
__y) {
167 return __builtin_riscv_clmulh_64(__x,
__y);
172#if defined(__riscv_zbkx)
173#if __riscv_xlen == 32
176 return __builtin_riscv_xperm4_32(__x,
__y);
181 return __builtin_riscv_xperm8_32(__x,
__y);
185#if __riscv_xlen == 64
186static __inline__ uint64_t
__attribute__((__always_inline__, __nodebug__))
187__riscv_xperm4_64(uint64_t __x, uint64_t
__y) {
188 return __builtin_riscv_xperm4_64(__x,
__y);
191static __inline__ uint64_t
__attribute__((__always_inline__, __nodebug__))
192__riscv_xperm8_64(uint64_t __x, uint64_t
__y) {
193 return __builtin_riscv_xperm8_64(__x,
__y);
198#if defined(__cplusplus)
_Float16 __2f16 __attribute__((ext_vector_type(2)))
Zeroes the upper 128 bits (bits 255:128) of all YMM registers.
static __inline__ uint32_t uint32_t __y
__packed_splat4 __packed_splat2 __packed_splat8 __packed_splat4 __packed_splat2 __packed_splat4 __packed_splat2 __packed_splat8 __packed_splat4 uint32_t