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avx512dqintrin.h
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1 /*===---- avx512dqintrin.h - AVX512DQ intrinsics ---------------------------===
2  *
3  * Permission is hereby granted, free of charge, to any person obtaining a copy
4  * of this software and associated documentation files (the "Software"), to deal
5  * in the Software without restriction, including without limitation the rights
6  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
7  * copies of the Software, and to permit persons to whom the Software is
8  * furnished to do so, subject to the following conditions:
9  *
10  * The above copyright notice and this permission notice shall be included in
11  * all copies or substantial portions of the Software.
12  *
13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
16  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
17  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
18  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
19  * THE SOFTWARE.
20  *
21  *===-----------------------------------------------------------------------===
22  */
23 
24 #ifndef __IMMINTRIN_H
25 #error "Never use <avx512dqintrin.h> directly; include <immintrin.h> instead."
26 #endif
27 
28 #ifndef __AVX512DQINTRIN_H
29 #define __AVX512DQINTRIN_H
30 
31 /* Define the default attributes for the functions in this file. */
32 #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx512dq")))
33 
34 static __inline__ __m512i __DEFAULT_FN_ATTRS
35 _mm512_mullo_epi64 (__m512i __A, __m512i __B) {
36  return (__m512i) ((__v8du) __A * (__v8du) __B);
37 }
38 
39 static __inline__ __m512i __DEFAULT_FN_ATTRS
40 _mm512_mask_mullo_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) {
41  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
42  (__v8di)_mm512_mullo_epi64(__A, __B),
43  (__v8di)__W);
44 }
45 
46 static __inline__ __m512i __DEFAULT_FN_ATTRS
47 _mm512_maskz_mullo_epi64(__mmask8 __U, __m512i __A, __m512i __B) {
48  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
49  (__v8di)_mm512_mullo_epi64(__A, __B),
50  (__v8di)_mm512_setzero_si512());
51 }
52 
53 static __inline__ __m512d __DEFAULT_FN_ATTRS
54 _mm512_xor_pd(__m512d __A, __m512d __B) {
55  return (__m512d)((__v8du)__A ^ (__v8du)__B);
56 }
57 
58 static __inline__ __m512d __DEFAULT_FN_ATTRS
59 _mm512_mask_xor_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {
60  return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
61  (__v8df)_mm512_xor_pd(__A, __B),
62  (__v8df)__W);
63 }
64 
65 static __inline__ __m512d __DEFAULT_FN_ATTRS
66 _mm512_maskz_xor_pd(__mmask8 __U, __m512d __A, __m512d __B) {
67  return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
68  (__v8df)_mm512_xor_pd(__A, __B),
69  (__v8df)_mm512_setzero_pd());
70 }
71 
72 static __inline__ __m512 __DEFAULT_FN_ATTRS
73 _mm512_xor_ps (__m512 __A, __m512 __B) {
74  return (__m512)((__v16su)__A ^ (__v16su)__B);
75 }
76 
77 static __inline__ __m512 __DEFAULT_FN_ATTRS
78 _mm512_mask_xor_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {
79  return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
80  (__v16sf)_mm512_xor_ps(__A, __B),
81  (__v16sf)__W);
82 }
83 
84 static __inline__ __m512 __DEFAULT_FN_ATTRS
85 _mm512_maskz_xor_ps(__mmask16 __U, __m512 __A, __m512 __B) {
86  return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
87  (__v16sf)_mm512_xor_ps(__A, __B),
88  (__v16sf)_mm512_setzero_ps());
89 }
90 
91 static __inline__ __m512d __DEFAULT_FN_ATTRS
92 _mm512_or_pd(__m512d __A, __m512d __B) {
93  return (__m512d)((__v8du)__A | (__v8du)__B);
94 }
95 
96 static __inline__ __m512d __DEFAULT_FN_ATTRS
97 _mm512_mask_or_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {
98  return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
99  (__v8df)_mm512_or_pd(__A, __B),
100  (__v8df)__W);
101 }
102 
103 static __inline__ __m512d __DEFAULT_FN_ATTRS
104 _mm512_maskz_or_pd(__mmask8 __U, __m512d __A, __m512d __B) {
105  return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
106  (__v8df)_mm512_or_pd(__A, __B),
107  (__v8df)_mm512_setzero_pd());
108 }
109 
110 static __inline__ __m512 __DEFAULT_FN_ATTRS
111 _mm512_or_ps(__m512 __A, __m512 __B) {
112  return (__m512)((__v16su)__A | (__v16su)__B);
113 }
114 
115 static __inline__ __m512 __DEFAULT_FN_ATTRS
116 _mm512_mask_or_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {
117  return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
118  (__v16sf)_mm512_or_ps(__A, __B),
119  (__v16sf)__W);
120 }
121 
122 static __inline__ __m512 __DEFAULT_FN_ATTRS
123 _mm512_maskz_or_ps(__mmask16 __U, __m512 __A, __m512 __B) {
124  return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
125  (__v16sf)_mm512_or_ps(__A, __B),
126  (__v16sf)_mm512_setzero_ps());
127 }
128 
129 static __inline__ __m512d __DEFAULT_FN_ATTRS
130 _mm512_and_pd(__m512d __A, __m512d __B) {
131  return (__m512d)((__v8du)__A & (__v8du)__B);
132 }
133 
134 static __inline__ __m512d __DEFAULT_FN_ATTRS
135 _mm512_mask_and_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {
136  return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
137  (__v8df)_mm512_and_pd(__A, __B),
138  (__v8df)__W);
139 }
140 
141 static __inline__ __m512d __DEFAULT_FN_ATTRS
142 _mm512_maskz_and_pd(__mmask8 __U, __m512d __A, __m512d __B) {
143  return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
144  (__v8df)_mm512_and_pd(__A, __B),
145  (__v8df)_mm512_setzero_pd());
146 }
147 
148 static __inline__ __m512 __DEFAULT_FN_ATTRS
149 _mm512_and_ps(__m512 __A, __m512 __B) {
150  return (__m512)((__v16su)__A & (__v16su)__B);
151 }
152 
153 static __inline__ __m512 __DEFAULT_FN_ATTRS
154 _mm512_mask_and_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {
155  return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
156  (__v16sf)_mm512_and_ps(__A, __B),
157  (__v16sf)__W);
158 }
159 
160 static __inline__ __m512 __DEFAULT_FN_ATTRS
161 _mm512_maskz_and_ps(__mmask16 __U, __m512 __A, __m512 __B) {
162  return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
163  (__v16sf)_mm512_and_ps(__A, __B),
164  (__v16sf)_mm512_setzero_ps());
165 }
166 
167 static __inline__ __m512d __DEFAULT_FN_ATTRS
168 _mm512_andnot_pd(__m512d __A, __m512d __B) {
169  return (__m512d)(~(__v8du)__A & (__v8du)__B);
170 }
171 
172 static __inline__ __m512d __DEFAULT_FN_ATTRS
173 _mm512_mask_andnot_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {
174  return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
175  (__v8df)_mm512_andnot_pd(__A, __B),
176  (__v8df)__W);
177 }
178 
179 static __inline__ __m512d __DEFAULT_FN_ATTRS
180 _mm512_maskz_andnot_pd(__mmask8 __U, __m512d __A, __m512d __B) {
181  return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
182  (__v8df)_mm512_andnot_pd(__A, __B),
183  (__v8df)_mm512_setzero_pd());
184 }
185 
186 static __inline__ __m512 __DEFAULT_FN_ATTRS
187 _mm512_andnot_ps(__m512 __A, __m512 __B) {
188  return (__m512)(~(__v16su)__A & (__v16su)__B);
189 }
190 
191 static __inline__ __m512 __DEFAULT_FN_ATTRS
192 _mm512_mask_andnot_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {
193  return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
194  (__v16sf)_mm512_andnot_ps(__A, __B),
195  (__v16sf)__W);
196 }
197 
198 static __inline__ __m512 __DEFAULT_FN_ATTRS
199 _mm512_maskz_andnot_ps(__mmask16 __U, __m512 __A, __m512 __B) {
200  return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
201  (__v16sf)_mm512_andnot_ps(__A, __B),
202  (__v16sf)_mm512_setzero_ps());
203 }
204 
205 static __inline__ __m512i __DEFAULT_FN_ATTRS
206 _mm512_cvtpd_epi64 (__m512d __A) {
207  return (__m512i) __builtin_ia32_cvtpd2qq512_mask ((__v8df) __A,
208  (__v8di) _mm512_setzero_si512(),
209  (__mmask8) -1,
211 }
212 
213 static __inline__ __m512i __DEFAULT_FN_ATTRS
214 _mm512_mask_cvtpd_epi64 (__m512i __W, __mmask8 __U, __m512d __A) {
215  return (__m512i) __builtin_ia32_cvtpd2qq512_mask ((__v8df) __A,
216  (__v8di) __W,
217  (__mmask8) __U,
219 }
220 
221 static __inline__ __m512i __DEFAULT_FN_ATTRS
222 _mm512_maskz_cvtpd_epi64 (__mmask8 __U, __m512d __A) {
223  return (__m512i) __builtin_ia32_cvtpd2qq512_mask ((__v8df) __A,
224  (__v8di) _mm512_setzero_si512(),
225  (__mmask8) __U,
227 }
228 
229 #define _mm512_cvt_roundpd_epi64(A, R) __extension__ ({ \
230  (__m512i)__builtin_ia32_cvtpd2qq512_mask((__v8df)(__m512d)(A), \
231  (__v8di)_mm512_setzero_si512(), \
232  (__mmask8)-1, (int)(R)); })
233 
234 #define _mm512_mask_cvt_roundpd_epi64(W, U, A, R) __extension__ ({ \
235  (__m512i)__builtin_ia32_cvtpd2qq512_mask((__v8df)(__m512d)(A), \
236  (__v8di)(__m512i)(W), \
237  (__mmask8)(U), (int)(R)); })
238 
239 #define _mm512_maskz_cvt_roundpd_epi64(U, A, R) __extension__ ({ \
240  (__m512i)__builtin_ia32_cvtpd2qq512_mask((__v8df)(__m512d)(A), \
241  (__v8di)_mm512_setzero_si512(), \
242  (__mmask8)(U), (int)(R)); })
243 
244 static __inline__ __m512i __DEFAULT_FN_ATTRS
245 _mm512_cvtpd_epu64 (__m512d __A) {
246  return (__m512i) __builtin_ia32_cvtpd2uqq512_mask ((__v8df) __A,
247  (__v8di) _mm512_setzero_si512(),
248  (__mmask8) -1,
250 }
251 
252 static __inline__ __m512i __DEFAULT_FN_ATTRS
253 _mm512_mask_cvtpd_epu64 (__m512i __W, __mmask8 __U, __m512d __A) {
254  return (__m512i) __builtin_ia32_cvtpd2uqq512_mask ((__v8df) __A,
255  (__v8di) __W,
256  (__mmask8) __U,
258 }
259 
260 static __inline__ __m512i __DEFAULT_FN_ATTRS
261 _mm512_maskz_cvtpd_epu64 (__mmask8 __U, __m512d __A) {
262  return (__m512i) __builtin_ia32_cvtpd2uqq512_mask ((__v8df) __A,
263  (__v8di) _mm512_setzero_si512(),
264  (__mmask8) __U,
266 }
267 
268 #define _mm512_cvt_roundpd_epu64(A, R) __extension__ ({ \
269  (__m512i)__builtin_ia32_cvtpd2uqq512_mask((__v8df)(__m512d)(A), \
270  (__v8di)_mm512_setzero_si512(), \
271  (__mmask8)-1, (int)(R)); })
272 
273 #define _mm512_mask_cvt_roundpd_epu64(W, U, A, R) __extension__ ({ \
274  (__m512i)__builtin_ia32_cvtpd2uqq512_mask((__v8df)(__m512d)(A), \
275  (__v8di)(__m512i)(W), \
276  (__mmask8)(U), (int)(R)); })
277 
278 #define _mm512_maskz_cvt_roundpd_epu64(U, A, R) __extension__ ({ \
279  (__m512i)__builtin_ia32_cvtpd2uqq512_mask((__v8df)(__m512d)(A), \
280  (__v8di)_mm512_setzero_si512(), \
281  (__mmask8)(U), (int)(R)); })
282 
283 static __inline__ __m512i __DEFAULT_FN_ATTRS
284 _mm512_cvtps_epi64 (__m256 __A) {
285  return (__m512i) __builtin_ia32_cvtps2qq512_mask ((__v8sf) __A,
286  (__v8di) _mm512_setzero_si512(),
287  (__mmask8) -1,
289 }
290 
291 static __inline__ __m512i __DEFAULT_FN_ATTRS
292 _mm512_mask_cvtps_epi64 (__m512i __W, __mmask8 __U, __m256 __A) {
293  return (__m512i) __builtin_ia32_cvtps2qq512_mask ((__v8sf) __A,
294  (__v8di) __W,
295  (__mmask8) __U,
297 }
298 
299 static __inline__ __m512i __DEFAULT_FN_ATTRS
301  return (__m512i) __builtin_ia32_cvtps2qq512_mask ((__v8sf) __A,
302  (__v8di) _mm512_setzero_si512(),
303  (__mmask8) __U,
305 }
306 
307 #define _mm512_cvt_roundps_epi64(A, R) __extension__ ({ \
308  (__m512i)__builtin_ia32_cvtps2qq512_mask((__v8sf)(__m256)(A), \
309  (__v8di)_mm512_setzero_si512(), \
310  (__mmask8)-1, (int)(R)); })
311 
312 #define _mm512_mask_cvt_roundps_epi64(W, U, A, R) __extension__ ({ \
313  (__m512i)__builtin_ia32_cvtps2qq512_mask((__v8sf)(__m256)(A), \
314  (__v8di)(__m512i)(W), \
315  (__mmask8)(U), (int)(R)); })
316 
317 #define _mm512_maskz_cvt_roundps_epi64(U, A, R) __extension__ ({ \
318  (__m512i)__builtin_ia32_cvtps2qq512_mask((__v8sf)(__m256)(A), \
319  (__v8di)_mm512_setzero_si512(), \
320  (__mmask8)(U), (int)(R)); })
321 
322 static __inline__ __m512i __DEFAULT_FN_ATTRS
323 _mm512_cvtps_epu64 (__m256 __A) {
324  return (__m512i) __builtin_ia32_cvtps2uqq512_mask ((__v8sf) __A,
325  (__v8di) _mm512_setzero_si512(),
326  (__mmask8) -1,
328 }
329 
330 static __inline__ __m512i __DEFAULT_FN_ATTRS
331 _mm512_mask_cvtps_epu64 (__m512i __W, __mmask8 __U, __m256 __A) {
332  return (__m512i) __builtin_ia32_cvtps2uqq512_mask ((__v8sf) __A,
333  (__v8di) __W,
334  (__mmask8) __U,
336 }
337 
338 static __inline__ __m512i __DEFAULT_FN_ATTRS
340  return (__m512i) __builtin_ia32_cvtps2uqq512_mask ((__v8sf) __A,
341  (__v8di) _mm512_setzero_si512(),
342  (__mmask8) __U,
344 }
345 
346 #define _mm512_cvt_roundps_epu64(A, R) __extension__ ({ \
347  (__m512i)__builtin_ia32_cvtps2uqq512_mask((__v8sf)(__m256)(A), \
348  (__v8di)_mm512_setzero_si512(), \
349  (__mmask8)-1, (int)(R)); })
350 
351 #define _mm512_mask_cvt_roundps_epu64(W, U, A, R) __extension__ ({ \
352  (__m512i)__builtin_ia32_cvtps2uqq512_mask((__v8sf)(__m256)(A), \
353  (__v8di)(__m512i)(W), \
354  (__mmask8)(U), (int)(R)); })
355 
356 #define _mm512_maskz_cvt_roundps_epu64(U, A, R) __extension__ ({ \
357  (__m512i)__builtin_ia32_cvtps2uqq512_mask((__v8sf)(__m256)(A), \
358  (__v8di)_mm512_setzero_si512(), \
359  (__mmask8)(U), (int)(R)); })
360 
361 
362 static __inline__ __m512d __DEFAULT_FN_ATTRS
363 _mm512_cvtepi64_pd (__m512i __A) {
364  return (__m512d)__builtin_convertvector((__v8di)__A, __v8df);
365 }
366 
367 static __inline__ __m512d __DEFAULT_FN_ATTRS
368 _mm512_mask_cvtepi64_pd (__m512d __W, __mmask8 __U, __m512i __A) {
369  return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
370  (__v8df)_mm512_cvtepi64_pd(__A),
371  (__v8df)__W);
372 }
373 
374 static __inline__ __m512d __DEFAULT_FN_ATTRS
375 _mm512_maskz_cvtepi64_pd (__mmask8 __U, __m512i __A) {
376  return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
377  (__v8df)_mm512_cvtepi64_pd(__A),
378  (__v8df)_mm512_setzero_pd());
379 }
380 
381 #define _mm512_cvt_roundepi64_pd(A, R) __extension__ ({ \
382  (__m512d)__builtin_ia32_cvtqq2pd512_mask((__v8di)(__m512i)(A), \
383  (__v8df)_mm512_setzero_pd(), \
384  (__mmask8)-1, (int)(R)); })
385 
386 #define _mm512_mask_cvt_roundepi64_pd(W, U, A, R) __extension__ ({ \
387  (__m512d)__builtin_ia32_cvtqq2pd512_mask((__v8di)(__m512i)(A), \
388  (__v8df)(__m512d)(W), \
389  (__mmask8)(U), (int)(R)); })
390 
391 #define _mm512_maskz_cvt_roundepi64_pd(U, A, R) __extension__ ({ \
392  (__m512d)__builtin_ia32_cvtqq2pd512_mask((__v8di)(__m512i)(A), \
393  (__v8df)_mm512_setzero_pd(), \
394  (__mmask8)(U), (int)(R)); })
395 
396 static __inline__ __m256 __DEFAULT_FN_ATTRS
397 _mm512_cvtepi64_ps (__m512i __A) {
398  return (__m256) __builtin_ia32_cvtqq2ps512_mask ((__v8di) __A,
399  (__v8sf) _mm256_setzero_ps(),
400  (__mmask8) -1,
402 }
403 
404 static __inline__ __m256 __DEFAULT_FN_ATTRS
405 _mm512_mask_cvtepi64_ps (__m256 __W, __mmask8 __U, __m512i __A) {
406  return (__m256) __builtin_ia32_cvtqq2ps512_mask ((__v8di) __A,
407  (__v8sf) __W,
408  (__mmask8) __U,
410 }
411 
412 static __inline__ __m256 __DEFAULT_FN_ATTRS
413 _mm512_maskz_cvtepi64_ps (__mmask8 __U, __m512i __A) {
414  return (__m256) __builtin_ia32_cvtqq2ps512_mask ((__v8di) __A,
415  (__v8sf) _mm256_setzero_ps(),
416  (__mmask8) __U,
418 }
419 
420 #define _mm512_cvt_roundepi64_ps(A, R) __extension__ ({ \
421  (__m256)__builtin_ia32_cvtqq2ps512_mask((__v8di)(__m512i)(A), \
422  (__v8sf)_mm256_setzero_ps(), \
423  (__mmask8)-1, (int)(R)); })
424 
425 #define _mm512_mask_cvt_roundepi64_ps(W, U, A, R) __extension__ ({ \
426  (__m256)__builtin_ia32_cvtqq2ps512_mask((__v8di)(__m512i)(A), \
427  (__v8sf)(__m256)(W), (__mmask8)(U), \
428  (int)(R)); })
429 
430 #define _mm512_maskz_cvt_roundepi64_ps(U, A, R) __extension__ ({ \
431  (__m256)__builtin_ia32_cvtqq2ps512_mask((__v8di)(__m512i)(A), \
432  (__v8sf)_mm256_setzero_ps(), \
433  (__mmask8)(U), (int)(R)); })
434 
435 
436 static __inline__ __m512i __DEFAULT_FN_ATTRS
437 _mm512_cvttpd_epi64 (__m512d __A) {
438  return (__m512i) __builtin_ia32_cvttpd2qq512_mask ((__v8df) __A,
439  (__v8di) _mm512_setzero_si512(),
440  (__mmask8) -1,
442 }
443 
444 static __inline__ __m512i __DEFAULT_FN_ATTRS
445 _mm512_mask_cvttpd_epi64 (__m512i __W, __mmask8 __U, __m512d __A) {
446  return (__m512i) __builtin_ia32_cvttpd2qq512_mask ((__v8df) __A,
447  (__v8di) __W,
448  (__mmask8) __U,
450 }
451 
452 static __inline__ __m512i __DEFAULT_FN_ATTRS
454  return (__m512i) __builtin_ia32_cvttpd2qq512_mask ((__v8df) __A,
455  (__v8di) _mm512_setzero_si512(),
456  (__mmask8) __U,
458 }
459 
460 #define _mm512_cvtt_roundpd_epi64(A, R) __extension__ ({ \
461  (__m512i)__builtin_ia32_cvttpd2qq512_mask((__v8df)(__m512d)(A), \
462  (__v8di)_mm512_setzero_si512(), \
463  (__mmask8)-1, (int)(R)); })
464 
465 #define _mm512_mask_cvtt_roundpd_epi64(W, U, A, R) __extension__ ({ \
466  (__m512i)__builtin_ia32_cvttpd2qq512_mask((__v8df)(__m512d)(A), \
467  (__v8di)(__m512i)(W), \
468  (__mmask8)(U), (int)(R)); })
469 
470 #define _mm512_maskz_cvtt_roundpd_epi64(U, A, R) __extension__ ({ \
471  (__m512i)__builtin_ia32_cvttpd2qq512_mask((__v8df)(__m512d)(A), \
472  (__v8di)_mm512_setzero_si512(), \
473  (__mmask8)(U), (int)(R)); })
474 
475 static __inline__ __m512i __DEFAULT_FN_ATTRS
476 _mm512_cvttpd_epu64 (__m512d __A) {
477  return (__m512i) __builtin_ia32_cvttpd2uqq512_mask ((__v8df) __A,
478  (__v8di) _mm512_setzero_si512(),
479  (__mmask8) -1,
481 }
482 
483 static __inline__ __m512i __DEFAULT_FN_ATTRS
484 _mm512_mask_cvttpd_epu64 (__m512i __W, __mmask8 __U, __m512d __A) {
485  return (__m512i) __builtin_ia32_cvttpd2uqq512_mask ((__v8df) __A,
486  (__v8di) __W,
487  (__mmask8) __U,
489 }
490 
491 static __inline__ __m512i __DEFAULT_FN_ATTRS
493  return (__m512i) __builtin_ia32_cvttpd2uqq512_mask ((__v8df) __A,
494  (__v8di) _mm512_setzero_si512(),
495  (__mmask8) __U,
497 }
498 
499 #define _mm512_cvtt_roundpd_epu64(A, R) __extension__ ({ \
500  (__m512i)__builtin_ia32_cvttpd2uqq512_mask((__v8df)(__m512d)(A), \
501  (__v8di)_mm512_setzero_si512(), \
502  (__mmask8)-1, (int)(R)); })
503 
504 #define _mm512_mask_cvtt_roundpd_epu64(W, U, A, R) __extension__ ({ \
505  (__m512i)__builtin_ia32_cvttpd2uqq512_mask((__v8df)(__m512d)(A), \
506  (__v8di)(__m512i)(W), \
507  (__mmask8)(U), (int)(R)); })
508 
509 #define _mm512_maskz_cvtt_roundpd_epu64(U, A, R) __extension__ ({ \
510  (__m512i)__builtin_ia32_cvttpd2uqq512_mask((__v8df)(__m512d)(A), \
511  (__v8di)_mm512_setzero_si512(), \
512  (__mmask8)(U), (int)(R)); })
513 
514 static __inline__ __m512i __DEFAULT_FN_ATTRS
515 _mm512_cvttps_epi64 (__m256 __A) {
516  return (__m512i) __builtin_ia32_cvttps2qq512_mask ((__v8sf) __A,
517  (__v8di) _mm512_setzero_si512(),
518  (__mmask8) -1,
520 }
521 
522 static __inline__ __m512i __DEFAULT_FN_ATTRS
523 _mm512_mask_cvttps_epi64 (__m512i __W, __mmask8 __U, __m256 __A) {
524  return (__m512i) __builtin_ia32_cvttps2qq512_mask ((__v8sf) __A,
525  (__v8di) __W,
526  (__mmask8) __U,
528 }
529 
530 static __inline__ __m512i __DEFAULT_FN_ATTRS
532  return (__m512i) __builtin_ia32_cvttps2qq512_mask ((__v8sf) __A,
533  (__v8di) _mm512_setzero_si512(),
534  (__mmask8) __U,
536 }
537 
538 #define _mm512_cvtt_roundps_epi64(A, R) __extension__ ({ \
539  (__m512i)__builtin_ia32_cvttps2qq512_mask((__v8sf)(__m256)(A), \
540  (__v8di)_mm512_setzero_si512(), \
541  (__mmask8)-1, (int)(R)); })
542 
543 #define _mm512_mask_cvtt_roundps_epi64(W, U, A, R) __extension__ ({ \
544  (__m512i)__builtin_ia32_cvttps2qq512_mask((__v8sf)(__m256)(A), \
545  (__v8di)(__m512i)(W), \
546  (__mmask8)(U), (int)(R)); })
547 
548 #define _mm512_maskz_cvtt_roundps_epi64(U, A, R) __extension__ ({ \
549  (__m512i)__builtin_ia32_cvttps2qq512_mask((__v8sf)(__m256)(A), \
550  (__v8di)_mm512_setzero_si512(), \
551  (__mmask8)(U), (int)(R)); })
552 
553 static __inline__ __m512i __DEFAULT_FN_ATTRS
554 _mm512_cvttps_epu64 (__m256 __A) {
555  return (__m512i) __builtin_ia32_cvttps2uqq512_mask ((__v8sf) __A,
556  (__v8di) _mm512_setzero_si512(),
557  (__mmask8) -1,
559 }
560 
561 static __inline__ __m512i __DEFAULT_FN_ATTRS
562 _mm512_mask_cvttps_epu64 (__m512i __W, __mmask8 __U, __m256 __A) {
563  return (__m512i) __builtin_ia32_cvttps2uqq512_mask ((__v8sf) __A,
564  (__v8di) __W,
565  (__mmask8) __U,
567 }
568 
569 static __inline__ __m512i __DEFAULT_FN_ATTRS
571  return (__m512i) __builtin_ia32_cvttps2uqq512_mask ((__v8sf) __A,
572  (__v8di) _mm512_setzero_si512(),
573  (__mmask8) __U,
575 }
576 
577 #define _mm512_cvtt_roundps_epu64(A, R) __extension__ ({ \
578  (__m512i)__builtin_ia32_cvttps2uqq512_mask((__v8sf)(__m256)(A), \
579  (__v8di)_mm512_setzero_si512(), \
580  (__mmask8)-1, (int)(R)); })
581 
582 #define _mm512_mask_cvtt_roundps_epu64(W, U, A, R) __extension__ ({ \
583  (__m512i)__builtin_ia32_cvttps2uqq512_mask((__v8sf)(__m256)(A), \
584  (__v8di)(__m512i)(W), \
585  (__mmask8)(U), (int)(R)); })
586 
587 #define _mm512_maskz_cvtt_roundps_epu64(U, A, R) __extension__ ({ \
588  (__m512i)__builtin_ia32_cvttps2uqq512_mask((__v8sf)(__m256)(A), \
589  (__v8di)_mm512_setzero_si512(), \
590  (__mmask8)(U), (int)(R)); })
591 
592 static __inline__ __m512d __DEFAULT_FN_ATTRS
593 _mm512_cvtepu64_pd (__m512i __A) {
594  return (__m512d)__builtin_convertvector((__v8du)__A, __v8df);
595 }
596 
597 static __inline__ __m512d __DEFAULT_FN_ATTRS
598 _mm512_mask_cvtepu64_pd (__m512d __W, __mmask8 __U, __m512i __A) {
599  return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
600  (__v8df)_mm512_cvtepu64_pd(__A),
601  (__v8df)__W);
602 }
603 
604 static __inline__ __m512d __DEFAULT_FN_ATTRS
605 _mm512_maskz_cvtepu64_pd (__mmask8 __U, __m512i __A) {
606  return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
607  (__v8df)_mm512_cvtepu64_pd(__A),
608  (__v8df)_mm512_setzero_pd());
609 }
610 
611 #define _mm512_cvt_roundepu64_pd(A, R) __extension__ ({ \
612  (__m512d)__builtin_ia32_cvtuqq2pd512_mask((__v8di)(__m512i)(A), \
613  (__v8df)_mm512_setzero_pd(), \
614  (__mmask8)-1, (int)(R)); })
615 
616 #define _mm512_mask_cvt_roundepu64_pd(W, U, A, R) __extension__ ({ \
617  (__m512d)__builtin_ia32_cvtuqq2pd512_mask((__v8di)(__m512i)(A), \
618  (__v8df)(__m512d)(W), \
619  (__mmask8)(U), (int)(R)); })
620 
621 
622 #define _mm512_maskz_cvt_roundepu64_pd(U, A, R) __extension__ ({ \
623  (__m512d)__builtin_ia32_cvtuqq2pd512_mask((__v8di)(__m512i)(A), \
624  (__v8df)_mm512_setzero_pd(), \
625  (__mmask8)(U), (int)(R)); })
626 
627 
628 static __inline__ __m256 __DEFAULT_FN_ATTRS
629 _mm512_cvtepu64_ps (__m512i __A) {
630  return (__m256) __builtin_ia32_cvtuqq2ps512_mask ((__v8di) __A,
631  (__v8sf) _mm256_setzero_ps(),
632  (__mmask8) -1,
634 }
635 
636 static __inline__ __m256 __DEFAULT_FN_ATTRS
637 _mm512_mask_cvtepu64_ps (__m256 __W, __mmask8 __U, __m512i __A) {
638  return (__m256) __builtin_ia32_cvtuqq2ps512_mask ((__v8di) __A,
639  (__v8sf) __W,
640  (__mmask8) __U,
642 }
643 
644 static __inline__ __m256 __DEFAULT_FN_ATTRS
645 _mm512_maskz_cvtepu64_ps (__mmask8 __U, __m512i __A) {
646  return (__m256) __builtin_ia32_cvtuqq2ps512_mask ((__v8di) __A,
647  (__v8sf) _mm256_setzero_ps(),
648  (__mmask8) __U,
650 }
651 
652 #define _mm512_cvt_roundepu64_ps(A, R) __extension__ ({ \
653  (__m256)__builtin_ia32_cvtuqq2ps512_mask((__v8di)(__m512i)(A), \
654  (__v8sf)_mm256_setzero_ps(), \
655  (__mmask8)-1, (int)(R)); })
656 
657 #define _mm512_mask_cvt_roundepu64_ps(W, U, A, R) __extension__ ({ \
658  (__m256)__builtin_ia32_cvtuqq2ps512_mask((__v8di)(__m512i)(A), \
659  (__v8sf)(__m256)(W), (__mmask8)(U), \
660  (int)(R)); })
661 
662 #define _mm512_maskz_cvt_roundepu64_ps(U, A, R) __extension__ ({ \
663  (__m256)__builtin_ia32_cvtuqq2ps512_mask((__v8di)(__m512i)(A), \
664  (__v8sf)_mm256_setzero_ps(), \
665  (__mmask8)(U), (int)(R)); })
666 
667 #define _mm512_range_pd(A, B, C) __extension__ ({ \
668  (__m512d)__builtin_ia32_rangepd512_mask((__v8df)(__m512d)(A), \
669  (__v8df)(__m512d)(B), (int)(C), \
670  (__v8df)_mm512_setzero_pd(), \
671  (__mmask8)-1, \
672  _MM_FROUND_CUR_DIRECTION); })
673 
674 #define _mm512_mask_range_pd(W, U, A, B, C) __extension__ ({ \
675  (__m512d)__builtin_ia32_rangepd512_mask((__v8df)(__m512d)(A), \
676  (__v8df)(__m512d)(B), (int)(C), \
677  (__v8df)(__m512d)(W), (__mmask8)(U), \
678  _MM_FROUND_CUR_DIRECTION); })
679 
680 #define _mm512_maskz_range_pd(U, A, B, C) __extension__ ({ \
681  (__m512d)__builtin_ia32_rangepd512_mask((__v8df)(__m512d)(A), \
682  (__v8df)(__m512d)(B), (int)(C), \
683  (__v8df)_mm512_setzero_pd(), \
684  (__mmask8)(U), \
685  _MM_FROUND_CUR_DIRECTION); })
686 
687 #define _mm512_range_round_pd(A, B, C, R) __extension__ ({ \
688  (__m512d)__builtin_ia32_rangepd512_mask((__v8df)(__m512d)(A), \
689  (__v8df)(__m512d)(B), (int)(C), \
690  (__v8df)_mm512_setzero_pd(), \
691  (__mmask8)-1, (int)(R)); })
692 
693 #define _mm512_mask_range_round_pd(W, U, A, B, C, R) __extension__ ({ \
694  (__m512d)__builtin_ia32_rangepd512_mask((__v8df)(__m512d)(A), \
695  (__v8df)(__m512d)(B), (int)(C), \
696  (__v8df)(__m512d)(W), (__mmask8)(U), \
697  (int)(R)); })
698 
699 #define _mm512_maskz_range_round_pd(U, A, B, C, R) __extension__ ({ \
700  (__m512d)__builtin_ia32_rangepd512_mask((__v8df)(__m512d)(A), \
701  (__v8df)(__m512d)(B), (int)(C), \
702  (__v8df)_mm512_setzero_pd(), \
703  (__mmask8)(U), (int)(R)); })
704 
705 #define _mm512_range_ps(A, B, C) __extension__ ({ \
706  (__m512)__builtin_ia32_rangeps512_mask((__v16sf)(__m512)(A), \
707  (__v16sf)(__m512)(B), (int)(C), \
708  (__v16sf)_mm512_setzero_ps(), \
709  (__mmask16)-1, \
710  _MM_FROUND_CUR_DIRECTION); })
711 
712 #define _mm512_mask_range_ps(W, U, A, B, C) __extension__ ({ \
713  (__m512)__builtin_ia32_rangeps512_mask((__v16sf)(__m512)(A), \
714  (__v16sf)(__m512)(B), (int)(C), \
715  (__v16sf)(__m512)(W), (__mmask16)(U), \
716  _MM_FROUND_CUR_DIRECTION); })
717 
718 #define _mm512_maskz_range_ps(U, A, B, C) __extension__ ({ \
719  (__m512)__builtin_ia32_rangeps512_mask((__v16sf)(__m512)(A), \
720  (__v16sf)(__m512)(B), (int)(C), \
721  (__v16sf)_mm512_setzero_ps(), \
722  (__mmask16)(U), \
723  _MM_FROUND_CUR_DIRECTION); })
724 
725 #define _mm512_range_round_ps(A, B, C, R) __extension__ ({ \
726  (__m512)__builtin_ia32_rangeps512_mask((__v16sf)(__m512)(A), \
727  (__v16sf)(__m512)(B), (int)(C), \
728  (__v16sf)_mm512_setzero_ps(), \
729  (__mmask16)-1, (int)(R)); })
730 
731 #define _mm512_mask_range_round_ps(W, U, A, B, C, R) __extension__ ({ \
732  (__m512)__builtin_ia32_rangeps512_mask((__v16sf)(__m512)(A), \
733  (__v16sf)(__m512)(B), (int)(C), \
734  (__v16sf)(__m512)(W), (__mmask16)(U), \
735  (int)(R)); })
736 
737 #define _mm512_maskz_range_round_ps(U, A, B, C, R) __extension__ ({ \
738  (__m512)__builtin_ia32_rangeps512_mask((__v16sf)(__m512)(A), \
739  (__v16sf)(__m512)(B), (int)(C), \
740  (__v16sf)_mm512_setzero_ps(), \
741  (__mmask16)(U), (int)(R)); })
742 
743 #define _mm_range_round_ss(A, B, C, R) __extension__ ({ \
744  (__m128)__builtin_ia32_rangess128_round_mask((__v4sf)(__m128)(A), \
745  (__v4sf)(__m128)(B), \
746  (__v4sf)_mm_setzero_ps(), \
747  (__mmask8) -1, (int)(C),\
748  (int)(R)); })
749 
750 #define _mm_range_ss(A ,B , C) _mm_range_round_ss(A, B, C ,_MM_FROUND_CUR_DIRECTION)
751 
752 #define _mm_mask_range_round_ss(W, U, A, B, C, R) __extension__ ({ \
753  (__m128)__builtin_ia32_rangess128_round_mask((__v4sf)(__m128)(A), \
754  (__v4sf)(__m128)(B), \
755  (__v4sf)(__m128)(W),\
756  (__mmask8)(U), (int)(C),\
757  (int)(R)); })
758 
759 #define _mm_mask_range_ss(W , U, A, B, C) _mm_mask_range_round_ss(W, U, A, B, C , _MM_FROUND_CUR_DIRECTION)
760 
761 #define _mm_maskz_range_round_ss(U, A, B, C, R) __extension__ ({ \
762  (__m128)__builtin_ia32_rangess128_round_mask((__v4sf)(__m128)(A), \
763  (__v4sf)(__m128)(B), \
764  (__v4sf)_mm_setzero_ps(), \
765  (__mmask8)(U), (int)(C),\
766  (int)(R)); })
767 
768 #define _mm_maskz_range_ss(U, A ,B , C) _mm_maskz_range_round_ss(U, A, B, C ,_MM_FROUND_CUR_DIRECTION)
769 
770 #define _mm_range_round_sd(A, B, C, R) __extension__ ({ \
771  (__m128d)__builtin_ia32_rangesd128_round_mask((__v2df)(__m128d)(A), \
772  (__v2df)(__m128d)(B), \
773  (__v2df)_mm_setzero_pd(), \
774  (__mmask8) -1, (int)(C),\
775  (int)(R)); })
776 
777 #define _mm_range_sd(A ,B , C) _mm_range_round_sd(A, B, C ,_MM_FROUND_CUR_DIRECTION)
778 
779 #define _mm_mask_range_round_sd(W, U, A, B, C, R) __extension__ ({ \
780  (__m128d)__builtin_ia32_rangesd128_round_mask((__v2df)(__m128d)(A), \
781  (__v2df)(__m128d)(B), \
782  (__v2df)(__m128d)(W),\
783  (__mmask8)(U), (int)(C),\
784  (int)(R)); })
785 
786 #define _mm_mask_range_sd(W, U, A, B, C) _mm_mask_range_round_sd(W, U, A, B, C ,_MM_FROUND_CUR_DIRECTION)
787 
788 #define _mm_maskz_range_round_sd(U, A, B, C, R) __extension__ ({ \
789  (__m128d)__builtin_ia32_rangesd128_round_mask((__v2df)(__m128d)(A), \
790  (__v2df)(__m128d)(B), \
791  (__v2df)_mm_setzero_pd(), \
792  (__mmask8)(U), (int)(C),\
793  (int)(R)); })
794 
795 #define _mm_maskz_range_sd(U, A, B, C) _mm_maskz_range_round_sd(U, A, B, C ,_MM_FROUND_CUR_DIRECTION)
796 
797 #define _mm512_reduce_pd(A, B) __extension__ ({ \
798  (__m512d)__builtin_ia32_reducepd512_mask((__v8df)(__m512d)(A), (int)(B), \
799  (__v8df)_mm512_setzero_pd(), \
800  (__mmask8)-1, \
801  _MM_FROUND_CUR_DIRECTION); })
802 
803 #define _mm512_mask_reduce_pd(W, U, A, B) __extension__ ({ \
804  (__m512d)__builtin_ia32_reducepd512_mask((__v8df)(__m512d)(A), (int)(B), \
805  (__v8df)(__m512d)(W), \
806  (__mmask8)(U), \
807  _MM_FROUND_CUR_DIRECTION); })
808 
809 #define _mm512_maskz_reduce_pd(U, A, B) __extension__ ({ \
810  (__m512d)__builtin_ia32_reducepd512_mask((__v8df)(__m512d)(A), (int)(B), \
811  (__v8df)_mm512_setzero_pd(), \
812  (__mmask8)(U), \
813  _MM_FROUND_CUR_DIRECTION); })
814 
815 #define _mm512_reduce_ps(A, B) __extension__ ({ \
816  (__m512)__builtin_ia32_reduceps512_mask((__v16sf)(__m512)(A), (int)(B), \
817  (__v16sf)_mm512_setzero_ps(), \
818  (__mmask16)-1, \
819  _MM_FROUND_CUR_DIRECTION); })
820 
821 #define _mm512_mask_reduce_ps(W, U, A, B) __extension__ ({ \
822  (__m512)__builtin_ia32_reduceps512_mask((__v16sf)(__m512)(A), (int)(B), \
823  (__v16sf)(__m512)(W), \
824  (__mmask16)(U), \
825  _MM_FROUND_CUR_DIRECTION); })
826 
827 #define _mm512_maskz_reduce_ps(U, A, B) __extension__ ({ \
828  (__m512)__builtin_ia32_reduceps512_mask((__v16sf)(__m512)(A), (int)(B), \
829  (__v16sf)_mm512_setzero_ps(), \
830  (__mmask16)(U), \
831  _MM_FROUND_CUR_DIRECTION); })
832 
833 #define _mm512_reduce_round_pd(A, B, R) __extension__ ({\
834  (__m512d)__builtin_ia32_reducepd512_mask((__v8df)(__m512d)(A), (int)(B), \
835  (__v8df)_mm512_setzero_pd(), \
836  (__mmask8)-1, (int)(R)); })
837 
838 #define _mm512_mask_reduce_round_pd(W, U, A, B, R) __extension__ ({\
839  (__m512d)__builtin_ia32_reducepd512_mask((__v8df)(__m512d)(A), (int)(B), \
840  (__v8df)(__m512d)(W), \
841  (__mmask8)(U), (int)(R)); })
842 
843 #define _mm512_maskz_reduce_round_pd(U, A, B, R) __extension__ ({\
844  (__m512d)__builtin_ia32_reducepd512_mask((__v8df)(__m512d)(A), (int)(B), \
845  (__v8df)_mm512_setzero_pd(), \
846  (__mmask8)(U), (int)(R)); })
847 
848 #define _mm512_reduce_round_ps(A, B, R) __extension__ ({\
849  (__m512)__builtin_ia32_reduceps512_mask((__v16sf)(__m512)(A), (int)(B), \
850  (__v16sf)_mm512_setzero_ps(), \
851  (__mmask16)-1, (int)(R)); })
852 
853 #define _mm512_mask_reduce_round_ps(W, U, A, B, R) __extension__ ({\
854  (__m512)__builtin_ia32_reduceps512_mask((__v16sf)(__m512)(A), (int)(B), \
855  (__v16sf)(__m512)(W), \
856  (__mmask16)(U), (int)(R)); })
857 
858 #define _mm512_maskz_reduce_round_ps(U, A, B, R) __extension__ ({\
859  (__m512)__builtin_ia32_reduceps512_mask((__v16sf)(__m512)(A), (int)(B), \
860  (__v16sf)_mm512_setzero_ps(), \
861  (__mmask16)(U), (int)(R)); })
862 
863 #define _mm_reduce_ss(A, B, C) __extension__ ({ \
864  (__m128)__builtin_ia32_reducess_mask((__v4sf)(__m128)(A), \
865  (__v4sf)(__m128)(B), \
866  (__v4sf)_mm_setzero_ps(), (__mmask8)-1, \
867  (int)(C), _MM_FROUND_CUR_DIRECTION); })
868 
869 #define _mm_mask_reduce_ss(W, U, A, B, C) __extension__ ({ \
870  (__m128)__builtin_ia32_reducess_mask((__v4sf)(__m128)(A), \
871  (__v4sf)(__m128)(B), \
872  (__v4sf)(__m128)(W), (__mmask8)(U), \
873  (int)(C), _MM_FROUND_CUR_DIRECTION); })
874 
875 #define _mm_maskz_reduce_ss(U, A, B, C) __extension__ ({ \
876  (__m128)__builtin_ia32_reducess_mask((__v4sf)(__m128)(A), \
877  (__v4sf)(__m128)(B), \
878  (__v4sf)_mm_setzero_ps(), \
879  (__mmask8)(U), (int)(C), \
880  _MM_FROUND_CUR_DIRECTION); })
881 
882 #define _mm_reduce_round_ss(A, B, C, R) __extension__ ({ \
883  (__m128)__builtin_ia32_reducess_mask((__v4sf)(__m128)(A), \
884  (__v4sf)(__m128)(B), \
885  (__v4sf)_mm_setzero_ps(), (__mmask8)-1, \
886  (int)(C), (int)(R)); })
887 
888 #define _mm_mask_reduce_round_ss(W, U, A, B, C, R) __extension__ ({ \
889  (__m128)__builtin_ia32_reducess_mask((__v4sf)(__m128)(A), \
890  (__v4sf)(__m128)(B), \
891  (__v4sf)(__m128)(W), (__mmask8)(U), \
892  (int)(C), (int)(R)); })
893 
894 #define _mm_maskz_reduce_round_ss(U, A, B, C, R) __extension__ ({ \
895  (__m128)__builtin_ia32_reducess_mask((__v4sf)(__m128)(A), \
896  (__v4sf)(__m128)(B), \
897  (__v4sf)_mm_setzero_ps(), \
898  (__mmask8)(U), (int)(C), (int)(R)); })
899 
900 #define _mm_reduce_sd(A, B, C) __extension__ ({ \
901  (__m128d)__builtin_ia32_reducesd_mask((__v2df)(__m128d)(A), \
902  (__v2df)(__m128d)(B), \
903  (__v2df)_mm_setzero_pd(), \
904  (__mmask8)-1, (int)(C), \
905  _MM_FROUND_CUR_DIRECTION); })
906 
907 #define _mm_mask_reduce_sd(W, U, A, B, C) __extension__ ({ \
908  (__m128d)__builtin_ia32_reducesd_mask((__v2df)(__m128d)(A), \
909  (__v2df)(__m128d)(B), \
910  (__v2df)(__m128d)(W), (__mmask8)(U), \
911  (int)(C), _MM_FROUND_CUR_DIRECTION); })
912 
913 #define _mm_maskz_reduce_sd(U, A, B, C) __extension__ ({ \
914  (__m128d)__builtin_ia32_reducesd_mask((__v2df)(__m128d)(A), \
915  (__v2df)(__m128d)(B), \
916  (__v2df)_mm_setzero_pd(), \
917  (__mmask8)(U), (int)(C), \
918  _MM_FROUND_CUR_DIRECTION); })
919 
920 #define _mm_reduce_round_sd(A, B, C, R) __extension__ ({ \
921  (__m128d)__builtin_ia32_reducesd_mask((__v2df)(__m128d)(A), \
922  (__v2df)(__m128d)(B), \
923  (__v2df)_mm_setzero_pd(), \
924  (__mmask8)-1, (int)(C), (int)(R)); })
925 
926 #define _mm_mask_reduce_round_sd(W, U, A, B, C, R) __extension__ ({ \
927  (__m128d)__builtin_ia32_reducesd_mask((__v2df)(__m128d)(A), \
928  (__v2df)(__m128d)(B), \
929  (__v2df)(__m128d)(W), (__mmask8)(U), \
930  (int)(C), (int)(R)); })
931 
932 #define _mm_maskz_reduce_round_sd(U, A, B, C, R) __extension__ ({ \
933  (__m128d)__builtin_ia32_reducesd_mask((__v2df)(__m128d)(A), \
934  (__v2df)(__m128d)(B), \
935  (__v2df)_mm_setzero_pd(), \
936  (__mmask8)(U), (int)(C), (int)(R)); })
937 
938 static __inline__ __mmask16 __DEFAULT_FN_ATTRS
939 _mm512_movepi32_mask (__m512i __A)
940 {
941  return (__mmask16) __builtin_ia32_cvtd2mask512 ((__v16si) __A);
942 }
943 
944 static __inline__ __m512i __DEFAULT_FN_ATTRS
946 {
947  return (__m512i) __builtin_ia32_cvtmask2d512 (__A);
948 }
949 
950 static __inline__ __m512i __DEFAULT_FN_ATTRS
952 {
953  return (__m512i) __builtin_ia32_cvtmask2q512 (__A);
954 }
955 
956 static __inline__ __mmask8 __DEFAULT_FN_ATTRS
957 _mm512_movepi64_mask (__m512i __A)
958 {
959  return (__mmask8) __builtin_ia32_cvtq2mask512 ((__v8di) __A);
960 }
961 
962 
963 static __inline__ __m512 __DEFAULT_FN_ATTRS
965 {
966  return (__m512)__builtin_shufflevector((__v4sf)__A,
967  (__v4sf)_mm_undefined_ps(),
968  0, 1, 0, 1, 0, 1, 0, 1,
969  0, 1, 0, 1, 0, 1, 0, 1);
970 }
971 
972 static __inline__ __m512 __DEFAULT_FN_ATTRS
973 _mm512_mask_broadcast_f32x2 (__m512 __O, __mmask16 __M, __m128 __A)
974 {
975  return (__m512)__builtin_ia32_selectps_512((__mmask16)__M,
976  (__v16sf)_mm512_broadcast_f32x2(__A),
977  (__v16sf)__O);
978 }
979 
980 static __inline__ __m512 __DEFAULT_FN_ATTRS
982 {
983  return (__m512)__builtin_ia32_selectps_512((__mmask16)__M,
984  (__v16sf)_mm512_broadcast_f32x2(__A),
985  (__v16sf)_mm512_setzero_ps());
986 }
987 
988 static __inline__ __m512 __DEFAULT_FN_ATTRS
990 {
991  return (__m512)__builtin_shufflevector((__v8sf)__A, (__v8sf)__A,
992  0, 1, 2, 3, 4, 5, 6, 7,
993  0, 1, 2, 3, 4, 5, 6, 7);
994 }
995 
996 static __inline__ __m512 __DEFAULT_FN_ATTRS
997 _mm512_mask_broadcast_f32x8(__m512 __O, __mmask16 __M, __m256 __A)
998 {
999  return (__m512)__builtin_ia32_selectps_512((__mmask8)__M,
1000  (__v16sf)_mm512_broadcast_f32x8(__A),
1001  (__v16sf)__O);
1002 }
1003 
1004 static __inline__ __m512 __DEFAULT_FN_ATTRS
1006 {
1007  return (__m512)__builtin_ia32_selectps_512((__mmask8)__M,
1008  (__v16sf)_mm512_broadcast_f32x8(__A),
1009  (__v16sf)_mm512_setzero_ps());
1010 }
1011 
1012 static __inline__ __m512d __DEFAULT_FN_ATTRS
1014 {
1015  return (__m512d)__builtin_shufflevector((__v2df)__A, (__v2df)__A,
1016  0, 1, 0, 1, 0, 1, 0, 1);
1017 }
1018 
1019 static __inline__ __m512d __DEFAULT_FN_ATTRS
1020 _mm512_mask_broadcast_f64x2(__m512d __O, __mmask8 __M, __m128d __A)
1021 {
1022  return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__M,
1023  (__v8df)_mm512_broadcast_f64x2(__A),
1024  (__v8df)__O);
1025 }
1026 
1027 static __inline__ __m512d __DEFAULT_FN_ATTRS
1029 {
1030  return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__M,
1031  (__v8df)_mm512_broadcast_f64x2(__A),
1032  (__v8df)_mm512_setzero_pd());
1033 }
1034 
1035 static __inline__ __m512i __DEFAULT_FN_ATTRS
1037 {
1038  return (__m512i)__builtin_shufflevector((__v4si)__A,
1039  (__v4si)_mm_undefined_si128(),
1040  0, 1, 0, 1, 0, 1, 0, 1,
1041  0, 1, 0, 1, 0, 1, 0, 1);
1042 }
1043 
1044 static __inline__ __m512i __DEFAULT_FN_ATTRS
1045 _mm512_mask_broadcast_i32x2 (__m512i __O, __mmask16 __M, __m128i __A)
1046 {
1047  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
1048  (__v16si)_mm512_broadcast_i32x2(__A),
1049  (__v16si)__O);
1050 }
1051 
1052 static __inline__ __m512i __DEFAULT_FN_ATTRS
1054 {
1055  return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
1056  (__v16si)_mm512_broadcast_i32x2(__A),
1057  (__v16si)_mm512_setzero_si512());
1058 }
1059 
1060 static __inline__ __m512i __DEFAULT_FN_ATTRS
1062 {
1063  return (__m512i)__builtin_shufflevector((__v8si)__A, (__v8si)__A,
1064  0, 1, 2, 3, 4, 5, 6, 7,
1065  0, 1, 2, 3, 4, 5, 6, 7);
1066 }
1067 
1068 static __inline__ __m512i __DEFAULT_FN_ATTRS
1069 _mm512_mask_broadcast_i32x8(__m512i __O, __mmask16 __M, __m256i __A)
1070 {
1071  return (__m512i)__builtin_ia32_selectd_512((__mmask8)__M,
1072  (__v16si)_mm512_broadcast_i32x8(__A),
1073  (__v16si)__O);
1074 }
1075 
1076 static __inline__ __m512i __DEFAULT_FN_ATTRS
1078 {
1079  return (__m512i)__builtin_ia32_selectd_512((__mmask8)__M,
1080  (__v16si)_mm512_broadcast_i32x8(__A),
1081  (__v16si)_mm512_setzero_si512());
1082 }
1083 
1084 static __inline__ __m512i __DEFAULT_FN_ATTRS
1086 {
1087  return (__m512i)__builtin_shufflevector((__v2di)__A, (__v2di)__A,
1088  0, 1, 0, 1, 0, 1, 0, 1);
1089 }
1090 
1091 static __inline__ __m512i __DEFAULT_FN_ATTRS
1092 _mm512_mask_broadcast_i64x2(__m512i __O, __mmask8 __M, __m128i __A)
1093 {
1094  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
1095  (__v8di)_mm512_broadcast_i64x2(__A),
1096  (__v8di)__O);
1097 }
1098 
1099 static __inline__ __m512i __DEFAULT_FN_ATTRS
1101 {
1102  return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
1103  (__v8di)_mm512_broadcast_i64x2(__A),
1104  (__v8di)_mm512_setzero_si512());
1105 }
1106 
1107 #define _mm512_extractf32x8_ps(A, imm) __extension__ ({ \
1108  (__m256)__builtin_shufflevector((__v16sf)(__m512)(A), \
1109  (__v16sf)_mm512_undefined_ps(), \
1110  ((imm) & 1) ? 8 : 0, \
1111  ((imm) & 1) ? 9 : 1, \
1112  ((imm) & 1) ? 10 : 2, \
1113  ((imm) & 1) ? 11 : 3, \
1114  ((imm) & 1) ? 12 : 4, \
1115  ((imm) & 1) ? 13 : 5, \
1116  ((imm) & 1) ? 14 : 6, \
1117  ((imm) & 1) ? 15 : 7); })
1118 
1119 #define _mm512_mask_extractf32x8_ps(W, U, A, imm) __extension__ ({ \
1120  (__m256)__builtin_ia32_selectps_256((__mmask8)(U), \
1121  (__v8sf)_mm512_extractf32x8_ps((A), (imm)), \
1122  (__v8sf)(W)); })
1123 
1124 #define _mm512_maskz_extractf32x8_ps(U, A, imm) __extension__ ({ \
1125  (__m256)__builtin_ia32_selectps_256((__mmask8)(U), \
1126  (__v8sf)_mm512_extractf32x8_ps((A), (imm)), \
1127  (__v8sf)_mm256_setzero_ps()); })
1128 
1129 #define _mm512_extractf64x2_pd(A, imm) __extension__ ({ \
1130  (__m128d)__builtin_shufflevector((__v8df)(__m512d)(A), \
1131  (__v8df)_mm512_undefined_pd(), \
1132  0 + ((imm) & 0x3) * 2, \
1133  1 + ((imm) & 0x3) * 2); })
1134 
1135 #define _mm512_mask_extractf64x2_pd(W, U, A, imm) __extension__ ({ \
1136  (__m128d)__builtin_ia32_selectpd_128((__mmask8)(U), \
1137  (__v2df)_mm512_extractf64x2_pd((A), (imm)), \
1138  (__v2df)(W)); })
1139 
1140 #define _mm512_maskz_extractf64x2_pd(U, A, imm) __extension__ ({ \
1141  (__m128d)__builtin_ia32_selectpd_128((__mmask8)(U), \
1142  (__v2df)_mm512_extractf64x2_pd((A), (imm)), \
1143  (__v2df)_mm_setzero_pd()); })
1144 
1145 #define _mm512_extracti32x8_epi32(A, imm) __extension__ ({ \
1146  (__m256i)__builtin_shufflevector((__v16si)(__m512i)(A), \
1147  (__v16si)_mm512_undefined_epi32(), \
1148  ((imm) & 1) ? 8 : 0, \
1149  ((imm) & 1) ? 9 : 1, \
1150  ((imm) & 1) ? 10 : 2, \
1151  ((imm) & 1) ? 11 : 3, \
1152  ((imm) & 1) ? 12 : 4, \
1153  ((imm) & 1) ? 13 : 5, \
1154  ((imm) & 1) ? 14 : 6, \
1155  ((imm) & 1) ? 15 : 7); })
1156 
1157 #define _mm512_mask_extracti32x8_epi32(W, U, A, imm) __extension__ ({ \
1158  (__m256i)__builtin_ia32_selectd_256((__mmask8)(U), \
1159  (__v8si)_mm512_extracti32x8_epi32((A), (imm)), \
1160  (__v8si)(W)); })
1161 
1162 #define _mm512_maskz_extracti32x8_epi32(U, A, imm) __extension__ ({ \
1163  (__m256i)__builtin_ia32_selectd_256((__mmask8)(U), \
1164  (__v8si)_mm512_extracti32x8_epi32((A), (imm)), \
1165  (__v8si)_mm256_setzero_si256()); })
1166 
1167 #define _mm512_extracti64x2_epi64(A, imm) __extension__ ({ \
1168  (__m128i)__builtin_shufflevector((__v8di)(__m512i)(A), \
1169  (__v8di)_mm512_undefined_epi32(), \
1170  0 + ((imm) & 0x3) * 2, \
1171  1 + ((imm) & 0x3) * 2); })
1172 
1173 #define _mm512_mask_extracti64x2_epi64(W, U, A, imm) __extension__ ({ \
1174  (__m128d)__builtin_ia32_selectq_128((__mmask8)(U), \
1175  (__v2di)_mm512_extracti64x2_epi64((A), (imm)), \
1176  (__v2di)(W)); })
1177 
1178 #define _mm512_maskz_extracti64x2_epi64(U, A, imm) __extension__ ({ \
1179  (__m128d)__builtin_ia32_selectq_128((__mmask8)(U), \
1180  (__v2di)_mm512_extracti64x2_epi64((A), (imm)), \
1181  (__v2di)_mm_setzero_di()); })
1182 
1183 #define _mm512_insertf32x8(A, B, imm) __extension__ ({ \
1184  (__m512)__builtin_shufflevector((__v16sf)(__m512)(A), \
1185  (__v16sf)_mm512_castps256_ps512((__m256)(B)),\
1186  ((imm) & 0x1) ? 0 : 16, \
1187  ((imm) & 0x1) ? 1 : 17, \
1188  ((imm) & 0x1) ? 2 : 18, \
1189  ((imm) & 0x1) ? 3 : 19, \
1190  ((imm) & 0x1) ? 4 : 20, \
1191  ((imm) & 0x1) ? 5 : 21, \
1192  ((imm) & 0x1) ? 6 : 22, \
1193  ((imm) & 0x1) ? 7 : 23, \
1194  ((imm) & 0x1) ? 16 : 8, \
1195  ((imm) & 0x1) ? 17 : 9, \
1196  ((imm) & 0x1) ? 18 : 10, \
1197  ((imm) & 0x1) ? 19 : 11, \
1198  ((imm) & 0x1) ? 20 : 12, \
1199  ((imm) & 0x1) ? 21 : 13, \
1200  ((imm) & 0x1) ? 22 : 14, \
1201  ((imm) & 0x1) ? 23 : 15); })
1202 
1203 #define _mm512_mask_insertf32x8(W, U, A, B, imm) __extension__ ({ \
1204  (__m512)__builtin_ia32_selectps_512((__mmask16)(U), \
1205  (__v16sf)_mm512_insertf32x8((A), (B), (imm)), \
1206  (__v16sf)(W)); })
1207 
1208 #define _mm512_maskz_insertf32x8(U, A, B, imm) __extension__ ({ \
1209  (__m512)__builtin_ia32_selectps_512((__mmask16)(U), \
1210  (__v16sf)_mm512_insertf32x8((A), (B), (imm)), \
1211  (__v16sf)_mm512_setzero_ps()); })
1212 
1213 #define _mm512_insertf64x2(A, B, imm) __extension__ ({ \
1214  (__m512d)__builtin_shufflevector((__v8df)(__m512d)(A), \
1215  (__v8df)_mm512_castpd128_pd512((__m128d)(B)),\
1216  (((imm) & 0x3) == 0) ? 8 : 0, \
1217  (((imm) & 0x3) == 0) ? 9 : 1, \
1218  (((imm) & 0x3) == 1) ? 8 : 2, \
1219  (((imm) & 0x3) == 1) ? 9 : 3, \
1220  (((imm) & 0x3) == 2) ? 8 : 4, \
1221  (((imm) & 0x3) == 2) ? 9 : 5, \
1222  (((imm) & 0x3) == 3) ? 8 : 6, \
1223  (((imm) & 0x3) == 3) ? 9 : 7); })
1224 
1225 #define _mm512_mask_insertf64x2(W, U, A, B, imm) __extension__ ({ \
1226  (__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \
1227  (__v8df)_mm512_insertf64x2((A), (B), (imm)), \
1228  (__v8df)(W)); })
1229 
1230 #define _mm512_maskz_insertf64x2(U, A, B, imm) __extension__ ({ \
1231  (__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \
1232  (__v8df)_mm512_insertf64x2((A), (B), (imm)), \
1233  (__v8df)_mm512_setzero_pd()); })
1234 
1235 #define _mm512_inserti32x8(A, B, imm) __extension__ ({ \
1236  (__m512i)__builtin_shufflevector((__v16si)(__m512i)(A), \
1237  (__v16si)_mm512_castsi256_si512((__m256i)(B)),\
1238  ((imm) & 0x1) ? 0 : 16, \
1239  ((imm) & 0x1) ? 1 : 17, \
1240  ((imm) & 0x1) ? 2 : 18, \
1241  ((imm) & 0x1) ? 3 : 19, \
1242  ((imm) & 0x1) ? 4 : 20, \
1243  ((imm) & 0x1) ? 5 : 21, \
1244  ((imm) & 0x1) ? 6 : 22, \
1245  ((imm) & 0x1) ? 7 : 23, \
1246  ((imm) & 0x1) ? 16 : 8, \
1247  ((imm) & 0x1) ? 17 : 9, \
1248  ((imm) & 0x1) ? 18 : 10, \
1249  ((imm) & 0x1) ? 19 : 11, \
1250  ((imm) & 0x1) ? 20 : 12, \
1251  ((imm) & 0x1) ? 21 : 13, \
1252  ((imm) & 0x1) ? 22 : 14, \
1253  ((imm) & 0x1) ? 23 : 15); })
1254 
1255 #define _mm512_mask_inserti32x8(W, U, A, B, imm) __extension__ ({ \
1256  (__m512i)__builtin_ia32_selectd_512((__mmask16)(U), \
1257  (__v16si)_mm512_inserti32x8((A), (B), (imm)), \
1258  (__v16si)(W)); })
1259 
1260 #define _mm512_maskz_inserti32x8(U, A, B, imm) __extension__ ({ \
1261  (__m512i)__builtin_ia32_selectd_512((__mmask16)(U), \
1262  (__v16si)_mm512_inserti32x8((A), (B), (imm)), \
1263  (__v16si)_mm512_setzero_si512()); })
1264 
1265 #define _mm512_inserti64x2(A, B, imm) __extension__ ({ \
1266  (__m512i)__builtin_shufflevector((__v8di)(__m512i)(A), \
1267  (__v8di)_mm512_castsi128_si512((__m128i)(B)),\
1268  (((imm) & 0x3) == 0) ? 8 : 0, \
1269  (((imm) & 0x3) == 0) ? 9 : 1, \
1270  (((imm) & 0x3) == 1) ? 8 : 2, \
1271  (((imm) & 0x3) == 1) ? 9 : 3, \
1272  (((imm) & 0x3) == 2) ? 8 : 4, \
1273  (((imm) & 0x3) == 2) ? 9 : 5, \
1274  (((imm) & 0x3) == 3) ? 8 : 6, \
1275  (((imm) & 0x3) == 3) ? 9 : 7); })
1276 
1277 #define _mm512_mask_inserti64x2(W, U, A, B, imm) __extension__ ({ \
1278  (__m512i)__builtin_ia32_selectq_512((__mmask8)(U), \
1279  (__v8di)_mm512_inserti64x2((A), (B), (imm)), \
1280  (__v8di)(W)); })
1281 
1282 #define _mm512_maskz_inserti64x2(U, A, B, imm) __extension__ ({ \
1283  (__m512i)__builtin_ia32_selectq_512((__mmask8)(U), \
1284  (__v8di)_mm512_inserti64x2((A), (B), (imm)), \
1285  (__v8di)_mm512_setzero_si512()); })
1286 
1287 #define _mm512_mask_fpclass_ps_mask(U, A, imm) __extension__ ({ \
1288  (__mmask16)__builtin_ia32_fpclassps512_mask((__v16sf)(__m512)(A), \
1289  (int)(imm), (__mmask16)(U)); })
1290 
1291 #define _mm512_fpclass_ps_mask(A, imm) __extension__ ({ \
1292  (__mmask16)__builtin_ia32_fpclassps512_mask((__v16sf)(__m512)(A), \
1293  (int)(imm), (__mmask16)-1); })
1294 
1295 #define _mm512_mask_fpclass_pd_mask(U, A, imm) __extension__ ({ \
1296  (__mmask8)__builtin_ia32_fpclasspd512_mask((__v8df)(__m512d)(A), (int)(imm), \
1297  (__mmask8)(U)); })
1298 
1299 #define _mm512_fpclass_pd_mask(A, imm) __extension__ ({ \
1300  (__mmask8)__builtin_ia32_fpclasspd512_mask((__v8df)(__m512d)(A), (int)(imm), \
1301  (__mmask8)-1); })
1302 
1303 #define _mm_fpclass_sd_mask(A, imm) __extension__ ({ \
1304  (__mmask8)__builtin_ia32_fpclasssd_mask((__v2df)(__m128d)(A), (int)(imm), \
1305  (__mmask8)-1); })
1306 
1307 #define _mm_mask_fpclass_sd_mask(U, A, imm) __extension__ ({ \
1308  (__mmask8)__builtin_ia32_fpclasssd_mask((__v2df)(__m128d)(A), (int)(imm), \
1309  (__mmask8)(U)); })
1310 
1311 #define _mm_fpclass_ss_mask(A, imm) __extension__ ({ \
1312  (__mmask8)__builtin_ia32_fpclassss_mask((__v4sf)(__m128)(A), (int)(imm), \
1313  (__mmask8)-1); })
1314 
1315 #define _mm_mask_fpclass_ss_mask(U, A, imm) __extension__ ({ \
1316  (__mmask8)__builtin_ia32_fpclassss_mask((__v4sf)(__m128)(A), (int)(imm), \
1317  (__mmask8)(U)); })
1318 
1319 #undef __DEFAULT_FN_ATTRS
1320 
1321 #endif
static __inline__ __m512 __DEFAULT_FN_ATTRS _mm512_mask_broadcast_f32x2(__m512 __O, __mmask16 __M, __m128 __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS _mm512_maskz_cvtepu64_ps(__mmask8 __U, __m512i __A)
static __inline__ __m512 __DEFAULT_FN_ATTRS _mm512_broadcast_f32x2(__m128 __A)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_cvtps_epu64(__mmask8 __U, __m256 __A)
static __inline __m256 __DEFAULT_FN_ATTRS _mm256_setzero_ps(void)
Constructs a 256-bit floating-point vector of [8 x float] with all vector elements initialized to zer...
Definition: avxintrin.h:4344
static __inline__ __m512d __DEFAULT_FN_ATTRS _mm512_xor_pd(__m512d __A, __m512d __B)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_cvttpd_epi64(__mmask8 __U, __m512d __A)
static __inline __m512d __DEFAULT_FN_ATTRS _mm512_setzero_pd(void)
static __inline__ __m256 __DEFAULT_FN_ATTRS _mm512_cvtepi64_ps(__m512i __A)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_cvtpd_epi64(__m512i __W, __mmask8 __U, __m512d __A)
unsigned char __mmask8
Definition: avx512fintrin.h:47
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_cvttpd_epi64(__m512i __W, __mmask8 __U, __m512d __A)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_cvttps_epu64(__m256 __A)
static __inline__ __m512 __DEFAULT_FN_ATTRS _mm512_maskz_broadcast_f32x2(__mmask16 __M, __m128 __A)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_broadcast_i32x8(__m512i __O, __mmask16 __M, __m256i __A)
static __inline__ __m512d __DEFAULT_FN_ATTRS _mm512_andnot_pd(__m512d __A, __m512d __B)
static __inline __m512 __DEFAULT_FN_ATTRS _mm512_setzero_ps(void)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_cvttpd_epu64(__m512d __A)
static __inline__ __m512d __DEFAULT_FN_ATTRS _mm512_or_pd(__m512d __A, __m512d __B)
static __inline__ __m512d __DEFAULT_FN_ATTRS _mm512_mask_and_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B)
static __inline__ __m512 __DEFAULT_FN_ATTRS _mm512_maskz_and_ps(__mmask16 __U, __m512 __A, __m512 __B)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_cvttps_epi64(__mmask8 __U, __m256 __A)
static __inline__ __m512 __DEFAULT_FN_ATTRS _mm512_mask_or_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B)
static __inline__ __m512d __DEFAULT_FN_ATTRS _mm512_mask_or_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_movm_epi32(__mmask16 __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_undefined_ps(void)
Create a 128-bit vector of [4 x float] with undefined values.
Definition: xmmintrin.h:1790
static __inline__ __m512 __DEFAULT_FN_ATTRS _mm512_andnot_ps(__m512 __A, __m512 __B)
static __inline__ __m512 __DEFAULT_FN_ATTRS _mm512_mask_xor_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B)
static __inline__ __m512d __DEFAULT_FN_ATTRS _mm512_mask_andnot_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B)
static __inline__ __mmask8 __DEFAULT_FN_ATTRS _mm512_movepi64_mask(__m512i __A)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_cvtpd_epu64(__mmask8 __U, __m512d __A)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_broadcast_i32x8(__mmask16 __M, __m256i __A)
static __inline__ __m512 __DEFAULT_FN_ATTRS _mm512_xor_ps(__m512 __A, __m512 __B)
static __inline__ __m512d __DEFAULT_FN_ATTRS _mm512_maskz_cvtepi64_pd(__mmask8 __U, __m512i __A)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_cvttps_epu64(__m512i __W, __mmask8 __U, __m256 __A)
static __inline__ __m512d __DEFAULT_FN_ATTRS _mm512_maskz_or_pd(__mmask8 __U, __m512d __A, __m512d __B)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_cvtpd_epu64(__m512i __W, __mmask8 __U, __m512d __A)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_cvttps_epu64(__mmask8 __U, __m256 __A)
static __inline__ __m512d __DEFAULT_FN_ATTRS _mm512_cvtepu64_pd(__m512i __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS _mm512_cvtepu64_ps(__m512i __A)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_cvttpd_epu64(__mmask8 __U, __m512d __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS _mm512_maskz_cvtepi64_ps(__mmask8 __U, __m512i __A)
static __inline__ __m512d __DEFAULT_FN_ATTRS _mm512_maskz_broadcast_f64x2(__mmask8 __M, __m128d __A)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_broadcast_i32x8(__m256i __A)
static __inline__ __m512d __DEFAULT_FN_ATTRS _mm512_mask_xor_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_cvtpd_epi64(__mmask8 __U, __m512d __A)
static __inline__ __m512d __DEFAULT_FN_ATTRS _mm512_mask_broadcast_f64x2(__m512d __O, __mmask8 __M, __m128d __A)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_broadcast_i64x2(__m128i __A)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_cvtpd_epu64(__m512d __A)
static __inline__ __m512d __DEFAULT_FN_ATTRS _mm512_maskz_and_pd(__mmask8 __U, __m512d __A, __m512d __B)
#define __DEFAULT_FN_ATTRS
static __inline__ __m512 __DEFAULT_FN_ATTRS _mm512_maskz_or_ps(__mmask16 __U, __m512 __A, __m512 __B)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_broadcast_i32x2(__m128i __A)
static __inline__ __m512d __DEFAULT_FN_ATTRS _mm512_broadcast_f64x2(__m128d __A)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_cvtps_epu64(__m256 __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS _mm512_mask_cvtepi64_ps(__m256 __W, __mmask8 __U, __m512i __A)
static __inline__ __m512d __DEFAULT_FN_ATTRS _mm512_maskz_cvtepu64_pd(__mmask8 __U, __m512i __A)
static __inline__ __m512d __DEFAULT_FN_ATTRS _mm512_cvtepi64_pd(__m512i __A)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_cvttps_epi64(__m256 __A)
static __inline__ __m512 __DEFAULT_FN_ATTRS _mm512_mask_and_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_broadcast_i64x2(__mmask8 __M, __m128i __A)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_cvtps_epi64(__mmask8 __U, __m256 __A)
static __inline__ __m512 __DEFAULT_FN_ATTRS _mm512_broadcast_f32x8(__m256 __A)
static __inline__ __m512 __DEFAULT_FN_ATTRS _mm512_mask_andnot_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B)
static __inline__ __m512d __DEFAULT_FN_ATTRS _mm512_maskz_xor_pd(__mmask8 __U, __m512d __A, __m512d __B)
static __inline__ __m512 __DEFAULT_FN_ATTRS _mm512_maskz_andnot_ps(__mmask16 __U, __m512 __A, __m512 __B)
static __inline__ __m256 __DEFAULT_FN_ATTRS _mm512_mask_cvtepu64_ps(__m256 __W, __mmask8 __U, __m512i __A)
#define _MM_FROUND_CUR_DIRECTION
Definition: avx512fintrin.h:55
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_mullo_epi64(__mmask8 __U, __m512i __A, __m512i __B)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_cvtpd_epi64(__m512d __A)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mullo_epi64(__m512i __A, __m512i __B)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_cvtps_epu64(__m512i __W, __mmask8 __U, __m256 __A)
static __inline__ __m512d __DEFAULT_FN_ATTRS _mm512_maskz_andnot_pd(__mmask8 __U, __m512d __A, __m512d __B)
static __inline__ __m512 __DEFAULT_FN_ATTRS _mm512_and_ps(__m512 __A, __m512 __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_undefined_si128(void)
Generates a 128-bit vector of [4 x i32] with unspecified content.
Definition: emmintrin.h:3598
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_movm_epi64(__mmask8 __A)
static __inline __m512i __DEFAULT_FN_ATTRS _mm512_setzero_si512(void)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_broadcast_i32x2(__m512i __O, __mmask16 __M, __m128i __A)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_cvtps_epi64(__m512i __W, __mmask8 __U, __m256 __A)
static __inline__ __m512d __DEFAULT_FN_ATTRS _mm512_mask_cvtepu64_pd(__m512d __W, __mmask8 __U, __m512i __A)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_broadcast_i32x2(__mmask16 __M, __m128i __A)
static __inline__ __m512d __DEFAULT_FN_ATTRS _mm512_and_pd(__m512d __A, __m512d __B)
static __inline__ __m512 __DEFAULT_FN_ATTRS _mm512_maskz_xor_ps(__mmask16 __U, __m512 __A, __m512 __B)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_cvttpd_epu64(__m512i __W, __mmask8 __U, __m512d __A)
static __inline__ __m512 __DEFAULT_FN_ATTRS _mm512_or_ps(__m512 __A, __m512 __B)
unsigned short __mmask16
Definition: avx512fintrin.h:48
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_cvttpd_epi64(__m512d __A)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_cvttps_epi64(__m512i __W, __mmask8 __U, __m256 __A)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_broadcast_i64x2(__m512i __O, __mmask8 __M, __m128i __A)
static __inline__ __m512 __DEFAULT_FN_ATTRS _mm512_maskz_broadcast_f32x8(__mmask16 __M, __m256 __A)
static __inline__ __mmask16 __DEFAULT_FN_ATTRS _mm512_movepi32_mask(__m512i __A)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_cvtps_epi64(__m256 __A)
static __inline__ __m512 __DEFAULT_FN_ATTRS _mm512_mask_broadcast_f32x8(__m512 __O, __mmask16 __M, __m256 __A)
static __inline__ __m512d __DEFAULT_FN_ATTRS _mm512_mask_cvtepi64_pd(__m512d __W, __mmask8 __U, __m512i __A)
static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_mullo_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B)