10#error "Never use <avx512bf16intrin.h> directly; include <immintrin.h> instead."
15#ifndef __AVX512BF16INTRIN_H
16#define __AVX512BF16INTRIN_H
18typedef __bf16 __v32bf
__attribute__((__vector_size__(64), __aligned__(64)));
19typedef __bf16 __m512bh
__attribute__((__vector_size__(64), __aligned__(64)));
20typedef __bf16 __bfloat16
__attribute__((deprecated(
"use __bf16 instead")));
22#define __DEFAULT_FN_ATTRS512 \
23 __attribute__((__always_inline__, __nodebug__, __target__("avx512bf16"), \
24 __min_vector_width__(512)))
25#define __DEFAULT_FN_ATTRS \
26 __attribute__((__always_inline__, __nodebug__, __target__("avx512bf16")))
28#if defined(__cplusplus) && (__cplusplus >= 201103L)
29#define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS512 constexpr
30#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr
32#define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS512
33#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS
63_mm512_cvtne2ps_pbh(__m512 __A, __m512 __B) {
64 return (__m512bh)__builtin_ia32_cvtne2ps2bf16_512((__v16sf) __A,
86_mm512_mask_cvtne2ps_pbh(__m512bh __W,
__mmask32 __U, __m512 __A, __m512 __B) {
87 return (__m512bh)__builtin_ia32_selectpbf_512((
__mmask32)__U,
88 (__v32bf)_mm512_cvtne2ps_pbh(__A, __B),
108_mm512_maskz_cvtne2ps_pbh(
__mmask32 __U, __m512 __A, __m512 __B) {
109 return (__m512bh)__builtin_ia32_selectpbf_512((
__mmask32)__U,
110 (__v32bf)_mm512_cvtne2ps_pbh(__A, __B),
124_mm512_cvtneps_pbh(__m512 __A) {
125 return (__m256bh)__builtin_ia32_cvtneps2bf16_512_mask((__v16sf)__A,
145_mm512_mask_cvtneps_pbh(__m256bh __W,
__mmask16 __U, __m512 __A) {
146 return (__m256bh)__builtin_ia32_cvtneps2bf16_512_mask((__v16sf)__A,
164_mm512_maskz_cvtneps_pbh(
__mmask16 __U, __m512 __A) {
165 return (__m256bh)__builtin_ia32_cvtneps2bf16_512_mask((__v16sf)__A,
185_mm512_dpbf16_ps(__m512
__D, __m512bh __A, __m512bh __B) {
186 return (__m512)__builtin_ia32_dpbf16ps_512((__v16sf)
__D,
209_mm512_mask_dpbf16_ps(__m512
__D,
__mmask16 __U, __m512bh __A, __m512bh __B) {
210 return (__m512)__builtin_ia32_selectps_512((
__mmask16)__U,
211 (__v16sf)_mm512_dpbf16_ps(
__D, __A, __B),
233_mm512_maskz_dpbf16_ps(
__mmask16 __U, __m512
__D, __m512bh __A, __m512bh __B) {
234 return (__m512)__builtin_ia32_selectps_512((
__mmask16)__U,
235 (__v16sf)_mm512_dpbf16_ps(
__D, __A, __B),
247_mm512_cvtpbh_ps(__m256bh __A) {
248 return (__m512) __builtin_convertvector(__A, __v16sf);
262_mm512_maskz_cvtpbh_ps(
__mmask16 __U, __m256bh __A) {
263 return (__m512)__builtin_ia32_selectps_512((
__mmask16)__U,
264 (__v16sf)_mm512_cvtpbh_ps(__A),
281_mm512_mask_cvtpbh_ps(__m512 __S,
__mmask16 __U, __m256bh __A) {
282 return (__m512)__builtin_ia32_selectps_512(
283 (
__mmask16)__U, (__v16sf)_mm512_cvtpbh_ps(__A), (__v16sf)__S);
286#undef __DEFAULT_FN_ATTRS
287#undef __DEFAULT_FN_ATTRS_CONSTEXPR
288#undef __DEFAULT_FN_ATTRS512
289#undef __DEFAULT_FN_ATTRS512_CONSTEXPR
_Float16 __2f16 __attribute__((ext_vector_type(2)))
Zeroes the upper 128 bits (bits 255:128) of all YMM registers.
#define __DEFAULT_FN_ATTRS512_CONSTEXPR
#define __DEFAULT_FN_ATTRS512
#define __DEFAULT_FN_ATTRS_CONSTEXPR
static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_setzero_ps(void)
static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_setzero_si512(void)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_undefined_si256(void)
Create a 256-bit integer vector with undefined values.
static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_setzero_si256(void)
Constructs a 256-bit integer vector initialized to zero.
static __inline__ void short __D