clang  8.0.0svn
ARM.cpp
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1 //===--- ARM.cpp - ARM (not AArch64) Helpers for Tools ----------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #include "ARM.h"
11 #include "clang/Driver/Driver.h"
13 #include "clang/Driver/Options.h"
14 #include "llvm/ADT/StringSwitch.h"
15 #include "llvm/Option/ArgList.h"
16 #include "llvm/Support/TargetParser.h"
17 
18 using namespace clang::driver;
19 using namespace clang::driver::tools;
20 using namespace clang;
21 using namespace llvm::opt;
22 
23 // Get SubArch (vN).
24 int arm::getARMSubArchVersionNumber(const llvm::Triple &Triple) {
25  llvm::StringRef Arch = Triple.getArchName();
26  return llvm::ARM::parseArchVersion(Arch);
27 }
28 
29 // True if M-profile.
30 bool arm::isARMMProfile(const llvm::Triple &Triple) {
31  llvm::StringRef Arch = Triple.getArchName();
32  return llvm::ARM::parseArchProfile(Arch) == llvm::ARM::ProfileKind::M;
33 }
34 
35 // Get Arch/CPU from args.
36 void arm::getARMArchCPUFromArgs(const ArgList &Args, llvm::StringRef &Arch,
37  llvm::StringRef &CPU, bool FromAs) {
38  if (const Arg *A = Args.getLastArg(clang::driver::options::OPT_mcpu_EQ))
39  CPU = A->getValue();
40  if (const Arg *A = Args.getLastArg(options::OPT_march_EQ))
41  Arch = A->getValue();
42  if (!FromAs)
43  return;
44 
45  for (const Arg *A :
46  Args.filtered(options::OPT_Wa_COMMA, options::OPT_Xassembler)) {
47  StringRef Value = A->getValue();
48  if (Value.startswith("-mcpu="))
49  CPU = Value.substr(6);
50  if (Value.startswith("-march="))
51  Arch = Value.substr(7);
52  }
53 }
54 
55 // Handle -mhwdiv=.
56 // FIXME: Use ARMTargetParser.
57 static void getARMHWDivFeatures(const Driver &D, const Arg *A,
58  const ArgList &Args, StringRef HWDiv,
59  std::vector<StringRef> &Features) {
60  unsigned HWDivID = llvm::ARM::parseHWDiv(HWDiv);
61  if (!llvm::ARM::getHWDivFeatures(HWDivID, Features))
62  D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
63 }
64 
65 // Handle -mfpu=.
66 static void getARMFPUFeatures(const Driver &D, const Arg *A,
67  const ArgList &Args, StringRef FPU,
68  std::vector<StringRef> &Features) {
69  unsigned FPUID = llvm::ARM::parseFPU(FPU);
70  if (!llvm::ARM::getFPUFeatures(FPUID, Features))
71  D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
72 }
73 
74 // Decode ARM features from string like +[no]featureA+[no]featureB+...
75 static bool DecodeARMFeatures(const Driver &D, StringRef text,
76  std::vector<StringRef> &Features) {
78  text.split(Split, StringRef("+"), -1, false);
79 
80  for (StringRef Feature : Split) {
81  StringRef FeatureName = llvm::ARM::getArchExtFeature(Feature);
82  if (!FeatureName.empty())
83  Features.push_back(FeatureName);
84  else
85  return false;
86  }
87  return true;
88 }
89 
90 static void DecodeARMFeaturesFromCPU(const Driver &D, StringRef CPU,
91  std::vector<StringRef> &Features) {
92  if (CPU != "generic") {
93  llvm::ARM::ArchKind ArchKind = llvm::ARM::parseCPUArch(CPU);
94  unsigned Extension = llvm::ARM::getDefaultExtensions(CPU, ArchKind);
95  llvm::ARM::getExtensionFeatures(Extension, Features);
96  }
97 }
98 
99 // Check if -march is valid by checking if it can be canonicalised and parsed.
100 // getARMArch is used here instead of just checking the -march value in order
101 // to handle -march=native correctly.
102 static void checkARMArchName(const Driver &D, const Arg *A, const ArgList &Args,
103  llvm::StringRef ArchName,
104  std::vector<StringRef> &Features,
105  const llvm::Triple &Triple) {
106  std::pair<StringRef, StringRef> Split = ArchName.split("+");
107 
108  std::string MArch = arm::getARMArch(ArchName, Triple);
109  if (llvm::ARM::parseArch(MArch) == llvm::ARM::ArchKind::INVALID ||
110  (Split.second.size() && !DecodeARMFeatures(D, Split.second, Features)))
111  D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
112 }
113 
114 // Check -mcpu=. Needs ArchName to handle -mcpu=generic.
115 static void checkARMCPUName(const Driver &D, const Arg *A, const ArgList &Args,
116  llvm::StringRef CPUName, llvm::StringRef ArchName,
117  std::vector<StringRef> &Features,
118  const llvm::Triple &Triple) {
119  std::pair<StringRef, StringRef> Split = CPUName.split("+");
120 
121  std::string CPU = arm::getARMTargetCPU(CPUName, ArchName, Triple);
122  if (arm::getLLVMArchSuffixForARM(CPU, ArchName, Triple).empty() ||
123  (Split.second.size() && !DecodeARMFeatures(D, Split.second, Features)))
124  D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
125 }
126 
127 bool arm::useAAPCSForMachO(const llvm::Triple &T) {
128  // The backend is hardwired to assume AAPCS for M-class processors, ensure
129  // the frontend matches that.
130  return T.getEnvironment() == llvm::Triple::EABI ||
131  T.getOS() == llvm::Triple::UnknownOS || isARMMProfile(T);
132 }
133 
134 // Select mode for reading thread pointer (-mtp=soft/cp15).
135 arm::ReadTPMode arm::getReadTPMode(const ToolChain &TC, const ArgList &Args) {
136  if (Arg *A = Args.getLastArg(options::OPT_mtp_mode_EQ)) {
137  const Driver &D = TC.getDriver();
138  arm::ReadTPMode ThreadPointer =
139  llvm::StringSwitch<arm::ReadTPMode>(A->getValue())
140  .Case("cp15", ReadTPMode::Cp15)
141  .Case("soft", ReadTPMode::Soft)
142  .Default(ReadTPMode::Invalid);
143  if (ThreadPointer != ReadTPMode::Invalid)
144  return ThreadPointer;
145  if (StringRef(A->getValue()).empty())
146  D.Diag(diag::err_drv_missing_arg_mtp) << A->getAsString(Args);
147  else
148  D.Diag(diag::err_drv_invalid_mtp) << A->getAsString(Args);
149  return ReadTPMode::Invalid;
150  }
151  return ReadTPMode::Soft;
152 }
153 
154 // Select the float ABI as determined by -msoft-float, -mhard-float, and
155 // -mfloat-abi=.
156 arm::FloatABI arm::getARMFloatABI(const ToolChain &TC, const ArgList &Args) {
157  const Driver &D = TC.getDriver();
158  const llvm::Triple &Triple = TC.getEffectiveTriple();
159  auto SubArch = getARMSubArchVersionNumber(Triple);
160  arm::FloatABI ABI = FloatABI::Invalid;
161  if (Arg *A =
162  Args.getLastArg(options::OPT_msoft_float, options::OPT_mhard_float,
163  options::OPT_mfloat_abi_EQ)) {
164  if (A->getOption().matches(options::OPT_msoft_float)) {
165  ABI = FloatABI::Soft;
166  } else if (A->getOption().matches(options::OPT_mhard_float)) {
167  ABI = FloatABI::Hard;
168  } else {
169  ABI = llvm::StringSwitch<arm::FloatABI>(A->getValue())
170  .Case("soft", FloatABI::Soft)
171  .Case("softfp", FloatABI::SoftFP)
172  .Case("hard", FloatABI::Hard)
173  .Default(FloatABI::Invalid);
174  if (ABI == FloatABI::Invalid && !StringRef(A->getValue()).empty()) {
175  D.Diag(diag::err_drv_invalid_mfloat_abi) << A->getAsString(Args);
176  ABI = FloatABI::Soft;
177  }
178  }
179 
180  // It is incorrect to select hard float ABI on MachO platforms if the ABI is
181  // "apcs-gnu".
182  if (Triple.isOSBinFormatMachO() && !useAAPCSForMachO(Triple) &&
183  ABI == FloatABI::Hard) {
184  D.Diag(diag::err_drv_unsupported_opt_for_target) << A->getAsString(Args)
185  << Triple.getArchName();
186  }
187  }
188 
189  // If unspecified, choose the default based on the platform.
190  if (ABI == FloatABI::Invalid) {
191  switch (Triple.getOS()) {
192  case llvm::Triple::Darwin:
193  case llvm::Triple::MacOSX:
194  case llvm::Triple::IOS:
195  case llvm::Triple::TvOS: {
196  // Darwin defaults to "softfp" for v6 and v7.
197  ABI = (SubArch == 6 || SubArch == 7) ? FloatABI::SoftFP : FloatABI::Soft;
198  ABI = Triple.isWatchABI() ? FloatABI::Hard : ABI;
199  break;
200  }
201  case llvm::Triple::WatchOS:
202  ABI = FloatABI::Hard;
203  break;
204 
205  // FIXME: this is invalid for WindowsCE
206  case llvm::Triple::Win32:
207  ABI = FloatABI::Hard;
208  break;
209 
210  case llvm::Triple::NetBSD:
211  switch (Triple.getEnvironment()) {
212  case llvm::Triple::EABIHF:
213  case llvm::Triple::GNUEABIHF:
214  ABI = FloatABI::Hard;
215  break;
216  default:
217  ABI = FloatABI::Soft;
218  break;
219  }
220  break;
221 
222  case llvm::Triple::FreeBSD:
223  switch (Triple.getEnvironment()) {
224  case llvm::Triple::GNUEABIHF:
225  ABI = FloatABI::Hard;
226  break;
227  default:
228  // FreeBSD defaults to soft float
229  ABI = FloatABI::Soft;
230  break;
231  }
232  break;
233 
234  case llvm::Triple::OpenBSD:
235  ABI = FloatABI::SoftFP;
236  break;
237 
238  default:
239  switch (Triple.getEnvironment()) {
240  case llvm::Triple::GNUEABIHF:
241  case llvm::Triple::MuslEABIHF:
242  case llvm::Triple::EABIHF:
243  ABI = FloatABI::Hard;
244  break;
245  case llvm::Triple::GNUEABI:
246  case llvm::Triple::MuslEABI:
247  case llvm::Triple::EABI:
248  // EABI is always AAPCS, and if it was not marked 'hard', it's softfp
249  ABI = FloatABI::SoftFP;
250  break;
251  case llvm::Triple::Android:
252  ABI = (SubArch == 7) ? FloatABI::SoftFP : FloatABI::Soft;
253  break;
254  default:
255  // Assume "soft", but warn the user we are guessing.
256  if (Triple.isOSBinFormatMachO() &&
257  Triple.getSubArch() == llvm::Triple::ARMSubArch_v7em)
258  ABI = FloatABI::Hard;
259  else
260  ABI = FloatABI::Soft;
261 
262  if (Triple.getOS() != llvm::Triple::UnknownOS ||
263  !Triple.isOSBinFormatMachO())
264  D.Diag(diag::warn_drv_assuming_mfloat_abi_is) << "soft";
265  break;
266  }
267  }
268  }
269 
270  assert(ABI != FloatABI::Invalid && "must select an ABI");
271  return ABI;
272 }
273 
274 void arm::getARMTargetFeatures(const ToolChain &TC,
275  const llvm::Triple &Triple,
276  const ArgList &Args,
277  ArgStringList &CmdArgs,
278  std::vector<StringRef> &Features,
279  bool ForAS) {
280  const Driver &D = TC.getDriver();
281 
282  bool KernelOrKext =
283  Args.hasArg(options::OPT_mkernel, options::OPT_fapple_kext);
284  arm::FloatABI ABI = arm::getARMFloatABI(TC, Args);
285  arm::ReadTPMode ThreadPointer = arm::getReadTPMode(TC, Args);
286  const Arg *WaCPU = nullptr, *WaFPU = nullptr;
287  const Arg *WaHDiv = nullptr, *WaArch = nullptr;
288 
289  if (!ForAS) {
290  // FIXME: Note, this is a hack, the LLVM backend doesn't actually use these
291  // yet (it uses the -mfloat-abi and -msoft-float options), and it is
292  // stripped out by the ARM target. We should probably pass this a new
293  // -target-option, which is handled by the -cc1/-cc1as invocation.
294  //
295  // FIXME2: For consistency, it would be ideal if we set up the target
296  // machine state the same when using the frontend or the assembler. We don't
297  // currently do that for the assembler, we pass the options directly to the
298  // backend and never even instantiate the frontend TargetInfo. If we did,
299  // and used its handleTargetFeatures hook, then we could ensure the
300  // assembler and the frontend behave the same.
301 
302  // Use software floating point operations?
303  if (ABI == arm::FloatABI::Soft)
304  Features.push_back("+soft-float");
305 
306  // Use software floating point argument passing?
307  if (ABI != arm::FloatABI::Hard)
308  Features.push_back("+soft-float-abi");
309  } else {
310  // Here, we make sure that -Wa,-mfpu/cpu/arch/hwdiv will be passed down
311  // to the assembler correctly.
312  for (const Arg *A :
313  Args.filtered(options::OPT_Wa_COMMA, options::OPT_Xassembler)) {
314  StringRef Value = A->getValue();
315  if (Value.startswith("-mfpu=")) {
316  WaFPU = A;
317  } else if (Value.startswith("-mcpu=")) {
318  WaCPU = A;
319  } else if (Value.startswith("-mhwdiv=")) {
320  WaHDiv = A;
321  } else if (Value.startswith("-march=")) {
322  WaArch = A;
323  }
324  }
325  }
326 
327  if (ThreadPointer == arm::ReadTPMode::Cp15)
328  Features.push_back("+read-tp-hard");
329 
330  // Check -march. ClangAs gives preference to -Wa,-march=.
331  const Arg *ArchArg = Args.getLastArg(options::OPT_march_EQ);
332  StringRef ArchName;
333  if (WaArch) {
334  if (ArchArg)
335  D.Diag(clang::diag::warn_drv_unused_argument)
336  << ArchArg->getAsString(Args);
337  ArchName = StringRef(WaArch->getValue()).substr(7);
338  checkARMArchName(D, WaArch, Args, ArchName, Features, Triple);
339  // FIXME: Set Arch.
340  D.Diag(clang::diag::warn_drv_unused_argument) << WaArch->getAsString(Args);
341  } else if (ArchArg) {
342  ArchName = ArchArg->getValue();
343  checkARMArchName(D, ArchArg, Args, ArchName, Features, Triple);
344  }
345 
346  // Check -mcpu. ClangAs gives preference to -Wa,-mcpu=.
347  const Arg *CPUArg = Args.getLastArg(options::OPT_mcpu_EQ);
348  StringRef CPUName;
349  if (WaCPU) {
350  if (CPUArg)
351  D.Diag(clang::diag::warn_drv_unused_argument)
352  << CPUArg->getAsString(Args);
353  CPUName = StringRef(WaCPU->getValue()).substr(6);
354  checkARMCPUName(D, WaCPU, Args, CPUName, ArchName, Features, Triple);
355  } else if (CPUArg) {
356  CPUName = CPUArg->getValue();
357  checkARMCPUName(D, CPUArg, Args, CPUName, ArchName, Features, Triple);
358  }
359 
360  // Add CPU features for generic CPUs
361  if (CPUName == "native") {
362  llvm::StringMap<bool> HostFeatures;
363  if (llvm::sys::getHostCPUFeatures(HostFeatures))
364  for (auto &F : HostFeatures)
365  Features.push_back(
366  Args.MakeArgString((F.second ? "+" : "-") + F.first()));
367  } else if (!CPUName.empty()) {
368  DecodeARMFeaturesFromCPU(D, CPUName, Features);
369  }
370 
371  // Honor -mfpu=. ClangAs gives preference to -Wa,-mfpu=.
372  const Arg *FPUArg = Args.getLastArg(options::OPT_mfpu_EQ);
373  if (WaFPU) {
374  if (FPUArg)
375  D.Diag(clang::diag::warn_drv_unused_argument)
376  << FPUArg->getAsString(Args);
377  getARMFPUFeatures(D, WaFPU, Args, StringRef(WaFPU->getValue()).substr(6),
378  Features);
379  } else if (FPUArg) {
380  getARMFPUFeatures(D, FPUArg, Args, FPUArg->getValue(), Features);
381  } else if (Triple.isAndroid() && getARMSubArchVersionNumber(Triple) >= 7) {
382  // Android mandates minimum FPU requirements based on OS version.
383  const char *AndroidFPU =
384  Triple.isAndroidVersionLT(23) ? "vfpv3-d16" : "neon";
385  if (!llvm::ARM::getFPUFeatures(llvm::ARM::parseFPU(AndroidFPU), Features))
386  D.Diag(clang::diag::err_drv_clang_unsupported)
387  << std::string("-mfpu=") + AndroidFPU;
388  }
389 
390  // Honor -mhwdiv=. ClangAs gives preference to -Wa,-mhwdiv=.
391  const Arg *HDivArg = Args.getLastArg(options::OPT_mhwdiv_EQ);
392  if (WaHDiv) {
393  if (HDivArg)
394  D.Diag(clang::diag::warn_drv_unused_argument)
395  << HDivArg->getAsString(Args);
396  getARMHWDivFeatures(D, WaHDiv, Args,
397  StringRef(WaHDiv->getValue()).substr(8), Features);
398  } else if (HDivArg)
399  getARMHWDivFeatures(D, HDivArg, Args, HDivArg->getValue(), Features);
400 
401  // Handle (arch-dependent) fp16fml/fullfp16 relationship.
402  // Must happen before any features are disabled due to soft-float.
403  // FIXME: this fp16fml option handling will be reimplemented after the
404  // TargetParser rewrite.
405  const auto ItRNoFullFP16 = std::find(Features.rbegin(), Features.rend(), "-fullfp16");
406  const auto ItRFP16FML = std::find(Features.rbegin(), Features.rend(), "+fp16fml");
407  if (Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v8_4a) {
408  const auto ItRFullFP16 = std::find(Features.rbegin(), Features.rend(), "+fullfp16");
409  if (ItRFullFP16 < ItRNoFullFP16 && ItRFullFP16 < ItRFP16FML) {
410  // Only entangled feature that can be to the right of this +fullfp16 is -fp16fml.
411  // Only append the +fp16fml if there is no -fp16fml after the +fullfp16.
412  if (std::find(Features.rbegin(), ItRFullFP16, "-fp16fml") == ItRFullFP16)
413  Features.push_back("+fp16fml");
414  }
415  else
416  goto fp16_fml_fallthrough;
417  }
418  else {
419 fp16_fml_fallthrough:
420  // In both of these cases, putting the 'other' feature on the end of the vector will
421  // result in the same effect as placing it immediately after the current feature.
422  if (ItRNoFullFP16 < ItRFP16FML)
423  Features.push_back("-fp16fml");
424  else if (ItRNoFullFP16 > ItRFP16FML)
425  Features.push_back("+fullfp16");
426  }
427 
428  // Setting -msoft-float/-mfloat-abi=soft effectively disables the FPU (GCC
429  // ignores the -mfpu options in this case).
430  // Note that the ABI can also be set implicitly by the target selected.
431  if (ABI == arm::FloatABI::Soft) {
432  llvm::ARM::getFPUFeatures(llvm::ARM::FK_NONE, Features);
433 
434  // Disable hardware FP features which have been enabled.
435  // FIXME: Disabling vfp2 and neon should be enough as all the other
436  // features are dependent on these 2 features in LLVM. However
437  // there is currently no easy way to test this in clang, so for
438  // now just be explicit and disable all known dependent features
439  // as well.
440  for (std::string Feature : {"vfp2", "vfp3", "vfp4", "fp-armv8", "fullfp16",
441  "neon", "crypto", "dotprod", "fp16fml"})
442  if (std::find(std::begin(Features), std::end(Features), "+" + Feature) != std::end(Features))
443  Features.push_back(Args.MakeArgString("-" + Feature));
444  }
445 
446  // En/disable crc code generation.
447  if (Arg *A = Args.getLastArg(options::OPT_mcrc, options::OPT_mnocrc)) {
448  if (A->getOption().matches(options::OPT_mcrc))
449  Features.push_back("+crc");
450  else
451  Features.push_back("-crc");
452  }
453 
454  // For Arch >= ARMv8.0: crypto = sha2 + aes
455  // FIXME: this needs reimplementation after the TargetParser rewrite
456  if (ArchName.find_lower("armv8a") != StringRef::npos ||
457  ArchName.find_lower("armv8.1a") != StringRef::npos ||
458  ArchName.find_lower("armv8.2a") != StringRef::npos ||
459  ArchName.find_lower("armv8.3a") != StringRef::npos ||
460  ArchName.find_lower("armv8.4a") != StringRef::npos) {
461  if (ArchName.find_lower("+crypto") != StringRef::npos) {
462  if (ArchName.find_lower("+nosha2") == StringRef::npos)
463  Features.push_back("+sha2");
464  if (ArchName.find_lower("+noaes") == StringRef::npos)
465  Features.push_back("+aes");
466  } else if (ArchName.find_lower("-crypto") != StringRef::npos) {
467  if (ArchName.find_lower("+sha2") == StringRef::npos)
468  Features.push_back("-sha2");
469  if (ArchName.find_lower("+aes") == StringRef::npos)
470  Features.push_back("-aes");
471  }
472  }
473 
474  // Look for the last occurrence of -mlong-calls or -mno-long-calls. If
475  // neither options are specified, see if we are compiling for kernel/kext and
476  // decide whether to pass "+long-calls" based on the OS and its version.
477  if (Arg *A = Args.getLastArg(options::OPT_mlong_calls,
478  options::OPT_mno_long_calls)) {
479  if (A->getOption().matches(options::OPT_mlong_calls))
480  Features.push_back("+long-calls");
481  } else if (KernelOrKext && (!Triple.isiOS() || Triple.isOSVersionLT(6)) &&
482  !Triple.isWatchOS()) {
483  Features.push_back("+long-calls");
484  }
485 
486  // Generate execute-only output (no data access to code sections).
487  // This only makes sense for the compiler, not for the assembler.
488  if (!ForAS) {
489  // Supported only on ARMv6T2 and ARMv7 and above.
490  // Cannot be combined with -mno-movt or -mlong-calls
491  if (Arg *A = Args.getLastArg(options::OPT_mexecute_only, options::OPT_mno_execute_only)) {
492  if (A->getOption().matches(options::OPT_mexecute_only)) {
493  if (getARMSubArchVersionNumber(Triple) < 7 &&
494  llvm::ARM::parseArch(Triple.getArchName()) != llvm::ARM::ArchKind::ARMV6T2)
495  D.Diag(diag::err_target_unsupported_execute_only) << Triple.getArchName();
496  else if (Arg *B = Args.getLastArg(options::OPT_mno_movt))
497  D.Diag(diag::err_opt_not_valid_with_opt) << A->getAsString(Args) << B->getAsString(Args);
498  // Long calls create constant pool entries and have not yet been fixed up
499  // to play nicely with execute-only. Hence, they cannot be used in
500  // execute-only code for now
501  else if (Arg *B = Args.getLastArg(options::OPT_mlong_calls, options::OPT_mno_long_calls)) {
502  if (B->getOption().matches(options::OPT_mlong_calls))
503  D.Diag(diag::err_opt_not_valid_with_opt) << A->getAsString(Args) << B->getAsString(Args);
504  }
505  Features.push_back("+execute-only");
506  }
507  }
508  }
509 
510  // Kernel code has more strict alignment requirements.
511  if (KernelOrKext)
512  Features.push_back("+strict-align");
513  else if (Arg *A = Args.getLastArg(options::OPT_mno_unaligned_access,
514  options::OPT_munaligned_access)) {
515  if (A->getOption().matches(options::OPT_munaligned_access)) {
516  // No v6M core supports unaligned memory access (v6M ARM ARM A3.2).
517  if (Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v6m)
518  D.Diag(diag::err_target_unsupported_unaligned) << "v6m";
519  // v8M Baseline follows on from v6M, so doesn't support unaligned memory
520  // access either.
521  else if (Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v8m_baseline)
522  D.Diag(diag::err_target_unsupported_unaligned) << "v8m.base";
523  } else
524  Features.push_back("+strict-align");
525  } else {
526  // Assume pre-ARMv6 doesn't support unaligned accesses.
527  //
528  // ARMv6 may or may not support unaligned accesses depending on the
529  // SCTLR.U bit, which is architecture-specific. We assume ARMv6
530  // Darwin and NetBSD targets support unaligned accesses, and others don't.
531  //
532  // ARMv7 always has SCTLR.U set to 1, but it has a new SCTLR.A bit
533  // which raises an alignment fault on unaligned accesses. Linux
534  // defaults this bit to 0 and handles it as a system-wide (not
535  // per-process) setting. It is therefore safe to assume that ARMv7+
536  // Linux targets support unaligned accesses. The same goes for NaCl.
537  //
538  // The above behavior is consistent with GCC.
539  int VersionNum = getARMSubArchVersionNumber(Triple);
540  if (Triple.isOSDarwin() || Triple.isOSNetBSD()) {
541  if (VersionNum < 6 ||
542  Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v6m)
543  Features.push_back("+strict-align");
544  } else if (Triple.isOSLinux() || Triple.isOSNaCl()) {
545  if (VersionNum < 7)
546  Features.push_back("+strict-align");
547  } else
548  Features.push_back("+strict-align");
549  }
550 
551  // llvm does not support reserving registers in general. There is support
552  // for reserving r9 on ARM though (defined as a platform-specific register
553  // in ARM EABI).
554  if (Args.hasArg(options::OPT_ffixed_r9))
555  Features.push_back("+reserve-r9");
556 
557  // The kext linker doesn't know how to deal with movw/movt.
558  if (KernelOrKext || Args.hasArg(options::OPT_mno_movt))
559  Features.push_back("+no-movt");
560 
561  if (Args.hasArg(options::OPT_mno_neg_immediates))
562  Features.push_back("+no-neg-immediates");
563 }
564 
565 const std::string arm::getARMArch(StringRef Arch, const llvm::Triple &Triple) {
566  std::string MArch;
567  if (!Arch.empty())
568  MArch = Arch;
569  else
570  MArch = Triple.getArchName();
571  MArch = StringRef(MArch).split("+").first.lower();
572 
573  // Handle -march=native.
574  if (MArch == "native") {
575  std::string CPU = llvm::sys::getHostCPUName();
576  if (CPU != "generic") {
577  // Translate the native cpu into the architecture suffix for that CPU.
578  StringRef Suffix = arm::getLLVMArchSuffixForARM(CPU, MArch, Triple);
579  // If there is no valid architecture suffix for this CPU we don't know how
580  // to handle it, so return no architecture.
581  if (Suffix.empty())
582  MArch = "";
583  else
584  MArch = std::string("arm") + Suffix.str();
585  }
586  }
587 
588  return MArch;
589 }
590 
591 /// Get the (LLVM) name of the minimum ARM CPU for the arch we are targeting.
592 StringRef arm::getARMCPUForMArch(StringRef Arch, const llvm::Triple &Triple) {
593  std::string MArch = getARMArch(Arch, Triple);
594  // getARMCPUForArch defaults to the triple if MArch is empty, but empty MArch
595  // here means an -march=native that we can't handle, so instead return no CPU.
596  if (MArch.empty())
597  return StringRef();
598 
599  // We need to return an empty string here on invalid MArch values as the
600  // various places that call this function can't cope with a null result.
601  return Triple.getARMCPUForArch(MArch);
602 }
603 
604 /// getARMTargetCPU - Get the (LLVM) name of the ARM cpu we are targeting.
605 std::string arm::getARMTargetCPU(StringRef CPU, StringRef Arch,
606  const llvm::Triple &Triple) {
607  // FIXME: Warn on inconsistent use of -mcpu and -march.
608  // If we have -mcpu=, use that.
609  if (!CPU.empty()) {
610  std::string MCPU = StringRef(CPU).split("+").first.lower();
611  // Handle -mcpu=native.
612  if (MCPU == "native")
613  return llvm::sys::getHostCPUName();
614  else
615  return MCPU;
616  }
617 
618  return getARMCPUForMArch(Arch, Triple);
619 }
620 
621 /// getLLVMArchSuffixForARM - Get the LLVM arch name to use for a particular
622 /// CPU (or Arch, if CPU is generic).
623 // FIXME: This is redundant with -mcpu, why does LLVM use this.
624 StringRef arm::getLLVMArchSuffixForARM(StringRef CPU, StringRef Arch,
625  const llvm::Triple &Triple) {
626  llvm::ARM::ArchKind ArchKind;
627  if (CPU == "generic") {
628  std::string ARMArch = tools::arm::getARMArch(Arch, Triple);
629  ArchKind = llvm::ARM::parseArch(ARMArch);
630  if (ArchKind == llvm::ARM::ArchKind::INVALID)
631  // In case of generic Arch, i.e. "arm",
632  // extract arch from default cpu of the Triple
633  ArchKind = llvm::ARM::parseCPUArch(Triple.getARMCPUForArch(ARMArch));
634  } else {
635  // FIXME: horrible hack to get around the fact that Cortex-A7 is only an
636  // armv7k triple if it's actually been specified via "-arch armv7k".
637  ArchKind = (Arch == "armv7k" || Arch == "thumbv7k")
638  ? llvm::ARM::ArchKind::ARMV7K
639  : llvm::ARM::parseCPUArch(CPU);
640  }
641  if (ArchKind == llvm::ARM::ArchKind::INVALID)
642  return "";
643  return llvm::ARM::getSubArch(ArchKind);
644 }
645 
646 void arm::appendBE8LinkFlag(const ArgList &Args, ArgStringList &CmdArgs,
647  const llvm::Triple &Triple) {
648  if (Args.hasArg(options::OPT_r))
649  return;
650 
651  // ARMv7 (and later) and ARMv6-M do not support BE-32, so instruct the linker
652  // to generate BE-8 executables.
653  if (arm::getARMSubArchVersionNumber(Triple) >= 7 || arm::isARMMProfile(Triple))
654  CmdArgs.push_back("--be8");
655 }
bool useAAPCSForMachO(const llvm::Triple &T)
Definition: ARM.cpp:127
DiagnosticBuilder Diag(unsigned DiagID) const
Definition: Driver.h:109
static void getExtensionFeatures(const Driver &D, const ArgList &Args, std::vector< StringRef > &Features, StringRef &MArch, StringRef &Exts)
Definition: RISCV.cpp:102
FloatABI getARMFloatABI(const ToolChain &TC, const llvm::opt::ArgList &Args)
static void checkARMArchName(const Driver &D, const Arg *A, const ArgList &Args, llvm::StringRef ArchName, std::vector< StringRef > &Features, const llvm::Triple &Triple)
Definition: ARM.cpp:102
const std::string getARMArch(llvm::StringRef Arch, const llvm::Triple &Triple)
static void DecodeARMFeaturesFromCPU(const Driver &D, StringRef CPU, std::vector< StringRef > &Features)
Definition: ARM.cpp:90
bool isARMMProfile(const llvm::Triple &Triple)
Definition: ARM.cpp:30
StringRef getARMCPUForMArch(llvm::StringRef Arch, const llvm::Triple &Triple)
Driver - Encapsulate logic for constructing compilation processes from a set of gcc-driver-like comma...
Definition: Driver.h:58
static bool DecodeARMFeatures(const Driver &D, StringRef text, std::vector< StringRef > &Features)
Definition: ARM.cpp:75
const llvm::Triple & getEffectiveTriple() const
Get the toolchain&#39;s effective clang triple.
Definition: ToolChain.h:215
int getARMSubArchVersionNumber(const llvm::Triple &Triple)
Definition: ARM.cpp:24
static void getARMFPUFeatures(const Driver &D, const Arg *A, const ArgList &Args, StringRef FPU, std::vector< StringRef > &Features)
Definition: ARM.cpp:66
const Driver & getDriver() const
Definition: ToolChain.h:185
std::string getARMTargetCPU(StringRef CPU, llvm::StringRef Arch, const llvm::Triple &Triple)
Dataflow Directional Tag Classes.
void getARMArchCPUFromArgs(const llvm::opt::ArgList &Args, llvm::StringRef &Arch, llvm::StringRef &CPU, bool FromAs=false)
static void getARMHWDivFeatures(const Driver &D, const Arg *A, const ArgList &Args, StringRef HWDiv, std::vector< StringRef > &Features)
Definition: ARM.cpp:57
void appendBE8LinkFlag(const llvm::opt::ArgList &Args, llvm::opt::ArgStringList &CmdArgs, const llvm::Triple &Triple)
ReadTPMode getReadTPMode(const ToolChain &TC, const llvm::opt::ArgList &Args)
static void checkARMCPUName(const Driver &D, const Arg *A, const ArgList &Args, llvm::StringRef CPUName, llvm::StringRef ArchName, std::vector< StringRef > &Features, const llvm::Triple &Triple)
Definition: ARM.cpp:115
void getARMTargetFeatures(const ToolChain &TC, const llvm::Triple &Triple, const llvm::opt::ArgList &Args, llvm::opt::ArgStringList &CmdArgs, std::vector< llvm::StringRef > &Features, bool ForAS)
StringRef getLLVMArchSuffixForARM(llvm::StringRef CPU, llvm::StringRef Arch, const llvm::Triple &Triple)
ToolChain - Access to tools for a single platform.
Definition: ToolChain.h:88