clang  6.0.0svn
Hexagon.h
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1 //===--- Hexagon.h - Declare Hexagon target feature support -----*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file declares Hexagon TargetInfo objects.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_CLANG_LIB_BASIC_TARGETS_HEXAGON_H
15 #define LLVM_CLANG_LIB_BASIC_TARGETS_HEXAGON_H
16 
17 #include "clang/Basic/TargetInfo.h"
19 #include "llvm/ADT/Triple.h"
20 #include "llvm/Support/Compiler.h"
21 
22 namespace clang {
23 namespace targets {
24 
25 // Hexagon abstract base class
26 class LLVM_LIBRARY_VISIBILITY HexagonTargetInfo : public TargetInfo {
27 
28  static const Builtin::Info BuiltinInfo[];
29  static const char *const GCCRegNames[];
30  static const TargetInfo::GCCRegAlias GCCRegAliases[];
31  std::string CPU;
32  std::string HVXVersion;
33  bool HasHVX = false;
34  bool HasHVX64B = false;
35  bool HasHVX128B = false;
36  bool UseLongCalls = false;
37 
38 public:
39  HexagonTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
40  : TargetInfo(Triple) {
41  // Specify the vector alignment explicitly. For v512x1, the calculated
42  // alignment would be 512*alignment(i1), which is 512 bytes, instead of
43  // the required minimum of 64 bytes.
44  resetDataLayout(
45  "e-m:e-p:32:32:32-a:0-n16:32-"
46  "i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-"
47  "v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048");
48  SizeType = UnsignedInt;
49  PtrDiffType = SignedInt;
50  IntPtrType = SignedInt;
51 
52  // {} in inline assembly are packet specifiers, not assembly variant
53  // specifiers.
54  NoAsmVariants = true;
55 
56  LargeArrayMinWidth = 64;
57  LargeArrayAlign = 64;
58  UseBitFieldTypeAlignment = true;
59  ZeroLengthBitfieldBoundary = 32;
60  }
61 
62  ArrayRef<Builtin::Info> getTargetBuiltins() const override;
63 
64  bool validateAsmConstraint(const char *&Name,
65  TargetInfo::ConstraintInfo &Info) const override {
66  switch (*Name) {
67  case 'v':
68  case 'q':
69  if (HasHVX) {
70  Info.setAllowsRegister();
71  return true;
72  }
73  break;
74  case 'a': // Modifier register m0-m1.
75  Info.setAllowsRegister();
76  return true;
77  case 's':
78  // Relocatable constant.
79  return true;
80  }
81  return false;
82  }
83 
84  void getTargetDefines(const LangOptions &Opts,
85  MacroBuilder &Builder) const override;
86 
87  bool isCLZForZeroUndef() const override { return false; }
88 
89  bool hasFeature(StringRef Feature) const override;
90 
91  bool
92  initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags,
93  StringRef CPU,
94  const std::vector<std::string> &FeaturesVec) const override;
95 
96  bool handleTargetFeatures(std::vector<std::string> &Features,
97  DiagnosticsEngine &Diags) override;
98 
101  }
102 
103  ArrayRef<const char *> getGCCRegNames() const override;
104 
105  ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override;
106 
107  const char *getClobbers() const override { return ""; }
108 
109  static const char *getHexagonCPUSuffix(StringRef Name);
110 
111  bool isValidCPUName(StringRef Name) const override {
112  return getHexagonCPUSuffix(Name);
113  }
114 
115  bool setCPU(const std::string &Name) override {
116  if (!isValidCPUName(Name))
117  return false;
118  CPU = Name;
119  return true;
120  }
121 
122  int getEHDataRegisterNumber(unsigned RegNo) const override {
123  return RegNo < 2 ? RegNo : -1;
124  }
125 };
126 } // namespace targets
127 } // namespace clang
128 #endif // LLVM_CLANG_LIB_BASIC_TARGETS_HEXAGON_H
bool setCPU(const std::string &Name) override
Target the specified CPU.
Definition: Hexagon.h:115
static const Builtin::Info BuiltinInfo[]
Definition: Builtins.cpp:21
static bool hasFeature(StringRef Feature, const LangOptions &LangOpts, const TargetInfo &Target)
Determine whether a translation unit built using the current language options has the given feature...
Definition: Module.cpp:73
Options for controlling the target.
Definition: TargetOptions.h:26
const char * getClobbers() const override
Returns a string of target-specific clobbers, in LLVM format.
Definition: Hexagon.h:107
Keeps track of the various options that can be enabled, which controls the dialect of C or C++ that i...
Definition: LangOptions.h:48
Concrete class used by the front-end to report problems and issues.
Definition: Diagnostic.h:147
bool isCLZForZeroUndef() const override
The __builtin_clz* and __builtin_ctz* built-in functions are specified to have undefined results for ...
Definition: Hexagon.h:87
static const char *const GCCRegNames[]
Definition: X86.cpp:42
Exposes information about the current target.
Definition: TargetInfo.h:54
HexagonTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
Definition: Hexagon.h:39
int getEHDataRegisterNumber(unsigned RegNo) const override
Return the register number that __builtin_eh_return_regno would return with the specified argument...
Definition: Hexagon.h:122
bool isValidCPUName(StringRef Name) const override
brief Determine whether this TargetInfo supports the given CPU name.
Definition: Hexagon.h:111
Defines the clang::TargetOptions class.
Dataflow Directional Tag Classes.
typedef char* __builtin_va_list;
Definition: TargetInfo.h:154
bool validateAsmConstraint(const char *&Name, TargetInfo::ConstraintInfo &Info) const override
Definition: Hexagon.h:64
BuiltinVaListKind
The different kinds of __builtin_va_list types defined by the target implementation.
Definition: TargetInfo.h:152
Defines the clang::TargetInfo interface.
BuiltinVaListKind getBuiltinVaListKind() const override
Returns the kind of __builtin_va_list type that should be used with this target.
Definition: Hexagon.h:99