clang 22.0.0git
avx512vlintrin.h
Go to the documentation of this file.
1/*===---- avx512vlintrin.h - AVX512VL intrinsics ---------------------------===
2 *
3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 * See https://llvm.org/LICENSE.txt for license information.
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 *
7 *===-----------------------------------------------------------------------===
8 */
9
10#ifndef __IMMINTRIN_H
11#error "Never use <avx512vlintrin.h> directly; include <immintrin.h> instead."
12#endif
13
14#ifndef __AVX512VLINTRIN_H
15#define __AVX512VLINTRIN_H
16
17#define __DEFAULT_FN_ATTRS128 \
18 __attribute__((__always_inline__, __nodebug__, __target__("avx512vl"), \
19 __min_vector_width__(128)))
20#define __DEFAULT_FN_ATTRS256 \
21 __attribute__((__always_inline__, __nodebug__, __target__("avx512vl"), \
22 __min_vector_width__(256)))
23
24#if defined(__cplusplus) && (__cplusplus >= 201103L)
25#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 constexpr
26#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr
27#else
28#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256
29#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128
30#endif
31
32typedef short __v2hi __attribute__((__vector_size__(4)));
33typedef char __v4qi __attribute__((__vector_size__(4)));
34typedef char __v2qi __attribute__((__vector_size__(2)));
35
36/* Integer compare */
37
38#define _mm_cmpeq_epi32_mask(A, B) \
39 _mm_cmp_epi32_mask((A), (B), _MM_CMPINT_EQ)
40#define _mm_mask_cmpeq_epi32_mask(k, A, B) \
41 _mm_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_EQ)
42#define _mm_cmpge_epi32_mask(A, B) \
43 _mm_cmp_epi32_mask((A), (B), _MM_CMPINT_GE)
44#define _mm_mask_cmpge_epi32_mask(k, A, B) \
45 _mm_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_GE)
46#define _mm_cmpgt_epi32_mask(A, B) \
47 _mm_cmp_epi32_mask((A), (B), _MM_CMPINT_GT)
48#define _mm_mask_cmpgt_epi32_mask(k, A, B) \
49 _mm_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_GT)
50#define _mm_cmple_epi32_mask(A, B) \
51 _mm_cmp_epi32_mask((A), (B), _MM_CMPINT_LE)
52#define _mm_mask_cmple_epi32_mask(k, A, B) \
53 _mm_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_LE)
54#define _mm_cmplt_epi32_mask(A, B) \
55 _mm_cmp_epi32_mask((A), (B), _MM_CMPINT_LT)
56#define _mm_mask_cmplt_epi32_mask(k, A, B) \
57 _mm_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_LT)
58#define _mm_cmpneq_epi32_mask(A, B) \
59 _mm_cmp_epi32_mask((A), (B), _MM_CMPINT_NE)
60#define _mm_mask_cmpneq_epi32_mask(k, A, B) \
61 _mm_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_NE)
62
63#define _mm256_cmpeq_epi32_mask(A, B) \
64 _mm256_cmp_epi32_mask((A), (B), _MM_CMPINT_EQ)
65#define _mm256_mask_cmpeq_epi32_mask(k, A, B) \
66 _mm256_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_EQ)
67#define _mm256_cmpge_epi32_mask(A, B) \
68 _mm256_cmp_epi32_mask((A), (B), _MM_CMPINT_GE)
69#define _mm256_mask_cmpge_epi32_mask(k, A, B) \
70 _mm256_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_GE)
71#define _mm256_cmpgt_epi32_mask(A, B) \
72 _mm256_cmp_epi32_mask((A), (B), _MM_CMPINT_GT)
73#define _mm256_mask_cmpgt_epi32_mask(k, A, B) \
74 _mm256_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_GT)
75#define _mm256_cmple_epi32_mask(A, B) \
76 _mm256_cmp_epi32_mask((A), (B), _MM_CMPINT_LE)
77#define _mm256_mask_cmple_epi32_mask(k, A, B) \
78 _mm256_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_LE)
79#define _mm256_cmplt_epi32_mask(A, B) \
80 _mm256_cmp_epi32_mask((A), (B), _MM_CMPINT_LT)
81#define _mm256_mask_cmplt_epi32_mask(k, A, B) \
82 _mm256_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_LT)
83#define _mm256_cmpneq_epi32_mask(A, B) \
84 _mm256_cmp_epi32_mask((A), (B), _MM_CMPINT_NE)
85#define _mm256_mask_cmpneq_epi32_mask(k, A, B) \
86 _mm256_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_NE)
87
88#define _mm_cmpeq_epu32_mask(A, B) \
89 _mm_cmp_epu32_mask((A), (B), _MM_CMPINT_EQ)
90#define _mm_mask_cmpeq_epu32_mask(k, A, B) \
91 _mm_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_EQ)
92#define _mm_cmpge_epu32_mask(A, B) \
93 _mm_cmp_epu32_mask((A), (B), _MM_CMPINT_GE)
94#define _mm_mask_cmpge_epu32_mask(k, A, B) \
95 _mm_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_GE)
96#define _mm_cmpgt_epu32_mask(A, B) \
97 _mm_cmp_epu32_mask((A), (B), _MM_CMPINT_GT)
98#define _mm_mask_cmpgt_epu32_mask(k, A, B) \
99 _mm_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_GT)
100#define _mm_cmple_epu32_mask(A, B) \
101 _mm_cmp_epu32_mask((A), (B), _MM_CMPINT_LE)
102#define _mm_mask_cmple_epu32_mask(k, A, B) \
103 _mm_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_LE)
104#define _mm_cmplt_epu32_mask(A, B) \
105 _mm_cmp_epu32_mask((A), (B), _MM_CMPINT_LT)
106#define _mm_mask_cmplt_epu32_mask(k, A, B) \
107 _mm_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_LT)
108#define _mm_cmpneq_epu32_mask(A, B) \
109 _mm_cmp_epu32_mask((A), (B), _MM_CMPINT_NE)
110#define _mm_mask_cmpneq_epu32_mask(k, A, B) \
111 _mm_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_NE)
112
113#define _mm256_cmpeq_epu32_mask(A, B) \
114 _mm256_cmp_epu32_mask((A), (B), _MM_CMPINT_EQ)
115#define _mm256_mask_cmpeq_epu32_mask(k, A, B) \
116 _mm256_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_EQ)
117#define _mm256_cmpge_epu32_mask(A, B) \
118 _mm256_cmp_epu32_mask((A), (B), _MM_CMPINT_GE)
119#define _mm256_mask_cmpge_epu32_mask(k, A, B) \
120 _mm256_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_GE)
121#define _mm256_cmpgt_epu32_mask(A, B) \
122 _mm256_cmp_epu32_mask((A), (B), _MM_CMPINT_GT)
123#define _mm256_mask_cmpgt_epu32_mask(k, A, B) \
124 _mm256_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_GT)
125#define _mm256_cmple_epu32_mask(A, B) \
126 _mm256_cmp_epu32_mask((A), (B), _MM_CMPINT_LE)
127#define _mm256_mask_cmple_epu32_mask(k, A, B) \
128 _mm256_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_LE)
129#define _mm256_cmplt_epu32_mask(A, B) \
130 _mm256_cmp_epu32_mask((A), (B), _MM_CMPINT_LT)
131#define _mm256_mask_cmplt_epu32_mask(k, A, B) \
132 _mm256_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_LT)
133#define _mm256_cmpneq_epu32_mask(A, B) \
134 _mm256_cmp_epu32_mask((A), (B), _MM_CMPINT_NE)
135#define _mm256_mask_cmpneq_epu32_mask(k, A, B) \
136 _mm256_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_NE)
137
138#define _mm_cmpeq_epi64_mask(A, B) \
139 _mm_cmp_epi64_mask((A), (B), _MM_CMPINT_EQ)
140#define _mm_mask_cmpeq_epi64_mask(k, A, B) \
141 _mm_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_EQ)
142#define _mm_cmpge_epi64_mask(A, B) \
143 _mm_cmp_epi64_mask((A), (B), _MM_CMPINT_GE)
144#define _mm_mask_cmpge_epi64_mask(k, A, B) \
145 _mm_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_GE)
146#define _mm_cmpgt_epi64_mask(A, B) \
147 _mm_cmp_epi64_mask((A), (B), _MM_CMPINT_GT)
148#define _mm_mask_cmpgt_epi64_mask(k, A, B) \
149 _mm_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_GT)
150#define _mm_cmple_epi64_mask(A, B) \
151 _mm_cmp_epi64_mask((A), (B), _MM_CMPINT_LE)
152#define _mm_mask_cmple_epi64_mask(k, A, B) \
153 _mm_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_LE)
154#define _mm_cmplt_epi64_mask(A, B) \
155 _mm_cmp_epi64_mask((A), (B), _MM_CMPINT_LT)
156#define _mm_mask_cmplt_epi64_mask(k, A, B) \
157 _mm_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_LT)
158#define _mm_cmpneq_epi64_mask(A, B) \
159 _mm_cmp_epi64_mask((A), (B), _MM_CMPINT_NE)
160#define _mm_mask_cmpneq_epi64_mask(k, A, B) \
161 _mm_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_NE)
162
163#define _mm256_cmpeq_epi64_mask(A, B) \
164 _mm256_cmp_epi64_mask((A), (B), _MM_CMPINT_EQ)
165#define _mm256_mask_cmpeq_epi64_mask(k, A, B) \
166 _mm256_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_EQ)
167#define _mm256_cmpge_epi64_mask(A, B) \
168 _mm256_cmp_epi64_mask((A), (B), _MM_CMPINT_GE)
169#define _mm256_mask_cmpge_epi64_mask(k, A, B) \
170 _mm256_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_GE)
171#define _mm256_cmpgt_epi64_mask(A, B) \
172 _mm256_cmp_epi64_mask((A), (B), _MM_CMPINT_GT)
173#define _mm256_mask_cmpgt_epi64_mask(k, A, B) \
174 _mm256_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_GT)
175#define _mm256_cmple_epi64_mask(A, B) \
176 _mm256_cmp_epi64_mask((A), (B), _MM_CMPINT_LE)
177#define _mm256_mask_cmple_epi64_mask(k, A, B) \
178 _mm256_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_LE)
179#define _mm256_cmplt_epi64_mask(A, B) \
180 _mm256_cmp_epi64_mask((A), (B), _MM_CMPINT_LT)
181#define _mm256_mask_cmplt_epi64_mask(k, A, B) \
182 _mm256_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_LT)
183#define _mm256_cmpneq_epi64_mask(A, B) \
184 _mm256_cmp_epi64_mask((A), (B), _MM_CMPINT_NE)
185#define _mm256_mask_cmpneq_epi64_mask(k, A, B) \
186 _mm256_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_NE)
187
188#define _mm_cmpeq_epu64_mask(A, B) \
189 _mm_cmp_epu64_mask((A), (B), _MM_CMPINT_EQ)
190#define _mm_mask_cmpeq_epu64_mask(k, A, B) \
191 _mm_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_EQ)
192#define _mm_cmpge_epu64_mask(A, B) \
193 _mm_cmp_epu64_mask((A), (B), _MM_CMPINT_GE)
194#define _mm_mask_cmpge_epu64_mask(k, A, B) \
195 _mm_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_GE)
196#define _mm_cmpgt_epu64_mask(A, B) \
197 _mm_cmp_epu64_mask((A), (B), _MM_CMPINT_GT)
198#define _mm_mask_cmpgt_epu64_mask(k, A, B) \
199 _mm_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_GT)
200#define _mm_cmple_epu64_mask(A, B) \
201 _mm_cmp_epu64_mask((A), (B), _MM_CMPINT_LE)
202#define _mm_mask_cmple_epu64_mask(k, A, B) \
203 _mm_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_LE)
204#define _mm_cmplt_epu64_mask(A, B) \
205 _mm_cmp_epu64_mask((A), (B), _MM_CMPINT_LT)
206#define _mm_mask_cmplt_epu64_mask(k, A, B) \
207 _mm_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_LT)
208#define _mm_cmpneq_epu64_mask(A, B) \
209 _mm_cmp_epu64_mask((A), (B), _MM_CMPINT_NE)
210#define _mm_mask_cmpneq_epu64_mask(k, A, B) \
211 _mm_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_NE)
212
213#define _mm256_cmpeq_epu64_mask(A, B) \
214 _mm256_cmp_epu64_mask((A), (B), _MM_CMPINT_EQ)
215#define _mm256_mask_cmpeq_epu64_mask(k, A, B) \
216 _mm256_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_EQ)
217#define _mm256_cmpge_epu64_mask(A, B) \
218 _mm256_cmp_epu64_mask((A), (B), _MM_CMPINT_GE)
219#define _mm256_mask_cmpge_epu64_mask(k, A, B) \
220 _mm256_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_GE)
221#define _mm256_cmpgt_epu64_mask(A, B) \
222 _mm256_cmp_epu64_mask((A), (B), _MM_CMPINT_GT)
223#define _mm256_mask_cmpgt_epu64_mask(k, A, B) \
224 _mm256_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_GT)
225#define _mm256_cmple_epu64_mask(A, B) \
226 _mm256_cmp_epu64_mask((A), (B), _MM_CMPINT_LE)
227#define _mm256_mask_cmple_epu64_mask(k, A, B) \
228 _mm256_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_LE)
229#define _mm256_cmplt_epu64_mask(A, B) \
230 _mm256_cmp_epu64_mask((A), (B), _MM_CMPINT_LT)
231#define _mm256_mask_cmplt_epu64_mask(k, A, B) \
232 _mm256_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_LT)
233#define _mm256_cmpneq_epu64_mask(A, B) \
234 _mm256_cmp_epu64_mask((A), (B), _MM_CMPINT_NE)
235#define _mm256_mask_cmpneq_epu64_mask(k, A, B) \
236 _mm256_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_NE)
237
238static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
239_mm256_mask_add_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) {
240 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
241 (__v8si)_mm256_add_epi32(__A, __B),
242 (__v8si)__W);
243}
244
245static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
246_mm256_maskz_add_epi32(__mmask8 __U, __m256i __A, __m256i __B) {
247 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
248 (__v8si)_mm256_add_epi32(__A, __B),
249 (__v8si)_mm256_setzero_si256());
250}
251
252static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
253_mm256_mask_add_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) {
254 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
255 (__v4di)_mm256_add_epi64(__A, __B),
256 (__v4di)__W);
257}
258
259static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
260_mm256_maskz_add_epi64(__mmask8 __U, __m256i __A, __m256i __B) {
261 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
262 (__v4di)_mm256_add_epi64(__A, __B),
263 (__v4di)_mm256_setzero_si256());
264}
265
266static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
267_mm256_mask_sub_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) {
268 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
269 (__v8si)_mm256_sub_epi32(__A, __B),
270 (__v8si)__W);
271}
272
273static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
274_mm256_maskz_sub_epi32(__mmask8 __U, __m256i __A, __m256i __B) {
275 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
276 (__v8si)_mm256_sub_epi32(__A, __B),
277 (__v8si)_mm256_setzero_si256());
278}
279
280static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
281_mm256_mask_sub_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) {
282 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
283 (__v4di)_mm256_sub_epi64(__A, __B),
284 (__v4di)__W);
285}
286
287static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
288_mm256_maskz_sub_epi64(__mmask8 __U, __m256i __A, __m256i __B) {
289 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
290 (__v4di)_mm256_sub_epi64(__A, __B),
291 (__v4di)_mm256_setzero_si256());
292}
293
294static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
295_mm_mask_add_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
296 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
297 (__v4si)_mm_add_epi32(__A, __B),
298 (__v4si)__W);
299}
300
301static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
302_mm_maskz_add_epi32(__mmask8 __U, __m128i __A, __m128i __B) {
303 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
304 (__v4si)_mm_add_epi32(__A, __B),
305 (__v4si)_mm_setzero_si128());
306}
307
308static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
309_mm_mask_add_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
310 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
311 (__v2di)_mm_add_epi64(__A, __B),
312 (__v2di)__W);
313}
314
315static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
316_mm_maskz_add_epi64(__mmask8 __U, __m128i __A, __m128i __B) {
317 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
318 (__v2di)_mm_add_epi64(__A, __B),
319 (__v2di)_mm_setzero_si128());
320}
321
322static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
323_mm_mask_sub_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
324 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
325 (__v4si)_mm_sub_epi32(__A, __B),
326 (__v4si)__W);
327}
328
329static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
330_mm_maskz_sub_epi32(__mmask8 __U, __m128i __A, __m128i __B) {
331 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
332 (__v4si)_mm_sub_epi32(__A, __B),
333 (__v4si)_mm_setzero_si128());
334}
335
336static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
337_mm_mask_sub_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
338 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
339 (__v2di)_mm_sub_epi64(__A, __B),
340 (__v2di)__W);
341}
342
343static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
344_mm_maskz_sub_epi64(__mmask8 __U, __m128i __A, __m128i __B) {
345 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
346 (__v2di)_mm_sub_epi64(__A, __B),
347 (__v2di)_mm_setzero_si128());
348}
349
350static __inline__ __m256i __DEFAULT_FN_ATTRS256
351_mm256_mask_mul_epi32(__m256i __W, __mmask8 __M, __m256i __X, __m256i __Y)
352{
353 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
354 (__v4di)_mm256_mul_epi32(__X, __Y),
355 (__v4di)__W);
356}
357
358static __inline__ __m256i __DEFAULT_FN_ATTRS256
359_mm256_maskz_mul_epi32(__mmask8 __M, __m256i __X, __m256i __Y)
360{
361 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
362 (__v4di)_mm256_mul_epi32(__X, __Y),
363 (__v4di)_mm256_setzero_si256());
364}
365
366static __inline__ __m128i __DEFAULT_FN_ATTRS128
367_mm_mask_mul_epi32(__m128i __W, __mmask8 __M, __m128i __X, __m128i __Y)
368{
369 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,
370 (__v2di)_mm_mul_epi32(__X, __Y),
371 (__v2di)__W);
372}
373
374static __inline__ __m128i __DEFAULT_FN_ATTRS128
375_mm_maskz_mul_epi32(__mmask8 __M, __m128i __X, __m128i __Y)
376{
377 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,
378 (__v2di)_mm_mul_epi32(__X, __Y),
379 (__v2di)_mm_setzero_si128());
380}
381
382static __inline__ __m256i __DEFAULT_FN_ATTRS256
383_mm256_mask_mul_epu32(__m256i __W, __mmask8 __M, __m256i __X, __m256i __Y)
384{
385 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
386 (__v4di)_mm256_mul_epu32(__X, __Y),
387 (__v4di)__W);
388}
389
390static __inline__ __m256i __DEFAULT_FN_ATTRS256
391_mm256_maskz_mul_epu32(__mmask8 __M, __m256i __X, __m256i __Y)
392{
393 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
394 (__v4di)_mm256_mul_epu32(__X, __Y),
395 (__v4di)_mm256_setzero_si256());
396}
397
398static __inline__ __m128i __DEFAULT_FN_ATTRS128
399_mm_mask_mul_epu32(__m128i __W, __mmask8 __M, __m128i __X, __m128i __Y)
400{
401 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,
402 (__v2di)_mm_mul_epu32(__X, __Y),
403 (__v2di)__W);
404}
405
406static __inline__ __m128i __DEFAULT_FN_ATTRS128
407_mm_maskz_mul_epu32(__mmask8 __M, __m128i __X, __m128i __Y)
408{
409 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,
410 (__v2di)_mm_mul_epu32(__X, __Y),
411 (__v2di)_mm_setzero_si128());
412}
413
414static __inline__ __m256i __DEFAULT_FN_ATTRS128_CONSTEXPR
415_mm256_maskz_mullo_epi32(__mmask8 __M, __m256i __A, __m256i __B) {
416 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
417 (__v8si)_mm256_mullo_epi32(__A, __B),
418 (__v8si)_mm256_setzero_si256());
419}
420
421static __inline__ __m256i __DEFAULT_FN_ATTRS128_CONSTEXPR
422_mm256_mask_mullo_epi32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
423 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
424 (__v8si)_mm256_mullo_epi32(__A, __B),
425 (__v8si)__W);
426}
427
428static __inline__ __m128i __DEFAULT_FN_ATTRS128
429_mm_maskz_mullo_epi32(__mmask8 __M, __m128i __A, __m128i __B)
430{
431 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,
432 (__v4si)_mm_mullo_epi32(__A, __B),
433 (__v4si)_mm_setzero_si128());
434}
435
436static __inline__ __m128i __DEFAULT_FN_ATTRS128
437_mm_mask_mullo_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B)
438{
439 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,
440 (__v4si)_mm_mullo_epi32(__A, __B),
441 (__v4si)__W);
442}
443
444static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
445_mm256_and_epi32(__m256i __a, __m256i __b) {
446 return (__m256i)((__v8su)__a & (__v8su)__b);
447}
448
449static __inline__ __m256i __DEFAULT_FN_ATTRS256
450_mm256_mask_and_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
451{
452 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
453 (__v8si)_mm256_and_epi32(__A, __B),
454 (__v8si)__W);
455}
456
457static __inline__ __m256i __DEFAULT_FN_ATTRS256
458_mm256_maskz_and_epi32(__mmask8 __U, __m256i __A, __m256i __B)
459{
460 return (__m256i)_mm256_mask_and_epi32(_mm256_setzero_si256(), __U, __A, __B);
461}
462
463static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
464_mm_and_epi32(__m128i __a, __m128i __b) {
465 return (__m128i)((__v4su)__a & (__v4su)__b);
466}
467
468static __inline__ __m128i __DEFAULT_FN_ATTRS128
469_mm_mask_and_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
470{
471 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
472 (__v4si)_mm_and_epi32(__A, __B),
473 (__v4si)__W);
474}
475
476static __inline__ __m128i __DEFAULT_FN_ATTRS128
477_mm_maskz_and_epi32(__mmask8 __U, __m128i __A, __m128i __B)
478{
479 return (__m128i)_mm_mask_and_epi32(_mm_setzero_si128(), __U, __A, __B);
480}
481
482static __inline__ __m256i __DEFAULT_FN_ATTRS256
483_mm256_andnot_epi32(__m256i __A, __m256i __B)
484{
485 return (__m256i)(~(__v8su)__A & (__v8su)__B);
486}
487
488static __inline__ __m256i __DEFAULT_FN_ATTRS256
489_mm256_mask_andnot_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
490{
491 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
492 (__v8si)_mm256_andnot_epi32(__A, __B),
493 (__v8si)__W);
494}
495
496static __inline__ __m256i __DEFAULT_FN_ATTRS256
497_mm256_maskz_andnot_epi32(__mmask8 __U, __m256i __A, __m256i __B)
498{
500 __U, __A, __B);
501}
502
503static __inline__ __m128i __DEFAULT_FN_ATTRS128
504_mm_andnot_epi32(__m128i __A, __m128i __B)
505{
506 return (__m128i)(~(__v4su)__A & (__v4su)__B);
507}
508
509static __inline__ __m128i __DEFAULT_FN_ATTRS128
510_mm_mask_andnot_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
511{
512 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
513 (__v4si)_mm_andnot_epi32(__A, __B),
514 (__v4si)__W);
515}
516
517static __inline__ __m128i __DEFAULT_FN_ATTRS128
518_mm_maskz_andnot_epi32(__mmask8 __U, __m128i __A, __m128i __B)
519{
520 return (__m128i)_mm_mask_andnot_epi32(_mm_setzero_si128(), __U, __A, __B);
521}
522
523static __inline__ __m256i __DEFAULT_FN_ATTRS256
524_mm256_or_epi32(__m256i __a, __m256i __b)
525{
526 return (__m256i)((__v8su)__a | (__v8su)__b);
527}
528
529static __inline__ __m256i __DEFAULT_FN_ATTRS256
530_mm256_mask_or_epi32 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
531{
532 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
533 (__v8si)_mm256_or_epi32(__A, __B),
534 (__v8si)__W);
535}
536
537static __inline__ __m256i __DEFAULT_FN_ATTRS256
538_mm256_maskz_or_epi32(__mmask8 __U, __m256i __A, __m256i __B)
539{
540 return (__m256i)_mm256_mask_or_epi32(_mm256_setzero_si256(), __U, __A, __B);
541}
542
543static __inline__ __m128i __DEFAULT_FN_ATTRS128
544_mm_or_epi32(__m128i __a, __m128i __b)
545{
546 return (__m128i)((__v4su)__a | (__v4su)__b);
547}
548
549static __inline__ __m128i __DEFAULT_FN_ATTRS128
550_mm_mask_or_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
551{
552 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
553 (__v4si)_mm_or_epi32(__A, __B),
554 (__v4si)__W);
555}
556
557static __inline__ __m128i __DEFAULT_FN_ATTRS128
558_mm_maskz_or_epi32(__mmask8 __U, __m128i __A, __m128i __B)
559{
560 return (__m128i)_mm_mask_or_epi32(_mm_setzero_si128(), __U, __A, __B);
561}
562
563static __inline__ __m256i __DEFAULT_FN_ATTRS256
564_mm256_xor_epi32(__m256i __a, __m256i __b)
565{
566 return (__m256i)((__v8su)__a ^ (__v8su)__b);
567}
568
569static __inline__ __m256i __DEFAULT_FN_ATTRS256
570_mm256_mask_xor_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
571{
572 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
573 (__v8si)_mm256_xor_epi32(__A, __B),
574 (__v8si)__W);
575}
576
577static __inline__ __m256i __DEFAULT_FN_ATTRS256
578_mm256_maskz_xor_epi32(__mmask8 __U, __m256i __A, __m256i __B)
579{
580 return (__m256i)_mm256_mask_xor_epi32(_mm256_setzero_si256(), __U, __A, __B);
581}
582
583static __inline__ __m128i __DEFAULT_FN_ATTRS128
584_mm_xor_epi32(__m128i __a, __m128i __b)
585{
586 return (__m128i)((__v4su)__a ^ (__v4su)__b);
587}
588
589static __inline__ __m128i __DEFAULT_FN_ATTRS128
590_mm_mask_xor_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
591{
592 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
593 (__v4si)_mm_xor_epi32(__A, __B),
594 (__v4si)__W);
595}
596
597static __inline__ __m128i __DEFAULT_FN_ATTRS128
598_mm_maskz_xor_epi32(__mmask8 __U, __m128i __A, __m128i __B)
599{
600 return (__m128i)_mm_mask_xor_epi32(_mm_setzero_si128(), __U, __A, __B);
601}
602
603static __inline__ __m256i __DEFAULT_FN_ATTRS256
604_mm256_and_epi64(__m256i __a, __m256i __b)
605{
606 return (__m256i)((__v4du)__a & (__v4du)__b);
607}
608
609static __inline__ __m256i __DEFAULT_FN_ATTRS256
610_mm256_mask_and_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
611{
612 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
613 (__v4di)_mm256_and_epi64(__A, __B),
614 (__v4di)__W);
615}
616
617static __inline__ __m256i __DEFAULT_FN_ATTRS256
618_mm256_maskz_and_epi64(__mmask8 __U, __m256i __A, __m256i __B)
619{
620 return (__m256i)_mm256_mask_and_epi64(_mm256_setzero_si256(), __U, __A, __B);
621}
622
623static __inline__ __m128i __DEFAULT_FN_ATTRS128
624_mm_and_epi64(__m128i __a, __m128i __b)
625{
626 return (__m128i)((__v2du)__a & (__v2du)__b);
627}
628
629static __inline__ __m128i __DEFAULT_FN_ATTRS128
630_mm_mask_and_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
631{
632 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
633 (__v2di)_mm_and_epi64(__A, __B),
634 (__v2di)__W);
635}
636
637static __inline__ __m128i __DEFAULT_FN_ATTRS128
638_mm_maskz_and_epi64(__mmask8 __U, __m128i __A, __m128i __B)
639{
640 return (__m128i)_mm_mask_and_epi64(_mm_setzero_si128(), __U, __A, __B);
641}
642
643static __inline__ __m256i __DEFAULT_FN_ATTRS256
644_mm256_andnot_epi64(__m256i __A, __m256i __B)
645{
646 return (__m256i)(~(__v4du)__A & (__v4du)__B);
647}
648
649static __inline__ __m256i __DEFAULT_FN_ATTRS256
650_mm256_mask_andnot_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
651{
652 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
653 (__v4di)_mm256_andnot_epi64(__A, __B),
654 (__v4di)__W);
655}
656
657static __inline__ __m256i __DEFAULT_FN_ATTRS256
658_mm256_maskz_andnot_epi64(__mmask8 __U, __m256i __A, __m256i __B)
659{
661 __U, __A, __B);
662}
663
664static __inline__ __m128i __DEFAULT_FN_ATTRS128
665_mm_andnot_epi64(__m128i __A, __m128i __B)
666{
667 return (__m128i)(~(__v2du)__A & (__v2du)__B);
668}
669
670static __inline__ __m128i __DEFAULT_FN_ATTRS128
671_mm_mask_andnot_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
672{
673 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
674 (__v2di)_mm_andnot_epi64(__A, __B),
675 (__v2di)__W);
676}
677
678static __inline__ __m128i __DEFAULT_FN_ATTRS128
679_mm_maskz_andnot_epi64(__mmask8 __U, __m128i __A, __m128i __B)
680{
681 return (__m128i)_mm_mask_andnot_epi64(_mm_setzero_si128(), __U, __A, __B);
682}
683
684static __inline__ __m256i __DEFAULT_FN_ATTRS256
685_mm256_or_epi64(__m256i __a, __m256i __b)
686{
687 return (__m256i)((__v4du)__a | (__v4du)__b);
688}
689
690static __inline__ __m256i __DEFAULT_FN_ATTRS256
691_mm256_mask_or_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
692{
693 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
694 (__v4di)_mm256_or_epi64(__A, __B),
695 (__v4di)__W);
696}
697
698static __inline__ __m256i __DEFAULT_FN_ATTRS256
699_mm256_maskz_or_epi64(__mmask8 __U, __m256i __A, __m256i __B)
700{
701 return (__m256i)_mm256_mask_or_epi64(_mm256_setzero_si256(), __U, __A, __B);
702}
703
704static __inline__ __m128i __DEFAULT_FN_ATTRS128
705_mm_or_epi64(__m128i __a, __m128i __b)
706{
707 return (__m128i)((__v2du)__a | (__v2du)__b);
708}
709
710static __inline__ __m128i __DEFAULT_FN_ATTRS128
711_mm_mask_or_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
712{
713 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
714 (__v2di)_mm_or_epi64(__A, __B),
715 (__v2di)__W);
716}
717
718static __inline__ __m128i __DEFAULT_FN_ATTRS128
719_mm_maskz_or_epi64(__mmask8 __U, __m128i __A, __m128i __B)
720{
721 return (__m128i)_mm_mask_or_epi64(_mm_setzero_si128(), __U, __A, __B);
722}
723
724static __inline__ __m256i __DEFAULT_FN_ATTRS256
725_mm256_xor_epi64(__m256i __a, __m256i __b)
726{
727 return (__m256i)((__v4du)__a ^ (__v4du)__b);
728}
729
730static __inline__ __m256i __DEFAULT_FN_ATTRS256
731_mm256_mask_xor_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
732{
733 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
734 (__v4di)_mm256_xor_epi64(__A, __B),
735 (__v4di)__W);
736}
737
738static __inline__ __m256i __DEFAULT_FN_ATTRS256
739_mm256_maskz_xor_epi64(__mmask8 __U, __m256i __A, __m256i __B)
740{
741 return (__m256i)_mm256_mask_xor_epi64(_mm256_setzero_si256(), __U, __A, __B);
742}
743
744static __inline__ __m128i __DEFAULT_FN_ATTRS128
745_mm_xor_epi64(__m128i __a, __m128i __b)
746{
747 return (__m128i)((__v2du)__a ^ (__v2du)__b);
748}
749
750static __inline__ __m128i __DEFAULT_FN_ATTRS128
751_mm_mask_xor_epi64(__m128i __W, __mmask8 __U, __m128i __A,
752 __m128i __B)
753{
754 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
755 (__v2di)_mm_xor_epi64(__A, __B),
756 (__v2di)__W);
757}
758
759static __inline__ __m128i __DEFAULT_FN_ATTRS128
760_mm_maskz_xor_epi64(__mmask8 __U, __m128i __A, __m128i __B)
761{
762 return (__m128i)_mm_mask_xor_epi64(_mm_setzero_si128(), __U, __A, __B);
763}
764
765#define _mm_cmp_epi32_mask(a, b, p) \
766 ((__mmask8)__builtin_ia32_cmpd128_mask((__v4si)(__m128i)(a), \
767 (__v4si)(__m128i)(b), (int)(p), \
768 (__mmask8)-1))
769
770#define _mm_mask_cmp_epi32_mask(m, a, b, p) \
771 ((__mmask8)__builtin_ia32_cmpd128_mask((__v4si)(__m128i)(a), \
772 (__v4si)(__m128i)(b), (int)(p), \
773 (__mmask8)(m)))
774
775#define _mm_cmp_epu32_mask(a, b, p) \
776 ((__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)(__m128i)(a), \
777 (__v4si)(__m128i)(b), (int)(p), \
778 (__mmask8)-1))
779
780#define _mm_mask_cmp_epu32_mask(m, a, b, p) \
781 ((__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)(__m128i)(a), \
782 (__v4si)(__m128i)(b), (int)(p), \
783 (__mmask8)(m)))
784
785#define _mm256_cmp_epi32_mask(a, b, p) \
786 ((__mmask8)__builtin_ia32_cmpd256_mask((__v8si)(__m256i)(a), \
787 (__v8si)(__m256i)(b), (int)(p), \
788 (__mmask8)-1))
789
790#define _mm256_mask_cmp_epi32_mask(m, a, b, p) \
791 ((__mmask8)__builtin_ia32_cmpd256_mask((__v8si)(__m256i)(a), \
792 (__v8si)(__m256i)(b), (int)(p), \
793 (__mmask8)(m)))
794
795#define _mm256_cmp_epu32_mask(a, b, p) \
796 ((__mmask8)__builtin_ia32_ucmpd256_mask((__v8si)(__m256i)(a), \
797 (__v8si)(__m256i)(b), (int)(p), \
798 (__mmask8)-1))
799
800#define _mm256_mask_cmp_epu32_mask(m, a, b, p) \
801 ((__mmask8)__builtin_ia32_ucmpd256_mask((__v8si)(__m256i)(a), \
802 (__v8si)(__m256i)(b), (int)(p), \
803 (__mmask8)(m)))
804
805#define _mm_cmp_epi64_mask(a, b, p) \
806 ((__mmask8)__builtin_ia32_cmpq128_mask((__v2di)(__m128i)(a), \
807 (__v2di)(__m128i)(b), (int)(p), \
808 (__mmask8)-1))
809
810#define _mm_mask_cmp_epi64_mask(m, a, b, p) \
811 ((__mmask8)__builtin_ia32_cmpq128_mask((__v2di)(__m128i)(a), \
812 (__v2di)(__m128i)(b), (int)(p), \
813 (__mmask8)(m)))
814
815#define _mm_cmp_epu64_mask(a, b, p) \
816 ((__mmask8)__builtin_ia32_ucmpq128_mask((__v2di)(__m128i)(a), \
817 (__v2di)(__m128i)(b), (int)(p), \
818 (__mmask8)-1))
819
820#define _mm_mask_cmp_epu64_mask(m, a, b, p) \
821 ((__mmask8)__builtin_ia32_ucmpq128_mask((__v2di)(__m128i)(a), \
822 (__v2di)(__m128i)(b), (int)(p), \
823 (__mmask8)(m)))
824
825#define _mm256_cmp_epi64_mask(a, b, p) \
826 ((__mmask8)__builtin_ia32_cmpq256_mask((__v4di)(__m256i)(a), \
827 (__v4di)(__m256i)(b), (int)(p), \
828 (__mmask8)-1))
829
830#define _mm256_mask_cmp_epi64_mask(m, a, b, p) \
831 ((__mmask8)__builtin_ia32_cmpq256_mask((__v4di)(__m256i)(a), \
832 (__v4di)(__m256i)(b), (int)(p), \
833 (__mmask8)(m)))
834
835#define _mm256_cmp_epu64_mask(a, b, p) \
836 ((__mmask8)__builtin_ia32_ucmpq256_mask((__v4di)(__m256i)(a), \
837 (__v4di)(__m256i)(b), (int)(p), \
838 (__mmask8)-1))
839
840#define _mm256_mask_cmp_epu64_mask(m, a, b, p) \
841 ((__mmask8)__builtin_ia32_ucmpq256_mask((__v4di)(__m256i)(a), \
842 (__v4di)(__m256i)(b), (int)(p), \
843 (__mmask8)(m)))
844
845#define _mm256_cmp_ps_mask(a, b, p) \
846 ((__mmask8)__builtin_ia32_cmpps256_mask((__v8sf)(__m256)(a), \
847 (__v8sf)(__m256)(b), (int)(p), \
848 (__mmask8)-1))
849
850#define _mm256_mask_cmp_ps_mask(m, a, b, p) \
851 ((__mmask8)__builtin_ia32_cmpps256_mask((__v8sf)(__m256)(a), \
852 (__v8sf)(__m256)(b), (int)(p), \
853 (__mmask8)(m)))
854
855#define _mm256_cmp_pd_mask(a, b, p) \
856 ((__mmask8)__builtin_ia32_cmppd256_mask((__v4df)(__m256d)(a), \
857 (__v4df)(__m256d)(b), (int)(p), \
858 (__mmask8)-1))
859
860#define _mm256_mask_cmp_pd_mask(m, a, b, p) \
861 ((__mmask8)__builtin_ia32_cmppd256_mask((__v4df)(__m256d)(a), \
862 (__v4df)(__m256d)(b), (int)(p), \
863 (__mmask8)(m)))
864
865#define _mm_cmp_ps_mask(a, b, p) \
866 ((__mmask8)__builtin_ia32_cmpps128_mask((__v4sf)(__m128)(a), \
867 (__v4sf)(__m128)(b), (int)(p), \
868 (__mmask8)-1))
869
870#define _mm_mask_cmp_ps_mask(m, a, b, p) \
871 ((__mmask8)__builtin_ia32_cmpps128_mask((__v4sf)(__m128)(a), \
872 (__v4sf)(__m128)(b), (int)(p), \
873 (__mmask8)(m)))
874
875#define _mm_cmp_pd_mask(a, b, p) \
876 ((__mmask8)__builtin_ia32_cmppd128_mask((__v2df)(__m128d)(a), \
877 (__v2df)(__m128d)(b), (int)(p), \
878 (__mmask8)-1))
879
880#define _mm_mask_cmp_pd_mask(m, a, b, p) \
881 ((__mmask8)__builtin_ia32_cmppd128_mask((__v2df)(__m128d)(a), \
882 (__v2df)(__m128d)(b), (int)(p), \
883 (__mmask8)(m)))
884
885static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
886_mm_mask_fmadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) {
887 return (__m128d)__builtin_ia32_selectpd_128(
888 (__mmask8)__U, (__v2df)_mm_fmadd_pd(__A, __B, __C), (__v2df)__A);
889}
890
891static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
892_mm_mask3_fmadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) {
893 return (__m128d)__builtin_ia32_selectpd_128(
894 (__mmask8)__U, (__v2df)_mm_fmadd_pd(__A, __B, __C), (__v2df)__C);
895}
896
897static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
898_mm_maskz_fmadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) {
899 return (__m128d)__builtin_ia32_selectpd_128(
900 (__mmask8)__U, (__v2df)_mm_fmadd_pd(__A, __B, __C),
901 (__v2df)_mm_setzero_pd());
902}
903
904static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
905_mm_mask_fmsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) {
906 return (__m128d)__builtin_ia32_selectpd_128(
907 (__mmask8)__U, (__v2df)_mm_fmsub_pd(__A, __B, __C), (__v2df)__A);
908}
909
910static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
911_mm_mask3_fmsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) {
912 return (__m128d)__builtin_ia32_selectpd_128(
913 (__mmask8)__U, (__v2df)_mm_fmsub_pd(__A, __B, __C), (__v2df)__C);
914}
915
916static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
917_mm_maskz_fmsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) {
918 return (__m128d)__builtin_ia32_selectpd_128(
919 (__mmask8)__U, (__v2df)_mm_fmsub_pd(__A, __B, __C),
920 (__v2df)_mm_setzero_pd());
921}
922
923static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
924_mm_mask_fnmadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) {
925 return (__m128d)__builtin_ia32_selectpd_128(
926 (__mmask8)__U, (__v2df)_mm_fnmadd_pd(__A, __B, __C), (__v2df)__A);
927}
928
929static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
930_mm_mask3_fnmadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) {
931 return (__m128d)__builtin_ia32_selectpd_128(
932 (__mmask8)__U, (__v2df)_mm_fnmadd_pd(__A, __B, __C), (__v2df)__C);
933}
934
935static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
936_mm_maskz_fnmadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) {
937 return (__m128d)__builtin_ia32_selectpd_128(
938 (__mmask8)__U, (__v2df)_mm_fnmadd_pd(__A, __B, __C),
939 (__v2df)_mm_setzero_pd());
940}
941
942static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
943_mm_mask_fnmsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) {
944 return (__m128d)__builtin_ia32_selectpd_128(
945 (__mmask8)__U, (__v2df)_mm_fnmsub_pd(__A, __B, __C), (__v2df)__A);
946}
947
948static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
949_mm_mask3_fnmsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) {
950 return (__m128d)__builtin_ia32_selectpd_128(
951 (__mmask8)__U, (__v2df)_mm_fnmsub_pd(__A, __B, __C), (__v2df)__C);
952}
953
954static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
955_mm_maskz_fnmsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) {
956 return (__m128d)__builtin_ia32_selectpd_128(
957 (__mmask8)__U, (__v2df)_mm_fnmsub_pd(__A, __B, __C),
958 (__v2df)_mm_setzero_pd());
959}
960
961static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
962_mm256_mask_fmadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) {
963 return (__m256d)__builtin_ia32_selectpd_256(
964 (__mmask8)__U, (__v4df)_mm256_fmadd_pd(__A, __B, __C), (__v4df)__A);
965}
966
967static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
968_mm256_mask3_fmadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) {
969 return (__m256d)__builtin_ia32_selectpd_256(
970 (__mmask8)__U, (__v4df)_mm256_fmadd_pd(__A, __B, __C), (__v4df)__C);
971}
972
973static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
974_mm256_maskz_fmadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) {
975 return (__m256d)__builtin_ia32_selectpd_256(
976 (__mmask8)__U, (__v4df)_mm256_fmadd_pd(__A, __B, __C),
977 (__v4df)_mm256_setzero_pd());
978}
979
980static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
981_mm256_mask_fmsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) {
982 return (__m256d)__builtin_ia32_selectpd_256(
983 (__mmask8)__U, (__v4df)_mm256_fmsub_pd(__A, __B, __C), (__v4df)__A);
984}
985
986static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
987_mm256_mask3_fmsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) {
988 return (__m256d)__builtin_ia32_selectpd_256(
989 (__mmask8)__U, (__v4df)_mm256_fmsub_pd(__A, __B, __C), (__v4df)__C);
990}
991
992static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
993_mm256_maskz_fmsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) {
994 return (__m256d)__builtin_ia32_selectpd_256(
995 (__mmask8)__U, (__v4df)_mm256_fmsub_pd(__A, __B, __C),
996 (__v4df)_mm256_setzero_pd());
997}
998
999static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
1000_mm256_mask_fnmadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) {
1001 return (__m256d)__builtin_ia32_selectpd_256(
1002 (__mmask8)__U, (__v4df)_mm256_fnmadd_pd(__A, __B, __C), (__v4df)__A);
1003}
1004
1005static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
1006_mm256_mask3_fnmadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) {
1007 return (__m256d)__builtin_ia32_selectpd_256(
1008 (__mmask8)__U, (__v4df)_mm256_fnmadd_pd(__A, __B, __C), (__v4df)__C);
1009}
1010
1011static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
1012_mm256_maskz_fnmadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) {
1013 return (__m256d)__builtin_ia32_selectpd_256(
1014 (__mmask8)__U, (__v4df)_mm256_fnmadd_pd(__A, __B, __C),
1015 (__v4df)_mm256_setzero_pd());
1016}
1017
1018static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
1019_mm256_mask_fnmsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) {
1020 return (__m256d)__builtin_ia32_selectpd_256(
1021 (__mmask8)__U, (__v4df)_mm256_fnmsub_pd(__A, __B, __C), (__v4df)__A);
1022}
1023
1024static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
1025_mm256_mask3_fnmsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) {
1026 return (__m256d)__builtin_ia32_selectpd_256(
1027 (__mmask8)__U, (__v4df)_mm256_fnmsub_pd(__A, __B, __C), (__v4df)__C);
1028}
1029
1030static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
1031_mm256_maskz_fnmsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) {
1032 return (__m256d)__builtin_ia32_selectpd_256(
1033 (__mmask8)__U, (__v4df)_mm256_fnmsub_pd(__A, __B, __C),
1034 (__v4df)_mm256_setzero_pd());
1035}
1036
1037static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1038_mm_mask_fmadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) {
1039 return (__m128)__builtin_ia32_selectps_128(
1040 (__mmask8)__U, (__v4sf)_mm_fmadd_ps(__A, __B, __C), (__v4sf)__A);
1041}
1042
1043static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1044_mm_mask3_fmadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) {
1045 return (__m128)__builtin_ia32_selectps_128(
1046 (__mmask8)__U, (__v4sf)_mm_fmadd_ps(__A, __B, __C), (__v4sf)__C);
1047}
1048
1049static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1050_mm_maskz_fmadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) {
1051 return (__m128)__builtin_ia32_selectps_128(
1052 (__mmask8)__U, (__v4sf)_mm_fmadd_ps(__A, __B, __C),
1053 (__v4sf)_mm_setzero_ps());
1054}
1055
1056static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1057_mm_mask_fmsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) {
1058 return (__m128)__builtin_ia32_selectps_128(
1059 (__mmask8)__U, (__v4sf)_mm_fmsub_ps(__A, __B, __C), (__v4sf)__A);
1060}
1061
1062static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1063_mm_mask3_fmsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) {
1064 return (__m128)__builtin_ia32_selectps_128(
1065 (__mmask8)__U, (__v4sf)_mm_fmsub_ps(__A, __B, __C), (__v4sf)__C);
1066}
1067
1068static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1069_mm_maskz_fmsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) {
1070 return (__m128)__builtin_ia32_selectps_128(
1071 (__mmask8)__U, (__v4sf)_mm_fmsub_ps(__A, __B, __C),
1072 (__v4sf)_mm_setzero_ps());
1073}
1074
1075static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1076_mm_mask_fnmadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) {
1077 return (__m128)__builtin_ia32_selectps_128(
1078 (__mmask8)__U, (__v4sf)_mm_fnmadd_ps(__A, __B, __C), (__v4sf)__A);
1079}
1080
1081static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1082_mm_mask3_fnmadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) {
1083 return (__m128)__builtin_ia32_selectps_128(
1084 (__mmask8)__U, (__v4sf)_mm_fnmadd_ps(__A, __B, __C), (__v4sf)__C);
1085}
1086
1087static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1088_mm_maskz_fnmadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) {
1089 return (__m128)__builtin_ia32_selectps_128(
1090 (__mmask8)__U, (__v4sf)_mm_fnmadd_ps(__A, __B, __C),
1091 (__v4sf)_mm_setzero_ps());
1092}
1093
1094static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1095_mm_mask_fnmsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) {
1096 return (__m128)__builtin_ia32_selectps_128(
1097 (__mmask8)__U, (__v4sf)_mm_fnmsub_ps(__A, __B, __C), (__v4sf)__A);
1098}
1099
1100static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1101_mm_mask3_fnmsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) {
1102 return (__m128)__builtin_ia32_selectps_128(
1103 (__mmask8)__U, (__v4sf)_mm_fnmsub_ps(__A, __B, __C), (__v4sf)__C);
1104}
1105
1106static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1107_mm_maskz_fnmsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) {
1108 return (__m128)__builtin_ia32_selectps_128(
1109 (__mmask8)__U, (__v4sf)_mm_fnmsub_ps(__A, __B, __C),
1110 (__v4sf)_mm_setzero_ps());
1111}
1112
1113static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1114_mm256_mask_fmadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) {
1115 return (__m256)__builtin_ia32_selectps_256(
1116 (__mmask8)__U, (__v8sf)_mm256_fmadd_ps(__A, __B, __C), (__v8sf)__A);
1117}
1118
1119static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1120_mm256_mask3_fmadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) {
1121 return (__m256)__builtin_ia32_selectps_256(
1122 (__mmask8)__U, (__v8sf)_mm256_fmadd_ps(__A, __B, __C), (__v8sf)__C);
1123}
1124
1125static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1126_mm256_maskz_fmadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) {
1127 return (__m256)__builtin_ia32_selectps_256(
1128 (__mmask8)__U, (__v8sf)_mm256_fmadd_ps(__A, __B, __C),
1129 (__v8sf)_mm256_setzero_ps());
1130}
1131
1132static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1133_mm256_mask_fmsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) {
1134 return (__m256)__builtin_ia32_selectps_256(
1135 (__mmask8)__U, (__v8sf)_mm256_fmsub_ps(__A, __B, __C), (__v8sf)__A);
1136}
1137
1138static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1139_mm256_mask3_fmsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) {
1140 return (__m256)__builtin_ia32_selectps_256(
1141 (__mmask8)__U, (__v8sf)_mm256_fmsub_ps(__A, __B, __C), (__v8sf)__C);
1142}
1143
1144static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1145_mm256_maskz_fmsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) {
1146 return (__m256)__builtin_ia32_selectps_256(
1147 (__mmask8)__U, (__v8sf)_mm256_fmsub_ps(__A, __B, __C),
1148 (__v8sf)_mm256_setzero_ps());
1149}
1150
1151static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1152_mm256_mask_fnmadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) {
1153 return (__m256)__builtin_ia32_selectps_256(
1154 (__mmask8)__U, (__v8sf)_mm256_fnmadd_ps(__A, __B, __C), (__v8sf)__A);
1155}
1156
1157static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1158_mm256_mask3_fnmadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) {
1159 return (__m256)__builtin_ia32_selectps_256(
1160 (__mmask8)__U, (__v8sf)_mm256_fnmadd_ps(__A, __B, __C), (__v8sf)__C);
1161}
1162
1163static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1164_mm256_maskz_fnmadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) {
1165 return (__m256)__builtin_ia32_selectps_256(
1166 (__mmask8)__U, (__v8sf)_mm256_fnmadd_ps(__A, __B, __C),
1167 (__v8sf)_mm256_setzero_ps());
1168}
1169
1170static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1171_mm256_mask_fnmsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) {
1172 return (__m256)__builtin_ia32_selectps_256(
1173 (__mmask8)__U, (__v8sf)_mm256_fnmsub_ps(__A, __B, __C), (__v8sf)__A);
1174}
1175
1176static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1177_mm256_mask3_fnmsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) {
1178 return (__m256)__builtin_ia32_selectps_256(
1179 (__mmask8)__U, (__v8sf)_mm256_fnmsub_ps(__A, __B, __C), (__v8sf)__C);
1180}
1181
1182static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1183_mm256_maskz_fnmsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) {
1184 return (__m256)__builtin_ia32_selectps_256(
1185 (__mmask8)__U, (__v8sf)_mm256_fnmsub_ps(__A, __B, __C),
1186 (__v8sf)_mm256_setzero_ps());
1187}
1188
1189static __inline__ __m128d __DEFAULT_FN_ATTRS128
1190_mm_mask_fmaddsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) {
1191 return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U,
1192 __builtin_ia32_vfmaddsubpd ((__v2df) __A,
1193 (__v2df) __B,
1194 (__v2df) __C),
1195 (__v2df) __A);
1196}
1197
1198static __inline__ __m128d __DEFAULT_FN_ATTRS128
1199_mm_mask3_fmaddsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U)
1200{
1201 return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U,
1202 __builtin_ia32_vfmaddsubpd ((__v2df) __A,
1203 (__v2df) __B,
1204 (__v2df) __C),
1205 (__v2df) __C);
1206}
1207
1208static __inline__ __m128d __DEFAULT_FN_ATTRS128
1209_mm_maskz_fmaddsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C)
1210{
1211 return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U,
1212 __builtin_ia32_vfmaddsubpd ((__v2df) __A,
1213 (__v2df) __B,
1214 (__v2df) __C),
1215 (__v2df)_mm_setzero_pd());
1216}
1217
1218static __inline__ __m128d __DEFAULT_FN_ATTRS128
1219_mm_mask_fmsubadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C)
1220{
1221 return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U,
1222 __builtin_ia32_vfmaddsubpd ((__v2df) __A,
1223 (__v2df) __B,
1224 -(__v2df) __C),
1225 (__v2df) __A);
1226}
1227
1228static __inline__ __m128d __DEFAULT_FN_ATTRS128
1229_mm_maskz_fmsubadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C)
1230{
1231 return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U,
1232 __builtin_ia32_vfmaddsubpd ((__v2df) __A,
1233 (__v2df) __B,
1234 -(__v2df) __C),
1235 (__v2df)_mm_setzero_pd());
1236}
1237
1238static __inline__ __m256d __DEFAULT_FN_ATTRS256
1239_mm256_mask_fmaddsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C)
1240{
1241 return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U,
1242 __builtin_ia32_vfmaddsubpd256 ((__v4df) __A,
1243 (__v4df) __B,
1244 (__v4df) __C),
1245 (__v4df) __A);
1246}
1247
1248static __inline__ __m256d __DEFAULT_FN_ATTRS256
1249_mm256_mask3_fmaddsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U)
1250{
1251 return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U,
1252 __builtin_ia32_vfmaddsubpd256 ((__v4df) __A,
1253 (__v4df) __B,
1254 (__v4df) __C),
1255 (__v4df) __C);
1256}
1257
1258static __inline__ __m256d __DEFAULT_FN_ATTRS256
1259_mm256_maskz_fmaddsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C)
1260{
1261 return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U,
1262 __builtin_ia32_vfmaddsubpd256 ((__v4df) __A,
1263 (__v4df) __B,
1264 (__v4df) __C),
1265 (__v4df)_mm256_setzero_pd());
1266}
1267
1268static __inline__ __m256d __DEFAULT_FN_ATTRS256
1269_mm256_mask_fmsubadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C)
1270{
1271 return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U,
1272 __builtin_ia32_vfmaddsubpd256 ((__v4df) __A,
1273 (__v4df) __B,
1274 -(__v4df) __C),
1275 (__v4df) __A);
1276}
1277
1278static __inline__ __m256d __DEFAULT_FN_ATTRS256
1279_mm256_maskz_fmsubadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C)
1280{
1281 return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U,
1282 __builtin_ia32_vfmaddsubpd256 ((__v4df) __A,
1283 (__v4df) __B,
1284 -(__v4df) __C),
1285 (__v4df)_mm256_setzero_pd());
1286}
1287
1288static __inline__ __m128 __DEFAULT_FN_ATTRS128
1289_mm_mask_fmaddsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C)
1290{
1291 return (__m128) __builtin_ia32_selectps_128((__mmask8) __U,
1292 __builtin_ia32_vfmaddsubps ((__v4sf) __A,
1293 (__v4sf) __B,
1294 (__v4sf) __C),
1295 (__v4sf) __A);
1296}
1297
1298static __inline__ __m128 __DEFAULT_FN_ATTRS128
1299_mm_mask3_fmaddsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U)
1300{
1301 return (__m128) __builtin_ia32_selectps_128((__mmask8) __U,
1302 __builtin_ia32_vfmaddsubps ((__v4sf) __A,
1303 (__v4sf) __B,
1304 (__v4sf) __C),
1305 (__v4sf) __C);
1306}
1307
1308static __inline__ __m128 __DEFAULT_FN_ATTRS128
1309_mm_maskz_fmaddsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C)
1310{
1311 return (__m128) __builtin_ia32_selectps_128((__mmask8) __U,
1312 __builtin_ia32_vfmaddsubps ((__v4sf) __A,
1313 (__v4sf) __B,
1314 (__v4sf) __C),
1315 (__v4sf)_mm_setzero_ps());
1316}
1317
1318static __inline__ __m128 __DEFAULT_FN_ATTRS128
1319_mm_mask_fmsubadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C)
1320{
1321 return (__m128) __builtin_ia32_selectps_128((__mmask8) __U,
1322 __builtin_ia32_vfmaddsubps ((__v4sf) __A,
1323 (__v4sf) __B,
1324 -(__v4sf) __C),
1325 (__v4sf) __A);
1326}
1327
1328static __inline__ __m128 __DEFAULT_FN_ATTRS128
1329_mm_maskz_fmsubadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C)
1330{
1331 return (__m128) __builtin_ia32_selectps_128((__mmask8) __U,
1332 __builtin_ia32_vfmaddsubps ((__v4sf) __A,
1333 (__v4sf) __B,
1334 -(__v4sf) __C),
1335 (__v4sf)_mm_setzero_ps());
1336}
1337
1338static __inline__ __m256 __DEFAULT_FN_ATTRS256
1339_mm256_mask_fmaddsub_ps(__m256 __A, __mmask8 __U, __m256 __B,
1340 __m256 __C)
1341{
1342 return (__m256) __builtin_ia32_selectps_256((__mmask8) __U,
1343 __builtin_ia32_vfmaddsubps256 ((__v8sf) __A,
1344 (__v8sf) __B,
1345 (__v8sf) __C),
1346 (__v8sf) __A);
1347}
1348
1349static __inline__ __m256 __DEFAULT_FN_ATTRS256
1350_mm256_mask3_fmaddsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U)
1351{
1352 return (__m256) __builtin_ia32_selectps_256((__mmask8) __U,
1353 __builtin_ia32_vfmaddsubps256 ((__v8sf) __A,
1354 (__v8sf) __B,
1355 (__v8sf) __C),
1356 (__v8sf) __C);
1357}
1358
1359static __inline__ __m256 __DEFAULT_FN_ATTRS256
1360_mm256_maskz_fmaddsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C)
1361{
1362 return (__m256) __builtin_ia32_selectps_256((__mmask8) __U,
1363 __builtin_ia32_vfmaddsubps256 ((__v8sf) __A,
1364 (__v8sf) __B,
1365 (__v8sf) __C),
1366 (__v8sf)_mm256_setzero_ps());
1367}
1368
1369static __inline__ __m256 __DEFAULT_FN_ATTRS256
1370_mm256_mask_fmsubadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C)
1371{
1372 return (__m256) __builtin_ia32_selectps_256((__mmask8) __U,
1373 __builtin_ia32_vfmaddsubps256 ((__v8sf) __A,
1374 (__v8sf) __B,
1375 -(__v8sf) __C),
1376 (__v8sf) __A);
1377}
1378
1379static __inline__ __m256 __DEFAULT_FN_ATTRS256
1380_mm256_maskz_fmsubadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C)
1381{
1382 return (__m256) __builtin_ia32_selectps_256((__mmask8) __U,
1383 __builtin_ia32_vfmaddsubps256 ((__v8sf) __A,
1384 (__v8sf) __B,
1385 -(__v8sf) __C),
1386 (__v8sf)_mm256_setzero_ps());
1387}
1388
1389static __inline__ __m128d __DEFAULT_FN_ATTRS128
1390_mm_mask3_fmsubadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U)
1391{
1392 return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U,
1393 __builtin_ia32_vfmaddsubpd ((__v2df) __A,
1394 (__v2df) __B,
1395 -(__v2df) __C),
1396 (__v2df) __C);
1397}
1398
1399static __inline__ __m256d __DEFAULT_FN_ATTRS256
1400_mm256_mask3_fmsubadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U)
1401{
1402 return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U,
1403 __builtin_ia32_vfmaddsubpd256 ((__v4df) __A,
1404 (__v4df) __B,
1405 -(__v4df) __C),
1406 (__v4df) __C);
1407}
1408
1409static __inline__ __m128 __DEFAULT_FN_ATTRS128
1410_mm_mask3_fmsubadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U)
1411{
1412 return (__m128) __builtin_ia32_selectps_128((__mmask8) __U,
1413 __builtin_ia32_vfmaddsubps ((__v4sf) __A,
1414 (__v4sf) __B,
1415 -(__v4sf) __C),
1416 (__v4sf) __C);
1417}
1418
1419static __inline__ __m256 __DEFAULT_FN_ATTRS256
1420_mm256_mask3_fmsubadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U)
1421{
1422 return (__m256) __builtin_ia32_selectps_256((__mmask8) __U,
1423 __builtin_ia32_vfmaddsubps256 ((__v8sf) __A,
1424 (__v8sf) __B,
1425 -(__v8sf) __C),
1426 (__v8sf) __C);
1427}
1428
1429static __inline__ __m128d __DEFAULT_FN_ATTRS128
1430_mm_mask_add_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
1431 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
1432 (__v2df)_mm_add_pd(__A, __B),
1433 (__v2df)__W);
1434}
1435
1436static __inline__ __m128d __DEFAULT_FN_ATTRS128
1437_mm_maskz_add_pd(__mmask8 __U, __m128d __A, __m128d __B) {
1438 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
1439 (__v2df)_mm_add_pd(__A, __B),
1440 (__v2df)_mm_setzero_pd());
1441}
1442
1443static __inline__ __m256d __DEFAULT_FN_ATTRS256
1444_mm256_mask_add_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) {
1445 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
1446 (__v4df)_mm256_add_pd(__A, __B),
1447 (__v4df)__W);
1448}
1449
1450static __inline__ __m256d __DEFAULT_FN_ATTRS256
1451_mm256_maskz_add_pd(__mmask8 __U, __m256d __A, __m256d __B) {
1452 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
1453 (__v4df)_mm256_add_pd(__A, __B),
1454 (__v4df)_mm256_setzero_pd());
1455}
1456
1457static __inline__ __m128 __DEFAULT_FN_ATTRS128
1458_mm_mask_add_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
1459 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
1460 (__v4sf)_mm_add_ps(__A, __B),
1461 (__v4sf)__W);
1462}
1463
1464static __inline__ __m128 __DEFAULT_FN_ATTRS128
1465_mm_maskz_add_ps(__mmask8 __U, __m128 __A, __m128 __B) {
1466 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
1467 (__v4sf)_mm_add_ps(__A, __B),
1468 (__v4sf)_mm_setzero_ps());
1469}
1470
1471static __inline__ __m256 __DEFAULT_FN_ATTRS256
1472_mm256_mask_add_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) {
1473 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
1474 (__v8sf)_mm256_add_ps(__A, __B),
1475 (__v8sf)__W);
1476}
1477
1478static __inline__ __m256 __DEFAULT_FN_ATTRS256
1479_mm256_maskz_add_ps(__mmask8 __U, __m256 __A, __m256 __B) {
1480 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
1481 (__v8sf)_mm256_add_ps(__A, __B),
1482 (__v8sf)_mm256_setzero_ps());
1483}
1484
1485static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1486_mm_mask_blend_epi32(__mmask8 __U, __m128i __A, __m128i __W) {
1487 return (__m128i) __builtin_ia32_selectd_128 ((__mmask8) __U,
1488 (__v4si) __W,
1489 (__v4si) __A);
1490}
1491
1492static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1493_mm256_mask_blend_epi32(__mmask8 __U, __m256i __A, __m256i __W) {
1494 return (__m256i) __builtin_ia32_selectd_256 ((__mmask8) __U,
1495 (__v8si) __W,
1496 (__v8si) __A);
1497}
1498
1499static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
1500_mm_mask_blend_pd(__mmask8 __U, __m128d __A, __m128d __W) {
1501 return (__m128d) __builtin_ia32_selectpd_128 ((__mmask8) __U,
1502 (__v2df) __W,
1503 (__v2df) __A);
1504}
1505
1506static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
1507_mm256_mask_blend_pd(__mmask8 __U, __m256d __A, __m256d __W) {
1508 return (__m256d) __builtin_ia32_selectpd_256 ((__mmask8) __U,
1509 (__v4df) __W,
1510 (__v4df) __A);
1511}
1512
1513static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1514_mm_mask_blend_ps(__mmask8 __U, __m128 __A, __m128 __W) {
1515 return (__m128) __builtin_ia32_selectps_128 ((__mmask8) __U,
1516 (__v4sf) __W,
1517 (__v4sf) __A);
1518}
1519
1520static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1521_mm256_mask_blend_ps(__mmask8 __U, __m256 __A, __m256 __W) {
1522 return (__m256) __builtin_ia32_selectps_256 ((__mmask8) __U,
1523 (__v8sf) __W,
1524 (__v8sf) __A);
1525}
1526
1527static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1528_mm_mask_blend_epi64(__mmask8 __U, __m128i __A, __m128i __W) {
1529 return (__m128i) __builtin_ia32_selectq_128 ((__mmask8) __U,
1530 (__v2di) __W,
1531 (__v2di) __A);
1532}
1533
1534static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1535_mm256_mask_blend_epi64(__mmask8 __U, __m256i __A, __m256i __W) {
1536 return (__m256i) __builtin_ia32_selectq_256 ((__mmask8) __U,
1537 (__v4di) __W,
1538 (__v4di) __A);
1539}
1540
1541static __inline__ __m128d __DEFAULT_FN_ATTRS128
1542_mm_mask_compress_pd (__m128d __W, __mmask8 __U, __m128d __A) {
1543 return (__m128d) __builtin_ia32_compressdf128_mask ((__v2df) __A,
1544 (__v2df) __W,
1545 (__mmask8) __U);
1546}
1547
1548static __inline__ __m128d __DEFAULT_FN_ATTRS128
1550 return (__m128d) __builtin_ia32_compressdf128_mask ((__v2df) __A,
1551 (__v2df)
1552 _mm_setzero_pd (),
1553 (__mmask8) __U);
1554}
1555
1556static __inline__ __m256d __DEFAULT_FN_ATTRS256
1557_mm256_mask_compress_pd (__m256d __W, __mmask8 __U, __m256d __A) {
1558 return (__m256d) __builtin_ia32_compressdf256_mask ((__v4df) __A,
1559 (__v4df) __W,
1560 (__mmask8) __U);
1561}
1562
1563static __inline__ __m256d __DEFAULT_FN_ATTRS256
1565 return (__m256d) __builtin_ia32_compressdf256_mask ((__v4df) __A,
1566 (__v4df)
1568 (__mmask8) __U);
1569}
1570
1571static __inline__ __m128i __DEFAULT_FN_ATTRS128
1572_mm_mask_compress_epi64 (__m128i __W, __mmask8 __U, __m128i __A) {
1573 return (__m128i) __builtin_ia32_compressdi128_mask ((__v2di) __A,
1574 (__v2di) __W,
1575 (__mmask8) __U);
1576}
1577
1578static __inline__ __m128i __DEFAULT_FN_ATTRS128
1580 return (__m128i) __builtin_ia32_compressdi128_mask ((__v2di) __A,
1581 (__v2di)
1583 (__mmask8) __U);
1584}
1585
1586static __inline__ __m256i __DEFAULT_FN_ATTRS256
1587_mm256_mask_compress_epi64 (__m256i __W, __mmask8 __U, __m256i __A) {
1588 return (__m256i) __builtin_ia32_compressdi256_mask ((__v4di) __A,
1589 (__v4di) __W,
1590 (__mmask8) __U);
1591}
1592
1593static __inline__ __m256i __DEFAULT_FN_ATTRS256
1595 return (__m256i) __builtin_ia32_compressdi256_mask ((__v4di) __A,
1596 (__v4di)
1598 (__mmask8) __U);
1599}
1600
1601static __inline__ __m128 __DEFAULT_FN_ATTRS128
1602_mm_mask_compress_ps (__m128 __W, __mmask8 __U, __m128 __A) {
1603 return (__m128) __builtin_ia32_compresssf128_mask ((__v4sf) __A,
1604 (__v4sf) __W,
1605 (__mmask8) __U);
1606}
1607
1608static __inline__ __m128 __DEFAULT_FN_ATTRS128
1610 return (__m128) __builtin_ia32_compresssf128_mask ((__v4sf) __A,
1611 (__v4sf)
1612 _mm_setzero_ps (),
1613 (__mmask8) __U);
1614}
1615
1616static __inline__ __m256 __DEFAULT_FN_ATTRS256
1617_mm256_mask_compress_ps (__m256 __W, __mmask8 __U, __m256 __A) {
1618 return (__m256) __builtin_ia32_compresssf256_mask ((__v8sf) __A,
1619 (__v8sf) __W,
1620 (__mmask8) __U);
1621}
1622
1623static __inline__ __m256 __DEFAULT_FN_ATTRS256
1625 return (__m256) __builtin_ia32_compresssf256_mask ((__v8sf) __A,
1626 (__v8sf)
1628 (__mmask8) __U);
1629}
1630
1631static __inline__ __m128i __DEFAULT_FN_ATTRS128
1632_mm_mask_compress_epi32 (__m128i __W, __mmask8 __U, __m128i __A) {
1633 return (__m128i) __builtin_ia32_compresssi128_mask ((__v4si) __A,
1634 (__v4si) __W,
1635 (__mmask8) __U);
1636}
1637
1638static __inline__ __m128i __DEFAULT_FN_ATTRS128
1640 return (__m128i) __builtin_ia32_compresssi128_mask ((__v4si) __A,
1641 (__v4si)
1643 (__mmask8) __U);
1644}
1645
1646static __inline__ __m256i __DEFAULT_FN_ATTRS256
1647_mm256_mask_compress_epi32 (__m256i __W, __mmask8 __U, __m256i __A) {
1648 return (__m256i) __builtin_ia32_compresssi256_mask ((__v8si) __A,
1649 (__v8si) __W,
1650 (__mmask8) __U);
1651}
1652
1653static __inline__ __m256i __DEFAULT_FN_ATTRS256
1655 return (__m256i) __builtin_ia32_compresssi256_mask ((__v8si) __A,
1656 (__v8si)
1658 (__mmask8) __U);
1659}
1660
1661static __inline__ void __DEFAULT_FN_ATTRS128
1662_mm_mask_compressstoreu_pd (void *__P, __mmask8 __U, __m128d __A) {
1663 __builtin_ia32_compressstoredf128_mask ((__v2df *) __P,
1664 (__v2df) __A,
1665 (__mmask8) __U);
1666}
1667
1668static __inline__ void __DEFAULT_FN_ATTRS256
1669_mm256_mask_compressstoreu_pd (void *__P, __mmask8 __U, __m256d __A) {
1670 __builtin_ia32_compressstoredf256_mask ((__v4df *) __P,
1671 (__v4df) __A,
1672 (__mmask8) __U);
1673}
1674
1675static __inline__ void __DEFAULT_FN_ATTRS128
1676_mm_mask_compressstoreu_epi64 (void *__P, __mmask8 __U, __m128i __A) {
1677 __builtin_ia32_compressstoredi128_mask ((__v2di *) __P,
1678 (__v2di) __A,
1679 (__mmask8) __U);
1680}
1681
1682static __inline__ void __DEFAULT_FN_ATTRS256
1684 __builtin_ia32_compressstoredi256_mask ((__v4di *) __P,
1685 (__v4di) __A,
1686 (__mmask8) __U);
1687}
1688
1689static __inline__ void __DEFAULT_FN_ATTRS128
1690_mm_mask_compressstoreu_ps (void *__P, __mmask8 __U, __m128 __A) {
1691 __builtin_ia32_compressstoresf128_mask ((__v4sf *) __P,
1692 (__v4sf) __A,
1693 (__mmask8) __U);
1694}
1695
1696static __inline__ void __DEFAULT_FN_ATTRS256
1698 __builtin_ia32_compressstoresf256_mask ((__v8sf *) __P,
1699 (__v8sf) __A,
1700 (__mmask8) __U);
1701}
1702
1703static __inline__ void __DEFAULT_FN_ATTRS128
1704_mm_mask_compressstoreu_epi32 (void *__P, __mmask8 __U, __m128i __A) {
1705 __builtin_ia32_compressstoresi128_mask ((__v4si *) __P,
1706 (__v4si) __A,
1707 (__mmask8) __U);
1708}
1709
1710static __inline__ void __DEFAULT_FN_ATTRS256
1712 __builtin_ia32_compressstoresi256_mask ((__v8si *) __P,
1713 (__v8si) __A,
1714 (__mmask8) __U);
1715}
1716
1717static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
1718_mm_mask_cvtepi32_pd(__m128d __W, __mmask8 __U, __m128i __A) {
1719 return (__m128d)__builtin_ia32_selectpd_128((__mmask8) __U,
1720 (__v2df)_mm_cvtepi32_pd(__A),
1721 (__v2df)__W);
1722}
1723
1724static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
1726 return (__m128d)__builtin_ia32_selectpd_128((__mmask8) __U,
1727 (__v2df)_mm_cvtepi32_pd(__A),
1728 (__v2df)_mm_setzero_pd());
1729}
1730
1731static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
1732_mm256_mask_cvtepi32_pd(__m256d __W, __mmask8 __U, __m128i __A) {
1733 return (__m256d)__builtin_ia32_selectpd_256((__mmask8) __U,
1734 (__v4df)_mm256_cvtepi32_pd(__A),
1735 (__v4df)__W);
1736}
1737
1738static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
1740 return (__m256d)__builtin_ia32_selectpd_256((__mmask8) __U,
1741 (__v4df)_mm256_cvtepi32_pd(__A),
1742 (__v4df)_mm256_setzero_pd());
1743}
1744
1745static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1746_mm_mask_cvtepi32_ps(__m128 __W, __mmask8 __U, __m128i __A) {
1747 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
1748 (__v4sf)_mm_cvtepi32_ps(__A),
1749 (__v4sf)__W);
1750}
1751
1752static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1754 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
1755 (__v4sf)_mm_cvtepi32_ps(__A),
1756 (__v4sf)_mm_setzero_ps());
1757}
1758
1759static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1760_mm256_mask_cvtepi32_ps(__m256 __W, __mmask8 __U, __m256i __A) {
1761 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
1762 (__v8sf)_mm256_cvtepi32_ps(__A),
1763 (__v8sf)__W);
1764}
1765
1766static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1768 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
1769 (__v8sf)_mm256_cvtepi32_ps(__A),
1770 (__v8sf)_mm256_setzero_ps());
1771}
1772
1773static __inline__ __m128i __DEFAULT_FN_ATTRS128
1774_mm_mask_cvtpd_epi32 (__m128i __W, __mmask8 __U, __m128d __A) {
1775 return (__m128i) __builtin_ia32_cvtpd2dq128_mask ((__v2df) __A,
1776 (__v4si) __W,
1777 (__mmask8) __U);
1778}
1779
1780static __inline__ __m128i __DEFAULT_FN_ATTRS128
1782 return (__m128i) __builtin_ia32_cvtpd2dq128_mask ((__v2df) __A,
1783 (__v4si)
1785 (__mmask8) __U);
1786}
1787
1788static __inline__ __m128i __DEFAULT_FN_ATTRS256
1789_mm256_mask_cvtpd_epi32 (__m128i __W, __mmask8 __U, __m256d __A) {
1790 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
1791 (__v4si)_mm256_cvtpd_epi32(__A),
1792 (__v4si)__W);
1793}
1794
1795static __inline__ __m128i __DEFAULT_FN_ATTRS256
1797 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
1798 (__v4si)_mm256_cvtpd_epi32(__A),
1799 (__v4si)_mm_setzero_si128());
1800}
1801
1802static __inline__ __m128 __DEFAULT_FN_ATTRS128
1803_mm_mask_cvtpd_ps (__m128 __W, __mmask8 __U, __m128d __A) {
1804 return (__m128) __builtin_ia32_cvtpd2ps_mask ((__v2df) __A,
1805 (__v4sf) __W,
1806 (__mmask8) __U);
1807}
1808
1809static __inline__ __m128 __DEFAULT_FN_ATTRS128
1810_mm_maskz_cvtpd_ps (__mmask8 __U, __m128d __A) {
1811 return (__m128) __builtin_ia32_cvtpd2ps_mask ((__v2df) __A,
1812 (__v4sf)
1813 _mm_setzero_ps (),
1814 (__mmask8) __U);
1815}
1816
1817static __inline__ __m128 __DEFAULT_FN_ATTRS256
1818_mm256_mask_cvtpd_ps (__m128 __W, __mmask8 __U, __m256d __A) {
1819 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
1820 (__v4sf)_mm256_cvtpd_ps(__A),
1821 (__v4sf)__W);
1822}
1823
1824static __inline__ __m128 __DEFAULT_FN_ATTRS256
1826 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
1827 (__v4sf)_mm256_cvtpd_ps(__A),
1828 (__v4sf)_mm_setzero_ps());
1829}
1830
1831static __inline__ __m128i __DEFAULT_FN_ATTRS128
1832_mm_cvtpd_epu32 (__m128d __A) {
1833 return (__m128i) __builtin_ia32_cvtpd2udq128_mask ((__v2df) __A,
1834 (__v4si)
1836 (__mmask8) -1);
1837}
1838
1839static __inline__ __m128i __DEFAULT_FN_ATTRS128
1840_mm_mask_cvtpd_epu32 (__m128i __W, __mmask8 __U, __m128d __A) {
1841 return (__m128i) __builtin_ia32_cvtpd2udq128_mask ((__v2df) __A,
1842 (__v4si) __W,
1843 (__mmask8) __U);
1844}
1845
1846static __inline__ __m128i __DEFAULT_FN_ATTRS128
1848 return (__m128i) __builtin_ia32_cvtpd2udq128_mask ((__v2df) __A,
1849 (__v4si)
1851 (__mmask8) __U);
1852}
1853
1854static __inline__ __m128i __DEFAULT_FN_ATTRS256
1855_mm256_cvtpd_epu32 (__m256d __A) {
1856 return (__m128i) __builtin_ia32_cvtpd2udq256_mask ((__v4df) __A,
1857 (__v4si)
1859 (__mmask8) -1);
1860}
1861
1862static __inline__ __m128i __DEFAULT_FN_ATTRS256
1863_mm256_mask_cvtpd_epu32 (__m128i __W, __mmask8 __U, __m256d __A) {
1864 return (__m128i) __builtin_ia32_cvtpd2udq256_mask ((__v4df) __A,
1865 (__v4si) __W,
1866 (__mmask8) __U);
1867}
1868
1869static __inline__ __m128i __DEFAULT_FN_ATTRS256
1871 return (__m128i) __builtin_ia32_cvtpd2udq256_mask ((__v4df) __A,
1872 (__v4si)
1874 (__mmask8) __U);
1875}
1876
1877static __inline__ __m128i __DEFAULT_FN_ATTRS128
1878_mm_mask_cvtps_epi32 (__m128i __W, __mmask8 __U, __m128 __A) {
1879 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
1880 (__v4si)_mm_cvtps_epi32(__A),
1881 (__v4si)__W);
1882}
1883
1884static __inline__ __m128i __DEFAULT_FN_ATTRS128
1886 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
1887 (__v4si)_mm_cvtps_epi32(__A),
1888 (__v4si)_mm_setzero_si128());
1889}
1890
1891static __inline__ __m256i __DEFAULT_FN_ATTRS256
1892_mm256_mask_cvtps_epi32 (__m256i __W, __mmask8 __U, __m256 __A) {
1893 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
1894 (__v8si)_mm256_cvtps_epi32(__A),
1895 (__v8si)__W);
1896}
1897
1898static __inline__ __m256i __DEFAULT_FN_ATTRS256
1900 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
1901 (__v8si)_mm256_cvtps_epi32(__A),
1902 (__v8si)_mm256_setzero_si256());
1903}
1904
1905static __inline__ __m128d __DEFAULT_FN_ATTRS128
1906_mm_mask_cvtps_pd (__m128d __W, __mmask8 __U, __m128 __A) {
1907 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
1908 (__v2df)_mm_cvtps_pd(__A),
1909 (__v2df)__W);
1910}
1911
1912static __inline__ __m128d __DEFAULT_FN_ATTRS128
1913_mm_maskz_cvtps_pd (__mmask8 __U, __m128 __A) {
1914 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
1915 (__v2df)_mm_cvtps_pd(__A),
1916 (__v2df)_mm_setzero_pd());
1917}
1918
1919static __inline__ __m256d __DEFAULT_FN_ATTRS256
1920_mm256_mask_cvtps_pd (__m256d __W, __mmask8 __U, __m128 __A) {
1921 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
1922 (__v4df)_mm256_cvtps_pd(__A),
1923 (__v4df)__W);
1924}
1925
1926static __inline__ __m256d __DEFAULT_FN_ATTRS256
1928 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
1929 (__v4df)_mm256_cvtps_pd(__A),
1930 (__v4df)_mm256_setzero_pd());
1931}
1932
1933static __inline__ __m128i __DEFAULT_FN_ATTRS128
1934_mm_cvtps_epu32 (__m128 __A) {
1935 return (__m128i) __builtin_ia32_cvtps2udq128_mask ((__v4sf) __A,
1936 (__v4si)
1938 (__mmask8) -1);
1939}
1940
1941static __inline__ __m128i __DEFAULT_FN_ATTRS128
1942_mm_mask_cvtps_epu32 (__m128i __W, __mmask8 __U, __m128 __A) {
1943 return (__m128i) __builtin_ia32_cvtps2udq128_mask ((__v4sf) __A,
1944 (__v4si) __W,
1945 (__mmask8) __U);
1946}
1947
1948static __inline__ __m128i __DEFAULT_FN_ATTRS128
1950 return (__m128i) __builtin_ia32_cvtps2udq128_mask ((__v4sf) __A,
1951 (__v4si)
1953 (__mmask8) __U);
1954}
1955
1956static __inline__ __m256i __DEFAULT_FN_ATTRS256
1958 return (__m256i) __builtin_ia32_cvtps2udq256_mask ((__v8sf) __A,
1959 (__v8si)
1961 (__mmask8) -1);
1962}
1963
1964static __inline__ __m256i __DEFAULT_FN_ATTRS256
1965_mm256_mask_cvtps_epu32 (__m256i __W, __mmask8 __U, __m256 __A) {
1966 return (__m256i) __builtin_ia32_cvtps2udq256_mask ((__v8sf) __A,
1967 (__v8si) __W,
1968 (__mmask8) __U);
1969}
1970
1971static __inline__ __m256i __DEFAULT_FN_ATTRS256
1973 return (__m256i) __builtin_ia32_cvtps2udq256_mask ((__v8sf) __A,
1974 (__v8si)
1976 (__mmask8) __U);
1977}
1978
1979static __inline__ __m128i __DEFAULT_FN_ATTRS128
1980_mm_mask_cvttpd_epi32 (__m128i __W, __mmask8 __U, __m128d __A) {
1981 return (__m128i) __builtin_ia32_cvttpd2dq128_mask ((__v2df) __A,
1982 (__v4si) __W,
1983 (__mmask8) __U);
1984}
1985
1986static __inline__ __m128i __DEFAULT_FN_ATTRS128
1988 return (__m128i) __builtin_ia32_cvttpd2dq128_mask ((__v2df) __A,
1989 (__v4si)
1991 (__mmask8) __U);
1992}
1993
1994static __inline__ __m128i __DEFAULT_FN_ATTRS256
1995_mm256_mask_cvttpd_epi32 (__m128i __W, __mmask8 __U, __m256d __A) {
1996 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
1997 (__v4si)_mm256_cvttpd_epi32(__A),
1998 (__v4si)__W);
1999}
2000
2001static __inline__ __m128i __DEFAULT_FN_ATTRS256
2003 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
2004 (__v4si)_mm256_cvttpd_epi32(__A),
2005 (__v4si)_mm_setzero_si128());
2006}
2007
2008static __inline__ __m128i __DEFAULT_FN_ATTRS128
2009_mm_cvttpd_epu32 (__m128d __A) {
2010 return (__m128i) __builtin_ia32_cvttpd2udq128_mask ((__v2df) __A,
2011 (__v4si)
2013 (__mmask8) -1);
2014}
2015
2016static __inline__ __m128i __DEFAULT_FN_ATTRS128
2017_mm_mask_cvttpd_epu32 (__m128i __W, __mmask8 __U, __m128d __A) {
2018 return (__m128i) __builtin_ia32_cvttpd2udq128_mask ((__v2df) __A,
2019 (__v4si) __W,
2020 (__mmask8) __U);
2021}
2022
2023static __inline__ __m128i __DEFAULT_FN_ATTRS128
2025 return (__m128i) __builtin_ia32_cvttpd2udq128_mask ((__v2df) __A,
2026 (__v4si)
2028 (__mmask8) __U);
2029}
2030
2031static __inline__ __m128i __DEFAULT_FN_ATTRS256
2032_mm256_cvttpd_epu32 (__m256d __A) {
2033 return (__m128i) __builtin_ia32_cvttpd2udq256_mask ((__v4df) __A,
2034 (__v4si)
2036 (__mmask8) -1);
2037}
2038
2039static __inline__ __m128i __DEFAULT_FN_ATTRS256
2040_mm256_mask_cvttpd_epu32 (__m128i __W, __mmask8 __U, __m256d __A) {
2041 return (__m128i) __builtin_ia32_cvttpd2udq256_mask ((__v4df) __A,
2042 (__v4si) __W,
2043 (__mmask8) __U);
2044}
2045
2046static __inline__ __m128i __DEFAULT_FN_ATTRS256
2048 return (__m128i) __builtin_ia32_cvttpd2udq256_mask ((__v4df) __A,
2049 (__v4si)
2051 (__mmask8) __U);
2052}
2053
2054static __inline__ __m128i __DEFAULT_FN_ATTRS128
2055_mm_mask_cvttps_epi32 (__m128i __W, __mmask8 __U, __m128 __A) {
2056 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
2057 (__v4si)_mm_cvttps_epi32(__A),
2058 (__v4si)__W);
2059}
2060
2061static __inline__ __m128i __DEFAULT_FN_ATTRS128
2063 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
2064 (__v4si)_mm_cvttps_epi32(__A),
2065 (__v4si)_mm_setzero_si128());
2066}
2067
2068static __inline__ __m256i __DEFAULT_FN_ATTRS256
2069_mm256_mask_cvttps_epi32 (__m256i __W, __mmask8 __U, __m256 __A) {
2070 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
2071 (__v8si)_mm256_cvttps_epi32(__A),
2072 (__v8si)__W);
2073}
2074
2075static __inline__ __m256i __DEFAULT_FN_ATTRS256
2077 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
2078 (__v8si)_mm256_cvttps_epi32(__A),
2079 (__v8si)_mm256_setzero_si256());
2080}
2081
2082static __inline__ __m128i __DEFAULT_FN_ATTRS128
2083_mm_cvttps_epu32 (__m128 __A) {
2084 return (__m128i) __builtin_ia32_cvttps2udq128_mask ((__v4sf) __A,
2085 (__v4si)
2087 (__mmask8) -1);
2088}
2089
2090static __inline__ __m128i __DEFAULT_FN_ATTRS128
2091_mm_mask_cvttps_epu32 (__m128i __W, __mmask8 __U, __m128 __A) {
2092 return (__m128i) __builtin_ia32_cvttps2udq128_mask ((__v4sf) __A,
2093 (__v4si) __W,
2094 (__mmask8) __U);
2095}
2096
2097static __inline__ __m128i __DEFAULT_FN_ATTRS128
2099 return (__m128i) __builtin_ia32_cvttps2udq128_mask ((__v4sf) __A,
2100 (__v4si)
2102 (__mmask8) __U);
2103}
2104
2105static __inline__ __m256i __DEFAULT_FN_ATTRS256
2107 return (__m256i) __builtin_ia32_cvttps2udq256_mask ((__v8sf) __A,
2108 (__v8si)
2110 (__mmask8) -1);
2111}
2112
2113static __inline__ __m256i __DEFAULT_FN_ATTRS256
2114_mm256_mask_cvttps_epu32 (__m256i __W, __mmask8 __U, __m256 __A) {
2115 return (__m256i) __builtin_ia32_cvttps2udq256_mask ((__v8sf) __A,
2116 (__v8si) __W,
2117 (__mmask8) __U);
2118}
2119
2120static __inline__ __m256i __DEFAULT_FN_ATTRS256
2122 return (__m256i) __builtin_ia32_cvttps2udq256_mask ((__v8sf) __A,
2123 (__v8si)
2125 (__mmask8) __U);
2126}
2127
2128static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
2129_mm_cvtepu32_pd(__m128i __A) {
2130 return (__m128d) __builtin_convertvector(
2131 __builtin_shufflevector((__v4su)__A, (__v4su)__A, 0, 1), __v2df);
2132}
2133
2134static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
2135_mm_mask_cvtepu32_pd(__m128d __W, __mmask8 __U, __m128i __A) {
2136 return (__m128d)__builtin_ia32_selectpd_128((__mmask8) __U,
2137 (__v2df)_mm_cvtepu32_pd(__A),
2138 (__v2df)__W);
2139}
2140
2141static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
2143 return (__m128d)__builtin_ia32_selectpd_128((__mmask8) __U,
2144 (__v2df)_mm_cvtepu32_pd(__A),
2145 (__v2df)_mm_setzero_pd());
2146}
2147
2148static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
2150 return (__m256d)__builtin_convertvector((__v4su)__A, __v4df);
2151}
2152
2153static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
2154_mm256_mask_cvtepu32_pd(__m256d __W, __mmask8 __U, __m128i __A) {
2155 return (__m256d)__builtin_ia32_selectpd_256((__mmask8) __U,
2156 (__v4df)_mm256_cvtepu32_pd(__A),
2157 (__v4df)__W);
2158}
2159
2160static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
2162 return (__m256d)__builtin_ia32_selectpd_256((__mmask8) __U,
2163 (__v4df)_mm256_cvtepu32_pd(__A),
2164 (__v4df)_mm256_setzero_pd());
2165}
2166
2167static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
2168_mm_cvtepu32_ps(__m128i __A) {
2169 return (__m128)__builtin_convertvector((__v4su)__A, __v4sf);
2170}
2171
2172static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
2173_mm_mask_cvtepu32_ps(__m128 __W, __mmask8 __U, __m128i __A) {
2174 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
2175 (__v4sf)_mm_cvtepu32_ps(__A),
2176 (__v4sf)__W);
2177}
2178
2179static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
2181 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
2182 (__v4sf)_mm_cvtepu32_ps(__A),
2183 (__v4sf)_mm_setzero_ps());
2184}
2185
2186static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
2188 return (__m256)__builtin_convertvector((__v8su)__A, __v8sf);
2189}
2190
2191static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
2192_mm256_mask_cvtepu32_ps(__m256 __W, __mmask8 __U, __m256i __A) {
2193 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
2194 (__v8sf)_mm256_cvtepu32_ps(__A),
2195 (__v8sf)__W);
2196}
2197
2198static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
2200 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
2201 (__v8sf)_mm256_cvtepu32_ps(__A),
2202 (__v8sf)_mm256_setzero_ps());
2203}
2204
2205static __inline__ __m128d __DEFAULT_FN_ATTRS128
2206_mm_mask_div_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
2207 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
2208 (__v2df)_mm_div_pd(__A, __B),
2209 (__v2df)__W);
2210}
2211
2212static __inline__ __m128d __DEFAULT_FN_ATTRS128
2213_mm_maskz_div_pd(__mmask8 __U, __m128d __A, __m128d __B) {
2214 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
2215 (__v2df)_mm_div_pd(__A, __B),
2216 (__v2df)_mm_setzero_pd());
2217}
2218
2219static __inline__ __m256d __DEFAULT_FN_ATTRS256
2220_mm256_mask_div_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) {
2221 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
2222 (__v4df)_mm256_div_pd(__A, __B),
2223 (__v4df)__W);
2224}
2225
2226static __inline__ __m256d __DEFAULT_FN_ATTRS256
2227_mm256_maskz_div_pd(__mmask8 __U, __m256d __A, __m256d __B) {
2228 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
2229 (__v4df)_mm256_div_pd(__A, __B),
2230 (__v4df)_mm256_setzero_pd());
2231}
2232
2233static __inline__ __m128 __DEFAULT_FN_ATTRS128
2234_mm_mask_div_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
2235 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
2236 (__v4sf)_mm_div_ps(__A, __B),
2237 (__v4sf)__W);
2238}
2239
2240static __inline__ __m128 __DEFAULT_FN_ATTRS128
2241_mm_maskz_div_ps(__mmask8 __U, __m128 __A, __m128 __B) {
2242 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
2243 (__v4sf)_mm_div_ps(__A, __B),
2244 (__v4sf)_mm_setzero_ps());
2245}
2246
2247static __inline__ __m256 __DEFAULT_FN_ATTRS256
2248_mm256_mask_div_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) {
2249 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
2250 (__v8sf)_mm256_div_ps(__A, __B),
2251 (__v8sf)__W);
2252}
2253
2254static __inline__ __m256 __DEFAULT_FN_ATTRS256
2255_mm256_maskz_div_ps(__mmask8 __U, __m256 __A, __m256 __B) {
2256 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
2257 (__v8sf)_mm256_div_ps(__A, __B),
2258 (__v8sf)_mm256_setzero_ps());
2259}
2260
2261static __inline__ __m128d __DEFAULT_FN_ATTRS128
2262_mm_mask_expand_pd (__m128d __W, __mmask8 __U, __m128d __A) {
2263 return (__m128d) __builtin_ia32_expanddf128_mask ((__v2df) __A,
2264 (__v2df) __W,
2265 (__mmask8) __U);
2266}
2267
2268static __inline__ __m128d __DEFAULT_FN_ATTRS128
2269_mm_maskz_expand_pd (__mmask8 __U, __m128d __A) {
2270 return (__m128d) __builtin_ia32_expanddf128_mask ((__v2df) __A,
2271 (__v2df)
2272 _mm_setzero_pd (),
2273 (__mmask8) __U);
2274}
2275
2276static __inline__ __m256d __DEFAULT_FN_ATTRS256
2277_mm256_mask_expand_pd (__m256d __W, __mmask8 __U, __m256d __A) {
2278 return (__m256d) __builtin_ia32_expanddf256_mask ((__v4df) __A,
2279 (__v4df) __W,
2280 (__mmask8) __U);
2281}
2282
2283static __inline__ __m256d __DEFAULT_FN_ATTRS256
2285 return (__m256d) __builtin_ia32_expanddf256_mask ((__v4df) __A,
2286 (__v4df)
2288 (__mmask8) __U);
2289}
2290
2291static __inline__ __m128i __DEFAULT_FN_ATTRS128
2292_mm_mask_expand_epi64 (__m128i __W, __mmask8 __U, __m128i __A) {
2293 return (__m128i) __builtin_ia32_expanddi128_mask ((__v2di) __A,
2294 (__v2di) __W,
2295 (__mmask8) __U);
2296}
2297
2298static __inline__ __m128i __DEFAULT_FN_ATTRS128
2300 return (__m128i) __builtin_ia32_expanddi128_mask ((__v2di) __A,
2301 (__v2di)
2303 (__mmask8) __U);
2304}
2305
2306static __inline__ __m256i __DEFAULT_FN_ATTRS256
2307_mm256_mask_expand_epi64 (__m256i __W, __mmask8 __U, __m256i __A) {
2308 return (__m256i) __builtin_ia32_expanddi256_mask ((__v4di) __A,
2309 (__v4di) __W,
2310 (__mmask8) __U);
2311}
2312
2313static __inline__ __m256i __DEFAULT_FN_ATTRS256
2315 return (__m256i) __builtin_ia32_expanddi256_mask ((__v4di) __A,
2316 (__v4di)
2318 (__mmask8) __U);
2319}
2320
2321static __inline__ __m128d __DEFAULT_FN_ATTRS128
2322_mm_mask_expandloadu_pd (__m128d __W, __mmask8 __U, void const *__P) {
2323 return (__m128d) __builtin_ia32_expandloaddf128_mask ((const __v2df *) __P,
2324 (__v2df) __W,
2325 (__mmask8)
2326 __U);
2327}
2328
2329static __inline__ __m128d __DEFAULT_FN_ATTRS128
2331 return (__m128d) __builtin_ia32_expandloaddf128_mask ((const __v2df *) __P,
2332 (__v2df)
2333 _mm_setzero_pd (),
2334 (__mmask8)
2335 __U);
2336}
2337
2338static __inline__ __m256d __DEFAULT_FN_ATTRS256
2339_mm256_mask_expandloadu_pd (__m256d __W, __mmask8 __U, void const *__P) {
2340 return (__m256d) __builtin_ia32_expandloaddf256_mask ((const __v4df *) __P,
2341 (__v4df) __W,
2342 (__mmask8)
2343 __U);
2344}
2345
2346static __inline__ __m256d __DEFAULT_FN_ATTRS256
2348 return (__m256d) __builtin_ia32_expandloaddf256_mask ((const __v4df *) __P,
2349 (__v4df)
2351 (__mmask8)
2352 __U);
2353}
2354
2355static __inline__ __m128i __DEFAULT_FN_ATTRS128
2356_mm_mask_expandloadu_epi64 (__m128i __W, __mmask8 __U, void const *__P) {
2357 return (__m128i) __builtin_ia32_expandloaddi128_mask ((const __v2di *) __P,
2358 (__v2di) __W,
2359 (__mmask8)
2360 __U);
2361}
2362
2363static __inline__ __m128i __DEFAULT_FN_ATTRS128
2365 return (__m128i) __builtin_ia32_expandloaddi128_mask ((const __v2di *) __P,
2366 (__v2di)
2368 (__mmask8)
2369 __U);
2370}
2371
2372static __inline__ __m256i __DEFAULT_FN_ATTRS256
2374 void const *__P) {
2375 return (__m256i) __builtin_ia32_expandloaddi256_mask ((const __v4di *) __P,
2376 (__v4di) __W,
2377 (__mmask8)
2378 __U);
2379}
2380
2381static __inline__ __m256i __DEFAULT_FN_ATTRS256
2383 return (__m256i) __builtin_ia32_expandloaddi256_mask ((const __v4di *) __P,
2384 (__v4di)
2386 (__mmask8)
2387 __U);
2388}
2389
2390static __inline__ __m128 __DEFAULT_FN_ATTRS128
2391_mm_mask_expandloadu_ps (__m128 __W, __mmask8 __U, void const *__P) {
2392 return (__m128) __builtin_ia32_expandloadsf128_mask ((const __v4sf *) __P,
2393 (__v4sf) __W,
2394 (__mmask8) __U);
2395}
2396
2397static __inline__ __m128 __DEFAULT_FN_ATTRS128
2399 return (__m128) __builtin_ia32_expandloadsf128_mask ((const __v4sf *) __P,
2400 (__v4sf)
2401 _mm_setzero_ps (),
2402 (__mmask8)
2403 __U);
2404}
2405
2406static __inline__ __m256 __DEFAULT_FN_ATTRS256
2407_mm256_mask_expandloadu_ps (__m256 __W, __mmask8 __U, void const *__P) {
2408 return (__m256) __builtin_ia32_expandloadsf256_mask ((const __v8sf *) __P,
2409 (__v8sf) __W,
2410 (__mmask8) __U);
2411}
2412
2413static __inline__ __m256 __DEFAULT_FN_ATTRS256
2415 return (__m256) __builtin_ia32_expandloadsf256_mask ((const __v8sf *) __P,
2416 (__v8sf)
2418 (__mmask8)
2419 __U);
2420}
2421
2422static __inline__ __m128i __DEFAULT_FN_ATTRS128
2423_mm_mask_expandloadu_epi32 (__m128i __W, __mmask8 __U, void const *__P) {
2424 return (__m128i) __builtin_ia32_expandloadsi128_mask ((const __v4si *) __P,
2425 (__v4si) __W,
2426 (__mmask8)
2427 __U);
2428}
2429
2430static __inline__ __m128i __DEFAULT_FN_ATTRS128
2432 return (__m128i) __builtin_ia32_expandloadsi128_mask ((const __v4si *) __P,
2433 (__v4si)
2435 (__mmask8) __U);
2436}
2437
2438static __inline__ __m256i __DEFAULT_FN_ATTRS256
2440 void const *__P) {
2441 return (__m256i) __builtin_ia32_expandloadsi256_mask ((const __v8si *) __P,
2442 (__v8si) __W,
2443 (__mmask8)
2444 __U);
2445}
2446
2447static __inline__ __m256i __DEFAULT_FN_ATTRS256
2449 return (__m256i) __builtin_ia32_expandloadsi256_mask ((const __v8si *) __P,
2450 (__v8si)
2452 (__mmask8)
2453 __U);
2454}
2455
2456static __inline__ __m128 __DEFAULT_FN_ATTRS128
2457_mm_mask_expand_ps (__m128 __W, __mmask8 __U, __m128 __A) {
2458 return (__m128) __builtin_ia32_expandsf128_mask ((__v4sf) __A,
2459 (__v4sf) __W,
2460 (__mmask8) __U);
2461}
2462
2463static __inline__ __m128 __DEFAULT_FN_ATTRS128
2465 return (__m128) __builtin_ia32_expandsf128_mask ((__v4sf) __A,
2466 (__v4sf)
2467 _mm_setzero_ps (),
2468 (__mmask8) __U);
2469}
2470
2471static __inline__ __m256 __DEFAULT_FN_ATTRS256
2472_mm256_mask_expand_ps (__m256 __W, __mmask8 __U, __m256 __A) {
2473 return (__m256) __builtin_ia32_expandsf256_mask ((__v8sf) __A,
2474 (__v8sf) __W,
2475 (__mmask8) __U);
2476}
2477
2478static __inline__ __m256 __DEFAULT_FN_ATTRS256
2480 return (__m256) __builtin_ia32_expandsf256_mask ((__v8sf) __A,
2481 (__v8sf)
2483 (__mmask8) __U);
2484}
2485
2486static __inline__ __m128i __DEFAULT_FN_ATTRS128
2487_mm_mask_expand_epi32 (__m128i __W, __mmask8 __U, __m128i __A) {
2488 return (__m128i) __builtin_ia32_expandsi128_mask ((__v4si) __A,
2489 (__v4si) __W,
2490 (__mmask8) __U);
2491}
2492
2493static __inline__ __m128i __DEFAULT_FN_ATTRS128
2495 return (__m128i) __builtin_ia32_expandsi128_mask ((__v4si) __A,
2496 (__v4si)
2498 (__mmask8) __U);
2499}
2500
2501static __inline__ __m256i __DEFAULT_FN_ATTRS256
2502_mm256_mask_expand_epi32 (__m256i __W, __mmask8 __U, __m256i __A) {
2503 return (__m256i) __builtin_ia32_expandsi256_mask ((__v8si) __A,
2504 (__v8si) __W,
2505 (__mmask8) __U);
2506}
2507
2508static __inline__ __m256i __DEFAULT_FN_ATTRS256
2510 return (__m256i) __builtin_ia32_expandsi256_mask ((__v8si) __A,
2511 (__v8si)
2513 (__mmask8) __U);
2514}
2515
2516static __inline__ __m128d __DEFAULT_FN_ATTRS128
2517_mm_getexp_pd (__m128d __A) {
2518 return (__m128d) __builtin_ia32_getexppd128_mask ((__v2df) __A,
2519 (__v2df)
2520 _mm_setzero_pd (),
2521 (__mmask8) -1);
2522}
2523
2524static __inline__ __m128d __DEFAULT_FN_ATTRS128
2525_mm_mask_getexp_pd (__m128d __W, __mmask8 __U, __m128d __A) {
2526 return (__m128d) __builtin_ia32_getexppd128_mask ((__v2df) __A,
2527 (__v2df) __W,
2528 (__mmask8) __U);
2529}
2530
2531static __inline__ __m128d __DEFAULT_FN_ATTRS128
2532_mm_maskz_getexp_pd (__mmask8 __U, __m128d __A) {
2533 return (__m128d) __builtin_ia32_getexppd128_mask ((__v2df) __A,
2534 (__v2df)
2535 _mm_setzero_pd (),
2536 (__mmask8) __U);
2537}
2538
2539static __inline__ __m256d __DEFAULT_FN_ATTRS256
2540_mm256_getexp_pd (__m256d __A) {
2541 return (__m256d) __builtin_ia32_getexppd256_mask ((__v4df) __A,
2542 (__v4df)
2544 (__mmask8) -1);
2545}
2546
2547static __inline__ __m256d __DEFAULT_FN_ATTRS256
2548_mm256_mask_getexp_pd (__m256d __W, __mmask8 __U, __m256d __A) {
2549 return (__m256d) __builtin_ia32_getexppd256_mask ((__v4df) __A,
2550 (__v4df) __W,
2551 (__mmask8) __U);
2552}
2553
2554static __inline__ __m256d __DEFAULT_FN_ATTRS256
2556 return (__m256d) __builtin_ia32_getexppd256_mask ((__v4df) __A,
2557 (__v4df)
2559 (__mmask8) __U);
2560}
2561
2562static __inline__ __m128 __DEFAULT_FN_ATTRS128
2563_mm_getexp_ps (__m128 __A) {
2564 return (__m128) __builtin_ia32_getexpps128_mask ((__v4sf) __A,
2565 (__v4sf)
2566 _mm_setzero_ps (),
2567 (__mmask8) -1);
2568}
2569
2570static __inline__ __m128 __DEFAULT_FN_ATTRS128
2571_mm_mask_getexp_ps (__m128 __W, __mmask8 __U, __m128 __A) {
2572 return (__m128) __builtin_ia32_getexpps128_mask ((__v4sf) __A,
2573 (__v4sf) __W,
2574 (__mmask8) __U);
2575}
2576
2577static __inline__ __m128 __DEFAULT_FN_ATTRS128
2579 return (__m128) __builtin_ia32_getexpps128_mask ((__v4sf) __A,
2580 (__v4sf)
2581 _mm_setzero_ps (),
2582 (__mmask8) __U);
2583}
2584
2585static __inline__ __m256 __DEFAULT_FN_ATTRS256
2586_mm256_getexp_ps (__m256 __A) {
2587 return (__m256) __builtin_ia32_getexpps256_mask ((__v8sf) __A,
2588 (__v8sf)
2590 (__mmask8) -1);
2591}
2592
2593static __inline__ __m256 __DEFAULT_FN_ATTRS256
2594_mm256_mask_getexp_ps (__m256 __W, __mmask8 __U, __m256 __A) {
2595 return (__m256) __builtin_ia32_getexpps256_mask ((__v8sf) __A,
2596 (__v8sf) __W,
2597 (__mmask8) __U);
2598}
2599
2600static __inline__ __m256 __DEFAULT_FN_ATTRS256
2602 return (__m256) __builtin_ia32_getexpps256_mask ((__v8sf) __A,
2603 (__v8sf)
2605 (__mmask8) __U);
2606}
2607
2608static __inline__ __m128d __DEFAULT_FN_ATTRS128
2609_mm_mask_max_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
2610 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
2611 (__v2df)_mm_max_pd(__A, __B),
2612 (__v2df)__W);
2613}
2614
2615static __inline__ __m128d __DEFAULT_FN_ATTRS128
2616_mm_maskz_max_pd(__mmask8 __U, __m128d __A, __m128d __B) {
2617 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
2618 (__v2df)_mm_max_pd(__A, __B),
2619 (__v2df)_mm_setzero_pd());
2620}
2621
2622static __inline__ __m256d __DEFAULT_FN_ATTRS256
2623_mm256_mask_max_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) {
2624 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
2625 (__v4df)_mm256_max_pd(__A, __B),
2626 (__v4df)__W);
2627}
2628
2629static __inline__ __m256d __DEFAULT_FN_ATTRS256
2630_mm256_maskz_max_pd(__mmask8 __U, __m256d __A, __m256d __B) {
2631 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
2632 (__v4df)_mm256_max_pd(__A, __B),
2633 (__v4df)_mm256_setzero_pd());
2634}
2635
2636static __inline__ __m128 __DEFAULT_FN_ATTRS128
2637_mm_mask_max_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
2638 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
2639 (__v4sf)_mm_max_ps(__A, __B),
2640 (__v4sf)__W);
2641}
2642
2643static __inline__ __m128 __DEFAULT_FN_ATTRS128
2644_mm_maskz_max_ps(__mmask8 __U, __m128 __A, __m128 __B) {
2645 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
2646 (__v4sf)_mm_max_ps(__A, __B),
2647 (__v4sf)_mm_setzero_ps());
2648}
2649
2650static __inline__ __m256 __DEFAULT_FN_ATTRS256
2651_mm256_mask_max_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) {
2652 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
2653 (__v8sf)_mm256_max_ps(__A, __B),
2654 (__v8sf)__W);
2655}
2656
2657static __inline__ __m256 __DEFAULT_FN_ATTRS256
2658_mm256_maskz_max_ps(__mmask8 __U, __m256 __A, __m256 __B) {
2659 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
2660 (__v8sf)_mm256_max_ps(__A, __B),
2661 (__v8sf)_mm256_setzero_ps());
2662}
2663
2664static __inline__ __m128d __DEFAULT_FN_ATTRS128
2665_mm_mask_min_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
2666 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
2667 (__v2df)_mm_min_pd(__A, __B),
2668 (__v2df)__W);
2669}
2670
2671static __inline__ __m128d __DEFAULT_FN_ATTRS128
2672_mm_maskz_min_pd(__mmask8 __U, __m128d __A, __m128d __B) {
2673 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
2674 (__v2df)_mm_min_pd(__A, __B),
2675 (__v2df)_mm_setzero_pd());
2676}
2677
2678static __inline__ __m256d __DEFAULT_FN_ATTRS256
2679_mm256_mask_min_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) {
2680 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
2681 (__v4df)_mm256_min_pd(__A, __B),
2682 (__v4df)__W);
2683}
2684
2685static __inline__ __m256d __DEFAULT_FN_ATTRS256
2686_mm256_maskz_min_pd(__mmask8 __U, __m256d __A, __m256d __B) {
2687 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
2688 (__v4df)_mm256_min_pd(__A, __B),
2689 (__v4df)_mm256_setzero_pd());
2690}
2691
2692static __inline__ __m128 __DEFAULT_FN_ATTRS128
2693_mm_mask_min_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
2694 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
2695 (__v4sf)_mm_min_ps(__A, __B),
2696 (__v4sf)__W);
2697}
2698
2699static __inline__ __m128 __DEFAULT_FN_ATTRS128
2700_mm_maskz_min_ps(__mmask8 __U, __m128 __A, __m128 __B) {
2701 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
2702 (__v4sf)_mm_min_ps(__A, __B),
2703 (__v4sf)_mm_setzero_ps());
2704}
2705
2706static __inline__ __m256 __DEFAULT_FN_ATTRS256
2707_mm256_mask_min_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) {
2708 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
2709 (__v8sf)_mm256_min_ps(__A, __B),
2710 (__v8sf)__W);
2711}
2712
2713static __inline__ __m256 __DEFAULT_FN_ATTRS256
2714_mm256_maskz_min_ps(__mmask8 __U, __m256 __A, __m256 __B) {
2715 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
2716 (__v8sf)_mm256_min_ps(__A, __B),
2717 (__v8sf)_mm256_setzero_ps());
2718}
2719
2720static __inline__ __m128d __DEFAULT_FN_ATTRS128
2721_mm_mask_mul_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
2722 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
2723 (__v2df)_mm_mul_pd(__A, __B),
2724 (__v2df)__W);
2725}
2726
2727static __inline__ __m128d __DEFAULT_FN_ATTRS128
2728_mm_maskz_mul_pd(__mmask8 __U, __m128d __A, __m128d __B) {
2729 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
2730 (__v2df)_mm_mul_pd(__A, __B),
2731 (__v2df)_mm_setzero_pd());
2732}
2733
2734static __inline__ __m256d __DEFAULT_FN_ATTRS256
2735_mm256_mask_mul_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) {
2736 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
2737 (__v4df)_mm256_mul_pd(__A, __B),
2738 (__v4df)__W);
2739}
2740
2741static __inline__ __m256d __DEFAULT_FN_ATTRS256
2742_mm256_maskz_mul_pd(__mmask8 __U, __m256d __A, __m256d __B) {
2743 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
2744 (__v4df)_mm256_mul_pd(__A, __B),
2745 (__v4df)_mm256_setzero_pd());
2746}
2747
2748static __inline__ __m128 __DEFAULT_FN_ATTRS128
2749_mm_mask_mul_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
2750 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
2751 (__v4sf)_mm_mul_ps(__A, __B),
2752 (__v4sf)__W);
2753}
2754
2755static __inline__ __m128 __DEFAULT_FN_ATTRS128
2756_mm_maskz_mul_ps(__mmask8 __U, __m128 __A, __m128 __B) {
2757 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
2758 (__v4sf)_mm_mul_ps(__A, __B),
2759 (__v4sf)_mm_setzero_ps());
2760}
2761
2762static __inline__ __m256 __DEFAULT_FN_ATTRS256
2763_mm256_mask_mul_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) {
2764 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
2765 (__v8sf)_mm256_mul_ps(__A, __B),
2766 (__v8sf)__W);
2767}
2768
2769static __inline__ __m256 __DEFAULT_FN_ATTRS256
2770_mm256_maskz_mul_ps(__mmask8 __U, __m256 __A, __m256 __B) {
2771 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
2772 (__v8sf)_mm256_mul_ps(__A, __B),
2773 (__v8sf)_mm256_setzero_ps());
2774}
2775
2776static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2777_mm_mask_abs_epi32(__m128i __W, __mmask8 __U, __m128i __A) {
2778 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
2779 (__v4si)_mm_abs_epi32(__A),
2780 (__v4si)__W);
2781}
2782
2783static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2785 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
2786 (__v4si)_mm_abs_epi32(__A),
2787 (__v4si)_mm_setzero_si128());
2788}
2789
2790static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2791_mm256_mask_abs_epi32(__m256i __W, __mmask8 __U, __m256i __A) {
2792 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
2793 (__v8si)_mm256_abs_epi32(__A),
2794 (__v8si)__W);
2795}
2796
2797static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2799 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
2800 (__v8si)_mm256_abs_epi32(__A),
2801 (__v8si)_mm256_setzero_si256());
2802}
2803
2804static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2805_mm_abs_epi64(__m128i __A) {
2806 return (__m128i)__builtin_elementwise_abs((__v2di)__A);
2807}
2808
2809static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2810_mm_mask_abs_epi64(__m128i __W, __mmask8 __U, __m128i __A) {
2811 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
2812 (__v2di)_mm_abs_epi64(__A),
2813 (__v2di)__W);
2814}
2815
2816static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2818 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
2819 (__v2di)_mm_abs_epi64(__A),
2820 (__v2di)_mm_setzero_si128());
2821}
2822
2823static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2824_mm256_abs_epi64(__m256i __A) {
2825 return (__m256i)__builtin_elementwise_abs((__v4di)__A);
2826}
2827
2828static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2829_mm256_mask_abs_epi64(__m256i __W, __mmask8 __U, __m256i __A) {
2830 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
2831 (__v4di)_mm256_abs_epi64(__A),
2832 (__v4di)__W);
2833}
2834
2835static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2837 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
2838 (__v4di)_mm256_abs_epi64(__A),
2839 (__v4di)_mm256_setzero_si256());
2840}
2841
2842static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2843_mm_maskz_max_epi32(__mmask8 __M, __m128i __A, __m128i __B) {
2844 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,
2845 (__v4si)_mm_max_epi32(__A, __B),
2846 (__v4si)_mm_setzero_si128());
2847}
2848
2849static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2850_mm_mask_max_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
2851 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,
2852 (__v4si)_mm_max_epi32(__A, __B),
2853 (__v4si)__W);
2854}
2855
2856static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2857_mm256_maskz_max_epi32(__mmask8 __M, __m256i __A, __m256i __B) {
2858 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
2859 (__v8si)_mm256_max_epi32(__A, __B),
2860 (__v8si)_mm256_setzero_si256());
2861}
2862
2863static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2864_mm256_mask_max_epi32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
2865 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
2866 (__v8si)_mm256_max_epi32(__A, __B),
2867 (__v8si)__W);
2868}
2869
2870static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2871_mm_max_epi64(__m128i __A, __m128i __B) {
2872 return (__m128i)__builtin_elementwise_max((__v2di)__A, (__v2di)__B);
2873}
2874
2875static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2876_mm_maskz_max_epi64(__mmask8 __M, __m128i __A, __m128i __B) {
2877 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,
2878 (__v2di)_mm_max_epi64(__A, __B),
2879 (__v2di)_mm_setzero_si128());
2880}
2881
2882static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2883_mm_mask_max_epi64(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
2884 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,
2885 (__v2di)_mm_max_epi64(__A, __B),
2886 (__v2di)__W);
2887}
2888
2889static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2890_mm256_max_epi64(__m256i __A, __m256i __B) {
2891 return (__m256i)__builtin_elementwise_max((__v4di)__A, (__v4di)__B);
2892}
2893
2894static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2895_mm256_maskz_max_epi64(__mmask8 __M, __m256i __A, __m256i __B) {
2896 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
2897 (__v4di)_mm256_max_epi64(__A, __B),
2898 (__v4di)_mm256_setzero_si256());
2899}
2900
2901static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2902_mm256_mask_max_epi64(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
2903 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
2904 (__v4di)_mm256_max_epi64(__A, __B),
2905 (__v4di)__W);
2906}
2907
2908static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2909_mm_maskz_max_epu32(__mmask8 __M, __m128i __A, __m128i __B) {
2910 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,
2911 (__v4si)_mm_max_epu32(__A, __B),
2912 (__v4si)_mm_setzero_si128());
2913}
2914
2915static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2916_mm_mask_max_epu32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
2917 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,
2918 (__v4si)_mm_max_epu32(__A, __B),
2919 (__v4si)__W);
2920}
2921
2922static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2923_mm256_maskz_max_epu32(__mmask8 __M, __m256i __A, __m256i __B) {
2924 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
2925 (__v8si)_mm256_max_epu32(__A, __B),
2926 (__v8si)_mm256_setzero_si256());
2927}
2928
2929static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2930_mm256_mask_max_epu32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
2931 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
2932 (__v8si)_mm256_max_epu32(__A, __B),
2933 (__v8si)__W);
2934}
2935
2936static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2937_mm_max_epu64(__m128i __A, __m128i __B) {
2938 return (__m128i)__builtin_elementwise_max((__v2du)__A, (__v2du)__B);
2939}
2940
2941static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2942_mm_maskz_max_epu64(__mmask8 __M, __m128i __A, __m128i __B) {
2943 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,
2944 (__v2di)_mm_max_epu64(__A, __B),
2945 (__v2di)_mm_setzero_si128());
2946}
2947
2948static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2949_mm_mask_max_epu64(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
2950 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,
2951 (__v2di)_mm_max_epu64(__A, __B),
2952 (__v2di)__W);
2953}
2954
2955static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2956_mm256_max_epu64(__m256i __A, __m256i __B) {
2957 return (__m256i)__builtin_elementwise_max((__v4du)__A, (__v4du)__B);
2958}
2959
2960static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2961_mm256_maskz_max_epu64(__mmask8 __M, __m256i __A, __m256i __B) {
2962 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
2963 (__v4di)_mm256_max_epu64(__A, __B),
2964 (__v4di)_mm256_setzero_si256());
2965}
2966
2967static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2968_mm256_mask_max_epu64(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
2969 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
2970 (__v4di)_mm256_max_epu64(__A, __B),
2971 (__v4di)__W);
2972}
2973
2974static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2975_mm_maskz_min_epi32(__mmask8 __M, __m128i __A, __m128i __B) {
2976 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,
2977 (__v4si)_mm_min_epi32(__A, __B),
2978 (__v4si)_mm_setzero_si128());
2979}
2980
2981static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2982_mm_mask_min_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
2983 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,
2984 (__v4si)_mm_min_epi32(__A, __B),
2985 (__v4si)__W);
2986}
2987
2988static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2989_mm256_maskz_min_epi32(__mmask8 __M, __m256i __A, __m256i __B) {
2990 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
2991 (__v8si)_mm256_min_epi32(__A, __B),
2992 (__v8si)_mm256_setzero_si256());
2993}
2994
2995static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2996_mm256_mask_min_epi32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
2997 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
2998 (__v8si)_mm256_min_epi32(__A, __B),
2999 (__v8si)__W);
3000}
3001
3002static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3003_mm_min_epi64(__m128i __A, __m128i __B) {
3004 return (__m128i)__builtin_elementwise_min((__v2di)__A, (__v2di)__B);
3005}
3006
3007static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3008_mm_mask_min_epi64(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
3009 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,
3010 (__v2di)_mm_min_epi64(__A, __B),
3011 (__v2di)__W);
3012}
3013
3014static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3015_mm_maskz_min_epi64(__mmask8 __M, __m128i __A, __m128i __B) {
3016 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,
3017 (__v2di)_mm_min_epi64(__A, __B),
3018 (__v2di)_mm_setzero_si128());
3019}
3020
3021static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3022_mm256_min_epi64(__m256i __A, __m256i __B) {
3023 return (__m256i)__builtin_elementwise_min((__v4di)__A, (__v4di)__B);
3024}
3025
3026static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3027_mm256_mask_min_epi64(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
3028 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
3029 (__v4di)_mm256_min_epi64(__A, __B),
3030 (__v4di)__W);
3031}
3032
3033static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3034_mm256_maskz_min_epi64(__mmask8 __M, __m256i __A, __m256i __B) {
3035 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
3036 (__v4di)_mm256_min_epi64(__A, __B),
3037 (__v4di)_mm256_setzero_si256());
3038}
3039
3040static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3041_mm_maskz_min_epu32(__mmask8 __M, __m128i __A, __m128i __B) {
3042 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,
3043 (__v4si)_mm_min_epu32(__A, __B),
3044 (__v4si)_mm_setzero_si128());
3045}
3046
3047static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3048_mm_mask_min_epu32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
3049 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,
3050 (__v4si)_mm_min_epu32(__A, __B),
3051 (__v4si)__W);
3052}
3053
3054static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3055_mm256_maskz_min_epu32(__mmask8 __M, __m256i __A, __m256i __B) {
3056 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
3057 (__v8si)_mm256_min_epu32(__A, __B),
3058 (__v8si)_mm256_setzero_si256());
3059}
3060
3061static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3062_mm256_mask_min_epu32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
3063 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
3064 (__v8si)_mm256_min_epu32(__A, __B),
3065 (__v8si)__W);
3066}
3067
3068static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3069_mm_min_epu64(__m128i __A, __m128i __B) {
3070 return (__m128i)__builtin_elementwise_min((__v2du)__A, (__v2du)__B);
3071}
3072
3073static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3074_mm_mask_min_epu64(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
3075 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,
3076 (__v2di)_mm_min_epu64(__A, __B),
3077 (__v2di)__W);
3078}
3079
3080static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3081_mm_maskz_min_epu64(__mmask8 __M, __m128i __A, __m128i __B) {
3082 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,
3083 (__v2di)_mm_min_epu64(__A, __B),
3084 (__v2di)_mm_setzero_si128());
3085}
3086
3087static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3088_mm256_min_epu64(__m256i __A, __m256i __B) {
3089 return (__m256i)__builtin_elementwise_min((__v4du)__A, (__v4du)__B);
3090}
3091
3092static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3093_mm256_mask_min_epu64(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
3094 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
3095 (__v4di)_mm256_min_epu64(__A, __B),
3096 (__v4di)__W);
3097}
3098
3099static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3100_mm256_maskz_min_epu64(__mmask8 __M, __m256i __A, __m256i __B) {
3101 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
3102 (__v4di)_mm256_min_epu64(__A, __B),
3103 (__v4di)_mm256_setzero_si256());
3104}
3105
3106#define _mm_roundscale_pd(A, imm) \
3107 ((__m128d)__builtin_ia32_rndscalepd_128_mask((__v2df)(__m128d)(A), \
3108 (int)(imm), \
3109 (__v2df)_mm_setzero_pd(), \
3110 (__mmask8)-1))
3111
3112
3113#define _mm_mask_roundscale_pd(W, U, A, imm) \
3114 ((__m128d)__builtin_ia32_rndscalepd_128_mask((__v2df)(__m128d)(A), \
3115 (int)(imm), \
3116 (__v2df)(__m128d)(W), \
3117 (__mmask8)(U)))
3118
3119
3120#define _mm_maskz_roundscale_pd(U, A, imm) \
3121 ((__m128d)__builtin_ia32_rndscalepd_128_mask((__v2df)(__m128d)(A), \
3122 (int)(imm), \
3123 (__v2df)_mm_setzero_pd(), \
3124 (__mmask8)(U)))
3125
3126
3127#define _mm256_roundscale_pd(A, imm) \
3128 ((__m256d)__builtin_ia32_rndscalepd_256_mask((__v4df)(__m256d)(A), \
3129 (int)(imm), \
3130 (__v4df)_mm256_setzero_pd(), \
3131 (__mmask8)-1))
3132
3133
3134#define _mm256_mask_roundscale_pd(W, U, A, imm) \
3135 ((__m256d)__builtin_ia32_rndscalepd_256_mask((__v4df)(__m256d)(A), \
3136 (int)(imm), \
3137 (__v4df)(__m256d)(W), \
3138 (__mmask8)(U)))
3139
3140
3141#define _mm256_maskz_roundscale_pd(U, A, imm) \
3142 ((__m256d)__builtin_ia32_rndscalepd_256_mask((__v4df)(__m256d)(A), \
3143 (int)(imm), \
3144 (__v4df)_mm256_setzero_pd(), \
3145 (__mmask8)(U)))
3146
3147#define _mm_roundscale_ps(A, imm) \
3148 ((__m128)__builtin_ia32_rndscaleps_128_mask((__v4sf)(__m128)(A), (int)(imm), \
3149 (__v4sf)_mm_setzero_ps(), \
3150 (__mmask8)-1))
3151
3152
3153#define _mm_mask_roundscale_ps(W, U, A, imm) \
3154 ((__m128)__builtin_ia32_rndscaleps_128_mask((__v4sf)(__m128)(A), (int)(imm), \
3155 (__v4sf)(__m128)(W), \
3156 (__mmask8)(U)))
3157
3158
3159#define _mm_maskz_roundscale_ps(U, A, imm) \
3160 ((__m128)__builtin_ia32_rndscaleps_128_mask((__v4sf)(__m128)(A), (int)(imm), \
3161 (__v4sf)_mm_setzero_ps(), \
3162 (__mmask8)(U)))
3163
3164#define _mm256_roundscale_ps(A, imm) \
3165 ((__m256)__builtin_ia32_rndscaleps_256_mask((__v8sf)(__m256)(A), (int)(imm), \
3166 (__v8sf)_mm256_setzero_ps(), \
3167 (__mmask8)-1))
3168
3169#define _mm256_mask_roundscale_ps(W, U, A, imm) \
3170 ((__m256)__builtin_ia32_rndscaleps_256_mask((__v8sf)(__m256)(A), (int)(imm), \
3171 (__v8sf)(__m256)(W), \
3172 (__mmask8)(U)))
3173
3174
3175#define _mm256_maskz_roundscale_ps(U, A, imm) \
3176 ((__m256)__builtin_ia32_rndscaleps_256_mask((__v8sf)(__m256)(A), (int)(imm), \
3177 (__v8sf)_mm256_setzero_ps(), \
3178 (__mmask8)(U)))
3179
3180static __inline__ __m128d __DEFAULT_FN_ATTRS128
3181_mm_scalef_pd (__m128d __A, __m128d __B) {
3182 return (__m128d) __builtin_ia32_scalefpd128_mask ((__v2df) __A,
3183 (__v2df) __B,
3184 (__v2df)
3185 _mm_setzero_pd (),
3186 (__mmask8) -1);
3187}
3188
3189static __inline__ __m128d __DEFAULT_FN_ATTRS128
3190_mm_mask_scalef_pd (__m128d __W, __mmask8 __U, __m128d __A,
3191 __m128d __B) {
3192 return (__m128d) __builtin_ia32_scalefpd128_mask ((__v2df) __A,
3193 (__v2df) __B,
3194 (__v2df) __W,
3195 (__mmask8) __U);
3196}
3197
3198static __inline__ __m128d __DEFAULT_FN_ATTRS128
3199_mm_maskz_scalef_pd (__mmask8 __U, __m128d __A, __m128d __B) {
3200 return (__m128d) __builtin_ia32_scalefpd128_mask ((__v2df) __A,
3201 (__v2df) __B,
3202 (__v2df)
3203 _mm_setzero_pd (),
3204 (__mmask8) __U);
3205}
3206
3207static __inline__ __m256d __DEFAULT_FN_ATTRS256
3208_mm256_scalef_pd (__m256d __A, __m256d __B) {
3209 return (__m256d) __builtin_ia32_scalefpd256_mask ((__v4df) __A,
3210 (__v4df) __B,
3211 (__v4df)
3213 (__mmask8) -1);
3214}
3215
3216static __inline__ __m256d __DEFAULT_FN_ATTRS256
3217_mm256_mask_scalef_pd (__m256d __W, __mmask8 __U, __m256d __A,
3218 __m256d __B) {
3219 return (__m256d) __builtin_ia32_scalefpd256_mask ((__v4df) __A,
3220 (__v4df) __B,
3221 (__v4df) __W,
3222 (__mmask8) __U);
3223}
3224
3225static __inline__ __m256d __DEFAULT_FN_ATTRS256
3226_mm256_maskz_scalef_pd (__mmask8 __U, __m256d __A, __m256d __B) {
3227 return (__m256d) __builtin_ia32_scalefpd256_mask ((__v4df) __A,
3228 (__v4df) __B,
3229 (__v4df)
3231 (__mmask8) __U);
3232}
3233
3234static __inline__ __m128 __DEFAULT_FN_ATTRS128
3235_mm_scalef_ps (__m128 __A, __m128 __B) {
3236 return (__m128) __builtin_ia32_scalefps128_mask ((__v4sf) __A,
3237 (__v4sf) __B,
3238 (__v4sf)
3239 _mm_setzero_ps (),
3240 (__mmask8) -1);
3241}
3242
3243static __inline__ __m128 __DEFAULT_FN_ATTRS128
3244_mm_mask_scalef_ps (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
3245 return (__m128) __builtin_ia32_scalefps128_mask ((__v4sf) __A,
3246 (__v4sf) __B,
3247 (__v4sf) __W,
3248 (__mmask8) __U);
3249}
3250
3251static __inline__ __m128 __DEFAULT_FN_ATTRS128
3252_mm_maskz_scalef_ps (__mmask8 __U, __m128 __A, __m128 __B) {
3253 return (__m128) __builtin_ia32_scalefps128_mask ((__v4sf) __A,
3254 (__v4sf) __B,
3255 (__v4sf)
3256 _mm_setzero_ps (),
3257 (__mmask8) __U);
3258}
3259
3260static __inline__ __m256 __DEFAULT_FN_ATTRS256
3261_mm256_scalef_ps (__m256 __A, __m256 __B) {
3262 return (__m256) __builtin_ia32_scalefps256_mask ((__v8sf) __A,
3263 (__v8sf) __B,
3264 (__v8sf)
3266 (__mmask8) -1);
3267}
3268
3269static __inline__ __m256 __DEFAULT_FN_ATTRS256
3270_mm256_mask_scalef_ps (__m256 __W, __mmask8 __U, __m256 __A,
3271 __m256 __B) {
3272 return (__m256) __builtin_ia32_scalefps256_mask ((__v8sf) __A,
3273 (__v8sf) __B,
3274 (__v8sf) __W,
3275 (__mmask8) __U);
3276}
3277
3278static __inline__ __m256 __DEFAULT_FN_ATTRS256
3279_mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {
3280 return (__m256) __builtin_ia32_scalefps256_mask ((__v8sf) __A,
3281 (__v8sf) __B,
3282 (__v8sf)
3284 (__mmask8) __U);
3285}
3286
3287#define _mm_i64scatter_pd(addr, index, v1, scale) \
3288 __builtin_ia32_scatterdiv2df((void *)(addr), (__mmask8)-1, \
3289 (__v2di)(__m128i)(index), \
3290 (__v2df)(__m128d)(v1), (int)(scale))
3291
3292#define _mm_mask_i64scatter_pd(addr, mask, index, v1, scale) \
3293 __builtin_ia32_scatterdiv2df((void *)(addr), (__mmask8)(mask), \
3294 (__v2di)(__m128i)(index), \
3295 (__v2df)(__m128d)(v1), (int)(scale))
3296
3297#define _mm_i64scatter_epi64(addr, index, v1, scale) \
3298 __builtin_ia32_scatterdiv2di((void *)(addr), (__mmask8)-1, \
3299 (__v2di)(__m128i)(index), \
3300 (__v2di)(__m128i)(v1), (int)(scale))
3301
3302#define _mm_mask_i64scatter_epi64(addr, mask, index, v1, scale) \
3303 __builtin_ia32_scatterdiv2di((void *)(addr), (__mmask8)(mask), \
3304 (__v2di)(__m128i)(index), \
3305 (__v2di)(__m128i)(v1), (int)(scale))
3306
3307#define _mm256_i64scatter_pd(addr, index, v1, scale) \
3308 __builtin_ia32_scatterdiv4df((void *)(addr), (__mmask8)-1, \
3309 (__v4di)(__m256i)(index), \
3310 (__v4df)(__m256d)(v1), (int)(scale))
3311
3312#define _mm256_mask_i64scatter_pd(addr, mask, index, v1, scale) \
3313 __builtin_ia32_scatterdiv4df((void *)(addr), (__mmask8)(mask), \
3314 (__v4di)(__m256i)(index), \
3315 (__v4df)(__m256d)(v1), (int)(scale))
3316
3317#define _mm256_i64scatter_epi64(addr, index, v1, scale) \
3318 __builtin_ia32_scatterdiv4di((void *)(addr), (__mmask8)-1, \
3319 (__v4di)(__m256i)(index), \
3320 (__v4di)(__m256i)(v1), (int)(scale))
3321
3322#define _mm256_mask_i64scatter_epi64(addr, mask, index, v1, scale) \
3323 __builtin_ia32_scatterdiv4di((void *)(addr), (__mmask8)(mask), \
3324 (__v4di)(__m256i)(index), \
3325 (__v4di)(__m256i)(v1), (int)(scale))
3326
3327#define _mm_i64scatter_ps(addr, index, v1, scale) \
3328 __builtin_ia32_scatterdiv4sf((void *)(addr), (__mmask8)-1, \
3329 (__v2di)(__m128i)(index), (__v4sf)(__m128)(v1), \
3330 (int)(scale))
3331
3332#define _mm_mask_i64scatter_ps(addr, mask, index, v1, scale) \
3333 __builtin_ia32_scatterdiv4sf((void *)(addr), (__mmask8)(mask), \
3334 (__v2di)(__m128i)(index), (__v4sf)(__m128)(v1), \
3335 (int)(scale))
3336
3337#define _mm_i64scatter_epi32(addr, index, v1, scale) \
3338 __builtin_ia32_scatterdiv4si((void *)(addr), (__mmask8)-1, \
3339 (__v2di)(__m128i)(index), \
3340 (__v4si)(__m128i)(v1), (int)(scale))
3341
3342#define _mm_mask_i64scatter_epi32(addr, mask, index, v1, scale) \
3343 __builtin_ia32_scatterdiv4si((void *)(addr), (__mmask8)(mask), \
3344 (__v2di)(__m128i)(index), \
3345 (__v4si)(__m128i)(v1), (int)(scale))
3346
3347#define _mm256_i64scatter_ps(addr, index, v1, scale) \
3348 __builtin_ia32_scatterdiv8sf((void *)(addr), (__mmask8)-1, \
3349 (__v4di)(__m256i)(index), (__v4sf)(__m128)(v1), \
3350 (int)(scale))
3351
3352#define _mm256_mask_i64scatter_ps(addr, mask, index, v1, scale) \
3353 __builtin_ia32_scatterdiv8sf((void *)(addr), (__mmask8)(mask), \
3354 (__v4di)(__m256i)(index), (__v4sf)(__m128)(v1), \
3355 (int)(scale))
3356
3357#define _mm256_i64scatter_epi32(addr, index, v1, scale) \
3358 __builtin_ia32_scatterdiv8si((void *)(addr), (__mmask8)-1, \
3359 (__v4di)(__m256i)(index), \
3360 (__v4si)(__m128i)(v1), (int)(scale))
3361
3362#define _mm256_mask_i64scatter_epi32(addr, mask, index, v1, scale) \
3363 __builtin_ia32_scatterdiv8si((void *)(addr), (__mmask8)(mask), \
3364 (__v4di)(__m256i)(index), \
3365 (__v4si)(__m128i)(v1), (int)(scale))
3366
3367#define _mm_i32scatter_pd(addr, index, v1, scale) \
3368 __builtin_ia32_scattersiv2df((void *)(addr), (__mmask8)-1, \
3369 (__v4si)(__m128i)(index), \
3370 (__v2df)(__m128d)(v1), (int)(scale))
3371
3372#define _mm_mask_i32scatter_pd(addr, mask, index, v1, scale) \
3373 __builtin_ia32_scattersiv2df((void *)(addr), (__mmask8)(mask), \
3374 (__v4si)(__m128i)(index), \
3375 (__v2df)(__m128d)(v1), (int)(scale))
3376
3377#define _mm_i32scatter_epi64(addr, index, v1, scale) \
3378 __builtin_ia32_scattersiv2di((void *)(addr), (__mmask8)-1, \
3379 (__v4si)(__m128i)(index), \
3380 (__v2di)(__m128i)(v1), (int)(scale))
3381
3382#define _mm_mask_i32scatter_epi64(addr, mask, index, v1, scale) \
3383 __builtin_ia32_scattersiv2di((void *)(addr), (__mmask8)(mask), \
3384 (__v4si)(__m128i)(index), \
3385 (__v2di)(__m128i)(v1), (int)(scale))
3386
3387#define _mm256_i32scatter_pd(addr, index, v1, scale) \
3388 __builtin_ia32_scattersiv4df((void *)(addr), (__mmask8)-1, \
3389 (__v4si)(__m128i)(index), \
3390 (__v4df)(__m256d)(v1), (int)(scale))
3391
3392#define _mm256_mask_i32scatter_pd(addr, mask, index, v1, scale) \
3393 __builtin_ia32_scattersiv4df((void *)(addr), (__mmask8)(mask), \
3394 (__v4si)(__m128i)(index), \
3395 (__v4df)(__m256d)(v1), (int)(scale))
3396
3397#define _mm256_i32scatter_epi64(addr, index, v1, scale) \
3398 __builtin_ia32_scattersiv4di((void *)(addr), (__mmask8)-1, \
3399 (__v4si)(__m128i)(index), \
3400 (__v4di)(__m256i)(v1), (int)(scale))
3401
3402#define _mm256_mask_i32scatter_epi64(addr, mask, index, v1, scale) \
3403 __builtin_ia32_scattersiv4di((void *)(addr), (__mmask8)(mask), \
3404 (__v4si)(__m128i)(index), \
3405 (__v4di)(__m256i)(v1), (int)(scale))
3406
3407#define _mm_i32scatter_ps(addr, index, v1, scale) \
3408 __builtin_ia32_scattersiv4sf((void *)(addr), (__mmask8)-1, \
3409 (__v4si)(__m128i)(index), (__v4sf)(__m128)(v1), \
3410 (int)(scale))
3411
3412#define _mm_mask_i32scatter_ps(addr, mask, index, v1, scale) \
3413 __builtin_ia32_scattersiv4sf((void *)(addr), (__mmask8)(mask), \
3414 (__v4si)(__m128i)(index), (__v4sf)(__m128)(v1), \
3415 (int)(scale))
3416
3417#define _mm_i32scatter_epi32(addr, index, v1, scale) \
3418 __builtin_ia32_scattersiv4si((void *)(addr), (__mmask8)-1, \
3419 (__v4si)(__m128i)(index), \
3420 (__v4si)(__m128i)(v1), (int)(scale))
3421
3422#define _mm_mask_i32scatter_epi32(addr, mask, index, v1, scale) \
3423 __builtin_ia32_scattersiv4si((void *)(addr), (__mmask8)(mask), \
3424 (__v4si)(__m128i)(index), \
3425 (__v4si)(__m128i)(v1), (int)(scale))
3426
3427#define _mm256_i32scatter_ps(addr, index, v1, scale) \
3428 __builtin_ia32_scattersiv8sf((void *)(addr), (__mmask8)-1, \
3429 (__v8si)(__m256i)(index), (__v8sf)(__m256)(v1), \
3430 (int)(scale))
3431
3432#define _mm256_mask_i32scatter_ps(addr, mask, index, v1, scale) \
3433 __builtin_ia32_scattersiv8sf((void *)(addr), (__mmask8)(mask), \
3434 (__v8si)(__m256i)(index), (__v8sf)(__m256)(v1), \
3435 (int)(scale))
3436
3437#define _mm256_i32scatter_epi32(addr, index, v1, scale) \
3438 __builtin_ia32_scattersiv8si((void *)(addr), (__mmask8)-1, \
3439 (__v8si)(__m256i)(index), \
3440 (__v8si)(__m256i)(v1), (int)(scale))
3441
3442#define _mm256_mask_i32scatter_epi32(addr, mask, index, v1, scale) \
3443 __builtin_ia32_scattersiv8si((void *)(addr), (__mmask8)(mask), \
3444 (__v8si)(__m256i)(index), \
3445 (__v8si)(__m256i)(v1), (int)(scale))
3446
3447 static __inline__ __m128d __DEFAULT_FN_ATTRS128
3448 _mm_mask_sqrt_pd(__m128d __W, __mmask8 __U, __m128d __A) {
3449 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
3450 (__v2df)_mm_sqrt_pd(__A),
3451 (__v2df)__W);
3452 }
3453
3454 static __inline__ __m128d __DEFAULT_FN_ATTRS128
3455 _mm_maskz_sqrt_pd(__mmask8 __U, __m128d __A) {
3456 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
3457 (__v2df)_mm_sqrt_pd(__A),
3458 (__v2df)_mm_setzero_pd());
3459 }
3460
3461 static __inline__ __m256d __DEFAULT_FN_ATTRS256
3462 _mm256_mask_sqrt_pd(__m256d __W, __mmask8 __U, __m256d __A) {
3463 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
3464 (__v4df)_mm256_sqrt_pd(__A),
3465 (__v4df)__W);
3466 }
3467
3468 static __inline__ __m256d __DEFAULT_FN_ATTRS256
3469 _mm256_maskz_sqrt_pd(__mmask8 __U, __m256d __A) {
3470 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
3471 (__v4df)_mm256_sqrt_pd(__A),
3472 (__v4df)_mm256_setzero_pd());
3473 }
3474
3475 static __inline__ __m128 __DEFAULT_FN_ATTRS128
3476 _mm_mask_sqrt_ps(__m128 __W, __mmask8 __U, __m128 __A) {
3477 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
3478 (__v4sf)_mm_sqrt_ps(__A),
3479 (__v4sf)__W);
3480 }
3481
3482 static __inline__ __m128 __DEFAULT_FN_ATTRS128
3483 _mm_maskz_sqrt_ps(__mmask8 __U, __m128 __A) {
3484 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
3485 (__v4sf)_mm_sqrt_ps(__A),
3486 (__v4sf)_mm_setzero_ps());
3487 }
3488
3489 static __inline__ __m256 __DEFAULT_FN_ATTRS256
3490 _mm256_mask_sqrt_ps(__m256 __W, __mmask8 __U, __m256 __A) {
3491 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
3492 (__v8sf)_mm256_sqrt_ps(__A),
3493 (__v8sf)__W);
3494 }
3495
3496 static __inline__ __m256 __DEFAULT_FN_ATTRS256
3498 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
3499 (__v8sf)_mm256_sqrt_ps(__A),
3500 (__v8sf)_mm256_setzero_ps());
3501 }
3502
3503 static __inline__ __m128d __DEFAULT_FN_ATTRS128
3504 _mm_mask_sub_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
3505 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
3506 (__v2df)_mm_sub_pd(__A, __B),
3507 (__v2df)__W);
3508 }
3509
3510 static __inline__ __m128d __DEFAULT_FN_ATTRS128
3511 _mm_maskz_sub_pd(__mmask8 __U, __m128d __A, __m128d __B) {
3512 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
3513 (__v2df)_mm_sub_pd(__A, __B),
3514 (__v2df)_mm_setzero_pd());
3515 }
3516
3517 static __inline__ __m256d __DEFAULT_FN_ATTRS256
3518 _mm256_mask_sub_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) {
3519 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
3520 (__v4df)_mm256_sub_pd(__A, __B),
3521 (__v4df)__W);
3522 }
3523
3524 static __inline__ __m256d __DEFAULT_FN_ATTRS256
3525 _mm256_maskz_sub_pd(__mmask8 __U, __m256d __A, __m256d __B) {
3526 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
3527 (__v4df)_mm256_sub_pd(__A, __B),
3528 (__v4df)_mm256_setzero_pd());
3529 }
3530
3531 static __inline__ __m128 __DEFAULT_FN_ATTRS128
3532 _mm_mask_sub_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
3533 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
3534 (__v4sf)_mm_sub_ps(__A, __B),
3535 (__v4sf)__W);
3536 }
3537
3538 static __inline__ __m128 __DEFAULT_FN_ATTRS128
3539 _mm_maskz_sub_ps(__mmask8 __U, __m128 __A, __m128 __B) {
3540 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
3541 (__v4sf)_mm_sub_ps(__A, __B),
3542 (__v4sf)_mm_setzero_ps());
3543 }
3544
3545 static __inline__ __m256 __DEFAULT_FN_ATTRS256
3546 _mm256_mask_sub_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) {
3547 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
3548 (__v8sf)_mm256_sub_ps(__A, __B),
3549 (__v8sf)__W);
3550 }
3551
3552 static __inline__ __m256 __DEFAULT_FN_ATTRS256
3553 _mm256_maskz_sub_ps(__mmask8 __U, __m256 __A, __m256 __B) {
3554 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
3555 (__v8sf)_mm256_sub_ps(__A, __B),
3556 (__v8sf)_mm256_setzero_ps());
3557 }
3558
3559 static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3560 _mm_permutex2var_epi32(__m128i __A, __m128i __I, __m128i __B) {
3561 return (__m128i)__builtin_ia32_vpermi2vard128((__v4si) __A, (__v4si)__I,
3562 (__v4si)__B);
3563 }
3564
3565 static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3566 _mm_mask_permutex2var_epi32(__m128i __A, __mmask8 __U, __m128i __I,
3567 __m128i __B) {
3568 return (__m128i)__builtin_ia32_selectd_128(__U,
3569 (__v4si)_mm_permutex2var_epi32(__A, __I, __B),
3570 (__v4si)__A);
3571 }
3572
3573 static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3574 _mm_mask2_permutex2var_epi32(__m128i __A, __m128i __I, __mmask8 __U,
3575 __m128i __B) {
3576 return (__m128i)__builtin_ia32_selectd_128(__U,
3577 (__v4si)_mm_permutex2var_epi32(__A, __I, __B),
3578 (__v4si)__I);
3579 }
3580
3581 static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3582 _mm_maskz_permutex2var_epi32(__mmask8 __U, __m128i __A, __m128i __I,
3583 __m128i __B) {
3584 return (__m128i)__builtin_ia32_selectd_128(__U,
3585 (__v4si)_mm_permutex2var_epi32(__A, __I, __B),
3586 (__v4si)_mm_setzero_si128());
3587 }
3588
3589 static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3590 _mm256_permutex2var_epi32(__m256i __A, __m256i __I, __m256i __B) {
3591 return (__m256i)__builtin_ia32_vpermi2vard256((__v8si)__A, (__v8si) __I,
3592 (__v8si) __B);
3593 }
3594
3595 static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3596 _mm256_mask_permutex2var_epi32(__m256i __A, __mmask8 __U, __m256i __I,
3597 __m256i __B) {
3598 return (__m256i)__builtin_ia32_selectd_256(__U,
3599 (__v8si)_mm256_permutex2var_epi32(__A, __I, __B),
3600 (__v8si)__A);
3601 }
3602
3603 static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3604 _mm256_mask2_permutex2var_epi32(__m256i __A, __m256i __I, __mmask8 __U,
3605 __m256i __B) {
3606 return (__m256i)__builtin_ia32_selectd_256(__U,
3607 (__v8si)_mm256_permutex2var_epi32(__A, __I, __B),
3608 (__v8si)__I);
3609 }
3610
3611 static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3612 _mm256_maskz_permutex2var_epi32(__mmask8 __U, __m256i __A, __m256i __I,
3613 __m256i __B) {
3614 return (__m256i)__builtin_ia32_selectd_256(__U,
3615 (__v8si)_mm256_permutex2var_epi32(__A, __I, __B),
3616 (__v8si)_mm256_setzero_si256());
3617 }
3618
3619 static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
3620 _mm_permutex2var_pd(__m128d __A, __m128i __I, __m128d __B) {
3621 return (__m128d)__builtin_ia32_vpermi2varpd128((__v2df)__A, (__v2di)__I,
3622 (__v2df)__B);
3623 }
3624
3625 static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
3626 _mm_mask_permutex2var_pd(__m128d __A, __mmask8 __U, __m128i __I,
3627 __m128d __B) {
3628 return (__m128d)__builtin_ia32_selectpd_128(__U,
3629 (__v2df)_mm_permutex2var_pd(__A, __I, __B),
3630 (__v2df)__A);
3631 }
3632
3633 static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
3634 _mm_mask2_permutex2var_pd(__m128d __A, __m128i __I, __mmask8 __U,
3635 __m128d __B) {
3636 return (__m128d)__builtin_ia32_selectpd_128(__U,
3637 (__v2df)_mm_permutex2var_pd(__A, __I, __B),
3638 (__v2df)(__m128d)__I);
3639 }
3640
3641 static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
3642 _mm_maskz_permutex2var_pd(__mmask8 __U, __m128d __A, __m128i __I,
3643 __m128d __B) {
3644 return (__m128d)__builtin_ia32_selectpd_128(__U,
3645 (__v2df)_mm_permutex2var_pd(__A, __I, __B),
3646 (__v2df)_mm_setzero_pd());
3647 }
3648
3649 static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
3650 _mm256_permutex2var_pd(__m256d __A, __m256i __I, __m256d __B) {
3651 return (__m256d)__builtin_ia32_vpermi2varpd256((__v4df)__A, (__v4di)__I,
3652 (__v4df)__B);
3653 }
3654
3655 static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
3656 _mm256_mask_permutex2var_pd(__m256d __A, __mmask8 __U, __m256i __I,
3657 __m256d __B) {
3658 return (__m256d)__builtin_ia32_selectpd_256(__U,
3659 (__v4df)_mm256_permutex2var_pd(__A, __I, __B),
3660 (__v4df)__A);
3661 }
3662
3663 static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
3664 _mm256_mask2_permutex2var_pd(__m256d __A, __m256i __I, __mmask8 __U,
3665 __m256d __B) {
3666 return (__m256d)__builtin_ia32_selectpd_256(__U,
3667 (__v4df)_mm256_permutex2var_pd(__A, __I, __B),
3668 (__v4df)(__m256d)__I);
3669 }
3670
3671 static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
3672 _mm256_maskz_permutex2var_pd(__mmask8 __U, __m256d __A, __m256i __I,
3673 __m256d __B) {
3674 return (__m256d)__builtin_ia32_selectpd_256(__U,
3675 (__v4df)_mm256_permutex2var_pd(__A, __I, __B),
3676 (__v4df)_mm256_setzero_pd());
3677 }
3678
3679 static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
3680 _mm_permutex2var_ps(__m128 __A, __m128i __I, __m128 __B) {
3681 return (__m128)__builtin_ia32_vpermi2varps128((__v4sf)__A, (__v4si)__I,
3682 (__v4sf)__B);
3683 }
3684
3685 static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
3686 _mm_mask_permutex2var_ps(__m128 __A, __mmask8 __U, __m128i __I, __m128 __B) {
3687 return (__m128)__builtin_ia32_selectps_128(__U,
3688 (__v4sf)_mm_permutex2var_ps(__A, __I, __B),
3689 (__v4sf)__A);
3690 }
3691
3692 static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
3693 _mm_mask2_permutex2var_ps(__m128 __A, __m128i __I, __mmask8 __U, __m128 __B) {
3694 return (__m128)__builtin_ia32_selectps_128(__U,
3695 (__v4sf)_mm_permutex2var_ps(__A, __I, __B),
3696 (__v4sf)(__m128)__I);
3697 }
3698
3699 static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
3700 _mm_maskz_permutex2var_ps(__mmask8 __U, __m128 __A, __m128i __I, __m128 __B) {
3701 return (__m128)__builtin_ia32_selectps_128(__U,
3702 (__v4sf)_mm_permutex2var_ps(__A, __I, __B),
3703 (__v4sf)_mm_setzero_ps());
3704 }
3705
3706 static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
3707 _mm256_permutex2var_ps(__m256 __A, __m256i __I, __m256 __B) {
3708 return (__m256)__builtin_ia32_vpermi2varps256((__v8sf)__A, (__v8si)__I,
3709 (__v8sf) __B);
3710 }
3711
3712 static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
3713 _mm256_mask_permutex2var_ps(__m256 __A, __mmask8 __U, __m256i __I,
3714 __m256 __B) {
3715 return (__m256)__builtin_ia32_selectps_256(__U,
3716 (__v8sf)_mm256_permutex2var_ps(__A, __I, __B),
3717 (__v8sf)__A);
3718 }
3719
3720 static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
3721 _mm256_mask2_permutex2var_ps(__m256 __A, __m256i __I, __mmask8 __U,
3722 __m256 __B) {
3723 return (__m256)__builtin_ia32_selectps_256(__U,
3724 (__v8sf)_mm256_permutex2var_ps(__A, __I, __B),
3725 (__v8sf)(__m256)__I);
3726 }
3727
3728 static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
3729 _mm256_maskz_permutex2var_ps(__mmask8 __U, __m256 __A, __m256i __I,
3730 __m256 __B) {
3731 return (__m256)__builtin_ia32_selectps_256(__U,
3732 (__v8sf)_mm256_permutex2var_ps(__A, __I, __B),
3733 (__v8sf)_mm256_setzero_ps());
3734 }
3735
3736 static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3737 _mm_permutex2var_epi64(__m128i __A, __m128i __I, __m128i __B) {
3738 return (__m128i)__builtin_ia32_vpermi2varq128((__v2di)__A, (__v2di)__I,
3739 (__v2di)__B);
3740 }
3741
3742 static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3743 _mm_mask_permutex2var_epi64(__m128i __A, __mmask8 __U, __m128i __I,
3744 __m128i __B) {
3745 return (__m128i)__builtin_ia32_selectq_128(__U,
3746 (__v2di)_mm_permutex2var_epi64(__A, __I, __B),
3747 (__v2di)__A);
3748 }
3749
3750 static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3751 _mm_mask2_permutex2var_epi64(__m128i __A, __m128i __I, __mmask8 __U,
3752 __m128i __B) {
3753 return (__m128i)__builtin_ia32_selectq_128(__U,
3754 (__v2di)_mm_permutex2var_epi64(__A, __I, __B),
3755 (__v2di)__I);
3756 }
3757
3758 static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3759 _mm_maskz_permutex2var_epi64(__mmask8 __U, __m128i __A, __m128i __I,
3760 __m128i __B) {
3761 return (__m128i)__builtin_ia32_selectq_128(__U,
3762 (__v2di)_mm_permutex2var_epi64(__A, __I, __B),
3763 (__v2di)_mm_setzero_si128());
3764 }
3765
3766 static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3767 _mm256_permutex2var_epi64(__m256i __A, __m256i __I, __m256i __B) {
3768 return (__m256i)__builtin_ia32_vpermi2varq256((__v4di)__A, (__v4di) __I,
3769 (__v4di) __B);
3770 }
3771
3772 static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3773 _mm256_mask_permutex2var_epi64(__m256i __A, __mmask8 __U, __m256i __I,
3774 __m256i __B) {
3775 return (__m256i)__builtin_ia32_selectq_256(__U,
3776 (__v4di)_mm256_permutex2var_epi64(__A, __I, __B),
3777 (__v4di)__A);
3778 }
3779
3780 static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3781 _mm256_mask2_permutex2var_epi64(__m256i __A, __m256i __I, __mmask8 __U,
3782 __m256i __B) {
3783 return (__m256i)__builtin_ia32_selectq_256(__U,
3784 (__v4di)_mm256_permutex2var_epi64(__A, __I, __B),
3785 (__v4di)__I);
3786 }
3787
3788 static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3789 _mm256_maskz_permutex2var_epi64(__mmask8 __U, __m256i __A, __m256i __I,
3790 __m256i __B) {
3791 return (__m256i)__builtin_ia32_selectq_256(__U,
3792 (__v4di)_mm256_permutex2var_epi64(__A, __I, __B),
3793 (__v4di)_mm256_setzero_si256());
3794 }
3795
3796 static __inline__ __m128i __DEFAULT_FN_ATTRS128
3797 _mm_mask_cvtepi8_epi32(__m128i __W, __mmask8 __U, __m128i __A)
3798 {
3799 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
3800 (__v4si)_mm_cvtepi8_epi32(__A),
3801 (__v4si)__W);
3802 }
3803
3804 static __inline__ __m128i __DEFAULT_FN_ATTRS128
3806 {
3807 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
3808 (__v4si)_mm_cvtepi8_epi32(__A),
3809 (__v4si)_mm_setzero_si128());
3810 }
3811
3812 static __inline__ __m256i __DEFAULT_FN_ATTRS256
3813 _mm256_mask_cvtepi8_epi32 (__m256i __W, __mmask8 __U, __m128i __A)
3814 {
3815 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
3816 (__v8si)_mm256_cvtepi8_epi32(__A),
3817 (__v8si)__W);
3818 }
3819
3820 static __inline__ __m256i __DEFAULT_FN_ATTRS256
3822 {
3823 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
3824 (__v8si)_mm256_cvtepi8_epi32(__A),
3825 (__v8si)_mm256_setzero_si256());
3826 }
3827
3828 static __inline__ __m128i __DEFAULT_FN_ATTRS128
3829 _mm_mask_cvtepi8_epi64(__m128i __W, __mmask8 __U, __m128i __A)
3830 {
3831 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
3832 (__v2di)_mm_cvtepi8_epi64(__A),
3833 (__v2di)__W);
3834 }
3835
3836 static __inline__ __m128i __DEFAULT_FN_ATTRS128
3838 {
3839 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
3840 (__v2di)_mm_cvtepi8_epi64(__A),
3841 (__v2di)_mm_setzero_si128());
3842 }
3843
3844 static __inline__ __m256i __DEFAULT_FN_ATTRS256
3845 _mm256_mask_cvtepi8_epi64(__m256i __W, __mmask8 __U, __m128i __A)
3846 {
3847 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
3848 (__v4di)_mm256_cvtepi8_epi64(__A),
3849 (__v4di)__W);
3850 }
3851
3852 static __inline__ __m256i __DEFAULT_FN_ATTRS256
3854 {
3855 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
3856 (__v4di)_mm256_cvtepi8_epi64(__A),
3857 (__v4di)_mm256_setzero_si256());
3858 }
3859
3860 static __inline__ __m128i __DEFAULT_FN_ATTRS128
3861 _mm_mask_cvtepi32_epi64(__m128i __W, __mmask8 __U, __m128i __X)
3862 {
3863 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
3864 (__v2di)_mm_cvtepi32_epi64(__X),
3865 (__v2di)__W);
3866 }
3867
3868 static __inline__ __m128i __DEFAULT_FN_ATTRS128
3870 {
3871 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
3872 (__v2di)_mm_cvtepi32_epi64(__X),
3873 (__v2di)_mm_setzero_si128());
3874 }
3875
3876 static __inline__ __m256i __DEFAULT_FN_ATTRS256
3877 _mm256_mask_cvtepi32_epi64(__m256i __W, __mmask8 __U, __m128i __X)
3878 {
3879 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
3880 (__v4di)_mm256_cvtepi32_epi64(__X),
3881 (__v4di)__W);
3882 }
3883
3884 static __inline__ __m256i __DEFAULT_FN_ATTRS256
3886 {
3887 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
3888 (__v4di)_mm256_cvtepi32_epi64(__X),
3889 (__v4di)_mm256_setzero_si256());
3890 }
3891
3892 static __inline__ __m128i __DEFAULT_FN_ATTRS128
3893 _mm_mask_cvtepi16_epi32(__m128i __W, __mmask8 __U, __m128i __A)
3894 {
3895 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
3896 (__v4si)_mm_cvtepi16_epi32(__A),
3897 (__v4si)__W);
3898 }
3899
3900 static __inline__ __m128i __DEFAULT_FN_ATTRS128
3902 {
3903 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
3904 (__v4si)_mm_cvtepi16_epi32(__A),
3905 (__v4si)_mm_setzero_si128());
3906 }
3907
3908 static __inline__ __m256i __DEFAULT_FN_ATTRS256
3909 _mm256_mask_cvtepi16_epi32(__m256i __W, __mmask8 __U, __m128i __A)
3910 {
3911 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
3912 (__v8si)_mm256_cvtepi16_epi32(__A),
3913 (__v8si)__W);
3914 }
3915
3916 static __inline__ __m256i __DEFAULT_FN_ATTRS256
3918 {
3919 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
3920 (__v8si)_mm256_cvtepi16_epi32(__A),
3921 (__v8si)_mm256_setzero_si256());
3922 }
3923
3924 static __inline__ __m128i __DEFAULT_FN_ATTRS128
3925 _mm_mask_cvtepi16_epi64(__m128i __W, __mmask8 __U, __m128i __A)
3926 {
3927 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
3928 (__v2di)_mm_cvtepi16_epi64(__A),
3929 (__v2di)__W);
3930 }
3931
3932 static __inline__ __m128i __DEFAULT_FN_ATTRS128
3934 {
3935 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
3936 (__v2di)_mm_cvtepi16_epi64(__A),
3937 (__v2di)_mm_setzero_si128());
3938 }
3939
3940 static __inline__ __m256i __DEFAULT_FN_ATTRS256
3941 _mm256_mask_cvtepi16_epi64(__m256i __W, __mmask8 __U, __m128i __A)
3942 {
3943 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
3944 (__v4di)_mm256_cvtepi16_epi64(__A),
3945 (__v4di)__W);
3946 }
3947
3948 static __inline__ __m256i __DEFAULT_FN_ATTRS256
3950 {
3951 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
3952 (__v4di)_mm256_cvtepi16_epi64(__A),
3953 (__v4di)_mm256_setzero_si256());
3954 }
3955
3956
3957 static __inline__ __m128i __DEFAULT_FN_ATTRS128
3958 _mm_mask_cvtepu8_epi32(__m128i __W, __mmask8 __U, __m128i __A)
3959 {
3960 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
3961 (__v4si)_mm_cvtepu8_epi32(__A),
3962 (__v4si)__W);
3963 }
3964
3965 static __inline__ __m128i __DEFAULT_FN_ATTRS128
3967 {
3968 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
3969 (__v4si)_mm_cvtepu8_epi32(__A),
3970 (__v4si)_mm_setzero_si128());
3971 }
3972
3973 static __inline__ __m256i __DEFAULT_FN_ATTRS256
3974 _mm256_mask_cvtepu8_epi32(__m256i __W, __mmask8 __U, __m128i __A)
3975 {
3976 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
3977 (__v8si)_mm256_cvtepu8_epi32(__A),
3978 (__v8si)__W);
3979 }
3980
3981 static __inline__ __m256i __DEFAULT_FN_ATTRS256
3983 {
3984 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
3985 (__v8si)_mm256_cvtepu8_epi32(__A),
3986 (__v8si)_mm256_setzero_si256());
3987 }
3988
3989 static __inline__ __m128i __DEFAULT_FN_ATTRS128
3990 _mm_mask_cvtepu8_epi64(__m128i __W, __mmask8 __U, __m128i __A)
3991 {
3992 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
3993 (__v2di)_mm_cvtepu8_epi64(__A),
3994 (__v2di)__W);
3995 }
3996
3997 static __inline__ __m128i __DEFAULT_FN_ATTRS128
3999 {
4000 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
4001 (__v2di)_mm_cvtepu8_epi64(__A),
4002 (__v2di)_mm_setzero_si128());
4003 }
4004
4005 static __inline__ __m256i __DEFAULT_FN_ATTRS256
4006 _mm256_mask_cvtepu8_epi64(__m256i __W, __mmask8 __U, __m128i __A)
4007 {
4008 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
4009 (__v4di)_mm256_cvtepu8_epi64(__A),
4010 (__v4di)__W);
4011 }
4012
4013 static __inline__ __m256i __DEFAULT_FN_ATTRS256
4015 {
4016 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
4017 (__v4di)_mm256_cvtepu8_epi64(__A),
4018 (__v4di)_mm256_setzero_si256());
4019 }
4020
4021 static __inline__ __m128i __DEFAULT_FN_ATTRS128
4022 _mm_mask_cvtepu32_epi64(__m128i __W, __mmask8 __U, __m128i __X)
4023 {
4024 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
4025 (__v2di)_mm_cvtepu32_epi64(__X),
4026 (__v2di)__W);
4027 }
4028
4029 static __inline__ __m128i __DEFAULT_FN_ATTRS128
4031 {
4032 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
4033 (__v2di)_mm_cvtepu32_epi64(__X),
4034 (__v2di)_mm_setzero_si128());
4035 }
4036
4037 static __inline__ __m256i __DEFAULT_FN_ATTRS256
4038 _mm256_mask_cvtepu32_epi64(__m256i __W, __mmask8 __U, __m128i __X)
4039 {
4040 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
4041 (__v4di)_mm256_cvtepu32_epi64(__X),
4042 (__v4di)__W);
4043 }
4044
4045 static __inline__ __m256i __DEFAULT_FN_ATTRS256
4047 {
4048 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
4049 (__v4di)_mm256_cvtepu32_epi64(__X),
4050 (__v4di)_mm256_setzero_si256());
4051 }
4052
4053 static __inline__ __m128i __DEFAULT_FN_ATTRS128
4054 _mm_mask_cvtepu16_epi32(__m128i __W, __mmask8 __U, __m128i __A)
4055 {
4056 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
4057 (__v4si)_mm_cvtepu16_epi32(__A),
4058 (__v4si)__W);
4059 }
4060
4061 static __inline__ __m128i __DEFAULT_FN_ATTRS128
4063 {
4064 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
4065 (__v4si)_mm_cvtepu16_epi32(__A),
4066 (__v4si)_mm_setzero_si128());
4067 }
4068
4069 static __inline__ __m256i __DEFAULT_FN_ATTRS256
4070 _mm256_mask_cvtepu16_epi32(__m256i __W, __mmask8 __U, __m128i __A)
4071 {
4072 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
4073 (__v8si)_mm256_cvtepu16_epi32(__A),
4074 (__v8si)__W);
4075 }
4076
4077 static __inline__ __m256i __DEFAULT_FN_ATTRS256
4079 {
4080 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
4081 (__v8si)_mm256_cvtepu16_epi32(__A),
4082 (__v8si)_mm256_setzero_si256());
4083 }
4084
4085 static __inline__ __m128i __DEFAULT_FN_ATTRS128
4086 _mm_mask_cvtepu16_epi64(__m128i __W, __mmask8 __U, __m128i __A)
4087 {
4088 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
4089 (__v2di)_mm_cvtepu16_epi64(__A),
4090 (__v2di)__W);
4091 }
4092
4093 static __inline__ __m128i __DEFAULT_FN_ATTRS128
4095 {
4096 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
4097 (__v2di)_mm_cvtepu16_epi64(__A),
4098 (__v2di)_mm_setzero_si128());
4099 }
4100
4101 static __inline__ __m256i __DEFAULT_FN_ATTRS256
4102 _mm256_mask_cvtepu16_epi64(__m256i __W, __mmask8 __U, __m128i __A)
4103 {
4104 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
4105 (__v4di)_mm256_cvtepu16_epi64(__A),
4106 (__v4di)__W);
4107 }
4108
4109 static __inline__ __m256i __DEFAULT_FN_ATTRS256
4111 {
4112 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
4113 (__v4di)_mm256_cvtepu16_epi64(__A),
4114 (__v4di)_mm256_setzero_si256());
4115 }
4116
4117
4118#define _mm_rol_epi32(a, b) \
4119 ((__m128i)__builtin_ia32_prold128((__v4si)(__m128i)(a), (int)(b)))
4120
4121#define _mm_mask_rol_epi32(w, u, a, b) \
4122 ((__m128i)__builtin_ia32_selectd_128((__mmask8)(u), \
4123 (__v4si)_mm_rol_epi32((a), (b)), \
4124 (__v4si)(__m128i)(w)))
4125
4126#define _mm_maskz_rol_epi32(u, a, b) \
4127 ((__m128i)__builtin_ia32_selectd_128((__mmask8)(u), \
4128 (__v4si)_mm_rol_epi32((a), (b)), \
4129 (__v4si)_mm_setzero_si128()))
4130
4131#define _mm256_rol_epi32(a, b) \
4132 ((__m256i)__builtin_ia32_prold256((__v8si)(__m256i)(a), (int)(b)))
4133
4134#define _mm256_mask_rol_epi32(w, u, a, b) \
4135 ((__m256i)__builtin_ia32_selectd_256((__mmask8)(u), \
4136 (__v8si)_mm256_rol_epi32((a), (b)), \
4137 (__v8si)(__m256i)(w)))
4138
4139#define _mm256_maskz_rol_epi32(u, a, b) \
4140 ((__m256i)__builtin_ia32_selectd_256((__mmask8)(u), \
4141 (__v8si)_mm256_rol_epi32((a), (b)), \
4142 (__v8si)_mm256_setzero_si256()))
4143
4144#define _mm_rol_epi64(a, b) \
4145 ((__m128i)__builtin_ia32_prolq128((__v2di)(__m128i)(a), (int)(b)))
4146
4147#define _mm_mask_rol_epi64(w, u, a, b) \
4148 ((__m128i)__builtin_ia32_selectq_128((__mmask8)(u), \
4149 (__v2di)_mm_rol_epi64((a), (b)), \
4150 (__v2di)(__m128i)(w)))
4151
4152#define _mm_maskz_rol_epi64(u, a, b) \
4153 ((__m128i)__builtin_ia32_selectq_128((__mmask8)(u), \
4154 (__v2di)_mm_rol_epi64((a), (b)), \
4155 (__v2di)_mm_setzero_si128()))
4156
4157#define _mm256_rol_epi64(a, b) \
4158 ((__m256i)__builtin_ia32_prolq256((__v4di)(__m256i)(a), (int)(b)))
4159
4160#define _mm256_mask_rol_epi64(w, u, a, b) \
4161 ((__m256i)__builtin_ia32_selectq_256((__mmask8)(u), \
4162 (__v4di)_mm256_rol_epi64((a), (b)), \
4163 (__v4di)(__m256i)(w)))
4164
4165#define _mm256_maskz_rol_epi64(u, a, b) \
4166 ((__m256i)__builtin_ia32_selectq_256((__mmask8)(u), \
4167 (__v4di)_mm256_rol_epi64((a), (b)), \
4168 (__v4di)_mm256_setzero_si256()))
4169
4170static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4171_mm_rolv_epi32 (__m128i __A, __m128i __B)
4172{
4173 return (__m128i)__builtin_elementwise_fshl((__v4su)__A, (__v4su)__A, (__v4su)__B);
4174}
4175
4176static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4177_mm_mask_rolv_epi32 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
4178{
4179 return (__m128i)__builtin_ia32_selectd_128(__U,
4180 (__v4si)_mm_rolv_epi32(__A, __B),
4181 (__v4si)__W);
4182}
4183
4184static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4185_mm_maskz_rolv_epi32 (__mmask8 __U, __m128i __A, __m128i __B)
4186{
4187 return (__m128i)__builtin_ia32_selectd_128(__U,
4188 (__v4si)_mm_rolv_epi32(__A, __B),
4189 (__v4si)_mm_setzero_si128());
4190}
4191
4192static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4193_mm256_rolv_epi32 (__m256i __A, __m256i __B)
4194{
4195 return (__m256i)__builtin_elementwise_fshl((__v8su)__A, (__v8su)__A, (__v8su)__B);
4196}
4197
4198static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4199_mm256_mask_rolv_epi32 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
4200{
4201 return (__m256i)__builtin_ia32_selectd_256(__U,
4202 (__v8si)_mm256_rolv_epi32(__A, __B),
4203 (__v8si)__W);
4204}
4205
4206static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4207_mm256_maskz_rolv_epi32 (__mmask8 __U, __m256i __A, __m256i __B)
4208{
4209 return (__m256i)__builtin_ia32_selectd_256(__U,
4210 (__v8si)_mm256_rolv_epi32(__A, __B),
4211 (__v8si)_mm256_setzero_si256());
4212}
4213
4214static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4215_mm_rolv_epi64 (__m128i __A, __m128i __B)
4216{
4217 return (__m128i)__builtin_elementwise_fshl((__v2du)__A, (__v2du)__A, (__v2du)__B);
4218}
4219
4220static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4221_mm_mask_rolv_epi64 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
4222{
4223 return (__m128i)__builtin_ia32_selectq_128(__U,
4224 (__v2di)_mm_rolv_epi64(__A, __B),
4225 (__v2di)__W);
4226}
4227
4228static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4229_mm_maskz_rolv_epi64 (__mmask8 __U, __m128i __A, __m128i __B)
4230{
4231 return (__m128i)__builtin_ia32_selectq_128(__U,
4232 (__v2di)_mm_rolv_epi64(__A, __B),
4233 (__v2di)_mm_setzero_si128());
4234}
4235
4236static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4237_mm256_rolv_epi64 (__m256i __A, __m256i __B)
4238{
4239 return (__m256i)__builtin_elementwise_fshl((__v4du)__A, (__v4du)__A, (__v4du)__B);
4240}
4241
4242static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4243_mm256_mask_rolv_epi64 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
4244{
4245 return (__m256i)__builtin_ia32_selectq_256(__U,
4246 (__v4di)_mm256_rolv_epi64(__A, __B),
4247 (__v4di)__W);
4248}
4249
4250static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4251_mm256_maskz_rolv_epi64 (__mmask8 __U, __m256i __A, __m256i __B)
4252{
4253 return (__m256i)__builtin_ia32_selectq_256(__U,
4254 (__v4di)_mm256_rolv_epi64(__A, __B),
4255 (__v4di)_mm256_setzero_si256());
4256}
4257
4258#define _mm_ror_epi32(a, b) \
4259 ((__m128i)__builtin_ia32_prord128((__v4si)(__m128i)(a), (int)(b)))
4260
4261#define _mm_mask_ror_epi32(w, u, a, b) \
4262 ((__m128i)__builtin_ia32_selectd_128((__mmask8)(u), \
4263 (__v4si)_mm_ror_epi32((a), (b)), \
4264 (__v4si)(__m128i)(w)))
4265
4266#define _mm_maskz_ror_epi32(u, a, b) \
4267 ((__m128i)__builtin_ia32_selectd_128((__mmask8)(u), \
4268 (__v4si)_mm_ror_epi32((a), (b)), \
4269 (__v4si)_mm_setzero_si128()))
4270
4271#define _mm256_ror_epi32(a, b) \
4272 ((__m256i)__builtin_ia32_prord256((__v8si)(__m256i)(a), (int)(b)))
4273
4274#define _mm256_mask_ror_epi32(w, u, a, b) \
4275 ((__m256i)__builtin_ia32_selectd_256((__mmask8)(u), \
4276 (__v8si)_mm256_ror_epi32((a), (b)), \
4277 (__v8si)(__m256i)(w)))
4278
4279#define _mm256_maskz_ror_epi32(u, a, b) \
4280 ((__m256i)__builtin_ia32_selectd_256((__mmask8)(u), \
4281 (__v8si)_mm256_ror_epi32((a), (b)), \
4282 (__v8si)_mm256_setzero_si256()))
4283
4284#define _mm_ror_epi64(a, b) \
4285 ((__m128i)__builtin_ia32_prorq128((__v2di)(__m128i)(a), (int)(b)))
4286
4287#define _mm_mask_ror_epi64(w, u, a, b) \
4288 ((__m128i)__builtin_ia32_selectq_128((__mmask8)(u), \
4289 (__v2di)_mm_ror_epi64((a), (b)), \
4290 (__v2di)(__m128i)(w)))
4291
4292#define _mm_maskz_ror_epi64(u, a, b) \
4293 ((__m128i)__builtin_ia32_selectq_128((__mmask8)(u), \
4294 (__v2di)_mm_ror_epi64((a), (b)), \
4295 (__v2di)_mm_setzero_si128()))
4296
4297#define _mm256_ror_epi64(a, b) \
4298 ((__m256i)__builtin_ia32_prorq256((__v4di)(__m256i)(a), (int)(b)))
4299
4300#define _mm256_mask_ror_epi64(w, u, a, b) \
4301 ((__m256i)__builtin_ia32_selectq_256((__mmask8)(u), \
4302 (__v4di)_mm256_ror_epi64((a), (b)), \
4303 (__v4di)(__m256i)(w)))
4304
4305#define _mm256_maskz_ror_epi64(u, a, b) \
4306 ((__m256i)__builtin_ia32_selectq_256((__mmask8)(u), \
4307 (__v4di)_mm256_ror_epi64((a), (b)), \
4308 (__v4di)_mm256_setzero_si256()))
4309
4310static __inline__ __m128i __DEFAULT_FN_ATTRS128
4311_mm_mask_sll_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
4312{
4313 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
4314 (__v4si)_mm_sll_epi32(__A, __B),
4315 (__v4si)__W);
4316}
4317
4318static __inline__ __m128i __DEFAULT_FN_ATTRS128
4319_mm_maskz_sll_epi32(__mmask8 __U, __m128i __A, __m128i __B)
4320{
4321 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
4322 (__v4si)_mm_sll_epi32(__A, __B),
4323 (__v4si)_mm_setzero_si128());
4324}
4325
4326static __inline__ __m256i __DEFAULT_FN_ATTRS256
4327_mm256_mask_sll_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B)
4328{
4329 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
4330 (__v8si)_mm256_sll_epi32(__A, __B),
4331 (__v8si)__W);
4332}
4333
4334static __inline__ __m256i __DEFAULT_FN_ATTRS256
4335_mm256_maskz_sll_epi32(__mmask8 __U, __m256i __A, __m128i __B)
4336{
4337 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
4338 (__v8si)_mm256_sll_epi32(__A, __B),
4339 (__v8si)_mm256_setzero_si256());
4340}
4341
4342static __inline__ __m128i __DEFAULT_FN_ATTRS128
4343_mm_mask_slli_epi32(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B)
4344{
4345 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
4346 (__v4si)_mm_slli_epi32(__A, (int)__B),
4347 (__v4si)__W);
4348}
4349
4350static __inline__ __m128i __DEFAULT_FN_ATTRS128
4351_mm_maskz_slli_epi32(__mmask8 __U, __m128i __A, unsigned int __B)
4352{
4353 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
4354 (__v4si)_mm_slli_epi32(__A, (int)__B),
4355 (__v4si)_mm_setzero_si128());
4356}
4357
4358static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4359_mm256_mask_slli_epi32(__m256i __W, __mmask8 __U, __m256i __A,
4360 unsigned int __B) {
4361 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
4362 (__v8si)_mm256_slli_epi32(__A, (int)__B),
4363 (__v8si)__W);
4364}
4365
4366static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4367_mm256_maskz_slli_epi32(__mmask8 __U, __m256i __A, unsigned int __B) {
4368 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
4369 (__v8si)_mm256_slli_epi32(__A, (int)__B),
4370 (__v8si)_mm256_setzero_si256());
4371}
4372
4373static __inline__ __m128i __DEFAULT_FN_ATTRS128
4374_mm_mask_sll_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
4375{
4376 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
4377 (__v2di)_mm_sll_epi64(__A, __B),
4378 (__v2di)__W);
4379}
4380
4381static __inline__ __m128i __DEFAULT_FN_ATTRS128
4382_mm_maskz_sll_epi64(__mmask8 __U, __m128i __A, __m128i __B)
4383{
4384 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
4385 (__v2di)_mm_sll_epi64(__A, __B),
4386 (__v2di)_mm_setzero_si128());
4387}
4388
4389static __inline__ __m256i __DEFAULT_FN_ATTRS256
4390_mm256_mask_sll_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B)
4391{
4392 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
4393 (__v4di)_mm256_sll_epi64(__A, __B),
4394 (__v4di)__W);
4395}
4396
4397static __inline__ __m256i __DEFAULT_FN_ATTRS256
4398_mm256_maskz_sll_epi64(__mmask8 __U, __m256i __A, __m128i __B)
4399{
4400 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
4401 (__v4di)_mm256_sll_epi64(__A, __B),
4402 (__v4di)_mm256_setzero_si256());
4403}
4404
4405static __inline__ __m128i __DEFAULT_FN_ATTRS128
4406_mm_mask_slli_epi64(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B)
4407{
4408 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
4409 (__v2di)_mm_slli_epi64(__A, (int)__B),
4410 (__v2di)__W);
4411}
4412
4413static __inline__ __m128i __DEFAULT_FN_ATTRS128
4414_mm_maskz_slli_epi64(__mmask8 __U, __m128i __A, unsigned int __B)
4415{
4416 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
4417 (__v2di)_mm_slli_epi64(__A, (int)__B),
4418 (__v2di)_mm_setzero_si128());
4419}
4420
4421static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4422_mm256_mask_slli_epi64(__m256i __W, __mmask8 __U, __m256i __A,
4423 unsigned int __B) {
4424 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
4425 (__v4di)_mm256_slli_epi64(__A, (int)__B),
4426 (__v4di)__W);
4427}
4428
4429static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4430_mm256_maskz_slli_epi64(__mmask8 __U, __m256i __A, unsigned int __B) {
4431 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
4432 (__v4di)_mm256_slli_epi64(__A, (int)__B),
4433 (__v4di)_mm256_setzero_si256());
4434}
4435
4436static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4437_mm_rorv_epi32 (__m128i __A, __m128i __B)
4438{
4439 return (__m128i)__builtin_elementwise_fshr((__v4su)__A, (__v4su)__A, (__v4su)__B);
4440}
4441
4442static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4443_mm_mask_rorv_epi32 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
4444{
4445 return (__m128i)__builtin_ia32_selectd_128(__U,
4446 (__v4si)_mm_rorv_epi32(__A, __B),
4447 (__v4si)__W);
4448}
4449
4450static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4451_mm_maskz_rorv_epi32 (__mmask8 __U, __m128i __A, __m128i __B)
4452{
4453 return (__m128i)__builtin_ia32_selectd_128(__U,
4454 (__v4si)_mm_rorv_epi32(__A, __B),
4455 (__v4si)_mm_setzero_si128());
4456}
4457
4458static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4459_mm256_rorv_epi32 (__m256i __A, __m256i __B)
4460{
4461 return (__m256i)__builtin_elementwise_fshr((__v8su)__A, (__v8su)__A, (__v8su)__B);
4462}
4463
4464static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4465_mm256_mask_rorv_epi32 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
4466{
4467 return (__m256i)__builtin_ia32_selectd_256(__U,
4468 (__v8si)_mm256_rorv_epi32(__A, __B),
4469 (__v8si)__W);
4470}
4471
4472static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4473_mm256_maskz_rorv_epi32 (__mmask8 __U, __m256i __A, __m256i __B)
4474{
4475 return (__m256i)__builtin_ia32_selectd_256(__U,
4476 (__v8si)_mm256_rorv_epi32(__A, __B),
4477 (__v8si)_mm256_setzero_si256());
4478}
4479
4480static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4481_mm_rorv_epi64 (__m128i __A, __m128i __B)
4482{
4483 return (__m128i)__builtin_elementwise_fshr((__v2du)__A, (__v2du)__A, (__v2du)__B);
4484}
4485
4486static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4487_mm_mask_rorv_epi64 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
4488{
4489 return (__m128i)__builtin_ia32_selectq_128(__U,
4490 (__v2di)_mm_rorv_epi64(__A, __B),
4491 (__v2di)__W);
4492}
4493
4494static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4495_mm_maskz_rorv_epi64 (__mmask8 __U, __m128i __A, __m128i __B)
4496{
4497 return (__m128i)__builtin_ia32_selectq_128(__U,
4498 (__v2di)_mm_rorv_epi64(__A, __B),
4499 (__v2di)_mm_setzero_si128());
4500}
4501
4502static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4503_mm256_rorv_epi64 (__m256i __A, __m256i __B)
4504{
4505 return (__m256i)__builtin_elementwise_fshr((__v4du)__A, (__v4du)__A, (__v4du)__B);
4506}
4507
4508static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4509_mm256_mask_rorv_epi64 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
4510{
4511 return (__m256i)__builtin_ia32_selectq_256(__U,
4512 (__v4di)_mm256_rorv_epi64(__A, __B),
4513 (__v4di)__W);
4514}
4515
4516static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4517_mm256_maskz_rorv_epi64 (__mmask8 __U, __m256i __A, __m256i __B)
4518{
4519 return (__m256i)__builtin_ia32_selectq_256(__U,
4520 (__v4di)_mm256_rorv_epi64(__A, __B),
4521 (__v4di)_mm256_setzero_si256());
4522}
4523
4524static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4525_mm_mask_sllv_epi64(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)
4526{
4527 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
4528 (__v2di)_mm_sllv_epi64(__X, __Y),
4529 (__v2di)__W);
4530}
4531
4532static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4533_mm_maskz_sllv_epi64(__mmask8 __U, __m128i __X, __m128i __Y)
4534{
4535 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
4536 (__v2di)_mm_sllv_epi64(__X, __Y),
4537 (__v2di)_mm_setzero_si128());
4538}
4539
4540static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4541_mm256_mask_sllv_epi64(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)
4542{
4543 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
4544 (__v4di)_mm256_sllv_epi64(__X, __Y),
4545 (__v4di)__W);
4546}
4547
4548static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4549_mm256_maskz_sllv_epi64(__mmask8 __U, __m256i __X, __m256i __Y)
4550{
4551 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
4552 (__v4di)_mm256_sllv_epi64(__X, __Y),
4553 (__v4di)_mm256_setzero_si256());
4554}
4555
4556static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4557_mm_mask_sllv_epi32(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)
4558{
4559 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
4560 (__v4si)_mm_sllv_epi32(__X, __Y),
4561 (__v4si)__W);
4562}
4563
4564static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4565_mm_maskz_sllv_epi32(__mmask8 __U, __m128i __X, __m128i __Y)
4566{
4567 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
4568 (__v4si)_mm_sllv_epi32(__X, __Y),
4569 (__v4si)_mm_setzero_si128());
4570}
4571
4572static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4573_mm256_mask_sllv_epi32(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)
4574{
4575 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
4576 (__v8si)_mm256_sllv_epi32(__X, __Y),
4577 (__v8si)__W);
4578}
4579
4580static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4581_mm256_maskz_sllv_epi32(__mmask8 __U, __m256i __X, __m256i __Y)
4582{
4583 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
4584 (__v8si)_mm256_sllv_epi32(__X, __Y),
4585 (__v8si)_mm256_setzero_si256());
4586}
4587
4588static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4589_mm_mask_srlv_epi64(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)
4590{
4591 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
4592 (__v2di)_mm_srlv_epi64(__X, __Y),
4593 (__v2di)__W);
4594}
4595
4596static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4597_mm_maskz_srlv_epi64(__mmask8 __U, __m128i __X, __m128i __Y)
4598{
4599 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
4600 (__v2di)_mm_srlv_epi64(__X, __Y),
4601 (__v2di)_mm_setzero_si128());
4602}
4603
4604static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4605_mm256_mask_srlv_epi64(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)
4606{
4607 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
4608 (__v4di)_mm256_srlv_epi64(__X, __Y),
4609 (__v4di)__W);
4610}
4611
4612static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4613_mm256_maskz_srlv_epi64(__mmask8 __U, __m256i __X, __m256i __Y)
4614{
4615 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
4616 (__v4di)_mm256_srlv_epi64(__X, __Y),
4617 (__v4di)_mm256_setzero_si256());
4618}
4619
4620static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4621_mm_mask_srlv_epi32(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)
4622{
4623 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
4624 (__v4si)_mm_srlv_epi32(__X, __Y),
4625 (__v4si)__W);
4626}
4627
4628static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4629_mm_maskz_srlv_epi32(__mmask8 __U, __m128i __X, __m128i __Y)
4630{
4631 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
4632 (__v4si)_mm_srlv_epi32(__X, __Y),
4633 (__v4si)_mm_setzero_si128());
4634}
4635
4636static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4637_mm256_mask_srlv_epi32(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)
4638{
4639 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
4640 (__v8si)_mm256_srlv_epi32(__X, __Y),
4641 (__v8si)__W);
4642}
4643
4644static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4645_mm256_maskz_srlv_epi32(__mmask8 __U, __m256i __X, __m256i __Y)
4646{
4647 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
4648 (__v8si)_mm256_srlv_epi32(__X, __Y),
4649 (__v8si)_mm256_setzero_si256());
4650}
4651
4652static __inline__ __m128i __DEFAULT_FN_ATTRS128
4653_mm_mask_srl_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
4654{
4655 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
4656 (__v4si)_mm_srl_epi32(__A, __B),
4657 (__v4si)__W);
4658}
4659
4660static __inline__ __m128i __DEFAULT_FN_ATTRS128
4661_mm_maskz_srl_epi32(__mmask8 __U, __m128i __A, __m128i __B)
4662{
4663 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
4664 (__v4si)_mm_srl_epi32(__A, __B),
4665 (__v4si)_mm_setzero_si128());
4666}
4667
4668static __inline__ __m256i __DEFAULT_FN_ATTRS256
4669_mm256_mask_srl_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B)
4670{
4671 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
4672 (__v8si)_mm256_srl_epi32(__A, __B),
4673 (__v8si)__W);
4674}
4675
4676static __inline__ __m256i __DEFAULT_FN_ATTRS256
4677_mm256_maskz_srl_epi32(__mmask8 __U, __m256i __A, __m128i __B)
4678{
4679 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
4680 (__v8si)_mm256_srl_epi32(__A, __B),
4681 (__v8si)_mm256_setzero_si256());
4682}
4683
4684static __inline__ __m128i __DEFAULT_FN_ATTRS128
4685_mm_mask_srli_epi32(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B)
4686{
4687 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
4688 (__v4si)_mm_srli_epi32(__A, (int)__B),
4689 (__v4si)__W);
4690}
4691
4692static __inline__ __m128i __DEFAULT_FN_ATTRS128
4693_mm_maskz_srli_epi32(__mmask8 __U, __m128i __A, unsigned int __B)
4694{
4695 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
4696 (__v4si)_mm_srli_epi32(__A, (int)__B),
4697 (__v4si)_mm_setzero_si128());
4698}
4699
4700static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4701_mm256_mask_srli_epi32(__m256i __W, __mmask8 __U, __m256i __A,
4702 unsigned int __B) {
4703 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
4704 (__v8si)_mm256_srli_epi32(__A, (int)__B),
4705 (__v8si)__W);
4706}
4707
4708static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4709_mm256_maskz_srli_epi32(__mmask8 __U, __m256i __A, unsigned int __B) {
4710 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
4711 (__v8si)_mm256_srli_epi32(__A, (int)__B),
4712 (__v8si)_mm256_setzero_si256());
4713}
4714
4715static __inline__ __m128i __DEFAULT_FN_ATTRS128
4716_mm_mask_srl_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
4717{
4718 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
4719 (__v2di)_mm_srl_epi64(__A, __B),
4720 (__v2di)__W);
4721}
4722
4723static __inline__ __m128i __DEFAULT_FN_ATTRS128
4724_mm_maskz_srl_epi64(__mmask8 __U, __m128i __A, __m128i __B)
4725{
4726 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
4727 (__v2di)_mm_srl_epi64(__A, __B),
4728 (__v2di)_mm_setzero_si128());
4729}
4730
4731static __inline__ __m256i __DEFAULT_FN_ATTRS256
4732_mm256_mask_srl_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B)
4733{
4734 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
4735 (__v4di)_mm256_srl_epi64(__A, __B),
4736 (__v4di)__W);
4737}
4738
4739static __inline__ __m256i __DEFAULT_FN_ATTRS256
4740_mm256_maskz_srl_epi64(__mmask8 __U, __m256i __A, __m128i __B)
4741{
4742 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
4743 (__v4di)_mm256_srl_epi64(__A, __B),
4744 (__v4di)_mm256_setzero_si256());
4745}
4746
4747static __inline__ __m128i __DEFAULT_FN_ATTRS128
4748_mm_mask_srli_epi64(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B)
4749{
4750 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
4751 (__v2di)_mm_srli_epi64(__A, (int)__B),
4752 (__v2di)__W);
4753}
4754
4755static __inline__ __m128i __DEFAULT_FN_ATTRS128
4756_mm_maskz_srli_epi64(__mmask8 __U, __m128i __A, unsigned int __B)
4757{
4758 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
4759 (__v2di)_mm_srli_epi64(__A, (int)__B),
4760 (__v2di)_mm_setzero_si128());
4761}
4762
4763static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4764_mm256_mask_srli_epi64(__m256i __W, __mmask8 __U, __m256i __A,
4765 unsigned int __B) {
4766 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
4767 (__v4di)_mm256_srli_epi64(__A, (int)__B),
4768 (__v4di)__W);
4769}
4770
4771static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4772_mm256_maskz_srli_epi64(__mmask8 __U, __m256i __A, unsigned int __B) {
4773 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
4774 (__v4di)_mm256_srli_epi64(__A, (int)__B),
4775 (__v4di)_mm256_setzero_si256());
4776}
4777
4778static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4779_mm_mask_srav_epi32(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)
4780{
4781 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
4782 (__v4si)_mm_srav_epi32(__X, __Y),
4783 (__v4si)__W);
4784}
4785
4786static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4787_mm_maskz_srav_epi32(__mmask8 __U, __m128i __X, __m128i __Y)
4788{
4789 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
4790 (__v4si)_mm_srav_epi32(__X, __Y),
4791 (__v4si)_mm_setzero_si128());
4792}
4793
4794static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4795_mm256_mask_srav_epi32(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)
4796{
4797 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
4798 (__v8si)_mm256_srav_epi32(__X, __Y),
4799 (__v8si)__W);
4800}
4801
4802static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4803_mm256_maskz_srav_epi32(__mmask8 __U, __m256i __X, __m256i __Y)
4804{
4805 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
4806 (__v8si)_mm256_srav_epi32(__X, __Y),
4807 (__v8si)_mm256_setzero_si256());
4808}
4809
4810static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4811_mm_srav_epi64(__m128i __X, __m128i __Y)
4812{
4813 return (__m128i)__builtin_ia32_psravq128((__v2di)__X, (__v2di)__Y);
4814}
4815
4816static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4817_mm_mask_srav_epi64(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)
4818{
4819 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
4820 (__v2di)_mm_srav_epi64(__X, __Y),
4821 (__v2di)__W);
4822}
4823
4824static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4825_mm_maskz_srav_epi64(__mmask8 __U, __m128i __X, __m128i __Y)
4826{
4827 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
4828 (__v2di)_mm_srav_epi64(__X, __Y),
4829 (__v2di)_mm_setzero_si128());
4830}
4831
4832static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4833_mm256_srav_epi64(__m256i __X, __m256i __Y)
4834{
4835 return (__m256i)__builtin_ia32_psravq256((__v4di)__X, (__v4di) __Y);
4836}
4837
4838static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4839_mm256_mask_srav_epi64(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)
4840{
4841 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
4842 (__v4di)_mm256_srav_epi64(__X, __Y),
4843 (__v4di)__W);
4844}
4845
4846static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4847_mm256_maskz_srav_epi64 (__mmask8 __U, __m256i __X, __m256i __Y)
4848{
4849 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
4850 (__v4di)_mm256_srav_epi64(__X, __Y),
4851 (__v4di)_mm256_setzero_si256());
4852}
4853
4854static __inline__ __m128i __DEFAULT_FN_ATTRS128
4855_mm_mask_mov_epi32 (__m128i __W, __mmask8 __U, __m128i __A)
4856{
4857 return (__m128i) __builtin_ia32_selectd_128 ((__mmask8) __U,
4858 (__v4si) __A,
4859 (__v4si) __W);
4860}
4861
4862static __inline__ __m128i __DEFAULT_FN_ATTRS128
4864{
4865 return (__m128i) __builtin_ia32_selectd_128 ((__mmask8) __U,
4866 (__v4si) __A,
4867 (__v4si) _mm_setzero_si128 ());
4868}
4869
4870
4871static __inline__ __m256i __DEFAULT_FN_ATTRS256
4872_mm256_mask_mov_epi32 (__m256i __W, __mmask8 __U, __m256i __A)
4873{
4874 return (__m256i) __builtin_ia32_selectd_256 ((__mmask8) __U,
4875 (__v8si) __A,
4876 (__v8si) __W);
4877}
4878
4879static __inline__ __m256i __DEFAULT_FN_ATTRS256
4881{
4882 return (__m256i) __builtin_ia32_selectd_256 ((__mmask8) __U,
4883 (__v8si) __A,
4884 (__v8si) _mm256_setzero_si256 ());
4885}
4886
4887static __inline __m128i __DEFAULT_FN_ATTRS128
4888_mm_load_epi32 (void const *__P)
4889{
4890 return *(const __m128i *) __P;
4891}
4892
4893static __inline__ __m128i __DEFAULT_FN_ATTRS128
4894_mm_mask_load_epi32 (__m128i __W, __mmask8 __U, void const *__P)
4895{
4896 return (__m128i) __builtin_ia32_movdqa32load128_mask ((const __v4si *) __P,
4897 (__v4si) __W,
4898 (__mmask8)
4899 __U);
4900}
4901
4902static __inline__ __m128i __DEFAULT_FN_ATTRS128
4904{
4905 return (__m128i) __builtin_ia32_movdqa32load128_mask ((const __v4si *) __P,
4906 (__v4si)
4908 (__mmask8)
4909 __U);
4910}
4911
4912static __inline __m256i __DEFAULT_FN_ATTRS256
4914{
4915 return *(const __m256i *) __P;
4916}
4917
4918static __inline__ __m256i __DEFAULT_FN_ATTRS256
4919_mm256_mask_load_epi32 (__m256i __W, __mmask8 __U, void const *__P)
4920{
4921 return (__m256i) __builtin_ia32_movdqa32load256_mask ((const __v8si *) __P,
4922 (__v8si) __W,
4923 (__mmask8)
4924 __U);
4925}
4926
4927static __inline__ __m256i __DEFAULT_FN_ATTRS256
4929{
4930 return (__m256i) __builtin_ia32_movdqa32load256_mask ((const __v8si *) __P,
4931 (__v8si)
4933 (__mmask8)
4934 __U);
4935}
4936
4937static __inline void __DEFAULT_FN_ATTRS128
4938_mm_store_epi32 (void *__P, __m128i __A)
4939{
4940 *(__m128i *) __P = __A;
4941}
4942
4943static __inline__ void __DEFAULT_FN_ATTRS128
4944_mm_mask_store_epi32 (void *__P, __mmask8 __U, __m128i __A)
4945{
4946 __builtin_ia32_movdqa32store128_mask ((__v4si *) __P,
4947 (__v4si) __A,
4948 (__mmask8) __U);
4949}
4950
4951static __inline void __DEFAULT_FN_ATTRS256
4952_mm256_store_epi32 (void *__P, __m256i __A)
4953{
4954 *(__m256i *) __P = __A;
4955}
4956
4957static __inline__ void __DEFAULT_FN_ATTRS256
4958_mm256_mask_store_epi32 (void *__P, __mmask8 __U, __m256i __A)
4959{
4960 __builtin_ia32_movdqa32store256_mask ((__v8si *) __P,
4961 (__v8si) __A,
4962 (__mmask8) __U);
4963}
4964
4965static __inline__ __m128i __DEFAULT_FN_ATTRS128
4966_mm_mask_mov_epi64 (__m128i __W, __mmask8 __U, __m128i __A)
4967{
4968 return (__m128i) __builtin_ia32_selectq_128 ((__mmask8) __U,
4969 (__v2di) __A,
4970 (__v2di) __W);
4971}
4972
4973static __inline__ __m128i __DEFAULT_FN_ATTRS128
4975{
4976 return (__m128i) __builtin_ia32_selectq_128 ((__mmask8) __U,
4977 (__v2di) __A,
4978 (__v2di) _mm_setzero_si128 ());
4979}
4980
4981static __inline__ __m256i __DEFAULT_FN_ATTRS256
4982_mm256_mask_mov_epi64 (__m256i __W, __mmask8 __U, __m256i __A)
4983{
4984 return (__m256i) __builtin_ia32_selectq_256 ((__mmask8) __U,
4985 (__v4di) __A,
4986 (__v4di) __W);
4987}
4988
4989static __inline__ __m256i __DEFAULT_FN_ATTRS256
4991{
4992 return (__m256i) __builtin_ia32_selectq_256 ((__mmask8) __U,
4993 (__v4di) __A,
4994 (__v4di) _mm256_setzero_si256 ());
4995}
4996
4997static __inline __m128i __DEFAULT_FN_ATTRS128
4998_mm_load_epi64 (void const *__P)
4999{
5000 return *(const __m128i *) __P;
5001}
5002
5003static __inline__ __m128i __DEFAULT_FN_ATTRS128
5004_mm_mask_load_epi64 (__m128i __W, __mmask8 __U, void const *__P)
5005{
5006 return (__m128i) __builtin_ia32_movdqa64load128_mask ((const __v2di *) __P,
5007 (__v2di) __W,
5008 (__mmask8)
5009 __U);
5010}
5011
5012static __inline__ __m128i __DEFAULT_FN_ATTRS128
5014{
5015 return (__m128i) __builtin_ia32_movdqa64load128_mask ((const __v2di *) __P,
5016 (__v2di)
5018 (__mmask8)
5019 __U);
5020}
5021
5022static __inline __m256i __DEFAULT_FN_ATTRS256
5024{
5025 return *(const __m256i *) __P;
5026}
5027
5028static __inline__ __m256i __DEFAULT_FN_ATTRS256
5029_mm256_mask_load_epi64 (__m256i __W, __mmask8 __U, void const *__P)
5030{
5031 return (__m256i) __builtin_ia32_movdqa64load256_mask ((const __v4di *) __P,
5032 (__v4di) __W,
5033 (__mmask8)
5034 __U);
5035}
5036
5037static __inline__ __m256i __DEFAULT_FN_ATTRS256
5039{
5040 return (__m256i) __builtin_ia32_movdqa64load256_mask ((const __v4di *) __P,
5041 (__v4di)
5043 (__mmask8)
5044 __U);
5045}
5046
5047static __inline void __DEFAULT_FN_ATTRS128
5048_mm_store_epi64 (void *__P, __m128i __A)
5049{
5050 *(__m128i *) __P = __A;
5051}
5052
5053static __inline__ void __DEFAULT_FN_ATTRS128
5054_mm_mask_store_epi64 (void *__P, __mmask8 __U, __m128i __A)
5055{
5056 __builtin_ia32_movdqa64store128_mask ((__v2di *) __P,
5057 (__v2di) __A,
5058 (__mmask8) __U);
5059}
5060
5061static __inline void __DEFAULT_FN_ATTRS256
5062_mm256_store_epi64 (void *__P, __m256i __A)
5063{
5064 *(__m256i *) __P = __A;
5065}
5066
5067static __inline__ void __DEFAULT_FN_ATTRS256
5068_mm256_mask_store_epi64 (void *__P, __mmask8 __U, __m256i __A)
5069{
5070 __builtin_ia32_movdqa64store256_mask ((__v4di *) __P,
5071 (__v4di) __A,
5072 (__mmask8) __U);
5073}
5074
5075static __inline__ __m128d __DEFAULT_FN_ATTRS128
5076_mm_mask_movedup_pd (__m128d __W, __mmask8 __U, __m128d __A)
5077{
5078 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
5079 (__v2df)_mm_movedup_pd(__A),
5080 (__v2df)__W);
5081}
5082
5083static __inline__ __m128d __DEFAULT_FN_ATTRS128
5085{
5086 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
5087 (__v2df)_mm_movedup_pd(__A),
5088 (__v2df)_mm_setzero_pd());
5089}
5090
5091static __inline__ __m256d __DEFAULT_FN_ATTRS256
5092_mm256_mask_movedup_pd (__m256d __W, __mmask8 __U, __m256d __A)
5093{
5094 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
5095 (__v4df)_mm256_movedup_pd(__A),
5096 (__v4df)__W);
5097}
5098
5099static __inline__ __m256d __DEFAULT_FN_ATTRS256
5101{
5102 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
5103 (__v4df)_mm256_movedup_pd(__A),
5104 (__v4df)_mm256_setzero_pd());
5105}
5106
5107static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
5108_mm_mask_set1_epi32(__m128i __O, __mmask8 __M, int __A) {
5109 return (__m128i)__builtin_ia32_selectd_128(__M, (__v4si)_mm_set1_epi32(__A),
5110 (__v4si)__O);
5111}
5112
5113static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
5115 return (__m128i)__builtin_ia32_selectd_128(__M, (__v4si)_mm_set1_epi32(__A),
5116 (__v4si)_mm_setzero_si128());
5117}
5118
5119static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
5120_mm256_mask_set1_epi32(__m256i __O, __mmask8 __M, int __A) {
5121 return (__m256i)__builtin_ia32_selectd_256(
5122 __M, (__v8si)_mm256_set1_epi32(__A), (__v8si)__O);
5123}
5124
5125static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
5127 return (__m256i)__builtin_ia32_selectd_256(
5128 __M, (__v8si)_mm256_set1_epi32(__A), (__v8si)_mm256_setzero_si256());
5129}
5130
5131static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
5132_mm_mask_set1_epi64(__m128i __O, __mmask8 __M, long long __A) {
5133 return (__m128i) __builtin_ia32_selectq_128(__M,
5134 (__v2di) _mm_set1_epi64x(__A),
5135 (__v2di) __O);
5136}
5137
5138static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
5139_mm_maskz_set1_epi64(__mmask8 __M, long long __A) {
5140 return (__m128i) __builtin_ia32_selectq_128(__M,
5141 (__v2di) _mm_set1_epi64x(__A),
5142 (__v2di) _mm_setzero_si128());
5143}
5144
5145static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
5146_mm256_mask_set1_epi64(__m256i __O, __mmask8 __M, long long __A) {
5147 return (__m256i) __builtin_ia32_selectq_256(__M,
5148 (__v4di) _mm256_set1_epi64x(__A),
5149 (__v4di) __O) ;
5150}
5151
5152static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
5154 return (__m256i)__builtin_ia32_selectq_256(
5155 __M, (__v4di)_mm256_set1_epi64x(__A), (__v4di)_mm256_setzero_si256());
5156}
5157
5158#define _mm_fixupimm_pd(A, B, C, imm) \
5159 ((__m128d)__builtin_ia32_fixupimmpd128_mask((__v2df)(__m128d)(A), \
5160 (__v2df)(__m128d)(B), \
5161 (__v2di)(__m128i)(C), (int)(imm), \
5162 (__mmask8)-1))
5163
5164#define _mm_mask_fixupimm_pd(A, U, B, C, imm) \
5165 ((__m128d)__builtin_ia32_fixupimmpd128_mask((__v2df)(__m128d)(A), \
5166 (__v2df)(__m128d)(B), \
5167 (__v2di)(__m128i)(C), (int)(imm), \
5168 (__mmask8)(U)))
5169
5170#define _mm_maskz_fixupimm_pd(U, A, B, C, imm) \
5171 ((__m128d)__builtin_ia32_fixupimmpd128_maskz((__v2df)(__m128d)(A), \
5172 (__v2df)(__m128d)(B), \
5173 (__v2di)(__m128i)(C), \
5174 (int)(imm), (__mmask8)(U)))
5175
5176#define _mm256_fixupimm_pd(A, B, C, imm) \
5177 ((__m256d)__builtin_ia32_fixupimmpd256_mask((__v4df)(__m256d)(A), \
5178 (__v4df)(__m256d)(B), \
5179 (__v4di)(__m256i)(C), (int)(imm), \
5180 (__mmask8)-1))
5181
5182#define _mm256_mask_fixupimm_pd(A, U, B, C, imm) \
5183 ((__m256d)__builtin_ia32_fixupimmpd256_mask((__v4df)(__m256d)(A), \
5184 (__v4df)(__m256d)(B), \
5185 (__v4di)(__m256i)(C), (int)(imm), \
5186 (__mmask8)(U)))
5187
5188#define _mm256_maskz_fixupimm_pd(U, A, B, C, imm) \
5189 ((__m256d)__builtin_ia32_fixupimmpd256_maskz((__v4df)(__m256d)(A), \
5190 (__v4df)(__m256d)(B), \
5191 (__v4di)(__m256i)(C), \
5192 (int)(imm), (__mmask8)(U)))
5193
5194#define _mm_fixupimm_ps(A, B, C, imm) \
5195 ((__m128)__builtin_ia32_fixupimmps128_mask((__v4sf)(__m128)(A), \
5196 (__v4sf)(__m128)(B), \
5197 (__v4si)(__m128i)(C), (int)(imm), \
5198 (__mmask8)-1))
5199
5200#define _mm_mask_fixupimm_ps(A, U, B, C, imm) \
5201 ((__m128)__builtin_ia32_fixupimmps128_mask((__v4sf)(__m128)(A), \
5202 (__v4sf)(__m128)(B), \
5203 (__v4si)(__m128i)(C), (int)(imm), \
5204 (__mmask8)(U)))
5205
5206#define _mm_maskz_fixupimm_ps(U, A, B, C, imm) \
5207 ((__m128)__builtin_ia32_fixupimmps128_maskz((__v4sf)(__m128)(A), \
5208 (__v4sf)(__m128)(B), \
5209 (__v4si)(__m128i)(C), (int)(imm), \
5210 (__mmask8)(U)))
5211
5212#define _mm256_fixupimm_ps(A, B, C, imm) \
5213 ((__m256)__builtin_ia32_fixupimmps256_mask((__v8sf)(__m256)(A), \
5214 (__v8sf)(__m256)(B), \
5215 (__v8si)(__m256i)(C), (int)(imm), \
5216 (__mmask8)-1))
5217
5218#define _mm256_mask_fixupimm_ps(A, U, B, C, imm) \
5219 ((__m256)__builtin_ia32_fixupimmps256_mask((__v8sf)(__m256)(A), \
5220 (__v8sf)(__m256)(B), \
5221 (__v8si)(__m256i)(C), (int)(imm), \
5222 (__mmask8)(U)))
5223
5224#define _mm256_maskz_fixupimm_ps(U, A, B, C, imm) \
5225 ((__m256)__builtin_ia32_fixupimmps256_maskz((__v8sf)(__m256)(A), \
5226 (__v8sf)(__m256)(B), \
5227 (__v8si)(__m256i)(C), (int)(imm), \
5228 (__mmask8)(U)))
5229
5230static __inline__ __m128d __DEFAULT_FN_ATTRS128
5231_mm_mask_load_pd (__m128d __W, __mmask8 __U, void const *__P)
5232{
5233 return (__m128d) __builtin_ia32_loadapd128_mask ((const __v2df *) __P,
5234 (__v2df) __W,
5235 (__mmask8) __U);
5236}
5237
5238static __inline__ __m128d __DEFAULT_FN_ATTRS128
5240{
5241 return (__m128d) __builtin_ia32_loadapd128_mask ((const __v2df *) __P,
5242 (__v2df)
5243 _mm_setzero_pd (),
5244 (__mmask8) __U);
5245}
5246
5247static __inline__ __m256d __DEFAULT_FN_ATTRS256
5248_mm256_mask_load_pd (__m256d __W, __mmask8 __U, void const *__P)
5249{
5250 return (__m256d) __builtin_ia32_loadapd256_mask ((const __v4df *) __P,
5251 (__v4df) __W,
5252 (__mmask8) __U);
5253}
5254
5255static __inline__ __m256d __DEFAULT_FN_ATTRS256
5257{
5258 return (__m256d) __builtin_ia32_loadapd256_mask ((const __v4df *) __P,
5259 (__v4df)
5261 (__mmask8) __U);
5262}
5263
5264static __inline__ __m128 __DEFAULT_FN_ATTRS128
5265_mm_mask_load_ps (__m128 __W, __mmask8 __U, void const *__P)
5266{
5267 return (__m128) __builtin_ia32_loadaps128_mask ((const __v4sf *) __P,
5268 (__v4sf) __W,
5269 (__mmask8) __U);
5270}
5271
5272static __inline__ __m128 __DEFAULT_FN_ATTRS128
5274{
5275 return (__m128) __builtin_ia32_loadaps128_mask ((const __v4sf *) __P,
5276 (__v4sf)
5277 _mm_setzero_ps (),
5278 (__mmask8) __U);
5279}
5280
5281static __inline__ __m256 __DEFAULT_FN_ATTRS256
5282_mm256_mask_load_ps (__m256 __W, __mmask8 __U, void const *__P)
5283{
5284 return (__m256) __builtin_ia32_loadaps256_mask ((const __v8sf *) __P,
5285 (__v8sf) __W,
5286 (__mmask8) __U);
5287}
5288
5289static __inline__ __m256 __DEFAULT_FN_ATTRS256
5291{
5292 return (__m256) __builtin_ia32_loadaps256_mask ((const __v8sf *) __P,
5293 (__v8sf)
5295 (__mmask8) __U);
5296}
5297
5298static __inline __m128i __DEFAULT_FN_ATTRS128
5300{
5301 struct __loadu_epi64 {
5302 __m128i_u __v;
5303 } __attribute__((__packed__, __may_alias__));
5304 return ((const struct __loadu_epi64*)__P)->__v;
5305}
5306
5307static __inline__ __m128i __DEFAULT_FN_ATTRS128
5308_mm_mask_loadu_epi64 (__m128i __W, __mmask8 __U, void const *__P)
5309{
5310 return (__m128i) __builtin_ia32_loaddqudi128_mask ((const __v2di *) __P,
5311 (__v2di) __W,
5312 (__mmask8) __U);
5313}
5314
5315static __inline__ __m128i __DEFAULT_FN_ATTRS128
5317{
5318 return (__m128i) __builtin_ia32_loaddqudi128_mask ((const __v2di *) __P,
5319 (__v2di)
5321 (__mmask8) __U);
5322}
5323
5324static __inline __m256i __DEFAULT_FN_ATTRS256
5326{
5327 struct __loadu_epi64 {
5328 __m256i_u __v;
5329 } __attribute__((__packed__, __may_alias__));
5330 return ((const struct __loadu_epi64*)__P)->__v;
5331}
5332
5333static __inline__ __m256i __DEFAULT_FN_ATTRS256
5334_mm256_mask_loadu_epi64 (__m256i __W, __mmask8 __U, void const *__P)
5335{
5336 return (__m256i) __builtin_ia32_loaddqudi256_mask ((const __v4di *) __P,
5337 (__v4di) __W,
5338 (__mmask8) __U);
5339}
5340
5341static __inline__ __m256i __DEFAULT_FN_ATTRS256
5343{
5344 return (__m256i) __builtin_ia32_loaddqudi256_mask ((const __v4di *) __P,
5345 (__v4di)
5347 (__mmask8) __U);
5348}
5349
5350static __inline __m128i __DEFAULT_FN_ATTRS128
5352{
5353 struct __loadu_epi32 {
5354 __m128i_u __v;
5355 } __attribute__((__packed__, __may_alias__));
5356 return ((const struct __loadu_epi32*)__P)->__v;
5357}
5358
5359static __inline__ __m128i __DEFAULT_FN_ATTRS128
5360_mm_mask_loadu_epi32 (__m128i __W, __mmask8 __U, void const *__P)
5361{
5362 return (__m128i) __builtin_ia32_loaddqusi128_mask ((const __v4si *) __P,
5363 (__v4si) __W,
5364 (__mmask8) __U);
5365}
5366
5367static __inline__ __m128i __DEFAULT_FN_ATTRS128
5369{
5370 return (__m128i) __builtin_ia32_loaddqusi128_mask ((const __v4si *) __P,
5371 (__v4si)
5373 (__mmask8) __U);
5374}
5375
5376static __inline __m256i __DEFAULT_FN_ATTRS256
5378{
5379 struct __loadu_epi32 {
5380 __m256i_u __v;
5381 } __attribute__((__packed__, __may_alias__));
5382 return ((const struct __loadu_epi32*)__P)->__v;
5383}
5384
5385static __inline__ __m256i __DEFAULT_FN_ATTRS256
5386_mm256_mask_loadu_epi32 (__m256i __W, __mmask8 __U, void const *__P)
5387{
5388 return (__m256i) __builtin_ia32_loaddqusi256_mask ((const __v8si *) __P,
5389 (__v8si) __W,
5390 (__mmask8) __U);
5391}
5392
5393static __inline__ __m256i __DEFAULT_FN_ATTRS256
5395{
5396 return (__m256i) __builtin_ia32_loaddqusi256_mask ((const __v8si *) __P,
5397 (__v8si)
5399 (__mmask8) __U);
5400}
5401
5402static __inline__ __m128d __DEFAULT_FN_ATTRS128
5403_mm_mask_loadu_pd (__m128d __W, __mmask8 __U, void const *__P)
5404{
5405 return (__m128d) __builtin_ia32_loadupd128_mask ((const __v2df *) __P,
5406 (__v2df) __W,
5407 (__mmask8) __U);
5408}
5409
5410static __inline__ __m128d __DEFAULT_FN_ATTRS128
5412{
5413 return (__m128d) __builtin_ia32_loadupd128_mask ((const __v2df *) __P,
5414 (__v2df)
5415 _mm_setzero_pd (),
5416 (__mmask8) __U);
5417}
5418
5419static __inline__ __m256d __DEFAULT_FN_ATTRS256
5420_mm256_mask_loadu_pd (__m256d __W, __mmask8 __U, void const *__P)
5421{
5422 return (__m256d) __builtin_ia32_loadupd256_mask ((const __v4df *) __P,
5423 (__v4df) __W,
5424 (__mmask8) __U);
5425}
5426
5427static __inline__ __m256d __DEFAULT_FN_ATTRS256
5429{
5430 return (__m256d) __builtin_ia32_loadupd256_mask ((const __v4df *) __P,
5431 (__v4df)
5433 (__mmask8) __U);
5434}
5435
5436static __inline__ __m128 __DEFAULT_FN_ATTRS128
5437_mm_mask_loadu_ps (__m128 __W, __mmask8 __U, void const *__P)
5438{
5439 return (__m128) __builtin_ia32_loadups128_mask ((const __v4sf *) __P,
5440 (__v4sf) __W,
5441 (__mmask8) __U);
5442}
5443
5444static __inline__ __m128 __DEFAULT_FN_ATTRS128
5446{
5447 return (__m128) __builtin_ia32_loadups128_mask ((const __v4sf *) __P,
5448 (__v4sf)
5449 _mm_setzero_ps (),
5450 (__mmask8) __U);
5451}
5452
5453static __inline__ __m256 __DEFAULT_FN_ATTRS256
5454_mm256_mask_loadu_ps (__m256 __W, __mmask8 __U, void const *__P)
5455{
5456 return (__m256) __builtin_ia32_loadups256_mask ((const __v8sf *) __P,
5457 (__v8sf) __W,
5458 (__mmask8) __U);
5459}
5460
5461static __inline__ __m256 __DEFAULT_FN_ATTRS256
5463{
5464 return (__m256) __builtin_ia32_loadups256_mask ((const __v8sf *) __P,
5465 (__v8sf)
5467 (__mmask8) __U);
5468}
5469
5470static __inline__ void __DEFAULT_FN_ATTRS128
5471_mm_mask_store_pd (void *__P, __mmask8 __U, __m128d __A)
5472{
5473 __builtin_ia32_storeapd128_mask ((__v2df *) __P,
5474 (__v2df) __A,
5475 (__mmask8) __U);
5476}
5477
5478static __inline__ void __DEFAULT_FN_ATTRS256
5479_mm256_mask_store_pd (void *__P, __mmask8 __U, __m256d __A)
5480{
5481 __builtin_ia32_storeapd256_mask ((__v4df *) __P,
5482 (__v4df) __A,
5483 (__mmask8) __U);
5484}
5485
5486static __inline__ void __DEFAULT_FN_ATTRS128
5487_mm_mask_store_ps (void *__P, __mmask8 __U, __m128 __A)
5488{
5489 __builtin_ia32_storeaps128_mask ((__v4sf *) __P,
5490 (__v4sf) __A,
5491 (__mmask8) __U);
5492}
5493
5494static __inline__ void __DEFAULT_FN_ATTRS256
5495_mm256_mask_store_ps (void *__P, __mmask8 __U, __m256 __A)
5496{
5497 __builtin_ia32_storeaps256_mask ((__v8sf *) __P,
5498 (__v8sf) __A,
5499 (__mmask8) __U);
5500}
5501
5502static __inline void __DEFAULT_FN_ATTRS128
5503_mm_storeu_epi64 (void *__P, __m128i __A)
5504{
5505 struct __storeu_epi64 {
5506 __m128i_u __v;
5507 } __attribute__((__packed__, __may_alias__));
5508 ((struct __storeu_epi64*)__P)->__v = __A;
5509}
5510
5511static __inline__ void __DEFAULT_FN_ATTRS128
5512_mm_mask_storeu_epi64 (void *__P, __mmask8 __U, __m128i __A)
5513{
5514 __builtin_ia32_storedqudi128_mask ((__v2di *) __P,
5515 (__v2di) __A,
5516 (__mmask8) __U);
5517}
5518
5519static __inline void __DEFAULT_FN_ATTRS256
5520_mm256_storeu_epi64 (void *__P, __m256i __A)
5521{
5522 struct __storeu_epi64 {
5523 __m256i_u __v;
5524 } __attribute__((__packed__, __may_alias__));
5525 ((struct __storeu_epi64*)__P)->__v = __A;
5526}
5527
5528static __inline__ void __DEFAULT_FN_ATTRS256
5529_mm256_mask_storeu_epi64 (void *__P, __mmask8 __U, __m256i __A)
5530{
5531 __builtin_ia32_storedqudi256_mask ((__v4di *) __P,
5532 (__v4di) __A,
5533 (__mmask8) __U);
5534}
5535
5536static __inline void __DEFAULT_FN_ATTRS128
5537_mm_storeu_epi32 (void *__P, __m128i __A)
5538{
5539 struct __storeu_epi32 {
5540 __m128i_u __v;
5541 } __attribute__((__packed__, __may_alias__));
5542 ((struct __storeu_epi32*)__P)->__v = __A;
5543}
5544
5545static __inline__ void __DEFAULT_FN_ATTRS128
5546_mm_mask_storeu_epi32 (void *__P, __mmask8 __U, __m128i __A)
5547{
5548 __builtin_ia32_storedqusi128_mask ((__v4si *) __P,
5549 (__v4si) __A,
5550 (__mmask8) __U);
5551}
5552
5553static __inline void __DEFAULT_FN_ATTRS256
5554_mm256_storeu_epi32 (void *__P, __m256i __A)
5555{
5556 struct __storeu_epi32 {
5557 __m256i_u __v;
5558 } __attribute__((__packed__, __may_alias__));
5559 ((struct __storeu_epi32*)__P)->__v = __A;
5560}
5561
5562static __inline__ void __DEFAULT_FN_ATTRS256
5563_mm256_mask_storeu_epi32 (void *__P, __mmask8 __U, __m256i __A)
5564{
5565 __builtin_ia32_storedqusi256_mask ((__v8si *) __P,
5566 (__v8si) __A,
5567 (__mmask8) __U);
5568}
5569
5570static __inline__ void __DEFAULT_FN_ATTRS128
5571_mm_mask_storeu_pd (void *__P, __mmask8 __U, __m128d __A)
5572{
5573 __builtin_ia32_storeupd128_mask ((__v2df *) __P,
5574 (__v2df) __A,
5575 (__mmask8) __U);
5576}
5577
5578static __inline__ void __DEFAULT_FN_ATTRS256
5579_mm256_mask_storeu_pd (void *__P, __mmask8 __U, __m256d __A)
5580{
5581 __builtin_ia32_storeupd256_mask ((__v4df *) __P,
5582 (__v4df) __A,
5583 (__mmask8) __U);
5584}
5585
5586static __inline__ void __DEFAULT_FN_ATTRS128
5587_mm_mask_storeu_ps (void *__P, __mmask8 __U, __m128 __A)
5588{
5589 __builtin_ia32_storeups128_mask ((__v4sf *) __P,
5590 (__v4sf) __A,
5591 (__mmask8) __U);
5592}
5593
5594static __inline__ void __DEFAULT_FN_ATTRS256
5595_mm256_mask_storeu_ps (void *__P, __mmask8 __U, __m256 __A)
5596{
5597 __builtin_ia32_storeups256_mask ((__v8sf *) __P,
5598 (__v8sf) __A,
5599 (__mmask8) __U);
5600}
5601
5602static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
5603_mm_mask_unpackhi_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
5604 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
5605 (__v2df)_mm_unpackhi_pd(__A, __B),
5606 (__v2df)__W);
5607}
5608
5609static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
5610_mm_maskz_unpackhi_pd(__mmask8 __U, __m128d __A, __m128d __B) {
5611 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
5612 (__v2df)_mm_unpackhi_pd(__A, __B),
5613 (__v2df)_mm_setzero_pd());
5614}
5615
5616static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
5617_mm256_mask_unpackhi_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) {
5618 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
5619 (__v4df)_mm256_unpackhi_pd(__A, __B),
5620 (__v4df)__W);
5621}
5622
5623static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
5624_mm256_maskz_unpackhi_pd(__mmask8 __U, __m256d __A, __m256d __B) {
5625 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
5626 (__v4df)_mm256_unpackhi_pd(__A, __B),
5627 (__v4df)_mm256_setzero_pd());
5628}
5629
5630static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
5631_mm_mask_unpackhi_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
5632 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
5633 (__v4sf)_mm_unpackhi_ps(__A, __B),
5634 (__v4sf)__W);
5635}
5636
5637static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
5638_mm_maskz_unpackhi_ps(__mmask8 __U, __m128 __A, __m128 __B) {
5639 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
5640 (__v4sf)_mm_unpackhi_ps(__A, __B),
5641 (__v4sf)_mm_setzero_ps());
5642}
5643
5644static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
5645_mm256_mask_unpackhi_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) {
5646 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
5647 (__v8sf)_mm256_unpackhi_ps(__A, __B),
5648 (__v8sf)__W);
5649}
5650
5651static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
5652_mm256_maskz_unpackhi_ps(__mmask8 __U, __m256 __A, __m256 __B) {
5653 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
5654 (__v8sf)_mm256_unpackhi_ps(__A, __B),
5655 (__v8sf)_mm256_setzero_ps());
5656}
5657
5658static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
5659_mm_mask_unpacklo_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
5660 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
5661 (__v2df)_mm_unpacklo_pd(__A, __B),
5662 (__v2df)__W);
5663}
5664
5665static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
5666_mm_maskz_unpacklo_pd(__mmask8 __U, __m128d __A, __m128d __B) {
5667 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
5668 (__v2df)_mm_unpacklo_pd(__A, __B),
5669 (__v2df)_mm_setzero_pd());
5670}
5671
5672static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
5673_mm256_mask_unpacklo_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) {
5674 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
5675 (__v4df)_mm256_unpacklo_pd(__A, __B),
5676 (__v4df)__W);
5677}
5678
5679static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
5680_mm256_maskz_unpacklo_pd(__mmask8 __U, __m256d __A, __m256d __B) {
5681 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
5682 (__v4df)_mm256_unpacklo_pd(__A, __B),
5683 (__v4df)_mm256_setzero_pd());
5684}
5685
5686static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
5687_mm_mask_unpacklo_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
5688 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
5689 (__v4sf)_mm_unpacklo_ps(__A, __B),
5690 (__v4sf)__W);
5691}
5692
5693static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
5694_mm_maskz_unpacklo_ps(__mmask8 __U, __m128 __A, __m128 __B) {
5695 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
5696 (__v4sf)_mm_unpacklo_ps(__A, __B),
5697 (__v4sf)_mm_setzero_ps());
5698}
5699
5700static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
5701_mm256_mask_unpacklo_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) {
5702 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
5703 (__v8sf)_mm256_unpacklo_ps(__A, __B),
5704 (__v8sf)__W);
5705}
5706
5707static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
5708_mm256_maskz_unpacklo_ps(__mmask8 __U, __m256 __A, __m256 __B) {
5709 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
5710 (__v8sf)_mm256_unpacklo_ps(__A, __B),
5711 (__v8sf)_mm256_setzero_ps());
5712}
5713
5714static __inline__ __m128d __DEFAULT_FN_ATTRS128
5715_mm_rcp14_pd (__m128d __A)
5716{
5717 return (__m128d) __builtin_ia32_rcp14pd128_mask ((__v2df) __A,
5718 (__v2df)
5719 _mm_setzero_pd (),
5720 (__mmask8) -1);
5721}
5722
5723static __inline__ __m128d __DEFAULT_FN_ATTRS128
5724_mm_mask_rcp14_pd (__m128d __W, __mmask8 __U, __m128d __A)
5725{
5726 return (__m128d) __builtin_ia32_rcp14pd128_mask ((__v2df) __A,
5727 (__v2df) __W,
5728 (__mmask8) __U);
5729}
5730
5731static __inline__ __m128d __DEFAULT_FN_ATTRS128
5733{
5734 return (__m128d) __builtin_ia32_rcp14pd128_mask ((__v2df) __A,
5735 (__v2df)
5736 _mm_setzero_pd (),
5737 (__mmask8) __U);
5738}
5739
5740static __inline__ __m256d __DEFAULT_FN_ATTRS256
5741_mm256_rcp14_pd (__m256d __A)
5742{
5743 return (__m256d) __builtin_ia32_rcp14pd256_mask ((__v4df) __A,
5744 (__v4df)
5746 (__mmask8) -1);
5747}
5748
5749static __inline__ __m256d __DEFAULT_FN_ATTRS256
5750_mm256_mask_rcp14_pd (__m256d __W, __mmask8 __U, __m256d __A)
5751{
5752 return (__m256d) __builtin_ia32_rcp14pd256_mask ((__v4df) __A,
5753 (__v4df) __W,
5754 (__mmask8) __U);
5755}
5756
5757static __inline__ __m256d __DEFAULT_FN_ATTRS256
5759{
5760 return (__m256d) __builtin_ia32_rcp14pd256_mask ((__v4df) __A,
5761 (__v4df)
5763 (__mmask8) __U);
5764}
5765
5766static __inline__ __m128 __DEFAULT_FN_ATTRS128
5767_mm_rcp14_ps (__m128 __A)
5768{
5769 return (__m128) __builtin_ia32_rcp14ps128_mask ((__v4sf) __A,
5770 (__v4sf)
5771 _mm_setzero_ps (),
5772 (__mmask8) -1);
5773}
5774
5775static __inline__ __m128 __DEFAULT_FN_ATTRS128
5776_mm_mask_rcp14_ps (__m128 __W, __mmask8 __U, __m128 __A)
5777{
5778 return (__m128) __builtin_ia32_rcp14ps128_mask ((__v4sf) __A,
5779 (__v4sf) __W,
5780 (__mmask8) __U);
5781}
5782
5783static __inline__ __m128 __DEFAULT_FN_ATTRS128
5785{
5786 return (__m128) __builtin_ia32_rcp14ps128_mask ((__v4sf) __A,
5787 (__v4sf)
5788 _mm_setzero_ps (),
5789 (__mmask8) __U);
5790}
5791
5792static __inline__ __m256 __DEFAULT_FN_ATTRS256
5794{
5795 return (__m256) __builtin_ia32_rcp14ps256_mask ((__v8sf) __A,
5796 (__v8sf)
5798 (__mmask8) -1);
5799}
5800
5801static __inline__ __m256 __DEFAULT_FN_ATTRS256
5802_mm256_mask_rcp14_ps (__m256 __W, __mmask8 __U, __m256 __A)
5803{
5804 return (__m256) __builtin_ia32_rcp14ps256_mask ((__v8sf) __A,
5805 (__v8sf) __W,
5806 (__mmask8) __U);
5807}
5808
5809static __inline__ __m256 __DEFAULT_FN_ATTRS256
5811{
5812 return (__m256) __builtin_ia32_rcp14ps256_mask ((__v8sf) __A,
5813 (__v8sf)
5815 (__mmask8) __U);
5816}
5817
5818#define _mm_mask_permute_pd(W, U, X, C) \
5819 ((__m128d)__builtin_ia32_selectpd_128((__mmask8)(U), \
5820 (__v2df)_mm_permute_pd((X), (C)), \
5821 (__v2df)(__m128d)(W)))
5822
5823#define _mm_maskz_permute_pd(U, X, C) \
5824 ((__m128d)__builtin_ia32_selectpd_128((__mmask8)(U), \
5825 (__v2df)_mm_permute_pd((X), (C)), \
5826 (__v2df)_mm_setzero_pd()))
5827
5828#define _mm256_mask_permute_pd(W, U, X, C) \
5829 ((__m256d)__builtin_ia32_selectpd_256((__mmask8)(U), \
5830 (__v4df)_mm256_permute_pd((X), (C)), \
5831 (__v4df)(__m256d)(W)))
5832
5833#define _mm256_maskz_permute_pd(U, X, C) \
5834 ((__m256d)__builtin_ia32_selectpd_256((__mmask8)(U), \
5835 (__v4df)_mm256_permute_pd((X), (C)), \
5836 (__v4df)_mm256_setzero_pd()))
5837
5838#define _mm_mask_permute_ps(W, U, X, C) \
5839 ((__m128)__builtin_ia32_selectps_128((__mmask8)(U), \
5840 (__v4sf)_mm_permute_ps((X), (C)), \
5841 (__v4sf)(__m128)(W)))
5842
5843#define _mm_maskz_permute_ps(U, X, C) \
5844 ((__m128)__builtin_ia32_selectps_128((__mmask8)(U), \
5845 (__v4sf)_mm_permute_ps((X), (C)), \
5846 (__v4sf)_mm_setzero_ps()))
5847
5848#define _mm256_mask_permute_ps(W, U, X, C) \
5849 ((__m256)__builtin_ia32_selectps_256((__mmask8)(U), \
5850 (__v8sf)_mm256_permute_ps((X), (C)), \
5851 (__v8sf)(__m256)(W)))
5852
5853#define _mm256_maskz_permute_ps(U, X, C) \
5854 ((__m256)__builtin_ia32_selectps_256((__mmask8)(U), \
5855 (__v8sf)_mm256_permute_ps((X), (C)), \
5856 (__v8sf)_mm256_setzero_ps()))
5857
5858static __inline__ __m128d __DEFAULT_FN_ATTRS128
5859_mm_mask_permutevar_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128i __C)
5860{
5861 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
5862 (__v2df)_mm_permutevar_pd(__A, __C),
5863 (__v2df)__W);
5864}
5865
5866static __inline__ __m128d __DEFAULT_FN_ATTRS128
5867_mm_maskz_permutevar_pd(__mmask8 __U, __m128d __A, __m128i __C)
5868{
5869 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
5870 (__v2df)_mm_permutevar_pd(__A, __C),
5871 (__v2df)_mm_setzero_pd());
5872}
5873
5874static __inline__ __m256d __DEFAULT_FN_ATTRS256
5875_mm256_mask_permutevar_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256i __C)
5876{
5877 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
5878 (__v4df)_mm256_permutevar_pd(__A, __C),
5879 (__v4df)__W);
5880}
5881
5882static __inline__ __m256d __DEFAULT_FN_ATTRS256
5883_mm256_maskz_permutevar_pd(__mmask8 __U, __m256d __A, __m256i __C)
5884{
5885 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
5886 (__v4df)_mm256_permutevar_pd(__A, __C),
5887 (__v4df)_mm256_setzero_pd());
5888}
5889
5890static __inline__ __m128 __DEFAULT_FN_ATTRS128
5891_mm_mask_permutevar_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128i __C)
5892{
5893 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
5894 (__v4sf)_mm_permutevar_ps(__A, __C),
5895 (__v4sf)__W);
5896}
5897
5898static __inline__ __m128 __DEFAULT_FN_ATTRS128
5899_mm_maskz_permutevar_ps(__mmask8 __U, __m128 __A, __m128i __C)
5900{
5901 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
5902 (__v4sf)_mm_permutevar_ps(__A, __C),
5903 (__v4sf)_mm_setzero_ps());
5904}
5905
5906static __inline__ __m256 __DEFAULT_FN_ATTRS256
5907_mm256_mask_permutevar_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256i __C)
5908{
5909 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
5910 (__v8sf)_mm256_permutevar_ps(__A, __C),
5911 (__v8sf)__W);
5912}
5913
5914static __inline__ __m256 __DEFAULT_FN_ATTRS256
5915_mm256_maskz_permutevar_ps(__mmask8 __U, __m256 __A, __m256i __C)
5916{
5917 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
5918 (__v8sf)_mm256_permutevar_ps(__A, __C),
5919 (__v8sf)_mm256_setzero_ps());
5920}
5921
5922static __inline__ __mmask8 __DEFAULT_FN_ATTRS128
5923_mm_test_epi32_mask (__m128i __A, __m128i __B)
5924{
5926}
5927
5928static __inline__ __mmask8 __DEFAULT_FN_ATTRS128
5929_mm_mask_test_epi32_mask (__mmask8 __U, __m128i __A, __m128i __B)
5930{
5931 return _mm_mask_cmpneq_epi32_mask (__U, _mm_and_si128 (__A, __B),
5933}
5934
5935static __inline__ __mmask8 __DEFAULT_FN_ATTRS256
5936_mm256_test_epi32_mask (__m256i __A, __m256i __B)
5937{
5938 return _mm256_cmpneq_epi32_mask (_mm256_and_si256 (__A, __B),
5940}
5941
5942static __inline__ __mmask8 __DEFAULT_FN_ATTRS256
5943_mm256_mask_test_epi32_mask (__mmask8 __U, __m256i __A, __m256i __B)
5944{
5945 return _mm256_mask_cmpneq_epi32_mask (__U, _mm256_and_si256 (__A, __B),
5947}
5948
5949static __inline__ __mmask8 __DEFAULT_FN_ATTRS128
5950_mm_test_epi64_mask (__m128i __A, __m128i __B)
5951{
5953}
5954
5955static __inline__ __mmask8 __DEFAULT_FN_ATTRS128
5956_mm_mask_test_epi64_mask (__mmask8 __U, __m128i __A, __m128i __B)
5957{
5958 return _mm_mask_cmpneq_epi64_mask (__U, _mm_and_si128 (__A, __B),
5960}
5961
5962static __inline__ __mmask8 __DEFAULT_FN_ATTRS256
5963_mm256_test_epi64_mask (__m256i __A, __m256i __B)
5964{
5965 return _mm256_cmpneq_epi64_mask (_mm256_and_si256 (__A, __B),
5967}
5968
5969static __inline__ __mmask8 __DEFAULT_FN_ATTRS256
5970_mm256_mask_test_epi64_mask (__mmask8 __U, __m256i __A, __m256i __B)
5971{
5972 return _mm256_mask_cmpneq_epi64_mask (__U, _mm256_and_si256 (__A, __B),
5974}
5975
5976static __inline__ __mmask8 __DEFAULT_FN_ATTRS128
5977_mm_testn_epi32_mask (__m128i __A, __m128i __B)
5978{
5980}
5981
5982static __inline__ __mmask8 __DEFAULT_FN_ATTRS128
5983_mm_mask_testn_epi32_mask (__mmask8 __U, __m128i __A, __m128i __B)
5984{
5985 return _mm_mask_cmpeq_epi32_mask (__U, _mm_and_si128 (__A, __B),
5987}
5988
5989static __inline__ __mmask8 __DEFAULT_FN_ATTRS256
5990_mm256_testn_epi32_mask (__m256i __A, __m256i __B)
5991{
5992 return _mm256_cmpeq_epi32_mask (_mm256_and_si256 (__A, __B),
5994}
5995
5996static __inline__ __mmask8 __DEFAULT_FN_ATTRS256
5997_mm256_mask_testn_epi32_mask (__mmask8 __U, __m256i __A, __m256i __B)
5998{
5999 return _mm256_mask_cmpeq_epi32_mask (__U, _mm256_and_si256 (__A, __B),
6001}
6002
6003static __inline__ __mmask8 __DEFAULT_FN_ATTRS128
6004_mm_testn_epi64_mask (__m128i __A, __m128i __B)
6005{
6007}
6008
6009static __inline__ __mmask8 __DEFAULT_FN_ATTRS128
6010_mm_mask_testn_epi64_mask (__mmask8 __U, __m128i __A, __m128i __B)
6011{
6012 return _mm_mask_cmpeq_epi64_mask (__U, _mm_and_si128 (__A, __B),
6014}
6015
6016static __inline__ __mmask8 __DEFAULT_FN_ATTRS256
6017_mm256_testn_epi64_mask (__m256i __A, __m256i __B)
6018{
6019 return _mm256_cmpeq_epi64_mask (_mm256_and_si256 (__A, __B),
6021}
6022
6023static __inline__ __mmask8 __DEFAULT_FN_ATTRS256
6024_mm256_mask_testn_epi64_mask (__mmask8 __U, __m256i __A, __m256i __B)
6025{
6026 return _mm256_mask_cmpeq_epi64_mask (__U, _mm256_and_si256 (__A, __B),
6028}
6029
6030static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6031_mm_mask_unpackhi_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
6032 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
6033 (__v4si)_mm_unpackhi_epi32(__A, __B),
6034 (__v4si)__W);
6035}
6036
6037static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6038_mm_maskz_unpackhi_epi32(__mmask8 __U, __m128i __A, __m128i __B) {
6039 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
6040 (__v4si)_mm_unpackhi_epi32(__A, __B),
6041 (__v4si)_mm_setzero_si128());
6042}
6043
6044static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6045_mm256_mask_unpackhi_epi32(__m256i __W, __mmask8 __U, __m256i __A,
6046 __m256i __B) {
6047 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
6048 (__v8si)_mm256_unpackhi_epi32(__A, __B),
6049 (__v8si)__W);
6050}
6051
6052static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6053_mm256_maskz_unpackhi_epi32(__mmask8 __U, __m256i __A, __m256i __B) {
6054 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
6055 (__v8si)_mm256_unpackhi_epi32(__A, __B),
6056 (__v8si)_mm256_setzero_si256());
6057}
6058
6059static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6060_mm_mask_unpackhi_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
6061 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
6062 (__v2di)_mm_unpackhi_epi64(__A, __B),
6063 (__v2di)__W);
6064}
6065
6066static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6067_mm_maskz_unpackhi_epi64(__mmask8 __U, __m128i __A, __m128i __B) {
6068 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
6069 (__v2di)_mm_unpackhi_epi64(__A, __B),
6070 (__v2di)_mm_setzero_si128());
6071}
6072
6073static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6074_mm256_mask_unpackhi_epi64(__m256i __W, __mmask8 __U, __m256i __A,
6075 __m256i __B) {
6076 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
6077 (__v4di)_mm256_unpackhi_epi64(__A, __B),
6078 (__v4di)__W);
6079}
6080
6081static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6082_mm256_maskz_unpackhi_epi64(__mmask8 __U, __m256i __A, __m256i __B) {
6083 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
6084 (__v4di)_mm256_unpackhi_epi64(__A, __B),
6085 (__v4di)_mm256_setzero_si256());
6086}
6087
6088static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6089_mm_mask_unpacklo_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
6090 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
6091 (__v4si)_mm_unpacklo_epi32(__A, __B),
6092 (__v4si)__W);
6093}
6094
6095static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6096_mm_maskz_unpacklo_epi32(__mmask8 __U, __m128i __A, __m128i __B) {
6097 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
6098 (__v4si)_mm_unpacklo_epi32(__A, __B),
6099 (__v4si)_mm_setzero_si128());
6100}
6101
6102static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6103_mm256_mask_unpacklo_epi32(__m256i __W, __mmask8 __U, __m256i __A,
6104 __m256i __B) {
6105 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
6106 (__v8si)_mm256_unpacklo_epi32(__A, __B),
6107 (__v8si)__W);
6108}
6109
6110static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6111_mm256_maskz_unpacklo_epi32(__mmask8 __U, __m256i __A, __m256i __B) {
6112 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
6113 (__v8si)_mm256_unpacklo_epi32(__A, __B),
6114 (__v8si)_mm256_setzero_si256());
6115}
6116
6117static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6118_mm_mask_unpacklo_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
6119 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
6120 (__v2di)_mm_unpacklo_epi64(__A, __B),
6121 (__v2di)__W);
6122}
6123
6124static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6125_mm_maskz_unpacklo_epi64(__mmask8 __U, __m128i __A, __m128i __B) {
6126 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
6127 (__v2di)_mm_unpacklo_epi64(__A, __B),
6128 (__v2di)_mm_setzero_si128());
6129}
6130
6131static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6132_mm256_mask_unpacklo_epi64(__m256i __W, __mmask8 __U, __m256i __A,
6133 __m256i __B) {
6134 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
6135 (__v4di)_mm256_unpacklo_epi64(__A, __B),
6136 (__v4di)__W);
6137}
6138
6139static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6140_mm256_maskz_unpacklo_epi64(__mmask8 __U, __m256i __A, __m256i __B) {
6141 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
6142 (__v4di)_mm256_unpacklo_epi64(__A, __B),
6143 (__v4di)_mm256_setzero_si256());
6144}
6145
6146static __inline__ __m128i __DEFAULT_FN_ATTRS128
6147_mm_mask_sra_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
6148{
6149 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
6150 (__v4si)_mm_sra_epi32(__A, __B),
6151 (__v4si)__W);
6152}
6153
6154static __inline__ __m128i __DEFAULT_FN_ATTRS128
6155_mm_maskz_sra_epi32(__mmask8 __U, __m128i __A, __m128i __B)
6156{
6157 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
6158 (__v4si)_mm_sra_epi32(__A, __B),
6159 (__v4si)_mm_setzero_si128());
6160}
6161
6162static __inline__ __m256i __DEFAULT_FN_ATTRS256
6163_mm256_mask_sra_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B)
6164{
6165 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
6166 (__v8si)_mm256_sra_epi32(__A, __B),
6167 (__v8si)__W);
6168}
6169
6170static __inline__ __m256i __DEFAULT_FN_ATTRS256
6171_mm256_maskz_sra_epi32(__mmask8 __U, __m256i __A, __m128i __B)
6172{
6173 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
6174 (__v8si)_mm256_sra_epi32(__A, __B),
6175 (__v8si)_mm256_setzero_si256());
6176}
6177
6178static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6179_mm_mask_srai_epi32(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B) {
6180 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
6181 (__v4si)_mm_srai_epi32(__A, (int)__B),
6182 (__v4si)__W);
6183}
6184
6185static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6186_mm_maskz_srai_epi32(__mmask8 __U, __m128i __A, unsigned int __B) {
6187 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
6188 (__v4si)_mm_srai_epi32(__A, (int)__B),
6189 (__v4si)_mm_setzero_si128());
6190}
6191
6192static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6193_mm256_mask_srai_epi32(__m256i __W, __mmask8 __U, __m256i __A,
6194 unsigned int __B) {
6195 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
6196 (__v8si)_mm256_srai_epi32(__A, (int)__B),
6197 (__v8si)__W);
6198}
6199
6200static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6201_mm256_maskz_srai_epi32(__mmask8 __U, __m256i __A, unsigned int __B) {
6202 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
6203 (__v8si)_mm256_srai_epi32(__A, (int)__B),
6204 (__v8si)_mm256_setzero_si256());
6205}
6206
6207static __inline__ __m128i __DEFAULT_FN_ATTRS128
6208_mm_sra_epi64(__m128i __A, __m128i __B)
6209{
6210 return (__m128i)__builtin_ia32_psraq128((__v2di)__A, (__v2di)__B);
6211}
6212
6213static __inline__ __m128i __DEFAULT_FN_ATTRS128
6214_mm_mask_sra_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
6215{
6216 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, \
6217 (__v2di)_mm_sra_epi64(__A, __B), \
6218 (__v2di)__W);
6219}
6220
6221static __inline__ __m128i __DEFAULT_FN_ATTRS128
6222_mm_maskz_sra_epi64(__mmask8 __U, __m128i __A, __m128i __B)
6223{
6224 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, \
6225 (__v2di)_mm_sra_epi64(__A, __B), \
6226 (__v2di)_mm_setzero_si128());
6227}
6228
6229static __inline__ __m256i __DEFAULT_FN_ATTRS256
6230_mm256_sra_epi64(__m256i __A, __m128i __B)
6231{
6232 return (__m256i)__builtin_ia32_psraq256((__v4di) __A, (__v2di) __B);
6233}
6234
6235static __inline__ __m256i __DEFAULT_FN_ATTRS256
6236_mm256_mask_sra_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B)
6237{
6238 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, \
6239 (__v4di)_mm256_sra_epi64(__A, __B), \
6240 (__v4di)__W);
6241}
6242
6243static __inline__ __m256i __DEFAULT_FN_ATTRS256
6244_mm256_maskz_sra_epi64(__mmask8 __U, __m256i __A, __m128i __B)
6245{
6246 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, \
6247 (__v4di)_mm256_sra_epi64(__A, __B), \
6248 (__v4di)_mm256_setzero_si256());
6249}
6250
6251static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6252_mm_srai_epi64(__m128i __A, unsigned int __imm) {
6253 return (__m128i)__builtin_ia32_psraqi128((__v2di)__A, (int)__imm);
6254}
6255
6257 __m128i __W, __mmask8 __U, __m128i __A, unsigned int __imm) {
6258 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, \
6259 (__v2di)_mm_srai_epi64(__A, __imm), \
6260 (__v2di)__W);
6261}
6262
6263static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6264_mm_maskz_srai_epi64(__mmask8 __U, __m128i __A, unsigned int __imm) {
6265 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, \
6266 (__v2di)_mm_srai_epi64(__A, __imm), \
6267 (__v2di)_mm_setzero_si128());
6268}
6269
6270static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6271_mm256_srai_epi64(__m256i __A, unsigned int __imm) {
6272 return (__m256i)__builtin_ia32_psraqi256((__v4di)__A, (int)__imm);
6273}
6274
6275static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6276_mm256_mask_srai_epi64(__m256i __W, __mmask8 __U, __m256i __A,
6277 unsigned int __imm) {
6278 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, \
6279 (__v4di)_mm256_srai_epi64(__A, __imm), \
6280 (__v4di)__W);
6281}
6282
6283static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6284_mm256_maskz_srai_epi64(__mmask8 __U, __m256i __A, unsigned int __imm) {
6285 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, \
6286 (__v4di)_mm256_srai_epi64(__A, __imm), \
6287 (__v4di)_mm256_setzero_si256());
6288}
6289
6290#define _mm_ternarylogic_epi32(A, B, C, imm) \
6291 ((__m128i)__builtin_ia32_pternlogd128_mask( \
6292 (__v4si)(__m128i)(A), (__v4si)(__m128i)(B), (__v4si)(__m128i)(C), \
6293 (unsigned char)(imm), (__mmask8)-1))
6294
6295#define _mm_mask_ternarylogic_epi32(A, U, B, C, imm) \
6296 ((__m128i)__builtin_ia32_pternlogd128_mask( \
6297 (__v4si)(__m128i)(A), (__v4si)(__m128i)(B), (__v4si)(__m128i)(C), \
6298 (unsigned char)(imm), (__mmask8)(U)))
6299
6300#define _mm_maskz_ternarylogic_epi32(U, A, B, C, imm) \
6301 ((__m128i)__builtin_ia32_pternlogd128_maskz( \
6302 (__v4si)(__m128i)(A), (__v4si)(__m128i)(B), (__v4si)(__m128i)(C), \
6303 (unsigned char)(imm), (__mmask8)(U)))
6304
6305#define _mm256_ternarylogic_epi32(A, B, C, imm) \
6306 ((__m256i)__builtin_ia32_pternlogd256_mask( \
6307 (__v8si)(__m256i)(A), (__v8si)(__m256i)(B), (__v8si)(__m256i)(C), \
6308 (unsigned char)(imm), (__mmask8)-1))
6309
6310#define _mm256_mask_ternarylogic_epi32(A, U, B, C, imm) \
6311 ((__m256i)__builtin_ia32_pternlogd256_mask( \
6312 (__v8si)(__m256i)(A), (__v8si)(__m256i)(B), (__v8si)(__m256i)(C), \
6313 (unsigned char)(imm), (__mmask8)(U)))
6314
6315#define _mm256_maskz_ternarylogic_epi32(U, A, B, C, imm) \
6316 ((__m256i)__builtin_ia32_pternlogd256_maskz( \
6317 (__v8si)(__m256i)(A), (__v8si)(__m256i)(B), (__v8si)(__m256i)(C), \
6318 (unsigned char)(imm), (__mmask8)(U)))
6319
6320#define _mm_ternarylogic_epi64(A, B, C, imm) \
6321 ((__m128i)__builtin_ia32_pternlogq128_mask( \
6322 (__v2di)(__m128i)(A), (__v2di)(__m128i)(B), (__v2di)(__m128i)(C), \
6323 (unsigned char)(imm), (__mmask8)-1))
6324
6325#define _mm_mask_ternarylogic_epi64(A, U, B, C, imm) \
6326 ((__m128i)__builtin_ia32_pternlogq128_mask( \
6327 (__v2di)(__m128i)(A), (__v2di)(__m128i)(B), (__v2di)(__m128i)(C), \
6328 (unsigned char)(imm), (__mmask8)(U)))
6329
6330#define _mm_maskz_ternarylogic_epi64(U, A, B, C, imm) \
6331 ((__m128i)__builtin_ia32_pternlogq128_maskz( \
6332 (__v2di)(__m128i)(A), (__v2di)(__m128i)(B), (__v2di)(__m128i)(C), \
6333 (unsigned char)(imm), (__mmask8)(U)))
6334
6335#define _mm256_ternarylogic_epi64(A, B, C, imm) \
6336 ((__m256i)__builtin_ia32_pternlogq256_mask( \
6337 (__v4di)(__m256i)(A), (__v4di)(__m256i)(B), (__v4di)(__m256i)(C), \
6338 (unsigned char)(imm), (__mmask8)-1))
6339
6340#define _mm256_mask_ternarylogic_epi64(A, U, B, C, imm) \
6341 ((__m256i)__builtin_ia32_pternlogq256_mask( \
6342 (__v4di)(__m256i)(A), (__v4di)(__m256i)(B), (__v4di)(__m256i)(C), \
6343 (unsigned char)(imm), (__mmask8)(U)))
6344
6345#define _mm256_maskz_ternarylogic_epi64(U, A, B, C, imm) \
6346 ((__m256i)__builtin_ia32_pternlogq256_maskz( \
6347 (__v4di)(__m256i)(A), (__v4di)(__m256i)(B), (__v4di)(__m256i)(C), \
6348 (unsigned char)(imm), (__mmask8)(U)))
6349
6350#define _mm256_shuffle_f32x4(A, B, imm) \
6351 ((__m256)__builtin_ia32_shuf_f32x4_256((__v8sf)(__m256)(A), \
6352 (__v8sf)(__m256)(B), (int)(imm)))
6353
6354#define _mm256_mask_shuffle_f32x4(W, U, A, B, imm) \
6355 ((__m256)__builtin_ia32_selectps_256((__mmask8)(U), \
6356 (__v8sf)_mm256_shuffle_f32x4((A), (B), (imm)), \
6357 (__v8sf)(__m256)(W)))
6358
6359#define _mm256_maskz_shuffle_f32x4(U, A, B, imm) \
6360 ((__m256)__builtin_ia32_selectps_256((__mmask8)(U), \
6361 (__v8sf)_mm256_shuffle_f32x4((A), (B), (imm)), \
6362 (__v8sf)_mm256_setzero_ps()))
6363
6364#define _mm256_shuffle_f64x2(A, B, imm) \
6365 ((__m256d)__builtin_ia32_shuf_f64x2_256((__v4df)(__m256d)(A), \
6366 (__v4df)(__m256d)(B), (int)(imm)))
6367
6368#define _mm256_mask_shuffle_f64x2(W, U, A, B, imm) \
6369 ((__m256d)__builtin_ia32_selectpd_256((__mmask8)(U), \
6370 (__v4df)_mm256_shuffle_f64x2((A), (B), (imm)), \
6371 (__v4df)(__m256d)(W)))
6372
6373#define _mm256_maskz_shuffle_f64x2(U, A, B, imm) \
6374 ((__m256d)__builtin_ia32_selectpd_256((__mmask8)(U), \
6375 (__v4df)_mm256_shuffle_f64x2((A), (B), (imm)), \
6376 (__v4df)_mm256_setzero_pd()))
6377
6378#define _mm256_shuffle_i32x4(A, B, imm) \
6379 ((__m256i)__builtin_ia32_shuf_i32x4_256((__v8si)(__m256i)(A), \
6380 (__v8si)(__m256i)(B), (int)(imm)))
6381
6382#define _mm256_mask_shuffle_i32x4(W, U, A, B, imm) \
6383 ((__m256i)__builtin_ia32_selectd_256((__mmask8)(U), \
6384 (__v8si)_mm256_shuffle_i32x4((A), (B), (imm)), \
6385 (__v8si)(__m256i)(W)))
6386
6387#define _mm256_maskz_shuffle_i32x4(U, A, B, imm) \
6388 ((__m256i)__builtin_ia32_selectd_256((__mmask8)(U), \
6389 (__v8si)_mm256_shuffle_i32x4((A), (B), (imm)), \
6390 (__v8si)_mm256_setzero_si256()))
6391
6392#define _mm256_shuffle_i64x2(A, B, imm) \
6393 ((__m256i)__builtin_ia32_shuf_i64x2_256((__v4di)(__m256i)(A), \
6394 (__v4di)(__m256i)(B), (int)(imm)))
6395
6396#define _mm256_mask_shuffle_i64x2(W, U, A, B, imm) \
6397 ((__m256i)__builtin_ia32_selectq_256((__mmask8)(U), \
6398 (__v4di)_mm256_shuffle_i64x2((A), (B), (imm)), \
6399 (__v4di)(__m256i)(W)))
6400
6401
6402#define _mm256_maskz_shuffle_i64x2(U, A, B, imm) \
6403 ((__m256i)__builtin_ia32_selectq_256((__mmask8)(U), \
6404 (__v4di)_mm256_shuffle_i64x2((A), (B), (imm)), \
6405 (__v4di)_mm256_setzero_si256()))
6406
6407#define _mm_mask_shuffle_pd(W, U, A, B, M) \
6408 ((__m128d)__builtin_ia32_selectpd_128((__mmask8)(U), \
6409 (__v2df)_mm_shuffle_pd((A), (B), (M)), \
6410 (__v2df)(__m128d)(W)))
6411
6412#define _mm_maskz_shuffle_pd(U, A, B, M) \
6413 ((__m128d)__builtin_ia32_selectpd_128((__mmask8)(U), \
6414 (__v2df)_mm_shuffle_pd((A), (B), (M)), \
6415 (__v2df)_mm_setzero_pd()))
6416
6417#define _mm256_mask_shuffle_pd(W, U, A, B, M) \
6418 ((__m256d)__builtin_ia32_selectpd_256((__mmask8)(U), \
6419 (__v4df)_mm256_shuffle_pd((A), (B), (M)), \
6420 (__v4df)(__m256d)(W)))
6421
6422#define _mm256_maskz_shuffle_pd(U, A, B, M) \
6423 ((__m256d)__builtin_ia32_selectpd_256((__mmask8)(U), \
6424 (__v4df)_mm256_shuffle_pd((A), (B), (M)), \
6425 (__v4df)_mm256_setzero_pd()))
6426
6427#define _mm_mask_shuffle_ps(W, U, A, B, M) \
6428 ((__m128)__builtin_ia32_selectps_128((__mmask8)(U), \
6429 (__v4sf)_mm_shuffle_ps((A), (B), (M)), \
6430 (__v4sf)(__m128)(W)))
6431
6432#define _mm_maskz_shuffle_ps(U, A, B, M) \
6433 ((__m128)__builtin_ia32_selectps_128((__mmask8)(U), \
6434 (__v4sf)_mm_shuffle_ps((A), (B), (M)), \
6435 (__v4sf)_mm_setzero_ps()))
6436
6437#define _mm256_mask_shuffle_ps(W, U, A, B, M) \
6438 ((__m256)__builtin_ia32_selectps_256((__mmask8)(U), \
6439 (__v8sf)_mm256_shuffle_ps((A), (B), (M)), \
6440 (__v8sf)(__m256)(W)))
6441
6442#define _mm256_maskz_shuffle_ps(U, A, B, M) \
6443 ((__m256)__builtin_ia32_selectps_256((__mmask8)(U), \
6444 (__v8sf)_mm256_shuffle_ps((A), (B), (M)), \
6445 (__v8sf)_mm256_setzero_ps()))
6446
6447static __inline__ __m128d __DEFAULT_FN_ATTRS128
6448_mm_rsqrt14_pd (__m128d __A)
6449{
6450 return (__m128d) __builtin_ia32_rsqrt14pd128_mask ((__v2df) __A,
6451 (__v2df)
6452 _mm_setzero_pd (),
6453 (__mmask8) -1);
6454}
6455
6456static __inline__ __m128d __DEFAULT_FN_ATTRS128
6457_mm_mask_rsqrt14_pd (__m128d __W, __mmask8 __U, __m128d __A)
6458{
6459 return (__m128d) __builtin_ia32_rsqrt14pd128_mask ((__v2df) __A,
6460 (__v2df) __W,
6461 (__mmask8) __U);
6462}
6463
6464static __inline__ __m128d __DEFAULT_FN_ATTRS128
6466{
6467 return (__m128d) __builtin_ia32_rsqrt14pd128_mask ((__v2df) __A,
6468 (__v2df)
6469 _mm_setzero_pd (),
6470 (__mmask8) __U);
6471}
6472
6473static __inline__ __m256d __DEFAULT_FN_ATTRS256
6475{
6476 return (__m256d) __builtin_ia32_rsqrt14pd256_mask ((__v4df) __A,
6477 (__v4df)
6479 (__mmask8) -1);
6480}
6481
6482static __inline__ __m256d __DEFAULT_FN_ATTRS256
6483_mm256_mask_rsqrt14_pd (__m256d __W, __mmask8 __U, __m256d __A)
6484{
6485 return (__m256d) __builtin_ia32_rsqrt14pd256_mask ((__v4df) __A,
6486 (__v4df) __W,
6487 (__mmask8) __U);
6488}
6489
6490static __inline__ __m256d __DEFAULT_FN_ATTRS256
6492{
6493 return (__m256d) __builtin_ia32_rsqrt14pd256_mask ((__v4df) __A,
6494 (__v4df)
6496 (__mmask8) __U);
6497}
6498
6499static __inline__ __m128 __DEFAULT_FN_ATTRS128
6500_mm_rsqrt14_ps (__m128 __A)
6501{
6502 return (__m128) __builtin_ia32_rsqrt14ps128_mask ((__v4sf) __A,
6503 (__v4sf)
6504 _mm_setzero_ps (),
6505 (__mmask8) -1);
6506}
6507
6508static __inline__ __m128 __DEFAULT_FN_ATTRS128
6509_mm_mask_rsqrt14_ps (__m128 __W, __mmask8 __U, __m128 __A)
6510{
6511 return (__m128) __builtin_ia32_rsqrt14ps128_mask ((__v4sf) __A,
6512 (__v4sf) __W,
6513 (__mmask8) __U);
6514}
6515
6516static __inline__ __m128 __DEFAULT_FN_ATTRS128
6518{
6519 return (__m128) __builtin_ia32_rsqrt14ps128_mask ((__v4sf) __A,
6520 (__v4sf)
6521 _mm_setzero_ps (),
6522 (__mmask8) __U);
6523}
6524
6525static __inline__ __m256 __DEFAULT_FN_ATTRS256
6527{
6528 return (__m256) __builtin_ia32_rsqrt14ps256_mask ((__v8sf) __A,
6529 (__v8sf)
6531 (__mmask8) -1);
6532}
6533
6534static __inline__ __m256 __DEFAULT_FN_ATTRS256
6535_mm256_mask_rsqrt14_ps (__m256 __W, __mmask8 __U, __m256 __A)
6536{
6537 return (__m256) __builtin_ia32_rsqrt14ps256_mask ((__v8sf) __A,
6538 (__v8sf) __W,
6539 (__mmask8) __U);
6540}
6541
6542static __inline__ __m256 __DEFAULT_FN_ATTRS256
6544{
6545 return (__m256) __builtin_ia32_rsqrt14ps256_mask ((__v8sf) __A,
6546 (__v8sf)
6548 (__mmask8) __U);
6549}
6550
6551static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
6553 return (__m256)__builtin_shufflevector((__v4sf)__A, (__v4sf)__A,
6554 0, 1, 2, 3, 0, 1, 2, 3);
6555}
6556
6557static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
6558_mm256_mask_broadcast_f32x4(__m256 __O, __mmask8 __M, __m128 __A) {
6559 return (__m256)__builtin_ia32_selectps_256((__mmask8)__M,
6560 (__v8sf)_mm256_broadcast_f32x4(__A),
6561 (__v8sf)__O);
6562}
6563
6564static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
6566 return (__m256)__builtin_ia32_selectps_256((__mmask8)__M,
6567 (__v8sf)_mm256_broadcast_f32x4(__A),
6568 (__v8sf)_mm256_setzero_ps());
6569}
6570
6571static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6573 return (__m256i)__builtin_shufflevector((__v4si)__A, (__v4si)__A,
6574 0, 1, 2, 3, 0, 1, 2, 3);
6575}
6576
6577static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6578_mm256_mask_broadcast_i32x4(__m256i __O, __mmask8 __M, __m128i __A) {
6579 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
6580 (__v8si)_mm256_broadcast_i32x4(__A),
6581 (__v8si)__O);
6582}
6583
6584static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6586 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
6587 (__v8si)_mm256_broadcast_i32x4(__A),
6588 (__v8si)_mm256_setzero_si256());
6589}
6590
6591static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
6592_mm256_mask_broadcastsd_pd(__m256d __O, __mmask8 __M, __m128d __A) {
6593 return (__m256d)__builtin_ia32_selectpd_256(__M,
6594 (__v4df) _mm256_broadcastsd_pd(__A),
6595 (__v4df) __O);
6596}
6597
6598static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
6600 return (__m256d)__builtin_ia32_selectpd_256(__M,
6601 (__v4df) _mm256_broadcastsd_pd(__A),
6602 (__v4df) _mm256_setzero_pd());
6603}
6604
6605static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
6606_mm_mask_broadcastss_ps(__m128 __O, __mmask8 __M, __m128 __A) {
6607 return (__m128)__builtin_ia32_selectps_128(__M,
6608 (__v4sf) _mm_broadcastss_ps(__A),
6609 (__v4sf) __O);
6610}
6611
6612static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
6614 return (__m128)__builtin_ia32_selectps_128(__M,
6615 (__v4sf) _mm_broadcastss_ps(__A),
6616 (__v4sf) _mm_setzero_ps());
6617}
6618
6619static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
6620_mm256_mask_broadcastss_ps(__m256 __O, __mmask8 __M, __m128 __A) {
6621 return (__m256)__builtin_ia32_selectps_256(__M,
6622 (__v8sf) _mm256_broadcastss_ps(__A),
6623 (__v8sf) __O);
6624}
6625
6626static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
6628 return (__m256)__builtin_ia32_selectps_256(__M,
6629 (__v8sf) _mm256_broadcastss_ps(__A),
6630 (__v8sf) _mm256_setzero_ps());
6631}
6632
6633static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6634_mm_mask_broadcastd_epi32(__m128i __O, __mmask8 __M, __m128i __A) {
6635 return (__m128i)__builtin_ia32_selectd_128(__M,
6636 (__v4si) _mm_broadcastd_epi32(__A),
6637 (__v4si) __O);
6638}
6639
6640static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6642 return (__m128i)__builtin_ia32_selectd_128(__M,
6643 (__v4si) _mm_broadcastd_epi32(__A),
6644 (__v4si) _mm_setzero_si128());
6645}
6646
6647static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6648_mm256_mask_broadcastd_epi32(__m256i __O, __mmask8 __M, __m128i __A) {
6649 return (__m256i)__builtin_ia32_selectd_256(__M,
6650 (__v8si) _mm256_broadcastd_epi32(__A),
6651 (__v8si) __O);
6652}
6653
6654static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6656 return (__m256i)__builtin_ia32_selectd_256(__M,
6657 (__v8si) _mm256_broadcastd_epi32(__A),
6658 (__v8si) _mm256_setzero_si256());
6659}
6660
6661static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6662_mm_mask_broadcastq_epi64(__m128i __O, __mmask8 __M, __m128i __A) {
6663 return (__m128i)__builtin_ia32_selectq_128(__M,
6664 (__v2di) _mm_broadcastq_epi64(__A),
6665 (__v2di) __O);
6666}
6667
6668static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6670 return (__m128i)__builtin_ia32_selectq_128(__M,
6671 (__v2di) _mm_broadcastq_epi64(__A),
6672 (__v2di) _mm_setzero_si128());
6673}
6674
6675static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6676_mm256_mask_broadcastq_epi64(__m256i __O, __mmask8 __M, __m128i __A) {
6677 return (__m256i)__builtin_ia32_selectq_256(__M,
6678 (__v4di) _mm256_broadcastq_epi64(__A),
6679 (__v4di) __O);
6680}
6681
6682static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6684 return (__m256i)__builtin_ia32_selectq_256(__M,
6685 (__v4di) _mm256_broadcastq_epi64(__A),
6686 (__v4di) _mm256_setzero_si256());
6687}
6688
6689static __inline__ __m128i __DEFAULT_FN_ATTRS128
6691{
6692 return (__m128i) __builtin_ia32_pmovsdb128_mask ((__v4si) __A,
6693 (__v16qi)_mm_undefined_si128(),
6694 (__mmask8) -1);
6695}
6696
6697static __inline__ __m128i __DEFAULT_FN_ATTRS128
6698_mm_mask_cvtsepi32_epi8 (__m128i __O, __mmask8 __M, __m128i __A)
6699{
6700 return (__m128i) __builtin_ia32_pmovsdb128_mask ((__v4si) __A,
6701 (__v16qi) __O, __M);
6702}
6703
6704static __inline__ __m128i __DEFAULT_FN_ATTRS128
6706{
6707 return (__m128i) __builtin_ia32_pmovsdb128_mask ((__v4si) __A,
6708 (__v16qi) _mm_setzero_si128 (),
6709 __M);
6710}
6711
6712static __inline__ void __DEFAULT_FN_ATTRS128
6714{
6715 __builtin_ia32_pmovsdb128mem_mask ((__v16qi *) __P, (__v4si) __A, __M);
6716}
6717
6718static __inline__ __m128i __DEFAULT_FN_ATTRS256
6720{
6721 return (__m128i) __builtin_ia32_pmovsdb256_mask ((__v8si) __A,
6722 (__v16qi)_mm_undefined_si128(),
6723 (__mmask8) -1);
6724}
6725
6726static __inline__ __m128i __DEFAULT_FN_ATTRS256
6727_mm256_mask_cvtsepi32_epi8 (__m128i __O, __mmask8 __M, __m256i __A)
6728{
6729 return (__m128i) __builtin_ia32_pmovsdb256_mask ((__v8si) __A,
6730 (__v16qi) __O, __M);
6731}
6732
6733static __inline__ __m128i __DEFAULT_FN_ATTRS256
6735{
6736 return (__m128i) __builtin_ia32_pmovsdb256_mask ((__v8si) __A,
6737 (__v16qi) _mm_setzero_si128 (),
6738 __M);
6739}
6740
6741static __inline__ void __DEFAULT_FN_ATTRS256
6743{
6744 __builtin_ia32_pmovsdb256mem_mask ((__v16qi *) __P, (__v8si) __A, __M);
6745}
6746
6747static __inline__ __m128i __DEFAULT_FN_ATTRS128
6749{
6750 return (__m128i) __builtin_ia32_pmovsdw128_mask ((__v4si) __A,
6751 (__v8hi)_mm_setzero_si128 (),
6752 (__mmask8) -1);
6753}
6754
6755static __inline__ __m128i __DEFAULT_FN_ATTRS128
6756_mm_mask_cvtsepi32_epi16 (__m128i __O, __mmask8 __M, __m128i __A)
6757{
6758 return (__m128i) __builtin_ia32_pmovsdw128_mask ((__v4si) __A,
6759 (__v8hi)__O,
6760 __M);
6761}
6762
6763static __inline__ __m128i __DEFAULT_FN_ATTRS128
6765{
6766 return (__m128i) __builtin_ia32_pmovsdw128_mask ((__v4si) __A,
6767 (__v8hi) _mm_setzero_si128 (),
6768 __M);
6769}
6770
6771static __inline__ void __DEFAULT_FN_ATTRS128
6773{
6774 __builtin_ia32_pmovsdw128mem_mask ((__v8hi *) __P, (__v4si) __A, __M);
6775}
6776
6777static __inline__ __m128i __DEFAULT_FN_ATTRS256
6779{
6780 return (__m128i) __builtin_ia32_pmovsdw256_mask ((__v8si) __A,
6781 (__v8hi)_mm_undefined_si128(),
6782 (__mmask8) -1);
6783}
6784
6785static __inline__ __m128i __DEFAULT_FN_ATTRS256
6786_mm256_mask_cvtsepi32_epi16 (__m128i __O, __mmask8 __M, __m256i __A)
6787{
6788 return (__m128i) __builtin_ia32_pmovsdw256_mask ((__v8si) __A,
6789 (__v8hi) __O, __M);
6790}
6791
6792static __inline__ __m128i __DEFAULT_FN_ATTRS256
6794{
6795 return (__m128i) __builtin_ia32_pmovsdw256_mask ((__v8si) __A,
6796 (__v8hi) _mm_setzero_si128 (),
6797 __M);
6798}
6799
6800static __inline__ void __DEFAULT_FN_ATTRS256
6802{
6803 __builtin_ia32_pmovsdw256mem_mask ((__v8hi *) __P, (__v8si) __A, __M);
6804}
6805
6806static __inline__ __m128i __DEFAULT_FN_ATTRS128
6808{
6809 return (__m128i) __builtin_ia32_pmovsqb128_mask ((__v2di) __A,
6810 (__v16qi)_mm_undefined_si128(),
6811 (__mmask8) -1);
6812}
6813
6814static __inline__ __m128i __DEFAULT_FN_ATTRS128
6815_mm_mask_cvtsepi64_epi8 (__m128i __O, __mmask8 __M, __m128i __A)
6816{
6817 return (__m128i) __builtin_ia32_pmovsqb128_mask ((__v2di) __A,
6818 (__v16qi) __O, __M);
6819}
6820
6821static __inline__ __m128i __DEFAULT_FN_ATTRS128
6823{
6824 return (__m128i) __builtin_ia32_pmovsqb128_mask ((__v2di) __A,
6825 (__v16qi) _mm_setzero_si128 (),
6826 __M);
6827}
6828
6829static __inline__ void __DEFAULT_FN_ATTRS128
6831{
6832 __builtin_ia32_pmovsqb128mem_mask ((__v16qi *) __P, (__v2di) __A, __M);
6833}
6834
6835static __inline__ __m128i __DEFAULT_FN_ATTRS256
6837{
6838 return (__m128i) __builtin_ia32_pmovsqb256_mask ((__v4di) __A,
6839 (__v16qi)_mm_undefined_si128(),
6840 (__mmask8) -1);
6841}
6842
6843static __inline__ __m128i __DEFAULT_FN_ATTRS256
6844_mm256_mask_cvtsepi64_epi8 (__m128i __O, __mmask8 __M, __m256i __A)
6845{
6846 return (__m128i) __builtin_ia32_pmovsqb256_mask ((__v4di) __A,
6847 (__v16qi) __O, __M);
6848}
6849
6850static __inline__ __m128i __DEFAULT_FN_ATTRS256
6852{
6853 return (__m128i) __builtin_ia32_pmovsqb256_mask ((__v4di) __A,
6854 (__v16qi) _mm_setzero_si128 (),
6855 __M);
6856}
6857
6858static __inline__ void __DEFAULT_FN_ATTRS256
6860{
6861 __builtin_ia32_pmovsqb256mem_mask ((__v16qi *) __P, (__v4di) __A, __M);
6862}
6863
6864static __inline__ __m128i __DEFAULT_FN_ATTRS128
6866{
6867 return (__m128i) __builtin_ia32_pmovsqd128_mask ((__v2di) __A,
6868 (__v4si)_mm_undefined_si128(),
6869 (__mmask8) -1);
6870}
6871
6872static __inline__ __m128i __DEFAULT_FN_ATTRS128
6873_mm_mask_cvtsepi64_epi32 (__m128i __O, __mmask8 __M, __m128i __A)
6874{
6875 return (__m128i) __builtin_ia32_pmovsqd128_mask ((__v2di) __A,
6876 (__v4si) __O, __M);
6877}
6878
6879static __inline__ __m128i __DEFAULT_FN_ATTRS128
6881{
6882 return (__m128i) __builtin_ia32_pmovsqd128_mask ((__v2di) __A,
6883 (__v4si) _mm_setzero_si128 (),
6884 __M);
6885}
6886
6887static __inline__ void __DEFAULT_FN_ATTRS128
6889{
6890 __builtin_ia32_pmovsqd128mem_mask ((__v4si *) __P, (__v2di) __A, __M);
6891}
6892
6893static __inline__ __m128i __DEFAULT_FN_ATTRS256
6895{
6896 return (__m128i) __builtin_ia32_pmovsqd256_mask ((__v4di) __A,
6897 (__v4si)_mm_undefined_si128(),
6898 (__mmask8) -1);
6899}
6900
6901static __inline__ __m128i __DEFAULT_FN_ATTRS256
6902_mm256_mask_cvtsepi64_epi32 (__m128i __O, __mmask8 __M, __m256i __A)
6903{
6904 return (__m128i) __builtin_ia32_pmovsqd256_mask ((__v4di) __A,
6905 (__v4si)__O,
6906 __M);
6907}
6908
6909static __inline__ __m128i __DEFAULT_FN_ATTRS256
6911{
6912 return (__m128i) __builtin_ia32_pmovsqd256_mask ((__v4di) __A,
6913 (__v4si) _mm_setzero_si128 (),
6914 __M);
6915}
6916
6917static __inline__ void __DEFAULT_FN_ATTRS256
6919{
6920 __builtin_ia32_pmovsqd256mem_mask ((__v4si *) __P, (__v4di) __A, __M);
6921}
6922
6923static __inline__ __m128i __DEFAULT_FN_ATTRS128
6925{
6926 return (__m128i) __builtin_ia32_pmovsqw128_mask ((__v2di) __A,
6927 (__v8hi)_mm_undefined_si128(),
6928 (__mmask8) -1);
6929}
6930
6931static __inline__ __m128i __DEFAULT_FN_ATTRS128
6932_mm_mask_cvtsepi64_epi16 (__m128i __O, __mmask8 __M, __m128i __A)
6933{
6934 return (__m128i) __builtin_ia32_pmovsqw128_mask ((__v2di) __A,
6935 (__v8hi) __O, __M);
6936}
6937
6938static __inline__ __m128i __DEFAULT_FN_ATTRS128
6940{
6941 return (__m128i) __builtin_ia32_pmovsqw128_mask ((__v2di) __A,
6942 (__v8hi) _mm_setzero_si128 (),
6943 __M);
6944}
6945
6946static __inline__ void __DEFAULT_FN_ATTRS128
6948{
6949 __builtin_ia32_pmovsqw128mem_mask ((__v8hi *) __P, (__v2di) __A, __M);
6950}
6951
6952static __inline__ __m128i __DEFAULT_FN_ATTRS256
6954{
6955 return (__m128i) __builtin_ia32_pmovsqw256_mask ((__v4di) __A,
6956 (__v8hi)_mm_undefined_si128(),
6957 (__mmask8) -1);
6958}
6959
6960static __inline__ __m128i __DEFAULT_FN_ATTRS256
6961_mm256_mask_cvtsepi64_epi16 (__m128i __O, __mmask8 __M, __m256i __A)
6962{
6963 return (__m128i) __builtin_ia32_pmovsqw256_mask ((__v4di) __A,
6964 (__v8hi) __O, __M);
6965}
6966
6967static __inline__ __m128i __DEFAULT_FN_ATTRS256
6969{
6970 return (__m128i) __builtin_ia32_pmovsqw256_mask ((__v4di) __A,
6971 (__v8hi) _mm_setzero_si128 (),
6972 __M);
6973}
6974
6975static __inline__ void __DEFAULT_FN_ATTRS256
6977{
6978 __builtin_ia32_pmovsqw256mem_mask ((__v8hi *) __P, (__v4di) __A, __M);
6979}
6980
6981static __inline__ __m128i __DEFAULT_FN_ATTRS128
6983{
6984 return (__m128i) __builtin_ia32_pmovusdb128_mask ((__v4si) __A,
6985 (__v16qi)_mm_undefined_si128(),
6986 (__mmask8) -1);
6987}
6988
6989static __inline__ __m128i __DEFAULT_FN_ATTRS128
6990_mm_mask_cvtusepi32_epi8 (__m128i __O, __mmask8 __M, __m128i __A)
6991{
6992 return (__m128i) __builtin_ia32_pmovusdb128_mask ((__v4si) __A,
6993 (__v16qi) __O,
6994 __M);
6995}
6996
6997static __inline__ __m128i __DEFAULT_FN_ATTRS128
6999{
7000 return (__m128i) __builtin_ia32_pmovusdb128_mask ((__v4si) __A,
7001 (__v16qi) _mm_setzero_si128 (),
7002 __M);
7003}
7004
7005static __inline__ void __DEFAULT_FN_ATTRS128
7007{
7008 __builtin_ia32_pmovusdb128mem_mask ((__v16qi *) __P, (__v4si) __A, __M);
7009}
7010
7011static __inline__ __m128i __DEFAULT_FN_ATTRS256
7013{
7014 return (__m128i) __builtin_ia32_pmovusdb256_mask ((__v8si) __A,
7015 (__v16qi)_mm_undefined_si128(),
7016 (__mmask8) -1);
7017}
7018
7019static __inline__ __m128i __DEFAULT_FN_ATTRS256
7020_mm256_mask_cvtusepi32_epi8 (__m128i __O, __mmask8 __M, __m256i __A)
7021{
7022 return (__m128i) __builtin_ia32_pmovusdb256_mask ((__v8si) __A,
7023 (__v16qi) __O,
7024 __M);
7025}
7026
7027static __inline__ __m128i __DEFAULT_FN_ATTRS256
7029{
7030 return (__m128i) __builtin_ia32_pmovusdb256_mask ((__v8si) __A,
7031 (__v16qi) _mm_setzero_si128 (),
7032 __M);
7033}
7034
7035static __inline__ void __DEFAULT_FN_ATTRS256
7037{
7038 __builtin_ia32_pmovusdb256mem_mask ((__v16qi*) __P, (__v8si) __A, __M);
7039}
7040
7041static __inline__ __m128i __DEFAULT_FN_ATTRS128
7043{
7044 return (__m128i) __builtin_ia32_pmovusdw128_mask ((__v4si) __A,
7045 (__v8hi)_mm_undefined_si128(),
7046 (__mmask8) -1);
7047}
7048
7049static __inline__ __m128i __DEFAULT_FN_ATTRS128
7050_mm_mask_cvtusepi32_epi16 (__m128i __O, __mmask8 __M, __m128i __A)
7051{
7052 return (__m128i) __builtin_ia32_pmovusdw128_mask ((__v4si) __A,
7053 (__v8hi) __O, __M);
7054}
7055
7056static __inline__ __m128i __DEFAULT_FN_ATTRS128
7058{
7059 return (__m128i) __builtin_ia32_pmovusdw128_mask ((__v4si) __A,
7060 (__v8hi) _mm_setzero_si128 (),
7061 __M);
7062}
7063
7064static __inline__ void __DEFAULT_FN_ATTRS128
7066{
7067 __builtin_ia32_pmovusdw128mem_mask ((__v8hi *) __P, (__v4si) __A, __M);
7068}
7069
7070static __inline__ __m128i __DEFAULT_FN_ATTRS256
7072{
7073 return (__m128i) __builtin_ia32_pmovusdw256_mask ((__v8si) __A,
7074 (__v8hi) _mm_undefined_si128(),
7075 (__mmask8) -1);
7076}
7077
7078static __inline__ __m128i __DEFAULT_FN_ATTRS256
7079_mm256_mask_cvtusepi32_epi16 (__m128i __O, __mmask8 __M, __m256i __A)
7080{
7081 return (__m128i) __builtin_ia32_pmovusdw256_mask ((__v8si) __A,
7082 (__v8hi) __O, __M);
7083}
7084
7085static __inline__ __m128i __DEFAULT_FN_ATTRS256
7087{
7088 return (__m128i) __builtin_ia32_pmovusdw256_mask ((__v8si) __A,
7089 (__v8hi) _mm_setzero_si128 (),
7090 __M);
7091}
7092
7093static __inline__ void __DEFAULT_FN_ATTRS256
7095{
7096 __builtin_ia32_pmovusdw256mem_mask ((__v8hi *) __P, (__v8si) __A, __M);
7097}
7098
7099static __inline__ __m128i __DEFAULT_FN_ATTRS128
7101{
7102 return (__m128i) __builtin_ia32_pmovusqb128_mask ((__v2di) __A,
7103 (__v16qi)_mm_undefined_si128(),
7104 (__mmask8) -1);
7105}
7106
7107static __inline__ __m128i __DEFAULT_FN_ATTRS128
7108_mm_mask_cvtusepi64_epi8 (__m128i __O, __mmask8 __M, __m128i __A)
7109{
7110 return (__m128i) __builtin_ia32_pmovusqb128_mask ((__v2di) __A,
7111 (__v16qi) __O,
7112 __M);
7113}
7114
7115static __inline__ __m128i __DEFAULT_FN_ATTRS128
7117{
7118 return (__m128i) __builtin_ia32_pmovusqb128_mask ((__v2di) __A,
7119 (__v16qi) _mm_setzero_si128 (),
7120 __M);
7121}
7122
7123static __inline__ void __DEFAULT_FN_ATTRS128
7125{
7126 __builtin_ia32_pmovusqb128mem_mask ((__v16qi *) __P, (__v2di) __A, __M);
7127}
7128
7129static __inline__ __m128i __DEFAULT_FN_ATTRS256
7131{
7132 return (__m128i) __builtin_ia32_pmovusqb256_mask ((__v4di) __A,
7133 (__v16qi)_mm_undefined_si128(),
7134 (__mmask8) -1);
7135}
7136
7137static __inline__ __m128i __DEFAULT_FN_ATTRS256
7138_mm256_mask_cvtusepi64_epi8 (__m128i __O, __mmask8 __M, __m256i __A)
7139{
7140 return (__m128i) __builtin_ia32_pmovusqb256_mask ((__v4di) __A,
7141 (__v16qi) __O,
7142 __M);
7143}
7144
7145static __inline__ __m128i __DEFAULT_FN_ATTRS256
7147{
7148 return (__m128i) __builtin_ia32_pmovusqb256_mask ((__v4di) __A,
7149 (__v16qi) _mm_setzero_si128 (),
7150 __M);
7151}
7152
7153static __inline__ void __DEFAULT_FN_ATTRS256
7155{
7156 __builtin_ia32_pmovusqb256mem_mask ((__v16qi *) __P, (__v4di) __A, __M);
7157}
7158
7159static __inline__ __m128i __DEFAULT_FN_ATTRS128
7161{
7162 return (__m128i) __builtin_ia32_pmovusqd128_mask ((__v2di) __A,
7163 (__v4si)_mm_undefined_si128(),
7164 (__mmask8) -1);
7165}
7166
7167static __inline__ __m128i __DEFAULT_FN_ATTRS128
7168_mm_mask_cvtusepi64_epi32 (__m128i __O, __mmask8 __M, __m128i __A)
7169{
7170 return (__m128i) __builtin_ia32_pmovusqd128_mask ((__v2di) __A,
7171 (__v4si) __O, __M);
7172}
7173
7174static __inline__ __m128i __DEFAULT_FN_ATTRS128
7176{
7177 return (__m128i) __builtin_ia32_pmovusqd128_mask ((__v2di) __A,
7178 (__v4si) _mm_setzero_si128 (),
7179 __M);
7180}
7181
7182static __inline__ void __DEFAULT_FN_ATTRS128
7184{
7185 __builtin_ia32_pmovusqd128mem_mask ((__v4si *) __P, (__v2di) __A, __M);
7186}
7187
7188static __inline__ __m128i __DEFAULT_FN_ATTRS256
7190{
7191 return (__m128i) __builtin_ia32_pmovusqd256_mask ((__v4di) __A,
7192 (__v4si)_mm_undefined_si128(),
7193 (__mmask8) -1);
7194}
7195
7196static __inline__ __m128i __DEFAULT_FN_ATTRS256
7197_mm256_mask_cvtusepi64_epi32 (__m128i __O, __mmask8 __M, __m256i __A)
7198{
7199 return (__m128i) __builtin_ia32_pmovusqd256_mask ((__v4di) __A,
7200 (__v4si) __O, __M);
7201}
7202
7203static __inline__ __m128i __DEFAULT_FN_ATTRS256
7205{
7206 return (__m128i) __builtin_ia32_pmovusqd256_mask ((__v4di) __A,
7207 (__v4si) _mm_setzero_si128 (),
7208 __M);
7209}
7210
7211static __inline__ void __DEFAULT_FN_ATTRS256
7213{
7214 __builtin_ia32_pmovusqd256mem_mask ((__v4si *) __P, (__v4di) __A, __M);
7215}
7216
7217static __inline__ __m128i __DEFAULT_FN_ATTRS128
7219{
7220 return (__m128i) __builtin_ia32_pmovusqw128_mask ((__v2di) __A,
7221 (__v8hi)_mm_undefined_si128(),
7222 (__mmask8) -1);
7223}
7224
7225static __inline__ __m128i __DEFAULT_FN_ATTRS128
7226_mm_mask_cvtusepi64_epi16 (__m128i __O, __mmask8 __M, __m128i __A)
7227{
7228 return (__m128i) __builtin_ia32_pmovusqw128_mask ((__v2di) __A,
7229 (__v8hi) __O, __M);
7230}
7231
7232static __inline__ __m128i __DEFAULT_FN_ATTRS128
7234{
7235 return (__m128i) __builtin_ia32_pmovusqw128_mask ((__v2di) __A,
7236 (__v8hi) _mm_setzero_si128 (),
7237 __M);
7238}
7239
7240static __inline__ void __DEFAULT_FN_ATTRS128
7242{
7243 __builtin_ia32_pmovusqw128mem_mask ((__v8hi *) __P, (__v2di) __A, __M);
7244}
7245
7246static __inline__ __m128i __DEFAULT_FN_ATTRS256
7248{
7249 return (__m128i) __builtin_ia32_pmovusqw256_mask ((__v4di) __A,
7250 (__v8hi)_mm_undefined_si128(),
7251 (__mmask8) -1);
7252}
7253
7254static __inline__ __m128i __DEFAULT_FN_ATTRS256
7255_mm256_mask_cvtusepi64_epi16 (__m128i __O, __mmask8 __M, __m256i __A)
7256{
7257 return (__m128i) __builtin_ia32_pmovusqw256_mask ((__v4di) __A,
7258 (__v8hi) __O, __M);
7259}
7260
7261static __inline__ __m128i __DEFAULT_FN_ATTRS256
7263{
7264 return (__m128i) __builtin_ia32_pmovusqw256_mask ((__v4di) __A,
7265 (__v8hi) _mm_setzero_si128 (),
7266 __M);
7267}
7268
7269static __inline__ void __DEFAULT_FN_ATTRS256
7271{
7272 __builtin_ia32_pmovusqw256mem_mask ((__v8hi *) __P, (__v4di) __A, __M);
7273}
7274
7275static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
7276_mm_cvtepi32_epi8(__m128i __A) {
7277 return (__m128i)__builtin_shufflevector(
7278 __builtin_convertvector((__v4si)__A, __v4qi), (__v4qi){0, 0, 0, 0}, 0, 1,
7279 2, 3, 4, 5, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7);
7280}
7281
7282static __inline__ __m128i __DEFAULT_FN_ATTRS128
7283_mm_mask_cvtepi32_epi8 (__m128i __O, __mmask8 __M, __m128i __A)
7284{
7285 return (__m128i) __builtin_ia32_pmovdb128_mask ((__v4si) __A,
7286 (__v16qi) __O, __M);
7287}
7288
7289static __inline__ __m128i __DEFAULT_FN_ATTRS128
7291{
7292 return (__m128i) __builtin_ia32_pmovdb128_mask ((__v4si) __A,
7293 (__v16qi)
7295 __M);
7296}
7297
7298static __inline__ void __DEFAULT_FN_ATTRS128
7300{
7301 __builtin_ia32_pmovdb128mem_mask ((__v16qi *) __P, (__v4si) __A, __M);
7302}
7303
7304static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR
7306 return (__m128i)__builtin_shufflevector(
7307 __builtin_convertvector((__v8si)__A, __v8qi),
7308 (__v8qi){0, 0, 0, 0, 0, 0, 0, 0}, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11,
7309 12, 13, 14, 15);
7310}
7311
7312static __inline__ __m128i __DEFAULT_FN_ATTRS256
7313_mm256_mask_cvtepi32_epi8(__m128i __O, __mmask8 __M, __m256i __A) {
7314 return (__m128i) __builtin_ia32_pmovdb256_mask ((__v8si) __A,
7315 (__v16qi) __O, __M);
7316}
7317
7318static __inline__ __m128i __DEFAULT_FN_ATTRS256
7320{
7321 return (__m128i) __builtin_ia32_pmovdb256_mask ((__v8si) __A,
7322 (__v16qi) _mm_setzero_si128 (),
7323 __M);
7324}
7325
7326static __inline__ void __DEFAULT_FN_ATTRS256
7328{
7329 __builtin_ia32_pmovdb256mem_mask ((__v16qi *) __P, (__v8si) __A, __M);
7330}
7331
7332static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
7334 return (__m128i)__builtin_shufflevector(
7335 __builtin_convertvector((__v4si)__A, __v4hi), (__v4hi){0, 0, 0, 0}, 0, 1,
7336 2, 3, 4, 5, 6, 7);
7337}
7338
7339static __inline__ __m128i __DEFAULT_FN_ATTRS128
7340_mm_mask_cvtepi32_epi16 (__m128i __O, __mmask8 __M, __m128i __A)
7341{
7342 return (__m128i) __builtin_ia32_pmovdw128_mask ((__v4si) __A,
7343 (__v8hi) __O, __M);
7344}
7345
7346static __inline__ __m128i __DEFAULT_FN_ATTRS128
7348{
7349 return (__m128i) __builtin_ia32_pmovdw128_mask ((__v4si) __A,
7350 (__v8hi) _mm_setzero_si128 (),
7351 __M);
7352}
7353
7354static __inline__ void __DEFAULT_FN_ATTRS128
7356{
7357 __builtin_ia32_pmovdw128mem_mask ((__v8hi *) __P, (__v4si) __A, __M);
7358}
7359
7360static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR
7362 return (__m128i)__builtin_convertvector((__v8si)__A, __v8hi);
7363}
7364
7365static __inline__ __m128i __DEFAULT_FN_ATTRS256
7366_mm256_mask_cvtepi32_epi16 (__m128i __O, __mmask8 __M, __m256i __A)
7367{
7368 return (__m128i) __builtin_ia32_pmovdw256_mask ((__v8si) __A,
7369 (__v8hi) __O, __M);
7370}
7371
7372static __inline__ __m128i __DEFAULT_FN_ATTRS256
7374{
7375 return (__m128i) __builtin_ia32_pmovdw256_mask ((__v8si) __A,
7376 (__v8hi) _mm_setzero_si128 (),
7377 __M);
7378}
7379
7380static __inline__ void __DEFAULT_FN_ATTRS256
7382{
7383 __builtin_ia32_pmovdw256mem_mask ((__v8hi *) __P, (__v8si) __A, __M);
7384}
7385
7386static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
7387_mm_cvtepi64_epi8(__m128i __A) {
7388 return (__m128i)__builtin_shufflevector(
7389 __builtin_convertvector((__v2di)__A, __v2qi), (__v2qi){0, 0}, 0, 1, 2, 3,
7390 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3);
7391}
7392
7393static __inline__ __m128i __DEFAULT_FN_ATTRS128
7394_mm_mask_cvtepi64_epi8 (__m128i __O, __mmask8 __M, __m128i __A)
7395{
7396 return (__m128i) __builtin_ia32_pmovqb128_mask ((__v2di) __A,
7397 (__v16qi) __O, __M);
7398}
7399
7400static __inline__ __m128i __DEFAULT_FN_ATTRS128
7402{
7403 return (__m128i) __builtin_ia32_pmovqb128_mask ((__v2di) __A,
7404 (__v16qi) _mm_setzero_si128 (),
7405 __M);
7406}
7407
7408static __inline__ void __DEFAULT_FN_ATTRS128
7410{
7411 __builtin_ia32_pmovqb128mem_mask ((__v16qi *) __P, (__v2di) __A, __M);
7412}
7413
7414static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR
7416 return (__m128i)__builtin_shufflevector(
7417 __builtin_convertvector((__v4di)__A, __v4qi), (__v4qi){0, 0, 0, 0}, 0, 1,
7418 2, 3, 4, 5, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7);
7419}
7420
7421static __inline__ __m128i __DEFAULT_FN_ATTRS256
7422_mm256_mask_cvtepi64_epi8 (__m128i __O, __mmask8 __M, __m256i __A)
7423{
7424 return (__m128i) __builtin_ia32_pmovqb256_mask ((__v4di) __A,
7425 (__v16qi) __O, __M);
7426}
7427
7428static __inline__ __m128i __DEFAULT_FN_ATTRS256
7430{
7431 return (__m128i) __builtin_ia32_pmovqb256_mask ((__v4di) __A,
7432 (__v16qi) _mm_setzero_si128 (),
7433 __M);
7434}
7435
7436static __inline__ void __DEFAULT_FN_ATTRS256
7438{
7439 __builtin_ia32_pmovqb256mem_mask ((__v16qi *) __P, (__v4di) __A, __M);
7440}
7441
7442static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
7444 return (__m128i)__builtin_shufflevector(
7445 __builtin_convertvector((__v2di)__A, __v2si), (__v2si){0, 0}, 0, 1, 2, 3);
7446}
7447
7448static __inline__ __m128i __DEFAULT_FN_ATTRS128
7449_mm_mask_cvtepi64_epi32 (__m128i __O, __mmask8 __M, __m128i __A)
7450{
7451 return (__m128i) __builtin_ia32_pmovqd128_mask ((__v2di) __A,
7452 (__v4si) __O, __M);
7453}
7454
7455static __inline__ __m128i __DEFAULT_FN_ATTRS128
7457{
7458 return (__m128i) __builtin_ia32_pmovqd128_mask ((__v2di) __A,
7459 (__v4si) _mm_setzero_si128 (),
7460 __M);
7461}
7462
7463static __inline__ void __DEFAULT_FN_ATTRS128
7465{
7466 __builtin_ia32_pmovqd128mem_mask ((__v4si *) __P, (__v2di) __A, __M);
7467}
7468
7469static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR
7471 return (__m128i)__builtin_convertvector((__v4di)__A, __v4si);
7472}
7473
7474static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR
7475_mm256_mask_cvtepi64_epi32(__m128i __O, __mmask8 __M, __m256i __A) {
7476 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,
7477 (__v4si)_mm256_cvtepi64_epi32(__A),
7478 (__v4si)__O);
7479}
7480
7481static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR
7483 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,
7484 (__v4si)_mm256_cvtepi64_epi32(__A),
7485 (__v4si)_mm_setzero_si128());
7486}
7487
7488static __inline__ void __DEFAULT_FN_ATTRS256
7490{
7491 __builtin_ia32_pmovqd256mem_mask ((__v4si *) __P, (__v4di) __A, __M);
7492}
7493
7494static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
7496 return (__m128i)__builtin_shufflevector(
7497 __builtin_convertvector((__v2di)__A, __v2hi), (__v2hi){0, 0}, 0, 1, 2, 3,
7498 3, 3, 3, 3);
7499}
7500
7501static __inline__ __m128i __DEFAULT_FN_ATTRS128
7502_mm_mask_cvtepi64_epi16 (__m128i __O, __mmask8 __M, __m128i __A)
7503{
7504 return (__m128i) __builtin_ia32_pmovqw128_mask ((__v2di) __A,
7505 (__v8hi)__O,
7506 __M);
7507}
7508
7509static __inline__ __m128i __DEFAULT_FN_ATTRS128
7511{
7512 return (__m128i) __builtin_ia32_pmovqw128_mask ((__v2di) __A,
7513 (__v8hi) _mm_setzero_si128 (),
7514 __M);
7515}
7516
7517static __inline__ void __DEFAULT_FN_ATTRS128
7519{
7520 __builtin_ia32_pmovqw128mem_mask ((__v8hi *) __P, (__v2di) __A, __M);
7521}
7522
7523static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR
7525 return (__m128i)__builtin_shufflevector(
7526 __builtin_convertvector((__v4di)__A, __v4hi), (__v4hi){0, 0, 0, 0}, 0, 1,
7527 2, 3, 4, 5, 6, 7);
7528}
7529
7530static __inline__ __m128i __DEFAULT_FN_ATTRS256
7531_mm256_mask_cvtepi64_epi16 (__m128i __O, __mmask8 __M, __m256i __A)
7532{
7533 return (__m128i) __builtin_ia32_pmovqw256_mask ((__v4di) __A,
7534 (__v8hi) __O, __M);
7535}
7536
7537static __inline__ __m128i __DEFAULT_FN_ATTRS256
7539{
7540 return (__m128i) __builtin_ia32_pmovqw256_mask ((__v4di) __A,
7541 (__v8hi) _mm_setzero_si128 (),
7542 __M);
7543}
7544
7545static __inline__ void __DEFAULT_FN_ATTRS256
7547{
7548 __builtin_ia32_pmovqw256mem_mask ((__v8hi *) __P, (__v4di) __A, __M);
7549}
7550
7551#define _mm256_extractf32x4_ps(A, imm) \
7552 ((__m128)__builtin_ia32_extractf32x4_256_mask( \
7553 (__v8sf)(__m256)(A), (int)(imm), (__v4sf)_mm_setzero_ps(), \
7554 (__mmask8) - 1))
7555
7556#define _mm256_mask_extractf32x4_ps(W, U, A, imm) \
7557 ((__m128)__builtin_ia32_extractf32x4_256_mask((__v8sf)(__m256)(A), \
7558 (int)(imm), \
7559 (__v4sf)(__m128)(W), \
7560 (__mmask8)(U)))
7561
7562#define _mm256_maskz_extractf32x4_ps(U, A, imm) \
7563 ((__m128)__builtin_ia32_extractf32x4_256_mask((__v8sf)(__m256)(A), \
7564 (int)(imm), \
7565 (__v4sf)_mm_setzero_ps(), \
7566 (__mmask8)(U)))
7567
7568#define _mm256_extracti32x4_epi32(A, imm) \
7569 ((__m128i)__builtin_ia32_extracti32x4_256_mask( \
7570 (__v8si)(__m256i)(A), (int)(imm), (__v4si)_mm_setzero_si128(), \
7571 (__mmask8) - 1))
7572
7573#define _mm256_mask_extracti32x4_epi32(W, U, A, imm) \
7574 ((__m128i)__builtin_ia32_extracti32x4_256_mask((__v8si)(__m256i)(A), \
7575 (int)(imm), \
7576 (__v4si)(__m128i)(W), \
7577 (__mmask8)(U)))
7578
7579#define _mm256_maskz_extracti32x4_epi32(U, A, imm) \
7580 ((__m128i)__builtin_ia32_extracti32x4_256_mask((__v8si)(__m256i)(A), \
7581 (int)(imm), \
7582 (__v4si)_mm_setzero_si128(), \
7583 (__mmask8)(U)))
7584
7585#define _mm256_insertf32x4(A, B, imm) \
7586 ((__m256)__builtin_ia32_insertf32x4_256((__v8sf)(__m256)(A), \
7587 (__v4sf)(__m128)(B), (int)(imm)))
7588
7589#define _mm256_mask_insertf32x4(W, U, A, B, imm) \
7590 ((__m256)__builtin_ia32_selectps_256((__mmask8)(U), \
7591 (__v8sf)_mm256_insertf32x4((A), (B), (imm)), \
7592 (__v8sf)(__m256)(W)))
7593
7594#define _mm256_maskz_insertf32x4(U, A, B, imm) \
7595 ((__m256)__builtin_ia32_selectps_256((__mmask8)(U), \
7596 (__v8sf)_mm256_insertf32x4((A), (B), (imm)), \
7597 (__v8sf)_mm256_setzero_ps()))
7598
7599#define _mm256_inserti32x4(A, B, imm) \
7600 ((__m256i)__builtin_ia32_inserti32x4_256((__v8si)(__m256i)(A), \
7601 (__v4si)(__m128i)(B), (int)(imm)))
7602
7603#define _mm256_mask_inserti32x4(W, U, A, B, imm) \
7604 ((__m256i)__builtin_ia32_selectd_256((__mmask8)(U), \
7605 (__v8si)_mm256_inserti32x4((A), (B), (imm)), \
7606 (__v8si)(__m256i)(W)))
7607
7608#define _mm256_maskz_inserti32x4(U, A, B, imm) \
7609 ((__m256i)__builtin_ia32_selectd_256((__mmask8)(U), \
7610 (__v8si)_mm256_inserti32x4((A), (B), (imm)), \
7611 (__v8si)_mm256_setzero_si256()))
7612
7613#define _mm_getmant_pd(A, B, C) \
7614 ((__m128d)__builtin_ia32_getmantpd128_mask((__v2df)(__m128d)(A), \
7615 (int)(((C)<<2) | (B)), \
7616 (__v2df)_mm_setzero_pd(), \
7617 (__mmask8)-1))
7618
7619#define _mm_mask_getmant_pd(W, U, A, B, C) \
7620 ((__m128d)__builtin_ia32_getmantpd128_mask((__v2df)(__m128d)(A), \
7621 (int)(((C)<<2) | (B)), \
7622 (__v2df)(__m128d)(W), \
7623 (__mmask8)(U)))
7624
7625#define _mm_maskz_getmant_pd(U, A, B, C) \
7626 ((__m128d)__builtin_ia32_getmantpd128_mask((__v2df)(__m128d)(A), \
7627 (int)(((C)<<2) | (B)), \
7628 (__v2df)_mm_setzero_pd(), \
7629 (__mmask8)(U)))
7630
7631#define _mm256_getmant_pd(A, B, C) \
7632 ((__m256d)__builtin_ia32_getmantpd256_mask((__v4df)(__m256d)(A), \
7633 (int)(((C)<<2) | (B)), \
7634 (__v4df)_mm256_setzero_pd(), \
7635 (__mmask8)-1))
7636
7637#define _mm256_mask_getmant_pd(W, U, A, B, C) \
7638 ((__m256d)__builtin_ia32_getmantpd256_mask((__v4df)(__m256d)(A), \
7639 (int)(((C)<<2) | (B)), \
7640 (__v4df)(__m256d)(W), \
7641 (__mmask8)(U)))
7642
7643#define _mm256_maskz_getmant_pd(U, A, B, C) \
7644 ((__m256d)__builtin_ia32_getmantpd256_mask((__v4df)(__m256d)(A), \
7645 (int)(((C)<<2) | (B)), \
7646 (__v4df)_mm256_setzero_pd(), \
7647 (__mmask8)(U)))
7648
7649#define _mm_getmant_ps(A, B, C) \
7650 ((__m128)__builtin_ia32_getmantps128_mask((__v4sf)(__m128)(A), \
7651 (int)(((C)<<2) | (B)), \
7652 (__v4sf)_mm_setzero_ps(), \
7653 (__mmask8)-1))
7654
7655#define _mm_mask_getmant_ps(W, U, A, B, C) \
7656 ((__m128)__builtin_ia32_getmantps128_mask((__v4sf)(__m128)(A), \
7657 (int)(((C)<<2) | (B)), \
7658 (__v4sf)(__m128)(W), \
7659 (__mmask8)(U)))
7660
7661#define _mm_maskz_getmant_ps(U, A, B, C) \
7662 ((__m128)__builtin_ia32_getmantps128_mask((__v4sf)(__m128)(A), \
7663 (int)(((C)<<2) | (B)), \
7664 (__v4sf)_mm_setzero_ps(), \
7665 (__mmask8)(U)))
7666
7667#define _mm256_getmant_ps(A, B, C) \
7668 ((__m256)__builtin_ia32_getmantps256_mask((__v8sf)(__m256)(A), \
7669 (int)(((C)<<2) | (B)), \
7670 (__v8sf)_mm256_setzero_ps(), \
7671 (__mmask8)-1))
7672
7673#define _mm256_mask_getmant_ps(W, U, A, B, C) \
7674 ((__m256)__builtin_ia32_getmantps256_mask((__v8sf)(__m256)(A), \
7675 (int)(((C)<<2) | (B)), \
7676 (__v8sf)(__m256)(W), \
7677 (__mmask8)(U)))
7678
7679#define _mm256_maskz_getmant_ps(U, A, B, C) \
7680 ((__m256)__builtin_ia32_getmantps256_mask((__v8sf)(__m256)(A), \
7681 (int)(((C)<<2) | (B)), \
7682 (__v8sf)_mm256_setzero_ps(), \
7683 (__mmask8)(U)))
7684
7685#define _mm_mmask_i64gather_pd(v1_old, mask, index, addr, scale) \
7686 ((__m128d)__builtin_ia32_gather3div2df((__v2df)(__m128d)(v1_old), \
7687 (void const *)(addr), \
7688 (__v2di)(__m128i)(index), \
7689 (__mmask8)(mask), (int)(scale)))
7690
7691#define _mm_mmask_i64gather_epi64(v1_old, mask, index, addr, scale) \
7692 ((__m128i)__builtin_ia32_gather3div2di((__v2di)(__m128i)(v1_old), \
7693 (void const *)(addr), \
7694 (__v2di)(__m128i)(index), \
7695 (__mmask8)(mask), (int)(scale)))
7696
7697#define _mm256_mmask_i64gather_pd(v1_old, mask, index, addr, scale) \
7698 ((__m256d)__builtin_ia32_gather3div4df((__v4df)(__m256d)(v1_old), \
7699 (void const *)(addr), \
7700 (__v4di)(__m256i)(index), \
7701 (__mmask8)(mask), (int)(scale)))
7702
7703#define _mm256_mmask_i64gather_epi64(v1_old, mask, index, addr, scale) \
7704 ((__m256i)__builtin_ia32_gather3div4di((__v4di)(__m256i)(v1_old), \
7705 (void const *)(addr), \
7706 (__v4di)(__m256i)(index), \
7707 (__mmask8)(mask), (int)(scale)))
7708
7709#define _mm_mmask_i64gather_ps(v1_old, mask, index, addr, scale) \
7710 ((__m128)__builtin_ia32_gather3div4sf((__v4sf)(__m128)(v1_old), \
7711 (void const *)(addr), \
7712 (__v2di)(__m128i)(index), \
7713 (__mmask8)(mask), (int)(scale)))
7714
7715#define _mm_mmask_i64gather_epi32(v1_old, mask, index, addr, scale) \
7716 ((__m128i)__builtin_ia32_gather3div4si((__v4si)(__m128i)(v1_old), \
7717 (void const *)(addr), \
7718 (__v2di)(__m128i)(index), \
7719 (__mmask8)(mask), (int)(scale)))
7720
7721#define _mm256_mmask_i64gather_ps(v1_old, mask, index, addr, scale) \
7722 ((__m128)__builtin_ia32_gather3div8sf((__v4sf)(__m128)(v1_old), \
7723 (void const *)(addr), \
7724 (__v4di)(__m256i)(index), \
7725 (__mmask8)(mask), (int)(scale)))
7726
7727#define _mm256_mmask_i64gather_epi32(v1_old, mask, index, addr, scale) \
7728 ((__m128i)__builtin_ia32_gather3div8si((__v4si)(__m128i)(v1_old), \
7729 (void const *)(addr), \
7730 (__v4di)(__m256i)(index), \
7731 (__mmask8)(mask), (int)(scale)))
7732
7733#define _mm_mmask_i32gather_pd(v1_old, mask, index, addr, scale) \
7734 ((__m128d)__builtin_ia32_gather3siv2df((__v2df)(__m128d)(v1_old), \
7735 (void const *)(addr), \
7736 (__v4si)(__m128i)(index), \
7737 (__mmask8)(mask), (int)(scale)))
7738
7739#define _mm_mmask_i32gather_epi64(v1_old, mask, index, addr, scale) \
7740 ((__m128i)__builtin_ia32_gather3siv2di((__v2di)(__m128i)(v1_old), \
7741 (void const *)(addr), \
7742 (__v4si)(__m128i)(index), \
7743 (__mmask8)(mask), (int)(scale)))
7744
7745#define _mm256_mmask_i32gather_pd(v1_old, mask, index, addr, scale) \
7746 ((__m256d)__builtin_ia32_gather3siv4df((__v4df)(__m256d)(v1_old), \
7747 (void const *)(addr), \
7748 (__v4si)(__m128i)(index), \
7749 (__mmask8)(mask), (int)(scale)))
7750
7751#define _mm256_mmask_i32gather_epi64(v1_old, mask, index, addr, scale) \
7752 ((__m256i)__builtin_ia32_gather3siv4di((__v4di)(__m256i)(v1_old), \
7753 (void const *)(addr), \
7754 (__v4si)(__m128i)(index), \
7755 (__mmask8)(mask), (int)(scale)))
7756
7757#define _mm_mmask_i32gather_ps(v1_old, mask, index, addr, scale) \
7758 ((__m128)__builtin_ia32_gather3siv4sf((__v4sf)(__m128)(v1_old), \
7759 (void const *)(addr), \
7760 (__v4si)(__m128i)(index), \
7761 (__mmask8)(mask), (int)(scale)))
7762
7763#define _mm_mmask_i32gather_epi32(v1_old, mask, index, addr, scale) \
7764 ((__m128i)__builtin_ia32_gather3siv4si((__v4si)(__m128i)(v1_old), \
7765 (void const *)(addr), \
7766 (__v4si)(__m128i)(index), \
7767 (__mmask8)(mask), (int)(scale)))
7768
7769#define _mm256_mmask_i32gather_ps(v1_old, mask, index, addr, scale) \
7770 ((__m256)__builtin_ia32_gather3siv8sf((__v8sf)(__m256)(v1_old), \
7771 (void const *)(addr), \
7772 (__v8si)(__m256i)(index), \
7773 (__mmask8)(mask), (int)(scale)))
7774
7775#define _mm256_mmask_i32gather_epi32(v1_old, mask, index, addr, scale) \
7776 ((__m256i)__builtin_ia32_gather3siv8si((__v8si)(__m256i)(v1_old), \
7777 (void const *)(addr), \
7778 (__v8si)(__m256i)(index), \
7779 (__mmask8)(mask), (int)(scale)))
7780
7781#define _mm256_permutex_pd(X, C) \
7782 ((__m256d)__builtin_ia32_permdf256((__v4df)(__m256d)(X), (int)(C)))
7783
7784#define _mm256_mask_permutex_pd(W, U, X, C) \
7785 ((__m256d)__builtin_ia32_selectpd_256((__mmask8)(U), \
7786 (__v4df)_mm256_permutex_pd((X), (C)), \
7787 (__v4df)(__m256d)(W)))
7788
7789#define _mm256_maskz_permutex_pd(U, X, C) \
7790 ((__m256d)__builtin_ia32_selectpd_256((__mmask8)(U), \
7791 (__v4df)_mm256_permutex_pd((X), (C)), \
7792 (__v4df)_mm256_setzero_pd()))
7793
7794#define _mm256_permutex_epi64(X, C) \
7795 ((__m256i)__builtin_ia32_permdi256((__v4di)(__m256i)(X), (int)(C)))
7796
7797#define _mm256_mask_permutex_epi64(W, U, X, C) \
7798 ((__m256i)__builtin_ia32_selectq_256((__mmask8)(U), \
7799 (__v4di)_mm256_permutex_epi64((X), (C)), \
7800 (__v4di)(__m256i)(W)))
7801
7802#define _mm256_maskz_permutex_epi64(U, X, C) \
7803 ((__m256i)__builtin_ia32_selectq_256((__mmask8)(U), \
7804 (__v4di)_mm256_permutex_epi64((X), (C)), \
7805 (__v4di)_mm256_setzero_si256()))
7806
7807static __inline__ __m256d __DEFAULT_FN_ATTRS256
7808_mm256_permutexvar_pd (__m256i __X, __m256d __Y)
7809{
7810 return (__m256d)__builtin_ia32_permvardf256((__v4df)__Y, (__v4di)__X);
7811}
7812
7813static __inline__ __m256d __DEFAULT_FN_ATTRS256
7814_mm256_mask_permutexvar_pd (__m256d __W, __mmask8 __U, __m256i __X,
7815 __m256d __Y)
7816{
7817 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
7818 (__v4df)_mm256_permutexvar_pd(__X, __Y),
7819 (__v4df)__W);
7820}
7821
7822static __inline__ __m256d __DEFAULT_FN_ATTRS256
7823_mm256_maskz_permutexvar_pd (__mmask8 __U, __m256i __X, __m256d __Y)
7824{
7825 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
7826 (__v4df)_mm256_permutexvar_pd(__X, __Y),
7827 (__v4df)_mm256_setzero_pd());
7828}
7829
7830static __inline__ __m256i __DEFAULT_FN_ATTRS256
7831_mm256_permutexvar_epi64 ( __m256i __X, __m256i __Y)
7832{
7833 return (__m256i)__builtin_ia32_permvardi256((__v4di) __Y, (__v4di) __X);
7834}
7835
7836static __inline__ __m256i __DEFAULT_FN_ATTRS256
7838{
7839 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
7840 (__v4di)_mm256_permutexvar_epi64(__X, __Y),
7841 (__v4di)_mm256_setzero_si256());
7842}
7843
7844static __inline__ __m256i __DEFAULT_FN_ATTRS256
7845_mm256_mask_permutexvar_epi64 (__m256i __W, __mmask8 __M, __m256i __X,
7846 __m256i __Y)
7847{
7848 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
7849 (__v4di)_mm256_permutexvar_epi64(__X, __Y),
7850 (__v4di)__W);
7851}
7852
7853#define _mm256_permutexvar_ps(A, B) _mm256_permutevar8x32_ps((B), (A))
7854
7855static __inline__ __m256 __DEFAULT_FN_ATTRS256
7856_mm256_mask_permutexvar_ps(__m256 __W, __mmask8 __U, __m256i __X, __m256 __Y)
7857{
7858 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
7859 (__v8sf)_mm256_permutexvar_ps(__X, __Y),
7860 (__v8sf)__W);
7861}
7862
7863static __inline__ __m256 __DEFAULT_FN_ATTRS256
7865{
7866 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
7867 (__v8sf)_mm256_permutexvar_ps(__X, __Y),
7868 (__v8sf)_mm256_setzero_ps());
7869}
7870
7871#define _mm256_permutexvar_epi32(A, B) _mm256_permutevar8x32_epi32((B), (A))
7872
7873static __inline__ __m256i __DEFAULT_FN_ATTRS256
7874_mm256_mask_permutexvar_epi32(__m256i __W, __mmask8 __M, __m256i __X,
7875 __m256i __Y)
7876{
7877 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
7878 (__v8si)_mm256_permutexvar_epi32(__X, __Y),
7879 (__v8si)__W);
7880}
7881
7882static __inline__ __m256i __DEFAULT_FN_ATTRS256
7884{
7885 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
7886 (__v8si)_mm256_permutexvar_epi32(__X, __Y),
7887 (__v8si)_mm256_setzero_si256());
7888}
7889
7890#define _mm_alignr_epi32(A, B, imm) \
7891 ((__m128i)__builtin_ia32_alignd128((__v4si)(__m128i)(A), \
7892 (__v4si)(__m128i)(B), (int)(imm)))
7893
7894#define _mm_mask_alignr_epi32(W, U, A, B, imm) \
7895 ((__m128i)__builtin_ia32_selectd_128((__mmask8)(U), \
7896 (__v4si)_mm_alignr_epi32((A), (B), (imm)), \
7897 (__v4si)(__m128i)(W)))
7898
7899#define _mm_maskz_alignr_epi32(U, A, B, imm) \
7900 ((__m128i)__builtin_ia32_selectd_128((__mmask8)(U), \
7901 (__v4si)_mm_alignr_epi32((A), (B), (imm)), \
7902 (__v4si)_mm_setzero_si128()))
7903
7904#define _mm256_alignr_epi32(A, B, imm) \
7905 ((__m256i)__builtin_ia32_alignd256((__v8si)(__m256i)(A), \
7906 (__v8si)(__m256i)(B), (int)(imm)))
7907
7908#define _mm256_mask_alignr_epi32(W, U, A, B, imm) \
7909 ((__m256i)__builtin_ia32_selectd_256((__mmask8)(U), \
7910 (__v8si)_mm256_alignr_epi32((A), (B), (imm)), \
7911 (__v8si)(__m256i)(W)))
7912
7913#define _mm256_maskz_alignr_epi32(U, A, B, imm) \
7914 ((__m256i)__builtin_ia32_selectd_256((__mmask8)(U), \
7915 (__v8si)_mm256_alignr_epi32((A), (B), (imm)), \
7916 (__v8si)_mm256_setzero_si256()))
7917
7918#define _mm_alignr_epi64(A, B, imm) \
7919 ((__m128i)__builtin_ia32_alignq128((__v2di)(__m128i)(A), \
7920 (__v2di)(__m128i)(B), (int)(imm)))
7921
7922#define _mm_mask_alignr_epi64(W, U, A, B, imm) \
7923 ((__m128i)__builtin_ia32_selectq_128((__mmask8)(U), \
7924 (__v2di)_mm_alignr_epi64((A), (B), (imm)), \
7925 (__v2di)(__m128i)(W)))
7926
7927#define _mm_maskz_alignr_epi64(U, A, B, imm) \
7928 ((__m128i)__builtin_ia32_selectq_128((__mmask8)(U), \
7929 (__v2di)_mm_alignr_epi64((A), (B), (imm)), \
7930 (__v2di)_mm_setzero_si128()))
7931
7932#define _mm256_alignr_epi64(A, B, imm) \
7933 ((__m256i)__builtin_ia32_alignq256((__v4di)(__m256i)(A), \
7934 (__v4di)(__m256i)(B), (int)(imm)))
7935
7936#define _mm256_mask_alignr_epi64(W, U, A, B, imm) \
7937 ((__m256i)__builtin_ia32_selectq_256((__mmask8)(U), \
7938 (__v4di)_mm256_alignr_epi64((A), (B), (imm)), \
7939 (__v4di)(__m256i)(W)))
7940
7941#define _mm256_maskz_alignr_epi64(U, A, B, imm) \
7942 ((__m256i)__builtin_ia32_selectq_256((__mmask8)(U), \
7943 (__v4di)_mm256_alignr_epi64((A), (B), (imm)), \
7944 (__v4di)_mm256_setzero_si256()))
7945
7946static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
7947_mm_mask_movehdup_ps(__m128 __W, __mmask8 __U, __m128 __A) {
7948 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
7949 (__v4sf)_mm_movehdup_ps(__A),
7950 (__v4sf)__W);
7951}
7952
7953static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
7955 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
7956 (__v4sf)_mm_movehdup_ps(__A),
7957 (__v4sf)_mm_setzero_ps());
7958}
7959
7960static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
7961_mm256_mask_movehdup_ps(__m256 __W, __mmask8 __U, __m256 __A) {
7962 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
7963 (__v8sf)_mm256_movehdup_ps(__A),
7964 (__v8sf)__W);
7965}
7966
7967static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
7969 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
7970 (__v8sf)_mm256_movehdup_ps(__A),
7971 (__v8sf)_mm256_setzero_ps());
7972}
7973
7974static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
7975_mm_mask_moveldup_ps(__m128 __W, __mmask8 __U, __m128 __A) {
7976 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
7977 (__v4sf)_mm_moveldup_ps(__A),
7978 (__v4sf)__W);
7979}
7980
7981static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
7983 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
7984 (__v4sf)_mm_moveldup_ps(__A),
7985 (__v4sf)_mm_setzero_ps());
7986}
7987
7988static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
7989_mm256_mask_moveldup_ps(__m256 __W, __mmask8 __U, __m256 __A) {
7990 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
7991 (__v8sf)_mm256_moveldup_ps(__A),
7992 (__v8sf)__W);
7993}
7994
7995static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
7997 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
7998 (__v8sf)_mm256_moveldup_ps(__A),
7999 (__v8sf)_mm256_setzero_ps());
8000}
8001
8002#define _mm256_mask_shuffle_epi32(W, U, A, I) \
8003 ((__m256i)__builtin_ia32_selectd_256((__mmask8)(U), \
8004 (__v8si)_mm256_shuffle_epi32((A), (I)), \
8005 (__v8si)(__m256i)(W)))
8006
8007#define _mm256_maskz_shuffle_epi32(U, A, I) \
8008 ((__m256i)__builtin_ia32_selectd_256((__mmask8)(U), \
8009 (__v8si)_mm256_shuffle_epi32((A), (I)), \
8010 (__v8si)_mm256_setzero_si256()))
8011
8012#define _mm_mask_shuffle_epi32(W, U, A, I) \
8013 ((__m128i)__builtin_ia32_selectd_128((__mmask8)(U), \
8014 (__v4si)_mm_shuffle_epi32((A), (I)), \
8015 (__v4si)(__m128i)(W)))
8016
8017#define _mm_maskz_shuffle_epi32(U, A, I) \
8018 ((__m128i)__builtin_ia32_selectd_128((__mmask8)(U), \
8019 (__v4si)_mm_shuffle_epi32((A), (I)), \
8020 (__v4si)_mm_setzero_si128()))
8021
8022static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
8023_mm_mask_mov_pd(__m128d __W, __mmask8 __U, __m128d __A) {
8024 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, (__v2df)__A,
8025 (__v2df)__W);
8026}
8027
8028static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
8029_mm_maskz_mov_pd(__mmask8 __U, __m128d __A) {
8030 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, (__v2df)__A,
8031 (__v2df)_mm_setzero_pd());
8032}
8033
8034static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
8035_mm256_mask_mov_pd(__m256d __W, __mmask8 __U, __m256d __A) {
8036 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, (__v4df)__A,
8037 (__v4df)__W);
8038}
8039
8040static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
8042 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, (__v4df)__A,
8043 (__v4df)_mm256_setzero_pd());
8044}
8045
8046static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
8047_mm_mask_mov_ps(__m128 __W, __mmask8 __U, __m128 __A) {
8048 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, (__v4sf)__A,
8049 (__v4sf)__W);
8050}
8051
8052static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
8053_mm_maskz_mov_ps(__mmask8 __U, __m128 __A) {
8054 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, (__v4sf)__A,
8055 (__v4sf)_mm_setzero_ps());
8056}
8057
8058static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
8059_mm256_mask_mov_ps(__m256 __W, __mmask8 __U, __m256 __A) {
8060 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, (__v8sf)__A,
8061 (__v8sf)__W);
8062}
8063
8064static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
8066 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, (__v8sf)__A,
8067 (__v8sf)_mm256_setzero_ps());
8068}
8069
8070static __inline__ __m128 __DEFAULT_FN_ATTRS128
8071_mm_mask_cvtph_ps (__m128 __W, __mmask8 __U, __m128i __A)
8072{
8073 return (__m128) __builtin_ia32_vcvtph2ps_mask ((__v8hi) __A,
8074 (__v4sf) __W,
8075 (__mmask8) __U);
8076}
8077
8078static __inline__ __m128 __DEFAULT_FN_ATTRS128
8080{
8081 return (__m128) __builtin_ia32_vcvtph2ps_mask ((__v8hi) __A,
8082 (__v4sf)
8083 _mm_setzero_ps (),
8084 (__mmask8) __U);
8085}
8086
8087static __inline__ __m256 __DEFAULT_FN_ATTRS256
8088_mm256_mask_cvtph_ps (__m256 __W, __mmask8 __U, __m128i __A)
8089{
8090 return (__m256) __builtin_ia32_vcvtph2ps256_mask ((__v8hi) __A,
8091 (__v8sf) __W,
8092 (__mmask8) __U);
8093}
8094
8095static __inline__ __m256 __DEFAULT_FN_ATTRS256
8097{
8098 return (__m256) __builtin_ia32_vcvtph2ps256_mask ((__v8hi) __A,
8099 (__v8sf)
8101 (__mmask8) __U);
8102}
8103
8104#define _mm_mask_cvt_roundps_ph(W, U, A, I) \
8105 ((__m128i)__builtin_ia32_vcvtps2ph_mask((__v4sf)(__m128)(A), (int)(I), \
8106 (__v8hi)(__m128i)(W), \
8107 (__mmask8)(U)))
8108
8109#define _mm_maskz_cvt_roundps_ph(U, A, I) \
8110 ((__m128i)__builtin_ia32_vcvtps2ph_mask((__v4sf)(__m128)(A), (int)(I), \
8111 (__v8hi)_mm_setzero_si128(), \
8112 (__mmask8)(U)))
8113
8114#define _mm_mask_cvtps_ph _mm_mask_cvt_roundps_ph
8115#define _mm_maskz_cvtps_ph _mm_maskz_cvt_roundps_ph
8116
8117#define _mm256_mask_cvt_roundps_ph(W, U, A, I) \
8118 ((__m128i)__builtin_ia32_vcvtps2ph256_mask((__v8sf)(__m256)(A), (int)(I), \
8119 (__v8hi)(__m128i)(W), \
8120 (__mmask8)(U)))
8121
8122#define _mm256_maskz_cvt_roundps_ph(U, A, I) \
8123 ((__m128i)__builtin_ia32_vcvtps2ph256_mask((__v8sf)(__m256)(A), (int)(I), \
8124 (__v8hi)_mm_setzero_si128(), \
8125 (__mmask8)(U)))
8126
8127#define _mm256_mask_cvtps_ph _mm256_mask_cvt_roundps_ph
8128#define _mm256_maskz_cvtps_ph _mm256_maskz_cvt_roundps_ph
8129
8130#undef __DEFAULT_FN_ATTRS128
8131#undef __DEFAULT_FN_ATTRS256
8132#undef __DEFAULT_FN_ATTRS256_CONSTEXPR
8133#undef __DEFAULT_FN_ATTRS128_CONSTEXPR
8134
8135#endif /* __AVX512VLINTRIN_H */
static __inline__ vector float vector float __b
Definition altivec.h:578
return __v
Definition arm_acle.h:88
#define __DEFAULT_FN_ATTRS128
#define __DEFAULT_FN_ATTRS256
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_srl_epi32(__m256i __a, __m128i __count)
Shifts each 32-bit element of the 256-bit vector of [8 x i32] in __a right by the number of bits give...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_sllv_epi32(__m256i __X, __m256i __Y)
Shifts each 32-bit element of the 256-bit vector of [8 x i32] in __X left by the number of bits given...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_cvtepi32_epi64(__m128i __V)
Sign-extends 32-bit elements from the 128-bit vector of [4 x i32] in __V and returns the 64-bit value...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_max_epi32(__m256i __a, __m256i __b)
Compares the corresponding signed 32-bit integers in the two 256-bit vectors of [8 x i32] in __a and ...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mul_epu32(__m256i __a, __m256i __b)
Multiplies unsigned 32-bit integers from even-numered elements of two 256-bit vectors of [8 x i32] an...
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_sll_epi32(__m256i __a, __m128i __count)
Shifts each 32-bit element of the 256-bit vector of [8 x i32] in __a left by the number of bits given...
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_srav_epi32(__m128i __X, __m128i __Y)
Shifts each 32-bit element of the 128-bit vector of [4 x i32] in __X right by the number of bits give...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_unpackhi_epi32(__m256i __a, __m256i __b)
Unpacks and interleaves 32-bit integers from parts of the 256-bit vectors of [8 x i32] in __a and __b...
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_sll_epi64(__m256i __a, __m128i __count)
Shifts each 64-bit element of the 256-bit vector of [4 x i64] in __a left by the number of bits given...
#define __DEFAULT_FN_ATTRS128_CONSTEXPR
Definition avx2intrin.h:30
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_broadcastq_epi64(__m128i __X)
Broadcasts the low element from the 128-bit vector of [2 x i64] in __X to both elements of the result...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_slli_epi64(__m256i __a, int __count)
Shifts each 64-bit element of the 256-bit vector of [4 x i64] in __a left by __count bits,...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_abs_epi32(__m256i __a)
Computes the absolute value of each signed 32-bit element in the 256-bit vector of [8 x i32] in __a a...
Definition avx2intrin.h:139
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_srav_epi32(__m256i __X, __m256i __Y)
Shifts each 32-bit element of the 256-bit vector of [8 x i32] in __X right by the number of bits give...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_cvtepu8_epi64(__m128i __V)
Zero-extends the first four bytes from the 128-bit integer vector in __V and returns the 64-bit value...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_cvtepu32_epi64(__m128i __V)
Zero-extends 32-bit elements from the 128-bit vector of [4 x i32] in __V and returns the 64-bit value...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_cvtepu8_epi32(__m128i __V)
Zero-extends bytes from the lower half of the 128-bit integer vector in __V and returns the 32-bit va...
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_srlv_epi32(__m128i __X, __m128i __Y)
Shifts each 32-bit element of the 128-bit vector of [4 x i32] in __X right by the number of bits give...
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_broadcastss_ps(__m128 __X)
Broadcasts the 32-bit floating-point value from the low element of the 128-bit vector of [4 x float] ...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_srli_epi64(__m256i __a, int __count)
Shifts each 64-bit element of the 256-bit vector of [4 x i64] in __a right by __count bits,...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_unpacklo_epi64(__m256i __a, __m256i __b)
Unpacks and interleaves 64-bit integers from parts of the 256-bit vectors of [4 x i64] in __a and __b...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_cvtepi8_epi32(__m128i __V)
Sign-extends bytes from the lower half of the 128-bit integer vector in __V and returns the 32-bit va...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_broadcastq_epi64(__m128i __X)
Broadcasts the low element from the 128-bit vector of [2 x i64] in __X to all elements of the result'...
#define __DEFAULT_FN_ATTRS256_CONSTEXPR
Definition avx2intrin.h:29
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mul_epi32(__m256i __a, __m256i __b)
Multiplies signed 32-bit integers from even-numbered elements of two 256-bit vectors of [8 x i32] and...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mullo_epi32(__m256i __a, __m256i __b)
Multiplies signed 32-bit integer elements of two 256-bit vectors of [8 x i32], and returns the lower ...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_min_epi32(__m256i __a, __m256i __b)
Compares the corresponding signed 32-bit integers in the two 256-bit vectors of [8 x i32] in __a and ...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_sub_epi32(__m256i __a, __m256i __b)
Subtracts 32-bit integers from corresponding elements of two 256-bit vectors of [8 x i32].
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_unpackhi_epi64(__m256i __a, __m256i __b)
Unpacks and interleaves 64-bit integers from parts of the 256-bit vectors of [4 x i64] in __a and __b...
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_broadcastss_ps(__m128 __X)
Broadcasts the 32-bit floating-point value from the low element of the 128-bit vector of [4 x float] ...
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_sra_epi32(__m256i __a, __m128i __count)
Shifts each 32-bit element of the 256-bit vector of [8 x i32] in __a right by the number of bits give...
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_srlv_epi64(__m128i __X, __m128i __Y)
Shifts each 64-bit element of the 128-bit vector of [2 x i64] in __X right by the number of bits give...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_srlv_epi32(__m256i __X, __m256i __Y)
Shifts each 32-bit element of the 256-bit vector of [8 x i32] in __X right by the number of bits give...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_cvtepu16_epi64(__m128i __V)
Zero-extends 16-bit elements from the lower half of the 128-bit vector of [8 x i16] in __V and return...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_unpacklo_epi32(__m256i __a, __m256i __b)
Unpacks and interleaves 32-bit integers from parts of the 256-bit vectors of [8 x i32] in __a and __b...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_cvtepi8_epi64(__m128i __V)
Sign-extends the first four bytes from the 128-bit integer vector in __V and returns the 64-bit value...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_srli_epi32(__m256i __a, int __count)
Shifts each 32-bit element of the 256-bit vector of [8 x i32] in __a right by __count bits,...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_add_epi64(__m256i __a, __m256i __b)
Adds 64-bit integers from corresponding elements of two 256-bit vectors of [4 x i64] and returns the ...
Definition avx2intrin.h:333
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_cvtepi16_epi64(__m128i __V)
Sign-extends 16-bit elements from the lower half of the 128-bit vector of [8 x i16] in __V and return...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_and_si256(__m256i __a, __m256i __b)
Computes the bitwise AND of the 256-bit integer vectors in __a and __b.
Definition avx2intrin.h:448
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_slli_epi32(__m256i __a, int __count)
Shifts each 32-bit element of the 256-bit vector of [8 x i32] in __a left by __count bits,...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_srai_epi32(__m256i __a, int __count)
Shifts each 32-bit element of the 256-bit vector of [8 x i32] in __a right by __count bits,...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_add_epi32(__m256i __a, __m256i __b)
Adds 32-bit integers from corresponding elements of two 256-bit vectors of [8 x i32] and returns the ...
Definition avx2intrin.h:315
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_broadcastsd_pd(__m128d __X)
Broadcasts the 64-bit floating-point value from the low element of the 128-bit vector of [2 x double]...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_cvtepu16_epi32(__m128i __V)
Zero-extends 16-bit elements from the 128-bit vector of [8 x i16] in __V and returns the 32-bit value...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_max_epu32(__m256i __a, __m256i __b)
Compares the corresponding unsigned 32-bit integers in the two 256-bit vectors of [8 x i32] in __a an...
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_sllv_epi64(__m128i __X, __m128i __Y)
Shifts each 64-bit element of the 128-bit vector of [2 x i64] in __X left by the number of bits given...
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_sllv_epi32(__m128i __X, __m128i __Y)
Shifts each 32-bit element of the 128-bit vector of [4 x i32] in __X left by the number of bits given...
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_srl_epi64(__m256i __a, __m128i __count)
Shifts each 64-bit element of the 256-bit vector of [4 x i64] in __a right by the number of bits give...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_min_epu32(__m256i __a, __m256i __b)
Compares the corresponding unsigned 32-bit integers in the two 256-bit vectors of [8 x i32] in __a an...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_cvtepi16_epi32(__m128i __V)
Sign-extends 16-bit elements from the 128-bit vector of [8 x i16] in __V and returns the 32-bit value...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_sub_epi64(__m256i __a, __m256i __b)
Subtracts 64-bit integers from corresponding elements of two 256-bit vectors of [4 x i64].
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_broadcastd_epi32(__m128i __X)
Broadcasts the low element from the 128-bit vector of [4 x i32] in __X to all elements of the result'...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_broadcastd_epi32(__m128i __X)
Broadcasts the low element from the 128-bit vector of [4 x i32] in __X to all elements of the result'...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_srlv_epi64(__m256i __X, __m256i __Y)
Shifts each 64-bit element of the 256-bit vector of [4 x i64] in __X right by the number of bits give...
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_sllv_epi64(__m256i __X, __m256i __Y)
Shifts each 64-bit element of the 256-bit vector of [4 x i64] in __X left by the number of bits given...
unsigned char __mmask8
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_xor_epi32(__mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_expandloadu_epi32(__m128i __W, __mmask8 __U, void const *__P)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_add_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvtusepi64_epi16(__m128i __O, __mmask8 __M, __m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_rorv_epi32(__mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_cvtepi32_pd(__mmask8 __U, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_min_epi64(__mmask8 __M, __m128i __A, __m128i __B)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_maskz_min_pd(__mmask8 __U, __m256d __A, __m256d __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvttpd_epu32(__m128d __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_max_epi64(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B)
static __inline__ void __DEFAULT_FN_ATTRS128 _mm_mask_store_epi32(void *__P, __mmask8 __U, __m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_mov_epi64(__m256i __W, __mmask8 __U, __m256i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_cvttps_epu32(__mmask8 __U, __m256 __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_andnot_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_mask_rcp14_ps(__m256 __W, __mmask8 __U, __m256 __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_sll_epi64(__mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvtepi64_epi16(__m128i __O, __mmask8 __M, __m128i __A)
#define _mm_mask_cmpneq_epi32_mask(k, A, B)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtpd_epi32(__m128i __W, __mmask8 __U, __m256d __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_mask_add_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_unpacklo_epi32(__mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_mask3_fmaddsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_srav_epi64(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_maskz_rcp14_pd(__mmask8 __U, __m256d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_or_epi32(__mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask_compress_pd(__m128d __W, __mmask8 __U, __m128d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_maskz_cvtusepi32_epi8(__mmask8 __M, __m256i __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_unpacklo_pd(__mmask8 __U, __m256d __A, __m256d __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_sllv_epi32(__mmask8 __U, __m128i __X, __m128i __Y)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_maskz_cvtepi64_epi16(__mmask8 __M, __m256i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvtepi32_epi16(__m128i __O, __mmask8 __M, __m128i __A)
static __inline__ void __DEFAULT_FN_ATTRS128 _mm_mask_cvtsepi64_storeu_epi32(void *__P, __mmask8 __M, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_and_epi32(__mmask8 __U, __m128i __A, __m128i __B)
static __inline__ void __DEFAULT_FN_ATTRS128 _mm_mask_cvtepi64_storeu_epi8(void *__P, __mmask8 __M, __m128i __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_maskz_loadu_ps(__mmask8 __U, void const *__P)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_max_epi32(__mmask8 __M, __m128i __A, __m128i __B)
static __inline__ void __DEFAULT_FN_ATTRS128 _mm_mask_cvtsepi64_storeu_epi16(void *__P, __mmask8 __M, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_rolv_epi64(__mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_add_epi32(__mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_mask_min_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_sll_epi32(__mmask8 __U, __m256i __A, __m128i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_andnot_epi64(__m256i __A, __m256i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_cvtepi32_epi16(__m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_expand_epi64(__m128i __W, __mmask8 __U, __m128i __A)
static __inline__ void __DEFAULT_FN_ATTRS256 _mm256_mask_storeu_epi32(void *__P, __mmask8 __U, __m256i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtepi8_epi32(__m256i __W, __mmask8 __U, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_cvtepi32_epi8(__mmask8 __M, __m128i __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_mask3_fmsubadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvtusepi64_epi8(__m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_cvtepu32_epi64(__mmask8 __U, __m128i __X)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_cvtusepi32_epi8(__m256i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_sra_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_cvtepu32_ps(__m128 __W, __mmask8 __U, __m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_srai_epi32(__mmask8 __U, __m256i __A, unsigned int __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_load_epi64(__m128i __W, __mmask8 __U, void const *__P)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_maskz_cvtsepi64_epi8(__mmask8 __M, __m256i __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_maskz_expandloadu_ps(__mmask8 __U, void const *__P)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_and_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_loadu_epi64(__mmask8 __U, void const *__P)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_maskz_cvtsepi32_epi16(__mmask8 __M, __m256i __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask_load_ps(__m128 __W, __mmask8 __U, void const *__P)
static __inline__ void __DEFAULT_FN_ATTRS128 _mm_mask_cvtsepi32_storeu_epi16(void *__P, __mmask8 __M, __m128i __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask_scalef_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B)
static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask3_fnmsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_cvtepi64_epi8(__m128i __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_mask_rcp14_pd(__m256d __W, __mmask8 __U, __m256d __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_cvtepi32_pd(__mmask8 __U, __m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_srlv_epi32(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_mask_expand_pd(__m256d __W, __mmask8 __U, __m256d __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_add_epi32(__mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvtsepi64_epi16(__m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_sra_epi64(__mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtusepi64_epi16(__m128i __O, __mmask8 __M, __m256i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_unpackhi_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_maskz_rsqrt14_pd(__mmask8 __U, __m128d __A)
static __inline__ void __DEFAULT_FN_ATTRS256 _mm256_mask_cvtsepi32_storeu_epi8(void *__P, __mmask8 __M, __m256i __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_fmsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_permutex2var_epi64(__m128i __A, __mmask8 __U, __m128i __I, __m128i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_cvtepi64_epi32(__mmask8 __M, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_broadcastq_epi64(__m128i __O, __mmask8 __M, __m128i __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_fnmadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_srl_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B)
static __inline__ void __DEFAULT_FN_ATTRS128 _mm_mask_cvtepi32_storeu_epi8(void *__P, __mmask8 __M, __m128i __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask_rsqrt14_pd(__m128d __W, __mmask8 __U, __m128d __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_srli_epi64(__m256i __W, __mmask8 __U, __m256i __A, unsigned int __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_cvtepi32_ps(__mmask8 __U, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_load_epi32(__m128i __W, __mmask8 __U, void const *__P)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_maskz_fmsubadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C)
static __inline__ __mmask8 __DEFAULT_FN_ATTRS128 _mm_test_epi32_mask(__m128i __A, __m128i __B)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask_permutevar_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128i __C)
static __inline void __DEFAULT_FN_ATTRS256 _mm256_store_epi32(void *__P, __m256i __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_mask_getexp_ps(__m256 __W, __mmask8 __U, __m256 __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtepi32_epi8(__m128i __O, __mmask8 __M, __m256i __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_mask_add_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B)
#define _mm256_mask_cmpneq_epi64_mask(k, A, B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_cvtepi32_ps(__m128 __W, __mmask8 __U, __m128i __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_fnmsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_scalef_pd(__m128d __A, __m128d __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_xor_epi32(__m128i __a, __m128i __b)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_srav_epi64(__m256i __X, __m256i __Y)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_maskz_movedup_pd(__mmask8 __U, __m256d __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_cvtps_epi32(__mmask8 __U, __m256 __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_mask_sqrt_ps(__m256 __W, __mmask8 __U, __m256 __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_srl_epi64(__mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_rolv_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
static __inline__ void __DEFAULT_FN_ATTRS256 _mm256_mask_store_pd(void *__P, __mmask8 __U, __m256d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtusepi32_epi8(__m128i __O, __mmask8 __M, __m256i __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask_load_pd(__m128d __W, __mmask8 __U, void const *__P)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_maskz_mul_pd(__mmask8 __U, __m128d __A, __m128d __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_rolv_epi32(__mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_maskz_div_ps(__mmask8 __U, __m128 __A, __m128 __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_add_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_unpackhi_epi64(__mmask8 __U, __m256i __A, __m256i __B)
static __inline__ void __DEFAULT_FN_ATTRS256 _mm256_mask_cvtusepi32_storeu_epi8(void *__P, __mmask8 __M, __m256i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_cvtusepi64_epi8(__mmask8 __M, __m128i __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask_min_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_cvtsepi32_epi8(__mmask8 __M, __m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_min_epi64(__m256i __A, __m256i __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_maskz_add_ps(__mmask8 __U, __m128 __A, __m128 __B)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_maskz_mul_pd(__mmask8 __U, __m256d __A, __m256d __B)
static __inline__ void __DEFAULT_FN_ATTRS128 _mm_mask_cvtepi64_storeu_epi16(void *__P, __mmask8 __M, __m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_slli_epi32(__mmask8 __U, __m256i __A, unsigned int __B)
static __inline void __DEFAULT_FN_ATTRS128 _mm_storeu_epi64(void *__P, __m128i __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_fnmadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_mask_permutexvar_ps(__m256 __W, __mmask8 __U, __m256i __X, __m256 __Y)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask3_fmaddsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_maskz_min_ps(__mmask8 __U, __m256 __A, __m256 __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_compress_epi64(__m256i __W, __mmask8 __U, __m256i __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_maskz_fmsubadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_moveldup_ps(__mmask8 __U, __m256 __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_srlv_epi32(__mmask8 __U, __m128i __X, __m128i __Y)
static __inline__ __mmask8 __DEFAULT_FN_ATTRS256 _mm256_test_epi32_mask(__m256i __A, __m256i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_cvtepi64_epi32(__m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_unpacklo_epi32(__mmask8 __U, __m128i __A, __m128i __B)
static __inline __m128i __DEFAULT_FN_ATTRS128 _mm_loadu_epi64(void const *__P)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_min_epi32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_max_epi64(__m256i __A, __m256i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_srai_epi64(__mmask8 __U, __m256i __A, unsigned int __imm)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_sll_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_loadu_epi64(__mmask8 __U, void const *__P)
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_unpackhi_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_mask_loadu_pd(__m256d __W, __mmask8 __U, void const *__P)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_sub_epi32(__mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_or_epi64(__mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_maskz_cvtsepi32_epi8(__mmask8 __M, __m256i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_xor_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __mmask8 __DEFAULT_FN_ATTRS256 _mm256_mask_testn_epi64_mask(__mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_load_epi64(__m256i __W, __mmask8 __U, void const *__P)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_andnot_epi64(__mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_maskz_permutevar_ps(__mmask8 __U, __m256 __A, __m256i __C)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_maskz_getexp_pd(__mmask8 __U, __m256d __A)
static __inline__ void __DEFAULT_FN_ATTRS128 _mm_mask_cvtusepi32_storeu_epi8(void *__P, __mmask8 __M, __m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm256_mask_mullo_epi32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_fmadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvtusepi32_epi16(__m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtepu16_epi64(__m256i __W, __mmask8 __U, __m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_or_epi64(__m256i __a, __m256i __b)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask_cvtph_ps(__m128 __W, __mmask8 __U, __m128i __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask_sqrt_ps(__m128 __W, __mmask8 __U, __m128 __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_permutex2var_pd(__m256d __A, __mmask8 __U, __m256i __I, __m256d __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_min_epu32(__mmask8 __M, __m256i __A, __m256i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_min_epu64(__mmask8 __M, __m256i __A, __m256i __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask_rsqrt14_ps(__m128 __W, __mmask8 __U, __m128 __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_maskz_loadu_pd(__mmask8 __U, void const *__P)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_srl_epi32(__mmask8 __U, __m256i __A, __m128i __B)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_mask_rsqrt14_ps(__m256 __W, __mmask8 __U, __m256 __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_mov_ps(__m256 __W, __mmask8 __U, __m256 __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_rcp14_pd(__m256d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_cvtepi32_epi16(__mmask8 __M, __m128i __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_maskz_rsqrt14_ps(__mmask8 __U, __m256 __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_mask_permutexvar_pd(__m256d __W, __mmask8 __U, __m256i __X, __m256d __Y)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvttpd_epu32(__m128i __W, __mmask8 __U, __m128d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_mul_epu32(__mmask8 __M, __m128i __X, __m128i __Y)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_srl_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_loadu_epi64(__m128i __W, __mmask8 __U, void const *__P)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_cvtepu16_epi64(__mmask8 __U, __m128i __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_cvtepu32_pd(__m128i __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_mov_ps(__mmask8 __U, __m128 __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_permutex2var_epi64(__m256i __A, __mmask8 __U, __m256i __I, __m256i __B)
static __inline__ void __DEFAULT_FN_ATTRS128 _mm_mask_compressstoreu_pd(void *__P, __mmask8 __U, __m128d __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_unpacklo_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_broadcast_f32x4(__mmask8 __M, __m128 __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_permutexvar_epi32(__m256i __W, __mmask8 __M, __m256i __X, __m256i __Y)
static __inline__ void __DEFAULT_FN_ATTRS128 _mm_mask_storeu_pd(void *__P, __mmask8 __U, __m128d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_xor_epi64(__mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_maskz_rcp14_ps(__mmask8 __U, __m128 __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_fnmsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvtepu8_epi32(__m128i __W, __mmask8 __U, __m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_and_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask3_fnmadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_set1_epi64(__mmask8 __M, long long __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvtusepi32_epi16(__m128i __O, __mmask8 __M, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_cvtsepi64_epi16(__mmask8 __M, __m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_cvtps_epu32(__mmask8 __U, __m256 __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_maskz_getexp_ps(__mmask8 __U, __m128 __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask_mul_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_movehdup_ps(__mmask8 __U, __m256 __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_permutexvar_epi64(__m256i __W, __mmask8 __M, __m256i __X, __m256i __Y)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_cvtepi64_epi16(__m128i __A)
#define _mm256_cmpneq_epi32_mask(A, B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_cvtepu16_epi32(__mmask8 __U, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_srl_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_sra_epi32(__mmask8 __U, __m256i __A, __m128i __B)
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_broadcastsd_pd(__m256d __O, __mmask8 __M, __m128d __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_maskz_load_pd(__mmask8 __U, void const *__P)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_rorv_epi32(__m128i __A, __m128i __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_cvtepu32_ps(__m128i __A)
#define _mm256_mask_cmpneq_epi32_mask(k, A, B)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_maskz_sqrt_pd(__mmask8 __U, __m128d __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_or_epi32(__mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_broadcastd_epi32(__m128i __O, __mmask8 __M, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvtusepi64_epi32(__m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_sllv_epi64(__mmask8 __U, __m128i __X, __m128i __Y)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_blend_epi64(__mmask8 __U, __m256i __A, __m256i __W)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_maskz_cvtsepi64_epi16(__mmask8 __M, __m256i __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_broadcastss_ps(__m128 __O, __mmask8 __M, __m128 __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask_div_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_maskz_div_pd(__mmask8 __U, __m128d __A, __m128d __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_maskz_sub_ps(__mmask8 __U, __m128 __A, __m128 __B)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_mask3_fmaddsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_maskz_cvtepi32_epi16(__mmask8 __M, __m256i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_cvtsepi64_epi8(__mmask8 __M, __m128i __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask_scalef_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask3_fmadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_min_epi64(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_min_epi32(__mmask8 __M, __m128i __A, __m128i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_unpacklo_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_mask_fmsubadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvtsepi64_epi8(__m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_cvtepi32_epi64(__mmask8 __U, __m128i __X)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_mask_max_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_maskz_sqrt_pd(__mmask8 __U, __m256d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvtps_epu32(__m128i __W, __mmask8 __U, __m128 __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_expandloadu_epi32(__mmask8 __U, void const *__P)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvtepu16_epi32(__m128i __W, __mmask8 __U, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_or_epi64(__m128i __a, __m128i __b)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_blend_epi32(__mmask8 __U, __m128i __A, __m128i __W)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_mask_rsqrt14_pd(__m256d __W, __mmask8 __U, __m256d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvtepu16_epi64(__m128i __W, __mmask8 __U, __m128i __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_blend_ps(__mmask8 __U, __m128 __A, __m128 __W)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_cvtepi8_epi64(__mmask8 __U, __m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_sra_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvtsepi64_epi32(__m128i __O, __mmask8 __M, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtsepi32_epi8(__m128i __O, __mmask8 __M, __m256i __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_permutex2var_ps(__mmask8 __U, __m256 __A, __m256i __I, __m256 __B)
static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_permutex2var_pd(__m128d __A, __mmask8 __U, __m128i __I, __m128d __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvtsepi32_epi8(__m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_cvtepu8_epi32(__mmask8 __U, __m128i __A)
static __inline__ __mmask8 __DEFAULT_FN_ATTRS256 _mm256_mask_test_epi64_mask(__mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_maskz_min_pd(__mmask8 __U, __m128d __A, __m128d __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask_sub_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B)
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_unpacklo_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask_expand_pd(__m128d __W, __mmask8 __U, __m128d __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_maskz_compress_ps(__mmask8 __U, __m128 __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_maskz_scalef_ps(__mmask8 __U, __m128 __A, __m128 __B)
#define _mm_cmpeq_epi64_mask(A, B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_loadu_epi64(__m256i __W, __mmask8 __U, void const *__P)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_maskz_getexp_ps(__mmask8 __U, __m256 __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_srli_epi64(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_mask_div_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_rsqrt14_pd(__m128d __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_getexp_pd(__m128d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_sll_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_fmadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask_fmsubadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_maskz_div_pd(__mmask8 __U, __m256d __A, __m256d __B)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_broadcastss_ps(__mmask8 __M, __m128 __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_mask_movedup_pd(__m256d __W, __mmask8 __U, __m256d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_cvtusepi64_epi16(__mmask8 __M, __m128i __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_mov_pd(__mmask8 __U, __m128d __A)
static __inline__ void __DEFAULT_FN_ATTRS256 _mm256_mask_compressstoreu_ps(void *__P, __mmask8 __U, __m256 __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_srav_epi32(__mmask8 __U, __m256i __X, __m256i __Y)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_maskz_expandloadu_pd(__mmask8 __U, void const *__P)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_sra_epi64(__mmask8 __U, __m256i __A, __m128i __B)
static __inline __m128i __DEFAULT_FN_ATTRS128 _mm_load_epi32(void const *__P)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_broadcastd_epi32(__mmask8 __M, __m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_rorv_epi64(__mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask3_fnmsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U)
static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_cvtepu32_pd(__m128d __W, __mmask8 __U, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_cvtsepi64_epi32(__m256i __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask_div_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_moveldup_ps(__m128 __W, __mmask8 __U, __m128 __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_mask_sqrt_pd(__m256d __W, __mmask8 __U, __m256d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvtsepi32_epi8(__m128i __O, __mmask8 __M, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_mask_cvttpd_epu32(__m128i __W, __mmask8 __U, __m256d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvtusepi32_epi8(__m128i __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_maskz_max_pd(__mmask8 __U, __m128d __A, __m128d __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_mov_epi64(__mmask8 __U, __m128i __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_broadcastss_ps(__m256 __O, __mmask8 __M, __m128 __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_cvtepi8_epi32(__mmask8 __U, __m128i __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask_max_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_rolv_epi32(__mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask_getexp_ps(__m128 __W, __mmask8 __U, __m128 __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask_expandloadu_pd(__m128d __W, __mmask8 __U, void const *__P)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_abs_epi32(__mmask8 __U, __m128i __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask2_permutex2var_ps(__m256 __A, __m256i __I, __mmask8 __U, __m256 __B)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask3_fnmadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_maskz_cvtusepi64_epi8(__mmask8 __M, __m256i __A)
static __inline__ void __DEFAULT_FN_ATTRS256 _mm256_mask_cvtepi32_storeu_epi8(void *__P, __mmask8 __M, __m256i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_unpacklo_epi64(__mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvtepi8_epi32(__m128i __W, __mmask8 __U, __m128i __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_permutex2var_ps(__m256 __A, __m256i __I, __m256 __B)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_unpacklo_ps(__mmask8 __U, __m256 __A, __m256 __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_cvtepu32_ps(__mmask8 __U, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_sra_epi32(__mmask8 __U, __m128i __A, __m128i __B)
static __inline __m256i __DEFAULT_FN_ATTRS256 _mm256_load_epi64(void const *__P)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_mask3_fmsubadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_maskz_cvtph_ps(__mmask8 __U, __m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_cvtepu16_epi32(__mmask8 __U, __m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_blend_epi32(__mmask8 __U, __m256i __A, __m256i __W)
static __inline__ __m128 __DEFAULT_FN_ATTRS256 _mm256_maskz_cvtpd_ps(__mmask8 __U, __m256d __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_maskz_rcp14_pd(__mmask8 __U, __m128d __A)
static __inline__ void __DEFAULT_FN_ATTRS256 _mm256_mask_cvtsepi32_storeu_epi16(void *__P, __mmask8 __M, __m256i __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask_sub_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_cvtpd_epu32(__m256d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_expand_epi32(__m128i __W, __mmask8 __U, __m128i __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_fmsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_broadcastq_epi64(__m256i __O, __mmask8 __M, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtusepi64_epi32(__m128i __O, __mmask8 __M, __m256i __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_getexp_pd(__m256d __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_fmsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_srlv_epi32(__mmask8 __U, __m256i __X, __m256i __Y)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_broadcastss_ps(__mmask8 __M, __m128 __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_mul_epu32(__mmask8 __M, __m256i __X, __m256i __Y)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_mask_load_ps(__m256 __W, __mmask8 __U, void const *__P)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_srlv_epi64(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_mul_epi32(__m128i __W, __mmask8 __M, __m128i __X, __m128i __Y)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvttps_epi32(__m128i __W, __mmask8 __U, __m128 __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_unpacklo_pd(__mmask8 __U, __m128d __A, __m128d __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_unpacklo_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_srai_epi32(__m256i __W, __mmask8 __U, __m256i __A, unsigned int __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_add_epi64(__mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvtsepi32_epi16(__m128i __O, __mmask8 __M, __m128i __A)
static __inline__ void __DEFAULT_FN_ATTRS128 _mm_mask_cvtusepi64_storeu_epi32(void *__P, __mmask8 __M, __m128i __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_maskz_add_ps(__mmask8 __U, __m256 __A, __m256 __B)
static __inline__ void __DEFAULT_FN_ATTRS256 _mm256_mask_compressstoreu_epi32(void *__P, __mmask8 __U, __m256i __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask3_fmsubadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_max_epi32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_andnot_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_cvttpd_epu32(__m256d __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_min_epi64(__mmask8 __M, __m256i __A, __m256i __B)
static __inline void __DEFAULT_FN_ATTRS128 _mm_store_epi32(void *__P, __m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_sub_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_cvtepi16_epi64(__mmask8 __U, __m128i __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask_max_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B)
#define _mm256_permutexvar_epi32(A, B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_sllv_epi64(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvtepi8_epi64(__m128i __W, __mmask8 __U, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_srai_epi64(__m128i __A, unsigned int __imm)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_or_epi32(__m256i __a, __m256i __b)
static __inline__ void __DEFAULT_FN_ATTRS128 _mm_mask_storeu_epi64(void *__P, __mmask8 __U, __m128i __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_permutex2var_ps(__m256 __A, __mmask8 __U, __m256i __I, __m256 __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask3_fmadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_broadcast_i32x4(__mmask8 __M, __m128i __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_maskz_movedup_pd(__mmask8 __U, __m128d __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_maskz_fmaddsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtepu8_epi32(__m256i __W, __mmask8 __U, __m128i __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask_loadu_pd(__m128d __W, __mmask8 __U, void const *__P)
static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_fnmadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvttpd_epi32(__m128i __W, __mmask8 __U, __m128d __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS256 _mm256_mask_cvtpd_ps(__m128 __W, __mmask8 __U, __m256d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_set1_epi32(__mmask8 __M, int __A)
static __inline__ __mmask8 __DEFAULT_FN_ATTRS256 _mm256_testn_epi32_mask(__m256i __A, __m256i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_expandloadu_epi32(__m256i __W, __mmask8 __U, void const *__P)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_maskz_max_ps(__mmask8 __U, __m256 __A, __m256 __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_slli_epi64(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_maskz_load_ps(__mmask8 __U, void const *__P)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_xor_epi64(__m256i __a, __m256i __b)
static __inline__ void __DEFAULT_FN_ATTRS256 _mm256_mask_cvtusepi64_storeu_epi8(void *__P, __mmask8 __M, __m256i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_load_epi32(__mmask8 __U, void const *__P)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_expandloadu_epi64(__mmask8 __U, void const *__P)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_cvtusepi32_epi16(__mmask8 __M, __m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_mov_epi32(__mmask8 __U, __m256i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_sllv_epi64(__mmask8 __U, __m256i __X, __m256i __Y)
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask3_fnmadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U)
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_unpackhi_pd(__mmask8 __U, __m256d __A, __m256d __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_fmadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C)
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_cvtepi32_pd(__m256d __W, __mmask8 __U, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_cvtepu8_epi32(__mmask8 __U, __m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_min_epu32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtpd_epu32(__m128i __W, __mmask8 __U, __m256d __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_permutex2var_epi32(__m256i __A, __mmask8 __U, __m256i __I, __m256i __B)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_maskz_div_ps(__mmask8 __U, __m256 __A, __m256 __B)
static __inline __m256i __DEFAULT_FN_ATTRS256 _mm256_loadu_epi32(void const *__P)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_fnmsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C)
static __inline__ __mmask8 __DEFAULT_FN_ATTRS256 _mm256_mask_testn_epi32_mask(__mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_and_epi64(__m256i __a, __m256i __b)
static __inline__ void __DEFAULT_FN_ATTRS256 _mm256_mask_storeu_pd(void *__P, __mmask8 __U, __m256d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_srlv_epi32(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)
static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_permutex2var_pd(__mmask8 __U, __m128d __A, __m128i __I, __m128d __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_broadcastq_epi64(__mmask8 __M, __m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_max_epi32(__mmask8 __M, __m256i __A, __m256i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtepi16_epi64(__m256i __W, __mmask8 __U, __m128i __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_cvtepu32_pd(__mmask8 __U, __m128i __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_broadcast_f32x4(__m128 __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_mov_epi64(__m128i __W, __mmask8 __U, __m128i __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_maskz_expand_pd(__mmask8 __U, __m256d __A)
#define _mm256_cmpeq_epi64_mask(A, B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvtsepi32_epi16(__m128i __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_mask_fmaddsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_max_epu64(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_cvtepi16_epi32(__mmask8 __U, __m128i __A)
#define _mm256_mask_cmpeq_epi32_mask(k, A, B)
static __inline__ __m256i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm256_maskz_mullo_epi32(__mmask8 __M, __m256i __A, __m256i __B)
static __inline__ void __DEFAULT_FN_ATTRS256 _mm256_mask_cvtusepi64_storeu_epi16(void *__P, __mmask8 __M, __m256i __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_mask_loadu_ps(__m256 __W, __mmask8 __U, void const *__P)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_max_epu32(__mmask8 __M, __m256i __A, __m256i __B)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_scalef_pd(__m256d __A, __m256d __B)
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_fmsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_srai_epi64(__m256i __W, __mmask8 __U, __m256i __A, unsigned int __imm)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_maskz_expandloadu_ps(__mmask8 __U, void const *__P)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_mov_ps(__mmask8 __U, __m256 __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvtepu32_epi64(__m128i __W, __mmask8 __U, __m128i __X)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_unpacklo_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_max_epu64(__mmask8 __M, __m256i __A, __m256i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_broadcastq_epi64(__mmask8 __M, __m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_mul_epi32(__m256i __W, __mmask8 __M, __m256i __X, __m256i __Y)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvtps_epi32(__m128i __W, __mmask8 __U, __m128 __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask3_fmsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_slli_epi32(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_srai_epi32(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtusepi64_epi8(__m128i __O, __mmask8 __M, __m256i __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_maskz_expand_ps(__mmask8 __U, __m256 __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_or_epi64(__mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_broadcastd_epi32(__mmask8 __M, __m128i __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_unpackhi_pd(__mmask8 __U, __m128d __A, __m128d __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_sra_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_maskz_expand_ps(__mmask8 __U, __m128 __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_maskz_max_ps(__mmask8 __U, __m128 __A, __m128 __B)
static __inline__ void __DEFAULT_FN_ATTRS256 _mm256_mask_cvtsepi64_storeu_epi16(void *__P, __mmask8 __M, __m256i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_and_epi32(__m256i __a, __m256i __b)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_blend_ps(__mmask8 __U, __m256 __A, __m256 __W)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_expand_epi64(__mmask8 __U, __m256i __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_fmadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_maskz_permutevar_pd(__mmask8 __U, __m128d __A, __m128i __C)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_moveldup_ps(__m256 __W, __mmask8 __U, __m256 __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_andnot_epi64(__m128i __A, __m128i __B)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_fnmadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_broadcast_i32x4(__m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_min_epu64(__m128i __A, __m128i __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_mov_ps(__m128 __W, __mmask8 __U, __m128 __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_abs_epi32(__m256i __W, __mmask8 __U, __m256i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_maskz_cvtsepi64_epi32(__mmask8 __M, __m256i __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask_compress_ps(__m128 __W, __mmask8 __U, __m128 __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_expand_epi64(__m256i __W, __mmask8 __U, __m256i __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_cvtepu32_pd(__mmask8 __U, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_cvttps_epu32(__mmask8 __U, __m128 __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_maskz_load_pd(__mmask8 __U, void const *__P)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_mask_permutevar_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256i __C)
static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_fmsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_compress_epi32(__m128i __W, __mmask8 __U, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvtepi16_epi32(__m128i __W, __mmask8 __U, __m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_permutex2var_epi32(__m256i __A, __m256i __I, __m256i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_cvtsepi32_epi8(__m256i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_sll_epi32(__mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_abs_epi64(__m256i __W, __mmask8 __U, __m256i __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_broadcast_f32x4(__m256 __O, __mmask8 __M, __m128 __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_sra_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B)
static __inline void __DEFAULT_FN_ATTRS256 _mm256_storeu_epi64(void *__P, __m256i __A)
#define _mm_cmpneq_epi64_mask(A, B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_and_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __mmask8 __DEFAULT_FN_ATTRS128 _mm_mask_test_epi32_mask(__mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_cvtusepi64_epi8(__m256i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_cvttps_epu32(__m256i __W, __mmask8 __U, __m256 __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_sllv_epi32(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvtsepi64_epi32(__m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_cvtepi64_epi16(__mmask8 __M, __m128i __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask_cvtps_pd(__m128d __W, __mmask8 __U, __m128 __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_mask_load_pd(__m256d __W, __mmask8 __U, void const *__P)
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_broadcastsd_pd(__mmask8 __M, __m128d __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask_expand_ps(__m128 __W, __mmask8 __U, __m128 __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_rorv_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_rorv_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask3_fmadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U)
static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask3_fnmadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvtepi64_epi8(__m128i __O, __mmask8 __M, __m128i __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_maskz_scalef_ps(__mmask8 __U, __m256 __A, __m256 __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_expand_epi32(__mmask8 __U, __m256i __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask3_fnmsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_permutexvar_epi32(__mmask8 __M, __m256i __X, __m256i __Y)
static __inline__ void __DEFAULT_FN_ATTRS256 _mm256_mask_cvtepi64_storeu_epi8(void *__P, __mmask8 __M, __m256i __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_permutex2var_ps(__m128 __A, __m128i __I, __m128 __B)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_cvtepi32_ps(__mmask8 __U, __m256i __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask_getexp_pd(__m128d __W, __mmask8 __U, __m128d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_andnot_epi64(__mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_maskz_max_pd(__mmask8 __U, __m256d __A, __m256d __B)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_mask_expandloadu_pd(__m256d __W, __mmask8 __U, void const *__P)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_fnmadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_max_epu32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask_min_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B)
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_fmadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C)
static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_unpacklo_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B)
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_fnmadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C)
#define _mm256_cmpeq_epi32_mask(A, B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_sub_epi64(__mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_permutexvar_pd(__m256i __X, __m256d __Y)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask3_fnmsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U)
static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_cvtepi64_epi16(__m256i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_max_epi64(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_permutex2var_epi64(__m256i __A, __m256i __I, __m256i __B)
static __inline__ void __DEFAULT_FN_ATTRS128 _mm_mask_cvtusepi64_storeu_epi8(void *__P, __mmask8 __M, __m128i __A)
#define _mm_cmpeq_epi32_mask(A, B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_cvtepi16_epi64(__mmask8 __U, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_min_epu32(__mmask8 __M, __m128i __A, __m128i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_srl_epi64(__mmask8 __U, __m256i __A, __m128i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_mul_epi32(__mmask8 __M, __m128i __X, __m128i __Y)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_srli_epi32(__mmask8 __U, __m128i __A, unsigned int __B)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_maskz_scalef_pd(__mmask8 __U, __m128d __A, __m128d __B)
static __inline__ __mmask8 __DEFAULT_FN_ATTRS128 _mm_testn_epi32_mask(__m128i __A, __m128i __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_maskz_fmaddsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask3_fmsubadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_and_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_srav_epi64(__mmask8 __U, __m256i __X, __m256i __Y)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_mask_div_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_srav_epi64(__mmask8 __U, __m128i __X, __m128i __Y)
static __inline__ __mmask8 __DEFAULT_FN_ATTRS256 _mm256_test_epi64_mask(__m256i __A, __m256i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_cvtpd_epi32(__mmask8 __U, __m128d __A)
static __inline__ __mmask8 __DEFAULT_FN_ATTRS128 _mm_mask_testn_epi32_mask(__mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_maskz_permutevar_pd(__mmask8 __U, __m256d __A, __m256i __C)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_xor_epi64(__mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_fnmsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_max_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_movehdup_ps(__m128 __W, __mmask8 __U, __m128 __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_mask_fmsubadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_and_epi32(__m128i __a, __m128i __b)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_scalef_ps(__m128 __A, __m128 __B)
static __inline__ void __DEFAULT_FN_ATTRS128 _mm_mask_store_ps(void *__P, __mmask8 __U, __m128 __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_rorv_epi32(__mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_permutex2var_pd(__m128d __A, __m128i __I, __m128d __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_fmadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask2_permutex2var_epi32(__m128i __A, __m128i __I, __mmask8 __U, __m128i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_srai_epi64(__mmask8 __U, __m128i __A, unsigned int __imm)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_min_epi64(__m128i __A, __m128i __B)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_mask_permutevar_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256i __C)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_maskz_permutexvar_ps(__mmask8 __U, __m256i __X, __m256 __Y)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_rolv_epi32(__m256i __A, __m256i __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_maskz_permutevar_ps(__mmask8 __U, __m128 __A, __m128i __C)
static __inline__ void __DEFAULT_FN_ATTRS256 _mm256_mask_cvtepi32_storeu_epi16(void *__P, __mmask8 __M, __m256i __A)
static __inline__ void __DEFAULT_FN_ATTRS256 _mm256_mask_storeu_epi64(void *__P, __mmask8 __U, __m256i __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask3_fmsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U)
static __inline__ void __DEFAULT_FN_ATTRS256 _mm256_mask_cvtusepi64_storeu_epi32(void *__P, __mmask8 __M, __m256i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_compress_epi32(__mmask8 __U, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_andnot_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_xor_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvtsepi64_epi8(__m128i __O, __mmask8 __M, __m128i __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_movehdup_ps(__m256 __W, __mmask8 __U, __m256 __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtepi8_epi64(__m256i __W, __mmask8 __U, __m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_sub_epi64(__mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_mask_scalef_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_max_epu64(__mmask8 __M, __m128i __A, __m128i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_cvtepu16_epi64(__mmask8 __U, __m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_set1_epi32(__mmask8 __M, int __A)
static __inline__ __mmask8 __DEFAULT_FN_ATTRS256 _mm256_mask_test_epi32_mask(__mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_rolv_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_or_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_moveldup_ps(__mmask8 __U, __m128 __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_cvtusepi64_epi32(__mmask8 __M, __m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_cvttps_epi32(__mmask8 __U, __m256 __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_cvtepi32_pd(__m128d __W, __mmask8 __U, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_cvtepi64_epi8(__mmask8 __M, __m128i __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_unpacklo_ps(__mmask8 __U, __m128 __A, __m128 __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_expandloadu_epi64(__mmask8 __U, void const *__P)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_mask_compress_pd(__m256d __W, __mmask8 __U, __m256d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_srai_epi32(__mmask8 __U, __m128i __A, unsigned int __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtepi32_epi16(__m128i __O, __mmask8 __M, __m256i __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_cvtepu32_ps(__m256i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtepi64_epi16(__m128i __O, __mmask8 __M, __m256i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_or_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvttps_epu32(__m128 __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_cvtusepi32_epi16(__m256i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_unpacklo_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
static __inline__ void __DEFAULT_FN_ATTRS128 _mm_mask_store_pd(void *__P, __mmask8 __U, __m128d __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask_add_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B)
short __v2hi __attribute__((__vector_size__(4)))
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_maskz_cvtusepi64_epi32(__mmask8 __M, __m256i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_or_epi32(__m128i __a, __m128i __b)
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_permutex2var_pd(__mmask8 __U, __m256d __A, __m256i __I, __m256d __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_set1_epi64(__m256i __O, __mmask8 __M, long long __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_min_epu64(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_mullo_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_and_epi32(__mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_mask_min_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_rolv_epi32(__m128i __A, __m128i __B)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_cvtepi32_ps(__m256 __W, __mmask8 __U, __m256i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_permutex2var_epi64(__mmask8 __U, __m128i __A, __m128i __I, __m128i __B)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_scalef_ps(__m256 __A, __m256 __B)
#define _mm256_permutexvar_ps(A, B)
static __inline__ void __DEFAULT_FN_ATTRS128 _mm_mask_compressstoreu_epi64(void *__P, __mmask8 __U, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_cvtsepi64_epi16(__m256i __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_fnmadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvtusepi64_epi16(__m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtepi16_epi32(__m256i __W, __mmask8 __U, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvtepi16_epi64(__m128i __W, __mmask8 __U, __m128i __A)
static __inline__ void __DEFAULT_FN_ATTRS128 _mm_mask_storeu_ps(void *__P, __mmask8 __U, __m128 __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_mask_sub_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_compress_epi32(__m256i __W, __mmask8 __U, __m256i __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_fnmadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C)
static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_blend_pd(__mmask8 __U, __m128d __A, __m128d __W)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_mask_cvtps_pd(__m256d __W, __mmask8 __U, __m128 __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_abs_epi64(__m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_rorv_epi32(__m256i __A, __m256i __B)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_maskz_sub_pd(__mmask8 __U, __m128d __A, __m128d __B)
static __inline__ void __DEFAULT_FN_ATTRS128 _mm_mask_store_epi64(void *__P, __mmask8 __U, __m128i __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask_rcp14_ps(__m128 __W, __mmask8 __U, __m128 __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_maskz_expandloadu_pd(__mmask8 __U, void const *__P)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_unpacklo_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_sll_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvtusepi32_epi8(__m128i __O, __mmask8 __M, __m128i __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_mov_pd(__mmask8 __U, __m256d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_abs_epi64(__mmask8 __U, __m128i __A)
static __inline __m128i __DEFAULT_FN_ATTRS128 _mm_load_epi64(void const *__P)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_cvtepu32_epi64(__mmask8 __U, __m128i __X)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_srli_epi64(__mmask8 __U, __m128i __A, unsigned int __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_permutex2var_epi64(__mmask8 __U, __m256i __A, __m256i __I, __m256i __B)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_rcp14_ps(__m256 __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_unpackhi_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_srlv_epi64(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_permutexvar_epi64(__m256i __X, __m256i __Y)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtepu8_epi64(__m256i __W, __mmask8 __U, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_and_epi64(__m128i __a, __m128i __b)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_maskz_load_ps(__mmask8 __U, void const *__P)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_cvtepu32_ps(__mmask8 __U, __m256i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_compress_epi64(__mmask8 __U, __m256i __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_rcp14_pd(__m128d __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_sll_epi64(__mmask8 __U, __m256i __A, __m128i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_cvtepu8_epi64(__mmask8 __U, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_mul_epu32(__m128i __W, __mmask8 __M, __m128i __X, __m128i __Y)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvttps_epu32(__m128i __W, __mmask8 __U, __m128 __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_cvttpd_epu32(__mmask8 __U, __m128d __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_fmsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_mul_epi32(__mmask8 __M, __m256i __X, __m256i __Y)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_mask_compress_ps(__m256 __W, __mmask8 __U, __m256 __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_blend_pd(__mmask8 __U, __m256d __A, __m256d __W)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_rsqrt14_ps(__m256 __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask_movedup_pd(__m128d __W, __mmask8 __U, __m128d __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtps_epi32(__m256i __W, __mmask8 __U, __m256 __A)
static __inline__ void __DEFAULT_FN_ATTRS256 _mm256_mask_store_ps(void *__P, __mmask8 __U, __m256 __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_permutex2var_epi32(__mmask8 __U, __m128i __A, __m128i __I, __m128i __B)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_maskz_add_pd(__mmask8 __U, __m256d __A, __m256d __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_movehdup_ps(__mmask8 __U, __m128 __A)
#define _mm_mask_cmpneq_epi64_mask(k, A, B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_abs_epi64(__m256i __A)
static __inline__ __mmask8 __DEFAULT_FN_ATTRS128 _mm_mask_testn_epi64_mask(__mmask8 __U, __m128i __A, __m128i __B)
static __inline__ void __DEFAULT_FN_ATTRS256 _mm256_mask_cvtsepi64_storeu_epi8(void *__P, __mmask8 __M, __m256i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_cvttps_epu32(__m256 __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_compress_epi32(__mmask8 __U, __m256i __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_maskz_cvtpd_ps(__mmask8 __U, __m128d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_maskz_cvtpd_epi32(__mmask8 __U, __m256d __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_maskz_sub_ps(__mmask8 __U, __m256 __A, __m256 __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_max_epi64(__mmask8 __M, __m256i __A, __m256i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_min_epi32(__mmask8 __M, __m256i __A, __m256i __B)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_maskz_compress_ps(__mmask8 __U, __m256 __A)
static __inline__ void __DEFAULT_FN_ATTRS256 _mm256_mask_store_epi32(void *__P, __mmask8 __U, __m256i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_srli_epi32(__m256i __W, __mmask8 __U, __m256i __A, unsigned int __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_cvtepi64_epi8(__m256i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_cvttps_epi32(__m256i __W, __mmask8 __U, __m256 __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_loadu_epi32(__m128i __W, __mmask8 __U, void const *__P)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_mov_epi64(__mmask8 __U, __m256i __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_mask_cvtph_ps(__m256 __W, __mmask8 __U, __m128i __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_maskz_fmsubadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask_sqrt_pd(__m128d __W, __mmask8 __U, __m128d __A)
static __inline__ void __DEFAULT_FN_ATTRS128 _mm_mask_cvtusepi64_storeu_epi16(void *__P, __mmask8 __M, __m128i __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask_rcp14_pd(__m128d __W, __mmask8 __U, __m128d __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_and_epi64(__mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_sub_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
static __inline void __DEFAULT_FN_ATTRS256 _mm256_storeu_epi32(void *__P, __m256i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_cvtepi32_epi16(__m256i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_cvtusepi64_epi16(__m256i __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask2_permutex2var_ps(__m128 __A, __m128i __I, __mmask8 __U, __m128 __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtepi32_epi64(__m256i __W, __mmask8 __U, __m128i __X)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtsepi64_epi16(__m128i __O, __mmask8 __M, __m256i __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_mask_max_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B)
static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_fmadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_rorv_epi64(__m256i __A, __m256i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_cvtps_epu32(__mmask8 __U, __m128 __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_add_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_maskz_rsqrt14_ps(__mmask8 __U, __m128 __A)
static __inline__ void __DEFAULT_FN_ATTRS256 _mm256_mask_compressstoreu_pd(void *__P, __mmask8 __U, __m256d __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_unpackhi_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_permutex2var_epi32(__m128i __A, __m128i __I, __m128i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask2_permutex2var_epi64(__m128i __A, __m128i __I, __mmask8 __U, __m128i __B)
static __inline__ void __DEFAULT_FN_ATTRS128 _mm_mask_cvtsepi64_storeu_epi8(void *__P, __mmask8 __M, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvtsepi64_epi16(__m128i __O, __mmask8 __M, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_srl_epi32(__mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_set1_epi32(__m256i __O, __mmask8 __M, int __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_maskz_cvtusepi64_epi16(__mmask8 __M, __m256i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_max_epu64(__m256i __A, __m256i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_rolv_epi64(__m256i __A, __m256i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_rolv_epi64(__mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask_loadu_ps(__m128 __W, __mmask8 __U, void const *__P)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_maskz_cvtpd_epu32(__mmask8 __U, __m256d __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_xor_epi32(__m256i __a, __m256i __b)
#define _mm_mask_cmpeq_epi32_mask(k, A, B)
static __inline__ __mmask8 __DEFAULT_FN_ATTRS128 _mm_testn_epi64_mask(__m128i __A, __m128i __B)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_maskz_add_pd(__mmask8 __U, __m128d __A, __m128d __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_rolv_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask_fmsubadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_max_epu64(__m128i __A, __m128i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_cvtepi32_epi8(__m256i __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_maskz_permutexvar_pd(__mmask8 __U, __m256i __X, __m256d __Y)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_srai_epi64(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __imm)
static __inline__ void __DEFAULT_FN_ATTRS256 _mm256_mask_cvtepi64_storeu_epi32(void *__P, __mmask8 __M, __m256i __A)
static __inline__ __mmask8 __DEFAULT_FN_ATTRS256 _mm256_testn_epi64_mask(__m256i __A, __m256i __B)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_maskz_expand_pd(__mmask8 __U, __m128d __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_maskz_sub_pd(__mmask8 __U, __m256d __A, __m256d __B)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_mask_scalef_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_expandloadu_epi32(__mmask8 __U, void const *__P)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask_cvtpd_ps(__m128 __W, __mmask8 __U, __m128d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_sra_epi64(__m128i __A, __m128i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_permutex2var_epi32(__mmask8 __U, __m256i __A, __m256i __I, __m256i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_expand_epi32(__m256i __W, __mmask8 __U, __m256i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_sub_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_srav_epi64(__m128i __X, __m128i __Y)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_slli_epi64(__m256i __W, __mmask8 __U, __m256i __A, unsigned int __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvtepi32_epi8(__m128i __O, __mmask8 __M, __m128i __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_maskz_min_ps(__mmask8 __U, __m128 __A, __m128 __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_srav_epi64(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_andnot_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtepi64_epi8(__m128i __O, __mmask8 __M, __m256i __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_fnmsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask_fmaddsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C)
#define _mm_mask_cmpeq_epi64_mask(k, A, B)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_maskz_mul_ps(__mmask8 __U, __m256 __A, __m256 __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_sllv_epi32(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_srli_epi64(__mmask8 __U, __m256i __A, unsigned int __B)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_maskz_loadu_ps(__mmask8 __U, void const *__P)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_mask_getexp_pd(__m256d __W, __mmask8 __U, __m256d __A)
static __inline__ __mmask8 __DEFAULT_FN_ATTRS128 _mm_mask_test_epi64_mask(__mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_mov_epi32(__mmask8 __U, __m128i __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_mask_expand_ps(__m256 __W, __mmask8 __U, __m256 __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_sllv_epi64(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_add_epi64(__mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_permutex2var_epi32(__m128i __A, __mmask8 __U, __m128i __I, __m128i __B)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_maskz_cvtph_ps(__mmask8 __U, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_cvtepi8_epi32(__mmask8 __U, __m128i __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_fnmsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_mask_mul_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_sub_epi32(__mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_cvtepu8_epi64(__mmask8 __U, __m128i __A)
#define _mm256_mask_cmpeq_epi64_mask(k, A, B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_sra_epi64(__m256i __A, __m128i __B)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_maskz_scalef_pd(__mmask8 __U, __m256d __A, __m256d __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_cvtepi64_epi32(__m256i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_andnot_epi32(__m128i __A, __m128i __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_permutex2var_ps(__m128 __A, __mmask8 __U, __m128i __I, __m128 __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_slli_epi32(__mmask8 __U, __m128i __A, unsigned int __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_srav_epi32(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_maskz_cvtepi32_epi8(__mmask8 __M, __m256i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_mullo_epi32(__mmask8 __M, __m128i __A, __m128i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_set1_epi32(__m128i __O, __mmask8 __M, int __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_cvtsepi32_epi16(__mmask8 __M, __m128i __A)
static __inline void __DEFAULT_FN_ATTRS256 _mm256_store_epi64(void *__P, __m256i __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_fmsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C)
static __inline__ void __DEFAULT_FN_ATTRS256 _mm256_mask_cvtepi64_storeu_epi16(void *__P, __mmask8 __M, __m256i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_load_epi64(__mmask8 __U, void const *__P)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_andnot_epi32(__m256i __A, __m256i __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_rsqrt14_ps(__m128 __A)
static __inline__ void __DEFAULT_FN_ATTRS256 _mm256_mask_storeu_ps(void *__P, __mmask8 __U, __m256 __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_sllv_epi32(__mmask8 __U, __m256i __X, __m256i __Y)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_xor_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_min_epu64(__mmask8 __M, __m128i __A, __m128i __B)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_mask_expandloadu_ps(__m256 __W, __mmask8 __U, void const *__P)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask3_fmaddsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask2_permutex2var_epi32(__m256i __A, __m256i __I, __mmask8 __U, __m256i __B)
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_fnmsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_maskz_fmaddsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_unpackhi_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_max_epi64(__mmask8 __M, __m128i __A, __m128i __B)
static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask2_permutex2var_pd(__m128d __A, __m128i __I, __mmask8 __U, __m128d __B)
static __inline__ void __DEFAULT_FN_ATTRS256 _mm256_mask_cvtusepi32_storeu_epi16(void *__P, __mmask8 __M, __m256i __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_rsqrt14_pd(__m256d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_rorv_epi64(__mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_mask_fmaddsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_getexp_ps(__m128 __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_mask_mul_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_unpackhi_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_compress_epi64(__mmask8 __U, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_min_epi64(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_maskz_fmsubadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_unpackhi_epi32(__mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvtps_epu32(__m128 __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_unpackhi_ps(__mmask8 __U, __m128 __A, __m128 __B)
static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_mov_pd(__m128d __W, __mmask8 __U, __m128d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvtusepi64_epi8(__m128i __O, __mmask8 __M, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_cvtsepi64_epi32(__mmask8 __M, __m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_load_epi32(__mmask8 __U, void const *__P)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_cvtusepi32_epi8(__mmask8 __M, __m128i __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_getexp_ps(__m256 __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_min_epu32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B)
static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_unpackhi_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_maskz_mul_ps(__mmask8 __U, __m128 __A, __m128 __B)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_maskz_cvtps_pd(__mmask8 __U, __m128 __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask2_permutex2var_pd(__m256d __A, __m256i __I, __mmask8 __U, __m256d __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_cvtepi8_epi64(__mmask8 __U, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvtepi32_epi64(__m128i __W, __mmask8 __U, __m128i __X)
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_cvtepu32_pd(__m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_rolv_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_broadcastd_epi32(__m256i __O, __mmask8 __M, __m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_srai_epi64(__m256i __A, unsigned int __imm)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_max_epi64(__m128i __A, __m128i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_expand_epi32(__mmask8 __U, __m128i __A)
static __inline__ __mmask8 __DEFAULT_FN_ATTRS128 _mm_test_epi64_mask(__m128i __A, __m128i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_set1_epi64(__mmask8 __M, long long __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_srav_epi32(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtsepi64_epi32(__m128i __O, __mmask8 __M, __m256i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_add_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_maskz_loadu_pd(__mmask8 __U, void const *__P)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_or_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_maskz_rcp14_ps(__mmask8 __U, __m256 __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtepu32_epi64(__m256i __W, __mmask8 __U, __m128i __X)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvtpd_epu32(__m128d __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_slli_epi32(__m256i __W, __mmask8 __U, __m256i __A, unsigned int __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_permutex2var_epi64(__m128i __A, __m128i __I, __m128i __B)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_fmadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_maskz_compress_pd(__mmask8 __U, __m128d __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_load_epi32(__m256i __W, __mmask8 __U, void const *__P)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_abs_epi32(__m128i __W, __mmask8 __U, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_unpackhi_epi64(__mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_cvtepi64_epi32(__m128i __O, __mmask8 __M, __m256i __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask_fmaddsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_unpackhi_epi32(__mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_cvtpd_epu32(__mmask8 __U, __m128d __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_min_epu64(__m256i __A, __m256i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvtepu8_epi64(__m128i __W, __mmask8 __U, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_cvtps_epi32(__mmask8 __U, __m128 __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_rorv_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_cvttpd_epi32(__mmask8 __U, __m128d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_cvtusepi64_epi32(__m256i __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_maskz_rsqrt14_pd(__mmask8 __U, __m256d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_set1_epi64(__m128i __O, __mmask8 __M, long long __A)
static __inline__ void __DEFAULT_FN_ATTRS256 _mm256_mask_store_epi64(void *__P, __mmask8 __U, __m256i __A)
static __inline __m256i __DEFAULT_FN_ATTRS256 _mm256_load_epi32(void const *__P)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_srlv_epi64(__mmask8 __U, __m128i __X, __m128i __Y)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_maskz_fmaddsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_cvtepi32_epi8(__m128i __A)
static __inline__ void __DEFAULT_FN_ATTRS128 _mm_mask_cvtepi32_storeu_epi16(void *__P, __mmask8 __M, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_rorv_epi64(__m128i __A, __m128i __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_permutex2var_ps(__mmask8 __U, __m128 __A, __m128i __I, __m128 __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_permutexvar_epi64(__mmask8 __M, __m256i __X, __m256i __Y)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_maskz_cvtusepi32_epi16(__mmask8 __M, __m256i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_xor_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask_add_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_expandloadu_epi64(__m128i __W, __mmask8 __U, void const *__P)
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_cvtepu32_pd(__m256d __W, __mmask8 __U, __m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_broadcast_i32x4(__m256i __O, __mmask8 __M, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_max_epu32(__mmask8 __M, __m128i __A, __m128i __B)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_maskz_compress_pd(__mmask8 __U, __m256d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_slli_epi64(__mmask8 __U, __m128i __A, unsigned int __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_sub_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
static __inline__ void __DEFAULT_FN_ATTRS128 _mm_mask_cvtusepi32_storeu_epi16(void *__P, __mmask8 __M, __m128i __A)
static __inline__ void __DEFAULT_FN_ATTRS256 _mm256_mask_cvtsepi64_storeu_epi32(void *__P, __mmask8 __M, __m256i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_maskz_cvtepi64_epi8(__mmask8 __M, __m256i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_mul_epu32(__m256i __W, __mmask8 __M, __m256i __X, __m256i __Y)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_cvtsepi64_epi8(__m256i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_srav_epi32(__mmask8 __U, __m128i __X, __m128i __Y)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_maskz_sqrt_ps(__mmask8 __U, __m128 __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_unpacklo_epi64(__mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_andnot_epi32(__mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_maskz_sqrt_ps(__mmask8 __U, __m256 __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtusepi32_epi16(__m128i __O, __mmask8 __M, __m256i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_loadu_epi32(__m256i __W, __mmask8 __U, void const *__P)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_mov_epi32(__m256i __W, __mmask8 __U, __m256i __A)
static __inline void __DEFAULT_FN_ATTRS128 _mm_storeu_epi32(void *__P, __m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_slli_epi64(__mmask8 __U, __m256i __A, unsigned int __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask3_fmsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_rcp14_ps(__m128 __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask_permutevar_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128i __C)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtsepi64_epi8(__m128i __O, __mmask8 __M, __m256i __A)
static __inline __m256i __DEFAULT_FN_ATTRS256 _mm256_loadu_epi64(void const *__P)
static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_mask_sub_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask2_permutex2var_epi64(__m256i __A, __m256i __I, __mmask8 __U, __m256i __B)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_unpackhi_ps(__mmask8 __U, __m256 __A, __m256 __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_srli_epi32(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_loadu_epi32(__mmask8 __U, void const *__P)
static __inline__ void __DEFAULT_FN_ATTRS128 _mm_mask_cvtepi64_storeu_epi32(void *__P, __mmask8 __M, __m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_cvtps_epu32(__m256 __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_load_epi64(__mmask8 __U, void const *__P)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask_expandloadu_ps(__m128 __W, __mmask8 __U, void const *__P)
static __inline__ void __DEFAULT_FN_ATTRS128 _mm_mask_compressstoreu_ps(void *__P, __mmask8 __U, __m128 __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_max_epu64(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_cvtepu32_ps(__m256 __W, __mmask8 __U, __m256i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_srli_epi32(__mmask8 __U, __m256i __A, unsigned int __B)
static __inline void __DEFAULT_FN_ATTRS128 _mm_store_epi64(void *__P, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtsepi32_epi16(__m128i __O, __mmask8 __M, __m256i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_max_epu32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_and_epi64(__mmask8 __U, __m128i __A, __m128i __B)
#define _mm256_cmpneq_epi64_mask(A, B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvtpd_epu32(__m128i __W, __mmask8 __U, __m128d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_mask_cvttpd_epi32(__m128i __W, __mmask8 __U, __m256d __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_maskz_fmsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C)
static __inline __m128i __DEFAULT_FN_ATTRS128 _mm_loadu_epi32(void const *__P)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_rolv_epi64(__m128i __A, __m128i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtepu16_epi32(__m256i __W, __mmask8 __U, __m128i __A)
#define _mm_cmpneq_epi32_mask(A, B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_mov_epi32(__m128i __W, __mmask8 __U, __m128i __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_maskz_cvtps_pd(__mmask8 __U, __m128 __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_fnmsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_expand_epi64(__mmask8 __U, __m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_srlv_epi64(__mmask8 __U, __m256i __X, __m256i __Y)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask3_fmsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtps_epu32(__m256i __W, __mmask8 __U, __m256 __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask3_fmadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_expandloadu_epi64(__m256i __W, __mmask8 __U, void const *__P)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_cvtepi16_epi32(__mmask8 __U, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_cvtepi32_epi64(__mmask8 __U, __m128i __X)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_andnot_epi32(__mmask8 __U, __m128i __A, __m128i __B)
static __inline__ void __DEFAULT_FN_ATTRS128 _mm_mask_storeu_epi32(void *__P, __mmask8 __U, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_cvttps_epi32(__mmask8 __U, __m128 __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_sll_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_loadu_epi32(__mmask8 __U, void const *__P)
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_mov_pd(__m256d __W, __mmask8 __U, __m256d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_min_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B)
static __inline__ void __DEFAULT_FN_ATTRS256 _mm256_mask_compressstoreu_epi64(void *__P, __mmask8 __U, __m256i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_cvtsepi32_epi16(__m256i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_srl_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B)
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_permutex2var_pd(__m256d __A, __m256i __I, __m256d __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask_mul_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_abs_epi64(__mmask8 __U, __m256i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_xor_epi32(__mmask8 __U, __m128i __A, __m128i __B)
static __inline__ void __DEFAULT_FN_ATTRS128 _mm_mask_compressstoreu_epi32(void *__P, __mmask8 __U, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_rorv_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_maskz_cvttpd_epi32(__mmask8 __U, __m256d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_xor_epi64(__m128i __a, __m128i __b)
static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_maskz_getexp_pd(__mmask8 __U, __m128d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_cvtepi64_epi32(__mmask8 __M, __m256i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_min_epu64(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_maskz_cvttpd_epu32(__mmask8 __U, __m256d __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mask_unpackhi_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvtepi64_epi32(__m128i __O, __mmask8 __M, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvtusepi64_epi32(__m128i __O, __mmask8 __M, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_abs_epi64(__m128i __W, __mmask8 __U, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvtpd_epi32(__m128i __W, __mmask8 __U, __m128d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_or_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_maskz_abs_epi32(__mmask8 __U, __m256i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_blend_epi64(__mmask8 __U, __m128i __A, __m128i __W)
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_compress_epi64(__m128i __W, __mmask8 __U, __m128i __A)
static __inline__ void __DEFAULT_FN_ATTRS128 _mm_mask_cvtsepi32_storeu_epi8(void *__P, __mmask8 __M, __m128i __A)
static __inline __m128i __DEFAULT_FN_ATTRS _mm256_cvtpd_epi32(__m256d __a)
Converts a 256-bit vector of [4 x double] into a 128-bit vector of [4 x i32].
Definition avxintrin.h:2275
static __inline __m256 __DEFAULT_FN_ATTRS _mm256_sqrt_ps(__m256 __a)
Calculates the square roots of the values in a 256-bit vector of [8 x float].
Definition avxintrin.h:356
static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_sub_pd(__m256d __a, __m256d __b)
Subtracts two 256-bit vectors of [4 x double].
Definition avxintrin.h:116
static __inline __m128 __DEFAULT_FN_ATTRS _mm256_cvtpd_ps(__m256d __a)
Converts a 256-bit vector of [4 x double] into a 128-bit vector of [4 x float].
Definition avxintrin.h:2200
static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_mul_pd(__m256d __a, __m256d __b)
Multiplies two 256-bit vectors of [4 x double].
Definition avxintrin.h:306
static __inline __m256 __DEFAULT_FN_ATTRS _mm256_permutevar_ps(__m256 __a, __m256i __c)
Copies the values stored in a 256-bit vector of [8 x float] as specified by the 256-bit integer vecto...
Definition avxintrin.h:978
static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_div_pd(__m256d __a, __m256d __b)
Divides two 256-bit vectors of [4 x double].
Definition avxintrin.h:188
static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_movehdup_ps(__m256 __a)
Moves and duplicates odd-indexed values from a 256-bit vector of [8 x float] to float values in a 256...
Definition avxintrin.h:2367
static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_sub_ps(__m256 __a, __m256 __b)
Subtracts two 256-bit vectors of [8 x float].
Definition avxintrin.h:132
static __inline __m128 __DEFAULT_FN_ATTRS128 _mm_permutevar_ps(__m128 __a, __m128i __c)
Copies the values stored in a 128-bit vector of [4 x float] as specified by the 128-bit integer vecto...
Definition avxintrin.h:887
static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_cvtepi32_ps(__m256i __a)
Converts a vector of [8 x i32] into a vector of [8 x float].
Definition avxintrin.h:2185
static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_unpacklo_ps(__m256 __a, __m256 __b)
Unpacks the 32-bit vector elements 0, 1, 4 and 5 from each of the two 256-bit vectors of [8 x float] ...
Definition avxintrin.h:2510
static __inline __m128i __DEFAULT_FN_ATTRS _mm256_cvttpd_epi32(__m256d __a)
Converts a 256-bit vector of [4 x double] into four signed truncated (rounded toward zero) 32-bit int...
Definition avxintrin.h:2255
static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_cvtps_pd(__m128 __a)
Converts a 128-bit vector of [4 x float] into a 256-bit vector of [4 x double].
Definition avxintrin.h:2235
static __inline __m256i __DEFAULT_FN_ATTRS _mm256_cvtps_epi32(__m256 __a)
Converts a vector of [8 x float] into a vector of [8 x i32].
Definition avxintrin.h:2219
static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_unpackhi_ps(__m256 __a, __m256 __b)
Unpacks the 32-bit vector elements 2, 3, 6 and 7 from each of the two 256-bit vectors of [8 x float] ...
Definition avxintrin.h:2484
static __inline __m256 __DEFAULT_FN_ATTRS _mm256_min_ps(__m256 __a, __m256 __b)
Compares two 256-bit vectors of [8 x float] and returns the lesser of each pair of values.
Definition avxintrin.h:288
static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_cvtepi32_pd(__m128i __a)
Converts a vector of [4 x i32] into a vector of [4 x double].
Definition avxintrin.h:2171
static __inline __m256i __DEFAULT_FN_ATTRS _mm256_cvttps_epi32(__m256 __a)
Converts a vector of [8 x float] into eight signed truncated (rounded toward zero) 32-bit integers re...
Definition avxintrin.h:2295
static __inline __m256 __DEFAULT_FN_ATTRS _mm256_max_ps(__m256 __a, __m256 __b)
Compares two 256-bit vectors of [8 x float] and returns the greater of each pair of values.
Definition avxintrin.h:246
static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_setzero_ps(void)
Constructs a 256-bit floating-point vector of [8 x float] with all vector elements initialized to zer...
Definition avxintrin.h:4304
static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_set1_epi32(int __i)
Constructs a 256-bit integer vector of [8 x i32], with each of the 32-bit integral vector elements se...
Definition avxintrin.h:4221
static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_add_pd(__m256d __a, __m256d __b)
Adds two 256-bit vectors of [4 x double].
Definition avxintrin.h:82
static __inline __m256d __DEFAULT_FN_ATTRS _mm256_sqrt_pd(__m256d __a)
Calculates the square roots of the values in a 256-bit vector of [4 x double].
Definition avxintrin.h:339
static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_set1_epi64x(long long __q)
Constructs a 256-bit integer vector of [4 x i64], with each of the 64-bit integral vector elements se...
Definition avxintrin.h:4278
static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_add_ps(__m256 __a, __m256 __b)
Adds two 256-bit vectors of [8 x float].
Definition avxintrin.h:98
static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_moveldup_ps(__m256 __a)
Moves and duplicates even-indexed values from a 256-bit vector of [8 x float] to float values in a 25...
Definition avxintrin.h:2392
static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_movedup_pd(__m256d __a)
Moves and duplicates double-precision floating point values from a 256-bit vector of [4 x double] to ...
Definition avxintrin.h:2414
static __inline __m128d __DEFAULT_FN_ATTRS128 _mm_permutevar_pd(__m128d __a, __m128i __c)
Copies the values in a 128-bit vector of [2 x double] as specified by the 128-bit integer vector oper...
Definition avxintrin.h:793
static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_setzero_pd(void)
Constructs a 256-bit floating-point vector of [4 x double] with all vector elements initialized to ze...
Definition avxintrin.h:4292
static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_mul_ps(__m256 __a, __m256 __b)
Multiplies two 256-bit vectors of [8 x float].
Definition avxintrin.h:322
static __inline __m256d __DEFAULT_FN_ATTRS _mm256_min_pd(__m256d __a, __m256d __b)
Compares two 256-bit vectors of [4 x double] and returns the lesser of each pair of values.
Definition avxintrin.h:267
static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_setzero_si256(void)
Constructs a 256-bit integer vector initialized to zero.
Definition avxintrin.h:4316
static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_div_ps(__m256 __a, __m256 __b)
Divides two 256-bit vectors of [8 x float].
Definition avxintrin.h:204
static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_unpacklo_pd(__m256d __a, __m256d __b)
Unpacks the even-indexed vector elements from two 256-bit vectors of [4 x double] and interleaves the...
Definition avxintrin.h:2458
static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_unpackhi_pd(__m256d __a, __m256d __b)
Unpacks the odd-indexed vector elements from two 256-bit vectors of [4 x double] and interleaves them...
Definition avxintrin.h:2437
static __inline __m256d __DEFAULT_FN_ATTRS _mm256_permutevar_pd(__m256d __a, __m256i __c)
Copies the values in a 256-bit vector of [4 x double] as specified by the 256-bit integer vector oper...
Definition avxintrin.h:832
static __inline __m256d __DEFAULT_FN_ATTRS _mm256_max_pd(__m256d __a, __m256d __b)
Compares two 256-bit vectors of [4 x double] and returns the greater of each pair of values.
Definition avxintrin.h:225
static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_div_pd(__m128d __a, __m128d __b)
Performs an element-by-element division of two 128-bit vectors of [2 x double].
Definition emmintrin.h:218
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_srli_epi64(__m128i __a, int __count)
Right-shifts each of 64-bit values in the 128-bit integer vector operand by the specified number of b...
Definition emmintrin.h:3050
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sll_epi32(__m128i __a, __m128i __count)
Left-shifts each 32-bit value in the 128-bit integer vector operand by the specified number of bits.
Definition emmintrin.h:2822
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_min_pd(__m128d __a, __m128d __b)
Performs element-by-element comparison of the two 128-bit vectors of [2 x double] and returns a vecto...
Definition emmintrin.h:304
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srl_epi32(__m128i __a, __m128i __count)
Right-shifts each of 32-bit values in the 128-bit integer vector operand by the specified number of b...
Definition emmintrin.h:3031
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_sub_epi32(__m128i __a, __m128i __b)
Subtracts the corresponding 32-bit integer values in the operands.
Definition emmintrin.h:2536
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_slli_epi64(__m128i __a, int __count)
Left-shifts each 64-bit value in the 128-bit integer vector operand by the specified number of bits.
Definition emmintrin.h:2841
static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_cvtepi32_pd(__m128i __a)
Converts the lower two integer elements of a 128-bit vector of [4 x i32] into two double-precision fl...
Definition emmintrin.h:1323
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_setzero_si128(void)
Creates a 128-bit integer vector initialized to zero.
Definition emmintrin.h:3878
static __inline__ void int __a
Definition emmintrin.h:4077
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_sub_epi64(__m128i __a, __m128i __b)
Subtracts the corresponding elements of two [2 x i64] vectors.
Definition emmintrin.h:2571
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_sqrt_pd(__m128d __a)
Calculates the square root of the each of two values stored in a 128-bit vector of [2 x double].
Definition emmintrin.h:259
static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_mul_pd(__m128d __a, __m128d __b)
Multiplies two 128-bit vectors of [2 x double].
Definition emmintrin.h:177
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_undefined_si128(void)
Generates a 128-bit vector of [4 x i32] with unspecified content.
Definition emmintrin.h:3493
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_set1_epi64x(long long __q)
Initializes both values in a 128-bit integer vector with the specified 64-bit integer value.
Definition emmintrin.h:3674
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_unpacklo_epi32(__m128i __a, __m128i __b)
Unpacks the low-order (index 0,1) values from two 128-bit vectors of [4 x i32] and interleaves them i...
Definition emmintrin.h:4576
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_srli_epi32(__m128i __a, int __count)
Right-shifts each of 32-bit values in the 128-bit integer vector operand by the specified number of b...
Definition emmintrin.h:3014
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sll_epi64(__m128i __a, __m128i __count)
Left-shifts each 64-bit value in the 128-bit integer vector operand by the specified number of bits.
Definition emmintrin.h:2858
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_unpacklo_epi64(__m128i __a, __m128i __b)
Unpacks the low-order 64-bit elements from two 128-bit vectors of [2 x i64] and interleaves them into...
Definition emmintrin.h:4597
static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_setzero_pd(void)
Constructs a 128-bit floating-point vector of [2 x double] initialized to zero.
Definition emmintrin.h:1867
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_mul_epu32(__m128i __a, __m128i __b)
Multiplies 32-bit unsigned integer values contained in the lower bits of the corresponding elements o...
Definition emmintrin.h:2464
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_add_epi32(__m128i __a, __m128i __b)
Adds the corresponding elements of two 128-bit vectors of [4 x i32], saving the lower 32 bits of each...
Definition emmintrin.h:2105
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srl_epi64(__m128i __a, __m128i __count)
Right-shifts each of 64-bit values in the 128-bit integer vector operand by the specified number of b...
Definition emmintrin.h:3067
static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_cvtps_pd(__m128 __a)
Converts the lower two single-precision floating-point elements of a 128-bit vector of [4 x float] in...
Definition emmintrin.h:1301
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvttps_epi32(__m128 __a)
Converts a vector of [4 x float] into four signed truncated (rounded toward zero) 32-bit integers,...
Definition emmintrin.h:3362
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_unpackhi_epi32(__m128i __a, __m128i __b)
Unpacks the high-order (index 2,3) values from two 128-bit vectors of [4 x i32] and interleaves them ...
Definition emmintrin.h:4469
static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_add_pd(__m128d __a, __m128d __b)
Adds two 128-bit vectors of [2 x double].
Definition emmintrin.h:98
static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_unpackhi_pd(__m128d __a, __m128d __b)
Unpacks the high-order 64-bit elements from two 128-bit vectors of [2 x double] and interleaves them ...
Definition emmintrin.h:4666
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_and_si128(__m128i __a, __m128i __b)
Performs a bitwise AND of two 128-bit integer vectors.
Definition emmintrin.h:2674
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_max_pd(__m128d __a, __m128d __b)
Performs element-by-element comparison of the two 128-bit vectors of [2 x double] and returns a vecto...
Definition emmintrin.h:350
static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_unpacklo_pd(__m128d __a, __m128d __b)
Unpacks the low-order 64-bit elements from two 128-bit vectors of [2 x double] and interleaves them i...
Definition emmintrin.h:4686
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_unpackhi_epi64(__m128i __a, __m128i __b)
Unpacks the high-order 64-bit elements from two 128-bit vectors of [2 x i64] and interleaves them int...
Definition emmintrin.h:4490
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_slli_epi32(__m128i __a, int __count)
Left-shifts each 32-bit value in the 128-bit integer vector operand by the specified number of bits.
Definition emmintrin.h:2805
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_add_epi64(__m128i __a, __m128i __b)
Adds the corresponding elements of two 128-bit vectors of [2 x i64], saving the lower 64 bits of each...
Definition emmintrin.h:2143
static __inline__ __m128 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_cvtepi32_ps(__m128i __a)
Converts a vector of [4 x i32] into a vector of [4 x float].
Definition emmintrin.h:3325
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_set1_epi32(int __i)
Initializes all values in a 128-bit vector of [4 x i32] with the specified 32-bit value.
Definition emmintrin.h:3709
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sra_epi32(__m128i __a, __m128i __count)
Right-shifts each 32-bit value in the 128-bit integer vector operand by the specified number of bits.
Definition emmintrin.h:2934
static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_sub_pd(__m128d __a, __m128d __b)
Subtracts two 128-bit vectors of [2 x double].
Definition emmintrin.h:138
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_srai_epi32(__m128i __a, int __count)
Right-shifts each 32-bit value in the 128-bit integer vector operand by the specified number of bits.
Definition emmintrin.h:2916
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtps_epi32(__m128 __a)
Converts a vector of [4 x float] into a vector of [4 x i32].
Definition emmintrin.h:3343
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_fnmadd_ps(__m128 __A, __m128 __B, __m128 __C)
Computes a negated multiply-add of 128-bit vectors of [4 x float].
Definition fmaintrin.h:248
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_fmadd_ps(__m128 __A, __m128 __B, __m128 __C)
Computes a multiply-add of 128-bit vectors of [4 x float].
Definition fmaintrin.h:48
static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_fnmadd_pd(__m128d __A, __m128d __B, __m128d __C)
Computes a negated multiply-add of 128-bit vectors of [2 x double].
Definition fmaintrin.h:269
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_fmsub_pd(__m256d __A, __m256d __B, __m256d __C)
Computes a multiply-subtract of 256-bit vectors of [4 x double].
Definition fmaintrin.h:615
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_fmsub_ps(__m256 __A, __m256 __B, __m256 __C)
Computes a multiply-subtract of 256-bit vectors of [8 x float].
Definition fmaintrin.h:594
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_fmsub_ps(__m128 __A, __m128 __B, __m128 __C)
Computes a multiply-subtract of 128-bit vectors of [4 x float].
Definition fmaintrin.h:148
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_fnmadd_pd(__m256d __A, __m256d __B, __m256d __C)
Computes a negated multiply-add of 256-bit vectors of [4 x double].
Definition fmaintrin.h:657
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_fmadd_ps(__m256 __A, __m256 __B, __m256 __C)
Computes a multiply-add of 256-bit vectors of [8 x float].
Definition fmaintrin.h:552
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_fnmsub_pd(__m256d __A, __m256d __B, __m256d __C)
Computes a negated multiply-subtract of 256-bit vectors of [4 x double].
Definition fmaintrin.h:699
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_fnmsub_ps(__m256 __A, __m256 __B, __m256 __C)
Computes a negated multiply-subtract of 256-bit vectors of [8 x float].
Definition fmaintrin.h:678
static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_fmadd_pd(__m128d __A, __m128d __B, __m128d __C)
Computes a multiply-add of 128-bit vectors of [2 x double].
Definition fmaintrin.h:69
static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_fmadd_pd(__m256d __A, __m256d __B, __m256d __C)
Computes a multiply-add of 256-bit vectors of [4 x double].
Definition fmaintrin.h:573
static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_fnmsub_ps(__m128 __A, __m128 __B, __m128 __C)
Computes a negated multiply-subtract of 128-bit vectors of [4 x float].
Definition fmaintrin.h:348
static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_fnmadd_ps(__m256 __A, __m256 __B, __m256 __C)
Computes a negated multiply-add of 256-bit vectors of [8 x float].
Definition fmaintrin.h:636
static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_fmsub_pd(__m128d __A, __m128d __B, __m128d __C)
Computes a multiply-subtract of 128-bit vectors of [2 x double].
Definition fmaintrin.h:169
static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_fnmsub_pd(__m128d __A, __m128d __B, __m128d __C)
Computes a negated multiply-subtract of 128-bit vectors of [2 x double].
Definition fmaintrin.h:369
static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_movedup_pd(__m128d __a)
Moves and duplicates the double-precision value in the lower bits of a 128-bit vector of [2 x double]...
Definition pmmintrin.h:249
static __inline__ __m128 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_moveldup_ps(__m128 __a)
Duplicates even-indexed values from a 128-bit vector of [4 x float] to float values stored in a 128-b...
Definition pmmintrin.h:151
static __inline__ __m128 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_movehdup_ps(__m128 __a)
Moves and duplicates odd-indexed values from a 128-bit vector of [4 x float] to float values stored i...
Definition pmmintrin.h:130
__inline unsigned int unsigned int unsigned int * __P
Definition bmi2intrin.h:25
__inline unsigned int unsigned int __Y
Definition bmi2intrin.h:19
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_mul_epi32(__m128i __V1, __m128i __V2)
Multiplies corresponding even-indexed elements of two 128-bit vectors of [4 x i32] and returns a 128-...
Definition smmintrin.h:562
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_max_epi32(__m128i __V1, __m128i __V2)
Compares the corresponding elements of two 128-bit vectors of [4 x i32] and returns a 128-bit vector ...
Definition smmintrin.h:760
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_cvtepu16_epi64(__m128i __V)
Zero-extends each of the lower two 16-bit integer elements of a 128-bit integer vector of [8 x i16] t...
Definition smmintrin.h:1426
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_max_epu32(__m128i __V1, __m128i __V2)
Compares the corresponding elements of two 128-bit vectors of [4 x u32] and returns a 128-bit vector ...
Definition smmintrin.h:796
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_cvtepu32_epi64(__m128i __V)
Zero-extends each of the lower two 32-bit integer elements of a 128-bit integer vector of [4 x i32] t...
Definition smmintrin.h:1445
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_cvtepi8_epi32(__m128i __V)
Sign-extends each of the lower four 8-bit integer elements of a 128-bit vector of [16 x i8] to 32-bit...
Definition smmintrin.h:1248
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_cvtepi16_epi64(__m128i __V)
Sign-extends each of the lower two 16-bit integer elements of a 128-bit integer vector of [8 x i16] t...
Definition smmintrin.h:1309
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_cvtepu8_epi32(__m128i __V)
Zero-extends each of the lower four 8-bit integer elements of a 128-bit vector of [16 x i8] to 32-bit...
Definition smmintrin.h:1369
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_cvtepi8_epi64(__m128i __V)
Sign-extends each of the lower two 8-bit integer elements of a 128-bit integer vector of [16 x i8] to...
Definition smmintrin.h:1269
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_min_epi32(__m128i __V1, __m128i __V2)
Compares the corresponding elements of two 128-bit vectors of [4 x i32] and returns a 128-bit vector ...
Definition smmintrin.h:742
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_mullo_epi32(__m128i __V1, __m128i __V2)
Multiples corresponding elements of two 128-bit vectors of [4 x i32] and returns the lower 32 bits of...
Definition smmintrin.h:543
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_cvtepi16_epi32(__m128i __V)
Sign-extends each of the lower four 16-bit integer elements of a 128-bit integer vector of [8 x i16] ...
Definition smmintrin.h:1290
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_min_epu32(__m128i __V1, __m128i __V2)
Compares the corresponding elements of two 128-bit vectors of [4 x u32] and returns a 128-bit vector ...
Definition smmintrin.h:778
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_cvtepi32_epi64(__m128i __V)
Sign-extends each of the lower two 32-bit integer elements of a 128-bit integer vector of [4 x i32] t...
Definition smmintrin.h:1328
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_cvtepu16_epi32(__m128i __V)
Zero-extends each of the lower four 16-bit integer elements of a 128-bit integer vector of [8 x i16] ...
Definition smmintrin.h:1407
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_cvtepu8_epi64(__m128i __V)
Zero-extends each of the lower two 8-bit integer elements of a 128-bit integer vector of [16 x i8] to...
Definition smmintrin.h:1388
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_abs_epi32(__m128i __a)
Computes the absolute value of each of the packed 32-bit signed integers in the source operand and st...
Definition tmmintrin.h:131
static __inline__ __m128 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_unpacklo_ps(__m128 __a, __m128 __b)
Unpacks the low-order (index 0,1) values from two 128-bit vectors of [4 x float] and interleaves them...
Definition xmmintrin.h:2783
static __inline__ __m128 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_add_ps(__m128 __a, __m128 __b)
Adds two 128-bit vectors of [4 x float], and returns the results of the addition.
Definition xmmintrin.h:98
static __inline__ __m128 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_unpackhi_ps(__m128 __a, __m128 __b)
Unpacks the high-order (index 2,3) values from two 128-bit vectors of [4 x float] and interleaves the...
Definition xmmintrin.h:2762
static __inline__ __m128 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_div_ps(__m128 __a, __m128 __b)
Divides two 128-bit vectors of [4 x float].
Definition xmmintrin.h:218
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_max_ps(__m128 __a, __m128 __b)
Compares two 128-bit vectors of [4 x float] and returns the greater of each pair of values.
Definition xmmintrin.h:415
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_min_ps(__m128 __a, __m128 __b)
Compares two 128-bit vectors of [4 x float] and returns the lesser of each pair of values.
Definition xmmintrin.h:369
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_sqrt_ps(__m128 __a)
Calculates the square roots of the values stored in a 128-bit vector of [4 x float].
Definition xmmintrin.h:252
static __inline__ __m128 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_setzero_ps(void)
Constructs a 128-bit floating-point vector of [4 x float] initialized to zero.
Definition xmmintrin.h:2021
static __inline__ __m128 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_sub_ps(__m128 __a, __m128 __b)
Subtracts each of the values of the second operand from the first operand, both of which are 128-bit ...
Definition xmmintrin.h:139
static __inline__ __m128 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_mul_ps(__m128 __a, __m128 __b)
Multiplies two 128-bit vectors of [4 x float] and returns the results of the multiplication.
Definition xmmintrin.h:179