clang  14.0.0git
NVPTX.cpp
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1 //===--- NVPTX.cpp - Implement NVPTX target feature support ---------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements NVPTX TargetInfo objects.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "NVPTX.h"
14 #include "Targets.h"
15 #include "clang/Basic/Builtins.h"
18 #include "llvm/ADT/StringSwitch.h"
19 
20 using namespace clang;
21 using namespace clang::targets;
22 
23 const Builtin::Info NVPTXTargetInfo::BuiltinInfo[] = {
24 #define BUILTIN(ID, TYPE, ATTRS) \
25  {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr},
26 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) \
27  {#ID, TYPE, ATTRS, HEADER, ALL_LANGUAGES, nullptr},
28 #define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) \
29  {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, FEATURE},
30 #include "clang/Basic/BuiltinsNVPTX.def"
31 };
32 
33 const char *const NVPTXTargetInfo::GCCRegNames[] = {"r0"};
34 
35 NVPTXTargetInfo::NVPTXTargetInfo(const llvm::Triple &Triple,
36  const TargetOptions &Opts,
37  unsigned TargetPointerWidth)
38  : TargetInfo(Triple) {
39  assert((TargetPointerWidth == 32 || TargetPointerWidth == 64) &&
40  "NVPTX only supports 32- and 64-bit modes.");
41 
42  PTXVersion = 32;
43  for (const StringRef Feature : Opts.FeaturesAsWritten) {
44  if (!Feature.startswith("+ptx"))
45  continue;
46  PTXVersion = llvm::StringSwitch<unsigned>(Feature)
47  .Case("+ptx74", 74)
48  .Case("+ptx73", 73)
49  .Case("+ptx72", 72)
50  .Case("+ptx71", 71)
51  .Case("+ptx70", 70)
52  .Case("+ptx65", 65)
53  .Case("+ptx64", 64)
54  .Case("+ptx63", 63)
55  .Case("+ptx61", 61)
56  .Case("+ptx60", 60)
57  .Case("+ptx50", 50)
58  .Case("+ptx43", 43)
59  .Case("+ptx42", 42)
60  .Case("+ptx41", 41)
61  .Case("+ptx40", 40)
62  .Case("+ptx32", 32)
63  .Default(32);
64  }
65 
66  TLSSupported = false;
67  VLASupported = false;
70 
71  // Define available target features
72  // These must be defined in sorted order!
73  NoAsmVariants = true;
74  GPU = CudaArch::SM_20;
75 
76  if (TargetPointerWidth == 32)
77  resetDataLayout("e-p:32:32-i64:64-i128:128-v16:16-v32:32-n16:32:64");
78  else if (Opts.NVPTXUseShortPointers)
80  "e-p3:32:32-p4:32:32-p5:32:32-i64:64-i128:128-v16:16-v32:32-n16:32:64");
81  else
82  resetDataLayout("e-i64:64-i128:128-v16:16-v32:32-n16:32:64");
83 
84  // If possible, get a TargetInfo for our host triple, so we can match its
85  // types.
86  llvm::Triple HostTriple(Opts.HostTriple);
87  if (!HostTriple.isNVPTX())
88  HostTarget.reset(AllocateTarget(llvm::Triple(Opts.HostTriple), Opts));
89 
90  // If no host target, make some guesses about the data layout and return.
91  if (!HostTarget) {
92  LongWidth = LongAlign = TargetPointerWidth;
93  PointerWidth = PointerAlign = TargetPointerWidth;
94  switch (TargetPointerWidth) {
95  case 32:
99  break;
100  case 64:
104  break;
105  default:
106  llvm_unreachable("TargetPointerWidth must be 32 or 64");
107  }
108  return;
109  }
110 
111  // Copy properties from host target.
112  PointerWidth = HostTarget->getPointerWidth(/* AddrSpace = */ 0);
113  PointerAlign = HostTarget->getPointerAlign(/* AddrSpace = */ 0);
114  BoolWidth = HostTarget->getBoolWidth();
115  BoolAlign = HostTarget->getBoolAlign();
116  IntWidth = HostTarget->getIntWidth();
117  IntAlign = HostTarget->getIntAlign();
118  HalfWidth = HostTarget->getHalfWidth();
119  HalfAlign = HostTarget->getHalfAlign();
120  FloatWidth = HostTarget->getFloatWidth();
121  FloatAlign = HostTarget->getFloatAlign();
122  DoubleWidth = HostTarget->getDoubleWidth();
123  DoubleAlign = HostTarget->getDoubleAlign();
124  LongWidth = HostTarget->getLongWidth();
125  LongAlign = HostTarget->getLongAlign();
126  LongLongWidth = HostTarget->getLongLongWidth();
127  LongLongAlign = HostTarget->getLongLongAlign();
128  MinGlobalAlign = HostTarget->getMinGlobalAlign(/* TypeSize = */ 0);
129  NewAlign = HostTarget->getNewAlign();
131  HostTarget->getDefaultAlignForAttributeAligned();
132  SizeType = HostTarget->getSizeType();
133  IntMaxType = HostTarget->getIntMaxType();
134  PtrDiffType = HostTarget->getPtrDiffType(/* AddrSpace = */ 0);
135  IntPtrType = HostTarget->getIntPtrType();
136  WCharType = HostTarget->getWCharType();
137  WIntType = HostTarget->getWIntType();
138  Char16Type = HostTarget->getChar16Type();
139  Char32Type = HostTarget->getChar32Type();
140  Int64Type = HostTarget->getInt64Type();
141  SigAtomicType = HostTarget->getSigAtomicType();
142  ProcessIDType = HostTarget->getProcessIDType();
143 
144  UseBitFieldTypeAlignment = HostTarget->useBitFieldTypeAlignment();
145  UseZeroLengthBitfieldAlignment = HostTarget->useZeroLengthBitfieldAlignment();
146  UseExplicitBitFieldAlignment = HostTarget->useExplicitBitFieldAlignment();
147  ZeroLengthBitfieldBoundary = HostTarget->getZeroLengthBitfieldBoundary();
148 
149  // This is a bit of a lie, but it controls __GCC_ATOMIC_XXX_LOCK_FREE, and
150  // we need those macros to be identical on host and device, because (among
151  // other things) they affect which standard library classes are defined, and
152  // we need all classes to be defined on both the host and device.
153  MaxAtomicInlineWidth = HostTarget->getMaxAtomicInlineWidth();
154 
155  // Properties intentionally not copied from host:
156  // - LargeArrayMinWidth, LargeArrayAlign: Not visible across the
157  // host/device boundary.
158  // - SuitableAlign: Not visible across the host/device boundary, and may
159  // correctly be different on host/device, e.g. if host has wider vector
160  // types than device.
161  // - LongDoubleWidth, LongDoubleAlign: nvptx's long double type is the same
162  // as its double type, but that's not necessarily true on the host.
163  // TODO: nvcc emits a warning when using long double on device; we should
164  // do the same.
165 }
166 
168  return llvm::makeArrayRef(GCCRegNames);
169 }
170 
171 bool NVPTXTargetInfo::hasFeature(StringRef Feature) const {
172  return llvm::StringSwitch<bool>(Feature)
173  .Cases("ptx", "nvptx", true)
174  .Default(false);
175 }
176 
178  MacroBuilder &Builder) const {
179  Builder.defineMacro("__PTX__");
180  Builder.defineMacro("__NVPTX__");
181  if (Opts.CUDAIsDevice) {
182  // Set __CUDA_ARCH__ for the GPU specified.
183  std::string CUDAArchCode = [this] {
184  switch (GPU) {
185  case CudaArch::GFX600:
186  case CudaArch::GFX601:
187  case CudaArch::GFX602:
188  case CudaArch::GFX700:
189  case CudaArch::GFX701:
190  case CudaArch::GFX702:
191  case CudaArch::GFX703:
192  case CudaArch::GFX704:
193  case CudaArch::GFX705:
194  case CudaArch::GFX801:
195  case CudaArch::GFX802:
196  case CudaArch::GFX803:
197  case CudaArch::GFX805:
198  case CudaArch::GFX810:
199  case CudaArch::GFX900:
200  case CudaArch::GFX902:
201  case CudaArch::GFX904:
202  case CudaArch::GFX906:
203  case CudaArch::GFX908:
204  case CudaArch::GFX909:
205  case CudaArch::GFX90a:
206  case CudaArch::GFX90c:
207  case CudaArch::GFX1010:
208  case CudaArch::GFX1011:
209  case CudaArch::GFX1012:
210  case CudaArch::GFX1013:
211  case CudaArch::GFX1030:
212  case CudaArch::GFX1031:
213  case CudaArch::GFX1032:
214  case CudaArch::GFX1033:
215  case CudaArch::GFX1034:
216  case CudaArch::GFX1035:
217  case CudaArch::LAST:
218  break;
219  case CudaArch::UNUSED:
220  case CudaArch::UNKNOWN:
221  assert(false && "No GPU arch when compiling CUDA device code.");
222  return "";
223  case CudaArch::SM_20:
224  return "200";
225  case CudaArch::SM_21:
226  return "210";
227  case CudaArch::SM_30:
228  return "300";
229  case CudaArch::SM_32:
230  return "320";
231  case CudaArch::SM_35:
232  return "350";
233  case CudaArch::SM_37:
234  return "370";
235  case CudaArch::SM_50:
236  return "500";
237  case CudaArch::SM_52:
238  return "520";
239  case CudaArch::SM_53:
240  return "530";
241  case CudaArch::SM_60:
242  return "600";
243  case CudaArch::SM_61:
244  return "610";
245  case CudaArch::SM_62:
246  return "620";
247  case CudaArch::SM_70:
248  return "700";
249  case CudaArch::SM_72:
250  return "720";
251  case CudaArch::SM_75:
252  return "750";
253  case CudaArch::SM_80:
254  return "800";
255  case CudaArch::SM_86:
256  return "860";
257  }
258  llvm_unreachable("unhandled CudaArch");
259  }();
260  Builder.defineMacro("__CUDA_ARCH__", CUDAArchCode);
261  }
262 }
263 
265  return llvm::makeArrayRef(BuiltinInfo, clang::NVPTX::LastTSBuiltin -
267 }
clang::TransferrableTargetInfo::PointerAlign
unsigned char PointerAlign
Definition: TargetInfo.h:69
clang::CudaArch::SM_35
@ SM_35
clang::TransferrableTargetInfo::LongWidth
unsigned char LongWidth
Definition: TargetInfo.h:78
clang::CudaArch::GFX805
@ GFX805
clang::TargetOptions::HostTriple
std::string HostTriple
When compiling for the device side, contains the triple used to compile for the host.
Definition: TargetOptions.h:33
Builtins.h
clang::CudaArch::SM_70
@ SM_70
clang::CudaArch::GFX704
@ GFX704
clang::TargetOptions::NVPTXUseShortPointers
bool NVPTXUseShortPointers
If enabled, use 32-bit pointers for accessing const/local/shared address space.
Definition: TargetOptions.h:76
clang::TransferrableTargetInfo::IntPtrType
IntType IntPtrType
Definition: TargetInfo.h:134
clang::CudaArch::GFX1035
@ GFX1035
clang::TransferrableTargetInfo::IntMaxType
IntType IntMaxType
Definition: TargetInfo.h:134
clang::CudaArch::GFX601
@ GFX601
string
string(SUBSTRING ${CMAKE_CURRENT_BINARY_DIR} 0 ${PATH_LIB_START} PATH_HEAD) string(SUBSTRING $
Definition: CMakeLists.txt:22
clang::CudaArch::GFX908
@ GFX908
clang::targets::AllocateTarget
TargetInfo * AllocateTarget(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: Targets.cpp:107
clang::TransferrableTargetInfo::UseExplicitBitFieldAlignment
unsigned UseExplicitBitFieldAlignment
Whether explicit bit field alignment attributes are honored.
Definition: TargetInfo.h:164
clang::TransferrableTargetInfo::LongLongAlign
unsigned char LongLongAlign
Definition: TargetInfo.h:79
clang::TransferrableTargetInfo::DoubleAlign
unsigned char DoubleAlign
Definition: TargetInfo.h:75
clang::TransferrableTargetInfo::SigAtomicType
IntType SigAtomicType
Definition: TargetInfo.h:135
clang::CudaArch::GFX906
@ GFX906
clang::CudaArch::GFX802
@ GFX802
clang::CudaArch::SM_53
@ SM_53
clang::TransferrableTargetInfo::UseZeroLengthBitfieldAlignment
unsigned UseZeroLengthBitfieldAlignment
Whether zero length bitfields (e.g., int : 0;) force alignment of the next bitfield.
Definition: TargetInfo.h:157
clang::TargetInfo
Exposes information about the current target.
Definition: TargetInfo.h:189
clang::TransferrableTargetInfo::DefaultAlignForAttributeAligned
unsigned char DefaultAlignForAttributeAligned
Definition: TargetInfo.h:108
clang::targets::NVPTXTargetInfo::getTargetBuiltins
ArrayRef< Builtin::Info > getTargetBuiltins() const override
Return information about target-specific builtins for the current primary target, and info about whic...
Definition: NVPTX.cpp:264
clang::CudaArch::GFX1034
@ GFX1034
clang::TransferrableTargetInfo::WIntType
IntType WIntType
Definition: TargetInfo.h:134
clang::TransferrableTargetInfo::BoolAlign
unsigned char BoolAlign
Definition: TargetInfo.h:70
clang::CudaArch::GFX1010
@ GFX1010
clang::TargetInfo::UseAddrSpaceMapMangling
bool UseAddrSpaceMapMangling
Specify if mangling based on address space map should be used or not for language specific address sp...
Definition: TargetInfo.h:314
clang::TransferrableTargetInfo::LongAlign
unsigned char LongAlign
Definition: TargetInfo.h:78
clang::CudaArch::SM_60
@ SM_60
NVPTX.h
clang::CudaArch::GFX1011
@ GFX1011
clang::targets::NVPTXTargetInfo::getGCCRegNames
ArrayRef< const char * > getGCCRegNames() const override
Definition: NVPTX.cpp:167
clang::CudaArch::SM_20
@ SM_20
clang::TransferrableTargetInfo::HalfAlign
unsigned char HalfAlign
Definition: TargetInfo.h:72
clang::CudaArch::SM_86
@ SM_86
clang::CudaArch::GFX702
@ GFX702
clang::TransferrableTargetInfo::FloatAlign
unsigned char FloatAlign
Definition: TargetInfo.h:74
clang::CudaArch::SM_72
@ SM_72
clang::TransferrableTargetInfo::LongLongWidth
unsigned char LongLongWidth
Definition: TargetInfo.h:79
clang::targets::NVPTXTargetInfo::NVPTXTargetInfo
NVPTXTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts, unsigned TargetPointerWidth)
Definition: NVPTX.cpp:35
clang::CudaArch::GFX90c
@ GFX90c
Targets.h
clang::targets::NVPTXTargetInfo::hasFeature
bool hasFeature(StringRef Feature) const override
Determine whether the given target has the given feature.
Definition: NVPTX.cpp:171
clang::CudaArch::GFX1012
@ GFX1012
MacroBuilder.h
clang::CudaArch::GFX1033
@ GFX1033
clang::CudaArch::GFX1031
@ GFX1031
clang::CudaArch::GFX90a
@ GFX90a
clang::CudaArch::SM_21
@ SM_21
clang::TargetInfo::NoAsmVariants
bool NoAsmVariants
Definition: TargetInfo.h:199
clang::CudaArch::GFX1032
@ GFX1032
clang::TransferrableTargetInfo::HalfWidth
unsigned char HalfWidth
Definition: TargetInfo.h:72
clang::TargetInfo::resetDataLayout
void resetDataLayout(StringRef DL, const char *UserLabelPrefix="")
Definition: TargetInfo.cpp:156
clang::CudaArch::GFX904
@ GFX904
clang::CudaArch::SM_52
@ SM_52
clang::TargetInfo::VLASupported
bool VLASupported
Definition: TargetInfo.h:198
clang::TransferrableTargetInfo::Char16Type
IntType Char16Type
Definition: TargetInfo.h:135
clang::CudaArch::SM_61
@ SM_61
clang::CudaArch::GFX803
@ GFX803
clang::CudaArch::LAST
@ LAST
clang::TransferrableTargetInfo::PtrDiffType
IntType PtrDiffType
Definition: TargetInfo.h:134
clang::CudaArch::SM_80
@ SM_80
clang::TargetInfo::TLSSupported
bool TLSSupported
Definition: TargetInfo.h:197
clang::CudaArch::GFX909
@ GFX909
clang::CudaArch::SM_30
@ SM_30
clang::TransferrableTargetInfo::ProcessIDType
IntType ProcessIDType
Definition: TargetInfo.h:136
clang::TransferrableTargetInfo::DoubleWidth
unsigned char DoubleWidth
Definition: TargetInfo.h:75
clang::TargetInfo::AddrSpaceMap
const LangASMap * AddrSpaceMap
Definition: TargetInfo.h:215
llvm::ArrayRef< const char * >
clang::CudaArch::GFX600
@ GFX600
clang::CudaArch::UNKNOWN
@ UNKNOWN
clang::targets::NVPTXTargetInfo::getTargetDefines
void getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const override
===-— Other target property query methods -----------------------—===//
Definition: NVPTX.cpp:177
clang::TargetInfo::MaxAtomicInlineWidth
unsigned char MaxAtomicInlineWidth
Definition: TargetInfo.h:208
clang::CudaArch::SM_32
@ SM_32
TargetBuiltins.h
clang::CudaArch::GFX900
@ GFX900
clang::CudaArch::GFX801
@ GFX801
clang::TransferrableTargetInfo::IntAlign
unsigned char IntAlign
Definition: TargetInfo.h:71
clang::TransferrableTargetInfo::UseBitFieldTypeAlignment
unsigned UseBitFieldTypeAlignment
Control whether the alignment of bit-field types is respected when laying out structures.
Definition: TargetInfo.h:149
clang::CudaArch::GFX703
@ GFX703
clang::LangOptions
Keeps track of the various options that can be enabled, which controls the dialect of C or C++ that i...
Definition: LangOptions.h:58
clang::TransferrableTargetInfo::BoolWidth
unsigned char BoolWidth
Definition: TargetInfo.h:70
clang::TargetOptions::FeaturesAsWritten
std::vector< std::string > FeaturesAsWritten
The list of target specific features to enable or disable, as written on the command line.
Definition: TargetOptions.h:54
clang::CudaArch::GFX705
@ GFX705
clang::TransferrableTargetInfo::FloatWidth
unsigned char FloatWidth
Definition: TargetInfo.h:74
clang
Definition: CalledOnceCheck.h:17
clang::targets
Definition: AArch64.h:21
clang::CudaArch::GFX902
@ GFX902
clang::Builtin::Info
Definition: Builtins.h:55
clang::TransferrableTargetInfo::MinGlobalAlign
unsigned char MinGlobalAlign
Definition: TargetInfo.h:109
clang::TransferrableTargetInfo::SignedInt
@ SignedInt
Definition: TargetInfo.h:125
clang::TransferrableTargetInfo::UnsignedLong
@ UnsignedLong
Definition: TargetInfo.h:128
clang::CudaArch::SM_37
@ SM_37
clang::CudaArch::GFX602
@ GFX602
clang::CudaArch::SM_50
@ SM_50
clang::CudaArch::GFX1013
@ GFX1013
clang::Builtin::FirstTSBuiltin
@ FirstTSBuiltin
Definition: Builtins.h:52
clang::CudaArch::GFX810
@ GFX810
clang::CudaArch::UNUSED
@ UNUSED
clang::TargetOptions
Options for controlling the target.
Definition: TargetOptions.h:26
clang::CudaArch::SM_62
@ SM_62
clang::targets::NVPTXAddrSpaceMap
static const unsigned NVPTXAddrSpaceMap[]
Definition: NVPTX.h:25
clang::TransferrableTargetInfo::NewAlign
unsigned short NewAlign
Definition: TargetInfo.h:111
clang::TransferrableTargetInfo::IntWidth
unsigned char IntWidth
Definition: TargetInfo.h:71
clang::NVPTX::LastTSBuiltin
@ LastTSBuiltin
Definition: TargetBuiltins.h:94
clang::TransferrableTargetInfo::WCharType
IntType WCharType
Definition: TargetInfo.h:134
clang::TransferrableTargetInfo::PointerWidth
unsigned char PointerWidth
Definition: TargetInfo.h:69
clang::MacroBuilder
Definition: MacroBuilder.h:23
clang::TransferrableTargetInfo::ZeroLengthBitfieldBoundary
unsigned ZeroLengthBitfieldBoundary
If non-zero, specifies a fixed alignment value for bitfields that follow zero length bitfield,...
Definition: TargetInfo.h:168
clang::CudaArch::SM_75
@ SM_75
clang::TransferrableTargetInfo::Int64Type
IntType Int64Type
Definition: TargetInfo.h:135
clang::TransferrableTargetInfo::UnsignedInt
@ UnsignedInt
Definition: TargetInfo.h:126
clang::CudaArch::GFX701
@ GFX701
clang::CudaArch::GFX1030
@ GFX1030
clang::CudaArch::GFX700
@ GFX700
clang::TransferrableTargetInfo::SizeType
IntType SizeType
Definition: TargetInfo.h:134
clang::TransferrableTargetInfo::SignedLong
@ SignedLong
Definition: TargetInfo.h:127
clang::TransferrableTargetInfo::Char32Type
IntType Char32Type
Definition: TargetInfo.h:135